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CN_SZTL 2020-04-17 21:05:30 +08:00
commit c8584d5849
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31 changed files with 775 additions and 87 deletions
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4
package/boot/uboot-imx6/Makefile
View File

@ -7,10 +7,10 @@
include $(TOPDIR)/rules.mk
PKG_VERSION:=2020.01
PKG_VERSION:=2020.04
PKG_RELEASE:=1
PKG_HASH:=aa453c603208b1b27bd03525775a7f79b443adec577fdc6e8f06974025a135f1
PKG_HASH:=fe732aaf037d9cc3c0909bad8362af366ae964bbdac6913a34081ff4ad565372
include $(INCLUDE_DIR)/u-boot.mk
include $(INCLUDE_DIR)/package.mk

6
package/boot/uboot-imx6/patches/0001-apalis_imx6_defconfig-enable-some-useful-commands.patch
View File

@ -14,11 +14,9 @@ Signed-off-by: Petr Štetiar <ynezz@true.cz>
configs/apalis_imx6_defconfig | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/configs/apalis_imx6_defconfig b/configs/apalis_imx6_defconfig
index 0d11ab53d663..bbb3ec1aa554 100644
--- a/configs/apalis_imx6_defconfig
+++ b/configs/apalis_imx6_defconfig
@@ -43,6 +43,7 @@ CONFIG_CMD_GPIO=y
@@ -44,6 +44,7 @@ CONFIG_CMD_GPIO=y
CONFIG_CMD_GPT=y
CONFIG_CMD_I2C=y
CONFIG_CMD_MMC=y
@ -26,7 +24,7 @@ index 0d11ab53d663..bbb3ec1aa554 100644
CONFIG_CMD_USB=y
CONFIG_CMD_USB_SDP=y
CONFIG_CMD_USB_MASS_STORAGE=y
@@ -52,6 +53,10 @@ CONFIG_CMD_PMIC=y
@@ -53,6 +54,10 @@ CONFIG_CMD_PMIC=y
CONFIG_CMD_REGULATOR=y
CONFIG_OF_CONTROL=y
CONFIG_DEFAULT_DEVICE_TREE="imx6-apalis"

4
package/boot/uboot-imx6/patches/110-mx6cuboxi-mmc-fallback.patch
View File

@ -1,7 +1,7 @@
--- a/board/solidrun/mx6cuboxi/mx6cuboxi.c
+++ b/board/solidrun/mx6cuboxi/mx6cuboxi.c
@@ -292,6 +292,12 @@ static void setup_iomux_enet(void)
udelay(100);
@@ -286,6 +286,12 @@ static void setup_iomux_enet(void)
gpio_free_list_nodev(&desc, 1);
}
+void board_boot_order(u32 *spl_boot_list)

10
package/boot/uboot-imx6/patches/111-mx6cuboxi_defconfig-force-mmc-boot.patch
View File

@ -13,11 +13,11 @@ Signed-off-by: Petr Štetiar <ynezz@true.cz>
--- a/configs/mx6cuboxi_defconfig
+++ b/configs/mx6cuboxi_defconfig
@@ -6,6 +6,7 @@ CONFIG_SPL_LIBCOMMON_SUPPORT=y
CONFIG_SPL_LIBGENERIC_SUPPORT=y
CONFIG_TARGET_MX6CUBOXI=y
@@ -9,6 +9,7 @@ CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0xFE000
CONFIG_DM_GPIO=y
CONFIG_SPL_MMC_SUPPORT=y
+CONFIG_SPL_FORCE_MMC_BOOT=y
CONFIG_SPL_SERIAL_SUPPORT=y
CONFIG_ENV_SIZE=0x2000
CONFIG_ENV_OFFSET=0xFE000
CONFIG_NR_DRAM_BANKS=1
CONFIG_SPL=y

4
package/boot/uboot-sunxi/Makefile
View File

@ -9,9 +9,9 @@
include $(TOPDIR)/rules.mk
include $(INCLUDE_DIR)/kernel.mk
PKG_VERSION:=2020.01
PKG_VERSION:=2020.04
PKG_HASH:=aa453c603208b1b27bd03525775a7f79b443adec577fdc6e8f06974025a135f1
PKG_HASH:=fe732aaf037d9cc3c0909bad8362af366ae964bbdac6913a34081ff4ad565372
PKG_MAINTAINER:=Zoltan HERPAI <wigyori@uid0.hu>

4
package/boot/uboot-sunxi/patches/003-add-theobroma-a31-pangolin.patch
View File

@ -1,6 +1,6 @@
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -446,6 +446,7 @@ dtb-$(CONFIG_MACH_SUN6I) += \
@@ -455,6 +455,7 @@ dtb-$(CONFIG_MACH_SUN6I) += \
sun6i-a31-m9.dtb \
sun6i-a31-mele-a1000g-quad.dtb \
sun6i-a31-mixtile-loftq.dtb \
@ -358,7 +358,7 @@
+CONFIG_SUNXI_SPI=y
--- a/arch/arm/mach-sunxi/Kconfig
+++ b/arch/arm/mach-sunxi/Kconfig
@@ -895,6 +895,14 @@ config VIDEO_LCD_PANEL_I2C_SCL
@@ -896,6 +896,14 @@ config VIDEO_LCD_PANEL_I2C_SCL
Set the SCL pin for the LCD i2c interface. This takes a string in the
format understood by sunxi_name_to_gpio, e.g. PH1 for pin 1 of port H.

2
package/boot/uboot-sunxi/patches/062-A20-improve-gmac-upload.patch
View File

@ -2,7 +2,7 @@
--- a/configs/A20-OLinuXino-Lime2_defconfig
+++ b/configs/A20-OLinuXino-Lime2_defconfig
@@ -26,6 +26,7 @@ CONFIG_ETH_DESIGNWARE=y
@@ -22,6 +22,7 @@ CONFIG_ETH_DESIGNWARE=y
CONFIG_RGMII=y
CONFIG_MII=y
CONFIG_SUN7I_GMAC=y

4
package/boot/uboot-sunxi/patches/063-fix-lime2-revK-add-micrel-PHY.patch
View File

@ -1,6 +1,6 @@
--- a/configs/A20-OLinuXino-Lime2-eMMC_defconfig
+++ b/configs/A20-OLinuXino-Lime2-eMMC_defconfig
@@ -9,6 +9,8 @@ CONFIG_MMC_SUNXI_SLOT_EXTRA=2
@@ -8,6 +8,8 @@ CONFIG_MMC_SUNXI_SLOT_EXTRA=2
CONFIG_USB0_VBUS_PIN="PC17"
CONFIG_USB0_VBUS_DET="PH5"
CONFIG_I2C1_ENABLE=y
@ -11,7 +11,7 @@
CONFIG_AHCI=y
--- a/configs/A20-OLinuXino-Lime2_defconfig
+++ b/configs/A20-OLinuXino-Lime2_defconfig
@@ -8,6 +8,8 @@ CONFIG_MMC0_CD_PIN="PH1"
@@ -7,6 +7,8 @@ CONFIG_MMC0_CD_PIN="PH1"
CONFIG_USB0_VBUS_PIN="PC17"
CONFIG_USB0_VBUS_DET="PH5"
CONFIG_I2C1_ENABLE=y

2
package/boot/uboot-sunxi/patches/102-sunxi-make_CONS_INDEX-configurable.patch
View File

@ -6,7 +6,7 @@ Subject: ARM: sunxi: Make CONS_INDEX configurable
--- a/arch/arm/mach-sunxi/Kconfig
+++ b/arch/arm/mach-sunxi/Kconfig
@@ -558,6 +558,14 @@ config SYS_BOARD
@@ -559,6 +559,14 @@ config SYS_BOARD
config SYS_SOC
default "sunxi"

2
package/boot/uboot-sunxi/patches/200-mkimage-check-environment-for-dtc-binary-location.patch
View File

@ -17,7 +17,7 @@ Cc: Simon Glass <sjg@chromium.org>
--- a/tools/fit_image.c
+++ b/tools/fit_image.c
@@ -662,9 +662,14 @@ static int fit_handle_file(struct image_
@@ -726,9 +726,14 @@ static int fit_handle_file(struct image_
}
*cmd = '\0';
} else if (params->datafile) {

4
package/boot/uboot-sunxi/patches/210-sunxi-deactivate-binman.patch
View File

@ -12,7 +12,7 @@ old way of generating images.
--- a/Makefile
+++ b/Makefile
@@ -1525,8 +1525,10 @@ endif
@@ -1555,8 +1555,10 @@ endif
ifneq ($(CONFIG_ARCH_SUNXI),)
ifeq ($(CONFIG_ARM64),)
@ -27,7 +27,7 @@ old way of generating images.
$(call if_changed,cat)
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -945,7 +945,6 @@ config ARCH_SOCFPGA
@@ -962,7 +962,6 @@ config ARCH_SOCFPGA
config ARCH_SUNXI
bool "Support sunxi (Allwinner) SoCs"

6
package/boot/uboot-sunxi/patches/230-disable-axp209-on-a13-olinuxino.diff
View File

@ -1,6 +1,6 @@
--- a/configs/A13-OLinuXino_defconfig
+++ b/configs/A13-OLinuXino_defconfig
@@ -8,7 +8,6 @@ CONFIG_DRAM_EMR1=0
@@ -7,7 +7,6 @@ CONFIG_DRAM_EMR1=0
CONFIG_MMC0_CD_PIN="PG0"
CONFIG_USB0_VBUS_DET="PG1"
CONFIG_USB1_VBUS_PIN="PG11"
@ -8,8 +8,8 @@
# CONFIG_VIDEO_HDMI is not set
CONFIG_VIDEO_VGA_VIA_LCD=y
CONFIG_VIDEO_VGA_VIA_LCD_FORCE_SYNC_ACTIVE_HIGH=y
@@ -25,7 +24,7 @@ CONFIG_DEFAULT_DEVICE_TREE="sun5i-a13-ol
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
@@ -21,7 +20,7 @@ CONFIG_CMD_USB_MASS_STORAGE=y
CONFIG_DEFAULT_DEVICE_TREE="sun5i-a13-olinuxino"
CONFIG_DFU_RAM=y
CONFIG_FASTBOOT_CMD_OEM_FORMAT=y
-CONFIG_AXP_ALDO3_VOLT=3300

29
package/boot/uboot-sunxi/patches/260-configs-a64-olinuxino-emmc-add-eMMC-boot-part-config.patch
View File

@ -1,29 +0,0 @@
From 7fa26c287b225c5e42be6d1a81d45592ec45bd9c Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Petr=20=C5=A0tetiar?= <ynezz@true.cz>
Date: Wed, 18 Mar 2020 12:59:01 +0100
Subject: [PATCH] configs: a64-olinuxino-emmc: add eMMC boot part config
commands
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
mmc bootbus and partconf commands are needed in order to be able to
configure booting from separate boot0/boot1 eMMC partitions.
Signed-off-by: Petr Štetiar <ynezz@true.cz>
---
configs/a64-olinuxino-emmc_defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/configs/a64-olinuxino-emmc_defconfig b/configs/a64-olinuxino-emmc_defconfig
index 8443a6dae9e3..9a96a964b1dc 100644
--- a/configs/a64-olinuxino-emmc_defconfig
+++ b/configs/a64-olinuxino-emmc_defconfig
@@ -12,6 +12,7 @@ CONFIG_USE_PREBOOT=y
CONFIG_DEFAULT_DEVICE_TREE="sun50i-a64-olinuxino-emmc"
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
CONFIG_SUN8I_EMAC=y
+CONFIG_SUPPORT_EMMC_BOOT=y
CONFIG_USB_EHCI_HCD=y
CONFIG_USB_OHCI_HCD=y
CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE=y

2
package/kernel/mac80211/Makefile
View File

@ -11,7 +11,7 @@ include $(INCLUDE_DIR)/kernel.mk
PKG_NAME:=mac80211
PKG_VERSION:=5.4.27-1
PKG_RELEASE:=2
PKG_RELEASE:=3
PKG_SOURCE_URL:=@KERNEL/linux/kernel/projects/backports/stable/v5.4.27/
PKG_HASH:=4c853a2f4c4fcc81cf60a3d59c5efbdb60c3e4acda22996cb192443581753950

28
package/kernel/mac80211/files/lib/netifd/wireless/mac80211.sh
View File

@ -440,22 +440,23 @@ mac80211_iw_interface_add() {
local type="$3"
local wdsflag="$4"
local rc
local oldifname
iw phy "$phy" interface add "$ifname" type "$type" $wdsflag
iw phy "$phy" interface add "$ifname" type "$type" $wdsflag >/dev/null 2>&1
rc="$?"
[ "$rc" = 233 ] && {
# Device might have just been deleted, give the kernel some time to finish cleaning it up
sleep 1
iw phy "$phy" interface add "$ifname" type "$type" $wdsflag
iw phy "$phy" interface add "$ifname" type "$type" $wdsflag >/dev/null 2>&1
rc="$?"
}
[ "$rc" = 233 ] && {
# Keep matching pre-existing interface
[ -d "/sys/class/ieee80211/${phy}/device/net/${ifname}" ] && \
case "$(iw dev wlan0 info | grep "^\ttype" | cut -d' ' -f2- 2>/dev/null)" in
case "$(iw dev $ifname info | grep "^\ttype" | cut -d' ' -f2- 2>/dev/null)" in
"AP")
[ "$type" = "__ap" ] && rc=0
;;
@ -475,17 +476,26 @@ mac80211_iw_interface_add() {
}
[ "$rc" = 233 ] && {
iw dev "$ifname" del
sleep 1
iw dev "$ifname" del >/dev/null 2>&1
[ "$?" = 0 ] && {
sleep 1
iw phy "$phy" interface add "$ifname" type "$type" $wdsflag
rc="$?"
iw phy "$phy" interface add "$ifname" type "$type" $wdsflag >/dev/null 2>&1
rc="$?"
}
}
[ "$rc" = 233 ] && {
[ "$rc" != 0 ] && {
# Device might not support virtual interfaces, so the interface never got deleted in the first place.
# Check if the interface already exists, and avoid failing in this case.
ip link show dev "$ifname" >/dev/null 2>/dev/null && rc=0
[ -d "/sys/class/ieee80211/${phy}/device/net/${ifname}" ] && rc=0
}
[ "$rc" != 0 ] && {
# Device doesn't support virtual interfaces and may have existing interface other than ifname.
oldifname="$(basename "/sys/class/ieee80211/${phy}/device/net"/* 2>/dev/null)"
[ "$oldifname" ] && ip link set "$oldifname" name "$ifname" 1>/dev/null 2>&1
rc="$?"
}
[ "$rc" != 0 ] && wireless_setup_failed INTERFACE_CREATION_FAILED

148
package/kernel/mac80211/patches/subsys/314-mac80211-drop-data-frames-without-key-on-encrypted-l.patch Normal file
View File

@ -0,0 +1,148 @@
From a0761a301746ec2d92d7fcb82af69c0a6a4339aa Mon Sep 17 00:00:00 2001
From: Johannes Berg <johannes.berg@intel.com>
Date: Thu, 26 Mar 2020 15:09:42 +0200
Subject: mac80211: drop data frames without key on encrypted links
If we know that we have an encrypted link (based on having had
a key configured for TX in the past) then drop all data frames
in the key selection handler if there's no key anymore.
This fixes an issue with mac80211 internal TXQs - there we can
buffer frames for an encrypted link, but then if the key is no
longer there when they're dequeued, the frames are sent without
encryption. This happens if a station is disconnected while the
frames are still on the TXQ.
Detecting that a link should be encrypted based on a first key
having been configured for TX is fine as there are no use cases
for a connection going from with encryption to no encryption.
With extended key IDs, however, there is a case of having a key
configured for only decryption, so we can't just trigger this
behaviour on a key being configured.
Cc: stable@vger.kernel.org
Reported-by: Jouni Malinen <j@w1.fi>
Signed-off-by: Johannes Berg <johannes.berg@intel.com>
Signed-off-by: Luca Coelho <luciano.coelho@intel.com>
---
net/mac80211/debugfs_sta.c | 3 ++-
net/mac80211/key.c | 20 ++++++++++++--------
net/mac80211/sta_info.h | 1 +
net/mac80211/tx.c | 12 +++++++++---
4 files changed, 24 insertions(+), 12 deletions(-)
--- a/net/mac80211/debugfs_sta.c
+++ b/net/mac80211/debugfs_sta.c
@@ -5,7 +5,7 @@
* Copyright 2007 Johannes Berg <johannes@sipsolutions.net>
* Copyright 2013-2014 Intel Mobile Communications GmbH
* Copyright(c) 2016 Intel Deutschland GmbH
- * Copyright (C) 2018 - 2019 Intel Corporation
+ * Copyright (C) 2018 - 2020 Intel Corporation
*/
#include <linux/debugfs.h>
@@ -78,6 +78,7 @@ static const char * const sta_flag_names
FLAG(MPSP_OWNER),
FLAG(MPSP_RECIPIENT),
FLAG(PS_DELIVER),
+ FLAG(USES_ENCRYPTION),
#undef FLAG
};
--- a/net/mac80211/key.c
+++ b/net/mac80211/key.c
@@ -6,7 +6,7 @@
* Copyright 2007-2008 Johannes Berg <johannes@sipsolutions.net>
* Copyright 2013-2014 Intel Mobile Communications GmbH
* Copyright 2015-2017 Intel Deutschland GmbH
- * Copyright 2018-2019 Intel Corporation
+ * Copyright 2018-2020 Intel Corporation
*/
#include <linux/if_ether.h>
@@ -262,22 +262,29 @@ static void ieee80211_key_disable_hw_acc
sta ? sta->sta.addr : bcast_addr, ret);
}
-int ieee80211_set_tx_key(struct ieee80211_key *key)
+static int _ieee80211_set_tx_key(struct ieee80211_key *key, bool force)
{
struct sta_info *sta = key->sta;
struct ieee80211_local *local = key->local;
assert_key_lock(local);
+ set_sta_flag(sta, WLAN_STA_USES_ENCRYPTION);
+
sta->ptk_idx = key->conf.keyidx;
- if (!ieee80211_hw_check(&local->hw, AMPDU_KEYBORDER_SUPPORT))
+ if (force || !ieee80211_hw_check(&local->hw, AMPDU_KEYBORDER_SUPPORT))
clear_sta_flag(sta, WLAN_STA_BLOCK_BA);
ieee80211_check_fast_xmit(sta);
return 0;
}
+int ieee80211_set_tx_key(struct ieee80211_key *key)
+{
+ return _ieee80211_set_tx_key(key, false);
+}
+
static void ieee80211_pairwise_rekey(struct ieee80211_key *old,
struct ieee80211_key *new)
{
@@ -441,11 +448,8 @@ static int ieee80211_key_replace(struct
if (pairwise) {
rcu_assign_pointer(sta->ptk[idx], new);
if (new &&
- !(new->conf.flags & IEEE80211_KEY_FLAG_NO_AUTO_TX)) {
- sta->ptk_idx = idx;
- clear_sta_flag(sta, WLAN_STA_BLOCK_BA);
- ieee80211_check_fast_xmit(sta);
- }
+ !(new->conf.flags & IEEE80211_KEY_FLAG_NO_AUTO_TX))
+ _ieee80211_set_tx_key(new, true);
} else {
rcu_assign_pointer(sta->gtk[idx], new);
}
--- a/net/mac80211/sta_info.h
+++ b/net/mac80211/sta_info.h
@@ -98,6 +98,7 @@ enum ieee80211_sta_info_flags {
WLAN_STA_MPSP_OWNER,
WLAN_STA_MPSP_RECIPIENT,
WLAN_STA_PS_DELIVER,
+ WLAN_STA_USES_ENCRYPTION,
NUM_WLAN_STA_FLAGS,
};
--- a/net/mac80211/tx.c
+++ b/net/mac80211/tx.c
@@ -590,10 +590,13 @@ ieee80211_tx_h_select_key(struct ieee802
struct ieee80211_tx_info *info = IEEE80211_SKB_CB(tx->skb);
struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)tx->skb->data;
- if (unlikely(info->flags & IEEE80211_TX_INTFL_DONT_ENCRYPT))
+ if (unlikely(info->flags & IEEE80211_TX_INTFL_DONT_ENCRYPT)) {
tx->key = NULL;
- else if (tx->sta &&
- (key = rcu_dereference(tx->sta->ptk[tx->sta->ptk_idx])))
+ return TX_CONTINUE;
+ }
+
+ if (tx->sta &&
+ (key = rcu_dereference(tx->sta->ptk[tx->sta->ptk_idx])))
tx->key = key;
else if (ieee80211_is_group_privacy_action(tx->skb) &&
(key = rcu_dereference(tx->sdata->default_multicast_key)))
@@ -654,6 +657,9 @@ ieee80211_tx_h_select_key(struct ieee802
if (!skip_hw && tx->key &&
tx->key->flags & KEY_FLAG_UPLOADED_TO_HARDWARE)
info->control.hw_key = &tx->key->conf;
+ } else if (!ieee80211_is_mgmt(hdr->frame_control) && tx->sta &&
+ test_sta_flag(tx->sta, WLAN_STA_USES_ENCRYPTION)) {
+ return TX_DROP;
}
return TX_CONTINUE;

59
package/libs/elfutils/patches/006-Fix-build-on-aarch64-musl.patch Normal file
View File

@ -0,0 +1,59 @@
From 578f370c7e7a9f056aefa062b34590b0aa13bce5 Mon Sep 17 00:00:00 2001
From: Hongxu Jia <hongxu.jia@windriver.com>
Date: Tue, 15 Aug 2017 17:27:30 +0800
Subject: [PATCH] Fix build on aarch64/musl
Errors
invalid operands to binary & (have 'long double' and 'unsigned int')
error: redefinition
of 'struct iovec'
struct iovec { void *iov_base; size_t iov_len; };
^
Upstream-Status: Pending
Signed-off-by: Khem Raj <raj.khem@gmail.com>
Rebase to 0.170
Signed-off-by: Hongxu Jia <hongxu.jia@windriver.com>
---
backends/aarch64_initreg.c | 4 ++--
backends/arm_initreg.c | 2 +-
2 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/backends/aarch64_initreg.c b/backends/aarch64_initreg.c
index daf6f37..6445276 100644
--- a/backends/aarch64_initreg.c
+++ b/backends/aarch64_initreg.c
@@ -33,7 +33,7 @@
#include "system.h"
#include <assert.h>
#if defined(__aarch64__) && defined(__linux__)
-# include <linux/uio.h>
+# include <sys/uio.h>
# include <sys/user.h>
# include <sys/ptrace.h>
/* Deal with old glibc defining user_pt_regs instead of user_regs_struct. */
@@ -82,7 +82,7 @@ aarch64_set_initial_registers_tid (pid_t tid __attribute__ ((unused)),
Dwarf_Word dwarf_fregs[32];
for (int r = 0; r < 32; r++)
- dwarf_fregs[r] = fregs.vregs[r] & 0xFFFFFFFF;
+ dwarf_fregs[r] = (unsigned int)fregs.vregs[r] & 0xFFFFFFFF;
if (! setfunc (64, 32, dwarf_fregs, arg))
return false;
diff --git a/backends/arm_initreg.c b/backends/arm_initreg.c
index efcabaf..062bb9e 100644
--- a/backends/arm_initreg.c
+++ b/backends/arm_initreg.c
@@ -38,7 +38,7 @@
#endif
#ifdef __aarch64__
-# include <linux/uio.h>
+# include <sys/uio.h>
# include <sys/user.h>
# include <sys/ptrace.h>
/* Deal with old glibc defining user_pt_regs instead of user_regs_struct. */

3
target/linux/ath79/dts/ar724x.dtsi
View File

@ -130,6 +130,9 @@
interrupt-parent = <&cpuintc>;
interrupts = <2>;
resets = <&rst 6>, <&rst 7>;
reset-names = "hc", "phy";
interrupt-controller;
#interrupt-cells = <1>;

3
target/linux/ath79/dts/ar9344.dtsi
View File

@ -46,6 +46,9 @@
interrupt-parent = <&intc2>;
interrupts = <1>;
resets = <&rst 6>, <&rst 7>;
reset-names = "hc", "phy";
interrupt-controller;
#interrupt-cells = <1>;

3
target/linux/ath79/dts/qca953x.dtsi
View File

@ -164,6 +164,9 @@
interrupt-parent = <&intc2>;
interrupts = <1>;
resets = <&rst 6>, <&rst 7>;
reset-names = "hc", "phy";
interrupt-controller;
#interrupt-cells = <1>;

195
target/linux/ath79/dts/qca9556_avm_fritz1750e.dts Normal file
View File

@ -0,0 +1,195 @@
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/dts-v1/;
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include "qca9557.dtsi"
/ {
compatible = "avm,fritz1750e", "qca,qca9557";
model = "AVM FRITZ!WLAN Repeater 1750E";
chosen {
bootargs = "console=ttyS0,115200n8";
};
aliases {
led-boot = &led_power;
led-failsafe = &led_power;
led-running = &led_power;
led-upgrade = &led_power;
};
led_spi {
compatible = "spi-gpio";
#address-cells = <1>;
#size-cells = <0>;
sck-gpios = <&gpio 14 GPIO_ACTIVE_HIGH>;
mosi-gpios = <&gpio 15 GPIO_ACTIVE_HIGH>;
num-chipselects = <0>;
spi_gpio: led_gpio@0 {
compatible = "fairchild,74hc595";
reg = <0>;
gpio-controller;
#gpio-cells = <2>;
registers-number = <1>;
spi-max-frequency = <10000000>;
gpio_latch_bit {
gpio-hog;
gpios = <7 GPIO_ACTIVE_HIGH>;
output-high;
line-name = "gpio-latch-bit";
};
};
};
leds {
compatible = "gpio-leds";
led_power: power {
label = "fritz1750e:green:power";
gpios = <&spi_gpio 6 GPIO_ACTIVE_HIGH>;
};
wlan {
label = "fritz1750e:green:wlan";
gpios = <&spi_gpio 5 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "phy1tpt";
};
lan {
label = "fritz1750e:green:lan";
gpios = <&gpio 13 GPIO_ACTIVE_HIGH>;
};
rssi0 {
label = "fritz1750e:green:rssi0";
gpios = <&spi_gpio 0 GPIO_ACTIVE_HIGH>;
};
rssi1 {
label = "fritz1750e:green:rssi1";
gpios = <&spi_gpio 1 GPIO_ACTIVE_HIGH>;
};
rssi2 {
label = "fritz1750e:green:rssi2";
gpios = <&spi_gpio 2 GPIO_ACTIVE_HIGH>;
};
rssi3 {
label = "fritz1750e:green:rssi3";
gpios = <&spi_gpio 3 GPIO_ACTIVE_HIGH>;
};
rssi4 {
label = "fritz1750e:green:rssi4";
gpios = <&spi_gpio 4 GPIO_ACTIVE_HIGH>;
};
};
keys {
compatible = "gpio-keys";
wps {
label = "wps";
linux,code = <KEY_WPS_BUTTON>;
gpios = <&gpio 4 GPIO_ACTIVE_HIGH>;
};
};
};
&pcie0 {
status = "okay";
};
&uart {
status = "okay";
};
&spi {
status = "okay";
num-cs = <1>;
flash@0 {
compatible = "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <25000000>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "urlader";
reg = <0x0 0x20000>;
read-only;
};
partition@20000 {
compatible = "avm,eva-firmware";
label = "firmware";
reg = <0x20000 0xee0000>;
};
partition@f00000 {
label = "tffs (1)";
reg = <0xf00000 0x80000>;
read-only;
};
partition@f80000 {
label = "tffs (2)";
reg = <0xf80000 0x80000>;
read-only;
};
};
};
};
&gpio {
reset-pcie-ep {
gpio-hog;
gpios = <17 GPIO_ACTIVE_HIGH>;
output-high;
line-name = "PCIE EP reset";
};
reset-pcie {
gpio-hog;
gpios = <18 GPIO_ACTIVE_HIGH>;
output-high;
line-name = "PCIE Bus reset";
};
};
&wmac {
status = "okay";
qca,no-eeprom;
};
&eth1 {
status = "okay";
phy-handle = <&phy0>;
pll-data = <0x3000000 0x101 0x1313>;
gmac-config {
device = <&gmac>;
ge0-sgmii = <0>;
};
};
&mdio1 {
status = "okay";
phy0: ethernet-phy@0 {
reg = <0>;
reset-gpios = <&gpio 11 GPIO_ACTIVE_LOW>;
};
};

10
target/linux/ath79/dts/qca9557.dtsi
View File

@ -202,7 +202,7 @@
};
pcie0: pcie-controller@180c0000 {
compatible = "qcom,ar7240-pci";
compatible = "qcom,qca9550-pci", "qcom,ar7240-pci";
#address-cells = <3>;
#size-cells = <2>;
bus-range = <0x0 0x0>;
@ -215,6 +215,9 @@
interrupt-parent = <&intc2>;
interrupts = <1>;
resets = <&rst 6>, <&rst 7>;
reset-names = "hc", "phy";
interrupt-controller;
#interrupt-cells = <1>;
@ -234,7 +237,7 @@
};
pcie1: pcie-controller@18250000 {
compatible = "qcom,ar7240-pci";
compatible = "qcom,qca9550-pci", "qcom,ar7240-pci";
#address-cells = <3>;
#size-cells = <2>;
bus-range = <0x0 0x0>;
@ -247,6 +250,9 @@
interrupt-parent = <&intc3>;
interrupts = <0>;
resets = <&rst2 6>, <&rst2 7>;
reset-names = "hc", "phy";
interrupt-controller;
#interrupt-cells = <1>;

3
target/linux/ath79/dts/qca956x.dtsi
View File

@ -168,6 +168,9 @@
interrupt-parent = <&intc3>;
interrupts = <0>;
resets = <&rst 6>, <&rst 7>;
reset-names = "hc", "phy";
interrupt-controller;
#interrupt-cells = <1>;

9
target/linux/ath79/generic/base-files/etc/board.d/01_leds
View File

@ -15,6 +15,15 @@ case "$board" in
alfa-network,ap121f)
ucidef_set_led_netdev "lan" "LAN" "$boardname:green:lan" "eth0"
;;
avm,fritz1750e)
ucidef_set_led_netdev "lan" "LAN" "$boardname:green:lan" "eth0"
ucidef_set_rssimon "wlan1" "200000" "1"
ucidef_set_led_rssi "rssilow" "RSSILOW" "$boardname:green:rssi0" "wlan1" "1" "100"
ucidef_set_led_rssi "rssimediumlow" "RSSIMEDIUMLOW" "$boardname:green:rssi1" "wlan1" "20" "100"
ucidef_set_led_rssi "rssimedium" "RSSIMEDIUM" "$boardname:green:rssi2" "wlan1" "40" "100"
ucidef_set_led_rssi "rssimediumhigh" "RSSIMEDIUMHIGH" "$boardname:green:rssi3" "wlan1" "60" "100"
ucidef_set_led_rssi "rssihigh" "RSSIHIGH" "$boardname:green:rssi4" "wlan1" "80" "100"
;;
avm,fritz300e)
ucidef_set_led_netdev "lan" "LAN" "$boardname:green:lan" "eth0"
ucidef_set_rssimon "wlan0" "200000" "1"

4
target/linux/ath79/generic/base-files/etc/board.d/02_network
View File

@ -13,6 +13,7 @@ ath79_setup_interfaces()
adtran,bsap1840|\
alfa-network,ap121f|\
aruba,ap-105|\
avm,fritz1750e|\
avm,fritz300e|\
comfast,cf-wr752ac-v1|\
devolo,dvl1200i|\
@ -337,6 +338,9 @@ ath79_setup_macs()
alfa-network,ap121f)
label_mac=$(mtd_get_mac_binary art 0x1002)
;;
avm,fritz1750e)
label_mac=$(fritz_tffs -n macwlan -i $(find_mtd_part "tffs (1)"))
;;
avm,fritz300e)
lan_mac=$(fritz_tffs -n maca -i $(find_mtd_part "tffs (1)"))
label_mac=$(fritz_tffs -n macwlan -i $(find_mtd_part "tffs (1)"))

1
target/linux/ath79/generic/base-files/etc/hotplug.d/firmware/10-ath9k-eeprom
View File

@ -9,6 +9,7 @@ board=$(board_name)
case "$FIRMWARE" in
"ath9k-eeprom-ahb-18100000.wmac.bin")
case $board in
avm,fritz1750e|\
avm,fritz4020)
caldata_extract_reverse "urlader" 0x1541 0x440
;;

3
target/linux/ath79/generic/base-files/etc/hotplug.d/firmware/11-ath10k-caldata
View File

@ -10,6 +10,9 @@ board=$(board_name)
case "$FIRMWARE" in
"ath10k/cal-pci-0000:00:00.0.bin")
case $board in
avm,fritz1750e)
caldata_extract "urlader" 0x198a 0x844
;;
comfast,cf-wr650ac-v1|\
comfast,cf-wr650ac-v2|\
devolo,magic-2-wifi|\

3
target/linux/ath79/generic/base-files/lib/preinit/10_fix_eth_mac.sh
View File

@ -4,6 +4,9 @@
preinit_set_mac_address() {
case $(board_name) in
avm,fritz1750e)
ip link set dev eth0 address $(fritz_tffs -n maca -i $(find_mtd_part "tffs (1)"))
;;
siemens,ws-ap3610)
ip link set dev eth0 address $(mtd_get_mac_ascii cfg1 ethaddr)
;;

47
target/linux/ath79/image/generic.mk
View File

@ -162,32 +162,41 @@ define Device/aruba_ap-105
endef
TARGET_DEVICES += aruba_ap-105
define Device/avm_fritz300e
SOC := ar7242
define Device/avm
DEVICE_VENDOR := AVM
DEVICE_MODEL := FRITZ!WLAN Repeater 300E
KERNEL := kernel-bin | append-dtb | lzma | eva-image
KERNEL_INITRAMFS := $$(KERNEL)
IMAGE_SIZE := 15232k
IMAGE/sysupgrade.bin := append-kernel | pad-to 64k | \
append-squashfs-fakeroot-be | pad-to 256 | append-rootfs | pad-rootfs | \
append-metadata | check-size
DEVICE_PACKAGES := fritz-tffs rssileds -swconfig
SUPPORTED_DEVICES += fritz300e
endef
TARGET_DEVICES += avm_fritz300e
define Device/avm_fritz4020
SOC := qca9561
DEVICE_VENDOR := AVM
DEVICE_MODEL := FRITZ!Box 4020
IMAGE_SIZE := 15232k
KERNEL := kernel-bin | append-dtb | lzma | eva-image
KERNEL_INITRAMFS := $$(KERNEL)
IMAGE/sysupgrade.bin := append-kernel | pad-to 64k | \
append-squashfs-fakeroot-be | pad-to 256 | append-rootfs | pad-rootfs | \
append-metadata | check-size
DEVICE_PACKAGES := fritz-tffs
endef
define Device/avm_fritz1750e
$(Device/avm)
SOC := qca9556
IMAGE_SIZE := 15232k
DEVICE_MODEL := FRITZ!WLAN Repeater 1750E
DEVICE_PACKAGES += rssileds kmod-ath10k-ct-smallbuffers \
ath10k-firmware-qca988x-ct -swconfig
endef
TARGET_DEVICES += avm_fritz1750e
define Device/avm_fritz300e
$(Device/avm)
SOC := ar7242
IMAGE_SIZE := 15232k
DEVICE_MODEL := FRITZ!WLAN Repeater 300E
DEVICE_PACKAGES += rssileds -swconfig
SUPPORTED_DEVICES += fritz300e
endef
TARGET_DEVICES += avm_fritz300e
define Device/avm_fritz4020
$(Device/avm)
SOC := qca9561
IMAGE_SIZE := 15232k
DEVICE_MODEL := FRITZ!Box 4020
SUPPORTED_DEVICES += fritz4020
endef
TARGET_DEVICES += avm_fritz4020

130
target/linux/ath79/patches-4.19/0062-MIPS-pci-ar724x-add-QCA9550-reset-sequence.patch Normal file
View File

@ -0,0 +1,130 @@
From: David Bauer <mail@david-bauer.net>
Date: Sat, 11 Apr 2020 14:03:12 +0200
Subject: MIPS: pci-ar724x: add QCA9550 reset sequence
The QCA9550 family of SoCs have a slightly different reset
sequence compared to older chips.
Normally the bootloader performs this sequence, however
some bootloader implementation expect the operating system
to clear the reset.
Also get the resets from OF to support handling of the second
PCIe root-complex on the QCA9558.
Signed-off-by: David Bauer <mail@david-bauer.net>
--- a/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
+++ b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
@@ -394,6 +394,7 @@
#define QCA955X_PLL_CPU_CONFIG_REG 0x00
#define QCA955X_PLL_DDR_CONFIG_REG 0x04
#define QCA955X_PLL_CLK_CTRL_REG 0x08
+#define QCA955X_PLL_PCIE_CONFIG_REG 0x0c
#define QCA955X_PLL_ETH_XMII_CONTROL_REG 0x28
#define QCA955X_PLL_ETH_SGMII_CONTROL_REG 0x48
#define QCA955X_PLL_ETH_SGMII_SERDES_REG 0x4c
@@ -479,6 +480,9 @@
#define QCA956X_PLL_CLK_CTRL_CPU_DDRCLK_FROM_CPUPLL BIT(21)
#define QCA956X_PLL_CLK_CTRL_AHBCLK_FROM_DDRPLL BIT(24)
+#define QCA955X_PLL_PCIE_CONFIG_PLL_PWD BIT(30)
+#define QCA955X_PLL_PCIE_CONFIG_PLL_BYPASS BIT(16)
+
#define QCA956X_PLL_SWITCH_CLOCK_SPARE_I2C_CLK_SELB BIT(5)
#define QCA956X_PLL_SWITCH_CLOCK_SPARE_MDIO_CLK_SEL0_1 BIT(6)
#define QCA956X_PLL_SWITCH_CLOCK_SPARE_UART1_CLK_SEL BIT(7)
--- a/arch/mips/pci/pci-ar724x.c
+++ b/arch/mips/pci/pci-ar724x.c
@@ -11,6 +11,7 @@
#include <linux/irq.h>
#include <linux/pci.h>
+#include <linux/reset.h>
#include <linux/init.h>
#include <linux/delay.h>
#include <linux/platform_device.h>
@@ -58,6 +59,9 @@ struct ar724x_pci_controller {
struct irq_domain *domain;
struct resource io_res;
struct resource mem_res;
+
+ struct reset_control *hc_reset;
+ struct reset_control *phy_reset;
};
static struct irq_chip ar724x_pci_irq_chip;
@@ -343,18 +347,30 @@ static void ar724x_pci_hw_init(struct ar
int wait = 0;
/* deassert PCIe host controller and PCIe PHY reset */
- ath79_device_reset_clear(AR724X_RESET_PCIE);
- ath79_device_reset_clear(AR724X_RESET_PCIE_PHY);
+ reset_control_deassert(apc->hc_reset);
+ reset_control_deassert(apc->phy_reset);
- /* remove the reset of the PCIE PLL */
- ppl = ath79_pll_rr(AR724X_PLL_REG_PCIE_CONFIG);
- ppl &= ~AR724X_PLL_REG_PCIE_CONFIG_PPL_RESET;
- ath79_pll_wr(AR724X_PLL_REG_PCIE_CONFIG, ppl);
-
- /* deassert bypass for the PCIE PLL */
- ppl = ath79_pll_rr(AR724X_PLL_REG_PCIE_CONFIG);
- ppl &= ~AR724X_PLL_REG_PCIE_CONFIG_PPL_BYPASS;
- ath79_pll_wr(AR724X_PLL_REG_PCIE_CONFIG, ppl);
+ if (of_device_is_compatible(apc->np, "qcom,qca9550-pci")) {
+ /* remove the reset of the PCIE PLL */
+ ppl = ath79_pll_rr(QCA955X_PLL_PCIE_CONFIG_REG);
+ ppl &= ~QCA955X_PLL_PCIE_CONFIG_PLL_PWD;
+ ath79_pll_wr(QCA955X_PLL_PCIE_CONFIG_REG, ppl);
+
+ /* deassert bypass for the PCIE PLL */
+ ppl = ath79_pll_rr(QCA955X_PLL_PCIE_CONFIG_REG);
+ ppl &= ~QCA955X_PLL_PCIE_CONFIG_PLL_BYPASS;
+ ath79_pll_wr(QCA955X_PLL_PCIE_CONFIG_REG, ppl);
+ } else {
+ /* remove the reset of the PCIE PLL */
+ ppl = ath79_pll_rr(AR724X_PLL_REG_PCIE_CONFIG);
+ ppl &= ~AR724X_PLL_REG_PCIE_CONFIG_PPL_RESET;
+ ath79_pll_wr(AR724X_PLL_REG_PCIE_CONFIG, ppl);
+
+ /* deassert bypass for the PCIE PLL */
+ ppl = ath79_pll_rr(AR724X_PLL_REG_PCIE_CONFIG);
+ ppl &= ~AR724X_PLL_REG_PCIE_CONFIG_PPL_BYPASS;
+ ath79_pll_wr(AR724X_PLL_REG_PCIE_CONFIG, ppl);
+ }
/* set PCIE Application Control to ready */
app = __raw_readl(apc->ctrl_base + AR724X_PCI_REG_APP);
@@ -402,6 +418,14 @@ static int ar724x_pci_probe(struct platf
if (apc->irq < 0)
return -EINVAL;
+ apc->hc_reset = devm_reset_control_get_exclusive(&pdev->dev, "hc");
+ if (IS_ERR(apc->hc_reset))
+ return PTR_ERR(apc->hc_reset);
+
+ apc->phy_reset = devm_reset_control_get_exclusive(&pdev->dev, "phy");
+ if (IS_ERR(apc->phy_reset))
+ return PTR_ERR(apc->phy_reset);
+
apc->np = pdev->dev.of_node;
apc->pci_controller.pci_ops = &ar724x_pci_ops;
apc->pci_controller.io_resource = &apc->io_res;
@@ -412,7 +436,7 @@ static int ar724x_pci_probe(struct platf
* Do the full PCIE Root Complex Initialization Sequence if the PCIe
* host controller is in reset.
*/
- if (ath79_reset_rr(AR724X_RESET_REG_RESET_MODULE) & AR724X_RESET_PCIE)
+ if (reset_control_status(apc->hc_reset))
ar724x_pci_hw_init(apc);
apc->link_up = ar724x_pci_check_link(apc);
@@ -430,6 +454,7 @@ static int ar724x_pci_probe(struct platf
static const struct of_device_id ar724x_pci_ids[] = {
{ .compatible = "qcom,ar7240-pci" },
+ { .compatible = "qcom,qca9550-pci" },
{},
};

130
target/linux/ath79/patches-5.4/0062-MIPS-pci-ar724x-add-QCA9550-reset-sequence.patch Normal file
View File

@ -0,0 +1,130 @@
From: David Bauer <mail@david-bauer.net>
Date: Sat, 11 Apr 2020 14:03:12 +0200
Subject: MIPS: pci-ar724x: add QCA9550 reset sequence
The QCA9550 family of SoCs have a slightly different reset
sequence compared to older chips.
Normally the bootloader performs this sequence, however
some bootloader implementation expect the operating system
to clear the reset.
Also get the resets from OF to support handling of the second
PCIe root-complex on the QCA9558.
Signed-off-by: David Bauer <mail@david-bauer.net>
--- a/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
+++ b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
@@ -391,6 +391,7 @@
#define QCA955X_PLL_CPU_CONFIG_REG 0x00
#define QCA955X_PLL_DDR_CONFIG_REG 0x04
#define QCA955X_PLL_CLK_CTRL_REG 0x08
+#define QCA955X_PLL_PCIE_CONFIG_REG 0x0c
#define QCA955X_PLL_ETH_XMII_CONTROL_REG 0x28
#define QCA955X_PLL_ETH_SGMII_CONTROL_REG 0x48
#define QCA955X_PLL_ETH_SGMII_SERDES_REG 0x4c
@@ -476,6 +477,9 @@
#define QCA956X_PLL_CLK_CTRL_CPU_DDRCLK_FROM_CPUPLL BIT(21)
#define QCA956X_PLL_CLK_CTRL_AHBCLK_FROM_DDRPLL BIT(24)
+#define QCA955X_PLL_PCIE_CONFIG_PLL_PWD BIT(30)
+#define QCA955X_PLL_PCIE_CONFIG_PLL_BYPASS BIT(16)
+
#define QCA956X_PLL_SWITCH_CLOCK_SPARE_I2C_CLK_SELB BIT(5)
#define QCA956X_PLL_SWITCH_CLOCK_SPARE_MDIO_CLK_SEL0_1 BIT(6)
#define QCA956X_PLL_SWITCH_CLOCK_SPARE_UART1_CLK_SEL BIT(7)
--- a/arch/mips/pci/pci-ar724x.c
+++ b/arch/mips/pci/pci-ar724x.c
@@ -8,6 +8,7 @@
#include <linux/irq.h>
#include <linux/pci.h>
+#include <linux/reset.h>
#include <linux/init.h>
#include <linux/delay.h>
#include <linux/platform_device.h>
@@ -55,6 +56,9 @@ struct ar724x_pci_controller {
struct irq_domain *domain;
struct resource io_res;
struct resource mem_res;
+
+ struct reset_control *hc_reset;
+ struct reset_control *phy_reset;
};
static struct irq_chip ar724x_pci_irq_chip;
@@ -340,18 +344,30 @@ static void ar724x_pci_hw_init(struct ar
int wait = 0;
/* deassert PCIe host controller and PCIe PHY reset */
- ath79_device_reset_clear(AR724X_RESET_PCIE);
- ath79_device_reset_clear(AR724X_RESET_PCIE_PHY);
+ reset_control_deassert(apc->hc_reset);
+ reset_control_deassert(apc->phy_reset);
- /* remove the reset of the PCIE PLL */
- ppl = ath79_pll_rr(AR724X_PLL_REG_PCIE_CONFIG);
- ppl &= ~AR724X_PLL_REG_PCIE_CONFIG_PPL_RESET;
- ath79_pll_wr(AR724X_PLL_REG_PCIE_CONFIG, ppl);
-
- /* deassert bypass for the PCIE PLL */
- ppl = ath79_pll_rr(AR724X_PLL_REG_PCIE_CONFIG);
- ppl &= ~AR724X_PLL_REG_PCIE_CONFIG_PPL_BYPASS;
- ath79_pll_wr(AR724X_PLL_REG_PCIE_CONFIG, ppl);
+ if (of_device_is_compatible(apc->np, "qcom,qca9550-pci")) {
+ /* remove the reset of the PCIE PLL */
+ ppl = ath79_pll_rr(QCA955X_PLL_PCIE_CONFIG_REG);
+ ppl &= ~QCA955X_PLL_PCIE_CONFIG_PLL_PWD;
+ ath79_pll_wr(QCA955X_PLL_PCIE_CONFIG_REG, ppl);
+
+ /* deassert bypass for the PCIE PLL */
+ ppl = ath79_pll_rr(QCA955X_PLL_PCIE_CONFIG_REG);
+ ppl &= ~QCA955X_PLL_PCIE_CONFIG_PLL_BYPASS;
+ ath79_pll_wr(QCA955X_PLL_PCIE_CONFIG_REG, ppl);
+ } else {
+ /* remove the reset of the PCIE PLL */
+ ppl = ath79_pll_rr(AR724X_PLL_REG_PCIE_CONFIG);
+ ppl &= ~AR724X_PLL_REG_PCIE_CONFIG_PPL_RESET;
+ ath79_pll_wr(AR724X_PLL_REG_PCIE_CONFIG, ppl);
+
+ /* deassert bypass for the PCIE PLL */
+ ppl = ath79_pll_rr(AR724X_PLL_REG_PCIE_CONFIG);
+ ppl &= ~AR724X_PLL_REG_PCIE_CONFIG_PPL_BYPASS;
+ ath79_pll_wr(AR724X_PLL_REG_PCIE_CONFIG, ppl);
+ }
/* set PCIE Application Control to ready */
app = __raw_readl(apc->ctrl_base + AR724X_PCI_REG_APP);
@@ -399,6 +415,14 @@ static int ar724x_pci_probe(struct platf
if (apc->irq < 0)
return -EINVAL;
+ apc->hc_reset = devm_reset_control_get_exclusive(&pdev->dev, "hc");
+ if (IS_ERR(apc->hc_reset))
+ return PTR_ERR(apc->hc_reset);
+
+ apc->phy_reset = devm_reset_control_get_exclusive(&pdev->dev, "phy");
+ if (IS_ERR(apc->phy_reset))
+ return PTR_ERR(apc->phy_reset);
+
apc->np = pdev->dev.of_node;
apc->pci_controller.pci_ops = &ar724x_pci_ops;
apc->pci_controller.io_resource = &apc->io_res;
@@ -409,7 +433,7 @@ static int ar724x_pci_probe(struct platf
* Do the full PCIE Root Complex Initialization Sequence if the PCIe
* host controller is in reset.
*/
- if (ath79_reset_rr(AR724X_RESET_REG_RESET_MODULE) & AR724X_RESET_PCIE)
+ if (reset_control_status(apc->hc_reset))
ar724x_pci_hw_init(apc);
apc->link_up = ar724x_pci_check_link(apc);
@@ -427,6 +451,7 @@ static int ar724x_pci_probe(struct platf
static const struct of_device_id ar724x_pci_ids[] = {
{ .compatible = "qcom,ar7240-pci" },
+ { .compatible = "qcom,qca9550-pci" },
{},
};