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rockchip: refresh rk3588 patchset

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Signed-off-by: Tianling Shen <cnsztl@immortalwrt.org>
This commit is contained in:
Tianling Shen 2023-07-15 16:28:21 +08:00
parent d8b07e76b3
commit cdd8d41166
No known key found for this signature in database
GPG Key ID: 6850B6345C862176
28 changed files with 1202 additions and 195 deletions
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8
target/linux/rockchip/files/arch/arm64/boot/dts/rockchip/rk3588s-nanopi-r6s.dts
View File

@ -265,12 +265,12 @@
vpcie3v3-supply = <&vcc_3v3_pcie20>;
status = "okay";
pcie@30 {
pcie@0,0 {
reg = <0x00300000 0 0 0 0>;
#address-cells = <3>;
#size-cells = <2>;
r8125_u25: pcie@30,0 {
rtl8125_2: pcie@30,0 {
reg = <0x000000 0 0 0 0>;
label = "eth2";
};
@ -282,12 +282,12 @@
vpcie3v3-supply = <&vcc_3v3_pcie20>;
status = "okay";
pcie@40 {
pcie@0,0 {
reg = <0x00400000 0 0 0 0>;
#address-cells = <3>;
#size-cells = <2>;
r8125_u40: pcie@40,0 {
rtl8125_1: pcie@40,0 {
reg = <0x000000 0 0 0 0>;
label = "eth1";
};

20
target/linux/rockchip/patches-6.1/112-01-arm64-dts-rockchip-rk3588-add-USB2-support.patch → target/linux/rockchip/patches-6.1/050-19-v6.6-arm64-dts-rockchip-add-USB2-support-for-rk3588.patch
View File

@ -1,19 +1,21 @@
From c10b7b902f6d8d1b550c6b4ccd8615f407ca85a3 Mon Sep 17 00:00:00 2001
From a684cb416414fdd2b2a33e691119608c0e2eba9f Mon Sep 17 00:00:00 2001
From: Sebastian Reichel <sebastian.reichel@collabora.com>
Date: Thu, 12 Jan 2023 19:20:37 +0100
Subject: [PATCH] arm64: dts: rockchip: rk3588: add USB2 support
Date: Wed, 12 Jul 2023 18:51:03 +0200
Subject: [PATCH] arm64: dts: rockchip: add USB2 support for rk3588
This adds USB2 (EHCI & OHCI) ports including the related PHYs
and GRF modules to the rk3588(s) device tree.
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Link: https://lore.kernel.org/r/20230712165106.65603-2-sebastian.reichel@collabora.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
---
arch/arm64/boot/dts/rockchip/rk3588s.dtsi | 94 +++++++++++++++++++++++
arch/arm64/boot/dts/rockchip/rk3588s.dtsi | 94 +++++++++++++++++++++++++++++++
1 file changed, 94 insertions(+)
--- a/arch/arm64/boot/dts/rockchip/rk3588s.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3588s.dtsi
@@ -832,11 +832,105 @@
@@ -390,6 +390,50 @@
};
};
@ -64,6 +66,8 @@ Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
sys_grf: syscon@fd58c000 {
compatible = "rockchip,rk3588-sys-grf", "syscon";
reg = <0x0 0xfd58c000 0x0 0x1000>;
@@ -410,6 +454,56 @@
reg = <0x0 0xfd5c4000 0x0 0x100>;
};
+ usb2phy2_grf: syscon@fd5d8000 {
@ -116,6 +120,6 @@ Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
+ };
+ };
+
bigcore0_grf: syscon@fd590000 {
compatible = "rockchip,rk3588-bigcore0-grf", "syscon";
reg = <0x0 0xfd590000 0x0 0x100>;
ioc: syscon@fd5f0000 {
compatible = "rockchip,rk3588-ioc", "syscon";
reg = <0x0 0xfd5f0000 0x0 0x10000>;

99
target/linux/rockchip/patches-6.1/112-02-arm64-dts-rockchip-rk3588-evb1-add-USB2.patch → target/linux/rockchip/patches-6.1/051-04-v6.6-arm64-dts-rockchip-add-USB2-to-rk3588-evb1.patch
View File

@ -1,23 +1,46 @@
From 71c7890f2ecefdcd2fd4afeb0d1c0c0b97fe833d Mon Sep 17 00:00:00 2001
From e39da1074c20d4fb1114ccafe07a142df5345a53 Mon Sep 17 00:00:00 2001
From: Sebastian Reichel <sebastian.reichel@collabora.com>
Date: Thu, 12 Jan 2023 19:23:27 +0100
Subject: [PATCH] arm64: dts: rockchip: rk3588-evb1: add USB2
Date: Wed, 12 Jul 2023 18:51:04 +0200
Subject: [PATCH] arm64: dts: rockchip: add USB2 to rk3588-evb1
Enable USB2 (EHCI and OCHI mode) support for the Rockchip RK3588 EVB1.
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Link: https://lore.kernel.org/r/20230712165106.65603-3-sebastian.reichel@collabora.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
---
.../boot/dts/rockchip/rk3588-evb1-v10.dts | 76 +++++++++++++++++++
1 file changed, 76 insertions(+)
arch/arm64/boot/dts/rockchip/rk3588-evb1-v10.dts | 74 ++++++++++++++++++++++++
1 file changed, 74 insertions(+)
--- a/arch/arm64/boot/dts/rockchip/rk3588-evb1-v10.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3588-evb1-v10.dts
@@ -47,6 +47,40 @@
@@ -38,6 +38,20 @@
regulator-max-microvolt = <12000000>;
};
+ vcc5v0_host: vcc5v0-host-regulator {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc5v0_host";
+ regulator-boot-on;
+ regulator-always-on;
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ enable-active-high;
+ gpio = <&gpio4 RK_PB0 GPIO_ACTIVE_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&vcc5v0_host_en>;
+ vin-supply = <&vcc5v0_usb>;
+ };
+
vcc5v0_sys: vcc5v0-sys-regulator {
compatible = "regulator-fixed";
regulator-name = "vcc5v0_sys";
@@ -47,6 +61,26 @@
regulator-max-microvolt = <5000000>;
vin-supply = <&vcc12v_dcin>;
};
+
+ vcc5v0_usbdcin: vcc5v0-usbdcin {
+ vcc5v0_usbdcin: vcc5v0-usbdcin-regulator {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc5v0_usbdcin";
+ regulator-always-on;
@ -27,7 +50,7 @@ Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
+ vin-supply = <&vcc12v_dcin>;
+ };
+
+ vcc5v0_usb: vcc5v0-usb {
+ vcc5v0_usb: vcc5v0-usb-regulator {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc5v0_usb";
+ regulator-always-on;
@ -35,45 +58,49 @@ Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ vin-supply = <&vcc5v0_usbdcin>;
+ };
+
+ vcc5v0_host: vcc5v0-host {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc5v0_host";
+ regulator-boot-on;
+ regulator-always-on;
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ enable-active-high;
+ gpio = <&gpio4 RK_PB0 GPIO_ACTIVE_HIGH>;
+ vin-supply = <&vcc5v0_usb>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&vcc5v0_host_en>;
+ };
};
&combphy0_ps {
@@ -100,6 +134,40 @@
mem-supply = <&vdd_cpu_big1_mem_s0>;
@@ -142,6 +176,12 @@
rockchip,pins = <0 RK_PD4 RK_FUNC_GPIO &pcfg_pull_up>;
};
};
+
+ usb {
+ vcc5v0_host_en: vcc5v0-host-en {
+ rockchip,pins = <4 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
};
&pwm2 {
@@ -768,7 +808,41 @@
status = "okay";
};
+&u2phy2 {
+ status = "okay";
+};
+
+&u2phy3 {
+ status = "okay";
+};
+
+&u2phy2_host {
+ phy-supply = <&vcc5v0_host>;
+ status = "okay";
+};
+
+&u2phy3 {
+ status = "okay";
+};
+
+&u2phy3_host {
+ phy-supply = <&vcc5v0_host>;
+ status = "okay";
+};
+
&uart2 {
pinctrl-0 = <&uart2m0_xfer>;
status = "okay";
};
+
+&usb_host0_ehci {
+ status = "okay";
@ -90,19 +117,3 @@ Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
+&usb_host1_ohci {
+ status = "okay";
+};
+
&gmac0 {
clock_in_out = "output";
phy-handle = <&rgmii_phy>;
@@ -791,3 +859,11 @@
pinctrl-0 = <&uart2m0_xfer>;
status = "okay";
};
+
+&pinctrl {
+ usb {
+ vcc5v0_host_en: vcc5v0-host-en {
+ rockchip,pins = <4 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+};

25
target/linux/rockchip/patches-6.1/052-03-v6.3-arm64-dts-rockchip-Remove-empty-line-from-rock-5a.patch Normal file
View File

@ -0,0 +1,25 @@
From 304c8a759953fb4a6cd399cf78f87501d7fd8bbc Mon Sep 17 00:00:00 2001
From: Christopher Obbard <chris.obbard@collabora.com>
Date: Tue, 10 Jan 2023 19:53:51 +0000
Subject: [PATCH] arm64: dts: rockchip: Remove empty line from rock-5a
There is a line which is empty. Remove it.
Fixes: a4a8f1afb360 ("arm64: dts: rockchip: Add rock-5a board")
Signed-off-by: Christopher Obbard <chris.obbard@collabora.com>
Link: https://lore.kernel.org/r/20230110195352.272360-3-chris.obbard@collabora.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
---
arch/arm64/boot/dts/rockchip/rk3588s-rock-5a.dts | 1 -
1 file changed, 1 deletion(-)
--- a/arch/arm64/boot/dts/rockchip/rk3588s-rock-5a.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3588s-rock-5a.dts
@@ -52,7 +52,6 @@
rtl8211f_rst: rtl8211f-rst {
rockchip,pins = <3 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>;
};
-
};
};

0
target/linux/rockchip/patches-6.1/052-03-v6.3-arm64-dts-rockchip-Fix-RX-delay-for-ethernet-phy-on.patch → target/linux/rockchip/patches-6.1/052-04-v6.3-arm64-dts-rockchip-Fix-RX-delay-for-ethernet-phy-on.patch
View File

398
target/linux/rockchip/patches-6.1/052-05-v6.6-arm64-dts-rockchip-add-PMIC-to-rock-5a.patch Normal file
View File

@ -0,0 +1,398 @@
From 75fdcbc8f4c1557545aaabe3f3d41a7337a1ffd8 Mon Sep 17 00:00:00 2001
From: Sebastian Reichel <sebastian.reichel@collabora.com>
Date: Mon, 10 Jul 2023 18:52:18 +0200
Subject: [PATCH] arm64: dts: rockchip: add PMIC to rock-5a
This adds PMIC support for the Radxa ROCK 5A
Co-developed-by: shengfei Xu <xsf@rock-chips.com>
Signed-off-by: shengfei Xu <xsf@rock-chips.com>
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Link: https://lore.kernel.org/r/20230710165228.105983-4-sebastian.reichel@collabora.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
---
.../boot/dts/rockchip/rk3588s-rock-5a.dts | 366 ++++++++++++++++++
1 file changed, 366 insertions(+)
--- a/arch/arm64/boot/dts/rockchip/rk3588s-rock-5a.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3588s-rock-5a.dts
@@ -18,6 +18,51 @@
chosen {
stdout-path = "serial2:1500000n8";
};
+
+ vcc12v_dcin: vcc12v-dcin-regulator {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc12v_dcin";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <12000000>;
+ regulator-max-microvolt = <12000000>;
+ };
+
+ vcc5v0_sys: vcc5v0-sys-regulator {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc5v0_sys";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ vin-supply = <&vcc12v_dcin>;
+ };
+
+ vcc_1v1_nldo_s3: vcc-1v1-nldo-s3-regulator {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc_1v1_nldo_s3";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <1100000>;
+ regulator-max-microvolt = <1100000>;
+ vin-supply = <&vcc5v0_sys>;
+ };
+};
+
+&cpu_l0 {
+ cpu-supply = <&vdd_cpu_lit_s0>;
+};
+
+&cpu_l1 {
+ cpu-supply = <&vdd_cpu_lit_s0>;
+};
+
+&cpu_l2 {
+ cpu-supply = <&vdd_cpu_lit_s0>;
+};
+
+&cpu_l3 {
+ cpu-supply = <&vdd_cpu_lit_s0>;
};
&gmac1 {
@@ -67,6 +112,327 @@
status = "okay";
};
+&spi2 {
+ status = "okay";
+ assigned-clocks = <&cru CLK_SPI2>;
+ assigned-clock-rates = <200000000>;
+ num-cs = <1>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&spi2m2_cs0 &spi2m2_pins>;
+
+ pmic@0 {
+ compatible = "rockchip,rk806";
+ reg = <0x0>;
+ interrupt-parent = <&gpio0>;
+ interrupts = <7 IRQ_TYPE_LEVEL_LOW>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pmic_pins>, <&rk806_dvs1_null>,
+ <&rk806_dvs2_null>, <&rk806_dvs3_null>;
+ spi-max-frequency = <1000000>;
+
+ vcc1-supply = <&vcc5v0_sys>;
+ vcc2-supply = <&vcc5v0_sys>;
+ vcc3-supply = <&vcc5v0_sys>;
+ vcc4-supply = <&vcc5v0_sys>;
+ vcc5-supply = <&vcc5v0_sys>;
+ vcc6-supply = <&vcc5v0_sys>;
+ vcc7-supply = <&vcc5v0_sys>;
+ vcc8-supply = <&vcc5v0_sys>;
+ vcc9-supply = <&vcc5v0_sys>;
+ vcc10-supply = <&vcc5v0_sys>;
+ vcc11-supply = <&vcc_2v0_pldo_s3>;
+ vcc12-supply = <&vcc5v0_sys>;
+ vcc13-supply = <&vcc_1v1_nldo_s3>;
+ vcc14-supply = <&vcc_1v1_nldo_s3>;
+ vcca-supply = <&vcc5v0_sys>;
+
+ gpio-controller;
+ #gpio-cells = <2>;
+
+ rk806_dvs1_null: dvs1-null-pins {
+ pins = "gpio_pwrctrl2";
+ function = "pin_fun0";
+ };
+
+ rk806_dvs2_null: dvs2-null-pins {
+ pins = "gpio_pwrctrl2";
+ function = "pin_fun0";
+ };
+
+ rk806_dvs3_null: dvs3-null-pins {
+ pins = "gpio_pwrctrl3";
+ function = "pin_fun0";
+ };
+
+ regulators {
+ vdd_gpu_s0: vdd_gpu_mem_s0: dcdc-reg1 {
+ regulator-name = "vdd_gpu_s0";
+ regulator-boot-on;
+ regulator-min-microvolt = <550000>;
+ regulator-max-microvolt = <950000>;
+ regulator-ramp-delay = <12500>;
+ regulator-enable-ramp-delay = <400>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vdd_cpu_lit_s0: vdd_cpu_lit_mem_s0: dcdc-reg2 {
+ regulator-name = "vdd_cpu_lit_s0";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <550000>;
+ regulator-max-microvolt = <950000>;
+ regulator-ramp-delay = <12500>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vdd_log_s0: dcdc-reg3 {
+ regulator-name = "vdd_log_s0";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <675000>;
+ regulator-max-microvolt = <750000>;
+ regulator-ramp-delay = <12500>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ regulator-suspend-microvolt = <750000>;
+ };
+ };
+
+ vdd_vdenc_s0: vdd_vdenc_mem_s0: dcdc-reg4 {
+ regulator-name = "vdd_vdenc_s0";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <550000>;
+ regulator-max-microvolt = <950000>;
+ regulator-ramp-delay = <12500>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vdd_ddr_s0: dcdc-reg5 {
+ regulator-name = "vdd_ddr_s0";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <675000>;
+ regulator-max-microvolt = <900000>;
+ regulator-ramp-delay = <12500>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ regulator-suspend-microvolt = <850000>;
+ };
+ };
+
+ vdd2_ddr_s3: dcdc-reg6 {
+ regulator-name = "vdd2_ddr_s3";
+ regulator-always-on;
+ regulator-boot-on;
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ };
+ };
+
+ vcc_2v0_pldo_s3: dcdc-reg7 {
+ regulator-name = "vdd_2v0_pldo_s3";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <2000000>;
+ regulator-max-microvolt = <2000000>;
+ regulator-ramp-delay = <12500>;
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <2000000>;
+ };
+ };
+
+ vcc_3v3_s3: dcdc-reg8 {
+ regulator-name = "vcc_3v3_s3";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <3300000>;
+ };
+ };
+
+ vddq_ddr_s0: dcdc-reg9 {
+ regulator-name = "vddq_ddr_s0";
+ regulator-always-on;
+ regulator-boot-on;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vcc_1v8_s3: dcdc-reg10 {
+ regulator-name = "vcc_1v8_s3";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <1800000>;
+ };
+ };
+
+ avcc_1v8_s0: pldo-reg1 {
+ regulator-name = "avcc_1v8_s0";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vcc_1v8_s0: pldo-reg2 {
+ regulator-name = "vcc_1v8_s0";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ regulator-suspend-microvolt = <1800000>;
+ };
+ };
+
+ avdd_1v2_s0: pldo-reg3 {
+ regulator-name = "avdd_1v2_s0";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <1200000>;
+ regulator-max-microvolt = <1200000>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vcc_3v3_s0: pldo-reg4 {
+ regulator-name = "vcc_3v3_s0";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-ramp-delay = <12500>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vccio_sd_s0: pldo-reg5 {
+ regulator-name = "vccio_sd_s0";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-ramp-delay = <12500>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ pldo6_s3: pldo-reg6 {
+ regulator-name = "pldo6_s3";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <1800000>;
+ };
+ };
+
+ vdd_0v75_s3: nldo-reg1 {
+ regulator-name = "vdd_0v75_s3";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <750000>;
+ regulator-max-microvolt = <750000>;
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt = <750000>;
+ };
+ };
+
+ vdd_ddr_pll_s0: nldo-reg2 {
+ regulator-name = "vdd_ddr_pll_s0";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <850000>;
+ regulator-max-microvolt = <850000>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ regulator-suspend-microvolt = <850000>;
+ };
+ };
+
+ avdd_0v75_s0: nldo-reg3 {
+ regulator-name = "avdd_0v75_s0";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <750000>;
+ regulator-max-microvolt = <750000>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vdd_0v85_s0: nldo-reg4 {
+ regulator-name = "vdd_0v85_s0";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <850000>;
+ regulator-max-microvolt = <850000>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vdd_0v75_s0: nldo-reg5 {
+ regulator-name = "vdd_0v75_s0";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <750000>;
+ regulator-max-microvolt = <750000>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+ };
+ };
+};
+
&uart2 {
pinctrl-0 = <&uart2m0_xfer>;
status = "okay";

90
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@ -0,0 +1,90 @@
From 4bbca5c7f4f0175c95588709535e3466a936dd2e Mon Sep 17 00:00:00 2001
From: Sebastian Reichel <sebastian.reichel@collabora.com>
Date: Mon, 10 Jul 2023 18:52:19 +0200
Subject: [PATCH] arm64: dts: rockchip: add vdd_cpu_big regulators to rock-5a
The RK8602 and RK8603 voltage regulators on the Rock 5A board provide
the power lines vdd_cpu_big0 and vdd_cpu_big1, respectively.
Add the necessary device tree nodes and bind them to the corresponding
CPU big core nodes.
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Link: https://lore.kernel.org/r/20230710165228.105983-5-sebastian.reichel@collabora.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
---
.../boot/dts/rockchip/rk3588s-rock-5a.dts | 56 +++++++++++++++++++
1 file changed, 56 insertions(+)
--- a/arch/arm64/boot/dts/rockchip/rk3588s-rock-5a.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3588s-rock-5a.dts
@@ -49,6 +49,22 @@
};
};
+&cpu_b0 {
+ cpu-supply = <&vdd_cpu_big0_s0>;
+};
+
+&cpu_b1 {
+ cpu-supply = <&vdd_cpu_big0_s0>;
+};
+
+&cpu_b2 {
+ cpu-supply = <&vdd_cpu_big1_s0>;
+};
+
+&cpu_b3 {
+ cpu-supply = <&vdd_cpu_big1_s0>;
+};
+
&cpu_l0 {
cpu-supply = <&vdd_cpu_lit_s0>;
};
@@ -65,6 +81,46 @@
cpu-supply = <&vdd_cpu_lit_s0>;
};
+&i2c0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c0m2_xfer>;
+ status = "okay";
+
+ vdd_cpu_big0_s0: regulator@42 {
+ compatible = "rockchip,rk8602";
+ reg = <0x42>;
+ fcs,suspend-voltage-selector = <1>;
+ regulator-name = "vdd_cpu_big0_s0";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <550000>;
+ regulator-max-microvolt = <1050000>;
+ regulator-ramp-delay = <2300>;
+ vin-supply = <&vcc5v0_sys>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vdd_cpu_big1_s0: regulator@43 {
+ compatible = "rockchip,rk8603", "rockchip,rk8602";
+ reg = <0x43>;
+ fcs,suspend-voltage-selector = <1>;
+ regulator-name = "vdd_cpu_big1_s0";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <550000>;
+ regulator-max-microvolt = <1050000>;
+ regulator-ramp-delay = <2300>;
+ vin-supply = <&vcc5v0_sys>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+};
+
&gmac1 {
clock_in_out = "output";
phy-handle = <&rgmii_phy1>;

51
target/linux/rockchip/patches-6.1/052-07-v6.6-arm64-dts-rockchip-add-5V-regulator-to-rock-5a.patch Normal file
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@ -0,0 +1,51 @@
From 53bf040e14c0245711a3cae6f3259e589ac8171b Mon Sep 17 00:00:00 2001
From: Sebastian Reichel <sebastian.reichel@collabora.com>
Date: Mon, 10 Jul 2023 18:52:20 +0200
Subject: [PATCH] arm64: dts: rockchip: add 5V regulator to rock-5a
Add GPIO controlled 5V regulator, which is used for supplying
the fan, on-board USB hub and HDMI.
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Link: https://lore.kernel.org/r/20230710165228.105983-6-sebastian.reichel@collabora.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
---
.../boot/dts/rockchip/rk3588s-rock-5a.dts | 20 +++++++++++++++++++
1 file changed, 20 insertions(+)
--- a/arch/arm64/boot/dts/rockchip/rk3588s-rock-5a.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3588s-rock-5a.dts
@@ -38,6 +38,20 @@
vin-supply = <&vcc12v_dcin>;
};
+ vcc_5v0: vcc-5v0-regulator {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc_5v0";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ regulator-boot-on;
+ regulator-always-on;
+ enable-active-high;
+ gpio = <&gpio4 RK_PA3 GPIO_ACTIVE_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&vcc_5v0_en>;
+ vin-supply = <&vcc5v0_sys>;
+ };
+
vcc_1v1_nldo_s3: vcc-1v1-nldo-s3-regulator {
compatible = "regulator-fixed";
regulator-name = "vcc_1v1_nldo_s3";
@@ -150,6 +164,12 @@
};
&pinctrl {
+ power {
+ vcc_5v0_en: vcc-5v0-en {
+ rockchip,pins = <4 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+
rtl8211f {
rtl8211f_rst: rtl8211f-rst {
rockchip,pins = <3 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>;

38
target/linux/rockchip/patches-6.1/052-08-v6.6-arm64-dts-rockchip-add-SD-card-support-to-rock-5a.patch Normal file
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@ -0,0 +1,38 @@
From ea3e66e7ad0d8ca1a4248a55e235fa27817ac3da Mon Sep 17 00:00:00 2001
From: Lucas Tanure <lucas.tanure@collabora.com>
Date: Mon, 10 Jul 2023 18:52:21 +0200
Subject: [PATCH] arm64: dts: rockchip: add SD card support to rock-5a
Add sdmmc support for Rock Pi 5A board.
Signed-off-by: Lucas Tanure <lucas.tanure@collabora.com>
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Link: https://lore.kernel.org/r/20230710165228.105983-7-sebastian.reichel@collabora.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
---
arch/arm64/boot/dts/rockchip/rk3588s-rock-5a.dts | 14 ++++++++++++++
1 file changed, 14 insertions(+)
--- a/arch/arm64/boot/dts/rockchip/rk3588s-rock-5a.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3588s-rock-5a.dts
@@ -188,6 +188,20 @@
status = "okay";
};
+&sdmmc {
+ bus-width = <4>;
+ cap-mmc-highspeed;
+ cap-sd-highspeed;
+ disable-wp;
+ max-frequency = <150000000>;
+ no-sdio;
+ no-mmc;
+ sd-uhs-sdr104;
+ vmmc-supply = <&vcc_3v3_s0>;
+ vqmmc-supply = <&vccio_sd_s0>;
+ status = "okay";
+};
+
&spi2 {
status = "okay";
assigned-clocks = <&cru CLK_SPI2>;

57
target/linux/rockchip/patches-6.1/052-09-v6.6-arm64-dts-rockchip-add-status-LED-to-rock-5a.patch Normal file
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@ -0,0 +1,57 @@
From db02f866b140dc04eb13da8bc8d9b1e36232102c Mon Sep 17 00:00:00 2001
From: Sebastian Reichel <sebastian.reichel@collabora.com>
Date: Mon, 10 Jul 2023 18:52:22 +0200
Subject: [PATCH] arm64: dts: rockchip: add status LED to rock-5a
Describe the Rock 5A status LED in its device tree.
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Link: https://lore.kernel.org/r/20230710165228.105983-8-sebastian.reichel@collabora.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
---
.../boot/dts/rockchip/rk3588s-rock-5a.dts | 20 +++++++++++++++++++
1 file changed, 20 insertions(+)
--- a/arch/arm64/boot/dts/rockchip/rk3588s-rock-5a.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3588s-rock-5a.dts
@@ -3,6 +3,7 @@
/dts-v1/;
#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/leds/common.h>
#include <dt-bindings/pinctrl/rockchip.h>
#include "rk3588s.dtsi"
@@ -19,6 +20,19 @@
stdout-path = "serial2:1500000n8";
};
+ leds {
+ compatible = "gpio-leds";
+ pinctrl-names = "default";
+ pinctrl-0 = <&io_led>;
+
+ io-led {
+ color = <LED_COLOR_ID_BLUE>;
+ function = LED_FUNCTION_STATUS;
+ gpios = <&gpio3 RK_PD5 GPIO_ACTIVE_HIGH>;
+ linux,default-trigger = "heartbeat";
+ };
+ };
+
vcc12v_dcin: vcc12v-dcin-regulator {
compatible = "regulator-fixed";
regulator-name = "vcc12v_dcin";
@@ -164,6 +178,12 @@
};
&pinctrl {
+ leds {
+ io_led: io-led {
+ rockchip,pins = <3 RK_PD5 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+
power {
vcc_5v0_en: vcc-5v0-en {
rockchip,pins = <4 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>;

88
target/linux/rockchip/patches-6.1/052-10-v6.6-arm64-dts-rockchip-add-analog-audio-to-rock-5a.patch Normal file
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@ -0,0 +1,88 @@
From fb031e6275fc165100a2bf65d630872b89a97c08 Mon Sep 17 00:00:00 2001
From: Sebastian Reichel <sebastian.reichel@collabora.com>
Date: Mon, 10 Jul 2023 18:52:23 +0200
Subject: [PATCH] arm64: dts: rockchip: add analog audio to rock-5a
Add analog audio support based on the Everest Semi ES8316 codec.
Note, that this currently does not support headphone plug events. The
Rock 5A uses a different headphone jack with a different logic to detect
a headphone plug. Unfortunately the detect GPIO is always low.
Downstream uses an ADC channel instead, but that is currently not
supported upstream.
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Link: https://lore.kernel.org/r/20230710165228.105983-9-sebastian.reichel@collabora.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
---
.../boot/dts/rockchip/rk3588s-rock-5a.dts | 52 +++++++++++++++++++
1 file changed, 52 insertions(+)
--- a/arch/arm64/boot/dts/rockchip/rk3588s-rock-5a.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3588s-rock-5a.dts
@@ -16,6 +16,20 @@
serial2 = &uart2;
};
+ analog-sound {
+ compatible = "audio-graph-card";
+ label = "rk3588-es8316";
+
+ widgets = "Microphone", "Mic Jack",
+ "Headphone", "Headphones";
+
+ routing = "MIC2", "Mic Jack",
+ "Headphones", "HPOL",
+ "Headphones", "HPOR";
+
+ dais = <&i2s0_8ch_p0>;
+ };
+
chosen {
stdout-path = "serial2:1500000n8";
};
@@ -148,6 +162,44 @@
};
};
};
+
+&i2c7 {
+ status = "okay";
+
+ es8316: audio-codec@11 {
+ compatible = "everest,es8316";
+ reg = <0x11>;
+ clocks = <&cru I2S0_8CH_MCLKOUT>;
+ clock-names = "mclk";
+ assigned-clocks = <&cru I2S0_8CH_MCLKOUT>;
+ assigned-clock-rates = <12288000>;
+ #sound-dai-cells = <0>;
+
+ port {
+ es8316_p0_0: endpoint {
+ remote-endpoint = <&i2s0_8ch_p0_0>;
+ };
+ };
+ };
+};
+
+&i2s0_8ch {
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2s0_lrck
+ &i2s0_mclk
+ &i2s0_sclk
+ &i2s0_sdi0
+ &i2s0_sdo0>;
+ status = "okay";
+
+ i2s0_8ch_p0: port {
+ i2s0_8ch_p0_0: endpoint {
+ dai-format = "i2s";
+ mclk-fs = <256>;
+ remote-endpoint = <&es8316_p0_0>;
+ };
+ };
+};
&gmac1 {
clock_in_out = "output";

33
target/linux/rockchip/patches-6.1/052-11-v6.6-arm64-dts-rockchip-add-I2C-EEPROM-to-rock-5a.patch Normal file
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@ -0,0 +1,33 @@
From 89c880808cff8bc6f1ea6e1b5edc603e6232310e Mon Sep 17 00:00:00 2001
From: Sebastian Reichel <sebastian.reichel@collabora.com>
Date: Mon, 10 Jul 2023 18:52:24 +0200
Subject: [PATCH] arm64: dts: rockchip: add I2C EEPROM to rock-5a
Add the I2C EEPROM to the Rock 5A DT.
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Link: https://lore.kernel.org/r/20230710165228.105983-10-sebastian.reichel@collabora.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
---
arch/arm64/boot/dts/rockchip/rk3588s-rock-5a.dts | 10 ++++++++++
1 file changed, 10 insertions(+)
--- a/arch/arm64/boot/dts/rockchip/rk3588s-rock-5a.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3588s-rock-5a.dts
@@ -163,6 +163,16 @@
};
};
+&i2c2 {
+ status = "okay";
+
+ eeprom: eeprom@50 {
+ compatible = "belling,bl24c16a", "atmel,24c16";
+ reg = <0x50>;
+ pagesize = <16>;
+ };
+};
+
&i2c7 {
status = "okay";

40
target/linux/rockchip/patches-6.1/052-12-v6.6-arm64-dts-rockchip-add-vdd_npu_s0-regulator-to-rock-5a.patch Normal file
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@ -0,0 +1,40 @@
From afc3925f694a1a16f38ce66dfc7dcf88cc77b8ee Mon Sep 17 00:00:00 2001
From: Sebastian Reichel <sebastian.reichel@collabora.com>
Date: Mon, 10 Jul 2023 18:52:25 +0200
Subject: [PATCH] arm64: dts: rockchip: add vdd_npu_s0 regulator to rock-5a
Add the NPU regulator.
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Link: https://lore.kernel.org/r/20230710165228.105983-11-sebastian.reichel@collabora.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
---
.../arm64/boot/dts/rockchip/rk3588s-rock-5a.dts | 17 +++++++++++++++++
1 file changed, 17 insertions(+)
--- a/arch/arm64/boot/dts/rockchip/rk3588s-rock-5a.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3588s-rock-5a.dts
@@ -166,6 +166,23 @@
&i2c2 {
status = "okay";
+ vdd_npu_s0: regulator@42 {
+ compatible = "rockchip,rk8602";
+ reg = <0x42>;
+ fcs,suspend-voltage-selector = <1>;
+ regulator-name = "vdd_npu_s0";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <550000>;
+ regulator-max-microvolt = <950000>;
+ regulator-ramp-delay = <2300>;
+ vin-supply = <&vcc5v0_sys>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
eeprom: eeprom@50 {
compatible = "belling,bl24c16a", "atmel,24c16";
reg = <0x50>;

36
target/linux/rockchip/patches-6.1/052-13-v6.6-arm64-dts-rockchip-enable-I2C-interface-from-DSI-and-CSI.patch Normal file
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@ -0,0 +1,36 @@
From aa00cf88bd8c5ac22f4da9ae390790268b111f97 Mon Sep 17 00:00:00 2001
From: Sebastian Reichel <sebastian.reichel@collabora.com>
Date: Mon, 10 Jul 2023 18:52:26 +0200
Subject: [PATCH] arm64: dts: rockchip: enable I2C interface from DSI and CSI
connectors on rock-5a
I2C3 is routed to the Camera connector and I2C5 is routed to the LCD
connector. On I2C5 additionally there is an unpopulated footprint for
a HYM8563TS RTC.
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Link: https://lore.kernel.org/r/20230710165228.105983-12-sebastian.reichel@collabora.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
---
arch/arm64/boot/dts/rockchip/rk3588s-rock-5a.dts | 10 ++++++++++
1 file changed, 10 insertions(+)
--- a/arch/arm64/boot/dts/rockchip/rk3588s-rock-5a.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3588s-rock-5a.dts
@@ -190,6 +190,16 @@
};
};
+&i2c3 {
+ status = "okay";
+};
+
+&i2c5 {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c5m2_xfer>;
+};
+
&i2c7 {
status = "okay";

35
target/linux/rockchip/patches-6.1/052-14-v6.6-arm64-dts-rockchip-add-SARADC-to-rock-5a.patch Normal file
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@ -0,0 +1,35 @@
From 43465c67518c3d2e6293e9d97e577de434ad682b Mon Sep 17 00:00:00 2001
From: Sebastian Reichel <sebastian.reichel@collabora.com>
Date: Mon, 10 Jul 2023 18:52:27 +0200
Subject: [PATCH] arm64: dts: rockchip: add SARADC to rock-5a
Enable ADC support for Rock 5A, which has the following ADC channels:
Channel 0 = Boot Mode Config
Channel 1 = Recovery Key
Channel 2 = PWM Fan
Channel 3 = Headphone Hook
Channel 4 = System Input Voltage
Channel 5 = Board ID Config
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Link: https://lore.kernel.org/r/20230710165228.105983-13-sebastian.reichel@collabora.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
---
arch/arm64/boot/dts/rockchip/rk3588s-rock-5a.dts | 5 +++++
1 file changed, 5 insertions(+)
--- a/arch/arm64/boot/dts/rockchip/rk3588s-rock-5a.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3588s-rock-5a.dts
@@ -286,6 +286,11 @@
};
};
+&saradc {
+ vref-supply = <&avcc_1v8_s0>;
+ status = "okay";
+};
+
&sdhci {
bus-width = <8>;
no-sdio;

45
target/linux/rockchip/patches-6.1/052-15-v6.6-arm64-dts-rockchip-add-fan-support-to-rock-5a.patch Normal file
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@ -0,0 +1,45 @@
From dd4464ecced6f07b0e62f67752928d1424883dee Mon Sep 17 00:00:00 2001
From: Sebastian Reichel <sebastian.reichel@collabora.com>
Date: Mon, 10 Jul 2023 18:52:28 +0200
Subject: [PATCH] arm64: dts: rockchip: add fan support to rock-5a
Add the necessary DT changes for the Rock 5A board to enable support for
the PWM controlled heat sink fan.
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Link: https://lore.kernel.org/r/20230710165228.105983-14-sebastian.reichel@collabora.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
---
arch/arm64/boot/dts/rockchip/rk3588s-rock-5a.dts | 14 ++++++++++++++
1 file changed, 14 insertions(+)
--- a/arch/arm64/boot/dts/rockchip/rk3588s-rock-5a.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3588s-rock-5a.dts
@@ -47,6 +47,14 @@
};
};
+ fan: pwm-fan {
+ compatible = "pwm-fan";
+ cooling-levels = <0 95 145 195 255>;
+ fan-supply = <&vcc_5v0>;
+ pwms = <&pwm3 0 50000 0>;
+ #cooling-cells = <2>;
+ };
+
vcc12v_dcin: vcc12v-dcin-regulator {
compatible = "regulator-fixed";
regulator-name = "vcc12v_dcin";
@@ -286,6 +294,12 @@
};
};
+&pwm3 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pwm3m1_pins>;
+ status = "okay";
+};
+
&saradc {
vref-supply = <&avcc_1v8_s0>;
status = "okay";

123
target/linux/rockchip/patches-6.1/052-16-v6.6-arm64-dts-rockchip-add-USB2-to-rk3588s-rock5a.patch Normal file
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@ -0,0 +1,123 @@
From 1642bf66e270d8de7ba27068d1a5ecdbdba14d3b Mon Sep 17 00:00:00 2001
From: Sebastian Reichel <sebastian.reichel@collabora.com>
Date: Wed, 12 Jul 2023 18:51:06 +0200
Subject: [PATCH] arm64: dts: rockchip: add USB2 to rk3588s-rock5a
Enable USB2 (EHCI and OCHI mode) support for the Radxa ROCK 5 Model A.
This adds USB support for the on-board WLAN/BT chip, the two USB2
ports, the USB available from the 2x20 connector and the lower USB3
port (in USB2 mode).
The upper USB3 (further away from the PCB) uses the RK3588S USB TypeC
OTG controller for USB2 and USB3 and thus is not supported at all at
the moment.
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Link: https://lore.kernel.org/r/20230712165106.65603-5-sebastian.reichel@collabora.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
---
arch/arm64/boot/dts/rockchip/rk3588s-rock-5a.dts | 78 ++++++++++++++++++++++++
1 file changed, 78 insertions(+)
--- a/arch/arm64/boot/dts/rockchip/rk3588s-rock-5a.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3588s-rock-5a.dts
@@ -64,6 +64,20 @@
regulator-max-microvolt = <12000000>;
};
+ vcc5v0_host: vcc5v0-host-regulator {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc5v0_host";
+ regulator-boot-on;
+ regulator-always-on;
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ enable-active-high;
+ gpio = <&gpio4 RK_PB5 GPIO_ACTIVE_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&vcc5v0_host_en>;
+ vin-supply = <&vcc5v0_sys>;
+ };
+
vcc5v0_sys: vcc5v0-sys-regulator {
compatible = "regulator-fixed";
regulator-name = "vcc5v0_sys";
@@ -292,6 +306,34 @@
rockchip,pins = <3 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
+
+ usb {
+ vcc5v0_host_en: vcc5v0-host-en {
+ rockchip,pins = <4 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+
+ wifibt {
+ wl_reset: wl-reset {
+ rockchip,pins = <0 RK_PD0 RK_FUNC_GPIO &pcfg_pull_up>;
+ };
+
+ wl_dis: wl-dis {
+ rockchip,pins = <0 RK_PD5 RK_FUNC_GPIO &pcfg_output_high>;
+ };
+
+ wl_wake_host: wl-wake-host {
+ rockchip,pins = <0 RK_PC7 RK_FUNC_GPIO &pcfg_pull_up>;
+ };
+
+ bt_dis: bt-dis {
+ rockchip,pins = <0 RK_PD4 RK_FUNC_GPIO &pcfg_output_high>;
+ };
+
+ bt_wake_host: bt-wake-host {
+ rockchip,pins = <0 RK_PC5 RK_FUNC_GPIO &pcfg_pull_up>;
+ };
+ };
};
&pwm3 {
@@ -651,7 +693,43 @@
};
};
+&u2phy2 {
+ status = "okay";
+};
+
+&u2phy2_host {
+ status = "okay";
+ phy-supply = <&vcc5v0_host>;
+};
+
+&u2phy3 {
+ status = "okay";
+};
+
+&u2phy3_host {
+ phy-supply = <&vcc5v0_host>;
+ status = "okay";
+};
+
&uart2 {
pinctrl-0 = <&uart2m0_xfer>;
status = "okay";
};
+
+&usb_host0_ehci {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <&wl_reset &wl_dis &wl_wake_host &bt_dis &bt_wake_host>;
+};
+
+&usb_host0_ohci {
+ status = "okay";
+};
+
+&usb_host1_ehci {
+ status = "okay";
+};
+
+&usb_host1_ohci {
+ status = "okay";
+};

61
target/linux/rockchip/patches-6.1/112-03-arm64-dts-rockchip-rk3588-rock5b-add-USB2.patch → target/linux/rockchip/patches-6.1/053-14-v6.6-arm64-dts-rockchip-add-USB2-to-rk3588-rock5b.patch
View File

@ -1,7 +1,7 @@
From 8c64d17408c023fcb23133bd74c436f991a6f4f9 Mon Sep 17 00:00:00 2001
From 488fc7ad2bc8d980cc0599bc1be951938df8a779 Mon Sep 17 00:00:00 2001
From: Sebastian Reichel <sebastian.reichel@collabora.com>
Date: Thu, 30 Mar 2023 15:44:36 +0200
Subject: [PATCH] arm64: dts: rockchip: rk3588-rock5b: add USB2
Date: Wed, 12 Jul 2023 18:51:05 +0200
Subject: [PATCH] arm64: dts: rockchip: add USB2 to rk3588-rock5b
Enable USB2 (EHCI and OCHI mode) support for the Radxa ROCK 5 Model B.
This adds USB support on the M.2 Key E, both USB2 ports and USB2 mode
@ -11,17 +11,18 @@ The lower USB3 (closer to the PCB) and the USB-C ports use the RK3588
USB TypeC host controller, which is not yet supported upstream.
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Link: https://lore.kernel.org/r/20230712165106.65603-4-sebastian.reichel@collabora.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
---
.../boot/dts/rockchip/rk3588-rock-5b.dts | 58 +++++++++++++++++++
1 file changed, 58 insertions(+)
arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts | 55 +++++++++++++++++++++++++
1 file changed, 55 insertions(+)
--- a/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts
@@ -79,6 +79,20 @@
regulator-max-microvolt = <1100000>;
vin-supply = <&vcc5v0_sys>;
@@ -43,6 +43,20 @@
#cooling-cells = <2>;
};
+
+ vcc5v0_host: vcc5v0-host-regulator {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc5v0_host";
@ -34,34 +35,48 @@ Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
+ pinctrl-names = "default";
+ pinctrl-0 = <&vcc5v0_host_en>;
+ vin-supply = <&vcc5v0_sys>;
+ };
+
vcc5v0_sys: vcc5v0-sys-regulator {
compatible = "regulator-fixed";
regulator-name = "vcc5v0_sys";
@@ -201,6 +215,12 @@
rockchip,pins = <1 RK_PD5 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
+
+ usb {
+ vcc5v0_host_en: vcc5v0-host-en {
+ rockchip,pins = <4 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
};
&cpu_b0 {
@@ -589,3 +603,46 @@
&pwm1 {
@@ -565,3 +585,38 @@
pinctrl-0 = <&uart2m0_xfer>;
status = "okay";
};
+
+&u2phy2 {
+ status = "okay";
+};
+
+&u2phy2_host {
+ /* connected to USB hub, which is powered by vcc5v0_sys */
+ phy-supply = <&vcc5v0_sys>;
+ status = "okay";
+};
+
+&u2phy3 {
+ status = "okay";
+};
+
+&u2phy3_host {
+ phy-supply = <&vcc5v0_host>;
+ status = "okay";
+};
+
+&u2phy2 {
+ status = "okay";
+};
+
+&u2phy3 {
+ status = "okay";
+};
+
+&usb_host0_ehci {
+ status = "okay";
+};
@ -77,11 +92,3 @@ Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
+&usb_host1_ohci {
+ status = "okay";
+};
+
+&pinctrl {
+ usb {
+ vcc5v0_host_en: vcc5v0-host-en {
+ rockchip,pins = <4 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+};

6
target/linux/rockchip/patches-6.1/100-rockchip-use-system-LED-for-OpenWrt.patch
View File

@ -343,8 +343,8 @@ Signed-off-by: David Bauer <mail@david-bauer.net>
};
chosen {
@@ -43,6 +50,17 @@
#cooling-cells = <2>;
@@ -57,6 +64,17 @@
vin-supply = <&vcc5v0_sys>;
};
+ gpio-leds {
@ -361,7 +361,7 @@ Signed-off-by: David Bauer <mail@david-bauer.net>
vcc5v0_sys: vcc5v0-sys-regulator {
compatible = "regulator-fixed";
regulator-name = "vcc5v0_sys";
@@ -196,6 +214,12 @@
@@ -210,6 +228,12 @@
};
};

2
target/linux/rockchip/patches-6.1/110-02-arm64-dts-rockchip-rk3588-add-cpu-frequency-scaling.patch
View File

@ -536,7 +536,7 @@ Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
timer {
compatible = "arm,armv8-timer";
interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_HIGH 0>,
@@ -395,6 +837,16 @@
@@ -439,6 +881,16 @@
reg = <0x0 0xfd58c000 0x0 0x1000>;
};

4
target/linux/rockchip/patches-6.1/110-03-arm64-dts-rockchip-rk3588-evb1-add-cpu-regulator-info.patch
View File

@ -13,7 +13,7 @@ Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
--- a/arch/arm64/boot/dts/rockchip/rk3588-evb1-v10.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3588-evb1-v10.dts
@@ -85,6 +85,21 @@
@@ -119,6 +119,21 @@
cpu-supply = <&vdd_cpu_lit_s0>;
};
@ -35,7 +35,7 @@ Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
&gmac0 {
clock_in_out = "output";
phy-handle = <&rgmii_phy>;
@@ -768,6 +783,10 @@
@@ -826,6 +841,10 @@
status = "okay";
};

31
target/linux/rockchip/patches-6.1/115-02-arm64-dts-rockchip-rk3588-evb1-add-PCIe2-network.patch
View File

@ -14,9 +14,9 @@ Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
--- a/arch/arm64/boot/dts/rockchip/rk3588-evb1-v10.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3588-evb1-v10.dts
@@ -81,6 +81,26 @@
pinctrl-names = "default";
pinctrl-0 = <&vcc5v0_host_en>;
@@ -81,12 +81,36 @@
regulator-max-microvolt = <5000000>;
vin-supply = <&vcc5v0_usbdcin>;
};
+
+ pcie20_avdd0v85: pcie20-avdd0v85 {
@ -41,10 +41,20 @@ Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
};
&combphy0_ps {
@@ -860,10 +880,27 @@
status = "okay";
};
+&combphy2_psu {
+ status = "okay";
+};
+
&cpu_b0 {
cpu-supply = <&vdd_cpu_big0_s0>;
};
@@ -178,7 +202,20 @@
};
};
+&pcie2x1l1 {
+ reset-gpios = <&gpio4 RK_PA2 GPIO_ACTIVE_HIGH>;
+ pinctrl-names = "default";
@ -59,13 +69,6 @@ Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
+ };
+ };
+
usb {
vcc5v0_host_en: vcc5v0-host-en {
rockchip,pins = <4 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
};
+
+&combphy2_psu {
+ status = "okay";
+};
rtl8211f {
rtl8211f_rst: rtl8211f-rst {
rockchip,pins = <4 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>;

10
target/linux/rockchip/patches-6.1/115-03-arm64-dts-rockchip-rock-5b-add-PCIe-network-controller.patch
View File

@ -13,8 +13,8 @@ Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
--- a/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts
@@ -80,6 +80,15 @@
vin-supply = <&vcc5v0_sys>;
@@ -50,6 +50,15 @@
#cooling-cells = <2>;
};
+ vcc3v3_pcie2x1l2: vcc3v3-pcie2x1l2-regulator {
@ -29,9 +29,9 @@ Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
vcc5v0_host: vcc5v0-host-regulator {
compatible = "regulator-fixed";
regulator-name = "vcc5v0_host";
@@ -646,3 +655,14 @@
};
};
@@ -644,3 +653,14 @@
&usb_host1_ohci {
status = "okay";
};
+
+&combphy0_ps {

79
target/linux/rockchip/patches-6.1/116-02-arm64-dts-rockchip-rock-5a-Add-SD-card-support.patch
View File

@ -1,79 +0,0 @@
From 5e3ab74c5fa048982925574f0e6d4628bad2be7e Mon Sep 17 00:00:00 2001
From: Lucas Tanure <lucas.tanure@collabora.com>
Date: Tue, 13 Dec 2022 09:30:20 +0000
Subject: [PATCH] arm64: dts: rockchip: rock-5a: Add SD card support
Add sdmmc support for Rock Pi 5A board.
Signed-off-by: Lucas Tanure <lucas.tanure@collabora.com>
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
---
.../boot/dts/rockchip/rk3588s-rock-5a.dts | 46 +++++++++++++++++++
1 file changed, 46 insertions(+)
--- a/arch/arm64/boot/dts/rockchip/rk3588s-rock-5a.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3588s-rock-5a.dts
@@ -5,6 +5,7 @@
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/pinctrl/rockchip.h>
#include "rk3588s.dtsi"
+#include "rk3588-rk806-single.dtsi"
/ {
model = "Radxa ROCK 5 Model A";
@@ -18,6 +19,35 @@
chosen {
stdout-path = "serial2:1500000n8";
};
+
+ vcc12v_dcin: vcc12v-dcin {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc12v_dcin";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <12000000>;
+ regulator-max-microvolt = <12000000>;
+ };
+
+ vcc5v0_sys: vcc5v0-sys {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc5v0_sys";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ vin-supply = <&vcc12v_dcin>;
+ };
+
+ vcc_1v1_nldo_s3: vcc-1v1-nldo-s3 {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc_1v1_nldo_s3";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <1100000>;
+ regulator-max-microvolt = <1100000>;
+ vin-supply = <&vcc5v0_sys>;
+ };
};
&gmac1 {
@@ -72,3 +102,19 @@
pinctrl-0 = <&uart2m0_xfer>;
status = "okay";
};
+
+&sdmmc {
+ max-frequency = <150000000>;
+ no-sdio;
+ no-mmc;
+ bus-width = <4>;
+ cap-mmc-highspeed;
+ cap-sd-highspeed;
+ disable-wp;
+ sd-uhs-sdr104;
+ vmmc-supply = <&vcc_3v3_s0>;
+ vqmmc-supply = <&vccio_sd_s0>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&sdmmc_bus4 &sdmmc_clk &sdmmc_cmd &sdmmc_det>;
+ status = "okay";
+};

8
target/linux/rockchip/patches-6.1/119-02-arm64-dts-rockchip-rk3588s-Add-USBDP-phy-nodes.patch
View File

@ -92,8 +92,8 @@ Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
reg = <0x0 0xfee10000 0x0 0x100>;
--- a/arch/arm64/boot/dts/rockchip/rk3588s.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3588s.dtsi
@@ -881,6 +881,33 @@
reg = <0x0 0xfd58c000 0x0 0x1000>;
@@ -906,6 +906,33 @@
reg = <0x0 0xfd5c4000 0x0 0x100>;
};
+ usb2phy0_grf: syscon@fd5d0000 {
@ -126,7 +126,7 @@ Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
usb2phy2_grf: syscon@fd5d8000 {
compatible = "rockchip,rk3588-usb2phy-grf", "syscon", "simple-mfd";
reg = <0x0 0xfd5d8000 0x0 0x4000>;
@@ -906,6 +933,17 @@
@@ -931,6 +958,17 @@
};
};
@ -145,7 +145,7 @@ Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
compatible = "rockchip,rk3588-usb2phy-grf", "syscon", "simple-mfd";
reg = <0x0 0xfd5dc000 0x0 0x4000>;
@@ -956,6 +994,11 @@
reg = <0x0 0xfd5c4000 0x0 0x100>;
};
};
+ usbdpphy0_grf: syscon@fd5c8000 {

2
target/linux/rockchip/patches-6.1/119-03-arm64-dts-rockchip-rk3588s-Add-USB3-controllers.patch
View File

@ -131,7 +131,7 @@ Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
sys_grf: syscon@fd58c000 {
compatible = "rockchip,rk3588-sys-grf", "syscon";
reg = <0x0 0xfd58c000 0x0 0x1000>;
@@ -898,7 +957,6 @@
@@ -923,7 +982,6 @@
clock-names = "phyclk";
clock-output-names = "usb480m_phy0";
#clock-cells = <0>;

6
target/linux/rockchip/patches-6.1/119-04-arm64-dts-rockchip-rk3588-evb1-add-USB3.patch
View File

@ -40,7 +40,7 @@ Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
};
&combphy0_ps {
@@ -899,8 +912,144 @@
@@ -234,6 +247,16 @@
rockchip,pins = <4 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
@ -56,7 +56,9 @@ Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
+ };
};
&combphy2_psu {
&pwm2 {
@@ -902,3 +925,129 @@
&usb_host1_ohci {
status = "okay";
};
+

2
target/linux/rockchip/patches-6.1/801-07-arm64-dts-rockchip-enable-hwrng-for-rockchip-boards.patch
View File

@ -52,7 +52,7 @@
status = "okay";
--- a/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts
@@ -254,6 +254,10 @@
@@ -260,6 +260,10 @@
status = "okay";
};