sunxi: 5.4: reorder all patches

This commit is contained in:
AmadeusGhost 2022-03-28 23:50:28 +08:00
parent dd5c4f4d6d
commit ce1978d646
22 changed files with 85 additions and 230 deletions

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@ -14,7 +14,7 @@ Signed-off-by: Maxime Ripard <mripard@kernel.org>
--- a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
@@ -341,6 +341,16 @@
@@ -331,6 +331,16 @@
pins = "PH0", "PH1";
function = "uart0";
};

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@ -18,7 +18,7 @@ Signed-off-by: Maxime Ripard <maxime@cerno.tech>
--- a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
@@ -596,6 +596,38 @@
@@ -586,6 +586,38 @@
status = "disabled";
};

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@ -1,18 +1,22 @@
From 938519cadbdf2544c85b3a88ae73631b6b5cb7f9 Mon Sep 17 00:00:00 2001
From: Clément Péron
Date: Tue, 21 May 2019 18:11:01 +0200
Subject: arm64: dts: allwinner: Add ARM Mali GPU node for H6
From 4acc24bca17f5f05692656d865d844985abad18a Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Cl=C3=A9ment=20P=C3=A9ron?= <peron.clem@gmail.com>
Date: Wed, 30 Oct 2019 16:07:41 +0100
Subject: [PATCH] arm64: dts: allwinner: Add ARM Mali GPU node for H6
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
Add the mali gpu node to the H6 device-tree.
Signed-off-by: Clément Péron <peron.clem@gmail.com>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
---
arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi | 14 ++++++++++++++
1 file changed, 14 insertions(+)
--- a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
@@ -188,6 +188,20 @@
@@ -171,6 +171,20 @@
allwinner,sram = <&ve_sram 1>;
};

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@ -45,7 +45,7 @@ Signed-off-by: Maxime Ripard <maxime@cerno.tech>
regulator-name = "vdd-gpu";
--- a/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-3.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-3.dts
@@ -108,6 +108,11 @@
@@ -102,6 +102,11 @@
status = "okay";
};
@ -57,14 +57,14 @@ Signed-off-by: Maxime Ripard <maxime@cerno.tech>
&hdmi {
status = "okay";
};
@@ -253,6 +258,7 @@
@@ -237,6 +242,7 @@
};
reg_dcdcc: dcdcc {
+ regulator-enable-ramp-delay = <32000>;
regulator-min-microvolt = <810000>;
regulator-max-microvolt = <1080000>;
regulator-ramp-delay = <2500>;
regulator-name = "vdd-gpu";
--- a/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi.dtsi
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi.dtsi
@@ -55,6 +55,11 @@

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@ -35,7 +35,7 @@ Signed-off-by: Maxime Ripard <mripard@kernel.org>
};
chosen {
@@ -269,6 +270,24 @@
@@ -275,6 +276,24 @@
status = "okay";
};

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@ -29,7 +29,7 @@ Signed-off-by: Maxime Ripard <maxime@cerno.tech>
&ehci0 {
status = "okay";
};
@@ -304,3 +308,7 @@
@@ -310,3 +314,7 @@
usb3_vbus-supply = <&reg_vcc5v>;
status = "okay";
};

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@ -14,7 +14,7 @@ Signed-off-by: Maxime Ripard <maxime@cerno.tech>
--- a/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-3.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-3.dts
@@ -286,6 +286,10 @@
@@ -274,6 +274,10 @@
};
};

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@ -16,7 +16,7 @@ Signed-off-by: Maxime Ripard <maxime@cerno.tech>
--- a/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-3.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-3.dts
@@ -141,6 +141,15 @@
@@ -146,6 +146,15 @@
};
};

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@ -35,7 +35,7 @@ Signed-off-by: Maxime Ripard <maxime@cerno.tech>
#include <dt-bindings/gpio/gpio.h>
@@ -247,12 +248,14 @@
@@ -252,6 +253,7 @@
regulator-always-on;
regulator-min-microvolt = <800000>;
regulator-max-microvolt = <1160000>;
@ -43,10 +43,10 @@ Signed-off-by: Maxime Ripard <maxime@cerno.tech>
regulator-name = "vdd-cpu";
};
reg_dcdcc: dcdcc {
@@ -259,6 +261,7 @@
regulator-enable-ramp-delay = <32000>;
regulator-min-microvolt = <810000>;
regulator-max-microvolt = <1080000>;
+ regulator-ramp-delay = <2500>;
regulator-name = "vdd-gpu";
};

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@ -1,7 +1,7 @@
From 7eeecc4b1f480c7ba1932cb9a7693f8c452640f2 Mon Sep 17 00:00:00 2001
From: Samuel Holland <samuel@sholland.org>
Date: Sun, 3 Jan 2021 05:17:41 -0600
Subject: net: stmmac: dwmac-sun8i: Fix probe error handling
Subject: [PATCH] net: stmmac: dwmac-sun8i: Fix probe error handling
stmmac_pltfr_remove does three things in one function, making it
inapproprate for unwinding the steps in the probe function. Currently,

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@ -1,7 +1,7 @@
From 9b1e39cf5dd81f33186cdb950fcf75a121f1a9a7 Mon Sep 17 00:00:00 2001
From: Samuel Holland <samuel@sholland.org>
Date: Sun, 3 Jan 2021 05:17:44 -0600
Subject: net: stmmac: dwmac-sun8i: Balance syscon (de)initialization
Subject: [PATCH] net: stmmac: dwmac-sun8i: Balance syscon (de)initialization
Previously, sun8i_dwmac_set_syscon was called from a chain of functions
in several different files:

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@ -1,7 +1,7 @@
From 96be41d74f2ee94203f2a61e55927b028a10fea6 Mon Sep 17 00:00:00 2001
From: Samuel Holland <samuel@sholland.org>
Date: Tue, 16 Feb 2021 22:20:06 -0600
Subject: net: stmmac: dwmac-sun8i: Add a shutdown callback
Subject: [PATCH] net: stmmac: dwmac-sun8i: Add a shutdown callback
The Ethernet MAC and PHY are usually major consumers of power on boards
which may not be able to fully power off (those with no PMIC). Powering

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@ -1,7 +1,7 @@
From e3c7934c59e412822cdf805c8107fe3a131ef498 Mon Sep 17 00:00:00 2001
From: Ondrej Jirman
From: Ondrej Jirman <megous@megous.com>
Date: Tue, 20 Aug 2019 14:54:48 +0200
Subject: arm64: dts: allwinner: orange-pi-3: Enable ethernet
Subject: [PATCH] arm64: dts: allwinner: orange-pi-3: Enable ethernet
Orange Pi 3 has two regulators that power the Realtek RTL8211E
PHY. According to the datasheet, both regulators need to be enabled
@ -25,7 +25,7 @@ of the range of working values was chosen.
Signed-off-by: Ondrej Jirman <megous@megous.com>
---
.../boot/dts/allwinner/sun50i-h6-orangepi-3.dts | 40 ++++++++++++++++++++++
.../dts/allwinner/sun50i-h6-orangepi-3.dts | 40 +++++++++++++++++++
1 file changed, 40 insertions(+)
--- a/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-3.dts

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@ -0,0 +1,46 @@
--- a/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-3.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-3.dts
@@ -18,6 +18,11 @@
serial0 = &uart0;
serial1 = &uart1;
ethernet0 = &emac;
+
+ led-boot = &led_status;
+ led-failsafe = &led_status;
+ led-running = &led_status;
+ led-upgrade = &led_status;
};
chosen {
@@ -45,7 +50,7 @@
default-state = "on";
};
- status {
+ led_status: status {
label = "orangepi:green:status";
gpios = <&r_pio 0 7 GPIO_ACTIVE_HIGH>; /* PL7 */
};
--- a/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi.dtsi
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi.dtsi
@@ -17,6 +17,11 @@
aliases {
serial0 = &uart0;
+
+ led-boot = &led_status;
+ led-failsafe = &led_status;
+ led-running = &led_status;
+ led-upgrade = &led_status;
};
chosen {
@@ -32,7 +37,7 @@
default-state = "on";
};
- status {
+ led_status: status {
label = "orangepi:green:status";
gpios = <&r_pio 0 7 GPIO_ACTIVE_HIGH>; /* PL7 */
};

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@ -1,66 +0,0 @@
From 2a63f7145be53b10c0e0c3b1be2e486a6bcadd51 Mon Sep 17 00:00:00 2001
From: Ondrej Jirman
Date: Fri, 20 Sep 2019 19:23:55 +0200
Subject: arm64: dts: sun50i-h6: Add HDMI sound card nodes
From Jernej / LibreELEC.
Signed-off-by: Ondrej Jirman <megous@megous.com>
---
arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi | 31 ++++++++++++++++++++++++++++
1 file changed, 31 insertions(+)
--- a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
@@ -109,6 +109,23 @@
(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
};
+ sound_hdmi: sound {
+ compatible = "simple-audio-card";
+ simple-audio-card,format = "i2s";
+ simple-audio-card,name = "allwinner-hdmi";
+ simple-audio-card,mclk-fs = <256>;
+
+ simple-audio-card,codec {
+ sound-dai = <&hdmi>;
+ };
+
+ simple-audio-card,cpu {
+ sound-dai = <&i2s1>;
+ dai-tdm-slot-num = <2>;
+ dai-tdm-slot-width = <32>;
+ };
+ };
+
soc {
compatible = "simple-bus";
#address-cells = <1>;
@@ -536,6 +553,19 @@
status = "disabled";
};
+ i2s1: i2s@5091000 {
+ #sound-dai-cells = <0>;
+ compatible = "allwinner,sun50i-h6-i2s";
+ reg = <0x05091000 0x1000>;
+ interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&ccu CLK_BUS_I2S1>, <&ccu CLK_I2S1>;
+ clock-names = "apb", "mod";
+ dmas = <&dma 4>;
+ resets = <&ccu RST_BUS_I2S1>;
+ dma-names = "tx";
+ allwinner,playback-channels = <8>;
+ };
+
usb2otg: usb@5100000 {
compatible = "allwinner,sun50i-h6-musb",
"allwinner,sun8i-a33-musb";
@@ -655,6 +685,7 @@
};
hdmi: hdmi@6000000 {
+ #sound-dai-cells = <0>;
compatible = "allwinner,sun50i-h6-dw-hdmi";
reg = <0x06000000 0x10000>;
reg-io-width = <1>;

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@ -1,96 +0,0 @@
From f6644778f7384fa954a78f228f5bc9b31aed58ed Mon Sep 17 00:00:00 2001
From: Tomeu Vizoso
Date: Wed, 29 May 2019 17:32:55 +0200
Subject: arm64: dts: allwinner: Add GPU operating points for H6
The GPU driver needs them to change the clock frequency and regulator
voltage depending on the load.
Signed-off-by: Tomeu Vizoso <tomeu.vizoso@collabora.com>
Cc: Clément Péron <peron.clem@gmail.com>
---
arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi | 66 ++++++++++++++++++++++++++++
1 file changed, 66 insertions(+)
--- a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
@@ -188,6 +188,71 @@
allwinner,sram = <&ve_sram 1>;
};
+ gpu_opp_table: opp-table2 {
+ compatible = "operating-points-v2";
+
+ opp00 {
+ opp-hz = /bits/ 64 <756000000>;
+ opp-microvolt = <1040000>;
+ };
+ opp01 {
+ opp-hz = /bits/ 64 <624000000>;
+ opp-microvolt = <950000>;
+ };
+ opp02 {
+ opp-hz = /bits/ 64 <576000000>;
+ opp-microvolt = <930000>;
+ };
+ opp03 {
+ opp-hz = /bits/ 64 <540000000>;
+ opp-microvolt = <910000>;
+ };
+ opp04 {
+ opp-hz = /bits/ 64 <504000000>;
+ opp-microvolt = <890000>;
+ };
+ opp05 {
+ opp-hz = /bits/ 64 <456000000>;
+ opp-microvolt = <870000>;
+ };
+ opp06 {
+ opp-hz = /bits/ 64 <432000000>;
+ opp-microvolt = <860000>;
+ };
+ opp07 {
+ opp-hz = /bits/ 64 <420000000>;
+ opp-microvolt = <850000>;
+ };
+ opp08 {
+ opp-hz = /bits/ 64 <408000000>;
+ opp-microvolt = <840000>;
+ };
+ opp09 {
+ opp-hz = /bits/ 64 <384000000>;
+ opp-microvolt = <830000>;
+ };
+ opp10 {
+ opp-hz = /bits/ 64 <360000000>;
+ opp-microvolt = <820000>;
+ };
+ opp11 {
+ opp-hz = /bits/ 64 <336000000>;
+ opp-microvolt = <810000>;
+ };
+ opp12 {
+ opp-hz = /bits/ 64 <312000000>;
+ opp-microvolt = <810000>;
+ };
+ opp13 {
+ opp-hz = /bits/ 64 <264000000>;
+ opp-microvolt = <810000>;
+ };
+ opp14 {
+ opp-hz = /bits/ 64 <216000000>;
+ opp-microvolt = <810000>;
+ };
+ };
+
gpu: gpu@1800000 {
compatible = "allwinner,sun50i-h6-mali",
"arm,mali-t720";
@@ -199,6 +264,7 @@
clocks = <&ccu CLK_GPU>, <&ccu CLK_BUS_GPU>;
clock-names = "core", "bus";
resets = <&ccu RST_BUS_GPU>;
+ operating-points-v2 = <&gpu_opp_table>;
status = "disabled";
};

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@ -1,7 +1,7 @@
From 3a3014ac153888453128cd4441dc99be2427454a Mon Sep 17 00:00:00 2001
From: Ondrej Jirman
From: Ondrej Jirman <megous@megous.com>
Date: Wed, 27 Mar 2019 13:21:06 +0100
Subject: net: stmmac: sun8i: Use devm_regulator_get for PHY regulator
Subject: [PATCH] net: stmmac: sun8i: Use devm_regulator_get for PHY regulator
Use devm_regulator_get instead of devm_regulator_get_optional and rely
on dummy supply. This avoids NULL checks before regulator_enable/disable
@ -17,7 +17,7 @@ code will be simpler.
Signed-off-by: Ondrej Jirman <megous@megous.com>
---
drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c | 23 ++++++++++-------------
.../net/ethernet/stmicro/stmmac/dwmac-sun8i.c | 23 ++++++++-----------
1 file changed, 10 insertions(+), 13 deletions(-)
--- a/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c

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@ -1,34 +0,0 @@
From 87c558ad8da5661fcad961c4f92b9dd30db50d0e Mon Sep 17 00:00:00 2001
From: Tianling Shen <cnsztl@immortalwrt.org>
Date: Sat, 19 Jun 2021 12:09:34 +0800
Subject: [PATCH] arm64: dts: allwinner: h6: orangepi-3: add status LED aliases
Use the Power LED on the casing for showing system status.
Signed-off-by: Tianling Shen <cnsztl@immortalwrt.org>
---
arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-3.dts | 6 +++++-
1 file changed, 5 insertions(+), 1 deletion(-)
--- a/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-3.dts
+++ b/arch/arm64/boot/dts/allwinner/sun50i-h6-orangepi-3.dts
@@ -18,6 +18,10 @@
serial0 = &uart0;
serial1 = &uart1;
ethernet0 = &emac;
+ led-boot = &led_power;
+ led-failsafe = &led_power;
+ led-running = &led_power;
+ led-upgrade = &led_power;
};
chosen {
@@ -39,7 +43,7 @@
leds {
compatible = "gpio-leds";
- power {
+ led_power: power {
label = "orangepi:red:power";
gpios = <&r_pio 0 4 GPIO_ACTIVE_HIGH>; /* PL4 */
default-state = "on";

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@ -1,14 +1,15 @@
From 2958cb818095ddaaf8b4c77db121638da30e09d2 Mon Sep 17 00:00:00 2001
From: Ondrej Jirman
From: Ondrej Jirman <megous@megous.com>
Date: Tue, 20 Aug 2019 14:29:29 +0200
Subject: net: stmmac: sun8i: Rename PHY regulator variable to regulator_phy
Subject: [PATCH] net: stmmac: sun8i: Rename PHY regulator variable to
regulator_phy
We'll be adding further optional regulators, and this makes it clearer
what the regulator is for.
Signed-off-by: Ondrej Jirman <megous@megous.com>
---
drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c | 40 +++++++++++------------
.../net/ethernet/stmicro/stmmac/dwmac-sun8i.c | 40 ++++++++++---------
1 file changed, 20 insertions(+), 20 deletions(-)
--- a/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c

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@ -1,8 +1,8 @@
From 7cd35735f61c80cb8e2eaae493cb7a76d6c5c68b Mon Sep 17 00:00:00 2001
From: Ondrej Jirman
From: Ondrej Jirman <megous@megous.com>
Date: Tue, 20 Aug 2019 14:31:38 +0200
Subject: net: stmmac: sun8i: Add support for enabling a regulator for PHY I/O
pins
Subject: [PATCH] net: stmmac: sun8i: Add support for enabling a regulator for
PHY I/O pins
Orange Pi 3 has two regulators that power the Realtek RTL8211E. According
to the phy datasheet, both regulators need to be enabled at the same time.
@ -12,7 +12,7 @@ driver.
Signed-off-by: Ondrej Jirman <megous@megous.com>
---
drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c | 22 +++++++++++++++++++++-
.../net/ethernet/stmicro/stmmac/dwmac-sun8i.c | 22 ++++++++++++++++---
1 file changed, 21 insertions(+), 1 deletion(-)
--- a/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c

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@ -14,7 +14,7 @@ Subject: [PATCH] kernel: dma: adjust default coherent_pool to 2MiB
static struct gen_pool *atomic_pool __ro_after_init;
-#define DEFAULT_DMA_COHERENT_POOL_SIZE SZ_256K
+#define DEFAULT_DMA_COHERENT_POOL_SIZE SZ_2M
+#define DEFAULT_DMA_COHERENT_POOL_SIZE SZ_2M
static size_t atomic_pool_size __initdata = DEFAULT_DMA_COHERENT_POOL_SIZE;
static int __init early_coherent_pool(char *p)