From d2a8ed49313a1456484414e195afba170cd34acc Mon Sep 17 00:00:00 2001 From: CN_SZTL Date: Sat, 12 Oct 2019 15:55:41 +0800 Subject: [PATCH] toolchain/gcc: switch to version 8 by default --- rules.mk | 8 +- toolchain/gcc/Config.in | 12 +- toolchain/gcc/Config.version | 24 +- toolchain/gcc/common.mk | 36 +- toolchain/gcc/exclude-testsuite | 0 toolchain/gcc/files/alternate-arch-cc.in | 0 ...efine-__always_inline-in-local_atomi.patch | 1092 +++++++++++++++++ .../002-case_insensitive.patch | 0 .../{8.2.0 => 8.3.0}/010-documentation.patch | 0 .../110-Fix-MIPS-PR-84790.patch | 0 .../{8.2.0 => 8.3.0}/230-musl_libssp.patch | 0 .../300-mips_Os_cpu_rtx_cost_model.patch | 0 .../800-arm_v5te_no_ldrd_strd.patch | 0 .../810-arm-softfloat-libgcc.patch | 0 .../{8.2.0 => 8.3.0}/820-libgcc_pic.patch | 0 .../840-armv4_pass_fix-v4bx_to_ld.patch | 0 .../850-use_shared_libgcc.patch | 0 .../851-libgcc_no_compat.patch | 0 .../870-ppc_no_crtsavres.patch | 2 +- .../{8.2.0 => 8.3.0}/881-no_tm_section.patch | 0 .../{8.2.0 => 8.3.0}/900-bad-mips16-crt.patch | 0 .../{8.2.0 => 8.3.0}/910-mbsd_multi.patch | 4 +- .../920-specs_nonfatal_getenv.patch | 0 .../930-fix-mips-noexecstack.patch | 0 ...ibffi-fix-MIPS-softfloat-build-issue.patch | 0 ...mpilation-when-making-cross-compiler.patch | 0 .../002-case_insensitive.patch | 0 .../010-documentation.patch | 2 +- ...uninitialised_use_in_mips_split_move.patch | 55 + .../patches/9.2.0/110-Fix-MIPS-PR-84790.patch | 20 + .../gcc/patches/9.2.0/230-musl_libssp.patch | 13 + .../300-mips_Os_cpu_rtx_cost_model.patch | 2 +- .../810-arm-softfloat-libgcc.patch | 0 .../820-libgcc_pic.patch | 6 +- .../840-armv4_pass_fix-v4bx_to_ld.patch | 2 +- .../850-use_shared_libgcc.patch | 12 +- .../851-libgcc_no_compat.patch | 0 .../patches/9.2.0/870-ppc_no_crtsavres.patch | 11 + .../gcc/patches/9.2.0/881-no_tm_section.patch | 11 + .../patches/9.2.0/900-bad-mips16-crt.patch | 9 + .../910-mbsd_multi.patch | 40 +- .../920-specs_nonfatal_getenv.patch | 4 +- .../930-fix-mips-noexecstack.patch | 6 +- ...ibffi-fix-MIPS-softfloat-build-issue.patch | 168 +++ ...mpilation-when-making-cross-compiler.patch | 67 + .../001-revert_register_mode_search.patch | 77 -- .../arc-2017.09-release/230-musl_libssp.patch | 28 - .../800-arm_v5te_no_ldrd_strd.patch | 32 - .../870-ppc_no_crtsavres.patch | 18 - .../881-no_tm_section.patch | 22 - .../900-bad-mips16-crt.patch | 30 - .../940-no-clobber-stamp-bits.patch | 33 - .../950-cpp_file_path_translation.patch | 181 --- 53 files changed, 1524 insertions(+), 503 deletions(-) mode change 100755 => 100644 toolchain/gcc/Config.in mode change 100755 => 100644 toolchain/gcc/Config.version mode change 100755 => 100644 toolchain/gcc/common.mk mode change 100755 => 100644 toolchain/gcc/exclude-testsuite mode change 100755 => 100644 toolchain/gcc/files/alternate-arch-cc.in create mode 100644 toolchain/gcc/patches/5.5.0/050-libitm-Don-t-redefine-__always_inline-in-local_atomi.patch rename toolchain/gcc/patches/{8.2.0 => 8.3.0}/002-case_insensitive.patch (100%) rename toolchain/gcc/patches/{8.2.0 => 8.3.0}/010-documentation.patch (100%) rename toolchain/gcc/patches/{8.2.0 => 8.3.0}/110-Fix-MIPS-PR-84790.patch (100%) rename toolchain/gcc/patches/{8.2.0 => 8.3.0}/230-musl_libssp.patch (100%) rename toolchain/gcc/patches/{8.2.0 => 8.3.0}/300-mips_Os_cpu_rtx_cost_model.patch (100%) rename toolchain/gcc/patches/{8.2.0 => 8.3.0}/800-arm_v5te_no_ldrd_strd.patch (100%) rename toolchain/gcc/patches/{8.2.0 => 8.3.0}/810-arm-softfloat-libgcc.patch (100%) rename toolchain/gcc/patches/{8.2.0 => 8.3.0}/820-libgcc_pic.patch (100%) rename toolchain/gcc/patches/{8.2.0 => 8.3.0}/840-armv4_pass_fix-v4bx_to_ld.patch (100%) rename toolchain/gcc/patches/{8.2.0 => 8.3.0}/850-use_shared_libgcc.patch (100%) rename toolchain/gcc/patches/{8.2.0 => 8.3.0}/851-libgcc_no_compat.patch (100%) rename toolchain/gcc/patches/{8.2.0 => 8.3.0}/870-ppc_no_crtsavres.patch (84%) rename toolchain/gcc/patches/{8.2.0 => 8.3.0}/881-no_tm_section.patch (100%) rename toolchain/gcc/patches/{8.2.0 => 8.3.0}/900-bad-mips16-crt.patch (100%) rename toolchain/gcc/patches/{8.2.0 => 8.3.0}/910-mbsd_multi.patch (97%) rename toolchain/gcc/patches/{8.2.0 => 8.3.0}/920-specs_nonfatal_getenv.patch (100%) rename toolchain/gcc/patches/{8.2.0 => 8.3.0}/930-fix-mips-noexecstack.patch (100%) rename toolchain/gcc/patches/{8.2.0 => 8.3.0}/931-libffi-fix-MIPS-softfloat-build-issue.patch (100%) rename toolchain/gcc/patches/{8.2.0 => 8.3.0}/960-gotools-fix-compilation-when-making-cross-compiler.patch (100%) rename toolchain/gcc/patches/{arc-2017.09-release => 9.2.0}/002-case_insensitive.patch (100%) rename toolchain/gcc/patches/{arc-2017.09-release => 9.2.0}/010-documentation.patch (94%) create mode 100644 toolchain/gcc/patches/9.2.0/100-Fix_uninitialised_use_in_mips_split_move.patch create mode 100644 toolchain/gcc/patches/9.2.0/110-Fix-MIPS-PR-84790.patch create mode 100644 toolchain/gcc/patches/9.2.0/230-musl_libssp.patch rename toolchain/gcc/patches/{arc-2017.09-release => 9.2.0}/300-mips_Os_cpu_rtx_cost_model.patch (91%) rename toolchain/gcc/patches/{arc-2017.09-release => 9.2.0}/810-arm-softfloat-libgcc.patch (100%) rename toolchain/gcc/patches/{arc-2017.09-release => 9.2.0}/820-libgcc_pic.patch (90%) rename toolchain/gcc/patches/{arc-2017.09-release => 9.2.0}/840-armv4_pass_fix-v4bx_to_ld.patch (97%) rename toolchain/gcc/patches/{arc-2017.09-release => 9.2.0}/850-use_shared_libgcc.patch (89%) rename toolchain/gcc/patches/{arc-2017.09-release => 9.2.0}/851-libgcc_no_compat.patch (100%) create mode 100644 toolchain/gcc/patches/9.2.0/870-ppc_no_crtsavres.patch create mode 100644 toolchain/gcc/patches/9.2.0/881-no_tm_section.patch create mode 100644 toolchain/gcc/patches/9.2.0/900-bad-mips16-crt.patch rename toolchain/gcc/patches/{arc-2017.09-release => 9.2.0}/910-mbsd_multi.patch (84%) rename toolchain/gcc/patches/{arc-2017.09-release => 9.2.0}/920-specs_nonfatal_getenv.patch (87%) rename toolchain/gcc/patches/{arc-2017.09-release => 9.2.0}/930-fix-mips-noexecstack.patch (95%) create mode 100644 toolchain/gcc/patches/9.2.0/931-libffi-fix-MIPS-softfloat-build-issue.patch create mode 100644 toolchain/gcc/patches/9.2.0/960-gotools-fix-compilation-when-making-cross-compiler.patch delete mode 100644 toolchain/gcc/patches/arc-2017.09-release/001-revert_register_mode_search.patch delete mode 100644 toolchain/gcc/patches/arc-2017.09-release/230-musl_libssp.patch delete mode 100644 toolchain/gcc/patches/arc-2017.09-release/800-arm_v5te_no_ldrd_strd.patch delete mode 100644 toolchain/gcc/patches/arc-2017.09-release/870-ppc_no_crtsavres.patch delete mode 100644 toolchain/gcc/patches/arc-2017.09-release/881-no_tm_section.patch delete mode 100644 toolchain/gcc/patches/arc-2017.09-release/900-bad-mips16-crt.patch delete mode 100644 toolchain/gcc/patches/arc-2017.09-release/940-no-clobber-stamp-bits.patch delete mode 100644 toolchain/gcc/patches/arc-2017.09-release/950-cpp_file_path_translation.patch diff --git a/rules.mk b/rules.mk index e97b3f6491..1bf59fbb4a 100644 --- a/rules.mk +++ b/rules.mk @@ -139,11 +139,11 @@ else TOOLCHAIN_DIR_NAME:=toolchain-$(GNU_TARGET_NAME) endif -ifeq ($(or $(CONFIG_EXTERNAL_TOOLCHAIN),$(CONFIG_GCC_VERSION_4_8),$(CONFIG_TARGET_uml)),) - ifeq ($(CONFIG_GCC_USE_EMBEDDED_PATH_REMAP),y) - iremap = -fmacro-prefix-map=$(1)=$(2) - else +ifeq ($(or $(CONFIG_EXTERNAL_TOOLCHAIN),$(CONFIG_TARGET_uml)),) + ifeq ($(CONFIG_GCC_USE_IREMAP),y) iremap = -iremap$(1):$(2) + else + iremap = -ffile-prefix-map=$(1)=$(2) endif endif diff --git a/toolchain/gcc/Config.in b/toolchain/gcc/Config.in old mode 100755 new mode 100644 index c3208d372c..7d7f34210a --- a/toolchain/gcc/Config.in +++ b/toolchain/gcc/Config.in @@ -2,16 +2,10 @@ choice prompt "GCC compiler Version" if TOOLCHAINOPTS - default GCC_USE_VERSION_7_1_ARC if arc - default GCC_USE_VERSION_7 + default GCC_USE_VERSION_8 help Select the version of gcc you wish to use. - config GCC_USE_VERSION_7_1_ARC - select GCC_VERSION_7_1_ARC - bool "gcc 7.1.x with support of ARC cores" - depends on arc - config GCC_USE_VERSION_5 bool "gcc 5.x" depends on !arc @@ -22,7 +16,9 @@ choice config GCC_USE_VERSION_8 bool "gcc 8.x" - depends on !arc + + config GCC_USE_VERSION_9 + bool "gcc 9.x" endchoice config GCC_USE_GRAPHITE diff --git a/toolchain/gcc/Config.version b/toolchain/gcc/Config.version old mode 100755 new mode 100644 index 9bfe1b8aaf..687857bd1f --- a/toolchain/gcc/Config.version +++ b/toolchain/gcc/Config.version @@ -1,23 +1,23 @@ -config GCC_VERSION_7_1_ARC - default y if (!TOOLCHAINOPTS && arc) - bool - config GCC_VERSION_5 default y if GCC_USE_VERSION_5 bool -config GCC_VERSION_8 - default y if GCC_USE_VERSION_8 +config GCC_VERSION_7 + default y if GCC_USE_VERSION_7 bool -config GCC_USE_EMBEDDED_PATH_REMAP - default y if GCC_VERSION_8 - default n +config GCC_VERSION_9 + default y if GCC_USE_VERSION_9 bool config GCC_VERSION string default "5.5.0" if GCC_VERSION_5 - default "arc-2017.09-release" if GCC_VERSION_7_1_ARC - default "8.2.0" if GCC_VERSION_8 - default "7.4.0" + default "7.4.0" if GCC_VERSION_7 + default "9.2.0" if GCC_VERSION_9 + default "8.3.0" + +config GCC_USE_IREMAP + bool + default y if ( GCC_USE_VERSION_5 || GCC_USE_VERSION_7 ) + default n diff --git a/toolchain/gcc/common.mk b/toolchain/gcc/common.mk old mode 100755 new mode 100644 index b75fce57ef..883d2a0b4a --- a/toolchain/gcc/common.mk +++ b/toolchain/gcc/common.mk @@ -36,23 +36,17 @@ ifeq ($(PKG_VERSION),7.4.0) PKG_HASH:=eddde28d04f334aec1604456e536416549e9b1aa137fc69204e65eb0c009fe51 endif -ifeq ($(PKG_VERSION),8.2.0) - PKG_HASH:=196c3c04ba2613f893283977e6011b2345d1cd1af9abeac58e916b1aab3e0080 +ifeq ($(PKG_VERSION),8.3.0) + PKG_HASH:=64baadfe6cc0f4947a84cb12d7f0dfaf45bb58b7e92461639596c21e02d97d2c endif -ifneq ($(CONFIG_GCC_VERSION_7_1_ARC),) - PKG_VERSION:=7.1.1 - PKG_SOURCE_URL:=https://github.com/foss-for-synopsys-dwc-arc-processors/gcc/archive/$(GCC_VERSION) - PKG_SOURCE:=$(PKG_NAME)-$(GCC_VERSION).tar.gz - PKG_HASH:=90596af8b9c26a434cec0a3b3d37d0c7c755ab6a65496af6ca32529fab5a6cfe - PKG_REV:=2017.09-release - GCC_DIR:=gcc-arc-$(PKG_REV) - HOST_BUILD_DIR = $(BUILD_DIR_HOST)/$(PKG_NAME)-$(GCC_VERSION) +ifeq ($(PKG_VERSION),9.2.0) + PKG_HASH:=ea6ef08f121239da5695f76c9b33637a118dcf63e24164422231917fa61fb206 endif PATCH_DIR=../patches/$(GCC_VERSION) -BUGURL=http://www.lede-project.org/bugs/ +BUGURL=http://bugs.openwrt.org/ PKGVERSION=OpenWrt GCC $(PKG_VERSION) $(REVISION) HOST_BUILD_PARALLEL:=1 @@ -123,15 +117,12 @@ GCC_CONFIGURE:= \ --with-gmp=$(TOPDIR)/staging_dir/host \ --with-mpfr=$(TOPDIR)/staging_dir/host \ --with-mpc=$(TOPDIR)/staging_dir/host \ - --disable-decimal-float + --disable-decimal-float \ + --with-diagnostics-color=auto-if-env ifneq ($(CONFIG_mips)$(CONFIG_mipsel),) GCC_CONFIGURE += --with-mips-plt endif -ifndef GCC_VERSION_4_8 - GCC_CONFIGURE += --with-diagnostics-color=auto-if-env -endif - ifneq ($(CONFIG_GCC_DEFAULT_PIE),) GCC_CONFIGURE+= \ --enable-default-pie @@ -174,11 +165,20 @@ ifneq ($(GCC_ARCH),) GCC_CONFIGURE+= --with-arch=$(GCC_ARCH) endif -ifneq ($(CONFIG_SOFT_FLOAT),y) - ifeq ($(CONFIG_arm),y) +ifeq ($(CONFIG_arm),y) + GCC_CONFIGURE+= \ + --with-cpu=$(word 1, $(subst +," ,$(CONFIG_CPU_TYPE))) + + ifneq ($(CONFIG_SOFT_FLOAT),y) GCC_CONFIGURE+= \ + --with-fpu=$(word 2, $(subst +, ",$(CONFIG_CPU_TYPE))) \ --with-float=hard endif + + # Do not let TARGET_CFLAGS get poisoned by extra CPU optimization flags + # that do not belong here. The cpu,fpu type should be specified via + # --with-cpu and --with-fpu for ARM and not CFLAGS. + TARGET_CFLAGS:=$(filter-out -m%,$(call qstrip,$(TARGET_CFLAGS))) endif ifeq ($(CONFIG_TARGET_x86)$(CONFIG_USE_GLIBC)$(CONFIG_INSTALL_GCCGO),yyy) diff --git a/toolchain/gcc/exclude-testsuite b/toolchain/gcc/exclude-testsuite old mode 100755 new mode 100644 diff --git a/toolchain/gcc/files/alternate-arch-cc.in b/toolchain/gcc/files/alternate-arch-cc.in old mode 100755 new mode 100644 diff --git a/toolchain/gcc/patches/5.5.0/050-libitm-Don-t-redefine-__always_inline-in-local_atomi.patch b/toolchain/gcc/patches/5.5.0/050-libitm-Don-t-redefine-__always_inline-in-local_atomi.patch new file mode 100644 index 0000000000..5ec93f5247 --- /dev/null +++ b/toolchain/gcc/patches/5.5.0/050-libitm-Don-t-redefine-__always_inline-in-local_atomi.patch @@ -0,0 +1,1092 @@ +From 55f12fce4ccf77513644a247f9c401a5b1fa2402 Mon Sep 17 00:00:00 2001 +From: torvald +Date: Thu, 20 Aug 2015 17:55:24 +0000 +Subject: [PATCH] libitm: Don't redefine __always_inline in local_atomic. + +git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@227040 138bc75d-0d04-0410-961f-82ee72b054a4 +--- + libitm/ChangeLog | 6 + + libitm/local_atomic | 299 ++++++++++++++++++++++---------------------- + 2 files changed, 155 insertions(+), 150 deletions(-) + +diff --git a/libitm/ChangeLog b/libitm/ChangeLog +index 569d5bbbf14..6285c85fd44 100644 +--- a/libitm/ChangeLog ++++ b/libitm/ChangeLog +@@ -1,3 +1,9 @@ ++2015-08-20 Gleb Fotengauer-Malinovskiy (tiny change) ++ ++ PR libitm/61164 ++ * local_atomic (__always_inline): Rename to... ++ (__libitm_always_inline): ... this. ++ + 2017-10-10 Release Manager + + PR target/52482 +diff --git a/libitm/local_atomic b/libitm/local_atomic +index 3119be40d09..e536275dc9f 100644 +--- a/libitm/local_atomic ++++ b/libitm/local_atomic +@@ -41,8 +41,7 @@ + #ifndef _GLIBCXX_ATOMIC + #define _GLIBCXX_ATOMIC 1 + +-#undef __always_inline +-#define __always_inline __attribute__((always_inline)) ++#define __libitm_always_inline __attribute__((always_inline)) + + // #pragma GCC system_header + +@@ -74,7 +73,7 @@ namespace std // _GLIBCXX_VISIBILITY(default) + memory_order_seq_cst + } memory_order; + +- inline __always_inline memory_order ++ inline __libitm_always_inline memory_order + __calculate_memory_order(memory_order __m) noexcept + { + const bool __cond1 = __m == memory_order_release; +@@ -84,13 +83,13 @@ namespace std // _GLIBCXX_VISIBILITY(default) + return __mo2; + } + +- inline __always_inline void ++ inline __libitm_always_inline void + atomic_thread_fence(memory_order __m) noexcept + { + __atomic_thread_fence (__m); + } + +- inline __always_inline void ++ inline __libitm_always_inline void + atomic_signal_fence(memory_order __m) noexcept + { + __atomic_thread_fence (__m); +@@ -280,19 +279,19 @@ namespace std // _GLIBCXX_VISIBILITY(default) + // Conversion to ATOMIC_FLAG_INIT. + atomic_flag(bool __i) noexcept : __atomic_flag_base({ __i }) { } + +- __always_inline bool ++ __libitm_always_inline bool + test_and_set(memory_order __m = memory_order_seq_cst) noexcept + { + return __atomic_test_and_set (&_M_i, __m); + } + +- __always_inline bool ++ __libitm_always_inline bool + test_and_set(memory_order __m = memory_order_seq_cst) volatile noexcept + { + return __atomic_test_and_set (&_M_i, __m); + } + +- __always_inline void ++ __libitm_always_inline void + clear(memory_order __m = memory_order_seq_cst) noexcept + { + // __glibcxx_assert(__m != memory_order_consume); +@@ -302,7 +301,7 @@ namespace std // _GLIBCXX_VISIBILITY(default) + __atomic_clear (&_M_i, __m); + } + +- __always_inline void ++ __libitm_always_inline void + clear(memory_order __m = memory_order_seq_cst) volatile noexcept + { + // __glibcxx_assert(__m != memory_order_consume); +@@ -455,7 +454,7 @@ namespace std // _GLIBCXX_VISIBILITY(default) + is_lock_free() const volatile noexcept + { return __atomic_is_lock_free (sizeof (_M_i), &_M_i); } + +- __always_inline void ++ __libitm_always_inline void + store(__int_type __i, memory_order __m = memory_order_seq_cst) noexcept + { + // __glibcxx_assert(__m != memory_order_acquire); +@@ -465,7 +464,7 @@ namespace std // _GLIBCXX_VISIBILITY(default) + __atomic_store_n(&_M_i, __i, __m); + } + +- __always_inline void ++ __libitm_always_inline void + store(__int_type __i, + memory_order __m = memory_order_seq_cst) volatile noexcept + { +@@ -476,7 +475,7 @@ namespace std // _GLIBCXX_VISIBILITY(default) + __atomic_store_n(&_M_i, __i, __m); + } + +- __always_inline __int_type ++ __libitm_always_inline __int_type + load(memory_order __m = memory_order_seq_cst) const noexcept + { + // __glibcxx_assert(__m != memory_order_release); +@@ -485,7 +484,7 @@ namespace std // _GLIBCXX_VISIBILITY(default) + return __atomic_load_n(&_M_i, __m); + } + +- __always_inline __int_type ++ __libitm_always_inline __int_type + load(memory_order __m = memory_order_seq_cst) const volatile noexcept + { + // __glibcxx_assert(__m != memory_order_release); +@@ -494,21 +493,21 @@ namespace std // _GLIBCXX_VISIBILITY(default) + return __atomic_load_n(&_M_i, __m); + } + +- __always_inline __int_type ++ __libitm_always_inline __int_type + exchange(__int_type __i, + memory_order __m = memory_order_seq_cst) noexcept + { + return __atomic_exchange_n(&_M_i, __i, __m); + } + +- __always_inline __int_type ++ __libitm_always_inline __int_type + exchange(__int_type __i, + memory_order __m = memory_order_seq_cst) volatile noexcept + { + return __atomic_exchange_n(&_M_i, __i, __m); + } + +- __always_inline bool ++ __libitm_always_inline bool + compare_exchange_weak(__int_type& __i1, __int_type __i2, + memory_order __m1, memory_order __m2) noexcept + { +@@ -519,7 +518,7 @@ namespace std // _GLIBCXX_VISIBILITY(default) + return __atomic_compare_exchange_n(&_M_i, &__i1, __i2, 1, __m1, __m2); + } + +- __always_inline bool ++ __libitm_always_inline bool + compare_exchange_weak(__int_type& __i1, __int_type __i2, + memory_order __m1, + memory_order __m2) volatile noexcept +@@ -531,7 +530,7 @@ namespace std // _GLIBCXX_VISIBILITY(default) + return __atomic_compare_exchange_n(&_M_i, &__i1, __i2, 1, __m1, __m2); + } + +- __always_inline bool ++ __libitm_always_inline bool + compare_exchange_weak(__int_type& __i1, __int_type __i2, + memory_order __m = memory_order_seq_cst) noexcept + { +@@ -539,7 +538,7 @@ namespace std // _GLIBCXX_VISIBILITY(default) + __calculate_memory_order(__m)); + } + +- __always_inline bool ++ __libitm_always_inline bool + compare_exchange_weak(__int_type& __i1, __int_type __i2, + memory_order __m = memory_order_seq_cst) volatile noexcept + { +@@ -547,7 +546,7 @@ namespace std // _GLIBCXX_VISIBILITY(default) + __calculate_memory_order(__m)); + } + +- __always_inline bool ++ __libitm_always_inline bool + compare_exchange_strong(__int_type& __i1, __int_type __i2, + memory_order __m1, memory_order __m2) noexcept + { +@@ -558,7 +557,7 @@ namespace std // _GLIBCXX_VISIBILITY(default) + return __atomic_compare_exchange_n(&_M_i, &__i1, __i2, 0, __m1, __m2); + } + +- __always_inline bool ++ __libitm_always_inline bool + compare_exchange_strong(__int_type& __i1, __int_type __i2, + memory_order __m1, + memory_order __m2) volatile noexcept +@@ -570,7 +569,7 @@ namespace std // _GLIBCXX_VISIBILITY(default) + return __atomic_compare_exchange_n(&_M_i, &__i1, __i2, 0, __m1, __m2); + } + +- __always_inline bool ++ __libitm_always_inline bool + compare_exchange_strong(__int_type& __i1, __int_type __i2, + memory_order __m = memory_order_seq_cst) noexcept + { +@@ -578,7 +577,7 @@ namespace std // _GLIBCXX_VISIBILITY(default) + __calculate_memory_order(__m)); + } + +- __always_inline bool ++ __libitm_always_inline bool + compare_exchange_strong(__int_type& __i1, __int_type __i2, + memory_order __m = memory_order_seq_cst) volatile noexcept + { +@@ -586,52 +585,52 @@ namespace std // _GLIBCXX_VISIBILITY(default) + __calculate_memory_order(__m)); + } + +- __always_inline __int_type ++ __libitm_always_inline __int_type + fetch_add(__int_type __i, + memory_order __m = memory_order_seq_cst) noexcept + { return __atomic_fetch_add(&_M_i, __i, __m); } + +- __always_inline __int_type ++ __libitm_always_inline __int_type + fetch_add(__int_type __i, + memory_order __m = memory_order_seq_cst) volatile noexcept + { return __atomic_fetch_add(&_M_i, __i, __m); } + +- __always_inline __int_type ++ __libitm_always_inline __int_type + fetch_sub(__int_type __i, + memory_order __m = memory_order_seq_cst) noexcept + { return __atomic_fetch_sub(&_M_i, __i, __m); } + +- __always_inline __int_type ++ __libitm_always_inline __int_type + fetch_sub(__int_type __i, + memory_order __m = memory_order_seq_cst) volatile noexcept + { return __atomic_fetch_sub(&_M_i, __i, __m); } + +- __always_inline __int_type ++ __libitm_always_inline __int_type + fetch_and(__int_type __i, + memory_order __m = memory_order_seq_cst) noexcept + { return __atomic_fetch_and(&_M_i, __i, __m); } + +- __always_inline __int_type ++ __libitm_always_inline __int_type + fetch_and(__int_type __i, + memory_order __m = memory_order_seq_cst) volatile noexcept + { return __atomic_fetch_and(&_M_i, __i, __m); } + +- __always_inline __int_type ++ __libitm_always_inline __int_type + fetch_or(__int_type __i, + memory_order __m = memory_order_seq_cst) noexcept + { return __atomic_fetch_or(&_M_i, __i, __m); } + +- __always_inline __int_type ++ __libitm_always_inline __int_type + fetch_or(__int_type __i, + memory_order __m = memory_order_seq_cst) volatile noexcept + { return __atomic_fetch_or(&_M_i, __i, __m); } + +- __always_inline __int_type ++ __libitm_always_inline __int_type + fetch_xor(__int_type __i, + memory_order __m = memory_order_seq_cst) noexcept + { return __atomic_fetch_xor(&_M_i, __i, __m); } + +- __always_inline __int_type ++ __libitm_always_inline __int_type + fetch_xor(__int_type __i, + memory_order __m = memory_order_seq_cst) volatile noexcept + { return __atomic_fetch_xor(&_M_i, __i, __m); } +@@ -733,7 +732,7 @@ namespace std // _GLIBCXX_VISIBILITY(default) + is_lock_free() const volatile noexcept + { return __atomic_is_lock_free (sizeof (_M_p), &_M_p); } + +- __always_inline void ++ __libitm_always_inline void + store(__pointer_type __p, + memory_order __m = memory_order_seq_cst) noexcept + { +@@ -744,7 +743,7 @@ namespace std // _GLIBCXX_VISIBILITY(default) + __atomic_store_n(&_M_p, __p, __m); + } + +- __always_inline void ++ __libitm_always_inline void + store(__pointer_type __p, + memory_order __m = memory_order_seq_cst) volatile noexcept + { +@@ -755,7 +754,7 @@ namespace std // _GLIBCXX_VISIBILITY(default) + __atomic_store_n(&_M_p, __p, __m); + } + +- __always_inline __pointer_type ++ __libitm_always_inline __pointer_type + load(memory_order __m = memory_order_seq_cst) const noexcept + { + // __glibcxx_assert(__m != memory_order_release); +@@ -764,7 +763,7 @@ namespace std // _GLIBCXX_VISIBILITY(default) + return __atomic_load_n(&_M_p, __m); + } + +- __always_inline __pointer_type ++ __libitm_always_inline __pointer_type + load(memory_order __m = memory_order_seq_cst) const volatile noexcept + { + // __glibcxx_assert(__m != memory_order_release); +@@ -773,21 +772,21 @@ namespace std // _GLIBCXX_VISIBILITY(default) + return __atomic_load_n(&_M_p, __m); + } + +- __always_inline __pointer_type ++ __libitm_always_inline __pointer_type + exchange(__pointer_type __p, + memory_order __m = memory_order_seq_cst) noexcept + { + return __atomic_exchange_n(&_M_p, __p, __m); + } + +- __always_inline __pointer_type ++ __libitm_always_inline __pointer_type + exchange(__pointer_type __p, + memory_order __m = memory_order_seq_cst) volatile noexcept + { + return __atomic_exchange_n(&_M_p, __p, __m); + } + +- __always_inline bool ++ __libitm_always_inline bool + compare_exchange_strong(__pointer_type& __p1, __pointer_type __p2, + memory_order __m1, + memory_order __m2) noexcept +@@ -799,7 +798,7 @@ namespace std // _GLIBCXX_VISIBILITY(default) + return __atomic_compare_exchange_n(&_M_p, &__p1, __p2, 0, __m1, __m2); + } + +- __always_inline bool ++ __libitm_always_inline bool + compare_exchange_strong(__pointer_type& __p1, __pointer_type __p2, + memory_order __m1, + memory_order __m2) volatile noexcept +@@ -811,22 +810,22 @@ namespace std // _GLIBCXX_VISIBILITY(default) + return __atomic_compare_exchange_n(&_M_p, &__p1, __p2, 0, __m1, __m2); + } + +- __always_inline __pointer_type ++ __libitm_always_inline __pointer_type + fetch_add(ptrdiff_t __d, + memory_order __m = memory_order_seq_cst) noexcept + { return __atomic_fetch_add(&_M_p, __d, __m); } + +- __always_inline __pointer_type ++ __libitm_always_inline __pointer_type + fetch_add(ptrdiff_t __d, + memory_order __m = memory_order_seq_cst) volatile noexcept + { return __atomic_fetch_add(&_M_p, __d, __m); } + +- __always_inline __pointer_type ++ __libitm_always_inline __pointer_type + fetch_sub(ptrdiff_t __d, + memory_order __m = memory_order_seq_cst) noexcept + { return __atomic_fetch_sub(&_M_p, __d, __m); } + +- __always_inline __pointer_type ++ __libitm_always_inline __pointer_type + fetch_sub(ptrdiff_t __d, + memory_order __m = memory_order_seq_cst) volatile noexcept + { return __atomic_fetch_sub(&_M_p, __d, __m); } +@@ -870,67 +869,67 @@ namespace std // _GLIBCXX_VISIBILITY(default) + bool + is_lock_free() const volatile noexcept { return _M_base.is_lock_free(); } + +- __always_inline void ++ __libitm_always_inline void + store(bool __i, memory_order __m = memory_order_seq_cst) noexcept + { _M_base.store(__i, __m); } + +- __always_inline void ++ __libitm_always_inline void + store(bool __i, memory_order __m = memory_order_seq_cst) volatile noexcept + { _M_base.store(__i, __m); } + +- __always_inline bool ++ __libitm_always_inline bool + load(memory_order __m = memory_order_seq_cst) const noexcept + { return _M_base.load(__m); } + +- __always_inline bool ++ __libitm_always_inline bool + load(memory_order __m = memory_order_seq_cst) const volatile noexcept + { return _M_base.load(__m); } + +- __always_inline bool ++ __libitm_always_inline bool + exchange(bool __i, memory_order __m = memory_order_seq_cst) noexcept + { return _M_base.exchange(__i, __m); } + +- __always_inline bool ++ __libitm_always_inline bool + exchange(bool __i, + memory_order __m = memory_order_seq_cst) volatile noexcept + { return _M_base.exchange(__i, __m); } + +- __always_inline bool ++ __libitm_always_inline bool + compare_exchange_weak(bool& __i1, bool __i2, memory_order __m1, + memory_order __m2) noexcept + { return _M_base.compare_exchange_weak(__i1, __i2, __m1, __m2); } + +- __always_inline bool ++ __libitm_always_inline bool + compare_exchange_weak(bool& __i1, bool __i2, memory_order __m1, + memory_order __m2) volatile noexcept + { return _M_base.compare_exchange_weak(__i1, __i2, __m1, __m2); } + +- __always_inline bool ++ __libitm_always_inline bool + compare_exchange_weak(bool& __i1, bool __i2, + memory_order __m = memory_order_seq_cst) noexcept + { return _M_base.compare_exchange_weak(__i1, __i2, __m); } + +- __always_inline bool ++ __libitm_always_inline bool + compare_exchange_weak(bool& __i1, bool __i2, + memory_order __m = memory_order_seq_cst) volatile noexcept + { return _M_base.compare_exchange_weak(__i1, __i2, __m); } + +- __always_inline bool ++ __libitm_always_inline bool + compare_exchange_strong(bool& __i1, bool __i2, memory_order __m1, + memory_order __m2) noexcept + { return _M_base.compare_exchange_strong(__i1, __i2, __m1, __m2); } + +- __always_inline bool ++ __libitm_always_inline bool + compare_exchange_strong(bool& __i1, bool __i2, memory_order __m1, + memory_order __m2) volatile noexcept + { return _M_base.compare_exchange_strong(__i1, __i2, __m1, __m2); } + +- __always_inline bool ++ __libitm_always_inline bool + compare_exchange_strong(bool& __i1, bool __i2, + memory_order __m = memory_order_seq_cst) noexcept + { return _M_base.compare_exchange_strong(__i1, __i2, __m); } + +- __always_inline bool ++ __libitm_always_inline bool + compare_exchange_strong(bool& __i1, bool __i2, + memory_order __m = memory_order_seq_cst) volatile noexcept + { return _M_base.compare_exchange_strong(__i1, __i2, __m); } +@@ -980,11 +979,11 @@ namespace std // _GLIBCXX_VISIBILITY(default) + store(_Tp __i, memory_order _m = memory_order_seq_cst) noexcept + { __atomic_store(&_M_i, &__i, _m); } + +- __always_inline void ++ __libitm_always_inline void + store(_Tp __i, memory_order _m = memory_order_seq_cst) volatile noexcept + { __atomic_store(&_M_i, &__i, _m); } + +- __always_inline _Tp ++ __libitm_always_inline _Tp + load(memory_order _m = memory_order_seq_cst) const noexcept + { + _Tp tmp; +@@ -992,7 +991,7 @@ namespace std // _GLIBCXX_VISIBILITY(default) + return tmp; + } + +- __always_inline _Tp ++ __libitm_always_inline _Tp + load(memory_order _m = memory_order_seq_cst) const volatile noexcept + { + _Tp tmp; +@@ -1000,7 +999,7 @@ namespace std // _GLIBCXX_VISIBILITY(default) + return tmp; + } + +- __always_inline _Tp ++ __libitm_always_inline _Tp + exchange(_Tp __i, memory_order _m = memory_order_seq_cst) noexcept + { + _Tp tmp; +@@ -1008,7 +1007,7 @@ namespace std // _GLIBCXX_VISIBILITY(default) + return tmp; + } + +- __always_inline _Tp ++ __libitm_always_inline _Tp + exchange(_Tp __i, + memory_order _m = memory_order_seq_cst) volatile noexcept + { +@@ -1017,50 +1016,50 @@ namespace std // _GLIBCXX_VISIBILITY(default) + return tmp; + } + +- __always_inline bool ++ __libitm_always_inline bool + compare_exchange_weak(_Tp& __e, _Tp __i, memory_order __s, + memory_order __f) noexcept + { + return __atomic_compare_exchange(&_M_i, &__e, &__i, true, __s, __f); + } + +- __always_inline bool ++ __libitm_always_inline bool + compare_exchange_weak(_Tp& __e, _Tp __i, memory_order __s, + memory_order __f) volatile noexcept + { + return __atomic_compare_exchange(&_M_i, &__e, &__i, true, __s, __f); + } + +- __always_inline bool ++ __libitm_always_inline bool + compare_exchange_weak(_Tp& __e, _Tp __i, + memory_order __m = memory_order_seq_cst) noexcept + { return compare_exchange_weak(__e, __i, __m, __m); } + +- __always_inline bool ++ __libitm_always_inline bool + compare_exchange_weak(_Tp& __e, _Tp __i, + memory_order __m = memory_order_seq_cst) volatile noexcept + { return compare_exchange_weak(__e, __i, __m, __m); } + +- __always_inline bool ++ __libitm_always_inline bool + compare_exchange_strong(_Tp& __e, _Tp __i, memory_order __s, + memory_order __f) noexcept + { + return __atomic_compare_exchange(&_M_i, &__e, &__i, false, __s, __f); + } + +- __always_inline bool ++ __libitm_always_inline bool + compare_exchange_strong(_Tp& __e, _Tp __i, memory_order __s, + memory_order __f) volatile noexcept + { + return __atomic_compare_exchange(&_M_i, &__e, &__i, false, __s, __f); + } + +- __always_inline bool ++ __libitm_always_inline bool + compare_exchange_strong(_Tp& __e, _Tp __i, + memory_order __m = memory_order_seq_cst) noexcept + { return compare_exchange_strong(__e, __i, __m, __m); } + +- __always_inline bool ++ __libitm_always_inline bool + compare_exchange_strong(_Tp& __e, _Tp __i, + memory_order __m = memory_order_seq_cst) volatile noexcept + { return compare_exchange_strong(__e, __i, __m, __m); } +@@ -1153,46 +1152,46 @@ namespace std // _GLIBCXX_VISIBILITY(default) + is_lock_free() const volatile noexcept + { return _M_b.is_lock_free(); } + +- __always_inline void ++ __libitm_always_inline void + store(__pointer_type __p, + memory_order __m = memory_order_seq_cst) noexcept + { return _M_b.store(__p, __m); } + +- __always_inline void ++ __libitm_always_inline void + store(__pointer_type __p, + memory_order __m = memory_order_seq_cst) volatile noexcept + { return _M_b.store(__p, __m); } + +- __always_inline __pointer_type ++ __libitm_always_inline __pointer_type + load(memory_order __m = memory_order_seq_cst) const noexcept + { return _M_b.load(__m); } + +- __always_inline __pointer_type ++ __libitm_always_inline __pointer_type + load(memory_order __m = memory_order_seq_cst) const volatile noexcept + { return _M_b.load(__m); } + +- __always_inline __pointer_type ++ __libitm_always_inline __pointer_type + exchange(__pointer_type __p, + memory_order __m = memory_order_seq_cst) noexcept + { return _M_b.exchange(__p, __m); } + +- __always_inline __pointer_type ++ __libitm_always_inline __pointer_type + exchange(__pointer_type __p, + memory_order __m = memory_order_seq_cst) volatile noexcept + { return _M_b.exchange(__p, __m); } + +- __always_inline bool ++ __libitm_always_inline bool + compare_exchange_weak(__pointer_type& __p1, __pointer_type __p2, + memory_order __m1, memory_order __m2) noexcept + { return _M_b.compare_exchange_strong(__p1, __p2, __m1, __m2); } + +- __always_inline bool ++ __libitm_always_inline bool + compare_exchange_weak(__pointer_type& __p1, __pointer_type __p2, + memory_order __m1, + memory_order __m2) volatile noexcept + { return _M_b.compare_exchange_strong(__p1, __p2, __m1, __m2); } + +- __always_inline bool ++ __libitm_always_inline bool + compare_exchange_weak(__pointer_type& __p1, __pointer_type __p2, + memory_order __m = memory_order_seq_cst) noexcept + { +@@ -1200,7 +1199,7 @@ namespace std // _GLIBCXX_VISIBILITY(default) + __calculate_memory_order(__m)); + } + +- __always_inline bool ++ __libitm_always_inline bool + compare_exchange_weak(__pointer_type& __p1, __pointer_type __p2, + memory_order __m = memory_order_seq_cst) volatile noexcept + { +@@ -1208,18 +1207,18 @@ namespace std // _GLIBCXX_VISIBILITY(default) + __calculate_memory_order(__m)); + } + +- __always_inline bool ++ __libitm_always_inline bool + compare_exchange_strong(__pointer_type& __p1, __pointer_type __p2, + memory_order __m1, memory_order __m2) noexcept + { return _M_b.compare_exchange_strong(__p1, __p2, __m1, __m2); } + +- __always_inline bool ++ __libitm_always_inline bool + compare_exchange_strong(__pointer_type& __p1, __pointer_type __p2, + memory_order __m1, + memory_order __m2) volatile noexcept + { return _M_b.compare_exchange_strong(__p1, __p2, __m1, __m2); } + +- __always_inline bool ++ __libitm_always_inline bool + compare_exchange_strong(__pointer_type& __p1, __pointer_type __p2, + memory_order __m = memory_order_seq_cst) noexcept + { +@@ -1227,7 +1226,7 @@ namespace std // _GLIBCXX_VISIBILITY(default) + __calculate_memory_order(__m)); + } + +- __always_inline bool ++ __libitm_always_inline bool + compare_exchange_strong(__pointer_type& __p1, __pointer_type __p2, + memory_order __m = memory_order_seq_cst) volatile noexcept + { +@@ -1235,22 +1234,22 @@ namespace std // _GLIBCXX_VISIBILITY(default) + __calculate_memory_order(__m)); + } + +- __always_inline __pointer_type ++ __libitm_always_inline __pointer_type + fetch_add(ptrdiff_t __d, + memory_order __m = memory_order_seq_cst) noexcept + { return _M_b.fetch_add(__d, __m); } + +- __always_inline __pointer_type ++ __libitm_always_inline __pointer_type + fetch_add(ptrdiff_t __d, + memory_order __m = memory_order_seq_cst) volatile noexcept + { return _M_b.fetch_add(__d, __m); } + +- __always_inline __pointer_type ++ __libitm_always_inline __pointer_type + fetch_sub(ptrdiff_t __d, + memory_order __m = memory_order_seq_cst) noexcept + { return _M_b.fetch_sub(__d, __m); } + +- __always_inline __pointer_type ++ __libitm_always_inline __pointer_type + fetch_sub(ptrdiff_t __d, + memory_order __m = memory_order_seq_cst) volatile noexcept + { return _M_b.fetch_sub(__d, __m); } +@@ -1544,98 +1543,98 @@ namespace std // _GLIBCXX_VISIBILITY(default) + + + // Function definitions, atomic_flag operations. +- inline __always_inline bool ++ inline __libitm_always_inline bool + atomic_flag_test_and_set_explicit(atomic_flag* __a, + memory_order __m) noexcept + { return __a->test_and_set(__m); } + +- inline __always_inline bool ++ inline __libitm_always_inline bool + atomic_flag_test_and_set_explicit(volatile atomic_flag* __a, + memory_order __m) noexcept + { return __a->test_and_set(__m); } + +- inline __always_inline void ++ inline __libitm_always_inline void + atomic_flag_clear_explicit(atomic_flag* __a, memory_order __m) noexcept + { __a->clear(__m); } + +- inline __always_inline void ++ inline __libitm_always_inline void + atomic_flag_clear_explicit(volatile atomic_flag* __a, + memory_order __m) noexcept + { __a->clear(__m); } + +- inline __always_inline bool ++ inline __libitm_always_inline bool + atomic_flag_test_and_set(atomic_flag* __a) noexcept + { return atomic_flag_test_and_set_explicit(__a, memory_order_seq_cst); } + +- inline __always_inline bool ++ inline __libitm_always_inline bool + atomic_flag_test_and_set(volatile atomic_flag* __a) noexcept + { return atomic_flag_test_and_set_explicit(__a, memory_order_seq_cst); } + +- inline __always_inline void ++ inline __libitm_always_inline void + atomic_flag_clear(atomic_flag* __a) noexcept + { atomic_flag_clear_explicit(__a, memory_order_seq_cst); } + +- inline __always_inline void ++ inline __libitm_always_inline void + atomic_flag_clear(volatile atomic_flag* __a) noexcept + { atomic_flag_clear_explicit(__a, memory_order_seq_cst); } + + + // Function templates generally applicable to atomic types. + template +- __always_inline bool ++ __libitm_always_inline bool + atomic_is_lock_free(const atomic<_ITp>* __a) noexcept + { return __a->is_lock_free(); } + + template +- __always_inline bool ++ __libitm_always_inline bool + atomic_is_lock_free(const volatile atomic<_ITp>* __a) noexcept + { return __a->is_lock_free(); } + + template +- __always_inline void ++ __libitm_always_inline void + atomic_init(atomic<_ITp>* __a, _ITp __i) noexcept; + + template +- __always_inline void ++ __libitm_always_inline void + atomic_init(volatile atomic<_ITp>* __a, _ITp __i) noexcept; + + template +- __always_inline void ++ __libitm_always_inline void + atomic_store_explicit(atomic<_ITp>* __a, _ITp __i, + memory_order __m) noexcept + { __a->store(__i, __m); } + + template +- __always_inline void ++ __libitm_always_inline void + atomic_store_explicit(volatile atomic<_ITp>* __a, _ITp __i, + memory_order __m) noexcept + { __a->store(__i, __m); } + + template +- __always_inline _ITp ++ __libitm_always_inline _ITp + atomic_load_explicit(const atomic<_ITp>* __a, memory_order __m) noexcept + { return __a->load(__m); } + + template +- __always_inline _ITp ++ __libitm_always_inline _ITp + atomic_load_explicit(const volatile atomic<_ITp>* __a, + memory_order __m) noexcept + { return __a->load(__m); } + + template +- __always_inline _ITp ++ __libitm_always_inline _ITp + atomic_exchange_explicit(atomic<_ITp>* __a, _ITp __i, + memory_order __m) noexcept + { return __a->exchange(__i, __m); } + + template +- __always_inline _ITp ++ __libitm_always_inline _ITp + atomic_exchange_explicit(volatile atomic<_ITp>* __a, _ITp __i, + memory_order __m) noexcept + { return __a->exchange(__i, __m); } + + template +- __always_inline bool ++ __libitm_always_inline bool + atomic_compare_exchange_weak_explicit(atomic<_ITp>* __a, + _ITp* __i1, _ITp __i2, + memory_order __m1, +@@ -1643,7 +1642,7 @@ namespace std // _GLIBCXX_VISIBILITY(default) + { return __a->compare_exchange_weak(*__i1, __i2, __m1, __m2); } + + template +- __always_inline bool ++ __libitm_always_inline bool + atomic_compare_exchange_weak_explicit(volatile atomic<_ITp>* __a, + _ITp* __i1, _ITp __i2, + memory_order __m1, +@@ -1651,7 +1650,7 @@ namespace std // _GLIBCXX_VISIBILITY(default) + { return __a->compare_exchange_weak(*__i1, __i2, __m1, __m2); } + + template +- __always_inline bool ++ __libitm_always_inline bool + atomic_compare_exchange_strong_explicit(atomic<_ITp>* __a, + _ITp* __i1, _ITp __i2, + memory_order __m1, +@@ -1659,7 +1658,7 @@ namespace std // _GLIBCXX_VISIBILITY(default) + { return __a->compare_exchange_strong(*__i1, __i2, __m1, __m2); } + + template +- __always_inline bool ++ __libitm_always_inline bool + atomic_compare_exchange_strong_explicit(volatile atomic<_ITp>* __a, + _ITp* __i1, _ITp __i2, + memory_order __m1, +@@ -1668,37 +1667,37 @@ namespace std // _GLIBCXX_VISIBILITY(default) + + + template +- __always_inline void ++ __libitm_always_inline void + atomic_store(atomic<_ITp>* __a, _ITp __i) noexcept + { atomic_store_explicit(__a, __i, memory_order_seq_cst); } + + template +- __always_inline void ++ __libitm_always_inline void + atomic_store(volatile atomic<_ITp>* __a, _ITp __i) noexcept + { atomic_store_explicit(__a, __i, memory_order_seq_cst); } + + template +- __always_inline _ITp ++ __libitm_always_inline _ITp + atomic_load(const atomic<_ITp>* __a) noexcept + { return atomic_load_explicit(__a, memory_order_seq_cst); } + + template +- __always_inline _ITp ++ __libitm_always_inline _ITp + atomic_load(const volatile atomic<_ITp>* __a) noexcept + { return atomic_load_explicit(__a, memory_order_seq_cst); } + + template +- __always_inline _ITp ++ __libitm_always_inline _ITp + atomic_exchange(atomic<_ITp>* __a, _ITp __i) noexcept + { return atomic_exchange_explicit(__a, __i, memory_order_seq_cst); } + + template +- __always_inline _ITp ++ __libitm_always_inline _ITp + atomic_exchange(volatile atomic<_ITp>* __a, _ITp __i) noexcept + { return atomic_exchange_explicit(__a, __i, memory_order_seq_cst); } + + template +- __always_inline bool ++ __libitm_always_inline bool + atomic_compare_exchange_weak(atomic<_ITp>* __a, + _ITp* __i1, _ITp __i2) noexcept + { +@@ -1708,7 +1707,7 @@ namespace std // _GLIBCXX_VISIBILITY(default) + } + + template +- __always_inline bool ++ __libitm_always_inline bool + atomic_compare_exchange_weak(volatile atomic<_ITp>* __a, + _ITp* __i1, _ITp __i2) noexcept + { +@@ -1718,7 +1717,7 @@ namespace std // _GLIBCXX_VISIBILITY(default) + } + + template +- __always_inline bool ++ __libitm_always_inline bool + atomic_compare_exchange_strong(atomic<_ITp>* __a, + _ITp* __i1, _ITp __i2) noexcept + { +@@ -1728,7 +1727,7 @@ namespace std // _GLIBCXX_VISIBILITY(default) + } + + template +- __always_inline bool ++ __libitm_always_inline bool + atomic_compare_exchange_strong(volatile atomic<_ITp>* __a, + _ITp* __i1, _ITp __i2) noexcept + { +@@ -1742,158 +1741,158 @@ namespace std // _GLIBCXX_VISIBILITY(default) + // intergral types as specified in the standard, excluding address + // types. + template +- __always_inline _ITp ++ __libitm_always_inline _ITp + atomic_fetch_add_explicit(__atomic_base<_ITp>* __a, _ITp __i, + memory_order __m) noexcept + { return __a->fetch_add(__i, __m); } + + template +- __always_inline _ITp ++ __libitm_always_inline _ITp + atomic_fetch_add_explicit(volatile __atomic_base<_ITp>* __a, _ITp __i, + memory_order __m) noexcept + { return __a->fetch_add(__i, __m); } + + template +- __always_inline _ITp ++ __libitm_always_inline _ITp + atomic_fetch_sub_explicit(__atomic_base<_ITp>* __a, _ITp __i, + memory_order __m) noexcept + { return __a->fetch_sub(__i, __m); } + + template +- __always_inline _ITp ++ __libitm_always_inline _ITp + atomic_fetch_sub_explicit(volatile __atomic_base<_ITp>* __a, _ITp __i, + memory_order __m) noexcept + { return __a->fetch_sub(__i, __m); } + + template +- __always_inline _ITp ++ __libitm_always_inline _ITp + atomic_fetch_and_explicit(__atomic_base<_ITp>* __a, _ITp __i, + memory_order __m) noexcept + { return __a->fetch_and(__i, __m); } + + template +- __always_inline _ITp ++ __libitm_always_inline _ITp + atomic_fetch_and_explicit(volatile __atomic_base<_ITp>* __a, _ITp __i, + memory_order __m) noexcept + { return __a->fetch_and(__i, __m); } + + template +- __always_inline _ITp ++ __libitm_always_inline _ITp + atomic_fetch_or_explicit(__atomic_base<_ITp>* __a, _ITp __i, + memory_order __m) noexcept + { return __a->fetch_or(__i, __m); } + + template +- __always_inline _ITp ++ __libitm_always_inline _ITp + atomic_fetch_or_explicit(volatile __atomic_base<_ITp>* __a, _ITp __i, + memory_order __m) noexcept + { return __a->fetch_or(__i, __m); } + + template +- __always_inline _ITp ++ __libitm_always_inline _ITp + atomic_fetch_xor_explicit(__atomic_base<_ITp>* __a, _ITp __i, + memory_order __m) noexcept + { return __a->fetch_xor(__i, __m); } + + template +- __always_inline _ITp ++ __libitm_always_inline _ITp + atomic_fetch_xor_explicit(volatile __atomic_base<_ITp>* __a, _ITp __i, + memory_order __m) noexcept + { return __a->fetch_xor(__i, __m); } + + template +- __always_inline _ITp ++ __libitm_always_inline _ITp + atomic_fetch_add(__atomic_base<_ITp>* __a, _ITp __i) noexcept + { return atomic_fetch_add_explicit(__a, __i, memory_order_seq_cst); } + + template +- __always_inline _ITp ++ __libitm_always_inline _ITp + atomic_fetch_add(volatile __atomic_base<_ITp>* __a, _ITp __i) noexcept + { return atomic_fetch_add_explicit(__a, __i, memory_order_seq_cst); } + + template +- __always_inline _ITp ++ __libitm_always_inline _ITp + atomic_fetch_sub(__atomic_base<_ITp>* __a, _ITp __i) noexcept + { return atomic_fetch_sub_explicit(__a, __i, memory_order_seq_cst); } + + template +- __always_inline _ITp ++ __libitm_always_inline _ITp + atomic_fetch_sub(volatile __atomic_base<_ITp>* __a, _ITp __i) noexcept + { return atomic_fetch_sub_explicit(__a, __i, memory_order_seq_cst); } + + template +- __always_inline _ITp ++ __libitm_always_inline _ITp + atomic_fetch_and(__atomic_base<_ITp>* __a, _ITp __i) noexcept + { return atomic_fetch_and_explicit(__a, __i, memory_order_seq_cst); } + + template +- __always_inline _ITp ++ __libitm_always_inline _ITp + atomic_fetch_and(volatile __atomic_base<_ITp>* __a, _ITp __i) noexcept + { return atomic_fetch_and_explicit(__a, __i, memory_order_seq_cst); } + + template +- __always_inline _ITp ++ __libitm_always_inline _ITp + atomic_fetch_or(__atomic_base<_ITp>* __a, _ITp __i) noexcept + { return atomic_fetch_or_explicit(__a, __i, memory_order_seq_cst); } + + template +- __always_inline _ITp ++ __libitm_always_inline _ITp + atomic_fetch_or(volatile __atomic_base<_ITp>* __a, _ITp __i) noexcept + { return atomic_fetch_or_explicit(__a, __i, memory_order_seq_cst); } + + template +- __always_inline _ITp ++ __libitm_always_inline _ITp + atomic_fetch_xor(__atomic_base<_ITp>* __a, _ITp __i) noexcept + { return atomic_fetch_xor_explicit(__a, __i, memory_order_seq_cst); } + + template +- __always_inline _ITp ++ __libitm_always_inline _ITp + atomic_fetch_xor(volatile __atomic_base<_ITp>* __a, _ITp __i) noexcept + { return atomic_fetch_xor_explicit(__a, __i, memory_order_seq_cst); } + + + // Partial specializations for pointers. + template +- __always_inline _ITp* ++ __libitm_always_inline _ITp* + atomic_fetch_add_explicit(atomic<_ITp*>* __a, ptrdiff_t __d, + memory_order __m) noexcept + { return __a->fetch_add(__d, __m); } + + template +- __always_inline _ITp* ++ __libitm_always_inline _ITp* + atomic_fetch_add_explicit(volatile atomic<_ITp*>* __a, ptrdiff_t __d, + memory_order __m) noexcept + { return __a->fetch_add(__d, __m); } + + template +- __always_inline _ITp* ++ __libitm_always_inline _ITp* + atomic_fetch_add(volatile atomic<_ITp*>* __a, ptrdiff_t __d) noexcept + { return __a->fetch_add(__d); } + + template +- __always_inline _ITp* ++ __libitm_always_inline _ITp* + atomic_fetch_add(atomic<_ITp*>* __a, ptrdiff_t __d) noexcept + { return __a->fetch_add(__d); } + + template +- __always_inline _ITp* ++ __libitm_always_inline _ITp* + atomic_fetch_sub_explicit(volatile atomic<_ITp*>* __a, + ptrdiff_t __d, memory_order __m) noexcept + { return __a->fetch_sub(__d, __m); } + + template +- __always_inline _ITp* ++ __libitm_always_inline _ITp* + atomic_fetch_sub_explicit(atomic<_ITp*>* __a, ptrdiff_t __d, + memory_order __m) noexcept + { return __a->fetch_sub(__d, __m); } + + template +- __always_inline _ITp* ++ __libitm_always_inline _ITp* + atomic_fetch_sub(volatile atomic<_ITp*>* __a, ptrdiff_t __d) noexcept + { return __a->fetch_sub(__d); } + + template +- __always_inline _ITp* ++ __libitm_always_inline _ITp* + atomic_fetch_sub(atomic<_ITp*>* __a, ptrdiff_t __d) noexcept + { return __a->fetch_sub(__d); } + // @} group atomics +-- +2.19.2 + diff --git a/toolchain/gcc/patches/8.2.0/002-case_insensitive.patch b/toolchain/gcc/patches/8.3.0/002-case_insensitive.patch similarity index 100% rename from toolchain/gcc/patches/8.2.0/002-case_insensitive.patch rename to toolchain/gcc/patches/8.3.0/002-case_insensitive.patch diff --git a/toolchain/gcc/patches/8.2.0/010-documentation.patch b/toolchain/gcc/patches/8.3.0/010-documentation.patch similarity index 100% rename from toolchain/gcc/patches/8.2.0/010-documentation.patch rename to toolchain/gcc/patches/8.3.0/010-documentation.patch diff --git a/toolchain/gcc/patches/8.2.0/110-Fix-MIPS-PR-84790.patch b/toolchain/gcc/patches/8.3.0/110-Fix-MIPS-PR-84790.patch similarity index 100% rename from toolchain/gcc/patches/8.2.0/110-Fix-MIPS-PR-84790.patch rename to toolchain/gcc/patches/8.3.0/110-Fix-MIPS-PR-84790.patch diff --git a/toolchain/gcc/patches/8.2.0/230-musl_libssp.patch b/toolchain/gcc/patches/8.3.0/230-musl_libssp.patch similarity index 100% rename from toolchain/gcc/patches/8.2.0/230-musl_libssp.patch rename to toolchain/gcc/patches/8.3.0/230-musl_libssp.patch diff --git a/toolchain/gcc/patches/8.2.0/300-mips_Os_cpu_rtx_cost_model.patch b/toolchain/gcc/patches/8.3.0/300-mips_Os_cpu_rtx_cost_model.patch similarity index 100% rename from toolchain/gcc/patches/8.2.0/300-mips_Os_cpu_rtx_cost_model.patch rename to toolchain/gcc/patches/8.3.0/300-mips_Os_cpu_rtx_cost_model.patch diff --git a/toolchain/gcc/patches/8.2.0/800-arm_v5te_no_ldrd_strd.patch b/toolchain/gcc/patches/8.3.0/800-arm_v5te_no_ldrd_strd.patch similarity index 100% rename from toolchain/gcc/patches/8.2.0/800-arm_v5te_no_ldrd_strd.patch rename to toolchain/gcc/patches/8.3.0/800-arm_v5te_no_ldrd_strd.patch diff --git a/toolchain/gcc/patches/8.2.0/810-arm-softfloat-libgcc.patch b/toolchain/gcc/patches/8.3.0/810-arm-softfloat-libgcc.patch similarity index 100% rename from toolchain/gcc/patches/8.2.0/810-arm-softfloat-libgcc.patch rename to toolchain/gcc/patches/8.3.0/810-arm-softfloat-libgcc.patch diff --git a/toolchain/gcc/patches/8.2.0/820-libgcc_pic.patch b/toolchain/gcc/patches/8.3.0/820-libgcc_pic.patch similarity index 100% rename from toolchain/gcc/patches/8.2.0/820-libgcc_pic.patch rename to toolchain/gcc/patches/8.3.0/820-libgcc_pic.patch diff --git a/toolchain/gcc/patches/8.2.0/840-armv4_pass_fix-v4bx_to_ld.patch b/toolchain/gcc/patches/8.3.0/840-armv4_pass_fix-v4bx_to_ld.patch similarity index 100% rename from toolchain/gcc/patches/8.2.0/840-armv4_pass_fix-v4bx_to_ld.patch rename to toolchain/gcc/patches/8.3.0/840-armv4_pass_fix-v4bx_to_ld.patch diff --git a/toolchain/gcc/patches/8.2.0/850-use_shared_libgcc.patch b/toolchain/gcc/patches/8.3.0/850-use_shared_libgcc.patch similarity index 100% rename from toolchain/gcc/patches/8.2.0/850-use_shared_libgcc.patch rename to toolchain/gcc/patches/8.3.0/850-use_shared_libgcc.patch diff --git a/toolchain/gcc/patches/8.2.0/851-libgcc_no_compat.patch b/toolchain/gcc/patches/8.3.0/851-libgcc_no_compat.patch similarity index 100% rename from toolchain/gcc/patches/8.2.0/851-libgcc_no_compat.patch rename to toolchain/gcc/patches/8.3.0/851-libgcc_no_compat.patch diff --git a/toolchain/gcc/patches/8.2.0/870-ppc_no_crtsavres.patch b/toolchain/gcc/patches/8.3.0/870-ppc_no_crtsavres.patch similarity index 84% rename from toolchain/gcc/patches/8.2.0/870-ppc_no_crtsavres.patch rename to toolchain/gcc/patches/8.3.0/870-ppc_no_crtsavres.patch index ecaf75a476..2aa4b8e373 100644 --- a/toolchain/gcc/patches/8.2.0/870-ppc_no_crtsavres.patch +++ b/toolchain/gcc/patches/8.3.0/870-ppc_no_crtsavres.patch @@ -1,6 +1,6 @@ --- a/gcc/config/rs6000/rs6000.c +++ b/gcc/config/rs6000/rs6000.c -@@ -24501,7 +24501,7 @@ rs6000_savres_strategy (rs6000_stack_t * +@@ -24632,7 +24632,7 @@ rs6000_savres_strategy (rs6000_stack_t * /* Define cutoff for using out-of-line functions to save registers. */ if (DEFAULT_ABI == ABI_V4 || TARGET_ELF) { diff --git a/toolchain/gcc/patches/8.2.0/881-no_tm_section.patch b/toolchain/gcc/patches/8.3.0/881-no_tm_section.patch similarity index 100% rename from toolchain/gcc/patches/8.2.0/881-no_tm_section.patch rename to toolchain/gcc/patches/8.3.0/881-no_tm_section.patch diff --git a/toolchain/gcc/patches/8.2.0/900-bad-mips16-crt.patch b/toolchain/gcc/patches/8.3.0/900-bad-mips16-crt.patch similarity index 100% rename from toolchain/gcc/patches/8.2.0/900-bad-mips16-crt.patch rename to toolchain/gcc/patches/8.3.0/900-bad-mips16-crt.patch diff --git a/toolchain/gcc/patches/8.2.0/910-mbsd_multi.patch b/toolchain/gcc/patches/8.3.0/910-mbsd_multi.patch similarity index 97% rename from toolchain/gcc/patches/8.2.0/910-mbsd_multi.patch rename to toolchain/gcc/patches/8.3.0/910-mbsd_multi.patch index d9802b6d61..fb8e25cb18 100644 --- a/toolchain/gcc/patches/8.2.0/910-mbsd_multi.patch +++ b/toolchain/gcc/patches/8.3.0/910-mbsd_multi.patch @@ -114,7 +114,7 @@ Date: Tue Jul 31 00:52:27 2007 +0000 ; On SVR4 targets, it also controls whether or not to emit a --- a/gcc/opts.c +++ b/gcc/opts.c -@@ -2056,6 +2056,9 @@ common_handle_option (struct gcc_options +@@ -2065,6 +2065,9 @@ common_handle_option (struct gcc_options opts, opts_set, loc, dc); break; @@ -126,7 +126,7 @@ Date: Tue Jul 31 00:52:27 2007 +0000 opts->x_warn_larger_than = value != -1; --- a/gcc/doc/invoke.texi +++ b/gcc/doc/invoke.texi -@@ -7012,6 +7012,17 @@ This option is only supported for C and +@@ -7014,6 +7014,17 @@ This option is only supported for C and @option{-Wall} and by @option{-Wpedantic}, which can be disabled with @option{-Wno-pointer-sign}. diff --git a/toolchain/gcc/patches/8.2.0/920-specs_nonfatal_getenv.patch b/toolchain/gcc/patches/8.3.0/920-specs_nonfatal_getenv.patch similarity index 100% rename from toolchain/gcc/patches/8.2.0/920-specs_nonfatal_getenv.patch rename to toolchain/gcc/patches/8.3.0/920-specs_nonfatal_getenv.patch diff --git a/toolchain/gcc/patches/8.2.0/930-fix-mips-noexecstack.patch b/toolchain/gcc/patches/8.3.0/930-fix-mips-noexecstack.patch similarity index 100% rename from toolchain/gcc/patches/8.2.0/930-fix-mips-noexecstack.patch rename to toolchain/gcc/patches/8.3.0/930-fix-mips-noexecstack.patch diff --git a/toolchain/gcc/patches/8.2.0/931-libffi-fix-MIPS-softfloat-build-issue.patch b/toolchain/gcc/patches/8.3.0/931-libffi-fix-MIPS-softfloat-build-issue.patch similarity index 100% rename from toolchain/gcc/patches/8.2.0/931-libffi-fix-MIPS-softfloat-build-issue.patch rename to toolchain/gcc/patches/8.3.0/931-libffi-fix-MIPS-softfloat-build-issue.patch diff --git a/toolchain/gcc/patches/8.2.0/960-gotools-fix-compilation-when-making-cross-compiler.patch b/toolchain/gcc/patches/8.3.0/960-gotools-fix-compilation-when-making-cross-compiler.patch similarity index 100% rename from toolchain/gcc/patches/8.2.0/960-gotools-fix-compilation-when-making-cross-compiler.patch rename to toolchain/gcc/patches/8.3.0/960-gotools-fix-compilation-when-making-cross-compiler.patch diff --git a/toolchain/gcc/patches/arc-2017.09-release/002-case_insensitive.patch b/toolchain/gcc/patches/9.2.0/002-case_insensitive.patch similarity index 100% rename from toolchain/gcc/patches/arc-2017.09-release/002-case_insensitive.patch rename to toolchain/gcc/patches/9.2.0/002-case_insensitive.patch diff --git a/toolchain/gcc/patches/arc-2017.09-release/010-documentation.patch b/toolchain/gcc/patches/9.2.0/010-documentation.patch similarity index 94% rename from toolchain/gcc/patches/arc-2017.09-release/010-documentation.patch rename to toolchain/gcc/patches/9.2.0/010-documentation.patch index 0106814f41..2ceb997960 100644 --- a/toolchain/gcc/patches/arc-2017.09-release/010-documentation.patch +++ b/toolchain/gcc/patches/9.2.0/010-documentation.patch @@ -12,7 +12,7 @@ Date: Tue Feb 26 16:16:33 2013 +0000 --- a/gcc/Makefile.in +++ b/gcc/Makefile.in -@@ -3121,18 +3121,10 @@ doc/gcc.info: $(TEXI_GCC_FILES) +@@ -3202,18 +3202,10 @@ doc/gcc.info: $(TEXI_GCC_FILES) doc/gccint.info: $(TEXI_GCCINT_FILES) doc/cppinternals.info: $(TEXI_CPPINT_FILES) diff --git a/toolchain/gcc/patches/9.2.0/100-Fix_uninitialised_use_in_mips_split_move.patch b/toolchain/gcc/patches/9.2.0/100-Fix_uninitialised_use_in_mips_split_move.patch new file mode 100644 index 0000000000..3529a19d8c --- /dev/null +++ b/toolchain/gcc/patches/9.2.0/100-Fix_uninitialised_use_in_mips_split_move.patch @@ -0,0 +1,55 @@ +From d57faea9337ad595d005687247c3322252f70ba1 Mon Sep 17 00:00:00 2001 +From: rsandifo +Date: Sun, 7 Jul 2019 09:49:14 +0000 +Subject: [PATCH] Fix uninitialised use in mips_split_move + +While testing the fix for PR91068, I hit an rtl checking failure +while building newlib. mips_split_move was decomposing an address that +happened to be symbolic and then tried to access the REGNO of the base +register field, which wasn't initialised but which by chance pointed to +valid memory. + +2019-07-07 Richard Sandiford + +gcc/ + * config/mips/mips.c (mips_split_move): Zero-initialize addr + and check whether addr.reg is nonnull before using it. + + +git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@273174 138bc75d-0d04-0410-961f-82ee72b054a4 +--- + gcc/ChangeLog | 5 +++++ + gcc/config/mips/mips.c | 4 ++-- + 2 files changed, 7 insertions(+), 2 deletions(-) + +--- a/gcc/ChangeLog ++++ b/gcc/ChangeLog +@@ -1,3 +1,8 @@ ++2019-07-07 Richard Sandiford ++ ++ * config/mips/mips.c (mips_split_move): Zero-initialize addr ++ and check whether addr.reg is nonnull before using it. ++ + 2019-08-12 Release Manager + + * GCC 9.2.0 released. +--- a/gcc/config/mips/mips.c ++++ b/gcc/config/mips/mips.c +@@ -4849,7 +4849,7 @@ mips_split_move (rtx dest, rtx src, enum + can forward SRC for DEST. This is most useful if the next insn is a + simple store. */ + rtx_insn *insn = (rtx_insn *)insn_; +- struct mips_address_info addr; ++ struct mips_address_info addr = {}; + if (insn) + { + rtx_insn *next = next_nonnote_nondebug_insn_bb (insn); +@@ -4862,7 +4862,7 @@ mips_split_move (rtx dest, rtx src, enum + { + rtx tmp = XEXP (src, 0); + mips_classify_address (&addr, tmp, GET_MODE (tmp), true); +- if (REGNO (addr.reg) != REGNO (dest)) ++ if (addr.reg && REGNO (addr.reg) != REGNO (dest)) + validate_change (next, &SET_SRC (set), src, false); + } + else diff --git a/toolchain/gcc/patches/9.2.0/110-Fix-MIPS-PR-84790.patch b/toolchain/gcc/patches/9.2.0/110-Fix-MIPS-PR-84790.patch new file mode 100644 index 0000000000..c7e60e3157 --- /dev/null +++ b/toolchain/gcc/patches/9.2.0/110-Fix-MIPS-PR-84790.patch @@ -0,0 +1,20 @@ +Fix https://gcc.gnu.org/bugzilla/show_bug.cgi?id=84790. +MIPS16 functions have a static assembler prologue which clobbers +registers v0 and v1. Add these register clobbers to function call +instructions. + +--- a/gcc/config/mips/mips.c ++++ b/gcc/config/mips/mips.c +@@ -3131,6 +3131,12 @@ mips_emit_call_insn (rtx pattern, rtx or + emit_insn (gen_update_got_version ()); + } + ++ if (TARGET_MIPS16 && TARGET_USE_GOT) ++ { ++ clobber_reg (&CALL_INSN_FUNCTION_USAGE (insn), MIPS16_PIC_TEMP); ++ clobber_reg (&CALL_INSN_FUNCTION_USAGE (insn), MIPS_PROLOGUE_TEMP (word_mode)); ++ } ++ + if (TARGET_MIPS16 + && TARGET_EXPLICIT_RELOCS + && TARGET_CALL_CLOBBERED_GP) diff --git a/toolchain/gcc/patches/9.2.0/230-musl_libssp.patch b/toolchain/gcc/patches/9.2.0/230-musl_libssp.patch new file mode 100644 index 0000000000..41d75b0206 --- /dev/null +++ b/toolchain/gcc/patches/9.2.0/230-musl_libssp.patch @@ -0,0 +1,13 @@ +--- a/gcc/gcc.c ++++ b/gcc/gcc.c +@@ -876,7 +876,9 @@ proper position among the other output f + #endif + + #ifndef LINK_SSP_SPEC +-#ifdef TARGET_LIBC_PROVIDES_SSP ++#if DEFAULT_LIBC == LIBC_MUSL ++#define LINK_SSP_SPEC "-lssp_nonshared" ++#elif defined(TARGET_LIBC_PROVIDES_SSP) + #define LINK_SSP_SPEC "%{fstack-protector|fstack-protector-all" \ + "|fstack-protector-strong|fstack-protector-explicit:}" + #else diff --git a/toolchain/gcc/patches/arc-2017.09-release/300-mips_Os_cpu_rtx_cost_model.patch b/toolchain/gcc/patches/9.2.0/300-mips_Os_cpu_rtx_cost_model.patch similarity index 91% rename from toolchain/gcc/patches/arc-2017.09-release/300-mips_Os_cpu_rtx_cost_model.patch rename to toolchain/gcc/patches/9.2.0/300-mips_Os_cpu_rtx_cost_model.patch index 84c0fdab66..5caa852a16 100644 --- a/toolchain/gcc/patches/arc-2017.09-release/300-mips_Os_cpu_rtx_cost_model.patch +++ b/toolchain/gcc/patches/9.2.0/300-mips_Os_cpu_rtx_cost_model.patch @@ -10,7 +10,7 @@ Signed-off-by: Felix Fietkau --- a/gcc/config/mips/mips.c +++ b/gcc/config/mips/mips.c -@@ -19784,7 +19784,7 @@ mips_option_override (void) +@@ -19994,7 +19994,7 @@ mips_option_override (void) flag_pcc_struct_return = 0; /* Decide which rtx_costs structure to use. */ diff --git a/toolchain/gcc/patches/arc-2017.09-release/810-arm-softfloat-libgcc.patch b/toolchain/gcc/patches/9.2.0/810-arm-softfloat-libgcc.patch similarity index 100% rename from toolchain/gcc/patches/arc-2017.09-release/810-arm-softfloat-libgcc.patch rename to toolchain/gcc/patches/9.2.0/810-arm-softfloat-libgcc.patch diff --git a/toolchain/gcc/patches/arc-2017.09-release/820-libgcc_pic.patch b/toolchain/gcc/patches/9.2.0/820-libgcc_pic.patch similarity index 90% rename from toolchain/gcc/patches/arc-2017.09-release/820-libgcc_pic.patch rename to toolchain/gcc/patches/9.2.0/820-libgcc_pic.patch index 0cc1e07e2b..0a316d35bf 100644 --- a/toolchain/gcc/patches/arc-2017.09-release/820-libgcc_pic.patch +++ b/toolchain/gcc/patches/9.2.0/820-libgcc_pic.patch @@ -8,7 +8,7 @@ Date: Mon Oct 19 23:26:09 2009 +0000 --- a/libgcc/Makefile.in +++ b/libgcc/Makefile.in -@@ -920,11 +920,12 @@ $(libgcov-driver-objects): %$(objext): $ +@@ -927,11 +927,12 @@ $(libgcov-driver-objects): %$(objext): $ # Static libraries. libgcc.a: $(libgcc-objects) @@ -22,7 +22,7 @@ Date: Mon Oct 19 23:26:09 2009 +0000 -rm -f $@ objects="$(objects)"; \ -@@ -945,7 +946,7 @@ all: libunwind.a +@@ -955,7 +956,7 @@ all: libunwind.a endif ifeq ($(enable_shared),yes) @@ -31,7 +31,7 @@ Date: Mon Oct 19 23:26:09 2009 +0000 ifneq ($(LIBUNWIND),) all: libunwind$(SHLIB_EXT) libgcc_s$(SHLIB_EXT): libunwind$(SHLIB_EXT) -@@ -1151,6 +1152,10 @@ install-shared: +@@ -1161,6 +1162,10 @@ install-shared: chmod 644 $(DESTDIR)$(inst_libdir)/libgcc_eh.a $(RANLIB) $(DESTDIR)$(inst_libdir)/libgcc_eh.a diff --git a/toolchain/gcc/patches/arc-2017.09-release/840-armv4_pass_fix-v4bx_to_ld.patch b/toolchain/gcc/patches/9.2.0/840-armv4_pass_fix-v4bx_to_ld.patch similarity index 97% rename from toolchain/gcc/patches/arc-2017.09-release/840-armv4_pass_fix-v4bx_to_ld.patch rename to toolchain/gcc/patches/9.2.0/840-armv4_pass_fix-v4bx_to_ld.patch index b9c9b161ad..18aa021b93 100644 --- a/toolchain/gcc/patches/arc-2017.09-release/840-armv4_pass_fix-v4bx_to_ld.patch +++ b/toolchain/gcc/patches/9.2.0/840-armv4_pass_fix-v4bx_to_ld.patch @@ -9,7 +9,7 @@ Date: Wed Feb 2 19:34:36 2011 +0000 --- a/gcc/config/arm/linux-eabi.h +++ b/gcc/config/arm/linux-eabi.h -@@ -88,10 +88,15 @@ +@@ -91,10 +91,15 @@ #define MUSL_DYNAMIC_LINKER \ "/lib/ld-musl-arm" MUSL_DYNAMIC_LINKER_E "%{mfloat-abi=hard:hf}.so.1" diff --git a/toolchain/gcc/patches/arc-2017.09-release/850-use_shared_libgcc.patch b/toolchain/gcc/patches/9.2.0/850-use_shared_libgcc.patch similarity index 89% rename from toolchain/gcc/patches/arc-2017.09-release/850-use_shared_libgcc.patch rename to toolchain/gcc/patches/9.2.0/850-use_shared_libgcc.patch index 1d07efed80..a765e55a46 100644 --- a/toolchain/gcc/patches/arc-2017.09-release/850-use_shared_libgcc.patch +++ b/toolchain/gcc/patches/9.2.0/850-use_shared_libgcc.patch @@ -7,7 +7,7 @@ Date: Sun Feb 12 20:25:47 2012 +0000 SVN-Revision: 30486 --- a/gcc/config/arm/linux-eabi.h +++ b/gcc/config/arm/linux-eabi.h -@@ -126,10 +126,6 @@ +@@ -129,10 +129,6 @@ "%{Ofast|ffast-math|funsafe-math-optimizations:crtfastmath.o%s} " \ LINUX_OR_ANDROID_LD (GNU_USER_TARGET_ENDFILE_SPEC, ANDROID_ENDFILE_SPEC) @@ -20,8 +20,8 @@ Date: Sun Feb 12 20:25:47 2012 +0000 is used. */ --- a/gcc/config/linux.h +++ b/gcc/config/linux.h -@@ -53,6 +53,10 @@ see the files COPYING3 and COPYING.RUNTI - builtin_assert ("system=posix"); \ +@@ -66,6 +66,10 @@ see the files COPYING3 and COPYING.RUNTI + builtin_version ("CRuntime_Musl"); \ } while (0) +#ifndef LIBGCC_SPEC @@ -42,7 +42,7 @@ Date: Sun Feb 12 20:25:47 2012 +0000 } --- a/gcc/config/rs6000/linux.h +++ b/gcc/config/rs6000/linux.h -@@ -60,6 +60,9 @@ +@@ -62,6 +62,9 @@ #undef CPP_OS_DEFAULT_SPEC #define CPP_OS_DEFAULT_SPEC "%(cpp_os_linux)" @@ -50,5 +50,5 @@ Date: Sun Feb 12 20:25:47 2012 +0000 +#define LIBGCC_SPEC "%{!static:%{!static-libgcc:-lgcc_s}} -lgcc" + #undef LINK_SHLIB_SPEC - #define LINK_SHLIB_SPEC "%{shared:-shared} %{!shared: %{static:-static}}" - + #define LINK_SHLIB_SPEC "%{shared:-shared} %{!shared: %{static:-static}} \ + %{static-pie:-static -pie --no-dynamic-linker -z text}" diff --git a/toolchain/gcc/patches/arc-2017.09-release/851-libgcc_no_compat.patch b/toolchain/gcc/patches/9.2.0/851-libgcc_no_compat.patch similarity index 100% rename from toolchain/gcc/patches/arc-2017.09-release/851-libgcc_no_compat.patch rename to toolchain/gcc/patches/9.2.0/851-libgcc_no_compat.patch diff --git a/toolchain/gcc/patches/9.2.0/870-ppc_no_crtsavres.patch b/toolchain/gcc/patches/9.2.0/870-ppc_no_crtsavres.patch new file mode 100644 index 0000000000..06bb0efda2 --- /dev/null +++ b/toolchain/gcc/patches/9.2.0/870-ppc_no_crtsavres.patch @@ -0,0 +1,11 @@ +--- a/gcc/config/rs6000/rs6000.c ++++ b/gcc/config/rs6000/rs6000.c +@@ -24365,7 +24365,7 @@ rs6000_savres_strategy (rs6000_stack_t * + /* Define cutoff for using out-of-line functions to save registers. */ + if (DEFAULT_ABI == ABI_V4 || TARGET_ELF) + { +- if (!optimize_size) ++ if (1) + { + strategy |= SAVE_INLINE_FPRS | REST_INLINE_FPRS; + strategy |= SAVE_INLINE_GPRS | REST_INLINE_GPRS; diff --git a/toolchain/gcc/patches/9.2.0/881-no_tm_section.patch b/toolchain/gcc/patches/9.2.0/881-no_tm_section.patch new file mode 100644 index 0000000000..fab5db3be5 --- /dev/null +++ b/toolchain/gcc/patches/9.2.0/881-no_tm_section.patch @@ -0,0 +1,11 @@ +--- a/libgcc/crtstuff.c ++++ b/libgcc/crtstuff.c +@@ -152,7 +152,7 @@ call_ ## FUNC (void) \ + #endif + + #if !defined(USE_TM_CLONE_REGISTRY) && defined(OBJECT_FORMAT_ELF) +-# define USE_TM_CLONE_REGISTRY 1 ++# define USE_TM_CLONE_REGISTRY 0 + #endif + + /* We do not want to add the weak attribute to the declarations of these diff --git a/toolchain/gcc/patches/9.2.0/900-bad-mips16-crt.patch b/toolchain/gcc/patches/9.2.0/900-bad-mips16-crt.patch new file mode 100644 index 0000000000..dd6e9dc889 --- /dev/null +++ b/toolchain/gcc/patches/9.2.0/900-bad-mips16-crt.patch @@ -0,0 +1,9 @@ +--- a/libgcc/config/mips/t-mips16 ++++ b/libgcc/config/mips/t-mips16 +@@ -43,3 +43,6 @@ SYNC_CFLAGS = -mno-mips16 + + # Version these symbols if building libgcc.so. + SHLIB_MAPFILES += $(srcdir)/config/mips/libgcc-mips16.ver ++ ++CRTSTUFF_T_CFLAGS += -mno-mips16 ++CRTSTUFF_T_CFLAGS_S += -mno-mips16 diff --git a/toolchain/gcc/patches/arc-2017.09-release/910-mbsd_multi.patch b/toolchain/gcc/patches/9.2.0/910-mbsd_multi.patch similarity index 84% rename from toolchain/gcc/patches/arc-2017.09-release/910-mbsd_multi.patch rename to toolchain/gcc/patches/9.2.0/910-mbsd_multi.patch index 286cfadae7..3d47bf16ad 100644 --- a/toolchain/gcc/patches/arc-2017.09-release/910-mbsd_multi.patch +++ b/toolchain/gcc/patches/9.2.0/910-mbsd_multi.patch @@ -17,7 +17,7 @@ Date: Tue Jul 31 00:52:27 2007 +0000 --- a/gcc/c-family/c-opts.c +++ b/gcc/c-family/c-opts.c -@@ -108,6 +108,9 @@ static int class_dump_flags; +@@ -107,6 +107,9 @@ static dump_flags_t original_dump_flags; /* Whether any standard preincluded header has been preincluded. */ static bool done_preinclude; @@ -27,7 +27,7 @@ Date: Tue Jul 31 00:52:27 2007 +0000 static void handle_OPT_d (const char *); static void set_std_cxx98 (int); static void set_std_cxx11 (int); -@@ -456,6 +459,12 @@ c_common_handle_option (size_t scode, co +@@ -452,6 +455,12 @@ c_common_handle_option (size_t scode, co flag_no_builtin = !value; break; @@ -40,7 +40,7 @@ Date: Tue Jul 31 00:52:27 2007 +0000 case OPT_fconstant_string_class_: constant_string_class_name = arg; break; -@@ -1084,6 +1093,47 @@ c_common_init (void) +@@ -1138,6 +1147,47 @@ c_common_init (void) return false; } @@ -80,7 +80,7 @@ Date: Tue Jul 31 00:52:27 2007 +0000 + } + } else if (evv == 0) { + if (honour_copts != 1) -+ inform (0, "someone does not honour COPTS correctly, passed %d times", ++ inform (UNKNOWN_LOCATION, "someone does not honour COPTS correctly, passed %d times", + honour_copts); + } + } @@ -90,9 +90,9 @@ Date: Tue Jul 31 00:52:27 2007 +0000 --- a/gcc/c-family/c.opt +++ b/gcc/c-family/c.opt -@@ -1412,6 +1412,9 @@ C++ ObjC++ Optimization Alias(fexception +@@ -1521,6 +1521,9 @@ C++ ObjC++ Optimization Alias(fexception fhonor-std - C++ ObjC++ Ignore Warn(switch %qs is no longer supported) + C++ ObjC++ Deprecated +fhonour-copts +C ObjC C++ ObjC++ RejectNegative @@ -102,7 +102,7 @@ Date: Tue Jul 31 00:52:27 2007 +0000 Assume normal C execution environment. --- a/gcc/common.opt +++ b/gcc/common.opt -@@ -1510,6 +1510,9 @@ fguess-branch-probability +@@ -1589,6 +1589,9 @@ fguess-branch-probability Common Report Var(flag_guess_branch_prob) Optimization Enable guessing of branch probabilities. @@ -112,21 +112,9 @@ Date: Tue Jul 31 00:52:27 2007 +0000 ; Nonzero means ignore `#ident' directives. 0 means handle them. ; Generate position-independent code for executables if possible ; On SVR4 targets, it also controls whether or not to emit a ---- a/gcc/opts.c -+++ b/gcc/opts.c -@@ -1928,6 +1928,9 @@ common_handle_option (struct gcc_options - opts, opts_set, loc, dc); - break; - -+ case OPT_fhonour_copts: -+ break; -+ - case OPT_Wlarger_than_: - opts->x_larger_than_size = value; - opts->x_warn_larger_than = value != -1; --- a/gcc/doc/invoke.texi +++ b/gcc/doc/invoke.texi -@@ -6567,6 +6567,17 @@ This option is only supported for C and +@@ -7657,6 +7657,17 @@ This option is only supported for C and @option{-Wall} and by @option{-Wpedantic}, which can be disabled with @option{-Wno-pointer-sign}. @@ -144,3 +132,15 @@ Date: Tue Jul 31 00:52:27 2007 +0000 @item -Wstack-protector @opindex Wstack-protector @opindex Wno-stack-protector +--- a/gcc/opts.c ++++ b/gcc/opts.c +@@ -2314,6 +2314,9 @@ common_handle_option (struct gcc_options + /* Currently handled in a prescan. */ + break; + ++ case OPT_fhonour_copts: ++ break; ++ + case OPT_Werror: + dc->warning_as_error_requested = value; + break; diff --git a/toolchain/gcc/patches/arc-2017.09-release/920-specs_nonfatal_getenv.patch b/toolchain/gcc/patches/9.2.0/920-specs_nonfatal_getenv.patch similarity index 87% rename from toolchain/gcc/patches/arc-2017.09-release/920-specs_nonfatal_getenv.patch rename to toolchain/gcc/patches/9.2.0/920-specs_nonfatal_getenv.patch index 69b40621dc..db27950de8 100644 --- a/toolchain/gcc/patches/arc-2017.09-release/920-specs_nonfatal_getenv.patch +++ b/toolchain/gcc/patches/9.2.0/920-specs_nonfatal_getenv.patch @@ -7,8 +7,8 @@ Date: Sat Apr 21 03:02:39 2012 +0000 --- a/gcc/gcc.c +++ b/gcc/gcc.c -@@ -9280,8 +9280,10 @@ getenv_spec_function (int argc, const ch - value = varname; +@@ -9318,8 +9318,10 @@ getenv_spec_function (int argc, const ch + } if (!value) - fatal_error (input_location, diff --git a/toolchain/gcc/patches/arc-2017.09-release/930-fix-mips-noexecstack.patch b/toolchain/gcc/patches/9.2.0/930-fix-mips-noexecstack.patch similarity index 95% rename from toolchain/gcc/patches/arc-2017.09-release/930-fix-mips-noexecstack.patch rename to toolchain/gcc/patches/9.2.0/930-fix-mips-noexecstack.patch index 90d10f11e4..95d13abad0 100644 --- a/toolchain/gcc/patches/arc-2017.09-release/930-fix-mips-noexecstack.patch +++ b/toolchain/gcc/patches/9.2.0/930-fix-mips-noexecstack.patch @@ -48,9 +48,9 @@ sellcey@mips.com --- a/gcc/config/mips/mips.c +++ b/gcc/config/mips/mips.c -@@ -22561,6 +22561,9 @@ mips_promote_function_mode (const_tree t - #undef TARGET_CUSTOM_FUNCTION_DESCRIPTORS - #define TARGET_CUSTOM_FUNCTION_DESCRIPTORS 2 +@@ -22822,6 +22822,9 @@ mips_starting_frame_offset (void) + #undef TARGET_STARTING_FRAME_OFFSET + #define TARGET_STARTING_FRAME_OFFSET mips_starting_frame_offset +#undef TARGET_ASM_FILE_END +#define TARGET_ASM_FILE_END file_end_indicate_exec_stack diff --git a/toolchain/gcc/patches/9.2.0/931-libffi-fix-MIPS-softfloat-build-issue.patch b/toolchain/gcc/patches/9.2.0/931-libffi-fix-MIPS-softfloat-build-issue.patch new file mode 100644 index 0000000000..fb4cb1533a --- /dev/null +++ b/toolchain/gcc/patches/9.2.0/931-libffi-fix-MIPS-softfloat-build-issue.patch @@ -0,0 +1,168 @@ +From c0c62fa4256f805389f16ebfc4a60cf789129b50 Mon Sep 17 00:00:00 2001 +From: BangLang Huang +Date: Wed, 9 Nov 2016 10:36:49 +0800 +Subject: [PATCH] libffi: fix MIPS softfloat build issue + +Backported from github.com/libffi/libffi#272 + +Signed-off-by: BangLang Huang +Signed-off-by: Yousong Zhou +--- + libffi/src/mips/n32.S | 17 +++++++++++++++++ + libffi/src/mips/o32.S | 17 +++++++++++++++++ + 2 files changed, 34 insertions(+) + +--- a/libffi/src/mips/n32.S ++++ b/libffi/src/mips/n32.S +@@ -107,6 +107,16 @@ loadregs: + + REG_L t6, 3*FFI_SIZEOF_ARG($fp) # load the flags word into t6. + ++#ifdef __mips_soft_float ++ REG_L a0, 0*FFI_SIZEOF_ARG(t9) ++ REG_L a1, 1*FFI_SIZEOF_ARG(t9) ++ REG_L a2, 2*FFI_SIZEOF_ARG(t9) ++ REG_L a3, 3*FFI_SIZEOF_ARG(t9) ++ REG_L a4, 4*FFI_SIZEOF_ARG(t9) ++ REG_L a5, 5*FFI_SIZEOF_ARG(t9) ++ REG_L a6, 6*FFI_SIZEOF_ARG(t9) ++ REG_L a7, 7*FFI_SIZEOF_ARG(t9) ++#else + and t4, t6, ((1< +Date: Fri, 4 May 2018 18:20:53 +0800 +Subject: [PATCH] gotools: fix compilation when making cross compiler + +libgo is "the runtime support library for the Go programming language. +This library is intended for use with the Go frontend." + +gccgo will link target files with libgo.so which depends on libgcc_s.so.1, but +the linker will complain that it cannot find it. That's because shared libgcc +is not present in the install directory yet. libgo.so was made without problem +because gcc will emit -lgcc_s when compiled with -shared option. When gotools +were being made, it was supplied with -static-libgcc thus no link option was +provided. Check LIBGO in gcc/go/gcc-spec.c for how gccgo make a builtin spec +for linking with libgo.so + +- GccgoCrossCompilation, https://github.com/golang/go/wiki/GccgoCrossCompilation +- Cross-building instructions, http://www.eglibc.org/archives/patches/msg00078.html + +When 3-pass GCC compilation is used, shared libgcc runtime libraries will be +available after gcc pass2 completed and will meet the gotools link requirement +at gcc pass3 +--- + gotools/Makefile.am | 4 +++- + gotools/Makefile.in | 4 +++- + 2 files changed, 6 insertions(+), 2 deletions(-) + +--- a/gotools/Makefile.am ++++ b/gotools/Makefile.am +@@ -26,6 +26,7 @@ PWD_COMMAND = $${PWDCMD-pwd} + STAMP = echo timestamp > + + libgodir = ../$(target_noncanonical)/libgo ++libgccdir = ../$(target_noncanonical)/libgcc + LIBGODEP = $(libgodir)/libgo.la + + LIBGOTOOL = $(libgodir)/libgotool.a +@@ -41,7 +42,8 @@ GOCFLAGS = $(CFLAGS_FOR_TARGET) + GOCOMPILE = $(GOCOMPILER) $(GOCFLAGS) + + AM_GOCFLAGS = -I $(libgodir) +-AM_LDFLAGS = -L $(libgodir) -L $(libgodir)/.libs ++AM_LDFLAGS = -L $(libgodir) -L $(libgodir)/.libs \ ++ -L $(libgccdir) -L $(libgccdir)/.libs -lgcc_s + GOLINK = $(GOCOMPILER) $(GOCFLAGS) $(AM_GOCFLAGS) $(LDFLAGS) $(AM_LDFLAGS) -o $@ + + libgosrcdir = $(srcdir)/../libgo/go +--- a/gotools/Makefile.in ++++ b/gotools/Makefile.in +@@ -337,6 +337,7 @@ mkinstalldirs = $(SHELL) $(toplevel_srcd + PWD_COMMAND = $${PWDCMD-pwd} + STAMP = echo timestamp > + libgodir = ../$(target_noncanonical)/libgo ++libgccdir = ../$(target_noncanonical)/libgcc + LIBGODEP = $(libgodir)/libgo.la + LIBGOTOOL = $(libgodir)/libgotool.a + @NATIVE_FALSE@GOCOMPILER = $(GOC) +@@ -346,7 +347,8 @@ LIBGOTOOL = $(libgodir)/libgotool.a + GOCFLAGS = $(CFLAGS_FOR_TARGET) + GOCOMPILE = $(GOCOMPILER) $(GOCFLAGS) + AM_GOCFLAGS = -I $(libgodir) +-AM_LDFLAGS = -L $(libgodir) -L $(libgodir)/.libs ++AM_LDFLAGS = -L $(libgodir) -L $(libgodir)/.libs \ ++ -L $(libgccdir) -L $(libgccdir)/.libs -lgcc_s + GOLINK = $(GOCOMPILER) $(GOCFLAGS) $(AM_GOCFLAGS) $(LDFLAGS) $(AM_LDFLAGS) -o $@ + libgosrcdir = $(srcdir)/../libgo/go + cmdsrcdir = $(libgosrcdir)/cmd diff --git a/toolchain/gcc/patches/arc-2017.09-release/001-revert_register_mode_search.patch b/toolchain/gcc/patches/arc-2017.09-release/001-revert_register_mode_search.patch deleted file mode 100644 index 63e3fee003..0000000000 --- a/toolchain/gcc/patches/arc-2017.09-release/001-revert_register_mode_search.patch +++ /dev/null @@ -1,77 +0,0 @@ -commit 31285a20390a5e53a74a2a71d1b5c82f366ddd5a -Author: Felix Fietkau -Date: Tue May 6 11:49:05 2014 +0000 - - gcc: revert an upstream patch that is causing a regression on powerpc - - https://forum.openwrt.org/viewtopic.php?pid=232494#p232494 - - Signed-off-by: Felix Fietkau - - SVN-Revision: 40709 - -Revert of: - -commit 275035b56823b26d5fb7e90fad945b998648edf2 -Author: bergner -Date: Thu Sep 5 14:09:07 2013 +0000 - - PR target/58139 - * reginfo.c (choose_hard_reg_mode): Scan through all mode classes - looking for widest mode. - - - git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@202286 138bc75d-0d04-0410-961f-82ee72b054a4 - - ---- a/gcc/reginfo.c -+++ b/gcc/reginfo.c -@@ -637,35 +637,40 @@ choose_hard_reg_mode (unsigned int regno - mode = GET_MODE_WIDER_MODE (mode)) - if ((unsigned) hard_regno_nregs[regno][mode] == nregs - && HARD_REGNO_MODE_OK (regno, mode) -- && (! call_saved || ! HARD_REGNO_CALL_PART_CLOBBERED (regno, mode)) -- && GET_MODE_SIZE (mode) > GET_MODE_SIZE (found_mode)) -+ && (! call_saved || ! HARD_REGNO_CALL_PART_CLOBBERED (regno, mode))) - found_mode = mode; - -+ if (found_mode != VOIDmode) -+ return found_mode; -+ - for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT); - mode != VOIDmode; - mode = GET_MODE_WIDER_MODE (mode)) - if ((unsigned) hard_regno_nregs[regno][mode] == nregs - && HARD_REGNO_MODE_OK (regno, mode) -- && (! call_saved || ! HARD_REGNO_CALL_PART_CLOBBERED (regno, mode)) -- && GET_MODE_SIZE (mode) > GET_MODE_SIZE (found_mode)) -+ && (! call_saved || ! HARD_REGNO_CALL_PART_CLOBBERED (regno, mode))) - found_mode = mode; - -+ if (found_mode != VOIDmode) -+ return found_mode; -+ - for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_FLOAT); - mode != VOIDmode; - mode = GET_MODE_WIDER_MODE (mode)) - if ((unsigned) hard_regno_nregs[regno][mode] == nregs - && HARD_REGNO_MODE_OK (regno, mode) -- && (! call_saved || ! HARD_REGNO_CALL_PART_CLOBBERED (regno, mode)) -- && GET_MODE_SIZE (mode) > GET_MODE_SIZE (found_mode)) -+ && (! call_saved || ! HARD_REGNO_CALL_PART_CLOBBERED (regno, mode))) - found_mode = mode; - -+ if (found_mode != VOIDmode) -+ return found_mode; -+ - for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_INT); - mode != VOIDmode; - mode = GET_MODE_WIDER_MODE (mode)) - if ((unsigned) hard_regno_nregs[regno][mode] == nregs - && HARD_REGNO_MODE_OK (regno, mode) -- && (! call_saved || ! HARD_REGNO_CALL_PART_CLOBBERED (regno, mode)) -- && GET_MODE_SIZE (mode) > GET_MODE_SIZE (found_mode)) -+ && (! call_saved || ! HARD_REGNO_CALL_PART_CLOBBERED (regno, mode))) - found_mode = mode; - - if (found_mode != VOIDmode) diff --git a/toolchain/gcc/patches/arc-2017.09-release/230-musl_libssp.patch b/toolchain/gcc/patches/arc-2017.09-release/230-musl_libssp.patch deleted file mode 100644 index eebee9175c..0000000000 --- a/toolchain/gcc/patches/arc-2017.09-release/230-musl_libssp.patch +++ /dev/null @@ -1,28 +0,0 @@ -commit 1877bc9d8f2be143fbe530347a945850d0ecd234 -Author: Steven Barth -Date: Mon Jun 22 10:31:07 2015 +0000 - - gcc/musl: rework SSP-support - - Make musl provide libssp_nonshared.a and make GCC link it unconditionally - if musl is used. This should be a no-op if SSP is disabled and seems to be - the only reliable way of dealing with SSP over all packages due to the mess - that is linkerflags handling in packages. - - Signed-off-by: Steven Barth - - SVN-Revision: 46108 - ---- a/gcc/gcc.c -+++ b/gcc/gcc.c -@@ -861,7 +861,9 @@ proper position among the other output f - #endif - - #ifndef LINK_SSP_SPEC --#ifdef TARGET_LIBC_PROVIDES_SSP -+#if DEFAULT_LIBC == LIBC_MUSL -+#define LINK_SSP_SPEC "-lssp_nonshared" -+#elif defined(TARGET_LIBC_PROVIDES_SSP) - #define LINK_SSP_SPEC "%{fstack-protector|fstack-protector-all" \ - "|fstack-protector-strong|fstack-protector-explicit:}" - #else diff --git a/toolchain/gcc/patches/arc-2017.09-release/800-arm_v5te_no_ldrd_strd.patch b/toolchain/gcc/patches/arc-2017.09-release/800-arm_v5te_no_ldrd_strd.patch deleted file mode 100644 index 76200a1661..0000000000 --- a/toolchain/gcc/patches/arc-2017.09-release/800-arm_v5te_no_ldrd_strd.patch +++ /dev/null @@ -1,32 +0,0 @@ -commit b050f87d13b5dc7ed82feb9a90f4529de58bdf25 -Author: Felix Fietkau -Date: Wed Feb 19 19:20:10 2014 +0000 - - gcc: prevent the use of LDRD/STRD on ARMv5TE - - These instructions are for 64-bit load/store. On ARMv5TE, the CPU - requires addresses to be aligned to 64-bit. When misaligned, behavior is - undefined (effectively either loads the same word twice on LDRD, or - corrupts surrounding memory on STRD). - - On ARMv6 and newer, unaligned access is safe. - - Removing these instructions for ARMv5TE is necessary, because GCC - ignores alignment information in pointers and does unsafe optimizations - that have shown up as bugs in various places. - - Signed-off-by: Felix Fietkau - - SVN-Revision: 39638 - ---- a/gcc/config/arm/arm.h -+++ b/gcc/config/arm/arm.h -@@ -150,7 +150,7 @@ extern tree arm_fp16_type_node; - /* Thumb-1 only. */ - #define TARGET_THUMB1_ONLY (TARGET_THUMB1 && !arm_arch_notm) - --#define TARGET_LDRD (arm_arch5e && ARM_DOUBLEWORD_ALIGN \ -+#define TARGET_LDRD (arm_arch6 && ARM_DOUBLEWORD_ALIGN \ - && !TARGET_THUMB1) - - #define TARGET_CRC32 (arm_arch_crc) diff --git a/toolchain/gcc/patches/arc-2017.09-release/870-ppc_no_crtsavres.patch b/toolchain/gcc/patches/arc-2017.09-release/870-ppc_no_crtsavres.patch deleted file mode 100644 index 156468b45e..0000000000 --- a/toolchain/gcc/patches/arc-2017.09-release/870-ppc_no_crtsavres.patch +++ /dev/null @@ -1,18 +0,0 @@ -commit d8c570a1531035c3e26bcd94741e5f5b9c36b5d9 -Author: Felix Fietkau -Date: Mon Mar 5 00:51:01 2012 +0000 - - gcc: do not emit references to _savegpr_* and _restgpr_* on powerpc, as they are tricky to deal with wrt. libgcc. they cannot be linked dynamically - - SVN-Revision: 30814 ---- a/gcc/config/rs6000/rs6000.c -+++ b/gcc/config/rs6000/rs6000.c -@@ -26936,7 +26936,7 @@ rs6000_savres_strategy (rs6000_stack_t * - /* Define cutoff for using out-of-line functions to save registers. */ - if (DEFAULT_ABI == ABI_V4 || TARGET_ELF) - { -- if (!optimize_size) -+ if (1) - { - strategy |= SAVE_INLINE_FPRS | REST_INLINE_FPRS; - strategy |= SAVE_INLINE_GPRS | REST_INLINE_GPRS; diff --git a/toolchain/gcc/patches/arc-2017.09-release/881-no_tm_section.patch b/toolchain/gcc/patches/arc-2017.09-release/881-no_tm_section.patch deleted file mode 100644 index a58dc27e64..0000000000 --- a/toolchain/gcc/patches/arc-2017.09-release/881-no_tm_section.patch +++ /dev/null @@ -1,22 +0,0 @@ -commit 565988ab47bd9b96b50608564aee2104aeb4b7ae -Author: Felix Fietkau -Date: Tue Dec 13 14:20:49 2016 +0100 - - gcc: rip out transactional memory related bloat from crtbegin - - Slightly improves compression for each executable, saving about 4k from - the default ar71xx rootfs - - Signed-off-by: Felix Fietkau - ---- a/libgcc/crtstuff.c -+++ b/libgcc/crtstuff.c -@@ -152,7 +152,7 @@ call_ ## FUNC (void) \ - #endif - - #if !defined(USE_TM_CLONE_REGISTRY) && defined(OBJECT_FORMAT_ELF) --# define USE_TM_CLONE_REGISTRY 1 -+# define USE_TM_CLONE_REGISTRY 0 - #endif - - /* We do not want to add the weak attribute to the declarations of these diff --git a/toolchain/gcc/patches/arc-2017.09-release/900-bad-mips16-crt.patch b/toolchain/gcc/patches/arc-2017.09-release/900-bad-mips16-crt.patch deleted file mode 100644 index f5cc0a74ee..0000000000 --- a/toolchain/gcc/patches/arc-2017.09-release/900-bad-mips16-crt.patch +++ /dev/null @@ -1,30 +0,0 @@ -commit 9dc38e48f7a6f88b7ac7bfaced91f53660204e46 -Author: Florian Fainelli -Date: Fri Apr 5 12:36:06 2013 +0000 - - toolchain/gcc: .init and .fini need to pick one ISA - - The .init and .fini sections are built by concatenating code - fragments. Putting mips16 code in the middle of a mips32 code block - doesn't work. Make gcc built the magic crt stuff in no-mips16 mode. - - This is specific to 4.6-linaro but is probably portable to other gcc - flavors. Adding this to the t-libgcc-mips16 makefile fragment is a - hack not suitable for pushing upstream, but there is no mips/t-linux - or mips/t-uclibc and I am not going to touch gcc/configure for two - lines. - - Signed-off-by: Jay Carlson - Signed-off-by: Florian Fainelli - - SVN-Revision: 36200 - ---- a/libgcc/config/mips/t-mips16 -+++ b/libgcc/config/mips/t-mips16 -@@ -43,3 +43,6 @@ SYNC_CFLAGS = -mno-mips16 - - # Version these symbols if building libgcc.so. - SHLIB_MAPFILES += $(srcdir)/config/mips/libgcc-mips16.ver -+ -+CRTSTUFF_T_CFLAGS += -mno-mips16 -+CRTSTUFF_T_CFLAGS_S += -mno-mips16 diff --git a/toolchain/gcc/patches/arc-2017.09-release/940-no-clobber-stamp-bits.patch b/toolchain/gcc/patches/arc-2017.09-release/940-no-clobber-stamp-bits.patch deleted file mode 100644 index 8b88b4066d..0000000000 --- a/toolchain/gcc/patches/arc-2017.09-release/940-no-clobber-stamp-bits.patch +++ /dev/null @@ -1,33 +0,0 @@ -commit 548d9a008ff265e9eaa3c7e0e6e301c6bd5645e6 -Author: Felix Fietkau -Date: Fri Dec 12 17:01:57 2014 +0000 - - gcc: don't clobber stamp-bits with a symlink to itself - - Several versions of gcc have an issue in libstdc++v3 where the build may - clobber stamp-bits with a link to itself. This doesn't manifest itself - on all systems. On several Ubuntu systems, this doesn't appear to be a - problem, but it is an issue on Fedora 16 systems. - - To fix the issue, we'll simply filter out stamp-bits from the symlinks - to be generated. - - Note: gcc 4.4.7 is unaffected by this issue, so no fix is necessary - there. - - Signed-off-by: John Szakmeister - - SVN-Revision: 43669 - - ---- a/libstdc++-v3/include/Makefile.in -+++ b/libstdc++-v3/include/Makefile.in -@@ -1476,7 +1476,7 @@ stamp-bits: ${bits_headers} - @$(STAMP) stamp-bits - - stamp-bits-sup: stamp-bits ${bits_sup_headers} -- @-cd ${bits_builddir} && $(LN_S) $? . 2>/dev/null -+ @-cd ${bits_builddir} && $(LN_S) $(filter-out stamp-bits,$?) . 2>/dev/null - @$(STAMP) stamp-bits-sup - - stamp-c_base: ${c_base_headers} diff --git a/toolchain/gcc/patches/arc-2017.09-release/950-cpp_file_path_translation.patch b/toolchain/gcc/patches/arc-2017.09-release/950-cpp_file_path_translation.patch deleted file mode 100644 index 60729dd7fe..0000000000 --- a/toolchain/gcc/patches/arc-2017.09-release/950-cpp_file_path_translation.patch +++ /dev/null @@ -1,181 +0,0 @@ -commit 331735a357a73c7b8adc205241ac3cc6543d985e -Author: Felix Fietkau -Date: Tue Nov 17 12:38:22 2015 +0000 - - gcc: add a patch to 5.x that supports translation of __FILE__ paths - - Signed-off-by: Felix Fietkau - - SVN-Revision: 47490 - -Forward ported from attachment to https://gcc.gnu.org/bugzilla/show_bug.cgi?id=47047 - ---- a/gcc/c-family/c-opts.c -+++ b/gcc/c-family/c-opts.c -@@ -588,6 +588,10 @@ c_common_handle_option (size_t scode, co - add_path (xstrdup (arg), SYSTEM, 0, true); - break; - -+ case OPT_iremap: -+ add_cpp_remap_path (arg); -+ break; -+ - case OPT_iwithprefix: - add_prefixed_path (arg, SYSTEM); - break; ---- a/gcc/c-family/c.opt -+++ b/gcc/c-family/c.opt -@@ -1825,6 +1825,10 @@ iquote - C ObjC C++ ObjC++ Joined Separate MissingArgError(missing path after %qs) - -iquote Add to the end of the quote include path. - -+iremap -+C ObjC C++ ObjC++ Joined Separate -+-iremap Convert to if it occurs as prefix in __FILE__. -+ - iwithprefix - C ObjC C++ ObjC++ Joined Separate - -iwithprefix Add to the end of the system include path. ---- a/gcc/doc/cpp.texi -+++ b/gcc/doc/cpp.texi -@@ -4272,6 +4272,7 @@ Refer to the GCC manual for full documen - @c man begin SYNOPSIS - cpp [@option{-D}@var{macro}[=@var{defn}]@dots{}] [@option{-U}@var{macro}] - [@option{-I}@var{dir}@dots{}] [@option{-iquote}@var{dir}@dots{}] -+ [@option{-iremap}@var{src}:@var{dst}] - [@option{-M}|@option{-MM}] [@option{-MG}] [@option{-MF} @var{filename}] - [@option{-MP}] [@option{-MQ} @var{target}@dots{}] - [@option{-MT} @var{target}@dots{}] ---- a/gcc/doc/cppopts.texi -+++ b/gcc/doc/cppopts.texi -@@ -220,6 +220,12 @@ extensions @samp{.i}, @samp{.ii} or @sam - extensions that GCC uses for preprocessed files created by - @option{-save-temps}. - -+@item -iremap @var{src}:@var{dst} -+@opindex iremap -+Replace the prefix @var{src} in __FILE__ with @var{dst} at expansion time. -+This option can be specified more than once. Processing stops at the first -+match. -+ - @item -fdirectives-only - @opindex fdirectives-only - When preprocessing, handle directives, but do not expand macros. ---- a/gcc/doc/invoke.texi -+++ b/gcc/doc/invoke.texi -@@ -11863,6 +11863,12 @@ by @option{-fplugin=@var{name}} instead - @option{-fplugin=@var{path}/@var{name}.so}. This option is not meant - to be used by the user, but only passed by the driver. - -+@item -iremap @var{src}:@var{dst} -+@opindex iremap -+Replace the prefix @var{src} in __FILE__ with @var{dst} at expansion time. -+This option can be specified more than once. Processing stops at the first -+match. -+ - @item -L@var{dir} - @opindex L - Add directory @var{dir} to the list of directories to be searched ---- a/libcpp/include/cpplib.h -+++ b/libcpp/include/cpplib.h -@@ -820,6 +820,9 @@ extern void cpp_set_lang (cpp_reader *, - /* Set the include paths. */ - extern void cpp_set_include_chains (cpp_reader *, cpp_dir *, cpp_dir *, int); - -+/* Provide src:dst pair for __FILE__ remapping. */ -+extern void add_cpp_remap_path (const char *); -+ - /* Call these to get pointers to the options, callback, and deps - structures for a given reader. These pointers are good until you - call cpp_finish on that reader. You can either edit the callbacks ---- a/libcpp/macro.c -+++ b/libcpp/macro.c -@@ -227,6 +227,64 @@ static const char * const monthnames[] = - "Jul", "Aug", "Sep", "Oct", "Nov", "Dec" - }; - -+static size_t remap_pairs; -+static char **remap_src; -+static char **remap_dst; -+ -+void -+add_cpp_remap_path (const char *arg) -+{ -+ const char *arg_dst; -+ size_t len; -+ -+ arg_dst = strchr(arg, ':'); -+ if (arg_dst == NULL) -+ { -+ fprintf(stderr, "Invalid argument for -iremap\n"); -+ exit(1); -+ } -+ -+ len = arg_dst - arg; -+ ++arg_dst; -+ -+ remap_src = (char **) xrealloc(remap_src, sizeof(char *) * (remap_pairs + 1)); -+ remap_dst = (char **) xrealloc(remap_dst, sizeof(char *) * (remap_pairs + 1)); -+ -+ remap_src[remap_pairs] = (char *) xmalloc(len + 1); -+ memcpy(remap_src[remap_pairs], arg, len); -+ remap_src[remap_pairs][len] = '\0'; -+ remap_dst[remap_pairs] = xstrdup(arg_dst); -+ ++remap_pairs; -+} -+ -+static const char * -+cpp_remap_file (const char *arg, char **tmp_name) -+{ -+ char *result; -+ size_t i, len; -+ -+ for (i = 0; i < remap_pairs; ++i) -+ { -+ len = strlen (remap_src[i]); -+ if (strncmp (remap_src[i], arg, len)) -+ continue; -+ if (arg[len] == '\0') -+ return xstrdup (remap_dst[i]); -+ if (arg[len] != '/') -+ continue; -+ arg += len; -+ len = strlen (remap_dst[i]); -+ result = (char *) xmalloc (len + strlen (arg) + 1); -+ memcpy(result, remap_dst[i], len); -+ strcpy(result + len, arg); -+ *tmp_name = result; -+ -+ return result; -+ } -+ -+ return arg; -+} -+ - /* Helper function for builtin_macro. Returns the text generated by - a builtin macro. */ - const uchar * -@@ -290,6 +348,7 @@ _cpp_builtin_macro_text (cpp_reader *pfi - { - unsigned int len; - const char *name; -+ char *tmp_name = NULL; - uchar *buf; - - if (node->value.builtin == BT_FILE) -@@ -301,6 +360,7 @@ _cpp_builtin_macro_text (cpp_reader *pfi - if (!name) - abort (); - } -+ name = cpp_remap_file (name, &tmp_name); - len = strlen (name); - buf = _cpp_unaligned_alloc (pfile, len * 2 + 3); - result = buf; -@@ -308,6 +368,7 @@ _cpp_builtin_macro_text (cpp_reader *pfi - buf = cpp_quote_string (buf + 1, (const unsigned char *) name, len); - *buf++ = '"'; - *buf = '\0'; -+ free (tmp_name); - } - break; -