From d2ce50f5bd59695eb588bc878b63077421c89eb6 Mon Sep 17 00:00:00 2001 From: Tianling Shen Date: Wed, 3 Jul 2024 17:47:31 +0800 Subject: [PATCH] uboot-rockchip: Update to 2024.07 Refresh patches, dts, defconfigs. Signed-off-by: Tianling Shen --- package/boot/uboot-rockchip/Makefile | 4 +- ...llow-rockchip_dnl_key_pressed-in-SPL.patch | 14 +- ...move-Amlogic-and-Rockchip-compatible.patch | 27 - ...e-PCI-to-discover-network-controller.patch | 6 +- .../patches/900-arm-add-dts-files.patch | 56 +- .../arch/arm/dts/rk3568-fastrhino-r66s.dts | 27 - .../arch/arm/dts/rk3568-fastrhino-r66s.dtsi | 484 ------------- .../arch/arm/dts/rk3568-fastrhino-r68s.dts | 112 --- .../src/arch/arm/dts/rk3568-roc-pc.dts | 643 ------------------ .../src/arch/arm/dts/rk3588s-nanopi-r6c.dts | 5 +- .../src/arch/arm/dts/rk3588s-nanopi-r6s.dts | 22 +- .../configs/fastrhino-r66s-rk3568_defconfig | 18 +- .../configs/fastrhino-r68s-rk3568_defconfig | 20 +- .../configs/guangmiao-g4c-rk3399_defconfig | 30 +- .../src/configs/mrkaio-m68s-rk3568_defconfig | 17 +- .../src/configs/nanopi-r4se-rk3399_defconfig | 30 +- .../src/configs/nanopi-r6c-rk3588s_defconfig | 38 +- .../src/configs/nanopi-r6s-rk3588s_defconfig | 38 +- .../src/configs/photonicat-rk3568_defconfig | 17 +- .../src/configs/roc-pc-rk3568_defconfig | 18 +- 20 files changed, 115 insertions(+), 1511 deletions(-) delete mode 100644 package/boot/uboot-rockchip/patches/104-usb-dwc3-of-simple-Remove-Amlogic-and-Rockchip-compatible.patch delete mode 100644 package/boot/uboot-rockchip/src/arch/arm/dts/rk3568-fastrhino-r66s.dts delete mode 100644 package/boot/uboot-rockchip/src/arch/arm/dts/rk3568-fastrhino-r66s.dtsi delete mode 100644 package/boot/uboot-rockchip/src/arch/arm/dts/rk3568-fastrhino-r68s.dts delete mode 100644 package/boot/uboot-rockchip/src/arch/arm/dts/rk3568-roc-pc.dts diff --git a/package/boot/uboot-rockchip/Makefile b/package/boot/uboot-rockchip/Makefile index dec4b427fe..65e0040f40 100644 --- a/package/boot/uboot-rockchip/Makefile +++ b/package/boot/uboot-rockchip/Makefile @@ -5,9 +5,9 @@ include $(TOPDIR)/rules.mk include $(INCLUDE_DIR)/kernel.mk -PKG_VERSION:=2024.04 +PKG_VERSION:=2024.07 PKG_RELEASE:=1 -PKG_HASH:=18a853fe39fad7ad03a90cc2d4275aeaed6da69735defac3492b80508843dd4a +PKG_HASH:=f591da9ab90ef3d6b3d173766d0ddff90c4ed7330680897486117df390d83c8f PKG_MAINTAINER:=Tobias Maedel diff --git a/package/boot/uboot-rockchip/patches/101-rockchip-boot_mode-Allow-rockchip_dnl_key_pressed-in-SPL.patch b/package/boot/uboot-rockchip/patches/101-rockchip-boot_mode-Allow-rockchip_dnl_key_pressed-in-SPL.patch index 9c540d8946..5b7468ee5b 100644 --- a/package/boot/uboot-rockchip/patches/101-rockchip-boot_mode-Allow-rockchip_dnl_key_pressed-in-SPL.patch +++ b/package/boot/uboot-rockchip/patches/101-rockchip-boot_mode-Allow-rockchip_dnl_key_pressed-in-SPL.patch @@ -36,8 +36,8 @@ Signed-off-by: Chris Morgan + +ifeq ($(CONFIG_SPL_BUILD)$(CONFIG_TPL_BUILD),) obj-$(CONFIG_ROCKCHIP_COMMON_BOARD) += board.o - obj-$(CONFIG_MISC_INIT_R) += misc.o endif + --- a/arch/arm/mach-rockchip/boot_mode.c +++ b/arch/arm/mach-rockchip/boot_mode.c @@ -38,6 +38,10 @@ void set_back_to_bootrom_dnl_flag(void) @@ -50,8 +50,8 @@ Signed-off-by: Chris Morgan + __weak int rockchip_dnl_key_pressed(void) { - unsigned int val; -@@ -52,7 +56,8 @@ __weak int rockchip_dnl_key_pressed(void + #if CONFIG_IS_ENABLED(ADC) +@@ -53,7 +57,8 @@ __weak int rockchip_dnl_key_pressed(void ret = -ENODEV; uclass_foreach_dev(dev, uc) { if (!strncmp(dev->name, "saradc", 6)) { @@ -61,7 +61,7 @@ Signed-off-by: Chris Morgan break; } } -@@ -73,11 +78,13 @@ __weak int rockchip_dnl_key_pressed(void +@@ -77,11 +82,13 @@ __weak int rockchip_dnl_key_pressed(void void rockchip_dnl_mode_check(void) { @@ -75,7 +75,7 @@ Signed-off-by: Chris Morgan } int setup_boot_mode(void) -@@ -90,6 +97,7 @@ int setup_boot_mode(void) +@@ -94,6 +101,7 @@ int setup_boot_mode(void) boot_mode = readl(reg); debug("%s: boot mode 0x%08x\n", __func__, boot_mode); @@ -83,7 +83,7 @@ Signed-off-by: Chris Morgan /* Clear boot mode */ writel(BOOT_NORMAL, reg); -@@ -103,6 +111,7 @@ int setup_boot_mode(void) +@@ -107,6 +115,7 @@ int setup_boot_mode(void) env_set("preboot", "setenv preboot; ums mmc 0"); break; } @@ -93,7 +93,7 @@ Signed-off-by: Chris Morgan } --- a/arch/arm/mach-rockchip/rk3568/rk3568.c +++ b/arch/arm/mach-rockchip/rk3568/rk3568.c -@@ -135,3 +135,26 @@ int arch_cpu_init(void) +@@ -134,3 +134,26 @@ int arch_cpu_init(void) #endif return 0; } diff --git a/package/boot/uboot-rockchip/patches/104-usb-dwc3-of-simple-Remove-Amlogic-and-Rockchip-compatible.patch b/package/boot/uboot-rockchip/patches/104-usb-dwc3-of-simple-Remove-Amlogic-and-Rockchip-compatible.patch deleted file mode 100644 index 3939535a94..0000000000 --- a/package/boot/uboot-rockchip/patches/104-usb-dwc3-of-simple-Remove-Amlogic-and-Rockchip-compatible.patch +++ /dev/null @@ -1,27 +0,0 @@ -From 6b211613625eb264c22bbf3a53fa8cb1014d6da3 Mon Sep 17 00:00:00 2001 -From: Jonas Karlman -Date: Tue, 9 May 2023 01:32:22 +0000 -Subject: [PATCH] usb: dwc3-of-simple: Remove Amlogic and Rockchip compatible - -Remove the rockchip,rk3399-dwc3 compatible from the dwc3-of-simple -driver now that all boards have changed to use the dwc3-generic driver. - -Also remove the amlogic,meson-gxl-dwc3 compatible, it is no longer in -use by any device tree in mainline linux or U-Boot. - -Signed-off-by: Jonas Karlman ---- - drivers/usb/host/dwc3-of-simple.c | 2 -- - 1 file changed, 2 deletions(-) - ---- a/drivers/usb/host/dwc3-of-simple.c -+++ b/drivers/usb/host/dwc3-of-simple.c -@@ -90,8 +90,6 @@ static int dwc3_of_simple_remove(struct - } - - static const struct udevice_id dwc3_of_simple_ids[] = { -- { .compatible = "amlogic,meson-gxl-dwc3" }, -- { .compatible = "rockchip,rk3399-dwc3" }, - { .compatible = "ti,dwc3" }, - { } - }; diff --git a/package/boot/uboot-rockchip/patches/105-bootstd-efi-Initialize-PCI-to-discover-network-controller.patch b/package/boot/uboot-rockchip/patches/105-bootstd-efi-Initialize-PCI-to-discover-network-controller.patch index 045054a27f..b92ae14d66 100644 --- a/package/boot/uboot-rockchip/patches/105-bootstd-efi-Initialize-PCI-to-discover-network-controller.patch +++ b/package/boot/uboot-rockchip/patches/105-bootstd-efi-Initialize-PCI-to-discover-network-controller.patch @@ -26,15 +26,15 @@ Signed-off-by: Jonas Karlman --- a/boot/bootmeth_efi.c +++ b/boot/bootmeth_efi.c -@@ -16,6 +16,7 @@ - #include +@@ -17,6 +17,7 @@ + #include #include #include +#include #include #include #include -@@ -403,6 +404,14 @@ static int distro_efi_read_bootflow(stru +@@ -365,6 +366,14 @@ static int distro_efi_read_bootflow(stru { int ret; diff --git a/package/boot/uboot-rockchip/patches/900-arm-add-dts-files.patch b/package/boot/uboot-rockchip/patches/900-arm-add-dts-files.patch index b19f5f9017..87f995c2a1 100644 --- a/package/boot/uboot-rockchip/patches/900-arm-add-dts-files.patch +++ b/package/boot/uboot-rockchip/patches/900-arm-add-dts-files.patch @@ -1,47 +1,21 @@ --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile -@@ -148,6 +148,7 @@ dtb-$(CONFIG_ROCKCHIP_RK3399) += \ - rk3399-firefly.dtb \ - rk3399-gru-bob.dtb \ - rk3399-gru-kevin.dtb \ -+ rk3399-guangmiao-g4c.dtb \ - rk3399-khadas-edge.dtb \ - rk3399-khadas-edge-captain.dtb \ - rk3399-khadas-edge-v.dtb \ -@@ -158,6 +159,7 @@ dtb-$(CONFIG_ROCKCHIP_RK3399) += \ - rk3399-nanopi-m4b.dtb \ - rk3399-nanopi-neo4.dtb \ - rk3399-nanopi-r4s.dtb \ -+ rk3399-nanopi-r4se.dtb \ - rk3399-orangepi.dtb \ - rk3399-pinebook-pro.dtb \ - rk3399-pinephone-pro.dtb \ -@@ -182,12 +184,17 @@ dtb-$(CONFIG_ROCKCHIP_RK3568) += \ - rk3566-soquartz-model-a.dtb \ - rk3568-bpi-r2-pro.dtb \ - rk3568-evb.dtb \ -+ rk3568-fastrhino-r66s.dtb \ -+ rk3568-fastrhino-r68s.dtb \ - rk3568-generic.dtb \ - rk3568-lubancat-2.dtb \ -+ rk3568-mrkaio-m68s.dtb \ - rk3568-nanopi-r5c.dtb \ - rk3568-nanopi-r5s.dtb \ - rk3568-odroid-m1.dtb \ -+ rk3568-photonicat.dtb \ - rk3568-radxa-e25.dtb \ -+ rk3568-roc-pc.dtb \ - rk3568-rock-3a.dtb +@@ -96,6 +96,18 @@ dtb-$(CONFIG_ROCKCHIP_RK3368) += \ + rk3368-geekbox.dtb \ + rk3368-px5-evb.dtb \ - dtb-$(CONFIG_ROCKCHIP_RK3588) += \ -@@ -200,7 +207,9 @@ dtb-$(CONFIG_ROCKCHIP_RK3588) += \ - rk3588-quartzpro64.dtb \ - rk3588-turing-rk1.dtb \ - rk3588s-rock-5a.dtb \ -- rk3588-rock-5b.dtb -+ rk3588-rock-5b.dtb \ ++dtb-$(CONFIG_ROCKCHIP_RK3399) += \ ++ rk3399-guangmiao-g4c.dtb \ ++ rk3399-nanopi-r4se.dtb ++ ++dtb-$(CONFIG_ROCKCHIP_RK3568) += \ ++ rk3568-mrkaio-m68s.dtb \ ++ rk3568-photonicat.dtb ++ ++dtb-$(CONFIG_ROCKCHIP_RK3588) += \ + rk3588s-nanopi-r6c.dtb \ + rk3588s-nanopi-r6s.dtb ++ + dtb-$(CONFIG_ARCH_S5P4418) += \ + s5p4418-nanopi2.dtb - dtb-$(CONFIG_ROCKCHIP_RV1108) += \ - rv1108-elgin-r1.dtb \ diff --git a/package/boot/uboot-rockchip/src/arch/arm/dts/rk3568-fastrhino-r66s.dts b/package/boot/uboot-rockchip/src/arch/arm/dts/rk3568-fastrhino-r66s.dts deleted file mode 100644 index 58ab7e9971..0000000000 --- a/package/boot/uboot-rockchip/src/arch/arm/dts/rk3568-fastrhino-r66s.dts +++ /dev/null @@ -1,27 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-or-later OR MIT - -#include "rk3568-fastrhino-r66s.dtsi" - -/ { - model = "Lunzn FastRhino R66S"; - compatible = "lunzn,fastrhino-r66s", "rockchip,rk3568"; - - aliases { - mmc0 = &sdmmc0; - }; -}; - -&sdmmc0 { - bus-width = <4>; - cap-mmc-highspeed; - cap-sd-highspeed; - disable-wp; - max-frequency = <150000000>; - no-sdio; - no-mmc; - pinctrl-names = "default"; - pinctrl-0 = <&sdmmc0_bus4 &sdmmc0_clk &sdmmc0_cmd &sdmmc0_det>; - vmmc-supply = <&vcc3v3_sd>; - vqmmc-supply = <&vccio_sd>; - status = "okay"; -}; diff --git a/package/boot/uboot-rockchip/src/arch/arm/dts/rk3568-fastrhino-r66s.dtsi b/package/boot/uboot-rockchip/src/arch/arm/dts/rk3568-fastrhino-r66s.dtsi deleted file mode 100644 index 25e205632a..0000000000 --- a/package/boot/uboot-rockchip/src/arch/arm/dts/rk3568-fastrhino-r66s.dtsi +++ /dev/null @@ -1,484 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-or-later OR MIT - -/dts-v1/; -#include -#include -#include -#include -#include -#include "rk3568.dtsi" - -/ { - chosen: chosen { - stdout-path = "serial2:1500000n8"; - }; - - gpio-keys { - compatible = "gpio-keys"; - pinctrl-names = "default"; - pinctrl-0 = <&reset_button_pin>; - - button-reset { - debounce-interval = <50>; - gpios = <&gpio0 RK_PB6 GPIO_ACTIVE_LOW>; - label = "reset"; - linux,code = ; - }; - }; - - gpio-leds { - compatible = "gpio-leds"; - pinctrl-names = "default"; - pinctrl-0 = <&status_led_pin>; - - status_led: led-status { - color = ; - function = LED_FUNCTION_STATUS; - gpios = <&gpio0 RK_PC0 GPIO_ACTIVE_HIGH>; - linux,default-trigger = "heartbeat"; - }; - }; - - dc_12v: dc-12v-regulator { - compatible = "regulator-fixed"; - regulator-name = "dc_12v"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <12000000>; - regulator-max-microvolt = <12000000>; - }; - - vcc3v3_pcie: vcc3v3-pcie-regulator { - compatible = "regulator-fixed"; - regulator-name = "vcc3v3_pcie"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - vin-supply = <&vcc5v0_sys>; - }; - - vcc3v3_sys: vcc3v3-sys-regulator { - compatible = "regulator-fixed"; - regulator-name = "vcc3v3_sys"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - vin-supply = <&dc_12v>; - }; - - vcc5v0_sys: vcc5v0-sys-regulator { - compatible = "regulator-fixed"; - regulator-name = "vcc5v0_sys"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - vin-supply = <&dc_12v>; - }; - - vcc5v0_usb_host: vcc5v0-usb-host-regulator { - compatible = "regulator-fixed"; - regulator-name = "vcc5v0_usb_host"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - }; - - vcc5v0_usb_otg: vcc5v0-usb-otg-regulator { - compatible = "regulator-fixed"; - enable-active-high; - gpio = <&gpio0 RK_PA5 GPIO_ACTIVE_HIGH>; - pinctrl-names = "default"; - pinctrl-0 = <&vcc5v0_usb_otg_en>; - regulator-name = "vcc5v0_usb_otg"; - regulator-always-on; - regulator-boot-on; - }; -}; - -&combphy0 { - status = "okay"; -}; - -&combphy1 { - status = "okay"; -}; - -&cpu0 { - cpu-supply = <&vdd_cpu>; -}; - -&cpu1 { - cpu-supply = <&vdd_cpu>; -}; - -&cpu2 { - cpu-supply = <&vdd_cpu>; -}; - -&cpu3 { - cpu-supply = <&vdd_cpu>; -}; - -&gpu { - mali-supply = <&vdd_gpu>; - status = "okay"; -}; - -&i2c0 { - status = "okay"; - - vdd_cpu: regulator@1c { - compatible = "tcs,tcs4525"; - reg = <0x1c>; - fcs,suspend-voltage-selector = <1>; - regulator-name = "vdd_cpu"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <800000>; - regulator-max-microvolt = <1150000>; - regulator-ramp-delay = <2300>; - vin-supply = <&vcc5v0_sys>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - rk809: pmic@20 { - compatible = "rockchip,rk809"; - reg = <0x20>; - interrupt-parent = <&gpio0>; - interrupts = ; - #clock-cells = <1>; - pinctrl-names = "default"; - pinctrl-0 = <&pmic_int>; - rockchip,system-power-controller; - vcc1-supply = <&vcc3v3_sys>; - vcc2-supply = <&vcc3v3_sys>; - vcc3-supply = <&vcc3v3_sys>; - vcc4-supply = <&vcc3v3_sys>; - vcc5-supply = <&vcc3v3_sys>; - vcc6-supply = <&vcc3v3_sys>; - vcc7-supply = <&vcc3v3_sys>; - vcc8-supply = <&vcc3v3_sys>; - vcc9-supply = <&vcc3v3_sys>; - wakeup-source; - - regulators { - vdd_logic: DCDC_REG1 { - regulator-name = "vdd_logic"; - regulator-always-on; - regulator-boot-on; - regulator-init-microvolt = <900000>; - regulator-initial-mode = <0x2>; - regulator-min-microvolt = <500000>; - regulator-max-microvolt = <1350000>; - regulator-ramp-delay = <6001>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vdd_gpu: DCDC_REG2 { - regulator-name = "vdd_gpu"; - regulator-always-on; - regulator-init-microvolt = <900000>; - regulator-initial-mode = <0x2>; - regulator-min-microvolt = <500000>; - regulator-max-microvolt = <1350000>; - regulator-ramp-delay = <6001>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcc_ddr: DCDC_REG3 { - regulator-name = "vcc_ddr"; - regulator-always-on; - regulator-boot-on; - regulator-initial-mode = <0x2>; - - regulator-state-mem { - regulator-on-in-suspend; - }; - }; - - vdd_npu: DCDC_REG4 { - regulator-name = "vdd_npu"; - regulator-init-microvolt = <900000>; - regulator-initial-mode = <0x2>; - regulator-min-microvolt = <500000>; - regulator-max-microvolt = <1350000>; - regulator-ramp-delay = <6001>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcc_1v8: DCDC_REG5 { - regulator-name = "vcc_1v8"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vdda0v9_image: LDO_REG1 { - regulator-name = "vdda0v9_image"; - regulator-min-microvolt = <950000>; - regulator-max-microvolt = <950000>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vdda_0v9: LDO_REG2 { - regulator-name = "vdda_0v9"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <900000>; - regulator-max-microvolt = <900000>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vdda0v9_pmu: LDO_REG3 { - regulator-name = "vdda0v9_pmu"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <900000>; - regulator-max-microvolt = <900000>; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <900000>; - }; - }; - - vccio_acodec: LDO_REG4 { - regulator-name = "vccio_acodec"; - regulator-always-on; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vccio_sd: LDO_REG5 { - regulator-name = "vccio_sd"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <3300000>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcc3v3_pmu: LDO_REG6 { - regulator-name = "vcc3v3_pmu"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <3300000>; - }; - }; - - vcca_1v8: LDO_REG7 { - regulator-name = "vcca_1v8"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcca1v8_pmu: LDO_REG8 { - regulator-name = "vcca1v8_pmu"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <1800000>; - }; - }; - - vcca1v8_image: LDO_REG9 { - regulator-name = "vcca1v8_image"; - regulator-init-microvolt = <950000>; - regulator-min-microvolt = <950000>; - regulator-max-microvolt = <1800000>; - - regulator-state-mem { - regulator-off-in-suspend; - regulator-suspend-microvolt = <950000>; - }; - }; - - vcc_3v3: SWITCH_REG1 { - regulator-name = "vcc_3v3"; - regulator-always-on; - regulator-boot-on; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcc3v3_sd: SWITCH_REG2 { - regulator-name = "vcc3v3_sd"; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - }; - }; -}; - -&pcie30phy { - data-lanes = <1 2>; - status = "okay"; -}; - -&pcie3x1 { - num-lanes = <1>; - reset-gpios = <&gpio0 RK_PC3 GPIO_ACTIVE_HIGH>; - vpcie3v3-supply = <&vcc3v3_pcie>; - status = "okay"; -}; - -&pcie3x2 { - num-lanes = <1>; - reset-gpios = <&gpio0 RK_PC6 GPIO_ACTIVE_HIGH>; - vpcie3v3-supply = <&vcc3v3_pcie>; - status = "okay"; -}; - -&pinctrl { - gpio-leds { - status_led_pin: status-led-pin { - rockchip,pins = <0 RK_PC0 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; - - pmic { - pmic_int: pmic-int { - rockchip,pins = <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>; - }; - }; - - rockchip-key { - reset_button_pin: reset-button-pin { - rockchip,pins = <0 RK_PB6 RK_FUNC_GPIO &pcfg_pull_up>; - }; - }; - - usb { - vcc5v0_usb_otg_en: vcc5v0-usb-otg-en { - rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; -}; - -&pmu_io_domains { - pmuio1-supply = <&vcc3v3_pmu>; - pmuio2-supply = <&vcc3v3_pmu>; - vccio1-supply = <&vccio_acodec>; - vccio3-supply = <&vccio_sd>; - vccio4-supply = <&vcc_1v8>; - vccio5-supply = <&vcc_3v3>; - vccio6-supply = <&vcc_1v8>; - vccio7-supply = <&vcc_3v3>; - status = "okay"; -}; - -&saradc { - vref-supply = <&vcca_1v8>; - status = "okay"; -}; - -&tsadc { - rockchip,hw-tshut-mode = <1>; - rockchip,hw-tshut-polarity = <0>; - status = "okay"; -}; - -&uart2 { - status = "okay"; -}; - -&usb_host0_ehci { - status = "okay"; -}; - -&usb_host0_ohci { - status = "okay"; -}; - -&usb_host0_xhci { - dr_mode = "host"; - extcon = <&usb2phy0>; - status = "okay"; -}; - -&usb_host1_ehci { - status = "okay"; -}; - -&usb_host1_ohci { - status = "okay"; -}; - -&usb_host1_xhci { - status = "okay"; -}; - -&usb2phy0 { - status = "okay"; -}; - -&usb2phy0_host { - phy-supply = <&vcc5v0_usb_host>; - status = "okay"; -}; - -&usb2phy0_otg { - phy-supply = <&vcc5v0_usb_otg>; - status = "okay"; -}; - -&vop { - assigned-clocks = <&cru DCLK_VOP0>, <&cru DCLK_VOP1>; - assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>; - status = "okay"; -}; - -&vop_mmu { - status = "okay"; -}; diff --git a/package/boot/uboot-rockchip/src/arch/arm/dts/rk3568-fastrhino-r68s.dts b/package/boot/uboot-rockchip/src/arch/arm/dts/rk3568-fastrhino-r68s.dts deleted file mode 100644 index e1fe5e4426..0000000000 --- a/package/boot/uboot-rockchip/src/arch/arm/dts/rk3568-fastrhino-r68s.dts +++ /dev/null @@ -1,112 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0-or-later OR MIT - -#include "rk3568-fastrhino-r66s.dtsi" - -/ { - model = "Lunzn FastRhino R68S"; - compatible = "lunzn,fastrhino-r68s", "rockchip,rk3568"; - - aliases { - ethernet0 = &gmac0; - ethernet1 = &gmac1; - mmc0 = &sdhci; - }; - - adc-keys { - compatible = "adc-keys"; - io-channels = <&saradc 0>; - io-channel-names = "buttons"; - keyup-threshold-microvolt = <1800000>; - - button-recovery { - label = "Recovery"; - linux,code = ; - press-threshold-microvolt = <1750>; - }; - }; -}; - -&gmac0 { - assigned-clocks = <&cru SCLK_GMAC0_RX_TX>, <&cru SCLK_GMAC0>; - assigned-clock-parents = <&cru SCLK_GMAC0_RGMII_SPEED>; - assigned-clock-rates = <0>, <125000000>; - clock_in_out = "output"; - phy-handle = <&rgmii_phy0>; - phy-mode = "rgmii-id"; - pinctrl-names = "default"; - pinctrl-0 = <&gmac0_miim - &gmac0_tx_bus2 - &gmac0_rx_bus2 - &gmac0_rgmii_clk - &gmac0_rgmii_bus>; - snps,reset-gpio = <&gpio0 RK_PB0 GPIO_ACTIVE_LOW>; - snps,reset-active-low; - /* Reset time is 15ms, 50ms for rtl8211f */ - snps,reset-delays-us = <0 15000 50000>; - tx_delay = <0x3c>; - rx_delay = <0x2f>; - status = "okay"; -}; - -&gmac1 { - assigned-clocks = <&cru SCLK_GMAC1_RX_TX>, <&cru SCLK_GMAC1>; - assigned-clock-parents = <&cru SCLK_GMAC1_RGMII_SPEED>; - assigned-clock-rates = <0>, <125000000>; - clock_in_out = "output"; - phy-handle = <&rgmii_phy1>; - phy-mode = "rgmii-id"; - pinctrl-names = "default"; - pinctrl-0 = <&gmac1m1_miim - &gmac1m1_tx_bus2 - &gmac1m1_rx_bus2 - &gmac1m1_rgmii_clk - &gmac1m1_rgmii_bus>; - snps,reset-gpio = <&gpio0 RK_PB1 GPIO_ACTIVE_LOW>; - snps,reset-active-low; - /* Reset time is 15ms, 50ms for rtl8211f */ - snps,reset-delays-us = <0 15000 50000>; - tx_delay = <0x4f>; - rx_delay = <0x26>; - status = "okay"; -}; - -&mdio0 { - rgmii_phy0: ethernet-phy@0 { - compatible = "ethernet-phy-ieee802.3-c22"; - reg = <0>; - pinctrl-0 = <ð_phy0_reset_pin>; - pinctrl-names = "default"; - }; -}; - -&mdio1 { - rgmii_phy1: ethernet-phy@0 { - compatible = "ethernet-phy-ieee802.3-c22"; - reg = <0>; - pinctrl-0 = <ð_phy1_reset_pin>; - pinctrl-names = "default"; - }; -}; - -&pinctrl { - gmac0 { - eth_phy0_reset_pin: eth-phy0-reset-pin { - rockchip,pins = <1 RK_PB0 RK_FUNC_GPIO &pcfg_pull_up>; - }; - }; - - gmac1 { - eth_phy1_reset_pin: eth-phy1-reset-pin { - rockchip,pins = <1 RK_PB1 RK_FUNC_GPIO &pcfg_pull_up>; - }; - }; -}; - -&sdhci { - bus-width = <8>; - max-frequency = <200000000>; - non-removable; - pinctrl-names = "default"; - pinctrl-0 = <&emmc_bus8 &emmc_clk &emmc_cmd &emmc_datastrobe>; - status = "okay"; -}; diff --git a/package/boot/uboot-rockchip/src/arch/arm/dts/rk3568-roc-pc.dts b/package/boot/uboot-rockchip/src/arch/arm/dts/rk3568-roc-pc.dts deleted file mode 100644 index e333449ead..0000000000 --- a/package/boot/uboot-rockchip/src/arch/arm/dts/rk3568-roc-pc.dts +++ /dev/null @@ -1,643 +0,0 @@ -// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -/* - * Copyright (c) 2021 Rockchip Electronics Co., Ltd. - */ - -/dts-v1/; - -#include -#include -#include -#include "rk3568.dtsi" - -/ { - model = "Firefly Station P2"; - compatible = "firefly,rk3568-roc-pc", "rockchip,rk3568"; - - aliases { - ethernet0 = &gmac0; - ethernet1 = &gmac1; - mmc0 = &sdmmc0; - mmc1 = &sdhci; - }; - - chosen: chosen { - stdout-path = "serial2:1500000n8"; - }; - - dc_12v: dc-12v-regulator { - compatible = "regulator-fixed"; - regulator-name = "dc_12v"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <12000000>; - regulator-max-microvolt = <12000000>; - }; - - gmac0_clkin: external-gmac0-clock { - compatible = "fixed-clock"; - clock-frequency = <125000000>; - clock-output-names = "gmac0_clkin"; - #clock-cells = <0>; - }; - - gmac1_clkin: external-gmac1-clock { - compatible = "fixed-clock"; - clock-frequency = <125000000>; - clock-output-names = "gmac1_clkin"; - #clock-cells = <0>; - }; - - leds { - compatible = "gpio-leds"; - - led-user { - label = "user-led"; - default-state = "on"; - gpios = <&gpio1 RK_PB2 GPIO_ACTIVE_HIGH>; - linux,default-trigger = "heartbeat"; - pinctrl-names = "default"; - pinctrl-0 = <&user_led_enable_h>; - retain-state-suspended; - }; - }; - - hdmi-con { - compatible = "hdmi-connector"; - type = "a"; - - port { - hdmi_con_in: endpoint { - remote-endpoint = <&hdmi_out_con>; - }; - }; - }; - - pcie30_avdd0v9: pcie30-avdd0v9-regulator { - compatible = "regulator-fixed"; - regulator-name = "pcie30_avdd0v9"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <900000>; - regulator-max-microvolt = <900000>; - vin-supply = <&vcc3v3_sys>; - }; - - pcie30_avdd1v8: pcie30-avdd1v8-regulator { - compatible = "regulator-fixed"; - regulator-name = "pcie30_avdd1v8"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - vin-supply = <&vcc3v3_sys>; - }; - - vcc3v3_sys: vcc3v3-sys-regulator { - compatible = "regulator-fixed"; - regulator-name = "vcc3v3_sys"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - vin-supply = <&dc_12v>; - }; - - vcc3v3_pcie: vcc3v3-pcie-regulator { - compatible = "regulator-fixed"; - regulator-name = "vcc3v3_pcie"; - enable-active-high; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - pinctrl-names = "default"; - pinctrl-0 = <&vcc3v3_pcie_en_pin>; - gpio = <&gpio0 RK_PD4 GPIO_ACTIVE_HIGH>; - startup-delay-us = <5000>; - vin-supply = <&vcc5v0_sys>; - }; - - vcc5v0_sys: vcc5v0-sys-regulator { - compatible = "regulator-fixed"; - regulator-name = "vcc5v0_sys"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - vin-supply = <&dc_12v>; - }; - - vcc5v0_usb: vcc5v0-usb-regulator { - compatible = "regulator-fixed"; - regulator-name = "vcc5v0_usb"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - vin-supply = <&vcc5v0_sys>; - }; - - vcc5v0_host: vcc5v0-host-regulator { - compatible = "regulator-fixed"; - regulator-name = "vcc5v0_host"; - enable-active-high; - gpio = <&gpio0 RK_PA6 GPIO_ACTIVE_HIGH>; - pinctrl-names = "default"; - pinctrl-0 = <&vcc5v0_host_en>; - regulator-always-on; - vin-supply = <&vcc5v0_usb>; - }; - - vcc5v0_otg: vcc5v0-otg-regulator { - compatible = "regulator-fixed"; - regulator-name = "vcc5v0_otg"; - enable-active-high; - gpio = <&gpio0 RK_PA5 GPIO_ACTIVE_HIGH>; - pinctrl-names = "default"; - pinctrl-0 = <&vcc5v0_otg_en>; - vin-supply = <&vcc5v0_usb>; - }; -}; - -&combphy0 { - /* used for USB3 */ - status = "okay"; -}; - -&combphy1 { - /* used for USB3 */ - status = "okay"; -}; - -&combphy2 { - /* used for SATA */ - status = "okay"; -}; - -&gmac0 { - assigned-clocks = <&cru SCLK_GMAC0_RX_TX>, <&cru SCLK_GMAC0>; - assigned-clock-parents = <&cru SCLK_GMAC0_RGMII_SPEED>, <&gmac0_clkin>; - clock_in_out = "input"; - pinctrl-names = "default"; - pinctrl-0 = <&gmac0_miim - &gmac0_tx_bus2 - &gmac0_rx_bus2 - &gmac0_rgmii_clk - &gmac0_rgmii_bus - &gmac0_clkinout>; - phy-handle = <&rgmii_phy0>; - phy-mode = "rgmii"; - snps,reset-gpio = <&gpio2 RK_PD3 GPIO_ACTIVE_LOW>; - snps,reset-active-low; - /* Reset time is 20ms, 100ms for rtl8211f */ - snps,reset-delays-us = <0 20000 100000>; - tx_delay = <0x3c>; - rx_delay = <0x2f>; - status = "okay"; -}; - -&gmac1 { - assigned-clocks = <&cru SCLK_GMAC1_RX_TX>, <&cru SCLK_GMAC1>; - assigned-clock-parents = <&cru SCLK_GMAC1_RGMII_SPEED>, <&gmac1_clkin>; - clock_in_out = "input"; - pinctrl-names = "default"; - pinctrl-0 = <&gmac1m1_miim - &gmac1m1_tx_bus2 - &gmac1m1_rx_bus2 - &gmac1m1_rgmii_clk - &gmac1m1_rgmii_bus - &gmac1m1_clkinout>; - phy-handle = <&rgmii_phy1>; - phy-mode = "rgmii"; - snps,reset-gpio = <&gpio2 RK_PD1 GPIO_ACTIVE_LOW>; - snps,reset-active-low; - /* Reset time is 20ms, 100ms for rtl8211f */ - snps,reset-delays-us = <0 20000 100000>; - tx_delay = <0x4f>; - rx_delay = <0x26>; - status = "okay"; -}; - -&gpu { - mali-supply = <&vdd_gpu>; - status = "okay"; -}; - -&hdmi { - avdd-0v9-supply = <&vdda0v9_image>; - avdd-1v8-supply = <&vcca1v8_image>; - status = "okay"; -}; - -&hdmi_in { - hdmi_in_vp0: endpoint { - remote-endpoint = <&vp0_out_hdmi>; - }; -}; - -&hdmi_out { - hdmi_out_con: endpoint { - remote-endpoint = <&hdmi_con_in>; - }; -}; - -&hdmi_sound { - status = "okay"; -}; - -&i2c0 { - status = "okay"; - - rk809: pmic@20 { - compatible = "rockchip,rk809"; - reg = <0x20>; - interrupt-parent = <&gpio0>; - interrupts = ; - #clock-cells = <1>; - pinctrl-names = "default"; - pinctrl-0 = <&pmic_int>; - rockchip,system-power-controller; - vcc1-supply = <&vcc3v3_sys>; - vcc2-supply = <&vcc3v3_sys>; - vcc3-supply = <&vcc3v3_sys>; - vcc4-supply = <&vcc3v3_sys>; - vcc5-supply = <&vcc3v3_sys>; - vcc6-supply = <&vcc3v3_sys>; - vcc7-supply = <&vcc3v3_sys>; - vcc8-supply = <&vcc3v3_sys>; - vcc9-supply = <&vcc3v3_sys>; - wakeup-source; - - regulators { - vdd_logic: DCDC_REG1 { - regulator-name = "vdd_logic"; - regulator-always-on; - regulator-boot-on; - regulator-init-microvolt = <900000>; - regulator-initial-mode = <0x2>; - regulator-min-microvolt = <500000>; - regulator-max-microvolt = <1350000>; - regulator-ramp-delay = <6001>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vdd_gpu: DCDC_REG2 { - regulator-name = "vdd_gpu"; - regulator-init-microvolt = <900000>; - regulator-initial-mode = <0x2>; - regulator-min-microvolt = <500000>; - regulator-max-microvolt = <1350000>; - regulator-ramp-delay = <6001>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcc_ddr: DCDC_REG3 { - regulator-name = "vcc_ddr"; - regulator-always-on; - regulator-boot-on; - regulator-initial-mode = <0x2>; - - regulator-state-mem { - regulator-on-in-suspend; - }; - }; - - vdd_npu: DCDC_REG4 { - regulator-name = "vdd_npu"; - regulator-init-microvolt = <900000>; - regulator-initial-mode = <0x2>; - regulator-min-microvolt = <500000>; - regulator-max-microvolt = <1350000>; - regulator-ramp-delay = <6001>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcc_1v8: DCDC_REG5 { - regulator-name = "vcc_1v8"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vdda0v9_image: LDO_REG1 { - regulator-name = "vdda0v9_image"; - regulator-min-microvolt = <900000>; - regulator-max-microvolt = <900000>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vdda_0v9: LDO_REG2 { - regulator-name = "vdda_0v9"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <900000>; - regulator-max-microvolt = <900000>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vdda0v9_pmu: LDO_REG3 { - regulator-name = "vdda0v9_pmu"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <900000>; - regulator-max-microvolt = <900000>; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <900000>; - }; - }; - - vccio_acodec: LDO_REG4 { - regulator-name = "vccio_acodec"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vccio_sd: LDO_REG5 { - regulator-name = "vccio_sd"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <3300000>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcc3v3_pmu: LDO_REG6 { - regulator-name = "vcc3v3_pmu"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <3300000>; - }; - }; - - vcca_1v8: LDO_REG7 { - regulator-name = "vcca_1v8"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcca1v8_pmu: LDO_REG8 { - regulator-name = "vcca1v8_pmu"; - regulator-always-on; - regulator-boot-on; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - - regulator-state-mem { - regulator-on-in-suspend; - regulator-suspend-microvolt = <1800000>; - }; - }; - - vcca1v8_image: LDO_REG9 { - regulator-name = "vcca1v8_image"; - regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <1800000>; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcc_3v3: SWITCH_REG1 { - regulator-name = "vcc_3v3"; - regulator-always-on; - regulator-boot-on; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - - vcc3v3_sd: SWITCH_REG2 { - regulator-name = "vcc3v3_sd"; - regulator-always-on; - regulator-boot-on; - - regulator-state-mem { - regulator-off-in-suspend; - }; - }; - }; - }; -}; - -&i2s0_8ch { - status = "okay"; -}; - -&mdio0 { - rgmii_phy0: phy@0 { - compatible = "ethernet-phy-ieee802.3-c22"; - reg = <0x0>; - }; -}; - -&mdio1 { - rgmii_phy1: phy@0 { - compatible = "ethernet-phy-ieee802.3-c22"; - reg = <0x0>; - }; -}; - -&pcie30phy { - status = "okay"; -}; - -&pcie3x2 { - pinctrl-names = "default"; - pinctrl-0 = <&pcie_reset_pin>; - reset-gpios = <&gpio2 RK_PD6 GPIO_ACTIVE_HIGH>; - vpcie3v3-supply = <&vcc3v3_pcie>; - status = "okay"; -}; - -&pinctrl { - leds { - user_led_enable_h: user-led-enable-h { - rockchip,pins = <1 RK_PB2 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; - - usb { - vcc5v0_host_en: vcc5v0-host-en { - rockchip,pins = <0 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>; - }; - - vcc5v0_otg_en: vcc5v0-otg-en { - rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; - - pcie { - pcie_reset_pin: pcie-reset-pin { - rockchip,pins = <2 RK_PD6 RK_FUNC_GPIO &pcfg_pull_none>; - }; - vcc3v3_pcie_en_pin: vcc3v3-pcie-en-pin { - rockchip,pins = <0 RK_PD4 RK_FUNC_GPIO &pcfg_pull_none>; - }; - }; - - pmic { - pmic_int: pmic-int { - rockchip,pins = - <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>; - }; - }; -}; - -&pmu_io_domains { - pmuio1-supply = <&vcc3v3_pmu>; - pmuio2-supply = <&vcc3v3_pmu>; - vccio1-supply = <&vccio_acodec>; - vccio2-supply = <&vcc_1v8>; - vccio3-supply = <&vccio_sd>; - vccio4-supply = <&vcc_1v8>; - vccio5-supply = <&vcc_3v3>; - vccio6-supply = <&vcc_1v8>; - vccio7-supply = <&vcc_3v3>; - status = "okay"; -}; - -&saradc { - vref-supply = <&vcca_1v8>; - status = "okay"; -}; - -&sata2 { - status = "okay"; -}; - -&sdhci { - bus-width = <8>; - max-frequency = <200000000>; - non-removable; - pinctrl-names = "default"; - pinctrl-0 = <&emmc_bus8 &emmc_clk &emmc_cmd &emmc_datastrobe>; - status = "okay"; -}; - -&sdmmc0 { - bus-width = <4>; - cap-sd-highspeed; - cd-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_LOW>; - disable-wp; - pinctrl-names = "default"; - pinctrl-0 = <&sdmmc0_bus4 &sdmmc0_clk &sdmmc0_cmd &sdmmc0_det>; - sd-uhs-sdr104; - vmmc-supply = <&vcc3v3_sd>; - vqmmc-supply = <&vccio_sd>; - status = "okay"; -}; - -&tsadc { - status = "okay"; -}; - -&uart2 { - status = "okay"; -}; - -&usb2phy0_host { - phy-supply = <&vcc5v0_host>; - status = "okay"; -}; - -&usb2phy0 { - status = "okay"; -}; - -&usb2phy1 { - status = "okay"; -}; - -&usb2phy0_otg { - status = "okay"; -}; - -&usb2phy1_host { - phy-supply = <&vcc5v0_host>; - status = "okay"; -}; - -&usb2phy1_otg { - phy-supply = <&vcc5v0_host>; - status = "okay"; -}; - -&usb_host0_ehci { - status = "okay"; -}; - -&usb_host0_ohci { - status = "okay"; -}; - -&usb_host1_ehci { - status = "okay"; -}; - -&usb_host1_ohci { - status = "okay"; -}; - -&usb_host0_xhci { - status = "okay"; -}; - -&usb_host1_xhci { - status = "okay"; -}; - -&vp0 { - vp0_out_hdmi: endpoint@ROCKCHIP_VOP2_EP_HDMI0 { - reg = ; - remote-endpoint = <&hdmi_in_vp0>; - }; -}; - -&vop { - assigned-clocks = <&cru DCLK_VOP0>, <&cru DCLK_VOP1>; - assigned-clock-parents = <&pmucru PLL_HPLL>, <&cru PLL_VPLL>; - status = "okay"; -}; - -&vop_mmu { - status = "okay"; -}; diff --git a/package/boot/uboot-rockchip/src/arch/arm/dts/rk3588s-nanopi-r6c.dts b/package/boot/uboot-rockchip/src/arch/arm/dts/rk3588s-nanopi-r6c.dts index a49af7da56..16da11eaac 100644 --- a/package/boot/uboot-rockchip/src/arch/arm/dts/rk3588s-nanopi-r6c.dts +++ b/package/boot/uboot-rockchip/src/arch/arm/dts/rk3588s-nanopi-r6c.dts @@ -9,11 +9,12 @@ gpio-leds { led-lan1 { - label = "green:lan"; + /delete-property/ function-enumerator; }; led-lan2 { - label = "green:user"; + /delete-property/ function-enumerator; + function = LED_FUNCTION_PROGRAMMING; }; }; }; diff --git a/package/boot/uboot-rockchip/src/arch/arm/dts/rk3588s-nanopi-r6s.dts b/package/boot/uboot-rockchip/src/arch/arm/dts/rk3588s-nanopi-r6s.dts index 00dd020b8a..ea3b2b532a 100644 --- a/package/boot/uboot-rockchip/src/arch/arm/dts/rk3588s-nanopi-r6s.dts +++ b/package/boot/uboot-rockchip/src/arch/arm/dts/rk3588s-nanopi-r6s.dts @@ -24,7 +24,6 @@ ethernet0 = &gmac1; mmc0 = &sdmmc; mmc1 = &sdhci; - serial2 = &uart2; }; chosen { @@ -50,22 +49,28 @@ pinctrl-0 = <&lan1_led_pin>, <&lan2_led_pin>, <&power_led_pin>, <&wan_led_pin>; led-lan1 { - label = "green:lan1"; + color = ; + function = LED_FUNCTION_LAN; + function-enumerator = <1>; gpios = <&gpio1 RK_PC3 GPIO_ACTIVE_HIGH>; }; led-lan2 { - label = "green:lan2"; + color = ; + function = LED_FUNCTION_LAN; + function-enumerator = <2>; gpios = <&gpio1 RK_PC4 GPIO_ACTIVE_HIGH>; }; power_led: led-power { - label = "red:power"; + color = ; + function = LED_FUNCTION_POWER; gpios = <&gpio1 RK_PC1 GPIO_ACTIVE_HIGH>; }; led-wan { - label = "green:wan"; + color = ; + function = LED_FUNCTION_WAN; gpios = <&gpio1 RK_PC2 GPIO_ACTIVE_HIGH>; }; }; @@ -158,17 +163,14 @@ &cpu_l0 { cpu-supply = <&vdd_cpu_lit_s0>; - mem-supply = <&vdd_cpu_lit_mem_s0>; }; &cpu_b0 { cpu-supply = <&vdd_cpu_big0_s0>; - mem-supply = <&vdd_cpu_big0_mem_s0>; }; &cpu_b2 { cpu-supply = <&vdd_cpu_big1_s0>; - mem-supply = <&vdd_cpu_big1_mem_s0>; }; &gmac1 { @@ -195,7 +197,7 @@ pinctrl-0 = <&i2c0m2_xfer>; status = "okay"; - vdd_cpu_big0_s0: vdd_cpu_big0_mem_s0: regulator@42 { + vdd_cpu_big0_s0: regulator@42 { compatible = "rockchip,rk8602"; reg = <0x42>; fcs,suspend-voltage-selector = <1>; @@ -212,7 +214,7 @@ }; }; - vdd_cpu_big1_s0: vdd_cpu_big1_mem_s0: regulator@43 { + vdd_cpu_big1_s0: regulator@43 { compatible = "rockchip,rk8603", "rockchip,rk8602"; reg = <0x43>; fcs,suspend-voltage-selector = <1>; diff --git a/package/boot/uboot-rockchip/src/configs/fastrhino-r66s-rk3568_defconfig b/package/boot/uboot-rockchip/src/configs/fastrhino-r66s-rk3568_defconfig index cad4f3baa6..d4f62248f1 100644 --- a/package/boot/uboot-rockchip/src/configs/fastrhino-r66s-rk3568_defconfig +++ b/package/boot/uboot-rockchip/src/configs/fastrhino-r66s-rk3568_defconfig @@ -3,18 +3,9 @@ CONFIG_SKIP_LOWLEVEL_INIT=y CONFIG_SYS_HAS_NONCACHED_MEMORY=y CONFIG_COUNTER_FREQUENCY=24000000 CONFIG_ARCH_ROCKCHIP=y -CONFIG_TEXT_BASE=0x00a00000 -CONFIG_SPL_LIBCOMMON_SUPPORT=y -CONFIG_SPL_LIBGENERIC_SUPPORT=y -CONFIG_NR_DRAM_BANKS=2 -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc00000 -CONFIG_DEFAULT_DEVICE_TREE="rk3568-fastrhino-r66s" +CONFIG_DEFAULT_DEVICE_TREE="rockchip/rk3568-fastrhino-r66s" CONFIG_ROCKCHIP_RK3568=y -CONFIG_SPL_ROCKCHIP_COMMON_BOARD=y CONFIG_SPL_SERIAL=y -CONFIG_SPL_STACK_R_ADDR=0x600000 -CONFIG_SPL_STACK=0x400000 CONFIG_DEBUG_UART_BASE=0xFE660000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_SYS_LOAD_ADDR=0xc00800 @@ -30,12 +21,7 @@ CONFIG_DEFAULT_FDT_FILE="rockchip/rk3568-fastrhino-r66s.dtb" CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SPL_MAX_SIZE=0x40000 CONFIG_SPL_PAD_TO=0x7f8000 -CONFIG_SPL_HAS_BSS_LINKER_SECTION=y -CONFIG_SPL_BSS_START_ADDR=0x4000000 -CONFIG_SPL_BSS_MAX_SIZE=0x4000 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set -# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK_R=y CONFIG_SPL_ATF=y CONFIG_CMD_GPIO=y CONFIG_CMD_GPT=y @@ -58,8 +44,6 @@ CONFIG_ROCKCHIP_GPIO=y CONFIG_SYS_I2C_ROCKCHIP=y CONFIG_MISC=y CONFIG_SUPPORT_EMMC_RPMB=y -CONFIG_MMC_HS200_SUPPORT=y -CONFIG_SPL_MMC_HS200_SUPPORT=y CONFIG_MMC_DW=y CONFIG_MMC_DW_ROCKCHIP=y CONFIG_MMC_SDHCI=y diff --git a/package/boot/uboot-rockchip/src/configs/fastrhino-r68s-rk3568_defconfig b/package/boot/uboot-rockchip/src/configs/fastrhino-r68s-rk3568_defconfig index 7a2322cbda..be2cab4b62 100644 --- a/package/boot/uboot-rockchip/src/configs/fastrhino-r68s-rk3568_defconfig +++ b/package/boot/uboot-rockchip/src/configs/fastrhino-r68s-rk3568_defconfig @@ -3,18 +3,10 @@ CONFIG_SKIP_LOWLEVEL_INIT=y CONFIG_SYS_HAS_NONCACHED_MEMORY=y CONFIG_COUNTER_FREQUENCY=24000000 CONFIG_ARCH_ROCKCHIP=y -CONFIG_TEXT_BASE=0x00a00000 -CONFIG_SPL_LIBCOMMON_SUPPORT=y -CONFIG_SPL_LIBGENERIC_SUPPORT=y -CONFIG_NR_DRAM_BANKS=2 -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc00000 -CONFIG_DEFAULT_DEVICE_TREE="rk3568-fastrhino-r68s" +CONFIG_DEFAULT_DEVICE_TREE="rockchip/rk3568-fastrhino-r68s" CONFIG_ROCKCHIP_RK3568=y -CONFIG_SPL_ROCKCHIP_COMMON_BOARD=y +CONFIG_ROCKCHIP_BOOT_MODE_REG=0x0 CONFIG_SPL_SERIAL=y -CONFIG_SPL_STACK_R_ADDR=0x600000 -CONFIG_SPL_STACK=0x400000 CONFIG_DEBUG_UART_BASE=0xFE660000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_SYS_LOAD_ADDR=0xc00800 @@ -30,12 +22,7 @@ CONFIG_DEFAULT_FDT_FILE="rockchip/rk3568-fastrhino-r68s.dtb" CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SPL_MAX_SIZE=0x40000 CONFIG_SPL_PAD_TO=0x7f8000 -CONFIG_SPL_HAS_BSS_LINKER_SECTION=y -CONFIG_SPL_BSS_START_ADDR=0x4000000 -CONFIG_SPL_BSS_MAX_SIZE=0x4000 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set -# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK_R=y CONFIG_SPL_ADC=y CONFIG_SPL_POWER=y CONFIG_SPL_I2C=y @@ -67,8 +54,6 @@ CONFIG_ROCKCHIP_GPIO=y CONFIG_SYS_I2C_ROCKCHIP=y CONFIG_MISC=y CONFIG_SUPPORT_EMMC_RPMB=y -CONFIG_MMC_HS200_SUPPORT=y -CONFIG_SPL_MMC_HS200_SUPPORT=y CONFIG_MMC_DW=y CONFIG_MMC_DW_ROCKCHIP=y CONFIG_MMC_SDHCI=y @@ -91,6 +76,7 @@ CONFIG_SPL_RAM=y CONFIG_BAUDRATE=1500000 CONFIG_DEBUG_UART_SHIFT=2 CONFIG_SYS_NS16550_MEM32=y +CONFIG_ROCKCHIP_SPI=y CONFIG_SYSRESET=y CONFIG_USB=y CONFIG_USB_XHCI_HCD=y diff --git a/package/boot/uboot-rockchip/src/configs/guangmiao-g4c-rk3399_defconfig b/package/boot/uboot-rockchip/src/configs/guangmiao-g4c-rk3399_defconfig index d0c00476c0..598ca05db3 100644 --- a/package/boot/uboot-rockchip/src/configs/guangmiao-g4c-rk3399_defconfig +++ b/package/boot/uboot-rockchip/src/configs/guangmiao-g4c-rk3399_defconfig @@ -2,31 +2,22 @@ CONFIG_ARM=y CONFIG_SKIP_LOWLEVEL_INIT=y CONFIG_COUNTER_FREQUENCY=24000000 CONFIG_ARCH_ROCKCHIP=y -CONFIG_TEXT_BASE=0x00200000 +CONFIG_SPL_GPIO=y CONFIG_NR_DRAM_BANKS=1 -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x300000 CONFIG_ENV_OFFSET=0x3F8000 CONFIG_DEFAULT_DEVICE_TREE="rk3399-guangmiao-g4c" +CONFIG_DM_RESET=y CONFIG_ROCKCHIP_RK3399=y CONFIG_TARGET_EVB_RK3399=y -CONFIG_SPL_STACK=0x400000 CONFIG_DEBUG_UART_BASE=0xFF1A0000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_SYS_LOAD_ADDR=0x800800 CONFIG_DEBUG_UART=y CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-guangmiao-g4c.dtb" CONFIG_DISPLAY_BOARDINFO_LATE=y -CONFIG_MISC_INIT_R=y -CONFIG_SPL_MAX_SIZE=0x2e000 +CONFIG_SPL_MAX_SIZE=0x40000 CONFIG_SPL_PAD_TO=0x7f8000 -CONFIG_SPL_HAS_BSS_LINKER_SECTION=y -CONFIG_SPL_BSS_START_ADDR=0x400000 -CONFIG_SPL_BSS_MAX_SIZE=0x2000 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set -# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK_R=y -CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000 CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y CONFIG_TPL=y CONFIG_CMD_BOOTZ=y @@ -36,22 +27,26 @@ CONFIG_CMD_USB=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_TIME=y CONFIG_SPL_OF_CONTROL=y -CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" +# CONFIG_OF_UPSTREAM is not set +CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_ROCKCHIP_GPIO=y CONFIG_SYS_I2C_ROCKCHIP=y -CONFIG_MISC=y -CONFIG_ROCKCHIP_EFUSE=y -CONFIG_ROCKCHIP_OTP=y +CONFIG_ROCKCHIP_IODOMAIN=y CONFIG_MMC_DW=y CONFIG_MMC_DW_ROCKCHIP=y CONFIG_MMC_SDHCI=y +CONFIG_MMC_SDHCI_SDMA=y CONFIG_MMC_SDHCI_ROCKCHIP=y +CONFIG_PHY_REALTEK=y +CONFIG_DM_ETH_PHY=y CONFIG_ETH_DESIGNWARE=y CONFIG_GMAC_ROCKCHIP=y +CONFIG_PHY_ROCKCHIP_INNO_USB2=y +CONFIG_PHY_ROCKCHIP_TYPEC=y CONFIG_PMIC_RK8XX=y -CONFIG_REGULATOR_PWM=y +CONFIG_SPL_DM_REGULATOR_FIXED=y CONFIG_REGULATOR_RK8XX=y CONFIG_PWM_ROCKCHIP=y CONFIG_RAM_ROCKCHIP_LPDDR4=y @@ -78,5 +73,4 @@ CONFIG_VIDEO=y CONFIG_DISPLAY=y CONFIG_VIDEO_ROCKCHIP=y CONFIG_DISPLAY_ROCKCHIP_HDMI=y -CONFIG_SPL_TINY_MEMSET=y CONFIG_ERRNO_STR=y diff --git a/package/boot/uboot-rockchip/src/configs/mrkaio-m68s-rk3568_defconfig b/package/boot/uboot-rockchip/src/configs/mrkaio-m68s-rk3568_defconfig index 10831d2563..86f7e9f06a 100644 --- a/package/boot/uboot-rockchip/src/configs/mrkaio-m68s-rk3568_defconfig +++ b/package/boot/uboot-rockchip/src/configs/mrkaio-m68s-rk3568_defconfig @@ -3,18 +3,9 @@ CONFIG_SKIP_LOWLEVEL_INIT=y CONFIG_SYS_HAS_NONCACHED_MEMORY=y CONFIG_COUNTER_FREQUENCY=24000000 CONFIG_ARCH_ROCKCHIP=y -CONFIG_TEXT_BASE=0x00a00000 -CONFIG_SPL_LIBCOMMON_SUPPORT=y -CONFIG_SPL_LIBGENERIC_SUPPORT=y -CONFIG_NR_DRAM_BANKS=2 -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc00000 CONFIG_DEFAULT_DEVICE_TREE="rk3568-mrkaio-m68s" CONFIG_ROCKCHIP_RK3568=y -CONFIG_SPL_ROCKCHIP_COMMON_BOARD=y CONFIG_SPL_SERIAL=y -CONFIG_SPL_STACK_R_ADDR=0x600000 -CONFIG_SPL_STACK=0x400000 CONFIG_DEBUG_UART_BASE=0xFE660000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_SYS_LOAD_ADDR=0xc00800 @@ -30,12 +21,7 @@ CONFIG_DEFAULT_FDT_FILE="rockchip/rk3568-mrkaio-m68s.dtb" CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SPL_MAX_SIZE=0x40000 CONFIG_SPL_PAD_TO=0x7f8000 -CONFIG_SPL_HAS_BSS_LINKER_SECTION=y -CONFIG_SPL_BSS_START_ADDR=0x4000000 -CONFIG_SPL_BSS_MAX_SIZE=0x4000 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set -# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK_R=y CONFIG_SPL_ATF=y CONFIG_CMD_GPIO=y CONFIG_CMD_GPT=y @@ -47,6 +33,7 @@ CONFIG_CMD_PMIC=y CONFIG_CMD_REGULATOR=y # CONFIG_SPL_DOS_PARTITION is not set CONFIG_SPL_OF_CONTROL=y +# CONFIG_OF_UPSTREAM is not set CONFIG_OF_LIVE=y CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" CONFIG_SPL_DM_WARN=y @@ -58,8 +45,6 @@ CONFIG_ROCKCHIP_GPIO=y CONFIG_SYS_I2C_ROCKCHIP=y CONFIG_MISC=y CONFIG_SUPPORT_EMMC_RPMB=y -CONFIG_MMC_HS200_SUPPORT=y -CONFIG_SPL_MMC_HS200_SUPPORT=y CONFIG_MMC_DW=y CONFIG_MMC_DW_ROCKCHIP=y CONFIG_MMC_SDHCI=y diff --git a/package/boot/uboot-rockchip/src/configs/nanopi-r4se-rk3399_defconfig b/package/boot/uboot-rockchip/src/configs/nanopi-r4se-rk3399_defconfig index 42f9b8ee7d..10f5cac8cf 100644 --- a/package/boot/uboot-rockchip/src/configs/nanopi-r4se-rk3399_defconfig +++ b/package/boot/uboot-rockchip/src/configs/nanopi-r4se-rk3399_defconfig @@ -2,31 +2,22 @@ CONFIG_ARM=y CONFIG_SKIP_LOWLEVEL_INIT=y CONFIG_COUNTER_FREQUENCY=24000000 CONFIG_ARCH_ROCKCHIP=y -CONFIG_TEXT_BASE=0x00200000 +CONFIG_SPL_GPIO=y CONFIG_NR_DRAM_BANKS=1 -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0x300000 CONFIG_ENV_OFFSET=0x3F8000 CONFIG_DEFAULT_DEVICE_TREE="rk3399-nanopi-r4se" +CONFIG_DM_RESET=y CONFIG_ROCKCHIP_RK3399=y CONFIG_TARGET_EVB_RK3399=y -CONFIG_SPL_STACK=0x400000 CONFIG_DEBUG_UART_BASE=0xFF1A0000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_SYS_LOAD_ADDR=0x800800 CONFIG_DEBUG_UART=y CONFIG_DEFAULT_FDT_FILE="rockchip/rk3399-nanopi-r4se.dtb" CONFIG_DISPLAY_BOARDINFO_LATE=y -CONFIG_MISC_INIT_R=y -CONFIG_SPL_MAX_SIZE=0x2e000 +CONFIG_SPL_MAX_SIZE=0x40000 CONFIG_SPL_PAD_TO=0x7f8000 -CONFIG_SPL_HAS_BSS_LINKER_SECTION=y -CONFIG_SPL_BSS_START_ADDR=0x400000 -CONFIG_SPL_BSS_MAX_SIZE=0x2000 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set -# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK_R=y -CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x10000 CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y CONFIG_TPL=y CONFIG_CMD_BOOTZ=y @@ -36,22 +27,26 @@ CONFIG_CMD_USB=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_TIME=y CONFIG_SPL_OF_CONTROL=y -CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" +# CONFIG_OF_UPSTREAM is not set +CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_ROCKCHIP_GPIO=y CONFIG_SYS_I2C_ROCKCHIP=y -CONFIG_MISC=y -CONFIG_ROCKCHIP_EFUSE=y -CONFIG_ROCKCHIP_OTP=y +CONFIG_ROCKCHIP_IODOMAIN=y CONFIG_MMC_DW=y CONFIG_MMC_DW_ROCKCHIP=y CONFIG_MMC_SDHCI=y +CONFIG_MMC_SDHCI_SDMA=y CONFIG_MMC_SDHCI_ROCKCHIP=y +CONFIG_PHY_REALTEK=y +CONFIG_DM_ETH_PHY=y CONFIG_ETH_DESIGNWARE=y CONFIG_GMAC_ROCKCHIP=y +CONFIG_PHY_ROCKCHIP_INNO_USB2=y +CONFIG_PHY_ROCKCHIP_TYPEC=y CONFIG_PMIC_RK8XX=y -CONFIG_REGULATOR_PWM=y +CONFIG_SPL_DM_REGULATOR_FIXED=y CONFIG_REGULATOR_RK8XX=y CONFIG_PWM_ROCKCHIP=y CONFIG_RAM_ROCKCHIP_LPDDR4=y @@ -78,5 +73,4 @@ CONFIG_VIDEO=y CONFIG_DISPLAY=y CONFIG_VIDEO_ROCKCHIP=y CONFIG_DISPLAY_ROCKCHIP_HDMI=y -CONFIG_SPL_TINY_MEMSET=y CONFIG_ERRNO_STR=y diff --git a/package/boot/uboot-rockchip/src/configs/nanopi-r6c-rk3588s_defconfig b/package/boot/uboot-rockchip/src/configs/nanopi-r6c-rk3588s_defconfig index e15766fc0b..690a43fafd 100644 --- a/package/boot/uboot-rockchip/src/configs/nanopi-r6c-rk3588s_defconfig +++ b/package/boot/uboot-rockchip/src/configs/nanopi-r6c-rk3588s_defconfig @@ -1,51 +1,44 @@ CONFIG_ARM=y CONFIG_SKIP_LOWLEVEL_INIT=y +CONFIG_SYS_HAS_NONCACHED_MEMORY=y CONFIG_COUNTER_FREQUENCY=24000000 CONFIG_ARCH_ROCKCHIP=y -CONFIG_TEXT_BASE=0x00a00000 -CONFIG_SPL_LIBCOMMON_SUPPORT=y -CONFIG_SPL_LIBGENERIC_SUPPORT=y -CONFIG_NR_DRAM_BANKS=2 -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc00000 +CONFIG_SF_DEFAULT_SPEED=24000000 +CONFIG_SF_DEFAULT_MODE=0x2000 CONFIG_DEFAULT_DEVICE_TREE="rk3588s-nanopi-r6c" CONFIG_ROCKCHIP_RK3588=y -CONFIG_SPL_ROCKCHIP_COMMON_BOARD=y CONFIG_SPL_SERIAL=y -CONFIG_SPL_STACK_R_ADDR=0x600000 CONFIG_TARGET_EVB_RK3588=y -CONFIG_SPL_STACK=0x400000 CONFIG_DEBUG_UART_BASE=0xFEB50000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_SYS_LOAD_ADDR=0xc00800 +CONFIG_PCI=y CONFIG_DEBUG_UART=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_SPL_FIT_SIGNATURE=y CONFIG_SPL_LOAD_FIT=y CONFIG_LEGACY_IMAGE_FORMAT=y -CONFIG_OF_BOARD_SETUP=y CONFIG_DEFAULT_FDT_FILE="rockchip/rk3588s-nanopi-r6c.dtb" # CONFIG_DISPLAY_CPUINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SPL_MAX_SIZE=0x40000 CONFIG_SPL_PAD_TO=0x7f8000 -CONFIG_SPL_HAS_BSS_LINKER_SECTION=y -CONFIG_SPL_BSS_START_ADDR=0x4000000 -CONFIG_SPL_BSS_MAX_SIZE=0x4000 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set -# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK_R=y CONFIG_SPL_ATF=y CONFIG_CMD_GPIO=y CONFIG_CMD_GPT=y +CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y +CONFIG_CMD_USB=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_REGULATOR=y # CONFIG_SPL_DOS_PARTITION is not set CONFIG_SPL_OF_CONTROL=y +# CONFIG_OF_UPSTREAM is not set CONFIG_OF_LIVE=y -CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" +CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" +CONFIG_SPL_DM_SEQ_ALIAS=y CONFIG_SPL_REGMAP=y CONFIG_SPL_SYSCON=y CONFIG_SPL_CLK=y @@ -61,11 +54,22 @@ CONFIG_MMC_SDHCI_ROCKCHIP=y CONFIG_PHY_REALTEK=y CONFIG_DWC_ETH_QOS=y CONFIG_DWC_ETH_QOS_ROCKCHIP=y -CONFIG_REGULATOR_PWM=y +CONFIG_PHY_ROCKCHIP_INNO_USB2=y +CONFIG_PHY_ROCKCHIP_NANENG_COMBOPHY=y +CONFIG_PHY_ROCKCHIP_USBDP=y +CONFIG_SPL_PINCTRL=y CONFIG_PWM_ROCKCHIP=y CONFIG_SPL_RAM=y CONFIG_BAUDRATE=1500000 CONFIG_DEBUG_UART_SHIFT=2 CONFIG_SYS_NS16550_MEM32=y CONFIG_SYSRESET=y +CONFIG_USB=y +CONFIG_USB_XHCI_HCD=y +CONFIG_USB_EHCI_HCD=y +CONFIG_USB_EHCI_GENERIC=y +CONFIG_USB_OHCI_HCD=y +CONFIG_USB_OHCI_GENERIC=y +CONFIG_USB_DWC3=y +CONFIG_USB_DWC3_GENERIC=y CONFIG_ERRNO_STR=y diff --git a/package/boot/uboot-rockchip/src/configs/nanopi-r6s-rk3588s_defconfig b/package/boot/uboot-rockchip/src/configs/nanopi-r6s-rk3588s_defconfig index f79b39ab7b..14fdd3a47a 100644 --- a/package/boot/uboot-rockchip/src/configs/nanopi-r6s-rk3588s_defconfig +++ b/package/boot/uboot-rockchip/src/configs/nanopi-r6s-rk3588s_defconfig @@ -1,51 +1,44 @@ CONFIG_ARM=y CONFIG_SKIP_LOWLEVEL_INIT=y +CONFIG_SYS_HAS_NONCACHED_MEMORY=y CONFIG_COUNTER_FREQUENCY=24000000 CONFIG_ARCH_ROCKCHIP=y -CONFIG_TEXT_BASE=0x00a00000 -CONFIG_SPL_LIBCOMMON_SUPPORT=y -CONFIG_SPL_LIBGENERIC_SUPPORT=y -CONFIG_NR_DRAM_BANKS=2 -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc00000 +CONFIG_SF_DEFAULT_SPEED=24000000 +CONFIG_SF_DEFAULT_MODE=0x2000 CONFIG_DEFAULT_DEVICE_TREE="rk3588s-nanopi-r6s" CONFIG_ROCKCHIP_RK3588=y -CONFIG_SPL_ROCKCHIP_COMMON_BOARD=y CONFIG_SPL_SERIAL=y -CONFIG_SPL_STACK_R_ADDR=0x600000 CONFIG_TARGET_EVB_RK3588=y -CONFIG_SPL_STACK=0x400000 CONFIG_DEBUG_UART_BASE=0xFEB50000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_SYS_LOAD_ADDR=0xc00800 +CONFIG_PCI=y CONFIG_DEBUG_UART=y CONFIG_FIT=y CONFIG_FIT_VERBOSE=y CONFIG_SPL_FIT_SIGNATURE=y CONFIG_SPL_LOAD_FIT=y CONFIG_LEGACY_IMAGE_FORMAT=y -CONFIG_OF_BOARD_SETUP=y CONFIG_DEFAULT_FDT_FILE="rockchip/rk3588s-nanopi-r6s.dtb" # CONFIG_DISPLAY_CPUINFO is not set CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SPL_MAX_SIZE=0x40000 CONFIG_SPL_PAD_TO=0x7f8000 -CONFIG_SPL_HAS_BSS_LINKER_SECTION=y -CONFIG_SPL_BSS_START_ADDR=0x4000000 -CONFIG_SPL_BSS_MAX_SIZE=0x4000 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set -# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK_R=y CONFIG_SPL_ATF=y CONFIG_CMD_GPIO=y CONFIG_CMD_GPT=y +CONFIG_CMD_I2C=y CONFIG_CMD_MMC=y +CONFIG_CMD_USB=y # CONFIG_CMD_SETEXPR is not set CONFIG_CMD_REGULATOR=y # CONFIG_SPL_DOS_PARTITION is not set CONFIG_SPL_OF_CONTROL=y +# CONFIG_OF_UPSTREAM is not set CONFIG_OF_LIVE=y -CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" +CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" +CONFIG_SPL_DM_SEQ_ALIAS=y CONFIG_SPL_REGMAP=y CONFIG_SPL_SYSCON=y CONFIG_SPL_CLK=y @@ -61,11 +54,22 @@ CONFIG_MMC_SDHCI_ROCKCHIP=y CONFIG_PHY_REALTEK=y CONFIG_DWC_ETH_QOS=y CONFIG_DWC_ETH_QOS_ROCKCHIP=y -CONFIG_REGULATOR_PWM=y +CONFIG_PHY_ROCKCHIP_INNO_USB2=y +CONFIG_PHY_ROCKCHIP_NANENG_COMBOPHY=y +CONFIG_PHY_ROCKCHIP_USBDP=y +CONFIG_SPL_PINCTRL=y CONFIG_PWM_ROCKCHIP=y CONFIG_SPL_RAM=y CONFIG_BAUDRATE=1500000 CONFIG_DEBUG_UART_SHIFT=2 CONFIG_SYS_NS16550_MEM32=y CONFIG_SYSRESET=y +CONFIG_USB=y +CONFIG_USB_XHCI_HCD=y +CONFIG_USB_EHCI_HCD=y +CONFIG_USB_EHCI_GENERIC=y +CONFIG_USB_OHCI_HCD=y +CONFIG_USB_OHCI_GENERIC=y +CONFIG_USB_DWC3=y +CONFIG_USB_DWC3_GENERIC=y CONFIG_ERRNO_STR=y diff --git a/package/boot/uboot-rockchip/src/configs/photonicat-rk3568_defconfig b/package/boot/uboot-rockchip/src/configs/photonicat-rk3568_defconfig index cdcb98b3f5..4b4dec677b 100644 --- a/package/boot/uboot-rockchip/src/configs/photonicat-rk3568_defconfig +++ b/package/boot/uboot-rockchip/src/configs/photonicat-rk3568_defconfig @@ -2,19 +2,10 @@ CONFIG_ARM=y CONFIG_SKIP_LOWLEVEL_INIT=y CONFIG_COUNTER_FREQUENCY=24000000 CONFIG_ARCH_ROCKCHIP=y -CONFIG_TEXT_BASE=0x00a00000 CONFIG_SPL_GPIO=y -CONFIG_SPL_LIBCOMMON_SUPPORT=y -CONFIG_SPL_LIBGENERIC_SUPPORT=y -CONFIG_NR_DRAM_BANKS=2 -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc00000 CONFIG_DEFAULT_DEVICE_TREE="rk3568-photonicat" CONFIG_ROCKCHIP_RK3568=y -CONFIG_SPL_ROCKCHIP_COMMON_BOARD=y CONFIG_SPL_SERIAL=y -CONFIG_SPL_STACK_R_ADDR=0x600000 -CONFIG_SPL_STACK=0x400000 CONFIG_DEBUG_UART_BASE=0xFE660000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_SYS_LOAD_ADDR=0xc00800 @@ -30,12 +21,7 @@ CONFIG_DEFAULT_FDT_FILE="rockchip/rk3568-photonicat.dtb" CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SPL_MAX_SIZE=0x40000 CONFIG_SPL_PAD_TO=0x7f8000 -CONFIG_SPL_HAS_BSS_LINKER_SECTION=y -CONFIG_SPL_BSS_START_ADDR=0x4000000 -CONFIG_SPL_BSS_MAX_SIZE=0x4000 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set -# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK_R=y CONFIG_SPL_ATF=y CONFIG_CMD_GPIO=y CONFIG_CMD_GPT=y @@ -47,6 +33,7 @@ CONFIG_CMD_WDT=y CONFIG_CMD_REGULATOR=y # CONFIG_SPL_DOS_PARTITION is not set CONFIG_SPL_OF_CONTROL=y +# CONFIG_OF_UPSTREAM is not set CONFIG_OF_LIVE=y CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" CONFIG_SPL_DM_WARN=y @@ -58,8 +45,6 @@ CONFIG_ROCKCHIP_GPIO=y CONFIG_SYS_I2C_ROCKCHIP=y CONFIG_MISC=y CONFIG_SUPPORT_EMMC_RPMB=y -CONFIG_MMC_HS200_SUPPORT=y -CONFIG_SPL_MMC_HS200_SUPPORT=y CONFIG_MMC_DW=y CONFIG_MMC_DW_ROCKCHIP=y CONFIG_MMC_SDHCI=y diff --git a/package/boot/uboot-rockchip/src/configs/roc-pc-rk3568_defconfig b/package/boot/uboot-rockchip/src/configs/roc-pc-rk3568_defconfig index 8034d67186..3169e895e6 100644 --- a/package/boot/uboot-rockchip/src/configs/roc-pc-rk3568_defconfig +++ b/package/boot/uboot-rockchip/src/configs/roc-pc-rk3568_defconfig @@ -3,18 +3,9 @@ CONFIG_SKIP_LOWLEVEL_INIT=y CONFIG_SYS_HAS_NONCACHED_MEMORY=y CONFIG_COUNTER_FREQUENCY=24000000 CONFIG_ARCH_ROCKCHIP=y -CONFIG_TEXT_BASE=0x00a00000 -CONFIG_SPL_LIBCOMMON_SUPPORT=y -CONFIG_SPL_LIBGENERIC_SUPPORT=y -CONFIG_NR_DRAM_BANKS=2 -CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y -CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc00000 -CONFIG_DEFAULT_DEVICE_TREE="rk3568-roc-pc" +CONFIG_DEFAULT_DEVICE_TREE="rockchip/rk3568-roc-pc" CONFIG_ROCKCHIP_RK3568=y -CONFIG_SPL_ROCKCHIP_COMMON_BOARD=y CONFIG_SPL_SERIAL=y -CONFIG_SPL_STACK_R_ADDR=0x600000 -CONFIG_SPL_STACK=0x400000 CONFIG_DEBUG_UART_BASE=0xFE660000 CONFIG_DEBUG_UART_CLOCK=24000000 CONFIG_SYS_LOAD_ADDR=0xc00800 @@ -30,12 +21,7 @@ CONFIG_DEFAULT_FDT_FILE="rockchip/rk3568-roc-pc.dtb" CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_SPL_MAX_SIZE=0x40000 CONFIG_SPL_PAD_TO=0x7f8000 -CONFIG_SPL_HAS_BSS_LINKER_SECTION=y -CONFIG_SPL_BSS_START_ADDR=0x4000000 -CONFIG_SPL_BSS_MAX_SIZE=0x4000 # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set -# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set -CONFIG_SPL_STACK_R=y CONFIG_SPL_ATF=y CONFIG_CMD_GPIO=y CONFIG_CMD_GPT=y @@ -58,8 +44,6 @@ CONFIG_ROCKCHIP_GPIO=y CONFIG_SYS_I2C_ROCKCHIP=y CONFIG_MISC=y CONFIG_SUPPORT_EMMC_RPMB=y -CONFIG_MMC_HS200_SUPPORT=y -CONFIG_SPL_MMC_HS200_SUPPORT=y CONFIG_MMC_DW=y CONFIG_MMC_DW_ROCKCHIP=y CONFIG_MMC_SDHCI=y