Merge Official Source

Signed-off-by: Tianling Shen <cnsztl@immortalwrt.org>
2021-09-11 04:11:12 +08:00 · 2021-09-11 04:11:12 +08:00 · d3b22f0cda
commit d3b22f0cda
parent 21caef8ed3 66db87fc78
98 changed files with 5781 additions and 372 deletions
--- a/include/kernel-version.mk
+++ b/include/kernel-version.mk
@ -7,10 +7,10 @@ ifdef CONFIG_TESTING_KERNEL
 endif

 LINUX_VERSION-5.4 = .143
-LINUX_VERSION-5.10 = .61
+LINUX_VERSION-5.10 = .63

 LINUX_KERNEL_HASH-5.4.143 = 0953650b05a5f806d76c5691583e94e141f4f691bc0ba75a60b643740f021d24
-LINUX_KERNEL_HASH-5.10.61 = 82eae38cc5cd11dd6aaac91c02ff0d006c7bafd6d4cf5c6a791930820a3a91d1
+LINUX_KERNEL_HASH-5.10.63 = 19a15e838885a0081de5f9874e608fc3f3b1d9e69f2cc5cfa883b8b5499bcb2e

 remove_uri_prefix=$(subst git://,,$(subst http://,,$(subst https://,,$(1))))
 sanitize_uri=$(call qstrip,$(subst @,_,$(subst :,_,$(subst .,_,$(subst -,_,$(subst /,_,$(1)))))))
--- a/package/boot/uboot-envtools/files/ramips
+++ b/package/boot/uboot-envtools/files/ramips
@ -17,7 +17,8 @@ alfa-network,awusfree1|\
 alfa-network,quad-e4g|\
 alfa-network,r36m-e4g|\
 alfa-network,tube-e4g|\
-engenius,esr600h)
+engenius,esr600h|\
+sitecom,wlr-4100-v1-002)
 	ubootenv_add_uci_config "/dev/mtd1" "0x0" "0x1000" "0x1000"
 	;;
 allnet,all0256n-4m|\
--- a/package/kernel/mac80211/patches/subsys/376-mac80211-add-rate-control-support-for-encap-offload.patch
+++ b/package/kernel/mac80211/patches/subsys/376-mac80211-add-rate-control-support-for-encap-offload.patch
@ -26,18 +26,7 @@ Signed-off-by: Ryder Lee <ryder.lee@mediatek.com>
 }
 
 static void rc_send_low_basicrate(struct ieee80211_tx_rate *rate,
-@@ -396,6 +392,10 @@ static bool rate_control_send_low(struct
- 	int mcast_rate;
- 	bool use_basicrate = false;
- 
-+	if (ieee80211_is_tx_data(txrc->skb) &&
-+	    info->flags & IEEE80211_TX_CTL_NO_ACK)
-+		return false;
-+
- 	if (!pubsta || rc_no_data_or_no_ack_use_min(txrc)) {
- 		__rate_control_send_low(txrc->hw, sband, pubsta, info,
- 					txrc->rate_idx_mask);
-@@ -870,7 +870,6 @@ void ieee80211_get_tx_rates(struct ieee8
+@@ -870,7 +866,6 @@ void ieee80211_get_tx_rates(struct ieee8
 			    int max_rates)
 {
 	struct ieee80211_sub_if_data *sdata;
@ -45,7 +34,7 @@ Signed-off-by: Ryder Lee <ryder.lee@mediatek.com>
 	struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
 	struct ieee80211_supported_band *sband;
 
-@@ -882,7 +881,7 @@ void ieee80211_get_tx_rates(struct ieee8
+@@ -882,7 +877,7 @@ void ieee80211_get_tx_rates(struct ieee8
 	sdata = vif_to_sdata(vif);
 	sband = sdata->local->hw.wiphy->bands[info->band];
 
--- a/package/network/utils/iproute2/patches/175-reduce-dynamic-syms.patch
+++ b/package/network/utils/iproute2/patches/175-reduce-dynamic-syms.patch
@ -26,13 +26,14 @@
 
 q_atm.so: q_atm.c
 	$(QUIET_CC)$(CC) $(CFLAGS) $(CPPFLAGS) $(LDFLAGS) -shared -fpic -o q_atm.so q_atm.c -latm
-@@ -205,4 +206,15 @@ static-syms.h: $(wildcard *.c)
+@@ -205,4 +206,16 @@ static-syms.h: $(wildcard *.c)
 		sed -n '/'$$s'[^ ]* =/{s:.* \([^ ]*'$$s'[^ ]*\) .*:extern char \1[] __attribute__((weak)); if (!strcmp(sym, "\1")) return \1;:;p}' $$files ; \
 	done > $@
 
 +else
 +
 +tc: dynsyms.list
+m_xt.so: dynsyms.list
 +dynsyms.list: $(wildcard *.c)
 +	files="$(filter-out $(patsubst %.so,%.c,$(TCSO)), $^)" ; \
 +	echo "{" > $@ ; \
--- a/package/utils/busybox/Config-defaults.in
+++ b/package/utils/busybox/Config-defaults.in
@ -381,7 +381,7 @@ config BUSYBOX_DEFAULT_BZIP2_SMALL
 	default 0
 config BUSYBOX_DEFAULT_FEATURE_BZIP2_DECOMPRESS
 	bool
-	default y
+	default n
 config BUSYBOX_DEFAULT_CPIO
 	bool
 	default n
@ -514,6 +514,9 @@ config BUSYBOX_DEFAULT_CHROOT
 config BUSYBOX_DEFAULT_CKSUM
 	bool
 	default n
+config BUSYBOX_DEFAULT_CRC32
+	bool
+	default n
 config BUSYBOX_DEFAULT_COMM
 	bool
 	default n
@ -529,6 +532,9 @@ config BUSYBOX_DEFAULT_FEATURE_CP_REFLINK
 config BUSYBOX_DEFAULT_CUT
 	bool
 	default y
+config BUSYBOX_DEFAULT_FEATURE_CUT_REGEX
+	bool
+	default n
 config BUSYBOX_DEFAULT_DATE
 	bool
 	default y
@ -829,9 +835,6 @@ config BUSYBOX_DEFAULT_TIMEOUT
 config BUSYBOX_DEFAULT_TOUCH
 	bool
 	default y
-config BUSYBOX_DEFAULT_FEATURE_TOUCH_NODEREF
-	bool
-	default n
 config BUSYBOX_DEFAULT_FEATURE_TOUCH_SUSV3
 	bool
 	default y
@ -1058,6 +1061,9 @@ config BUSYBOX_DEFAULT_FEATURE_VI_8BIT
 config BUSYBOX_DEFAULT_FEATURE_VI_COLON
 	bool
 	default y
+config BUSYBOX_DEFAULT_FEATURE_VI_COLON_EXPAND
+	bool
+	default n
 config BUSYBOX_DEFAULT_FEATURE_VI_YANKMARK
 	bool
 	default y
@ -1097,6 +1103,9 @@ config BUSYBOX_DEFAULT_FEATURE_VI_UNDO_QUEUE
 config BUSYBOX_DEFAULT_FEATURE_VI_UNDO_QUEUE_MAX
 	int
 	default 0
+config BUSYBOX_DEFAULT_FEATURE_VI_VERBOSE_STATUS
+	bool
+	default n
 config BUSYBOX_DEFAULT_FEATURE_ALLOW_EXEC
 	bool
 	default y
@ -1895,6 +1904,9 @@ config BUSYBOX_DEFAULT_FEATURE_VOLUMEID_XFS
 config BUSYBOX_DEFAULT_ADJTIMEX
 	bool
 	default n
+config BUSYBOX_DEFAULT_ASCII
+	bool
+	default n
 config BUSYBOX_DEFAULT_BBCONFIG
 	bool
 	default n
@ -2183,6 +2195,9 @@ config BUSYBOX_DEFAULT_VOLNAME
 config BUSYBOX_DEFAULT_WATCHDOG
 	bool
 	default n
+config BUSYBOX_DEFAULT_FEATURE_WATCHDOG_OPEN_TWICE
+	bool
+	default n
 config BUSYBOX_DEFAULT_FEATURE_IPV6
 	bool
 	default y if IPV6
@ -2589,6 +2604,9 @@ config BUSYBOX_DEFAULT_FEATURE_WGET_LONG_OPTIONS
 config BUSYBOX_DEFAULT_FEATURE_WGET_STATUSBAR
 	bool
 	default n
+config BUSYBOX_DEFAULT_FEATURE_WGET_FTP
+	bool
+	default n
 config BUSYBOX_DEFAULT_FEATURE_WGET_AUTHENTICATION
 	bool
 	default n
@ -2652,6 +2670,9 @@ config BUSYBOX_DEFAULT_FEATURE_UDHCPC6_RFC4833
 config BUSYBOX_DEFAULT_FEATURE_UDHCPC6_RFC5970
 	bool
 	default n
+config BUSYBOX_DEFAULT_UDHCPC_DEFAULT_INTERFACE
+	string
+	default ""
 config BUSYBOX_DEFAULT_FEATURE_UDHCP_PORT
 	bool
 	default n
@ -2985,10 +3006,10 @@ config BUSYBOX_DEFAULT_HUSH_BASH_COMPAT
 config BUSYBOX_DEFAULT_HUSH_BRACE_EXPANSION
 	bool
 	default n
-config BUSYBOX_DEFAULT_HUSH_LINENO_VAR
+config BUSYBOX_DEFAULT_HUSH_BASH_SOURCE_CURDIR
 	bool
 	default n
-config BUSYBOX_DEFAULT_HUSH_BASH_SOURCE_CURDIR
+config BUSYBOX_DEFAULT_HUSH_LINENO_VAR
 	bool
 	default n
 config BUSYBOX_DEFAULT_HUSH_INTERACTIVE
--- a/package/utils/busybox/Makefile
+++ b/package/utils/busybox/Makefile
@ -5,14 +5,14 @@
 include $(TOPDIR)/rules.mk

 PKG_NAME:=busybox
-PKG_VERSION:=1.33.1
+PKG_VERSION:=1.34.0
 PKG_RELEASE:=$(AUTORELEASE)
 PKG_FLAGS:=essential

 PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.bz2
 PKG_SOURCE_URL:=https://www.busybox.net/downloads \
 		http://sources.buildroot.net
-PKG_HASH:=12cec6bd2b16d8a9446dd16130f2b92982f1819f6e1c5f5887b6db03f5660d28
+PKG_HASH:=ec8d1615edb045b83b81966604759c4d4ac921434ab4011da604f629c06074ce

 PKG_BUILD_DEPENDS:=BUSYBOX_CONFIG_PAM:libpam
 PKG_BUILD_PARALLEL:=1
--- a/package/utils/busybox/config/coreutils/Config.in
+++ b/package/utils/busybox/config/coreutils/Config.in
@ -63,8 +63,10 @@ config BUSYBOX_CONFIG_CHROOT
 config BUSYBOX_CONFIG_CKSUM
 	bool "cksum (4.1 kb)"
 	default BUSYBOX_DEFAULT_CKSUM
-	help
-	cksum is used to calculate the CRC32 checksum of a file.
+
+config BUSYBOX_CONFIG_CRC32
+	bool "crc32 (4.1 kb)"
+	default BUSYBOX_DEFAULT_CRC32
 config BUSYBOX_CONFIG_COMM
 	bool "comm (4.2 kb)"
 	default BUSYBOX_DEFAULT_COMM
@ -95,6 +97,13 @@ config BUSYBOX_CONFIG_CUT
 	help
 	cut is used to print selected parts of lines from
 	each file to stdout.
+
+config BUSYBOX_CONFIG_FEATURE_CUT_REGEX
+	bool "cut -F"
+	default BUSYBOX_DEFAULT_FEATURE_CUT_REGEX
+	depends on BUSYBOX_CONFIG_CUT
+	help
+	Allow regex based delimiters.
 config BUSYBOX_CONFIG_DATE
 	bool "date (7 kb)"
 	default BUSYBOX_DEFAULT_DATE
@ -739,16 +748,8 @@ config BUSYBOX_CONFIG_TOUCH
 	touch is used to create or change the access and/or
 	modification timestamp of specified files.

-config BUSYBOX_CONFIG_FEATURE_TOUCH_NODEREF
-	bool "Add support for -h"
-	default BUSYBOX_DEFAULT_FEATURE_TOUCH_NODEREF
-	depends on BUSYBOX_CONFIG_TOUCH
-	help
-	Enable touch to have the -h option.
-	This requires libc support for lutimes() function.
-
 config BUSYBOX_CONFIG_FEATURE_TOUCH_SUSV3
-	bool "Add support for SUSV3 features (-d -t -r)"
+	bool "Add support for SUSV3 features (-a -d -m -t -r)"
 	default BUSYBOX_DEFAULT_FEATURE_TOUCH_SUSV3
 	depends on BUSYBOX_CONFIG_TOUCH
 	help
--- a/package/utils/busybox/config/editors/Config.in
+++ b/package/utils/busybox/config/editors/Config.in
@ -110,6 +110,14 @@ config BUSYBOX_CONFIG_FEATURE_VI_COLON
 	Enable a limited set of colon commands. This does not
 	provide an "ex" mode.

+config BUSYBOX_CONFIG_FEATURE_VI_COLON_EXPAND
+	bool "Expand \"%\" and \"#\" in colon commands"
+	default BUSYBOX_DEFAULT_FEATURE_VI_COLON_EXPAND
+	depends on BUSYBOX_CONFIG_FEATURE_VI_COLON
+	help
+	Expand the special characters \"%\" (current filename)
+	and \"#\" (alternate filename) in colon commands.
+
 config BUSYBOX_CONFIG_FEATURE_VI_YANKMARK
 	bool "Enable yank/put commands and mark cmds"
 	default BUSYBOX_DEFAULT_FEATURE_VI_YANKMARK
@ -126,7 +134,7 @@ config BUSYBOX_CONFIG_FEATURE_VI_SEARCH

 config BUSYBOX_CONFIG_FEATURE_VI_REGEX_SEARCH
 	bool "Enable regex in search and replace"
-	default BUSYBOX_DEFAULT_FEATURE_VI_REGEX_SEARCH
+	default BUSYBOX_DEFAULT_FEATURE_VI_REGEX_SEARCH   # Uses GNU regex, which may be unavailable. FIXME
 	depends on BUSYBOX_CONFIG_FEATURE_VI_SEARCH
 	depends on USE_GLIBC
 	help
@ -218,6 +226,14 @@ config BUSYBOX_CONFIG_FEATURE_VI_UNDO_QUEUE_MAX
 	Unless you want more (or less) frequent "undo points" while typing,
 	you should probably leave this unchanged.

+config BUSYBOX_CONFIG_FEATURE_VI_VERBOSE_STATUS
+	bool "Enable verbose status reporting"
+	default BUSYBOX_DEFAULT_FEATURE_VI_VERBOSE_STATUS
+	depends on BUSYBOX_CONFIG_VI
+	help
+	Enable more verbose reporting of the results of yank, change,
+	delete, undo and substitution commands.
+
 config BUSYBOX_CONFIG_FEATURE_ALLOW_EXEC
 	bool "Allow vi and awk to execute shell commands"
 	default BUSYBOX_DEFAULT_FEATURE_ALLOW_EXEC
--- a/package/utils/busybox/config/klibc-utils/Config.in
+++ b/package/utils/busybox/config/klibc-utils/Config.in
@ -13,7 +13,7 @@ config BUSYBOX_CONFIG_MINIPS
 	Alias to "ps".
 config BUSYBOX_CONFIG_NUKE
 	bool "nuke (2.9 kb)"
-	default BUSYBOX_DEFAULT_NUKE
+	default BUSYBOX_DEFAULT_NUKE  # off by default: too "accidentally destructive"
 	help
 	Alias to "rm -rf".
 config BUSYBOX_CONFIG_RESUME
--- a/package/utils/busybox/config/miscutils/Config.in
+++ b/package/utils/busybox/config/miscutils/Config.in
@ -12,6 +12,12 @@ config BUSYBOX_CONFIG_ADJTIMEX
 	help
 	Adjtimex reads and optionally sets adjustment parameters for
 	the Linux clock adjustment algorithm.
+config BUSYBOX_CONFIG_ASCII
+	bool "ascii"
+	default BUSYBOX_DEFAULT_ASCII
+	help
+	Print ascii table.
+
 config BUSYBOX_CONFIG_BBCONFIG
 	bool "bbconfig (9.7 kb)"
 	default BUSYBOX_DEFAULT_BBCONFIG
@ -788,4 +794,19 @@ config BUSYBOX_CONFIG_WATCHDOG
 	certain amount of time, the watchdog device assumes the system has
 	hung, and will cause the hardware to reboot.

+config BUSYBOX_CONFIG_FEATURE_WATCHDOG_OPEN_TWICE
+	bool "Open watchdog device twice, closing it gracefully in between"
+	depends on BUSYBOX_CONFIG_WATCHDOG
+	default BUSYBOX_DEFAULT_FEATURE_WATCHDOG_OPEN_TWICE   # this behavior was essentially a hack for a broken driver
+	help
+	When enabled, the watchdog device is opened and then immediately
+	magic-closed, before being opened a second time. This may be necessary
+	for some watchdog devices, but can cause spurious warnings in the
+	kernel log if the nowayout feature is enabled. If this workaround
+	is really needed for you machine to work properly, consider whether
+	it should be fixed in the kernel driver instead. Even when disabled,
+	the behaviour is easily emulated with a "printf 'V' > /dev/watchdog"
+	immediately before starting the busybox watchdog daemon. Say n unless
+	you know that you absolutely need this.
+
 endmenu
--- a/package/utils/busybox/config/networking/Config.in
+++ b/package/utils/busybox/config/networking/Config.in
@ -1092,6 +1092,13 @@ config BUSYBOX_CONFIG_FEATURE_WGET_STATUSBAR
 	default BUSYBOX_DEFAULT_FEATURE_WGET_STATUSBAR
 	depends on BUSYBOX_CONFIG_WGET

+config BUSYBOX_CONFIG_FEATURE_WGET_FTP
+	bool "Enable FTP protocol (+1k)"
+	default BUSYBOX_DEFAULT_FEATURE_WGET_FTP
+	depends on BUSYBOX_CONFIG_WGET
+	help
+	To support FTPS, enable FEATURE_WGET_HTTPS as well.
+
 config BUSYBOX_CONFIG_FEATURE_WGET_AUTHENTICATION
 	bool "Enable HTTP authentication"
 	default BUSYBOX_DEFAULT_FEATURE_WGET_AUTHENTICATION
@ -1120,6 +1127,7 @@ config BUSYBOX_CONFIG_FEATURE_WGET_HTTPS
 	select BUSYBOX_CONFIG_TLS
 	help
 	wget will use internal TLS code to connect to https:// URLs.
+	It also enables FTPS support, but it's not well tested yet.
 	Note:
 	On NOMMU machines, ssl_helper applet should be available
 	in the $PATH for this to work. Make sure to select that applet.
--- a/package/utils/busybox/config/networking/udhcp/Config.in
+++ b/package/utils/busybox/config/networking/udhcp/Config.in
@ -142,6 +142,14 @@ config BUSYBOX_CONFIG_FEATURE_UDHCPC6_RFC5970
 comment "Common options for DHCP applets"
        depends on BUSYBOX_CONFIG_UDHCPD || BUSYBOX_CONFIG_UDHCPC || BUSYBOX_CONFIG_UDHCPC6 || BUSYBOX_CONFIG_DHCPRELAY

+config BUSYBOX_CONFIG_UDHCPC_DEFAULT_INTERFACE
+	string "Default interface name"
+	default BUSYBOX_DEFAULT_UDHCPC_DEFAULT_INTERFACE
+	depends on BUSYBOX_CONFIG_UDHCPC || BUSYBOX_CONFIG_UDHCPC6
+	help
+	The interface that will be used if no other interface is
+	specified on the commandline.
+
 config BUSYBOX_CONFIG_FEATURE_UDHCP_PORT
 	bool "Enable '-P port' option for udhcpd and udhcpc"
 	default BUSYBOX_DEFAULT_FEATURE_UDHCP_PORT
--- a/package/utils/busybox/config/shell/Config.in
+++ b/package/utils/busybox/config/shell/Config.in
@ -299,11 +299,6 @@ config BUSYBOX_CONFIG_HUSH_BRACE_EXPANSION
 	help
 	Enable {abc,def} extension.

-config BUSYBOX_CONFIG_HUSH_LINENO_VAR
-	bool "$LINENO variable"
-	default BUSYBOX_DEFAULT_HUSH_LINENO_VAR
-	depends on BUSYBOX_CONFIG_HUSH_BASH_COMPAT
-
 config BUSYBOX_CONFIG_HUSH_BASH_SOURCE_CURDIR
 	bool "'source' and '.' builtins search current directory after $PATH"
 	default BUSYBOX_DEFAULT_HUSH_BASH_SOURCE_CURDIR   # do not encourage non-standard behavior
@ -311,6 +306,11 @@ config BUSYBOX_CONFIG_HUSH_BASH_SOURCE_CURDIR
 	help
 	This is not compliant with standards. Avoid if possible.

+config BUSYBOX_CONFIG_HUSH_LINENO_VAR
+	bool "$LINENO variable (bashism)"
+	default BUSYBOX_DEFAULT_HUSH_LINENO_VAR
+	depends on BUSYBOX_CONFIG_SHELL_HUSH
+
 config BUSYBOX_CONFIG_HUSH_INTERACTIVE
 	bool "Interactive mode"
 	default BUSYBOX_DEFAULT_HUSH_INTERACTIVE
--- a/package/utils/busybox/patches/001-backport-fix-build-breakage-on-mips.patch
+++ b/package/utils/busybox/patches/001-backport-fix-build-breakage-on-mips.patch
@ -0,0 +1,37 @@
+From 00adcdb64a5487f0ea6b400d912dcf7c58637696 Mon Sep 17 00:00:00 2001
+From: Denys Vlasenko <vda.linux@googlemail.com>
+Date: Fri, 20 Aug 2021 13:33:50 +0200
+Subject: udhcp: fix build breakage on MIPS
+
+Signed-off-by: Denys Vlasenko <vda.linux@googlemail.com>
+---
+ networking/udhcp/common.h | 12 ------------
+ 1 file changed, 12 deletions(-)
+
+diff --git a/networking/udhcp/common.h b/networking/udhcp/common.h
+index 8c678dd32..ca778dab8 100644
+--- a/networking/udhcp/common.h
+++ b/networking/udhcp/common.h
+@@ -304,18 +304,6 @@ void udhcp_dump_packet(struct dhcp_packet *packet) FAST_FUNC;
+ # define log3s(msg) ((void)0)
+ #endif
+ 
+-#if defined(__mips__)
+-/*
+- * The 'simple' message functions have a negative impact on the size of the
+- * DHCP code when compiled for MIPS, so don't use them in this case.
+- */
+-#define bb_simple_info_msg bb_info_msg
+-#define bb_simple_error_msg bb_error_msg
+-#define bb_simple_perror_msg_and_die bb_perror_msg_and_die
+-#undef log1s
+-#define log1s log1
+-#endif
+-
+ /*** Other shared functions ***/
+ 
+ /* 2nd param is "uint32_t*" */
+-- 
+cgit v1.2.3
+
+
--- a/package/utils/busybox/patches/002-backport-ash-process-substitution.patch
+++ b/package/utils/busybox/patches/002-backport-ash-process-substitution.patch
@ -0,0 +1,77 @@
+Stacy Harper reports that this script:
+
+   test() { . /tmp/bb_test; }
+   echo "export TEST=foo" >/tmp/bb_test
+   test 2>/dev/null
+   echo "$TEST"
+
+correctly prints 'foo' in BusyBox 1.33 but hangs in 1.34.
+
+Bisection suggested the problem was caused by commit a1b0d3856 (ash: add
+process substitution in bash-compatibility mode).  Removing the call to
+unwindredir() in cmdloop() introduced in that commit makes the script
+work again.
+
+Additionally, these examples of process substitution:
+
+   while true; do cat <(echo hi); done
+   f() { while true; do cat <(echo hi); done }
+   f
+
+result in running out of file descriptors.  This is a regression from
+v5 of the process substitution patch caused by changes to evalcommand()
+not being transferred to v6.
+
+function                                             old     new   delta
+static.pushredir                                       -      99     +99
+evalcommand                                         1729    1750     +21
+exitreset                                             69      86     +17
+cmdloop                                              372     365      -7
+unwindredir                                           28       -     -28
+pushredir                                            112       -    -112
+------------------------------------------------------------------------------
+(add/remove: 1/2 grow/shrink: 2/1 up/down: 137/-147)          Total: -10 bytes
+
+Signed-off-by: Ron Yorston <rmy at pobox.com>
+---
+ shell/ash.c | 10 +++++++---
+ 1 file changed, 7 insertions(+), 3 deletions(-)
+
+diff --git a/shell/ash.c b/shell/ash.c
+index b5947147a..53c140930 100644
+--- a/shell/ash.c
+++ b/shell/ash.c
+@@ -10278,6 +10278,9 @@ evalcommand(union node *cmd, int flags)
+ 
+ 	/* First expand the arguments. */
+ 	TRACE(("evalcommand(0x%lx, %d) called\n", (long)cmd, flags));
+#if BASH_PROCESS_SUBST
+	redir_stop = redirlist;
+#endif
+ 	file_stop = g_parsefile;
+ 	back_exitstatus = 0;
+ 
+@@ -10356,7 +10359,11 @@ evalcommand(union node *cmd, int flags)
+ 		lastarg = nargv[-1];
+ 
+ 	expredir(cmd->ncmd.redirect);
+#if !BASH_PROCESS_SUBST
+ 	redir_stop = pushredir(cmd->ncmd.redirect);
+#else
+	pushredir(cmd->ncmd.redirect);
+#endif
+ 	preverrout_fd = 2;
+ 	if (BASH_XTRACEFD && xflag) {
+ 		/* NB: bash closes fd == $BASH_XTRACEFD when it is changed.
+@@ -13476,9 +13483,6 @@ cmdloop(int top)
+ #if JOBS
+ 		if (doing_jobctl)
+ 			showjobs(SHOW_CHANGED|SHOW_STDERR);
+-#endif
+-#if BASH_PROCESS_SUBST
+-		unwindredir(NULL);
+ #endif
+ 		inter = 0;
+ 		if (iflag && top) {
+-- 
+2.31.1
--- a/package/utils/busybox/patches/200-udhcpc_reduce_msgs.patch
+++ b/package/utils/busybox/patches/200-udhcpc_reduce_msgs.patch
@ -1,18 +1,18 @@
 --- a/networking/udhcp/dhcpc.c
 +++ b/networking/udhcp/dhcpc.c
-@@ -712,6 +712,7 @@ static int bcast_or_ucast(struct dhcp_pa
- static NOINLINE int send_discover(uint32_t xid, uint32_t requested)
+@@ -722,6 +722,7 @@ static int bcast_or_ucast(struct dhcp_pa
+ static NOINLINE int send_discover(uint32_t requested)
 {
 	struct dhcp_packet packet;
 +	static int msgs = 0;
 
 	/* Fill in: op, htype, hlen, cookie, chaddr fields,
- 	 * random xid field (we override it below),
-@@ -729,6 +730,7 @@ static NOINLINE int send_discover(uint32
+ 	 * xid field, message type option:
+@@ -736,6 +737,7 @@ static NOINLINE int send_discover(uint32
 	 */
 	add_client_options(&packet);
 
 +	if (msgs++ < 3)
- 	bb_info_msg("sending %s", "discover");
+ 	bb_simple_info_msg("broadcasting discover");
 	return raw_bcast_from_client_data_ifindex(&packet, INADDR_ANY);
 }
--- a/package/utils/busybox/patches/201-udhcpc_changed_ifindex.patch
+++ b/package/utils/busybox/patches/201-udhcpc_changed_ifindex.patch
@ -1,8 +1,8 @@
 --- a/networking/udhcp/dhcpc.c
 +++ b/networking/udhcp/dhcpc.c
-@@ -1415,6 +1415,12 @@ int udhcpc_main(int argc UNUSED_PARAM, c
- 		/* silence "uninitialized!" warning */
- 		unsigned timestamp_before_wait = timestamp_before_wait;
+@@ -1384,6 +1384,12 @@ int udhcpc_main(int argc UNUSED_PARAM, c
+ 		struct pollfd pfds[2];
+ 		struct dhcp_packet packet;
 
 +		/* When running on a bridge, the ifindex may have changed (e.g. if
 +		 * member interfaces were added/removed or if the status of the
--- a/package/utils/busybox/patches/203-udhcpc_renew_no_deconfig.patch
+++ b/package/utils/busybox/patches/203-udhcpc_renew_no_deconfig.patch
@ -1,10 +0,0 @@
--- a/networking/udhcp/dhcpc.c
-+++ b/networking/udhcp/dhcpc.c
-@@ -1125,7 +1125,6 @@ static void perform_renew(void)
- 		client_data.state = RENEW_REQUESTED;
- 		break;
- 	case RENEW_REQUESTED: /* impatient are we? fine, square 1 */
-		udhcp_run_script(NULL, "deconfig");
- 	case REQUESTING:
- 	case RELEASED:
- 		change_listen_mode(LISTEN_RAW);
--- a/package/utils/busybox/patches/205-udhcpc_allow_zero_length_options.patch
+++ b/package/utils/busybox/patches/205-udhcpc_allow_zero_length_options.patch
@ -1,49 +0,0 @@
-From 7eed119b84b0f7efb7ef351940dd895dc2379eb3 Mon Sep 17 00:00:00 2001
-From: Russell Senior <russell@personaltelco.net>
-Date: Mon, 15 Mar 2021 23:27:58 -0700
-Subject: [PATCH v2] udhcpc: ignore zero-length DHCP options
-
-Discovered that the DHCP server on a TrendNet router (unknown model)
-provides a zero-length option 12 (Host Name) in the DHCP ACK message. This
-has the effect of causing udhcpc to drop the rest of the options, including
-option 51 (IP Address Lease Time), 3 (Router), and 6 (Domain Name Server),
-most importantly leaving the OpenWrt device with no default gateway.
-
-The TrendNet behavior violates RFC 2132, which in Section 3.14 declares that
-option 12 has a miniumum length of 1 octet. It is perhaps not a cosmic coincidence
-that I found this behavior on Pi Day.
-
-This patch allows zero length options without bailing out, by simply skipping them.
-
-v2 changelog:
-* advance the optionptr by two bytes, not one;
-* add a message to warn about the rfc violation;
-
-Signed-off-by: Russell Senior <russell@personaltelco.net>
---
- networking/udhcp/common.c | 9 +++++++--
- 1 file changed, 7 insertions(+), 2 deletions(-)
-
-diff --git a/networking/udhcp/common.c b/networking/udhcp/common.c
-index 4bc719001..a16fd85d0 100644
--- a/networking/udhcp/common.c
-+++ b/networking/udhcp/common.c
-@@ -277,8 +277,13 @@ uint8_t* FAST_FUNC udhcp_scan_options(struct dhcp_packet *packet, struct dhcp_sc
- 			goto complain; /* complain and return NULL */
- 		len = 2 + scan_state->optionptr[OPT_LEN];
- 		scan_state->rem -= len;
-		/* So far no valid option with length 0 known. */
-		if (scan_state->rem < 0 || scan_state->optionptr[OPT_LEN] == 0)
-+		/* skip any options with zero length */
-+		if (scan_state->optionptr[OPT_LEN] == 0) {
-+			scan_state->optionptr += 2;
-+			bb_simple_error_msg("warning: zero length DHCP option violates rfc2132, skipping");
-+			continue;
-+		}
-+		if (scan_state->rem < 0)
- 			goto complain; /* complain and return NULL */
- 
- 		if (scan_state->optionptr[OPT_CODE] == DHCP_OPTION_OVERLOAD) {
-- 
-2.30.1
-
--- a/package/utils/busybox/patches/530-use-SOURCE_DATE_EPOCH-for-timestamp-if-available.patch
+++ b/package/utils/busybox/patches/530-use-SOURCE_DATE_EPOCH-for-timestamp-if-available.patch
@ -1,80 +0,0 @@
-From 59f773ee81a8945321f4aa20abc5e9577e6483e4 Mon Sep 17 00:00:00 2001
-From: Paul Spooren <mail@aparcar.org>
-Date: Thu, 13 May 2021 11:25:34 +0200
-Subject: [PATCH] use SOURCE_DATE_EPOCH for timestamp if available
-
-The SOURCE_DATE_EPOCH is an effort of the Reproducible Builds
-organization to make timestamps/build dates in compiled tools
-deterministic over several repetitive builds.
-
-Busybox shows by default the build date timestamp which changes whenever
-compiled. To have a reasonable accurate build date while staying
-reproducible, it's possible to use the *date of last source
-modification* rather than the current time and date.
-
-Further information on SOURCE_DATE_EPOCH are available online [1].
-
-This patch modifies `confdata.c` so that the content of the
-SOURCE_DATE_EPOCH env variable is used as timestamp.
-
-To be independent of different timezones between builds, whenever
-SOURCE_DATE_EPOCH is defined the GMT time is used.
-
-[1]: https://reproducible-builds.org/docs/source-date-epoch/
-
-Signed-off-by: Paul Spooren <mail@aparcar.org>
---
- scripts/kconfig/confdata.c | 17 ++++++++++++++---
- 1 file changed, 14 insertions(+), 3 deletions(-)
-
-diff --git a/scripts/kconfig/confdata.c b/scripts/kconfig/confdata.c
-index b05b96e45..73c25e3a8 100644
--- a/scripts/kconfig/confdata.c
-+++ b/scripts/kconfig/confdata.c
-@@ -342,6 +342,8 @@ int conf_write(const char *name)
- 	time_t now;
- 	int use_timestamp = 1;
- 	char *env;
-+	char *source_date_epoch;
-+	struct tm *build_time;
- 
- 	dirname[0] = 0;
- 	if (name && name[0]) {
-@@ -378,7 +380,16 @@ int conf_write(const char *name)
- 	}
- 	sym = sym_lookup("KERNELVERSION", 0);
- 	sym_calc_value(sym);
-	time(&now);
-+
-+	source_date_epoch = getenv("SOURCE_DATE_EPOCH");
-+	if (source_date_epoch && *source_date_epoch) {
-+		now = strtoull(source_date_epoch, NULL, 10);
-+		build_time = gmtime(&now);
-+	} else {
-+		time(&now);
-+		build_time = localtime(&now);
-+	}
-+
- 	env = getenv("KCONFIG_NOTIMESTAMP");
- 	if (env && *env)
- 		use_timestamp = 0;
-@@ -398,14 +409,14 @@ int conf_write(const char *name)
- 		if (use_timestamp) {
- 			size_t ret = \
- 				strftime(buf, sizeof(buf), "#define AUTOCONF_TIMESTAMP "
-					"\"%Y-%m-%d %H:%M:%S %Z\"\n", localtime(&now));
-+					"\"%Y-%m-%d %H:%M:%S %Z\"\n", build_time);
- 			/* if user has Factory timezone or some other odd install, the
- 			 * %Z above will overflow the string leaving us with undefined
- 			 * results ... so let's try again without the timezone.
- 			 */
- 			if (ret == 0)
- 				strftime(buf, sizeof(buf), "#define AUTOCONF_TIMESTAMP "
-					"\"%Y-%m-%d %H:%M:%S\"\n", localtime(&now));
-+					"\"%Y-%m-%d %H:%M:%S\"\n", build_time);
- 		} else { /* bbox */
- 			strcpy(buf, "#define AUTOCONF_TIMESTAMP \"\"\n");
- 		}
-- 
-2.30.2
-
--- a/package/utils/busybox/patches/540-nslookup-mention-QUERY_TYPE-SRV.patch
+++ b/package/utils/busybox/patches/540-nslookup-mention-QUERY_TYPE-SRV.patch
@ -1,30 +0,0 @@
-From a0136f24f788e8bfc4ab74a647b27e115a25d9fb Mon Sep 17 00:00:00 2001
-From: Paul Spooren <mail@aparcar.org>
-Date: Wed, 19 May 2021 00:55:21 +0200
-Subject: [PATCH] nslookup: mention QUERY_TYPE SRV
-
-SRV lookups are supported since "6b4960155 nslookup: implement support
-for SRV records" and should therefore be mentioned as a possible
-QUERY_TYPE in the help message.
-
-Signed-off-by: Paul Spooren <mail@aparcar.org>
---
- networking/nslookup.c | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/networking/nslookup.c b/networking/nslookup.c
-index dda22de0e..2ae8d391c 100644
--- a/networking/nslookup.c
-+++ b/networking/nslookup.c
-@@ -25,7 +25,7 @@
- //usage:#define nslookup_full_usage "\n\n"
- //usage:       "Query DNS about HOST"
- //usage:       IF_FEATURE_NSLOOKUP_BIG("\n")
-//usage:       IF_FEATURE_NSLOOKUP_BIG("\nQUERY_TYPE: soa,ns,a,"IF_FEATURE_IPV6("aaaa,")"cname,mx,txt,ptr,any")
-+//usage:       IF_FEATURE_NSLOOKUP_BIG("\nQUERY_TYPE: soa,ns,a,"IF_FEATURE_IPV6("aaaa,")"cname,mx,txt,ptr,srv,any")
- //usage:#define nslookup_example_usage
- //usage:       "$ nslookup localhost\n"
- //usage:       "Server:     default\n"
-- 
-2.30.2
-
--- a/target/linux/ath79/dts/qca9563_tplink_tl-wa1201-v2.dts
+++ b/target/linux/ath79/dts/qca9563_tplink_tl-wa1201-v2.dts
@ -0,0 +1,161 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+
+#include "qca956x.dtsi"
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+
+/ {
+	compatible = "tplink,tl-wa1201-v2", "qca,qca9563";
+	model = "TP-Link TL-WA1201 v2";
+
+	aliases {
+		label-mac-device = &eth0;
+		led-boot = &led_power;
+		led-failsafe = &led_power;
+		led-running = &led_power;
+		led-upgrade = &led_power;
+		mdio-gpio0 = &mdio2;
+	};
+
+	leds {
+		compatible = "gpio-leds";
+
+		led_power: power {
+			label = "green:power";
+			gpios = <&gpio 17 GPIO_ACTIVE_LOW>;
+			default-state = "on";
+		};
+
+		wlan2g {
+			label = "green:wlan2g";
+			gpios = <&gpio 15 GPIO_ACTIVE_LOW>;
+			linux,default-trigger = "phy1tpt";
+		};
+
+		wlan5g {
+			label = "green:wlan5g";
+			gpios = <&gpio 19 GPIO_ACTIVE_LOW>;
+			linux,default-trigger = "phy0tpt";
+		};
+
+		lan {
+			label = "green:lan";
+			gpios = <&gpio 20 GPIO_ACTIVE_LOW>;
+		};
+	};
+
+	keys {
+		compatible = "gpio-keys";
+
+		reset {
+			label = "Reset button";
+			linux,code = <KEY_RESTART>;
+			gpios = <&gpio 5 GPIO_ACTIVE_LOW>;
+			debounce-interval = <60>;
+		};
+
+		wps {
+			label = "WPS button";
+			linux,code = <KEY_WPS_BUTTON>;
+			gpios = <&gpio 6 GPIO_ACTIVE_LOW>;
+			debounce-interval = <60>;
+		};
+	};
+
+	mdio2: mdio {
+		compatible = "virtual,mdio-gpio";
+
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		gpios = <&gpio 3 GPIO_ACTIVE_HIGH>, /* MDC */
+			<&gpio 4 GPIO_ACTIVE_HIGH>; /* MDIO */
+
+		phy4: ethernet-phy@4 {
+			reg = <4>;
+
+			eee-broken-100tx;
+			eee-broken-1000t;
+		};
+	};
+};
+
+&pcie {
+	status = "okay";
+};
+
+&eth0 {
+	status = "okay";
+
+	phy-mode = "sgmii";
+	phy-handle = <&phy4>;
+
+	nvmem-cells = <&macaddr_info_8>;
+	nvmem-cell-names = "mac-address";
+};
+
+&wmac {
+	status = "okay";
+
+	mtd-cal-data = <&art 0x1000>;
+
+	nvmem-cells = <&macaddr_info_8>;
+	nvmem-cell-names = "mac-address";
+};
+
+&spi {
+	status = "okay";
+
+	flash@0 {
+		compatible = "jedec,spi-nor";
+		reg = <0>;
+		spi-max-frequency = <25000000>;
+
+		partitions {
+			compatible = "fixed-partitions";
+			#address-cells = <1>;
+			#size-cells = <1>;
+
+			partition@0 {
+				label = "u-boot";
+				reg = <0x000000 0x020000>;
+				read-only;
+			};
+
+			info: partition@20000 {
+				label = "info";
+				reg = <0x020000 0x010000>;
+				read-only;
+			};
+
+			partition@30000 {
+				compatible = "denx,uimage";
+				label = "firmware";
+				reg = <0x030000 0xce0000>;
+			};
+
+			partition@d10000 {
+				label = "tplink";
+				reg = <0xd10000 0x2e0000>;
+				read-only;
+			};
+
+			art: partition@ff0000 {
+				label = "art";
+				reg = <0xff0000 0x010000>;
+				read-only;
+			};
+		};
+	};
+};
+
+&info {
+	compatible = "nvmem-cells";
+	#address-cells = <1>;
+	#size-cells = <1>;
+
+	macaddr_info_8: macaddr@8 {
+		reg = <0x8 0x6>;
+	};
+};
--- a/target/linux/ath79/generic/base-files/etc/board.d/01_leds
+++ b/target/linux/ath79/generic/base-files/etc/board.d/01_leds
@ -19,7 +19,8 @@ glinet,gl-ar300m-lite|\
 glinet,gl-ar300m16|\
 pcs,cap324|\
 tplink,cpe610-v1|\
-tplink,cpe610-v2)
+tplink,cpe610-v2|\
+tplink,tl-wa1201-v2)
 	ucidef_set_led_netdev "lan" "LAN" "green:lan" "eth0"
 	;;
 alfa-network,n2q)
--- a/target/linux/ath79/generic/base-files/etc/board.d/02_network
+++ b/target/linux/ath79/generic/base-files/etc/board.d/02_network
@ -72,6 +72,7 @@ ath79_setup_interfaces()
 	tplink,re450-v2|\
 	tplink,re450-v3|\
 	tplink,re455-v1|\
+	tplink,tl-wa1201-v2|\
 	tplink,tl-wr902ac-v1|\
 	ubnt,bullet-ac|\
 	ubnt,bullet-m-ar7240|\
--- a/target/linux/ath79/generic/base-files/etc/hotplug.d/firmware/11-ath10k-caldata
+++ b/target/linux/ath79/generic/base-files/etc/hotplug.d/firmware/11-ath10k-caldata
@ -229,7 +229,8 @@ case "$FIRMWARE" in
 	tplink,archer-c60-v2|\
 	tplink,archer-c60-v3|\
 	tplink,archer-c6-v2|\
-	tplink,archer-c6-v2-us)
+	tplink,archer-c6-v2-us|\
+	tplink,tl-wa1201-v2)
 		caldata_extract "art" 0x5000 0x2f20
 		ath10k_patch_mac $(macaddr_add $(mtd_get_mac_binary info 0x8) -1)
 		ln -sf /lib/firmware/ath10k/pre-cal-pci-0000\:00\:00.0.bin \
--- a/target/linux/ath79/image/generic-tp-link.mk
+++ b/target/linux/ath79/image/generic-tp-link.mk
@ -510,6 +510,17 @@ define Device/tplink_tl-mr6400-v1
 endef
 TARGET_DEVICES += tplink_tl-mr6400-v1

+define Device/tplink_tl-wa1201-v2
+  $(Device/tplink-safeloader-uimage)
+  SOC := qca9563
+  IMAGE_SIZE := 13184k
+  DEVICE_MODEL := TL-WA1201
+  DEVICE_VARIANT := v2
+  TPLINK_BOARD_ID := TL-WA1201-V2
+  DEVICE_PACKAGES := kmod-ath10k-ct ath10k-firmware-qca9888-ct
+endef
+TARGET_DEVICES += tplink_tl-wa1201-v2
+
 define Device/tplink_tl-wdr3500-v1
  $(Device/tplink-8mlzma)
  SOC := ar9344
--- a/target/linux/ath79/patches-5.10/910-unaligned_access_hacks.patch
+++ b/target/linux/ath79/patches-5.10/910-unaligned_access_hacks.patch
@ -171,7 +171,7 @@
 #define UDP_CORK	1	/* Never send partially complete segments */
 --- a/net/netfilter/nf_conntrack_core.c
 +++ b/net/netfilter/nf_conntrack_core.c
-@@ -273,8 +273,8 @@ nf_ct_get_tuple(const struct sk_buff *sk
+@@ -268,8 +268,8 @@ nf_ct_get_tuple(const struct sk_buff *sk
 
 	switch (l3num) {
 	case NFPROTO_IPV4:
--- a/target/linux/bcm27xx/patches-5.10/950-0409-drm-atomic-Pass-the-full-state-to-CRTC-atomic_check.patch
+++ b/target/linux/bcm27xx/patches-5.10/950-0409-drm-atomic-Pass-the-full-state-to-CRTC-atomic_check.patch
@ -672,7 +672,7 @@ Link: https://patchwork.freedesktop.org/patch/msgid/20201028123222.1732139-1-max
 #include <drm/drm_atomic_helper.h>
 #include <drm/drm_crtc_helper.h>
 #include <drm/drm_vblank.h>
-@@ -310,12 +311,14 @@ nv50_head_atomic_check_mode(struct nv50_
+@@ -315,12 +316,14 @@ nv50_head_atomic_check_mode(struct nv50_
 }
 
 static int
--- a/target/linux/bcm27xx/patches-5.10/950-0689-drm-automatic-legacy-gamma-support.patch
+++ b/target/linux/bcm27xx/patches-5.10/950-0689-drm-automatic-legacy-gamma-support.patch
@ -367,7 +367,7 @@ Link: https://patchwork.freedesktop.org/patch/msgid/20201211114237.213288-2-tomi
 };
 --- a/drivers/gpu/drm/nouveau/dispnv50/head.c
 +++ b/drivers/gpu/drm/nouveau/dispnv50/head.c
-@@ -501,7 +501,6 @@ nv50_head_destroy(struct drm_crtc *crtc)
+@@ -506,7 +506,6 @@ nv50_head_destroy(struct drm_crtc *crtc)
 static const struct drm_crtc_funcs
 nv50_head_func = {
 	.reset = nv50_head_reset,
@ -375,7 +375,7 @@ Link: https://patchwork.freedesktop.org/patch/msgid/20201211114237.213288-2-tomi
 	.destroy = nv50_head_destroy,
 	.set_config = drm_atomic_helper_set_config,
 	.page_flip = drm_atomic_helper_page_flip,
-@@ -516,7 +515,6 @@ nv50_head_func = {
+@@ -521,7 +520,6 @@ nv50_head_func = {
 static const struct drm_crtc_funcs
 nvd9_head_func = {
 	.reset = nv50_head_reset,
--- a/target/linux/bcm53xx/patches-5.10/130-ARM-dts-BCM5301X-Specify-switch-ports-for-more-devic.patch
+++ b/target/linux/bcm53xx/patches-5.10/130-ARM-dts-BCM5301X-Specify-switch-ports-for-more-devic.patch
@ -0,0 +1,289 @@
+From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
+Date: Tue, 7 Sep 2021 07:51:17 +0200
+Subject: [PATCH next] ARM: dts: BCM5301X: Specify switch ports for more
+ devices
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+Those are remaining models I have that didn't have ports yet. All
+tested.
+
+Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
+---
+ arch/arm/boot/dts/bcm4708-netgear-r6250.dts   | 37 ++++++++++++++++
+ .../boot/dts/bcm47081-buffalo-wzr-600dhp2.dts | 37 ++++++++++++++++
+ arch/arm/boot/dts/bcm4709-netgear-r8000.dts   | 42 +++++++++++++++++++
+ arch/arm/boot/dts/bcm47094-dlink-dir-885l.dts | 42 +++++++++++++++++++
+ arch/arm/boot/dts/bcm47094-luxul-abr-4500.dts | 37 ++++++++++++++++
+ arch/arm/boot/dts/bcm47094-luxul-xbr-4500.dts | 37 ++++++++++++++++
+ 6 files changed, 232 insertions(+)
+
+--- a/arch/arm/boot/dts/bcm4708-netgear-r6250.dts
+++ b/arch/arm/boot/dts/bcm4708-netgear-r6250.dts
+@@ -94,3 +94,40 @@
+ &usb3_phy {
+ 	status = "okay";
+ };
+
+&srab {
+	status = "okay";
+
+	ports {
+		port@0 {
+			reg = <0>;
+			label = "lan4";
+		};
+
+		port@1 {
+			reg = <1>;
+			label = "lan3";
+		};
+
+		port@2 {
+			reg = <2>;
+			label = "lan2";
+		};
+
+		port@3 {
+			reg = <3>;
+			label = "lan1";
+		};
+
+		port@4 {
+			reg = <4>;
+			label = "wan";
+		};
+
+		port@5 {
+			reg = <5>;
+			label = "cpu";
+			ethernet = <&gmac0>;
+		};
+	};
+};
+--- a/arch/arm/boot/dts/bcm47081-buffalo-wzr-600dhp2.dts
+++ b/arch/arm/boot/dts/bcm47081-buffalo-wzr-600dhp2.dts
+@@ -117,3 +117,40 @@
+ 		};
+ 	};
+ };
+
+&srab {
+	status = "okay";
+
+	ports {
+		port@0 {
+			reg = <0>;
+			label = "lan1";
+		};
+
+		port@1 {
+			reg = <1>;
+			label = "lan2";
+		};
+
+		port@2 {
+			reg = <2>;
+			label = "lan3";
+		};
+
+		port@3 {
+			reg = <3>;
+			label = "lan4";
+		};
+
+		port@4 {
+			reg = <4>;
+			label = "wan";
+		};
+
+		port@5 {
+			reg = <5>;
+			label = "cpu";
+			ethernet = <&gmac0>;
+		};
+	};
+};
+--- a/arch/arm/boot/dts/bcm4709-netgear-r8000.dts
+++ b/arch/arm/boot/dts/bcm4709-netgear-r8000.dts
+@@ -187,3 +187,45 @@
+ &usb3_phy {
+ 	status = "okay";
+ };
+
+&srab {
+	status = "okay";
+
+	ports {
+		port@0 {
+			reg = <0>;
+			label = "lan1";
+		};
+
+		port@1 {
+			reg = <1>;
+			label = "lan2";
+		};
+
+		port@2 {
+			reg = <2>;
+			label = "lan3";
+		};
+
+		port@3 {
+			reg = <3>;
+			label = "lan4";
+		};
+
+		port@4 {
+			reg = <4>;
+			label = "wan";
+		};
+
+		port@8 {
+			reg = <8>;
+			label = "cpu";
+			ethernet = <&gmac2>;
+
+			fixed-link {
+				speed = <1000>;
+				full-duplex;
+			};
+		};
+	};
+};
+--- a/arch/arm/boot/dts/bcm47094-dlink-dir-885l.dts
+++ b/arch/arm/boot/dts/bcm47094-dlink-dir-885l.dts
+@@ -118,3 +118,45 @@
+ &usb3_phy {
+ 	status = "okay";
+ };
+
+&srab {
+	status = "okay";
+
+	ports {
+		port@0 {
+			reg = <0>;
+			label = "lan4";
+		};
+
+		port@1 {
+			reg = <1>;
+			label = "lan3";
+		};
+
+		port@2 {
+			reg = <2>;
+			label = "lan2";
+		};
+
+		port@3 {
+			reg = <3>;
+			label = "lan1";
+		};
+
+		port@4 {
+			reg = <4>;
+			label = "wan";
+		};
+
+		port@8 {
+			reg = <8>;
+			label = "cpu";
+			ethernet = <&gmac2>;
+
+			fixed-link {
+				speed = <1000>;
+				full-duplex;
+			};
+		};
+	};
+};
+--- a/arch/arm/boot/dts/bcm47094-luxul-abr-4500.dts
+++ b/arch/arm/boot/dts/bcm47094-luxul-abr-4500.dts
+@@ -68,3 +68,40 @@
+ &usb3_phy {
+ 	status = "okay";
+ };
+
+&srab {
+	status = "okay";
+
+	ports {
+		port@0 {
+			reg = <0>;
+			label = "wan";
+		};
+
+		port@1 {
+			reg = <1>;
+			label = "lan4";
+		};
+
+		port@2 {
+			reg = <2>;
+			label = "lan3";
+		};
+
+		port@3 {
+			reg = <3>;
+			label = "lan2";
+		};
+
+		port@4 {
+			reg = <4>;
+			label = "lan1";
+		};
+
+		port@5 {
+			reg = <5>;
+			label = "cpu";
+			ethernet = <&gmac0>;
+		};
+	};
+};
+--- a/arch/arm/boot/dts/bcm47094-luxul-xbr-4500.dts
+++ b/arch/arm/boot/dts/bcm47094-luxul-xbr-4500.dts
+@@ -68,3 +68,40 @@
+ &usb3_phy {
+ 	status = "okay";
+ };
+
+&srab {
+	status = "okay";
+
+	ports {
+		port@0 {
+			reg = <0>;
+			label = "wan";
+		};
+
+		port@1 {
+			reg = <1>;
+			label = "lan4";
+		};
+
+		port@2 {
+			reg = <2>;
+			label = "lan3";
+		};
+
+		port@3 {
+			reg = <3>;
+			label = "lan2";
+		};
+
+		port@4 {
+			reg = <4>;
+			label = "lan1";
+		};
+
+		port@5 {
+			reg = <5>;
+			label = "cpu";
+			ethernet = <&gmac0>;
+		};
+	};
+};
--- a/target/linux/bcm53xx/patches-5.10/304-ARM-dts-BCM5301X-Specify-switch-ports-for-remaining-.patch
+++ b/target/linux/bcm53xx/patches-5.10/304-ARM-dts-BCM5301X-Specify-switch-ports-for-remaining-.patch
@ -0,0 +1,575 @@
+From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
+Subject: [PATCH] ARM: dts: BCM5301X: Specify switch ports for remaining
+ devices
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
+---
+
+--- a/arch/arm/boot/dts/bcm4708-asus-rt-ac56u.dts
+++ b/arch/arm/boot/dts/bcm4708-asus-rt-ac56u.dts
+@@ -93,3 +93,40 @@
+ &usb3_phy {
+ 	status = "okay";
+ };
+
+&srab {
+	status = "okay";
+
+	ports {
+		port@0 {
+			reg = <0>;
+			label = "lan1";
+		};
+
+		port@1 {
+			reg = <1>;
+			label = "lan2";
+		};
+
+		port@2 {
+			reg = <2>;
+			label = "lan3";
+		};
+
+		port@3 {
+			reg = <3>;
+			label = "lan4";
+		};
+
+		port@4 {
+			reg = <4>;
+			label = "wan";
+		};
+
+		port@5 {
+			reg = <5>;
+			label = "cpu";
+			ethernet = <&gmac0>;
+		};
+	};
+};
+--- a/arch/arm/boot/dts/bcm4708-asus-rt-ac68u.dts
+++ b/arch/arm/boot/dts/bcm4708-asus-rt-ac68u.dts
+@@ -83,3 +83,40 @@
+ &usb3_phy {
+ 	status = "okay";
+ };
+
+&srab {
+	status = "okay";
+
+	ports {
+		port@0 {
+			reg = <0>;
+			label = "wan";
+		};
+
+		port@1 {
+			reg = <1>;
+			label = "lan1";
+		};
+
+		port@2 {
+			reg = <2>;
+			label = "lan2";
+		};
+
+		port@3 {
+			reg = <3>;
+			label = "lan3";
+		};
+
+		port@4 {
+			reg = <4>;
+			label = "lan4";
+		};
+
+		port@5 {
+			reg = <5>;
+			label = "cpu";
+			ethernet = <&gmac0>;
+		};
+	};
+};
+--- a/arch/arm/boot/dts/bcm4708-buffalo-wzr-1750dhp.dts
+++ b/arch/arm/boot/dts/bcm4708-buffalo-wzr-1750dhp.dts
+@@ -149,3 +149,40 @@
+ &usb3_phy {
+ 	status = "okay";
+ };
+
+&srab {
+	status = "okay";
+
+	ports {
+		port@0 {
+			reg = <0>;
+			label = "lan1";
+		};
+
+		port@1 {
+			reg = <1>;
+			label = "lan2";
+		};
+
+		port@2 {
+			reg = <2>;
+			label = "lan3";
+		};
+
+		port@3 {
+			reg = <3>;
+			label = "lan4";
+		};
+
+		port@4 {
+			reg = <4>;
+			label = "wan";
+		};
+
+		port@5 {
+			reg = <5>;
+			label = "cpu";
+			ethernet = <&gmac0>;
+		};
+	};
+};
+--- a/arch/arm/boot/dts/bcm4708-linksys-ea6300-v1.dts
+++ b/arch/arm/boot/dts/bcm4708-linksys-ea6300-v1.dts
+@@ -46,3 +46,40 @@
+ &usb3_phy {
+ 	status = "okay";
+ };
+
+&srab {
+	status = "okay";
+
+	ports {
+		port@0 {
+			reg = <0>;
+			label = "lan1";
+		};
+
+		port@1 {
+			reg = <1>;
+			label = "lan2";
+		};
+
+		port@2 {
+			reg = <2>;
+			label = "lan3";
+		};
+
+		port@3 {
+			reg = <3>;
+			label = "lan4";
+		};
+
+		port@4 {
+			reg = <4>;
+			label = "wan";
+		};
+
+		port@5 {
+			reg = <5>;
+			label = "cpu";
+			ethernet = <&gmac0>;
+		};
+	};
+};
+--- a/arch/arm/boot/dts/bcm4708-linksys-ea6500-v2.dts
+++ b/arch/arm/boot/dts/bcm4708-linksys-ea6500-v2.dts
+@@ -42,3 +42,40 @@
+ &usb3_phy {
+ 	status = "okay";
+ };
+
+&srab {
+	status = "okay";
+
+	ports {
+		port@0 {
+			reg = <0>;
+			label = "lan1";
+		};
+
+		port@1 {
+			reg = <1>;
+			label = "lan2";
+		};
+
+		port@2 {
+			reg = <2>;
+			label = "lan3";
+		};
+
+		port@3 {
+			reg = <3>;
+			label = "lan4";
+		};
+
+		port@4 {
+			reg = <4>;
+			label = "wan";
+		};
+
+		port@5 {
+			reg = <5>;
+			label = "cpu";
+			ethernet = <&gmac0>;
+		};
+	};
+};
+--- a/arch/arm/boot/dts/bcm4708-netgear-r6300-v2.dts
+++ b/arch/arm/boot/dts/bcm4708-netgear-r6300-v2.dts
+@@ -86,3 +86,40 @@
+ &usb3_phy {
+ 	status = "okay";
+ };
+
+&srab {
+	status = "okay";
+
+	ports {
+		port@0 {
+			reg = <0>;
+			label = "lan1";
+		};
+
+		port@1 {
+			reg = <1>;
+			label = "lan2";
+		};
+
+		port@2 {
+			reg = <2>;
+			label = "lan3";
+		};
+
+		port@3 {
+			reg = <3>;
+			label = "lan4";
+		};
+
+		port@4 {
+			reg = <4>;
+			label = "wan";
+		};
+
+		port@5 {
+			reg = <5>;
+			label = "cpu";
+			ethernet = <&gmac0>;
+		};
+	};
+};
+--- a/arch/arm/boot/dts/bcm47081-asus-rt-n18u.dts
+++ b/arch/arm/boot/dts/bcm47081-asus-rt-n18u.dts
+@@ -77,3 +77,40 @@
+ &usb3_phy {
+ 	status = "okay";
+ };
+
+&srab {
+	status = "okay";
+
+	ports {
+		port@0 {
+			reg = <0>;
+			label = "wan";
+		};
+
+		port@1 {
+			reg = <1>;
+			label = "lan1";
+		};
+
+		port@2 {
+			reg = <2>;
+			label = "lan2";
+		};
+
+		port@3 {
+			reg = <3>;
+			label = "lan3";
+		};
+
+		port@4 {
+			reg = <4>;
+			label = "lan4";
+		};
+
+		port@5 {
+			reg = <5>;
+			label = "cpu";
+			ethernet = <&gmac0>;
+		};
+	};
+};
+--- a/arch/arm/boot/dts/bcm4709-asus-rt-ac87u.dts
+++ b/arch/arm/boot/dts/bcm4709-asus-rt-ac87u.dts
+@@ -68,6 +68,38 @@
+ 	status = "okay";
+ };
+ 
+&srab {
+	status = "okay";
+
+	ports {
+		port@0 {
+			reg = <0>;
+			label = "wan";
+		};
+
+		port@1 {
+			reg = <1>;
+			label = "lan1";
+		};
+
+		port@2 {
+			reg = <2>;
+			label = "lan2";
+		};
+
+		port@3 {
+			reg = <3>;
+			label = "lan3";
+		};
+
+		port@7 {
+			reg = <7>;
+			label = "cpu";
+			ethernet = <&gmac1>;
+		};
+	};
+};
+
+ &nandcs {
+ 	partitions {
+ 		compatible = "fixed-partitions";
+--- a/arch/arm/boot/dts/bcm4709-buffalo-wxr-1900dhp.dts
+++ b/arch/arm/boot/dts/bcm4709-buffalo-wxr-1900dhp.dts
+@@ -132,3 +132,40 @@
+ &usb3_phy {
+ 	status = "okay";
+ };
+
+&srab {
+	status = "okay";
+
+	ports {
+		port@0 {
+			reg = <0>;
+			label = "lan1";
+		};
+
+		port@1 {
+			reg = <1>;
+			label = "lan2";
+		};
+
+		port@2 {
+			reg = <2>;
+			label = "lan3";
+		};
+
+		port@3 {
+			reg = <3>;
+			label = "lan4";
+		};
+
+		port@4 {
+			reg = <4>;
+			label = "wan";
+		};
+
+		port@5 {
+			reg = <5>;
+			label = "cpu";
+			ethernet = <&gmac0>;
+		};
+	};
+};
+--- a/arch/arm/boot/dts/bcm4709-linksys-ea9200.dts
+++ b/arch/arm/boot/dts/bcm4709-linksys-ea9200.dts
+@@ -49,3 +49,45 @@
+ &usb3_phy {
+ 	status = "okay";
+ };
+
+&srab {
+	status = "okay";
+
+	ports {
+		port@0 {
+			reg = <0>;
+			label = "lan1";
+		};
+
+		port@1 {
+			reg = <1>;
+			label = "lan2";
+		};
+
+		port@2 {
+			reg = <2>;
+			label = "lan3";
+		};
+
+		port@3 {
+			reg = <3>;
+			label = "lan4";
+		};
+
+		port@4 {
+			reg = <4>;
+			label = "wan";
+		};
+
+		port@8 {
+			reg = <8>;
+			label = "cpu";
+			ethernet = <&gmac2>;
+
+			fixed-link {
+				speed = <1000>;
+				full-duplex;
+			};
+		};
+	};
+};
+--- a/arch/arm/boot/dts/bcm4709-netgear-r7000.dts
+++ b/arch/arm/boot/dts/bcm4709-netgear-r7000.dts
+@@ -106,3 +106,40 @@
+ &usb3_phy {
+ 	status = "okay";
+ };
+
+&srab {
+	status = "okay";
+
+	ports {
+		port@0 {
+			reg = <0>;
+			label = "wan";
+		};
+
+		port@1 {
+			reg = <1>;
+			label = "lan1";
+		};
+
+		port@2 {
+			reg = <2>;
+			label = "lan2";
+		};
+
+		port@3 {
+			reg = <3>;
+			label = "lan3";
+		};
+
+		port@4 {
+			reg = <4>;
+			label = "lan4";
+		};
+
+		port@5 {
+			reg = <5>;
+			label = "cpu";
+			ethernet = <&gmac0>;
+		};
+	};
+};
+--- a/arch/arm/boot/dts/bcm47094-netgear-r8500.dts
+++ b/arch/arm/boot/dts/bcm47094-netgear-r8500.dts
+@@ -94,3 +94,45 @@
+ &usb3_phy {
+ 	status = "okay";
+ };
+
+&srab {
+	status = "okay";
+
+	ports {
+		port@0 {
+			reg = <0>;
+			label = "wan";
+		};
+
+		port@1 {
+			reg = <1>;
+			label = "lan1";
+		};
+
+		port@2 {
+			reg = <2>;
+			label = "lan2";
+		};
+
+		port@3 {
+			reg = <3>;
+			label = "lan3";
+		};
+
+		port@4 {
+			reg = <4>;
+			label = "lan4";
+		};
+
+		port@8 {
+			reg = <8>;
+			label = "cpu";
+			ethernet = <&gmac2>;
+
+			fixed-link {
+				speed = <1000>;
+				full-duplex;
+			};
+		};
+	};
+};
+--- a/arch/arm/boot/dts/bcm47094-phicomm-k3.dts
+++ b/arch/arm/boot/dts/bcm47094-phicomm-k3.dts
+@@ -38,6 +38,38 @@
+ 	status = "okay";
+ };
+ 
+&srab {
+	status = "okay";
+
+	ports {
+		port@0 {
+			reg = <0>;
+			label = "lan1";
+		};
+
+		port@1 {
+			reg = <1>;
+			label = "lan2";
+		};
+
+		port@2 {
+			reg = <2>;
+			label = "lan3";
+		};
+
+		port@3 {
+			reg = <3>;
+			label = "wan";
+		};
+
+		port@5 {
+			reg = <5>;
+			label = "cpu";
+			ethernet = <&gmac0>;
+		};
+	};
+};
+
+ &nandcs {
+ 	partitions {
+ 		compatible = "fixed-partitions";
--- a/target/linux/gemini/config-5.10
+++ b/target/linux/gemini/config-5.10
@ -332,7 +332,6 @@ CONFIG_PREEMPT_COUNT=y
 CONFIG_PREEMPT_RCU=y
 CONFIG_PROC_PAGE_MONITOR=y
 CONFIG_RATIONAL=y
-CONFIG_RCU_CPU_STALL_TIMEOUT=21
 CONFIG_RD_BZIP2=y
 CONFIG_RD_GZIP=y
 CONFIG_RD_LZ4=y
--- a/target/linux/gemini/config-5.4
+++ b/target/linux/gemini/config-5.4
@ -368,7 +368,6 @@ CONFIG_PREEMPT_COUNT=y
 CONFIG_PREEMPT_RCU=y
 CONFIG_PROC_PAGE_MONITOR=y
 CONFIG_RATIONAL=y
-CONFIG_RCU_CPU_STALL_TIMEOUT=21
 CONFIG_RD_BZIP2=y
 CONFIG_RD_GZIP=y
 CONFIG_RD_LZ4=y
--- a/target/linux/generic/backport-5.10/781-v5.13-net-dsa-mt7530-Add-support-for-EEE-features.patch
+++ b/target/linux/generic/backport-5.10/781-v5.13-net-dsa-mt7530-Add-support-for-EEE-features.patch
@ -17,7 +17,7 @@ Signed-off-by: David S. Miller <davem@davemloft.net>

 --- a/drivers/net/dsa/mt7530.c
 +++ b/drivers/net/dsa/mt7530.c
-@@ -2270,6 +2270,17 @@ static void mt753x_phylink_mac_link_up(s
+@@ -2267,6 +2267,17 @@ static void mt753x_phylink_mac_link_up(s
 			mcr |= PMCR_RX_FC_EN;
 	}
 
@ -35,7 +35,7 @@ Signed-off-by: David S. Miller <davem@davemloft.net>
 	mt7530_set(priv, MT7530_PMCR_P(port), mcr);
 }
 
-@@ -2500,6 +2511,36 @@ mt753x_phy_write(struct dsa_switch *ds,
+@@ -2497,6 +2508,36 @@ mt753x_phy_write(struct dsa_switch *ds,
 	return priv->info->phy_write(ds, port, regnum, val);
 }
 
@ -72,7 +72,7 @@ Signed-off-by: David S. Miller <davem@davemloft.net>
 static const struct dsa_switch_ops mt7530_switch_ops = {
 	.get_tag_protocol	= mtk_get_tag_protocol,
 	.setup			= mt753x_setup,
-@@ -2528,6 +2569,8 @@ static const struct dsa_switch_ops mt753
+@@ -2525,6 +2566,8 @@ static const struct dsa_switch_ops mt753
 	.phylink_mac_an_restart	= mt753x_phylink_mac_an_restart,
 	.phylink_mac_link_down	= mt753x_phylink_mac_link_down,
 	.phylink_mac_link_up	= mt753x_phylink_mac_link_up,
--- a/target/linux/generic/backport-5.10/790-v5.15-0001-net-dsa-b53-Fix-calculating-number-of-switch-ports.patch
+++ b/target/linux/generic/backport-5.10/790-v5.15-0001-net-dsa-b53-Fix-calculating-number-of-switch-ports.patch
@ -0,0 +1,39 @@
+From cdb067d31c0fe4cce98b9d15f1f2ef525acaa094 Mon Sep 17 00:00:00 2001
+From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
+Date: Thu, 2 Sep 2021 10:30:50 +0200
+Subject: [PATCH] net: dsa: b53: Fix calculating number of switch ports
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+It isn't true that CPU port is always the last one. Switches BCM5301x
+have 9 ports (port 6 being inactive) and they use port 5 as CPU by
+default (depending on design some other may be CPU ports too).
+
+A more reliable way of determining number of ports is to check for the
+last set bit in the "enabled_ports" bitfield.
+
+This fixes b53 internal state, it will allow providing accurate info to
+the DSA and is required to fix BCM5301x support.
+
+Fixes: 967dd82ffc52 ("net: dsa: b53: Add support for Broadcom RoboSwitch")
+Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
+Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
+Signed-off-by: David S. Miller <davem@davemloft.net>
+---
+ drivers/net/dsa/b53/b53_common.c | 3 +--
+ 1 file changed, 1 insertion(+), 2 deletions(-)
+
+--- a/drivers/net/dsa/b53/b53_common.c
+++ b/drivers/net/dsa/b53/b53_common.c
+@@ -2556,9 +2556,8 @@ static int b53_switch_init(struct b53_de
+ 			dev->cpu_port = 5;
+ 	}
+ 
+-	/* cpu port is always last */
+-	dev->num_ports = dev->cpu_port + 1;
+ 	dev->enabled_ports |= BIT(dev->cpu_port);
+	dev->num_ports = fls(dev->enabled_ports);
+ 
+ 	/* Include non standard CPU port built-in PHYs to be probed */
+ 	if (is539x(dev) || is531x5(dev)) {
--- a/target/linux/generic/backport-5.10/790-v5.15-0002-net-dsa-b53-Set-correct-number-of-ports-in-the-DSA-s.patch
+++ b/target/linux/generic/backport-5.10/790-v5.15-0002-net-dsa-b53-Set-correct-number-of-ports-in-the-DSA-s.patch
@ -0,0 +1,43 @@
+From d12e1c4649883e8ca5e8ff341e1948b3b6313259 Mon Sep 17 00:00:00 2001
+From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
+Date: Thu, 2 Sep 2021 10:30:51 +0200
+Subject: [PATCH] net: dsa: b53: Set correct number of ports in the DSA struct
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+Setting DSA_MAX_PORTS caused DSA to call b53 callbacks (e.g.
+b53_disable_port() during dsa_register_switch()) for invalid
+(non-existent) ports. That made b53 modify unrelated registers and is
+one of reasons for a broken BCM5301x support.
+
+This problem exists for years but DSA_MAX_PORTS usage has changed few
+times. It seems the most accurate to reference commit dropping
+dsa_switch_alloc() in the Fixes tag.
+
+Fixes: 7e99e3470172 ("net: dsa: remove dsa_switch_alloc helper")
+Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
+Signed-off-by: David S. Miller <davem@davemloft.net>
+---
+ drivers/net/dsa/b53/b53_common.c | 3 ++-
+ 1 file changed, 2 insertions(+), 1 deletion(-)
+
+--- a/drivers/net/dsa/b53/b53_common.c
+++ b/drivers/net/dsa/b53/b53_common.c
+@@ -2559,6 +2559,8 @@ static int b53_switch_init(struct b53_de
+ 	dev->enabled_ports |= BIT(dev->cpu_port);
+ 	dev->num_ports = fls(dev->enabled_ports);
+ 
+	dev->ds->num_ports = min_t(unsigned int, dev->num_ports, DSA_MAX_PORTS);
+
+ 	/* Include non standard CPU port built-in PHYs to be probed */
+ 	if (is539x(dev) || is531x5(dev)) {
+ 		for (i = 0; i < dev->num_ports; i++) {
+@@ -2603,7 +2605,6 @@ struct b53_device *b53_switch_alloc(stru
+ 		return NULL;
+ 
+ 	ds->dev = base;
+-	ds->num_ports = DSA_MAX_PORTS;
+ 
+ 	dev = devm_kzalloc(base, sizeof(*dev), GFP_KERNEL);
+ 	if (!dev)
--- a/target/linux/generic/config-5.10
+++ b/target/linux/generic/config-5.10
@ -4648,7 +4648,7 @@ CONFIG_PWRSEQ_SIMPLE=y
 # CONFIG_RAW_DRIVER is not set
 # CONFIG_RBTREE_TEST is not set
 # CONFIG_RCU_BOOST is not set
-CONFIG_RCU_CPU_STALL_TIMEOUT=60
+CONFIG_RCU_CPU_STALL_TIMEOUT=21
 # CONFIG_RCU_EQS_DEBUG is not set
 # CONFIG_RCU_EXPEDITE_BOOT is not set
 # CONFIG_RCU_EXPERT is not set
--- a/target/linux/generic/config-5.4
+++ b/target/linux/generic/config-5.4
@ -4278,7 +4278,7 @@ CONFIG_PWRSEQ_SIMPLE=y
 # CONFIG_RAW_DRIVER is not set
 # CONFIG_RBTREE_TEST is not set
 # CONFIG_RCU_BOOST is not set
-CONFIG_RCU_CPU_STALL_TIMEOUT=60
+CONFIG_RCU_CPU_STALL_TIMEOUT=21
 # CONFIG_RCU_EQS_DEBUG is not set
 # CONFIG_RCU_EXPEDITE_BOOT is not set
 # CONFIG_RCU_EXPERT is not set
--- a/target/linux/generic/pending-5.10/670-ipv6-allow-rejecting-with-source-address-failed-policy.patch
+++ b/target/linux/generic/pending-5.10/670-ipv6-allow-rejecting-with-source-address-failed-policy.patch
@ -110,7 +110,7 @@ Signed-off-by: Jonas Gorski <jogo@openwrt.org>
 		return -EINVAL;
 --- a/net/ipv6/route.c
 +++ b/net/ipv6/route.c
-@@ -94,6 +94,8 @@ static int		ip6_pkt_discard(struct sk_bu
+@@ -95,6 +95,8 @@ static int		ip6_pkt_discard(struct sk_bu
 static int		ip6_pkt_discard_out(struct net *net, struct sock *sk, struct sk_buff *skb);
 static int		ip6_pkt_prohibit(struct sk_buff *skb);
 static int		ip6_pkt_prohibit_out(struct net *net, struct sock *sk, struct sk_buff *skb);
@ -119,7 +119,7 @@ Signed-off-by: Jonas Gorski <jogo@openwrt.org>
 static void		ip6_link_failure(struct sk_buff *skb);
 static void		ip6_rt_update_pmtu(struct dst_entry *dst, struct sock *sk,
 					   struct sk_buff *skb, u32 mtu,
-@@ -309,6 +311,18 @@ static const struct rt6_info ip6_prohibi
+@@ -310,6 +312,18 @@ static const struct rt6_info ip6_prohibi
 	.rt6i_flags	= (RTF_REJECT | RTF_NONEXTHOP),
 };
 
@ -138,7 +138,7 @@ Signed-off-by: Jonas Gorski <jogo@openwrt.org>
 static const struct rt6_info ip6_blk_hole_entry_template = {
 	.dst = {
 		.__refcnt	= ATOMIC_INIT(1),
-@@ -1030,6 +1044,7 @@ static const int fib6_prop[RTN_MAX + 1]
+@@ -1031,6 +1045,7 @@ static const int fib6_prop[RTN_MAX + 1]
 	[RTN_BLACKHOLE]	= -EINVAL,
 	[RTN_UNREACHABLE] = -EHOSTUNREACH,
 	[RTN_PROHIBIT]	= -EACCES,
@ -146,7 +146,7 @@ Signed-off-by: Jonas Gorski <jogo@openwrt.org>
 	[RTN_THROW]	= -EAGAIN,
 	[RTN_NAT]	= -EINVAL,
 	[RTN_XRESOLVE]	= -EINVAL,
-@@ -1065,6 +1080,10 @@ static void ip6_rt_init_dst_reject(struc
+@@ -1066,6 +1081,10 @@ static void ip6_rt_init_dst_reject(struc
 		rt->dst.output = ip6_pkt_prohibit_out;
 		rt->dst.input = ip6_pkt_prohibit;
 		break;
@ -157,7 +157,7 @@ Signed-off-by: Jonas Gorski <jogo@openwrt.org>
 	case RTN_THROW:
 	case RTN_UNREACHABLE:
 	default:
-@@ -4418,6 +4437,17 @@ static int ip6_pkt_prohibit_out(struct n
+@@ -4426,6 +4445,17 @@ static int ip6_pkt_prohibit_out(struct n
 	return ip6_pkt_drop(skb, ICMPV6_ADM_PROHIBITED, IPSTATS_MIB_OUTNOROUTES);
 }
 
@ -175,7 +175,7 @@ Signed-off-by: Jonas Gorski <jogo@openwrt.org>
 /*
  *	Allocate a dst for local (unicast / anycast) address.
  */
-@@ -4898,7 +4928,8 @@ static int rtm_to_fib6_config(struct sk_
+@@ -4906,7 +4936,8 @@ static int rtm_to_fib6_config(struct sk_
 	if (rtm->rtm_type == RTN_UNREACHABLE ||
 	    rtm->rtm_type == RTN_BLACKHOLE ||
 	    rtm->rtm_type == RTN_PROHIBIT ||
@ -185,7 +185,7 @@ Signed-off-by: Jonas Gorski <jogo@openwrt.org>
 		cfg->fc_flags |= RTF_REJECT;
 
 	if (rtm->rtm_type == RTN_LOCAL)
-@@ -6068,6 +6099,8 @@ static int ip6_route_dev_notify(struct n
+@@ -6076,6 +6107,8 @@ static int ip6_route_dev_notify(struct n
 #ifdef CONFIG_IPV6_MULTIPLE_TABLES
 		net->ipv6.ip6_prohibit_entry->dst.dev = dev;
 		net->ipv6.ip6_prohibit_entry->rt6i_idev = in6_dev_get(dev);
@ -194,7 +194,7 @@ Signed-off-by: Jonas Gorski <jogo@openwrt.org>
 		net->ipv6.ip6_blk_hole_entry->dst.dev = dev;
 		net->ipv6.ip6_blk_hole_entry->rt6i_idev = in6_dev_get(dev);
 #endif
-@@ -6079,6 +6112,7 @@ static int ip6_route_dev_notify(struct n
+@@ -6087,6 +6120,7 @@ static int ip6_route_dev_notify(struct n
 		in6_dev_put_clear(&net->ipv6.ip6_null_entry->rt6i_idev);
 #ifdef CONFIG_IPV6_MULTIPLE_TABLES
 		in6_dev_put_clear(&net->ipv6.ip6_prohibit_entry->rt6i_idev);
@ -202,7 +202,7 @@ Signed-off-by: Jonas Gorski <jogo@openwrt.org>
 		in6_dev_put_clear(&net->ipv6.ip6_blk_hole_entry->rt6i_idev);
 #endif
 	}
-@@ -6270,6 +6304,8 @@ static int __net_init ip6_route_net_init
+@@ -6278,6 +6312,8 @@ static int __net_init ip6_route_net_init
 
 #ifdef CONFIG_IPV6_MULTIPLE_TABLES
 	net->ipv6.fib6_has_custom_rules = false;
@ -211,7 +211,7 @@ Signed-off-by: Jonas Gorski <jogo@openwrt.org>
 	net->ipv6.ip6_prohibit_entry = kmemdup(&ip6_prohibit_entry_template,
 					       sizeof(*net->ipv6.ip6_prohibit_entry),
 					       GFP_KERNEL);
-@@ -6280,11 +6316,21 @@ static int __net_init ip6_route_net_init
+@@ -6288,11 +6324,21 @@ static int __net_init ip6_route_net_init
 			 ip6_template_metrics, true);
 	INIT_LIST_HEAD(&net->ipv6.ip6_prohibit_entry->rt6i_uncached);
 
@ -234,7 +234,7 @@ Signed-off-by: Jonas Gorski <jogo@openwrt.org>
 	net->ipv6.ip6_blk_hole_entry->dst.ops = &net->ipv6.ip6_dst_ops;
 	dst_init_metrics(&net->ipv6.ip6_blk_hole_entry->dst,
 			 ip6_template_metrics, true);
-@@ -6311,6 +6357,8 @@ out:
+@@ -6319,6 +6365,8 @@ out:
 	return ret;
 
 #ifdef CONFIG_IPV6_MULTIPLE_TABLES
@ -243,7 +243,7 @@ Signed-off-by: Jonas Gorski <jogo@openwrt.org>
 out_ip6_prohibit_entry:
 	kfree(net->ipv6.ip6_prohibit_entry);
 out_ip6_null_entry:
-@@ -6330,6 +6378,7 @@ static void __net_exit ip6_route_net_exi
+@@ -6338,6 +6386,7 @@ static void __net_exit ip6_route_net_exi
 	kfree(net->ipv6.ip6_null_entry);
 #ifdef CONFIG_IPV6_MULTIPLE_TABLES
 	kfree(net->ipv6.ip6_prohibit_entry);
@ -251,7 +251,7 @@ Signed-off-by: Jonas Gorski <jogo@openwrt.org>
 	kfree(net->ipv6.ip6_blk_hole_entry);
 #endif
 	dst_entries_destroy(&net->ipv6.ip6_dst_ops);
-@@ -6407,6 +6456,9 @@ void __init ip6_route_init_special_entri
+@@ -6415,6 +6464,9 @@ void __init ip6_route_init_special_entri
 	init_net.ipv6.ip6_prohibit_entry->rt6i_idev = in6_dev_get(init_net.loopback_dev);
 	init_net.ipv6.ip6_blk_hole_entry->dst.dev = init_net.loopback_dev;
 	init_net.ipv6.ip6_blk_hole_entry->rt6i_idev = in6_dev_get(init_net.loopback_dev);
--- a/target/linux/ipq40xx/config-5.4
+++ b/target/linux/ipq40xx/config-5.4
@ -378,7 +378,6 @@ CONFIG_QCOM_WDT=y
 # CONFIG_QRTR is not set
 CONFIG_RAS=y
 CONFIG_RATIONAL=y
-CONFIG_RCU_CPU_STALL_TIMEOUT=21
 CONFIG_REFCOUNT_FULL=y
 CONFIG_REGMAP=y
 CONFIG_REGMAP_I2C=y
--- a/target/linux/ipq806x/config-5.10
+++ b/target/linux/ipq806x/config-5.10
@ -404,7 +404,6 @@ CONFIG_QCOM_WDT=y
 # CONFIG_QCS_TURING_404 is not set
 CONFIG_RAS=y
 CONFIG_RATIONAL=y
-CONFIG_RCU_CPU_STALL_TIMEOUT=21
 CONFIG_REGMAP=y
 CONFIG_REGMAP_MMIO=y
 CONFIG_REGULATOR=y
--- a/target/linux/ipq806x/config-5.4
+++ b/target/linux/ipq806x/config-5.4
@ -370,7 +370,6 @@ CONFIG_QCOM_WDT=y
 # CONFIG_QRTR is not set
 CONFIG_RAS=y
 CONFIG_RATIONAL=y
-CONFIG_RCU_CPU_STALL_TIMEOUT=21
 CONFIG_REFCOUNT_FULL=y
 CONFIG_REGMAP=y
 CONFIG_REGMAP_MMIO=y
--- a/target/linux/ipq807x/config-default
+++ b/target/linux/ipq807x/config-default
@ -530,7 +530,6 @@ CONFIG_QUEUED_RWLOCKS=y
 CONFIG_QUEUED_SPINLOCKS=y
 # CONFIG_RANDOMIZE_BASE is not set
 CONFIG_RATIONAL=y
-CONFIG_RCU_CPU_STALL_TIMEOUT=21
 CONFIG_RD_GZIP=y
 CONFIG_REFCOUNT_FULL=y
 CONFIG_REGMAP=y
--- a/target/linux/layerscape/armv7/config-5.4
+++ b/target/linux/layerscape/armv7/config-5.4
@ -504,7 +504,6 @@ CONFIG_QORIQ_CPUFREQ=y
 # CONFIG_QUICC_ENGINE is not set
 CONFIG_RAS=y
 CONFIG_RATIONAL=y
-CONFIG_RCU_CPU_STALL_TIMEOUT=21
 CONFIG_RD_BZIP2=y
 CONFIG_RD_GZIP=y
 CONFIG_RD_LZMA=y
--- a/target/linux/layerscape/armv8_64b/config-5.4
+++ b/target/linux/layerscape/armv8_64b/config-5.4
@ -670,7 +670,6 @@ CONFIG_QUOTACTL=y
 CONFIG_RAID6_PQ=y
 CONFIG_RAS=y
 CONFIG_RATIONAL=y
-CONFIG_RCU_CPU_STALL_TIMEOUT=21
 CONFIG_RD_BZIP2=y
 CONFIG_RD_GZIP=y
 CONFIG_RD_LZMA=y
--- a/target/linux/mediatek/dts/mt7622-totolink-a8000ru.dts
+++ b/target/linux/mediatek/dts/mt7622-totolink-a8000ru.dts
@ -0,0 +1,329 @@
+// SPDX-License-Identifier: (GPL-2.0-only OR MIT)
+
+/dts-v1/;
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/gpio/gpio.h>
+
+#include "mt7622.dtsi"
+#include "mt6380.dtsi"
+
+/ {
+	model = "TOTOLINK A8000RU";
+	compatible = "totolink,a8000ru", "mediatek,mt7622";
+
+	aliases {
+		label-mac-device = &gmac0;
+		led-boot = &led_status;
+		led-failsafe = &led_status;
+		led-running = &led_status;
+		led-upgrade = &led_status;
+		serial0 = &uart0;
+	};
+
+	chosen {
+		stdout-path = "serial0:115200n8";
+		bootargs = "earlycon=uart8250,mmio32,0x11002000 swiotlb=512";
+	};
+
+	cpus {
+		cpu@0 {
+			proc-supply = <&mt6380_vcpu_reg>;
+			sram-supply = <&mt6380_vm_reg>;
+		};
+
+		cpu@1 {
+			proc-supply = <&mt6380_vcpu_reg>;
+			sram-supply = <&mt6380_vm_reg>;
+		};
+	};
+
+	gpio-keys {
+		compatible = "gpio-keys";
+
+		reset {
+			label = "reset";
+			linux,code = <KEY_RESTART>;
+			gpios = <&pio 0 GPIO_ACTIVE_LOW>;
+		};
+
+		wps {
+			label = "wps";
+			linux,code = <KEY_WPS_BUTTON>;
+			gpios = <&pio 102 GPIO_ACTIVE_LOW>;
+		};
+	};
+
+	gpio-leds {
+		compatible = "gpio-leds";
+
+		led_status: status_red {
+			label = "red:status";
+			gpios = <&pio 81 GPIO_ACTIVE_LOW>;
+			default-state = "on";
+		};
+	};
+
+	reg_1p8v: regulator-1p8v {
+		compatible = "regulator-fixed";
+		regulator-name = "fixed-1.8V";
+		regulator-min-microvolt = <1800000>;
+		regulator-max-microvolt = <1800000>;
+		regulator-always-on;
+	};
+
+	reg_3p3v: regulator-3p3v {
+		compatible = "regulator-fixed";
+		regulator-name = "fixed-3.3V";
+		regulator-min-microvolt = <3300000>;
+		regulator-max-microvolt = <3300000>;
+		regulator-boot-on;
+		regulator-always-on;
+	};
+
+	rtkgsw: rtkgsw@0 {
+		compatible = "mediatek,rtk-gsw";
+		mediatek,ethsys = <&ethsys>;
+		mediatek,mdio = <&mdio>;
+		mediatek,reset-pin = <&pio 54 0>;
+		status = "okay";
+	};
+};
+
+&pcie0 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pcie0_pins>;
+	status = "okay";
+};
+
+&slot0 {
+	mt7615@0,0 {
+		reg = <0x0000 0 0 0 0>;
+		mediatek,mtd-eeprom = <&factory 0x5000>;
+		ieee80211-freq-limit = <5490000 6000000>;
+	};
+};
+
+&pcie1 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pcie1_pins>;
+	status = "okay";
+};
+
+&slot1 {
+	mt7615@0,0 {
+		reg = <0x0000 0 0 0 0>;
+		mediatek,mtd-eeprom = <&factory 0x10000>;
+		ieee80211-freq-limit = <5000000 5490000>;
+	};
+};
+
+&pio {
+	eth_pins: eth-pins {
+		mux {
+			function = "eth";
+			groups = "mdc_mdio", "rgmii_via_gmac2";
+		};
+	};
+
+	pcie0_pins: pcie0-pins {
+		mux {
+			function = "pcie";
+			groups = "pcie0_pad_perst",
+				 "pcie0_1_waken",
+				 "pcie0_1_clkreq";
+		};
+	};
+
+	pcie1_pins: pcie1-pins {
+		mux {
+			function = "pcie";
+			groups = "pcie1_pad_perst",
+				 "pcie1_0_waken",
+				 "pcie1_0_clkreq";
+		};
+	};
+
+	pmic_bus_pins: pmic-bus-pins {
+		mux {
+			function = "pmic";
+			groups = "pmic_bus";
+		};
+	};
+
+	/* serial NAND is shared pin with SPI-NOR */
+	serial_nand_pins: serial-nand-pins {
+		mux {
+			function = "flash";
+			groups = "snfi";
+		};
+	};
+
+	uart0_pins: uart0-pins {
+		mux {
+			function = "uart";
+			groups = "uart0_0_tx_rx" ;
+		};
+	};
+
+	watchdog_pins: watchdog-pins {
+		mux {
+			function = "watchdog";
+			groups = "watchdog";
+		};
+	};
+
+	epa_elna_pins: epa-elna-pins {
+		mux {
+			function = "antsel";
+			groups = "antsel0", "antsel1", "antsel2", "antsel3",
+				"antsel4", "antsel5", "antsel6", "antsel7",
+				"antsel8", "antsel9", "antsel12", "antsel13",
+				"antsel14", "antsel15", "antsel16", "antsel17";
+		};
+	};
+};
+
+&eth {
+	status = "okay";
+	pinctrl-names = "default";
+	pinctrl-0 = <&eth_pins>;
+
+	gmac0: mac@0 {
+		compatible = "mediatek,eth-mac";
+		reg = <0>;
+		nvmem-cells = <&macaddr_factory_2a>;
+		nvmem-cell-names = "mac-address";
+		phy-connection-type = "2500base-x";
+		fixed-link {
+			speed = <2500>;
+			full-duplex;
+			pause;
+		};
+	};
+
+	gmac1: mac@1 {
+		compatible = "mediatek,eth-mac";
+		reg = <1>;
+		phy-mode = "rgmii";
+		nvmem-cells = <&macaddr_factory_24>;
+		nvmem-cell-names = "mac-address";
+		fixed-link {
+			speed = <1000>;
+			full-duplex;
+			pause;
+		};
+	};
+
+	mdio: mdio-bus {
+		#address-cells = <1>;
+		#size-cells = <0>;
+	};
+};
+
+&pwrap {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pmic_bus_pins>;
+	status = "okay";
+};
+
+&snand {
+	mediatek,quad-spi;
+	pinctrl-names = "default";
+	pinctrl-0 = <&serial_nand_pins>;
+	status = "okay";
+	mediatek,bmt-v2;
+
+	partitions {
+		compatible = "fixed-partitions";
+		#address-cells = <1>;
+		#size-cells = <1>;
+
+		partition@0 {
+			label = "Preloader";
+			reg = <0x0 0x80000>;
+			read-only;
+		};
+
+		partition@80000 {
+			label = "ATF";
+			reg = <0x80000 0x40000>;
+			read-only;
+		};
+
+		partition@c0000 {
+			label = "u-boot";
+			reg = <0xc0000 0x80000>;
+			read-only;
+		};
+
+		partition@140000 {
+			label = "u-boot-env";
+			reg = <0x140000 0x80000>;
+			read-only;
+		};
+
+		factory: partition@1c0000 {
+			label = "factory";
+			reg = <0x1c0000 0x40000>;
+			read-only;
+		};
+
+		partition@200000 {
+			label = "ubi";
+			reg = <0x200000 0x6400000>;
+		};
+
+		partition@6600000 {
+			label = "User_data";
+			reg = <0x6600000 0x100000>;
+		};
+
+		/* size of this partition varies due to BMT & bad blocks. */
+		partition@6700000 {
+			label = "reserved";
+			reg = <0x6700000 0>;
+		};
+	};
+};
+
+&factory {
+	compatible = "nvmem-cells";
+	#address-cells = <1>;
+	#size-cells = <1>;
+
+	macaddr_factory_24: macaddr@24 {
+		reg = <0x24 0x6>;
+	};
+
+	macaddr_factory_2a: macaddr@2a {
+		reg = <0x2a 0x6>;
+	};
+};
+
+&ssusb {
+	vusb33-supply = <&reg_3p3v>;
+	status = "okay";
+};
+
+&u3phy {
+	status = "okay";
+};
+
+&uart0 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&uart0_pins>;
+	status = "okay";
+};
+
+&watchdog {
+	pinctrl-names = "default";
+	pinctrl-0 = <&watchdog_pins>;
+	status = "okay";
+};
+
+&wmac {
+	pinctrl-names = "default";
+	pinctrl-0 = <&epa_elna_pins>;
+	mediatek,mtd-eeprom = <&factory 0x0>;
+	status = "okay";
+};
--- a/target/linux/mediatek/image/mt7622.mk
+++ b/target/linux/mediatek/image/mt7622.mk
@ -202,6 +202,16 @@ define Device/mediatek_mt7622-rfb1-ubi
 endef
 TARGET_DEVICES += mediatek_mt7622-rfb1-ubi

+define Device/totolink_a8000ru
+  DEVICE_VENDOR := TOTOLINK
+  DEVICE_MODEL := A8000RU
+  DEVICE_DTS := mt7622-totolink-a8000ru
+  DEVICE_DTS_DIR := ../dts
+  DEVICE_PACKAGES := swconfig
+  IMAGE/sysupgrade.bin := sysupgrade-tar | append-metadata
+endef
+TARGET_DEVICES += totolink_a8000ru
+
 define Device/ubnt_unifi-6-lr
  DEVICE_VENDOR := Ubiquiti
  DEVICE_MODEL := UniFi 6 LR
--- a/target/linux/mediatek/mt7622/base-files/lib/upgrade/platform.sh
+++ b/target/linux/mediatek/mt7622/base-files/lib/upgrade/platform.sh
@ -54,6 +54,9 @@ platform_do_upgrade() {
 		fi
 		default_do_upgrade "$1"
 		;;
+	totolink,a8000ru)
+		nand_do_upgrade "$1"
+		;;
 	*)
 		default_do_upgrade "$1"
 		;;
@ -72,6 +75,9 @@ platform_check_image() {
 	buffalo,wsr-2533dhp2)
 		buffalo_check_image "$board" "$magic" "$1" || return 1
 		;;
+	totolink,a8000ru)
+		nand_do_platform_check "$board" "$1"
+		;;
 	*)
 		[ "$magic" != "d00dfeed" ] && {
 			echo "Invalid image type."
--- a/target/linux/mediatek/mt7623/config-5.10
+++ b/target/linux/mediatek/mt7623/config-5.10
@ -508,7 +508,6 @@ CONFIG_PWM_MEDIATEK=y
 CONFIG_PWM_SYSFS=y
 CONFIG_RAS=y
 CONFIG_RATIONAL=y
-CONFIG_RCU_CPU_STALL_TIMEOUT=21
 CONFIG_REGMAP=y
 CONFIG_REGMAP_MMIO=y
 CONFIG_REGULATOR=y
--- a/target/linux/mvebu/Makefile
+++ b/target/linux/mvebu/Makefile
@ -9,8 +9,7 @@ BOARDNAME:=Marvell EBU Armada
 FEATURES:=fpu usb pci pcie gpio nand squashfs ramdisk boot-part rootfs-part legacy-sdcard
 SUBTARGETS:=cortexa9 cortexa53 cortexa72

-KERNEL_PATCHVER:=5.4
-KERNEL_TESTING_PATCHVER:=5.10
+KERNEL_PATCHVER:=5.10

 include $(INCLUDE_DIR)/target.mk

--- a/target/linux/mvebu/cortexa72/base-files/etc/board.d/02_network
+++ b/target/linux/mvebu/cortexa72/base-files/etc/board.d/02_network
@ -10,6 +10,12 @@ board_config_update
 board=$(board_name)

 case "$board" in
+iei,puzzle-m901)
+	ucidef_set_interfaces_lan_wan "eth1 eth2 eth3 eth4 eth5" "eth0"
+	;;
+iei,puzzle-m902)
+	ucidef_set_interfaces_lan_wan "eth1 eth2 eth3 eth4 eth5 eth10 eth11 eth12" "eth0"
+	;;
 marvell,armada8040-mcbin-doubleshot|\
 marvell,armada8040-mcbin-singleshot)
 	ucidef_set_interfaces_lan_wan "eth0 eth1 eth3" "eth2"
--- a/target/linux/mvebu/cortexa72/base-files/lib/upgrade/emmc-puzzle.sh
+++ b/target/linux/mvebu/cortexa72/base-files/lib/upgrade/emmc-puzzle.sh
@ -0,0 +1,36 @@
+platform_do_upgrade_emmc() {
+	local board=$(board_name)
+	local diskdev partdev
+
+	export_bootdevice && export_partdevice diskdev 0 || {
+		v "Unable to determine upgrade device"
+		return 1
+	}
+	sync
+	if [ "$UPGRADE_OPT_SAVE_PARTITIONS" = "1" ]; then
+		get_partitions "/dev/$diskdev" bootdisk
+		v "Extract boot sector from the image"
+		get_image_dd "$1" of=/tmp/image.bs count=1 bs=512b
+		get_partitions /tmp/image.bs image
+	fi
+
+	#iterate over each partition from the image and write it to the boot disk
+	while read part start size; do
+		if export_partdevice partdev $part; then
+			if [ "$partdev" = "mmcblk0p2" ]; then
+				v "Writing image mmcblk0p3 for /dev/$partdev  $start $size"
+				get_image_dd "$1" of="/dev/mmcblk0p3" ibs="512" obs=1M skip="$start" count="$size" conv=fsync
+			elif [ "$partdev" = "mmcblk0p1" ]; then
+				v "Writing image mmcblk0p1 for /dev/$partdev $start $size"
+				get_image_dd "$1" of="/dev/$partdev" ibs="512" obs=1M skip="$start" count="$size" conv=fsync
+			fi
+		else
+			v "Unable to find partition $part device, skipped."
+		fi
+	done < /tmp/partmap.image
+
+	v "Writing new UUID to /dev/$diskdev..."
+	get_image_dd "$1" of="/dev/$diskdev" bs=1 skip=440 count=4 seek=440 conv=fsync
+
+	sleep 1
+}
--- a/target/linux/mvebu/cortexa72/base-files/lib/upgrade/platform.sh
+++ b/target/linux/mvebu/cortexa72/base-files/lib/upgrade/platform.sh
@ -9,6 +9,8 @@ REQUIRE_IMAGE_METADATA=1

 platform_check_image() {
 	case "$(board_name)" in
+	iei,puzzle-m901|\
+	iei,puzzle-m902|\
 	marvell,armada8040-mcbin-doubleshot|\
 	marvell,armada8040-mcbin-singleshot)
 		legacy_sdcard_check_image "$1"
@ -21,6 +23,10 @@ platform_check_image() {

 platform_do_upgrade() {
 	case "$(board_name)" in
+	iei,puzzle-m901|\
+	iei,puzzle-m902)
+		platform_do_upgrade_emmc "$1"
+		;;
 	marvell,armada8040-mcbin-doubleshot|\
 	marvell,armada8040-mcbin-singleshot)
 		legacy_sdcard_do_upgrade "$1"
@ -32,6 +38,8 @@ platform_do_upgrade() {
 }
 platform_copy_config() {
 	case "$(board_name)" in
+	iei,puzzle-m901|\
+	iei,puzzle-m902|\
 	marvell,armada8040-mcbin-doubleshot|\
 	marvell,armada8040-mcbin-singleshot)
 		legacy_sdcard_copy_config
--- a/target/linux/mvebu/files/arch/arm64/boot/dts/marvell/cn9131-puzzle-m901.dts
+++ b/target/linux/mvebu/files/arch/arm64/boot/dts/marvell/cn9131-puzzle-m901.dts
@ -0,0 +1,319 @@
+// SPDX-License-Identifier: (GPL-2.0-or-later OR MIT)
+/*
+ * Copyright (C) 2019 Marvell International Ltd.
+ *
+ * Device tree for the CN9131-DB board.
+ */
+
+#include "cn9130.dtsi"
+
+#include <dt-bindings/gpio/gpio.h>
+
+/ {
+	model = "iEi Puzzle-M901";
+	compatible = "iei,puzzle-m901",
+		     "marvell,armada-ap807-quad", "marvell,armada-ap807";
+
+	chosen {
+		stdout-path = "serial0:115200n8";
+	};
+
+	aliases {
+		i2c0 = &cp1_i2c0;
+		i2c1 = &cp0_i2c0;
+		ethernet0 = &cp0_eth0;
+		ethernet1 = &cp0_eth1;
+		ethernet2 = &cp0_eth2;
+		ethernet3 = &cp1_eth0;
+		ethernet4 = &cp1_eth1;
+		ethernet5 = &cp1_eth2;
+		gpio1 = &cp0_gpio1;
+		gpio2 = &cp0_gpio2;
+		gpio3 = &cp1_gpio1;
+		gpio4 = &cp1_gpio2;
+	};
+
+	memory@00000000 {
+		device_type = "memory";
+		reg = <0x0 0x0 0x0 0x80000000>;
+	};
+};
+
+&uart0 {
+	status = "okay";
+};
+
+&cp0_uart0 {
+	status = "okay";
+};
+
+/* on-board eMMC - U9 */
+&ap_sdhci0 {
+	pinctrl-names = "default";
+	bus-width = <8>;
+	status = "okay";
+	mmc-ddr-1_8v;
+	mmc-hs400-1_8v;
+};
+
+&cp0_crypto {
+	status = "okay";
+};
+
+&cp0_xmdio {
+	status = "okay";
+	cp0_nbaset_phy0: ethernet-phy@0 {
+		compatible = "ethernet-phy-ieee802.3-c45";
+		reg = <2>;
+	};
+	cp0_nbaset_phy1: ethernet-phy@1 {
+		compatible = "ethernet-phy-ieee802.3-c45";
+		reg = <0>;
+	};
+	cp0_nbaset_phy2: ethernet-phy@2 {
+		compatible = "ethernet-phy-ieee802.3-c45";
+		reg = <8>;
+	};
+};
+
+&cp0_ethernet {
+	status = "okay";
+};
+
+/* SLM-1521-V2, CON9 */
+&cp0_eth0 {
+	status = "okay";
+	phy-mode = "2500base-x";
+	phys = <&cp0_comphy2 0>;
+	managed = "in-band-status";
+};
+
+&cp0_eth1 {
+	status = "okay";
+	phy-mode = "2500base-x";
+	phys = <&cp0_comphy4 1>;
+	managed = "in-band-status";
+};
+
+&cp0_eth2 {
+	status = "okay";
+	phy-mode = "2500base-x";
+	phys = <&cp0_comphy5 2>;
+	managed = "in-band-status";
+};
+
+&cp0_gpio1 {
+	status = "okay";
+};
+
+&cp0_gpio2 {
+	status = "okay";
+};
+
+&cp0_i2c0 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&cp0_i2c0_pins>;
+	status = "okay";
+	clock-frequency = <100000>;
+	rtc@32 {
+		compatible = "epson,rx8130";
+		reg = <0x32>;
+		wakeup-source;
+	};
+};
+
+/* SLM-1521-V2, CON6 */
+&cp0_pcie0 {
+	status = "okay";
+	num-lanes = <2>;
+	num-viewport = <8>;
+	phys = <&cp0_comphy0 0>, <&cp0_comphy1 0>;
+};
+
+/* U55 */
+&cp0_spi1 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&cp0_spi0_pins>;
+	reg = <0x700680 0x50>,          /* control */
+	      <0x2000000 0x1000000>;    /* CS0 */
+	status = "okay";
+	spi-flash@0 {
+		#address-cells = <0x1>;
+		#size-cells = <0x1>;
+		compatible = "jedec,spi-nor";
+		reg = <0x0>;
+		spi-max-frequency = <40000000>;
+		partitions {
+			compatible = "fixed-partitions";
+			#address-cells = <1>;
+			#size-cells = <1>;
+			partition@0 {
+				label = "U-Boot";
+				reg = <0x0 0x1f0000>;
+			};
+			partition@1f0000 {
+				label = "U-Boot ENV Factory";
+				reg = <0x1f0000 0x10000>;
+			};
+			partition@200000 {
+				label = "Reserved";
+				reg = <0x200000 0x1f0000>;
+			};
+			partition@3f0000 {
+				label = "U-Boot ENV";
+				reg = <0x3f0000 0x10000>;
+			};
+		};
+	};
+};
+
+&cp0_syscon0 {
+	cp0_pinctrl: pinctrl {
+		compatible = "marvell,cp115-standalone-pinctrl";
+		cp0_i2c0_pins: cp0-i2c-pins-0 {
+			marvell,pins = "mpp37", "mpp38";
+			marvell,function = "i2c0";
+		};
+		cp0_i2c1_pins: cp0-i2c-pins-1 {
+			marvell,pins = "mpp35", "mpp36";
+			marvell,function = "i2c1";
+		};
+		cp0_ge1_rgmii_pins: cp0-ge-rgmii-pins-0 {
+			marvell,pins = "mpp0", "mpp1", "mpp2",
+				       "mpp3", "mpp4", "mpp5",
+				       "mpp6", "mpp7", "mpp8",
+				       "mpp9", "mpp10", "mpp11";
+			marvell,function = "ge0";
+		};
+		cp0_ge2_rgmii_pins: cp0-ge-rgmii-pins-1 {
+			marvell,pins = "mpp44", "mpp45", "mpp46",
+				       "mpp47", "mpp48", "mpp49",
+				       "mpp50", "mpp51", "mpp52",
+				       "mpp53", "mpp54", "mpp55";
+			marvell,function = "ge1";
+		};
+		cp0_spi0_pins: cp0-spi-pins-0 {
+			marvell,pins = "mpp13", "mpp14", "mpp15", "mpp16";
+			marvell,function = "spi1";
+		};
+	};
+};
+
+/*
+ * Instantiate the first connected CP115
+ */
+
+#define CP11X_NAME		cp1
+#define CP11X_BASE		f6000000
+#define CP11X_PCIEx_MEM_BASE(iface) (0xe2000000 + (iface * 0x1000000))
+#define CP11X_PCIEx_MEM_SIZE(iface) 0xf00000
+#define CP11X_PCIE0_BASE	f6600000
+#define CP11X_PCIE1_BASE	f6620000
+#define CP11X_PCIE2_BASE	f6640000
+
+#include "armada-cp115.dtsi"
+
+#undef CP11X_NAME
+#undef CP11X_BASE
+#undef CP11X_PCIEx_MEM_BASE
+#undef CP11X_PCIEx_MEM_SIZE
+#undef CP11X_PCIE0_BASE
+#undef CP11X_PCIE1_BASE
+#undef CP11X_PCIE2_BASE
+
+&cp1_crypto {
+	status = "okay";
+};
+
+&cp1_xmdio {
+	status = "okay";
+	cp1_nbaset_phy0: ethernet-phy@3 {
+		compatible = "ethernet-phy-ieee802.3-c45";
+		reg = <2>;
+	};
+	cp1_nbaset_phy1: ethernet-phy@4 {
+		compatible = "ethernet-phy-ieee802.3-c45";
+		reg = <0>;
+	};
+	cp1_nbaset_phy2: ethernet-phy@5 {
+		compatible = "ethernet-phy-ieee802.3-c45";
+		reg = <8>;
+	};
+};
+
+&cp1_ethernet {
+	status = "okay";
+};
+
+/* CON50 */
+&cp1_eth0 {
+	status = "okay";
+	phy-mode = "2500base-x";
+	phys = <&cp1_comphy2 0>;
+	managed = "in-band-status";
+};
+
+&cp1_eth1 {
+	status = "okay";
+	phy-mode = "2500base-x";
+	phys = <&cp1_comphy4 1>;
+	managed = "in-band-status";
+};
+
+&cp1_eth2 {
+	status = "okay";
+	phy-mode = "2500base-x";
+	phys = <&cp1_comphy5 2>;
+	managed = "in-band-status";
+};
+
+&cp1_sata0 {
+	status = "okay";
+	sata-port@1 {
+		status = "okay";
+		phys = <&cp1_comphy0 1>;
+	};
+};
+
+&cp1_gpio1 {
+	status = "okay";
+};
+
+&cp1_gpio2 {
+	status = "okay";
+};
+
+&cp1_i2c0 {
+	status = "okay";
+	pinctrl-names = "default";
+	pinctrl-0 = <&cp1_i2c0_pins>;
+	clock-frequency = <100000>;
+};
+
+&cp1_syscon0 {
+	cp1_pinctrl: pinctrl {
+		compatible = "marvell,cp115-standalone-pinctrl";
+		cp1_i2c0_pins: cp1-i2c-pins-0 {
+			marvell,pins = "mpp37", "mpp38";
+			marvell,function = "i2c0";
+		};
+		cp1_spi0_pins: cp1-spi-pins-0 {
+			marvell,pins = "mpp13", "mpp14", "mpp15", "mpp16";
+			marvell,function = "spi1";
+		};
+		cp1_xhci0_vbus_pins: cp1-xhci0-vbus-pins {
+			marvell,pins = "mpp3";
+			marvell,function = "gpio";
+		};
+		cp1_sfp_pins: sfp-pins {
+			marvell,pins = "mpp8", "mpp9", "mpp10", "mpp11";
+			marvell,function = "gpio";
+		};
+	};
+};
+
+&cp1_usb3_1 {
+	status = "okay";
+	phys = <&cp1_comphy3 1>;
+	phy-names = "usb";
+};
--- a/target/linux/mvebu/files/arch/arm64/boot/dts/marvell/cn9132-puzzle-m902.dts
+++ b/target/linux/mvebu/files/arch/arm64/boot/dts/marvell/cn9132-puzzle-m902.dts
@ -0,0 +1,481 @@
+// SPDX-License-Identifier: (GPL-2.0-or-later OR MIT)
+/*
+ * Copyright (C) 2019 Marvell International Ltd.
+ *
+ * Device tree for the CN9132-DB board.
+ */
+
+#include "cn9130.dtsi"
+
+#include <dt-bindings/gpio/gpio.h>
+
+/ {
+	model = "iEi Puzzle-M902";
+	compatible = "iei,puzzle-m902",
+		     "marvell,armada-ap807-quad", "marvell,armada-ap807";
+
+	chosen {
+		stdout-path = "serial0:115200n8";
+	};
+
+	aliases {
+		i2c0 = &cp1_i2c0;
+		i2c1 = &cp0_i2c0;
+		gpio1 = &cp0_gpio1;
+		gpio2 = &cp0_gpio2;
+		gpio3 = &cp1_gpio1;
+		gpio4 = &cp1_gpio2;
+		gpio5 = &cp2_gpio1;
+		gpio6 = &cp2_gpio2;
+		ethernet0 = &cp0_eth0;
+		ethernet1 = &cp0_eth1;
+		ethernet2 = &cp0_eth2;
+		ethernet3 = &cp1_eth0;
+		ethernet4 = &cp1_eth1;
+		ethernet5 = &cp1_eth2;
+		ethernet6 = &cp2_eth0;
+		ethernet7 = &cp2_eth1;
+		ethernet8 = &cp2_eth2;
+		spi1 = &cp0_spi0;
+		spi2 = &cp0_spi1;
+		serial1 = &cp0_uart0;
+	};
+
+	memory@00000000 {
+		device_type = "memory";
+		reg = <0x0 0x0 0x0 0x80000000>;
+	};
+
+	cp2_reg_usb3_vbus0: cp2_usb3_vbus@0 {
+		compatible = "regulator-fixed";
+		regulator-name = "cp2-xhci0-vbus";
+		regulator-min-microvolt = <5000000>;
+		regulator-max-microvolt = <5000000>;
+		enable-active-high;
+		gpio = <&cp2_gpio1 2 GPIO_ACTIVE_HIGH>;
+	};
+
+	cp2_usb3_0_phy0: cp2_usb3_phy0 {
+		compatible = "usb-nop-xceiv";
+		vcc-supply = <&cp2_reg_usb3_vbus0>;
+	};
+
+	cp2_reg_usb3_vbus1: cp2_usb3_vbus@1 {
+		compatible = "regulator-fixed";
+		regulator-name = "cp2-xhci1-vbus";
+		regulator-min-microvolt = <5000000>;
+		regulator-max-microvolt = <5000000>;
+		enable-active-high;
+		gpio = <&cp2_gpio1 3 GPIO_ACTIVE_HIGH>;
+	};
+
+	cp2_usb3_0_phy1: cp2_usb3_phy1 {
+		compatible = "usb-nop-xceiv";
+		vcc-supply = <&cp2_reg_usb3_vbus1>;
+	};
+
+	cp2_sfp_eth0: sfp-eth0 {
+		compatible = "sff,sfp";
+		i2c-bus = <&cp2_sfpp0_i2c>;
+		los-gpio = <&cp2_module_expander1 11 GPIO_ACTIVE_HIGH>;
+		mod-def0-gpio = <&cp2_module_expander1 10 GPIO_ACTIVE_LOW>;
+		tx-disable-gpio = <&cp2_module_expander1 9 GPIO_ACTIVE_HIGH>;
+		tx-fault-gpio = <&cp2_module_expander1 8 GPIO_ACTIVE_HIGH>;
+		status = "disabled";
+	};
+};
+
+&uart0 {
+	status = "okay";
+};
+
+&cp0_uart0 {
+	status = "okay";
+};
+
+/* on-board eMMC - U9 */
+&ap_sdhci0 {
+	pinctrl-names = "default";
+	bus-width = <8>;
+	status = "okay";
+	mmc-ddr-1_8v;
+	mmc-hs400-1_8v;
+};
+
+&cp0_crypto {
+	status = "okay";
+};
+
+&cp0_xmdio {
+	status = "okay";
+	cp0_nbaset_phy0: ethernet-phy@0 {
+		compatible = "ethernet-phy-ieee802.3-c45";
+		reg = <2>;
+	};
+	cp0_nbaset_phy1: ethernet-phy@1 {
+		compatible = "ethernet-phy-ieee802.3-c45";
+		reg = <0>;
+	};
+	cp0_nbaset_phy2: ethernet-phy@2 {
+		compatible = "ethernet-phy-ieee802.3-c45";
+		reg = <8>;
+	};
+};
+
+&cp0_ethernet {
+	status = "okay";
+};
+
+/* SLM-1521-V2, CON9 */
+&cp0_eth0 {
+	status = "okay";
+	phy-mode = "10gbase-kr";
+	phys = <&cp0_comphy2 0>;
+	managed = "in-band-status";
+};
+
+&cp0_eth1 {
+	status = "okay";
+	phy-mode = "2500base-x";
+	phys = <&cp0_comphy4 1>;
+	managed = "in-band-status";
+};
+
+&cp0_eth2 {
+	status = "okay";
+	phy-mode = "2500base-x";
+	phys = <&cp0_comphy1 2>;
+	managed = "in-band-status";
+};
+
+&cp0_gpio1 {
+	status = "okay";
+};
+
+&cp0_gpio2 {
+	status = "okay";
+};
+
+&cp0_i2c0 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&cp0_i2c0_pins>;
+	status = "okay";
+	clock-frequency = <100000>;
+	rtc@32 {
+		compatible = "epson,rx8130";
+		reg = <0x32>;
+		wakeup-source;
+	};
+};
+
+&cp0_i2c1 {
+	clock-frequency = <100000>;
+};
+
+/* SLM-1521-V2, CON6 */
+&cp0_sata0 {
+	status = "okay";
+	sata-port@1 {
+		status = "okay";
+		phys = <&cp0_comphy0 1>;
+	};
+};
+
+&cp0_pcie2 {
+	status = "okay";
+	num-lanes = <1>;
+	num-viewport = <8>;
+	phys = <&cp0_comphy5 2>;
+};
+
+/* U55 */
+&cp0_spi1 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&cp0_spi0_pins>;
+	reg = <0x700680 0x50>,          /* control */
+	      <0x2000000 0x1000000>;    /* CS0 */
+	status = "okay";
+	spi-flash@0 {
+		#address-cells = <0x1>;
+		#size-cells = <0x1>;
+		compatible = "jedec,spi-nor";
+		reg = <0x0>;
+		spi-max-frequency = <40000000>;
+		partitions {
+			compatible = "fixed-partitions";
+			#address-cells = <1>;
+			#size-cells = <1>;
+			partition@0 {
+				label = "U-Boot";
+				reg = <0x0 0x1f0000>;
+			};
+			partition@1f0000 {
+				label = "U-Boot ENV Factory";
+				reg = <0x1f0000 0x10000>;
+			};
+			partition@200000 {
+				label = "Reserved";
+				reg = <0x200000 0x1f0000>;
+			};
+			partition@3f0000 {
+				label = "U-Boot ENV";
+				reg = <0x3f0000 0x10000>;
+			};
+		};
+	};
+};
+
+&cp0_syscon0 {
+	cp0_pinctrl: pinctrl {
+		compatible = "marvell,cp115-standalone-pinctrl";
+		cp0_i2c0_pins: cp0-i2c-pins-0 {
+			marvell,pins = "mpp37", "mpp38";
+			marvell,function = "i2c0";
+		};
+		cp0_i2c1_pins: cp0-i2c-pins-1 {
+			marvell,pins = "mpp35", "mpp36";
+			marvell,function = "i2c1";
+		};
+		cp0_ge1_rgmii_pins: cp0-ge-rgmii-pins-0 {
+			marvell,pins = "mpp0", "mpp1", "mpp2",
+				       "mpp3", "mpp4", "mpp5",
+				       "mpp6", "mpp7", "mpp8",
+				       "mpp9", "mpp10", "mpp11";
+			marvell,function = "ge0";
+		};
+		cp0_ge2_rgmii_pins: cp0-ge-rgmii-pins-1 {
+			marvell,pins = "mpp44", "mpp45", "mpp46",
+				       "mpp47", "mpp48", "mpp49",
+				       "mpp50", "mpp51", "mpp52",
+				       "mpp53", "mpp54", "mpp55";
+			marvell,function = "ge1";
+		};
+		cp0_spi0_pins: cp0-spi-pins-0 {
+			marvell,pins = "mpp13", "mpp14", "mpp15", "mpp16";
+			marvell,function = "spi1";
+		};
+	};
+};
+
+&cp0_usb3_1 {
+	status = "okay";
+	phys = <&cp0_comphy3 1>;
+	phy-names = "usb";
+};
+
+/*
+ * Instantiate the first connected CP115
+ */
+
+#define CP11X_NAME		cp1
+#define CP11X_BASE		f4000000
+#define CP11X_PCIEx_MEM_BASE(iface) (0xe2000000 + (iface * 0x1000000))
+#define CP11X_PCIEx_MEM_SIZE(iface) 0xf00000
+#define CP11X_PCIE0_BASE	f4600000
+#define CP11X_PCIE1_BASE	f4620000
+#define CP11X_PCIE2_BASE	f4640000
+
+#include "armada-cp115.dtsi"
+
+#undef CP11X_NAME
+#undef CP11X_BASE
+#undef CP11X_PCIEx_MEM_BASE
+#undef CP11X_PCIEx_MEM_SIZE
+#undef CP11X_PCIE0_BASE
+#undef CP11X_PCIE1_BASE
+#undef CP11X_PCIE2_BASE
+
+&cp1_crypto {
+	status = "okay";
+};
+
+&cp1_xmdio {
+	status = "okay";
+	cp1_nbaset_phy0: ethernet-phy@3 {
+		compatible = "ethernet-phy-ieee802.3-c45";
+		reg = <2>;
+	};
+	cp1_nbaset_phy1: ethernet-phy@4 {
+		compatible = "ethernet-phy-ieee802.3-c45";
+		reg = <0>;
+	};
+	cp1_nbaset_phy2: ethernet-phy@5 {
+		compatible = "ethernet-phy-ieee802.3-c45";
+		reg = <8>;
+	};
+};
+
+&cp1_ethernet {
+	status = "okay";
+};
+
+/* CON50 */
+&cp1_eth0 {
+	status = "okay";
+	phy-mode = "10gbase-kr";
+	phys = <&cp1_comphy2 0>;
+	managed = "in-band-status";
+};
+
+&cp1_eth1 {
+	status = "okay";
+	phy-mode = "2500base-x";
+	phys = <&cp1_comphy4 1>;
+	managed = "in-band-status";
+};
+
+&cp1_eth2 {
+	status = "okay";
+	phy-mode = "2500base-x";
+	phys = <&cp1_comphy1 2>;
+	managed = "in-band-status";
+};
+
+&cp1_gpio1 {
+	status = "okay";
+};
+
+&cp1_gpio2 {
+	status = "okay";
+};
+
+&cp1_i2c0 {
+	status = "okay";
+	pinctrl-names = "default";
+	pinctrl-0 = <&cp1_i2c0_pins>;
+	clock-frequency = <100000>;
+};
+
+&cp1_syscon0 {
+	cp1_pinctrl: pinctrl {
+		compatible = "marvell,cp115-standalone-pinctrl";
+		cp1_i2c0_pins: cp1-i2c-pins-0 {
+			marvell,pins = "mpp37", "mpp38";
+			marvell,function = "i2c0";
+		};
+		cp1_spi0_pins: cp1-spi-pins-0 {
+			marvell,pins = "mpp13", "mpp14", "mpp15", "mpp16";
+			marvell,function = "spi1";
+		};
+		cp1_xhci0_vbus_pins: cp1-xhci0-vbus-pins {
+			marvell,pins = "mpp3";
+			marvell,function = "gpio";
+		};
+	};
+};
+
+/*
+ * Instantiate the second connected CP115
+ */
+
+#define CP11X_NAME		cp2
+#define CP11X_BASE		f6000000
+#define CP11X_PCIEx_MEM_BASE(iface) (0xe5000000 + (iface * 0x1000000))
+#define CP11X_PCIEx_MEM_SIZE(iface) 0xf00000
+#define CP11X_PCIE0_BASE	f6600000
+#define CP11X_PCIE1_BASE	f6620000
+#define CP11X_PCIE2_BASE	f6640000
+
+#include "armada-cp115.dtsi"
+
+#undef CP11X_NAME
+#undef CP11X_BASE
+#undef CP11X_PCIEx_MEM_BASE
+#undef CP11X_PCIEx_MEM_SIZE
+#undef CP11X_PCIE0_BASE
+#undef CP11X_PCIE1_BASE
+#undef CP11X_PCIE2_BASE
+
+&cp2_crypto {
+	status = "okay";
+};
+
+&cp2_ethernet {
+	status = "okay";
+};
+
+&cp2_xmdio {
+	status = "okay";
+	cp2_nbaset_phy0: ethernet-phy@6 {
+		compatible = "ethernet-phy-ieee802.3-c45";
+		reg = <2>;
+	};
+	cp2_nbaset_phy1: ethernet-phy@7 {
+		compatible = "ethernet-phy-ieee802.3-c45";
+		reg = <0>;
+	};
+	cp2_nbaset_phy2: ethernet-phy@8 {
+		compatible = "ethernet-phy-ieee802.3-c45";
+		reg = <8>;
+	};
+};
+
+/* SLM-1521-V2, CON9 */
+&cp2_eth0 {
+	status = "okay";
+	phy-mode = "10gbase-kr";
+	phys = <&cp2_comphy2 0>;
+	managed = "in-band-status";
+};
+
+&cp2_eth1 {
+	status = "okay";
+	phy-mode = "2500base-x";
+	phys = <&cp2_comphy4 1>;
+	managed = "in-band-status";
+};
+
+&cp2_eth2 {
+	status = "okay";
+	phy-mode = "2500base-x";
+	phys = <&cp2_comphy1 2>;
+	managed = "in-band-status";
+};
+
+&cp2_gpio1 {
+	status = "okay";
+};
+
+&cp2_gpio2 {
+	status = "okay";
+};
+
+&cp2_i2c0 {
+	clock-frequency = <100000>;
+	/* SLM-1521-V2 - U3 */
+	i2c-mux@72 {
+		compatible = "nxp,pca9544";
+		#address-cells = <1>;
+		#size-cells = <0>;
+		reg = <0x72>;
+		cp2_sfpp0_i2c: i2c@0 {
+			#address-cells = <1>;
+			#size-cells = <0>;
+			reg = <0>;
+		};
+
+		i2c@1 {
+			#address-cells = <1>;
+			#size-cells = <0>;
+			reg = <1>;
+			/* U12 */
+			cp2_module_expander1: pca9555@21 {
+				compatible = "nxp,pca9555";
+				pinctrl-names = "default";
+				gpio-controller;
+				#gpio-cells = <2>;
+				reg = <0x21>;
+			};
+		};
+	};
+};
+
+&cp2_syscon0 {
+	cp2_pinctrl: pinctrl {
+		compatible = "marvell,cp115-standalone-pinctrl";
+		cp2_i2c0_pins: cp2-i2c-pins-0 {
+			marvell,pins = "mpp37", "mpp38";
+			marvell,function = "i2c0";
+		};
+	};
+};
--- a/target/linux/mvebu/image/cortexa72.mk
+++ b/target/linux/mvebu/image/cortexa72.mk
@ -43,3 +43,21 @@ define Device/marvell_macchiatobin-singleshot
  SUPPORTED_DEVICES := marvell,armada8040-mcbin-singleshot
 endef
 TARGET_DEVICES += marvell_macchiatobin-singleshot
+
+define Device/iei_puzzle-m901
+  $(call Device/Default-arm64)
+  DEVICE_VENDOR := iEi
+  DEVICE_MODEL := Puzzle-M901
+  SOC := cn9131
+  IMAGE/sdcard.img.gz := boot-img-ext4 | sdcard-img-ext4 | gzip | append-metadata
+endef
+TARGET_DEVICES += iei_puzzle-m901
+
+define Device/iei_puzzle-m902
+  $(call Device/Default-arm64)
+  DEVICE_VENDOR := iEi
+  DEVICE_MODEL := Puzzle-M902
+  SOC := cn9132
+  IMAGE/sdcard.img.gz := boot-img-ext4 | sdcard-img-ext4 | gzip | append-metadata
+endef
+TARGET_DEVICES += iei_puzzle-m902
--- a/target/linux/mvebu/patches-5.4/000-v5.5-arm64-dts-marvell-Add-support-for-Marvell-CN9130-SoC.patch
+++ b/target/linux/mvebu/patches-5.4/000-v5.5-arm64-dts-marvell-Add-support-for-Marvell-CN9130-SoC.patch
@ -0,0 +1,55 @@
+From 6b8970bd8d7a17a648e31f3996d9b21336b4a2cf Mon Sep 17 00:00:00 2001
+From: Miquel Raynal <miquel.raynal@bootlin.com>
+Date: Fri, 4 Oct 2019 16:27:35 +0200
+Subject: [PATCH] arm64: dts: marvell: Add support for Marvell CN9130 SoC
+ support
+
+A CN9130 SoC has one AP807 and one internal CP115.
+
+Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
+Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
+---
+ arch/arm64/boot/dts/marvell/cn9130.dtsi | 37 +++++++++++++++++++++++++
+ 1 file changed, 37 insertions(+)
+ create mode 100644 arch/arm64/boot/dts/marvell/cn9130.dtsi
+
+--- /dev/null
+++ b/arch/arm64/boot/dts/marvell/cn9130.dtsi
+@@ -0,0 +1,37 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (C) 2019 Marvell International Ltd.
+ *
+ * Device tree for the CN9130 SoC.
+ */
+
+#include "armada-ap807-quad.dtsi"
+
+/ {
+	model = "Marvell Armada CN9130 SoC";
+	compatible = "marvell,cn9130", "marvell,armada-ap807-quad",
+		     "marvell,armada-ap807";
+};
+
+/*
+ * Instantiate the internal CP115
+ */
+
+#define CP11X_NAME		cp0
+#define CP11X_BASE		f2000000
+#define CP11X_PCIEx_MEM_BASE(iface) ((iface == 0) ? 0xc0000000 : \
+						    0xe0000000 + ((iface - 1) * 0x1000000))
+#define CP11X_PCIEx_MEM_SIZE(iface) ((iface == 0) ? 0x1ff00000 : 0xf00000)
+#define CP11X_PCIE0_BASE	f2600000
+#define CP11X_PCIE1_BASE	f2620000
+#define CP11X_PCIE2_BASE	f2640000
+
+#include "armada-cp115.dtsi"
+
+#undef CP11X_NAME
+#undef CP11X_BASE
+#undef CP11X_PCIEx_MEM_BASE
+#undef CP11X_PCIEx_MEM_SIZE
+#undef CP11X_PCIE0_BASE
+#undef CP11X_PCIE1_BASE
+#undef CP11X_PCIE2_BASE
--- a/target/linux/mvebu/patches-5.4/001-v5.5-arm64-dts-marvell-Add-support-for-CP115.patch
+++ b/target/linux/mvebu/patches-5.4/001-v5.5-arm64-dts-marvell-Add-support-for-CP115.patch
@ -0,0 +1,30 @@
+From 96bb4b31aa660e39fca2bb464b9a9f399bd5b71c Mon Sep 17 00:00:00 2001
+From: Miquel Raynal <miquel.raynal@bootlin.com>
+Date: Fri, 4 Oct 2019 16:27:32 +0200
+Subject: [PATCH] arm64: dts: marvell: Add support for CP115
+
+Create a DTSI file based on the CP11x one. Differences will be
+described in the near future.
+
+Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
+Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
+---
+ arch/arm64/boot/dts/marvell/armada-cp115.dtsi | 12 ++++++++++++
+ 1 file changed, 12 insertions(+)
+ create mode 100644 arch/arm64/boot/dts/marvell/armada-cp115.dtsi
+
+--- /dev/null
+++ b/arch/arm64/boot/dts/marvell/armada-cp115.dtsi
+@@ -0,0 +1,12 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (C) 2019 Marvell Technology Group Ltd.
+ *
+ * Device Tree file for Marvell Armada CP115.
+ */
+
+#define CP11X_TYPE cp115
+
+#include "armada-cp11x.dtsi"
+
+#undef CP11X_TYPE
--- a/target/linux/mvebu/patches-5.4/002-v5.5-arm64-dts-marvell-Prepare-the-introduction-of-CP115.patch
+++ b/target/linux/mvebu/patches-5.4/002-v5.5-arm64-dts-marvell-Prepare-the-introduction-of-CP115.patch
--- a/target/linux/mvebu/patches-5.4/003-v5.5-arm64-dts-marvell-Add-support-for-AP807-AP807-quad.patch
+++ b/target/linux/mvebu/patches-5.4/003-v5.5-arm64-dts-marvell-Add-support-for-AP807-AP807-quad.patch
@ -0,0 +1,102 @@
+From cbafcad0641e99831ff7c57ac8f79aed502f33e5 Mon Sep 17 00:00:00 2001
+From: Miquel Raynal <miquel.raynal@bootlin.com>
+Date: Fri, 4 Oct 2019 16:27:24 +0200
+Subject: [PATCH] arm64: dts: marvell: Add support for AP807/AP807-quad
+
+Describe AP807 and AP807-quad support.
+
+Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
+Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
+---
+ .../boot/dts/marvell/armada-ap807-quad.dtsi   | 51 +++++++++++++++++++
+ arch/arm64/boot/dts/marvell/armada-ap807.dtsi | 29 +++++++++++
+ 2 files changed, 80 insertions(+)
+ create mode 100644 arch/arm64/boot/dts/marvell/armada-ap807-quad.dtsi
+ create mode 100644 arch/arm64/boot/dts/marvell/armada-ap807.dtsi
+
+--- /dev/null
+++ b/arch/arm64/boot/dts/marvell/armada-ap807-quad.dtsi
+@@ -0,0 +1,51 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Device Tree file for Marvell Armada AP807 Quad
+ *
+ * Copyright (C) 2019 Marvell Technology Group Ltd.
+ */
+
+#include "armada-ap807.dtsi"
+
+/ {
+	model = "Marvell Armada AP807 Quad";
+	compatible = "marvell,armada-ap807-quad", "marvell,armada-ap807";
+
+	cpus {
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		cpu0: cpu@0 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a72", "arm,armv8";
+			reg = <0x000>;
+			enable-method = "psci";
+			#cooling-cells = <2>;
+			clocks = <&cpu_clk 0>;
+		};
+		cpu1: cpu@1 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a72", "arm,armv8";
+			reg = <0x001>;
+			enable-method = "psci";
+			#cooling-cells = <2>;
+			clocks = <&cpu_clk 0>;
+		};
+		cpu2: cpu@100 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a72", "arm,armv8";
+			reg = <0x100>;
+			enable-method = "psci";
+			#cooling-cells = <2>;
+			clocks = <&cpu_clk 1>;
+		};
+		cpu3: cpu@101 {
+			device_type = "cpu";
+			compatible = "arm,cortex-a72", "arm,armv8";
+			reg = <0x101>;
+			enable-method = "psci";
+			#cooling-cells = <2>;
+			clocks = <&cpu_clk 1>;
+		};
+	};
+};
+--- /dev/null
+++ b/arch/arm64/boot/dts/marvell/armada-ap807.dtsi
+@@ -0,0 +1,29 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Device Tree file for Marvell Armada AP807
+ *
+ * Copyright (C) 2019 Marvell Technology Group Ltd.
+ */
+
+#define AP_NAME		ap807
+#include "armada-ap80x.dtsi"
+
+/ {
+	model = "Marvell Armada AP807";
+	compatible = "marvell,armada-ap807";
+};
+
+&ap_syscon0 {
+	ap_clk: clock {
+		compatible = "marvell,ap807-clock";
+		#clock-cells = <1>;
+	};
+};
+
+&ap_syscon1 {
+	cpu_clk: clock-cpu {
+		compatible = "marvell,ap807-cpu-clock";
+		clocks = <&ap_clk 0>, <&ap_clk 1>;
+		#clock-cells = <1>;
+	};
+};
--- a/target/linux/mvebu/patches-5.4/004-v5.5-arm64-dts-marvell-Add-AP807-quad-cache-description.patch
+++ b/target/linux/mvebu/patches-5.4/004-v5.5-arm64-dts-marvell-Add-AP807-quad-cache-description.patch
@ -0,0 +1,87 @@
+From 30d53abdc60a6515f02f181e7c39b7b23d5fb3aa Mon Sep 17 00:00:00 2001
+From: Grzegorz Jaszczyk <jaz@semihalf.com>
+Date: Fri, 4 Oct 2019 16:27:27 +0200
+Subject: [PATCH] arm64: dts: marvell: Add AP807-quad cache description
+
+Adding appropriate entries to device-tree allows the cache description
+to show up in sysfs under: /sys/devices/system/cpu/cpuX/cache/.
+
+Signed-off-by: Grzegorz Jaszczyk <jaz@semihalf.com>
+Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
+Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
+---
+ .../boot/dts/marvell/armada-ap807-quad.dtsi   | 42 +++++++++++++++++++
+ 1 file changed, 42 insertions(+)
+
+--- a/arch/arm64/boot/dts/marvell/armada-ap807-quad.dtsi
+++ b/arch/arm64/boot/dts/marvell/armada-ap807-quad.dtsi
+@@ -22,6 +22,13 @@
+ 			enable-method = "psci";
+ 			#cooling-cells = <2>;
+ 			clocks = <&cpu_clk 0>;
+			i-cache-size = <0xc000>;
+			i-cache-line-size = <64>;
+			i-cache-sets = <256>;
+			d-cache-size = <0x8000>;
+			d-cache-line-size = <64>;
+			d-cache-sets = <256>;
+			next-level-cache = <&l2_0>;
+ 		};
+ 		cpu1: cpu@1 {
+ 			device_type = "cpu";
+@@ -30,6 +37,13 @@
+ 			enable-method = "psci";
+ 			#cooling-cells = <2>;
+ 			clocks = <&cpu_clk 0>;
+			i-cache-size = <0xc000>;
+			i-cache-line-size = <64>;
+			i-cache-sets = <256>;
+			d-cache-size = <0x8000>;
+			d-cache-line-size = <64>;
+			d-cache-sets = <256>;
+			next-level-cache = <&l2_0>;
+ 		};
+ 		cpu2: cpu@100 {
+ 			device_type = "cpu";
+@@ -38,6 +52,13 @@
+ 			enable-method = "psci";
+ 			#cooling-cells = <2>;
+ 			clocks = <&cpu_clk 1>;
+			i-cache-size = <0xc000>;
+			i-cache-line-size = <64>;
+			i-cache-sets = <256>;
+			d-cache-size = <0x8000>;
+			d-cache-line-size = <64>;
+			d-cache-sets = <256>;
+			next-level-cache = <&l2_1>;
+ 		};
+ 		cpu3: cpu@101 {
+ 			device_type = "cpu";
+@@ -46,6 +67,27 @@
+ 			enable-method = "psci";
+ 			#cooling-cells = <2>;
+ 			clocks = <&cpu_clk 1>;
+			i-cache-size = <0xc000>;
+			i-cache-line-size = <64>;
+			i-cache-sets = <256>;
+			d-cache-size = <0x8000>;
+			d-cache-line-size = <64>;
+			d-cache-sets = <256>;
+			next-level-cache = <&l2_1>;
+		};
+
+		l2_0: l2-cache0 {
+			compatible = "cache";
+			cache-size = <0x80000>;
+			cache-line-size = <64>;
+			cache-sets = <512>;
+		};
+
+		l2_1: l2-cache1 {
+			compatible = "cache";
+			cache-size = <0x80000>;
+			cache-line-size = <64>;
+			cache-sets = <512>;
+ 		};
+ 	};
+ };
--- a/target/linux/mvebu/patches-5.4/005-v5.5-arm64-dts-marvell-Drop-PCIe-I-O-ranges-from-CP11x-fi.patch
+++ b/target/linux/mvebu/patches-5.4/005-v5.5-arm64-dts-marvell-Drop-PCIe-I-O-ranges-from-CP11x-fi.patch
@ -0,0 +1,135 @@
+From 1399672e48b573f6526b9ac78cfd50314f0b01a6 Mon Sep 17 00:00:00 2001
+From: Miquel Raynal <miquel.raynal@bootlin.com>
+Date: Fri, 4 Oct 2019 16:27:30 +0200
+Subject: [PATCH] arm64: dts: marvell: Drop PCIe I/O ranges from CP11x file
+
+As an example, Armada 70x0 and 80x0 SoC 0xf9000000 region points to
+RUNIT/SPICS0 while it is referenced in the DT as PCIe I/O memory
+range. This shows that I/O memory has never been used/working on the
+old SoCs despite the region being advertised. As PCIe I/O ranges will
+not be supported in newer SoCs using CP11x co-processors, let's
+simply drop them. It is not harmful in any case as PCIe device drivers
+can do it all with the regular mapped memory anyway.
+
+Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
+Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
+---
+ arch/arm64/boot/dts/marvell/armada-70x0.dtsi     |  2 --
+ .../boot/dts/marvell/armada-8040-mcbin.dtsi      |  3 +--
+ arch/arm64/boot/dts/marvell/armada-80x0.dtsi     |  4 ----
+ arch/arm64/boot/dts/marvell/armada-cp11x.dtsi    | 16 +++-------------
+ 4 files changed, 4 insertions(+), 21 deletions(-)
+
+--- a/arch/arm64/boot/dts/marvell/armada-70x0.dtsi
+++ b/arch/arm64/boot/dts/marvell/armada-70x0.dtsi
+@@ -19,7 +19,6 @@
+  */
+ #define CP11X_NAME		cp0
+ #define CP11X_BASE		f2000000
+-#define CP11X_PCIE_IO_BASE	0xf9000000
+ #define CP11X_PCIE_MEM_BASE	0xf6000000
+ #define CP11X_PCIE0_BASE	f2600000
+ #define CP11X_PCIE1_BASE	f2620000
+@@ -29,7 +28,6 @@
+ 
+ #undef CP11X_NAME
+ #undef CP11X_BASE
+-#undef CP11X_PCIE_IO_BASE
+ #undef CP11X_PCIE_MEM_BASE
+ #undef CP11X_PCIE0_BASE
+ #undef CP11X_PCIE1_BASE
+--- a/arch/arm64/boot/dts/marvell/armada-8040-mcbin.dtsi
+++ b/arch/arm64/boot/dts/marvell/armada-8040-mcbin.dtsi
+@@ -179,8 +179,7 @@
+ 	num-lanes = <4>;
+ 	num-viewport = <8>;
+ 	reset-gpios = <&cp0_gpio2 20 GPIO_ACTIVE_LOW>;
+-	ranges = <0x81000000 0x0 0xf9010000 0x0 0xf9010000 0x0 0x10000
+-		  0x82000000 0x0 0xc0000000 0x0 0xc0000000 0x0 0x20000000>;
+	ranges = <0x82000000 0x0 0xc0000000 0x0 0xc0000000 0x0 0x20000000>;
+ 	phys = <&cp0_comphy0 0>, <&cp0_comphy1 0>,
+ 	       <&cp0_comphy2 0>, <&cp0_comphy3 0>;
+ 	phy-names = "cp0-pcie0-x4-lane0-phy", "cp0-pcie0-x4-lane1-phy",
+--- a/arch/arm64/boot/dts/marvell/armada-80x0.dtsi
+++ b/arch/arm64/boot/dts/marvell/armada-80x0.dtsi
+@@ -21,7 +21,6 @@
+  */
+ #define CP11X_NAME		cp0
+ #define CP11X_BASE		f2000000
+-#define CP11X_PCIE_IO_BASE	0xf9000000
+ #define CP11X_PCIE_MEM_BASE	0xf6000000
+ #define CP11X_PCIE0_BASE	f2600000
+ #define CP11X_PCIE1_BASE	f2620000
+@@ -31,7 +30,6 @@
+ 
+ #undef CP11X_NAME
+ #undef CP11X_BASE
+-#undef CP11X_PCIE_IO_BASE
+ #undef CP11X_PCIE_MEM_BASE
+ #undef CP11X_PCIE0_BASE
+ #undef CP11X_PCIE1_BASE
+@@ -42,7 +40,6 @@
+  */
+ #define CP11X_NAME		cp1
+ #define CP11X_BASE		f4000000
+-#define CP11X_PCIE_IO_BASE	0xfd000000
+ #define CP11X_PCIE_MEM_BASE	0xfa000000
+ #define CP11X_PCIE0_BASE	f4600000
+ #define CP11X_PCIE1_BASE	f4620000
+@@ -52,7 +49,6 @@
+ 
+ #undef CP11X_NAME
+ #undef CP11X_BASE
+-#undef CP11X_PCIE_IO_BASE
+ #undef CP11X_PCIE_MEM_BASE
+ #undef CP11X_PCIE0_BASE
+ #undef CP11X_PCIE1_BASE
+--- a/arch/arm64/boot/dts/marvell/armada-cp11x.dtsi
+++ b/arch/arm64/boot/dts/marvell/armada-cp11x.dtsi
+@@ -10,7 +10,6 @@
+ 
+ #include "armada-common.dtsi"
+ 
+-#define CP11X_PCIEx_IO_BASE(iface)	(CP11X_PCIE_IO_BASE + (iface *  0x10000))
+ #define CP11X_PCIEx_MEM_BASE(iface)	(CP11X_PCIE_MEM_BASE + (iface *  0x1000000))
+ #define CP11X_PCIEx_CONF_BASE(iface)	(CP11X_PCIEx_MEM_BASE(iface) + 0xf00000)
+ 
+@@ -507,11 +506,8 @@
+ 		msi-parent = <&gic_v2m0>;
+ 
+ 		bus-range = <0 0xff>;
+-		ranges =
+-		/* downstream I/O */
+-		<0x81000000 0 CP11X_PCIEx_IO_BASE(0) 0  CP11X_PCIEx_IO_BASE(0) 0 0x10000
+ 		/* non-prefetchable memory */
+-		0x82000000 0 CP11X_PCIEx_MEM_BASE(0) 0  CP11X_PCIEx_MEM_BASE(0) 0 0xf00000>;
+		ranges = <0x82000000 0 CP11X_PCIEx_MEM_BASE(0) 0  CP11X_PCIEx_MEM_BASE(0) 0 0xf00000>;
+ 		interrupt-map-mask = <0 0 0 0>;
+ 		interrupt-map = <0 0 0 0 &CP11X_LABEL(icu_nsr) 22 IRQ_TYPE_LEVEL_HIGH>;
+ 		interrupts = <22 IRQ_TYPE_LEVEL_HIGH>;
+@@ -534,11 +530,8 @@
+ 		msi-parent = <&gic_v2m0>;
+ 
+ 		bus-range = <0 0xff>;
+-		ranges =
+-		/* downstream I/O */
+-		<0x81000000 0 CP11X_PCIEx_IO_BASE(1) 0  CP11X_PCIEx_IO_BASE(1) 0 0x10000
+ 		/* non-prefetchable memory */
+-		0x82000000 0 CP11X_PCIEx_MEM_BASE(1) 0  CP11X_PCIEx_MEM_BASE(1) 0 0xf00000>;
+		ranges = <0x82000000 0 CP11X_PCIEx_MEM_BASE(1) 0  CP11X_PCIEx_MEM_BASE(1) 0 0xf00000>;
+ 		interrupt-map-mask = <0 0 0 0>;
+ 		interrupt-map = <0 0 0 0 &CP11X_LABEL(icu_nsr) 24 IRQ_TYPE_LEVEL_HIGH>;
+ 		interrupts = <24 IRQ_TYPE_LEVEL_HIGH>;
+@@ -562,11 +555,8 @@
+ 		msi-parent = <&gic_v2m0>;
+ 
+ 		bus-range = <0 0xff>;
+-		ranges =
+-		/* downstream I/O */
+-		<0x81000000 0 CP11X_PCIEx_IO_BASE(2) 0  CP11X_PCIEx_IO_BASE(2) 0 0x10000
+ 		/* non-prefetchable memory */
+-		0x82000000 0 CP11X_PCIEx_MEM_BASE(2) 0  CP11X_PCIEx_MEM_BASE(2) 0 0xf00000>;
+		ranges = <0x82000000 0 CP11X_PCIEx_MEM_BASE(2) 0  CP11X_PCIEx_MEM_BASE(2) 0 0xf00000>;
+ 		interrupt-map-mask = <0 0 0 0>;
+ 		interrupt-map = <0 0 0 0 &CP11X_LABEL(icu_nsr) 23 IRQ_TYPE_LEVEL_HIGH>;
+ 		interrupts = <23 IRQ_TYPE_LEVEL_HIGH>;
--- a/target/linux/mvebu/patches-5.4/006-v5.5-arm64-dts-marvell-Externalize-PCIe-macros-from-CP11x.patch
+++ b/target/linux/mvebu/patches-5.4/006-v5.5-arm64-dts-marvell-Externalize-PCIe-macros-from-CP11x.patch
@ -0,0 +1,129 @@
+From 5f07b26e85dc86f017833ea745ff4e5b420280cd Mon Sep 17 00:00:00 2001
+From: Miquel Raynal <miquel.raynal@bootlin.com>
+Date: Fri, 4 Oct 2019 16:27:31 +0200
+Subject: [PATCH] arm64: dts: marvell: Externalize PCIe macros from CP11x file
+
+PCIe macros are specific to CP110 and will not fit CP115
+constraints. To keep the same way the files are organized, just move
+some macros out of the CP11x generic file and define them directly in
+SoC DTSI, instead of defining single addresses in the SoC DTSI and
+reusing them in macros.
+
+In the end:
+* CP11X_PCIE_MEM_BASE SoC define is dropped
+* CP11X_PCIEx_MEM_BASE is moved out of the generic DT to be put in the
+  SoC files as it replaces the above definition.
+* As the CP11X_PCIEx_MEM_SIZE macro is also subject to change with
+  newer SoCs, we put it in the SoC files as well.
+
+Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
+Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
+---
+ arch/arm64/boot/dts/marvell/armada-70x0.dtsi  |  6 ++++--
+ arch/arm64/boot/dts/marvell/armada-80x0.dtsi  | 12 ++++++++----
+ arch/arm64/boot/dts/marvell/armada-cp11x.dtsi |  9 ++++-----
+ 3 files changed, 16 insertions(+), 11 deletions(-)
+
+--- a/arch/arm64/boot/dts/marvell/armada-70x0.dtsi
+++ b/arch/arm64/boot/dts/marvell/armada-70x0.dtsi
+@@ -19,7 +19,8 @@
+  */
+ #define CP11X_NAME		cp0
+ #define CP11X_BASE		f2000000
+-#define CP11X_PCIE_MEM_BASE	0xf6000000
+#define CP11X_PCIEx_MEM_BASE(iface) (0xf6000000 + (iface * 0x1000000))
+#define CP11X_PCIEx_MEM_SIZE(iface) 0xf00000
+ #define CP11X_PCIE0_BASE	f2600000
+ #define CP11X_PCIE1_BASE	f2620000
+ #define CP11X_PCIE2_BASE	f2640000
+@@ -28,7 +29,8 @@
+ 
+ #undef CP11X_NAME
+ #undef CP11X_BASE
+-#undef CP11X_PCIE_MEM_BASE
+#undef CP11X_PCIEx_MEM_BASE
+#undef CP11X_PCIEx_MEM_SIZE
+ #undef CP11X_PCIE0_BASE
+ #undef CP11X_PCIE1_BASE
+ #undef CP11X_PCIE2_BASE
+--- a/arch/arm64/boot/dts/marvell/armada-80x0.dtsi
+++ b/arch/arm64/boot/dts/marvell/armada-80x0.dtsi
+@@ -21,7 +21,8 @@
+  */
+ #define CP11X_NAME		cp0
+ #define CP11X_BASE		f2000000
+-#define CP11X_PCIE_MEM_BASE	0xf6000000
+#define CP11X_PCIEx_MEM_BASE(iface) (0xf6000000 + (iface * 0x1000000))
+#define CP11X_PCIEx_MEM_SIZE(iface) 0xf00000
+ #define CP11X_PCIE0_BASE	f2600000
+ #define CP11X_PCIE1_BASE	f2620000
+ #define CP11X_PCIE2_BASE	f2640000
+@@ -30,7 +31,8 @@
+ 
+ #undef CP11X_NAME
+ #undef CP11X_BASE
+-#undef CP11X_PCIE_MEM_BASE
+#undef CP11X_PCIEx_MEM_BASE
+#undef CP11X_PCIEx_MEM_SIZE
+ #undef CP11X_PCIE0_BASE
+ #undef CP11X_PCIE1_BASE
+ #undef CP11X_PCIE2_BASE
+@@ -40,7 +42,8 @@
+  */
+ #define CP11X_NAME		cp1
+ #define CP11X_BASE		f4000000
+-#define CP11X_PCIE_MEM_BASE	0xfa000000
+#define CP11X_PCIEx_MEM_BASE(iface) (0xfa000000 + (iface * 0x1000000))
+#define CP11X_PCIEx_MEM_SIZE(iface) 0xf00000
+ #define CP11X_PCIE0_BASE	f4600000
+ #define CP11X_PCIE1_BASE	f4620000
+ #define CP11X_PCIE2_BASE	f4640000
+@@ -49,7 +52,8 @@
+ 
+ #undef CP11X_NAME
+ #undef CP11X_BASE
+-#undef CP11X_PCIE_MEM_BASE
+#undef CP11X_PCIEx_MEM_BASE
+#undef CP11X_PCIEx_MEM_SIZE
+ #undef CP11X_PCIE0_BASE
+ #undef CP11X_PCIE1_BASE
+ #undef CP11X_PCIE2_BASE
+--- a/arch/arm64/boot/dts/marvell/armada-cp11x.dtsi
+++ b/arch/arm64/boot/dts/marvell/armada-cp11x.dtsi
+@@ -10,8 +10,7 @@
+ 
+ #include "armada-common.dtsi"
+ 
+-#define CP11X_PCIEx_MEM_BASE(iface)	(CP11X_PCIE_MEM_BASE + (iface *  0x1000000))
+-#define CP11X_PCIEx_CONF_BASE(iface)	(CP11X_PCIEx_MEM_BASE(iface) + 0xf00000)
+#define CP11X_PCIEx_CONF_BASE(iface)	(CP11X_PCIEx_MEM_BASE(iface) + CP11X_PCIEx_MEM_SIZE(iface))
+ 
+ / {
+ 	/*
+@@ -507,7 +506,7 @@
+ 
+ 		bus-range = <0 0xff>;
+ 		/* non-prefetchable memory */
+-		ranges = <0x82000000 0 CP11X_PCIEx_MEM_BASE(0) 0  CP11X_PCIEx_MEM_BASE(0) 0 0xf00000>;
+		ranges = <0x82000000 0 CP11X_PCIEx_MEM_BASE(0) 0  CP11X_PCIEx_MEM_BASE(0) 0 CP11X_PCIEx_MEM_SIZE(0)>;
+ 		interrupt-map-mask = <0 0 0 0>;
+ 		interrupt-map = <0 0 0 0 &CP11X_LABEL(icu_nsr) 22 IRQ_TYPE_LEVEL_HIGH>;
+ 		interrupts = <22 IRQ_TYPE_LEVEL_HIGH>;
+@@ -531,7 +530,7 @@
+ 
+ 		bus-range = <0 0xff>;
+ 		/* non-prefetchable memory */
+-		ranges = <0x82000000 0 CP11X_PCIEx_MEM_BASE(1) 0  CP11X_PCIEx_MEM_BASE(1) 0 0xf00000>;
+		ranges = <0x82000000 0 CP11X_PCIEx_MEM_BASE(1) 0  CP11X_PCIEx_MEM_BASE(1) 0 CP11X_PCIEx_MEM_SIZE(1)>;
+ 		interrupt-map-mask = <0 0 0 0>;
+ 		interrupt-map = <0 0 0 0 &CP11X_LABEL(icu_nsr) 24 IRQ_TYPE_LEVEL_HIGH>;
+ 		interrupts = <24 IRQ_TYPE_LEVEL_HIGH>;
+@@ -556,7 +555,7 @@
+ 
+ 		bus-range = <0 0xff>;
+ 		/* non-prefetchable memory */
+-		ranges = <0x82000000 0 CP11X_PCIEx_MEM_BASE(2) 0  CP11X_PCIEx_MEM_BASE(2) 0 0xf00000>;
+		ranges = <0x82000000 0 CP11X_PCIEx_MEM_BASE(2) 0  CP11X_PCIEx_MEM_BASE(2) 0 CP11X_PCIEx_MEM_SIZE(2)>;
+ 		interrupt-map-mask = <0 0 0 0>;
+ 		interrupt-map = <0 0 0 0 &CP11X_LABEL(icu_nsr) 23 IRQ_TYPE_LEVEL_HIGH>;
+ 		interrupts = <23 IRQ_TYPE_LEVEL_HIGH>;
--- a/target/linux/mvebu/patches-5.4/007-v5.5-arm64-dts-marvell-Enumerate-the-first-AP806-syscon.patch
+++ b/target/linux/mvebu/patches-5.4/007-v5.5-arm64-dts-marvell-Enumerate-the-first-AP806-syscon.patch
@ -0,0 +1,25 @@
+From 2d6ebaa98be1dd265aa6d99a00c150f1f9f2ea66 Mon Sep 17 00:00:00 2001
+From: Miquel Raynal <miquel.raynal@bootlin.com>
+Date: Fri, 4 Oct 2019 16:27:18 +0200
+Subject: [PATCH] arm64: dts: marvell: Enumerate the first AP806 syscon
+
+There are two system controllers in the AP80x, like for ap_syscon1,
+enumerate the first one by renaming it s/ap_syscon/ap_syscon0/.
+
+Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
+Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
+---
+ arch/arm64/boot/dts/marvell/armada-ap806.dtsi | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+--- a/arch/arm64/boot/dts/marvell/armada-ap806.dtsi
+++ b/arch/arm64/boot/dts/marvell/armada-ap806.dtsi
+@@ -246,7 +246,7 @@
+ 				status = "disabled";
+ 			};
+ 
+-			ap_syscon: system-controller@6f4000 {
+			ap_syscon0: system-controller@6f4000 {
+ 				compatible = "syscon", "simple-mfd";
+ 				reg = <0x6f4000 0x2000>;
+ 
--- a/target/linux/mvebu/patches-5.4/008-v5.5-arm64-dts-marvell-Prepare-the-introduction-of-AP807-.patch
+++ b/target/linux/mvebu/patches-5.4/008-v5.5-arm64-dts-marvell-Prepare-the-introduction-of-AP807-.patch
@ -0,0 +1,937 @@
+From 7409b155562cc19b929b57692b334c5758ffc75d Mon Sep 17 00:00:00 2001
+From: Konstantin Porotchkin <kostap@marvell.com>
+Date: Fri, 4 Oct 2019 16:27:22 +0200
+Subject: [PATCH] arm64: dts: marvell: Prepare the introduction of AP807 based
+ SoCs
+
+Prepare the support for Marvell AP807 die. This die is very similar to
+AP806 but uses different DDR PHY. AP807 is a major component of CN9130
+SoC series.
+
+Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>
+Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
+Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
+---
+ arch/arm64/boot/dts/marvell/armada-ap806.dtsi | 448 +----------------
+ arch/arm64/boot/dts/marvell/armada-ap80x.dtsi | 456 ++++++++++++++++++
+ 2 files changed, 458 insertions(+), 446 deletions(-)
+ create mode 100644 arch/arm64/boot/dts/marvell/armada-ap80x.dtsi
+
+--- a/arch/arm64/boot/dts/marvell/armada-ap806.dtsi
+++ b/arch/arm64/boot/dts/marvell/armada-ap806.dtsi
+@@ -5,454 +5,10 @@
+  * Device Tree file for Marvell Armada AP806.
+  */
+ 
+-#include <dt-bindings/interrupt-controller/arm-gic.h>
+-#include <dt-bindings/thermal/thermal.h>
+-
+-/dts-v1/;
+#define AP_NAME		ap806
+#include "armada-ap80x.dtsi"
+ 
+ / {
+ 	model = "Marvell Armada AP806";
+ 	compatible = "marvell,armada-ap806";
+-	#address-cells = <2>;
+-	#size-cells = <2>;
+-
+-	aliases {
+-		serial0 = &uart0;
+-		serial1 = &uart1;
+-		gpio0 = &ap_gpio;
+-		spi0 = &spi0;
+-	};
+-
+-	psci {
+-		compatible = "arm,psci-0.2";
+-		method = "smc";
+-	};
+-
+-	reserved-memory {
+-		#address-cells = <2>;
+-		#size-cells = <2>;
+-		ranges;
+-
+-		/*
+-		 * This area matches the mapping done with a
+-		 * mainline U-Boot, and should be updated by the
+-		 * bootloader.
+-		 */
+-
+-		psci-area@4000000 {
+-			reg = <0x0 0x4000000 0x0 0x200000>;
+-			no-map;
+-		};
+-	};
+-
+-	ap806 {
+-		#address-cells = <2>;
+-		#size-cells = <2>;
+-		compatible = "simple-bus";
+-		interrupt-parent = <&gic>;
+-		ranges;
+-
+-		config-space@f0000000 {
+-			#address-cells = <1>;
+-			#size-cells = <1>;
+-			compatible = "simple-bus";
+-			ranges = <0x0 0x0 0xf0000000 0x1000000>;
+-
+-			gic: interrupt-controller@210000 {
+-				compatible = "arm,gic-400";
+-				#interrupt-cells = <3>;
+-				#address-cells = <1>;
+-				#size-cells = <1>;
+-				ranges;
+-				interrupt-controller;
+-				interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
+-				reg = <0x210000 0x10000>,
+-				      <0x220000 0x20000>,
+-				      <0x240000 0x20000>,
+-				      <0x260000 0x20000>;
+-
+-				gic_v2m0: v2m@280000 {
+-					compatible = "arm,gic-v2m-frame";
+-					msi-controller;
+-					reg = <0x280000 0x1000>;
+-					arm,msi-base-spi = <160>;
+-					arm,msi-num-spis = <32>;
+-				};
+-				gic_v2m1: v2m@290000 {
+-					compatible = "arm,gic-v2m-frame";
+-					msi-controller;
+-					reg = <0x290000 0x1000>;
+-					arm,msi-base-spi = <192>;
+-					arm,msi-num-spis = <32>;
+-				};
+-				gic_v2m2: v2m@2a0000 {
+-					compatible = "arm,gic-v2m-frame";
+-					msi-controller;
+-					reg = <0x2a0000 0x1000>;
+-					arm,msi-base-spi = <224>;
+-					arm,msi-num-spis = <32>;
+-				};
+-				gic_v2m3: v2m@2b0000 {
+-					compatible = "arm,gic-v2m-frame";
+-					msi-controller;
+-					reg = <0x2b0000 0x1000>;
+-					arm,msi-base-spi = <256>;
+-					arm,msi-num-spis = <32>;
+-				};
+-			};
+-
+-			timer {
+-				compatible = "arm,armv8-timer";
+-				interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
+-					     <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
+-					     <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
+-					     <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
+-			};
+-
+-			pmu {
+-				compatible = "arm,cortex-a72-pmu";
+-				interrupt-parent = <&pic>;
+-				interrupts = <17>;
+-			};
+-
+-			odmi: odmi@300000 {
+-				compatible = "marvell,odmi-controller";
+-				interrupt-controller;
+-				msi-controller;
+-				marvell,odmi-frames = <4>;
+-				reg = <0x300000 0x4000>,
+-				      <0x304000 0x4000>,
+-				      <0x308000 0x4000>,
+-				      <0x30C000 0x4000>;
+-				marvell,spi-base = <128>, <136>, <144>, <152>;
+-			};
+-
+-			gicp: gicp@3f0040 {
+-				compatible = "marvell,ap806-gicp";
+-				reg = <0x3f0040 0x10>;
+-				marvell,spi-ranges = <64 64>, <288 64>;
+-				msi-controller;
+-			};
+-
+-			pic: interrupt-controller@3f0100 {
+-				compatible = "marvell,armada-8k-pic";
+-				reg = <0x3f0100 0x10>;
+-				#interrupt-cells = <1>;
+-				interrupt-controller;
+-				interrupts = <GIC_PPI 15 IRQ_TYPE_LEVEL_HIGH>;
+-			};
+-
+-			sei: interrupt-controller@3f0200 {
+-				compatible = "marvell,ap806-sei";
+-				reg = <0x3f0200 0x40>;
+-				interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>;
+-				#interrupt-cells = <1>;
+-				interrupt-controller;
+-				msi-controller;
+-			};
+-
+-			xor@400000 {
+-				compatible = "marvell,armada-7k-xor", "marvell,xor-v2";
+-				reg = <0x400000 0x1000>,
+-				      <0x410000 0x1000>;
+-				msi-parent = <&gic_v2m0>;
+-				clocks = <&ap_clk 3>;
+-				dma-coherent;
+-			};
+-
+-			xor@420000 {
+-				compatible = "marvell,armada-7k-xor", "marvell,xor-v2";
+-				reg = <0x420000 0x1000>,
+-				      <0x430000 0x1000>;
+-				msi-parent = <&gic_v2m0>;
+-				clocks = <&ap_clk 3>;
+-				dma-coherent;
+-			};
+-
+-			xor@440000 {
+-				compatible = "marvell,armada-7k-xor", "marvell,xor-v2";
+-				reg = <0x440000 0x1000>,
+-				      <0x450000 0x1000>;
+-				msi-parent = <&gic_v2m0>;
+-				clocks = <&ap_clk 3>;
+-				dma-coherent;
+-			};
+-
+-			xor@460000 {
+-				compatible = "marvell,armada-7k-xor", "marvell,xor-v2";
+-				reg = <0x460000 0x1000>,
+-				      <0x470000 0x1000>;
+-				msi-parent = <&gic_v2m0>;
+-				clocks = <&ap_clk 3>;
+-				dma-coherent;
+-			};
+-
+-			spi0: spi@510600 {
+-				compatible = "marvell,armada-380-spi";
+-				reg = <0x510600 0x50>;
+-				#address-cells = <1>;
+-				#size-cells = <0>;
+-				interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
+-				clocks = <&ap_clk 3>;
+-				status = "disabled";
+-			};
+-
+-			i2c0: i2c@511000 {
+-				compatible = "marvell,mv78230-i2c";
+-				reg = <0x511000 0x20>;
+-				#address-cells = <1>;
+-				#size-cells = <0>;
+-				interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
+-				timeout-ms = <1000>;
+-				clocks = <&ap_clk 3>;
+-				status = "disabled";
+-			};
+-
+-			uart0: serial@512000 {
+-				compatible = "snps,dw-apb-uart";
+-				reg = <0x512000 0x100>;
+-				reg-shift = <2>;
+-				interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
+-				reg-io-width = <1>;
+-				clocks = <&ap_clk 3>;
+-				status = "disabled";
+-			};
+-
+-			uart1: serial@512100 {
+-				compatible = "snps,dw-apb-uart";
+-				reg = <0x512100 0x100>;
+-				reg-shift = <2>;
+-				interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
+-				reg-io-width = <1>;
+-				clocks = <&ap_clk 3>;
+-				status = "disabled";
+-
+-			};
+-
+-			watchdog: watchdog@610000 {
+-				compatible = "arm,sbsa-gwdt";
+-				reg = <0x610000 0x1000>, <0x600000 0x1000>;
+-				interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>;
+-			};
+-
+-			ap_sdhci0: sdhci@6e0000 {
+-				compatible = "marvell,armada-ap806-sdhci";
+-				reg = <0x6e0000 0x300>;
+-				interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
+-				clock-names = "core";
+-				clocks = <&ap_clk 4>;
+-				dma-coherent;
+-				marvell,xenon-phy-slow-mode;
+-				status = "disabled";
+-			};
+-
+-			ap_syscon0: system-controller@6f4000 {
+-				compatible = "syscon", "simple-mfd";
+-				reg = <0x6f4000 0x2000>;
+-
+-				ap_clk: clock {
+-					compatible = "marvell,ap806-clock";
+-					#clock-cells = <1>;
+-				};
+-
+-				ap_pinctrl: pinctrl {
+-					compatible = "marvell,ap806-pinctrl";
+-
+-					uart0_pins: uart0-pins {
+-						marvell,pins = "mpp11", "mpp19";
+-						marvell,function = "uart0";
+-					};
+-				};
+-
+-				ap_gpio: gpio@1040 {
+-					compatible = "marvell,armada-8k-gpio";
+-					offset = <0x1040>;
+-					ngpios = <20>;
+-					gpio-controller;
+-					#gpio-cells = <2>;
+-					gpio-ranges = <&ap_pinctrl 0 0 20>;
+-				};
+-			};
+-
+-			ap_syscon1: system-controller@6f8000 {
+-				compatible = "syscon", "simple-mfd";
+-				reg = <0x6f8000 0x1000>;
+-				#address-cells = <1>;
+-				#size-cells = <1>;
+-
+-				cpu_clk: clock-cpu@278 {
+-					compatible = "marvell,ap806-cpu-clock";
+-					clocks = <&ap_clk 0>, <&ap_clk 1>;
+-					#clock-cells = <1>;
+-					reg = <0x278 0xa30>;
+-				};
+-
+-				ap_thermal: thermal-sensor@80 {
+-					compatible = "marvell,armada-ap806-thermal";
+-					reg = <0x80 0x10>;
+-					interrupt-parent = <&sei>;
+-					interrupts = <18>;
+-					#thermal-sensor-cells = <1>;
+-				};
+-			};
+-		};
+-	};
+-
+-	/*
+-	 * The thermal IP features one internal sensor plus, if applicable, one
+-	 * remote channel wired to one sensor per CPU.
+-	 *
+-	 * Only one thermal zone per AP/CP may trigger interrupts at a time, the
+-	 * first one that will have a critical trip point will be chosen.
+-	 */
+-	thermal-zones {
+-		ap_thermal_ic: ap-thermal-ic {
+-			polling-delay-passive = <0>; /* Interrupt driven */
+-			polling-delay = <0>; /* Interrupt driven */
+-
+-			thermal-sensors = <&ap_thermal 0>;
+-
+-			trips {
+-				ap_crit: ap-crit {
+-					temperature = <100000>; /* mC degrees */
+-					hysteresis = <2000>; /* mC degrees */
+-					type = "critical";
+-				};
+-			};
+-
+-			cooling-maps { };
+-		};
+-
+-		ap_thermal_cpu0: ap-thermal-cpu0 {
+-			polling-delay-passive = <1000>;
+-			polling-delay = <1000>;
+-
+-			thermal-sensors = <&ap_thermal 1>;
+-
+-			trips {
+-				cpu0_hot: cpu0-hot {
+-					temperature = <85000>;
+-					hysteresis = <2000>;
+-					type = "passive";
+-				};
+-				cpu0_emerg: cpu0-emerg {
+-					temperature = <95000>;
+-					hysteresis = <2000>;
+-					type = "passive";
+-				};
+-			};
+-
+-			cooling-maps {
+-				map0_hot: map0-hot {
+-					trip = <&cpu0_hot>;
+-					cooling-device = <&cpu0 1 2>,
+-						<&cpu1 1 2>;
+-				};
+-				map0_emerg: map0-ermerg {
+-					trip = <&cpu0_emerg>;
+-					cooling-device = <&cpu0 3 3>,
+-						<&cpu1 3 3>;
+-				};
+-			};
+-		};
+-
+-		ap_thermal_cpu1: ap-thermal-cpu1 {
+-			polling-delay-passive = <1000>;
+-			polling-delay = <1000>;
+-
+-			thermal-sensors = <&ap_thermal 2>;
+-
+-			trips {
+-				cpu1_hot: cpu1-hot {
+-					temperature = <85000>;
+-					hysteresis = <2000>;
+-					type = "passive";
+-				};
+-				cpu1_emerg: cpu1-emerg {
+-					temperature = <95000>;
+-					hysteresis = <2000>;
+-					type = "passive";
+-				};
+-			};
+-
+-			cooling-maps {
+-				map1_hot: map1-hot {
+-					trip = <&cpu1_hot>;
+-					cooling-device = <&cpu0 1 2>,
+-						<&cpu1 1 2>;
+-				};
+-				map1_emerg: map1-emerg {
+-					trip = <&cpu1_emerg>;
+-					cooling-device = <&cpu0 3 3>,
+-						<&cpu1 3 3>;
+-				};
+-			};
+-		};
+-
+-		ap_thermal_cpu2: ap-thermal-cpu2 {
+-			polling-delay-passive = <1000>;
+-			polling-delay = <1000>;
+-
+-			thermal-sensors = <&ap_thermal 3>;
+-
+-			trips {
+-				cpu2_hot: cpu2-hot {
+-					temperature = <85000>;
+-					hysteresis = <2000>;
+-					type = "passive";
+-				};
+-				cpu2_emerg: cpu2-emerg {
+-					temperature = <95000>;
+-					hysteresis = <2000>;
+-					type = "passive";
+-				};
+-			};
+-
+-			cooling-maps {
+-				map2_hot: map2-hot {
+-					trip = <&cpu2_hot>;
+-					cooling-device = <&cpu2 1 2>,
+-						<&cpu3 1 2>;
+-				};
+-				map2_emerg: map2-emerg {
+-					trip = <&cpu2_emerg>;
+-					cooling-device = <&cpu2 3 3>,
+-						<&cpu3 3 3>;
+-				};
+-			};
+-		};
+-
+-		ap_thermal_cpu3: ap-thermal-cpu3 {
+-			polling-delay-passive = <1000>;
+-			polling-delay = <1000>;
+-
+-			thermal-sensors = <&ap_thermal 4>;
+-
+-			trips {
+-				cpu3_hot: cpu3-hot {
+-					temperature = <85000>;
+-					hysteresis = <2000>;
+-					type = "passive";
+-				};
+-				cpu3_emerg: cpu3-emerg {
+-					temperature = <95000>;
+-					hysteresis = <2000>;
+-					type = "passive";
+-				};
+-			};
+-
+-			cooling-maps {
+-				map3_hot: map3-bhot {
+-					trip = <&cpu3_hot>;
+-					cooling-device = <&cpu2 1 2>,
+-						<&cpu3 1 2>;
+-				};
+-				map3_emerg: map3-emerg {
+-					trip = <&cpu3_emerg>;
+-					cooling-device = <&cpu2 3 3>,
+-						<&cpu3 3 3>;
+-				};
+-			};
+-		};
+-	};
+ };
+--- /dev/null
+++ b/arch/arm64/boot/dts/marvell/armada-ap80x.dtsi
+@@ -0,0 +1,456 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (C) 2019 Marvell Technology Group Ltd.
+ *
+ * Device Tree file for Marvell Armada AP80x.
+ */
+
+#include <dt-bindings/interrupt-controller/arm-gic.h>
+#include <dt-bindings/thermal/thermal.h>
+
+/dts-v1/;
+
+/ {
+	#address-cells = <2>;
+	#size-cells = <2>;
+
+	aliases {
+		serial0 = &uart0;
+		serial1 = &uart1;
+		gpio0 = &ap_gpio;
+		spi0 = &spi0;
+	};
+
+	psci {
+		compatible = "arm,psci-0.2";
+		method = "smc";
+	};
+
+	reserved-memory {
+		#address-cells = <2>;
+		#size-cells = <2>;
+		ranges;
+
+		/*
+		 * This area matches the mapping done with a
+		 * mainline U-Boot, and should be updated by the
+		 * bootloader.
+		 */
+
+		psci-area@4000000 {
+			reg = <0x0 0x4000000 0x0 0x200000>;
+			no-map;
+		};
+	};
+
+	AP_NAME {
+		#address-cells = <2>;
+		#size-cells = <2>;
+		compatible = "simple-bus";
+		interrupt-parent = <&gic>;
+		ranges;
+
+		config-space@f0000000 {
+			#address-cells = <1>;
+			#size-cells = <1>;
+			compatible = "simple-bus";
+			ranges = <0x0 0x0 0xf0000000 0x1000000>;
+
+			gic: interrupt-controller@210000 {
+				compatible = "arm,gic-400";
+				#interrupt-cells = <3>;
+				#address-cells = <1>;
+				#size-cells = <1>;
+				ranges;
+				interrupt-controller;
+				interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
+				reg = <0x210000 0x10000>,
+				      <0x220000 0x20000>,
+				      <0x240000 0x20000>,
+				      <0x260000 0x20000>;
+
+				gic_v2m0: v2m@280000 {
+					compatible = "arm,gic-v2m-frame";
+					msi-controller;
+					reg = <0x280000 0x1000>;
+					arm,msi-base-spi = <160>;
+					arm,msi-num-spis = <32>;
+				};
+				gic_v2m1: v2m@290000 {
+					compatible = "arm,gic-v2m-frame";
+					msi-controller;
+					reg = <0x290000 0x1000>;
+					arm,msi-base-spi = <192>;
+					arm,msi-num-spis = <32>;
+				};
+				gic_v2m2: v2m@2a0000 {
+					compatible = "arm,gic-v2m-frame";
+					msi-controller;
+					reg = <0x2a0000 0x1000>;
+					arm,msi-base-spi = <224>;
+					arm,msi-num-spis = <32>;
+				};
+				gic_v2m3: v2m@2b0000 {
+					compatible = "arm,gic-v2m-frame";
+					msi-controller;
+					reg = <0x2b0000 0x1000>;
+					arm,msi-base-spi = <256>;
+					arm,msi-num-spis = <32>;
+				};
+			};
+
+			timer {
+				compatible = "arm,armv8-timer";
+				interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
+					     <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
+					     <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
+					     <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
+			};
+
+			pmu {
+				compatible = "arm,cortex-a72-pmu";
+				interrupt-parent = <&pic>;
+				interrupts = <17>;
+			};
+
+			odmi: odmi@300000 {
+				compatible = "marvell,odmi-controller";
+				interrupt-controller;
+				msi-controller;
+				marvell,odmi-frames = <4>;
+				reg = <0x300000 0x4000>,
+				      <0x304000 0x4000>,
+				      <0x308000 0x4000>,
+				      <0x30C000 0x4000>;
+				marvell,spi-base = <128>, <136>, <144>, <152>;
+			};
+
+			gicp: gicp@3f0040 {
+				compatible = "marvell,ap806-gicp";
+				reg = <0x3f0040 0x10>;
+				marvell,spi-ranges = <64 64>, <288 64>;
+				msi-controller;
+			};
+
+			pic: interrupt-controller@3f0100 {
+				compatible = "marvell,armada-8k-pic";
+				reg = <0x3f0100 0x10>;
+				#interrupt-cells = <1>;
+				interrupt-controller;
+				interrupts = <GIC_PPI 15 IRQ_TYPE_LEVEL_HIGH>;
+			};
+
+			sei: interrupt-controller@3f0200 {
+				compatible = "marvell,ap806-sei";
+				reg = <0x3f0200 0x40>;
+				interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>;
+				#interrupt-cells = <1>;
+				interrupt-controller;
+				msi-controller;
+			};
+
+			xor@400000 {
+				compatible = "marvell,armada-7k-xor", "marvell,xor-v2";
+				reg = <0x400000 0x1000>,
+				      <0x410000 0x1000>;
+				msi-parent = <&gic_v2m0>;
+				clocks = <&ap_clk 3>;
+				dma-coherent;
+			};
+
+			xor@420000 {
+				compatible = "marvell,armada-7k-xor", "marvell,xor-v2";
+				reg = <0x420000 0x1000>,
+				      <0x430000 0x1000>;
+				msi-parent = <&gic_v2m0>;
+				clocks = <&ap_clk 3>;
+				dma-coherent;
+			};
+
+			xor@440000 {
+				compatible = "marvell,armada-7k-xor", "marvell,xor-v2";
+				reg = <0x440000 0x1000>,
+				      <0x450000 0x1000>;
+				msi-parent = <&gic_v2m0>;
+				clocks = <&ap_clk 3>;
+				dma-coherent;
+			};
+
+			xor@460000 {
+				compatible = "marvell,armada-7k-xor", "marvell,xor-v2";
+				reg = <0x460000 0x1000>,
+				      <0x470000 0x1000>;
+				msi-parent = <&gic_v2m0>;
+				clocks = <&ap_clk 3>;
+				dma-coherent;
+			};
+
+			spi0: spi@510600 {
+				compatible = "marvell,armada-380-spi";
+				reg = <0x510600 0x50>;
+				#address-cells = <1>;
+				#size-cells = <0>;
+				interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
+				clocks = <&ap_clk 3>;
+				status = "disabled";
+			};
+
+			i2c0: i2c@511000 {
+				compatible = "marvell,mv78230-i2c";
+				reg = <0x511000 0x20>;
+				#address-cells = <1>;
+				#size-cells = <0>;
+				interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
+				timeout-ms = <1000>;
+				clocks = <&ap_clk 3>;
+				status = "disabled";
+			};
+
+			uart0: serial@512000 {
+				compatible = "snps,dw-apb-uart";
+				reg = <0x512000 0x100>;
+				reg-shift = <2>;
+				interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
+				reg-io-width = <1>;
+				clocks = <&ap_clk 3>;
+				status = "disabled";
+			};
+
+			uart1: serial@512100 {
+				compatible = "snps,dw-apb-uart";
+				reg = <0x512100 0x100>;
+				reg-shift = <2>;
+				interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
+				reg-io-width = <1>;
+				clocks = <&ap_clk 3>;
+				status = "disabled";
+
+			};
+
+			watchdog: watchdog@610000 {
+				compatible = "arm,sbsa-gwdt";
+				reg = <0x610000 0x1000>, <0x600000 0x1000>;
+				interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>;
+			};
+
+			ap_sdhci0: sdhci@6e0000 {
+				compatible = "marvell,armada-ap806-sdhci";
+				reg = <0x6e0000 0x300>;
+				interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
+				clock-names = "core";
+				clocks = <&ap_clk 4>;
+				dma-coherent;
+				marvell,xenon-phy-slow-mode;
+				status = "disabled";
+			};
+
+			ap_syscon0: system-controller@6f4000 {
+				compatible = "syscon", "simple-mfd";
+				reg = <0x6f4000 0x2000>;
+
+				ap_clk: clock {
+					compatible = "marvell,ap806-clock";
+					#clock-cells = <1>;
+				};
+
+				ap_pinctrl: pinctrl {
+					compatible = "marvell,ap806-pinctrl";
+
+					uart0_pins: uart0-pins {
+						marvell,pins = "mpp11", "mpp19";
+						marvell,function = "uart0";
+					};
+				};
+
+				ap_gpio: gpio@1040 {
+					compatible = "marvell,armada-8k-gpio";
+					offset = <0x1040>;
+					ngpios = <20>;
+					gpio-controller;
+					#gpio-cells = <2>;
+					gpio-ranges = <&ap_pinctrl 0 0 20>;
+				};
+			};
+
+			ap_syscon1: system-controller@6f8000 {
+				compatible = "syscon", "simple-mfd";
+				reg = <0x6f8000 0x1000>;
+				#address-cells = <1>;
+				#size-cells = <1>;
+
+				cpu_clk: clock-cpu@278 {
+					compatible = "marvell,ap806-cpu-clock";
+					clocks = <&ap_clk 0>, <&ap_clk 1>;
+					#clock-cells = <1>;
+					reg = <0x278 0xa30>;
+				};
+
+				ap_thermal: thermal-sensor@80 {
+					compatible = "marvell,armada-ap806-thermal";
+					reg = <0x80 0x10>;
+					interrupt-parent = <&sei>;
+					interrupts = <18>;
+					#thermal-sensor-cells = <1>;
+				};
+			};
+		};
+	};
+
+	/*
+	 * The thermal IP features one internal sensor plus, if applicable, one
+	 * remote channel wired to one sensor per CPU.
+	 *
+	 * Only one thermal zone per AP/CP may trigger interrupts at a time, the
+	 * first one that will have a critical trip point will be chosen.
+	 */
+	thermal-zones {
+		ap_thermal_ic: ap-thermal-ic {
+			polling-delay-passive = <0>; /* Interrupt driven */
+			polling-delay = <0>; /* Interrupt driven */
+
+			thermal-sensors = <&ap_thermal 0>;
+
+			trips {
+				ap_crit: ap-crit {
+					temperature = <100000>; /* mC degrees */
+					hysteresis = <2000>; /* mC degrees */
+					type = "critical";
+				};
+			};
+
+			cooling-maps { };
+		};
+
+		ap_thermal_cpu0: ap-thermal-cpu0 {
+			polling-delay-passive = <1000>;
+			polling-delay = <1000>;
+
+			thermal-sensors = <&ap_thermal 1>;
+
+			trips {
+				cpu0_hot: cpu0-hot {
+					temperature = <85000>;
+					hysteresis = <2000>;
+					type = "passive";
+				};
+				cpu0_emerg: cpu0-emerg {
+					temperature = <95000>;
+					hysteresis = <2000>;
+					type = "passive";
+				};
+			};
+
+			cooling-maps {
+				map0_hot: map0-hot {
+					trip = <&cpu0_hot>;
+					cooling-device = <&cpu0 1 2>,
+						<&cpu1 1 2>;
+				};
+				map0_emerg: map0-ermerg {
+					trip = <&cpu0_emerg>;
+					cooling-device = <&cpu0 3 3>,
+						<&cpu1 3 3>;
+				};
+			};
+		};
+
+		ap_thermal_cpu1: ap-thermal-cpu1 {
+			polling-delay-passive = <1000>;
+			polling-delay = <1000>;
+
+			thermal-sensors = <&ap_thermal 2>;
+
+			trips {
+				cpu1_hot: cpu1-hot {
+					temperature = <85000>;
+					hysteresis = <2000>;
+					type = "passive";
+				};
+				cpu1_emerg: cpu1-emerg {
+					temperature = <95000>;
+					hysteresis = <2000>;
+					type = "passive";
+				};
+			};
+
+			cooling-maps {
+				map1_hot: map1-hot {
+					trip = <&cpu1_hot>;
+					cooling-device = <&cpu0 1 2>,
+						<&cpu1 1 2>;
+				};
+				map1_emerg: map1-emerg {
+					trip = <&cpu1_emerg>;
+					cooling-device = <&cpu0 3 3>,
+						<&cpu1 3 3>;
+				};
+			};
+		};
+
+		ap_thermal_cpu2: ap-thermal-cpu2 {
+			polling-delay-passive = <1000>;
+			polling-delay = <1000>;
+
+			thermal-sensors = <&ap_thermal 3>;
+
+			trips {
+				cpu2_hot: cpu2-hot {
+					temperature = <85000>;
+					hysteresis = <2000>;
+					type = "passive";
+				};
+				cpu2_emerg: cpu2-emerg {
+					temperature = <95000>;
+					hysteresis = <2000>;
+					type = "passive";
+				};
+			};
+
+			cooling-maps {
+				map2_hot: map2-hot {
+					trip = <&cpu2_hot>;
+					cooling-device = <&cpu2 1 2>,
+						<&cpu3 1 2>;
+				};
+				map2_emerg: map2-emerg {
+					trip = <&cpu2_emerg>;
+					cooling-device = <&cpu2 3 3>,
+						<&cpu3 3 3>;
+				};
+			};
+		};
+
+		ap_thermal_cpu3: ap-thermal-cpu3 {
+			polling-delay-passive = <1000>;
+			polling-delay = <1000>;
+
+			thermal-sensors = <&ap_thermal 4>;
+
+			trips {
+				cpu3_hot: cpu3-hot {
+					temperature = <85000>;
+					hysteresis = <2000>;
+					type = "passive";
+				};
+				cpu3_emerg: cpu3-emerg {
+					temperature = <95000>;
+					hysteresis = <2000>;
+					type = "passive";
+				};
+			};
+
+			cooling-maps {
+				map3_hot: map3-bhot {
+					trip = <&cpu3_hot>;
+					cooling-device = <&cpu2 1 2>,
+						<&cpu3 1 2>;
+				};
+				map3_emerg: map3-emerg {
+					trip = <&cpu3_emerg>;
+					cooling-device = <&cpu2 3 3>,
+						<&cpu3 3 3>;
+				};
+			};
+		};
+	};
+};
--- a/target/linux/mvebu/patches-5.4/009-v5.5-arm64-dts-marvell-Move-clocks-to-AP806-specific-file.patch
+++ b/target/linux/mvebu/patches-5.4/009-v5.5-arm64-dts-marvell-Move-clocks-to-AP806-specific-file.patch
@ -0,0 +1,65 @@
+From 4f267f2a806b556678b84c4d80c2f4bff8d000d9 Mon Sep 17 00:00:00 2001
+From: Miquel Raynal <miquel.raynal@bootlin.com>
+Date: Fri, 4 Oct 2019 16:27:23 +0200
+Subject: [PATCH] arm64: dts: marvell: Move clocks to AP806 specific file
+
+Regular clocks and CPU clocks are specific to AP806, move them out of
+the generic AP80x file so that AP807 can use its own clocks.
+
+Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
+Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
+---
+ arch/arm64/boot/dts/marvell/armada-ap806.dtsi | 16 ++++++++++++++++
+ arch/arm64/boot/dts/marvell/armada-ap80x.dtsi | 12 ------------
+ 2 files changed, 16 insertions(+), 12 deletions(-)
+
+--- a/arch/arm64/boot/dts/marvell/armada-ap806.dtsi
+++ b/arch/arm64/boot/dts/marvell/armada-ap806.dtsi
+@@ -12,3 +12,19 @@
+ 	model = "Marvell Armada AP806";
+ 	compatible = "marvell,armada-ap806";
+ };
+
+&ap_syscon0 {
+	ap_clk: clock {
+		compatible = "marvell,ap806-clock";
+		#clock-cells = <1>;
+	};
+};
+
+&ap_syscon1 {
+	cpu_clk: clock-cpu@278 {
+		compatible = "marvell,ap806-cpu-clock";
+		clocks = <&ap_clk 0>, <&ap_clk 1>;
+		#clock-cells = <1>;
+		reg = <0x278 0xa30>;
+	};
+};
+--- a/arch/arm64/boot/dts/marvell/armada-ap80x.dtsi
+++ b/arch/arm64/boot/dts/marvell/armada-ap80x.dtsi
+@@ -248,11 +248,6 @@
+ 				compatible = "syscon", "simple-mfd";
+ 				reg = <0x6f4000 0x2000>;
+ 
+-				ap_clk: clock {
+-					compatible = "marvell,ap806-clock";
+-					#clock-cells = <1>;
+-				};
+-
+ 				ap_pinctrl: pinctrl {
+ 					compatible = "marvell,ap806-pinctrl";
+ 
+@@ -278,13 +273,6 @@
+ 				#address-cells = <1>;
+ 				#size-cells = <1>;
+ 
+-				cpu_clk: clock-cpu@278 {
+-					compatible = "marvell,ap806-cpu-clock";
+-					clocks = <&ap_clk 0>, <&ap_clk 1>;
+-					#clock-cells = <1>;
+-					reg = <0x278 0xa30>;
+-				};
+-
+ 				ap_thermal: thermal-sensor@80 {
+ 					compatible = "marvell,armada-ap806-thermal";
+ 					reg = <0x80 0x10>;
--- a/target/linux/oxnas/ox820/config-default
+++ b/target/linux/oxnas/ox820/config-default
@ -78,7 +78,6 @@ CONFIG_PCI_MSI_IRQ_DOMAIN=y
 # CONFIG_PL310_ERRATA_753970 is not set
 # CONFIG_PL310_ERRATA_769419 is not set
 CONFIG_PM_SLEEP_SMP=y
-CONFIG_RCU_CPU_STALL_TIMEOUT=21
 CONFIG_RFS_ACCEL=y
 CONFIG_RPS=y
 CONFIG_RWSEM_SPIN_ON_OWNER=y
--- a/target/linux/ramips/dts/mt7620a_sitecom_wlr-4100-v1-002.dts
+++ b/target/linux/ramips/dts/mt7620a_sitecom_wlr-4100-v1-002.dts
@ -0,0 +1,196 @@
+// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
+
+#include "mt7620a.dtsi"
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+
+/ {
+	compatible = "sitecom,wlr-4100-v1-002", "ralink,mt7620a-soc";
+	model = "Sitecom WLR-4100 v1 002";
+
+	chosen {
+		bootargs = "console=ttyS0,115200";
+	};
+
+	aliases {
+		led-boot = &led_power;
+		led-failsafe = &led_power;
+		led-running = &led_power;
+		led-upgrade = &led_power;
+	};
+
+	leds {
+		compatible = "gpio-leds";
+
+		led_power: power {
+			label = "amber:power";
+			gpios = <&gpio0 9 GPIO_ACTIVE_LOW>;
+			default-state = "on";
+		};
+
+		wifi {
+			label = "blue:wifi";
+			gpios = <&gpio3 0 GPIO_ACTIVE_LOW>;
+			linux,default-trigger = "phy1tpt";
+		};
+
+		wps {
+			label = "white:wps";
+			gpios = <&gpio1 15 GPIO_ACTIVE_LOW>;
+		};
+	};
+
+	keys {
+		compatible = "gpio-keys";
+
+		wps {
+			label = "wps";
+			gpios = <&gpio0 2 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_WPS_BUTTON>;
+		};
+
+		reset {
+			label = "reset";
+			gpios = <&gpio0 1 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_RESTART>;
+		};
+	};
+
+	gpio_export {
+		compatible = "gpio-export";
+		#size-cells = <0>;
+
+		usb-power {
+			gpio-export,name = "usb-power";
+			gpio-export,output = <1>;
+			gpios = <&gpio1 14 GPIO_ACTIVE_HIGH>;
+		};
+	};
+};
+
+&gpio1 {
+	status = "okay";
+};
+
+&gpio3 {
+	status = "okay";
+};
+
+&spi0 {
+	status = "okay";
+
+	flash@0 {
+		compatible = "jedec,spi-nor";
+		reg = <0>;
+		spi-max-frequency = <20000000>;
+
+		partitions {
+			compatible = "fixed-partitions";
+			#address-cells = <1>;
+			#size-cells = <1>;
+
+			partition@0 {
+				label = "uboot";
+				reg = <0x0 0x30000>;
+				read-only;
+			};
+
+			partition@30000 {
+				label = "u-boot-env";
+				reg = <0x30000 0x10000>;
+				read-only;
+			};
+
+			factory: partition@40000 {
+				label = "factory";
+				reg = <0x40000 0x10000>;
+				read-only;
+			};
+
+			partition@50000 {
+				compatible = "denx,uimage";
+				label = "firmware";
+				reg = <0x50000 0x790000>;
+			};
+
+			partition@7e0000 {
+				label = "backup";
+				reg = <0x7e0000 0x10000>;
+				read-only;
+			};
+
+			partition@7f0000 {
+				label = "storage";
+				reg = <0x7f0000 0x10000>;
+				read-only;
+			};
+		};
+	};
+};
+
+&ethernet {
+	pinctrl-names = "default";
+	pinctrl-0 = <&rgmii1_pins &mdio_pins>;
+
+	nvmem-cells = <&macaddr_factory_4>;
+	nvmem-cell-names = "mac-address";
+
+	port@5 {
+		status = "okay";
+
+		phy-mode = "rgmii";
+		mediatek,fixed-link = <1000 1 1 1>;
+	};
+
+	mdio-bus {
+		status = "okay";
+
+		ethernet-phy@0 {
+			reg = <0>;
+			phy-mode = "rgmii";
+
+			qca,ar8327-initvals = <
+				0x04 0x06200000  /* PORT0 PAD MODE CTRL */
+				0x08 0x01000000  /* PORT5 PAD MODE CTRL  RX delay EN all ports 0, 5, 6 */
+				0x7c 0x0000007e  /* PORT0_STATUS */
+				0x94 0x00000000  /* PORT6_STATUS */
+			>;
+		};
+	};
+};
+
+&gsw {
+	mediatek,ephy-base = /bits/ 8 <8>;
+};
+
+&ehci {
+	status = "okay";
+};
+
+&ohci {
+	status = "okay";
+};
+
+&wmac {
+	status = "okay";
+
+	ralink,mtd-eeprom = <&factory 0x0>;
+};
+
+&state_default {
+	gpio {
+		groups = "uartf", "i2c", "wled", "spi refclk";
+		function = "gpio";
+	};
+};
+
+&factory {
+	compatible = "nvmem-cells";
+	#address-cells = <1>;
+	#size-cells = <1>;
+
+	macaddr_factory_4: macaddr@4 {
+		reg = <0x4 0x6>;
+	};
+};
--- a/target/linux/ramips/image/mt7620.mk
+++ b/target/linux/ramips/image/mt7620.mk
@ -1001,6 +1001,20 @@ define Device/sercomm_na930
 endef
 TARGET_DEVICES += sercomm_na930

+define Device/sitecom_wlr-4100-v1-002
+  SOC := mt7620a
+  BLOCKSIZE := 4k
+  IMAGE_SIZE := 7744k
+  IMAGES += factory.dlf
+  IMAGE/factory.dlf := $$(sysupgrade_bin) | check-size | \
+	senao-header -r 0x0222 -p 0x104A -t 2
+  DEVICE_VENDOR := Sitecom
+  DEVICE_MODEL := WLR-4100
+  DEVICE_VARIANT := v1 002
+  DEVICE_PACKAGES := kmod-usb2 kmod-usb-ohci uboot-envtools
+endef
+TARGET_DEVICES += sitecom_wlr-4100-v1-002
+
 define Device/tplink_archer-c20i
  $(Device/tplink-v2)
  SOC := mt7620a
--- a/target/linux/ramips/mt7620/base-files/etc/board.d/02_network
+++ b/target/linux/ramips/mt7620/base-files/etc/board.d/02_network
@ -137,7 +137,8 @@ ramips_setup_interfaces()
 		ucidef_add_switch "switch1" \
 			"1:lan" "2:lan" "3:lan" "4:lan" "0:wan" "6@eth0"
 		;;
-	engenius,esr600)
+	engenius,esr600|\
+	sitecom,wlr-4100-v1-002)
 		ucidef_add_switch "switch0" \
 			"1:lan:4" "2:lan:3" "3:lan:2" "4:lan:1" "5:wan" "0@eth0"
 		ucidef_add_switch "switch1" \
--- a/target/linux/rockchip/armv8/config-5.10
+++ b/target/linux/rockchip/armv8/config-5.10
@ -495,7 +495,6 @@ CONFIG_RANDOMIZE_MODULE_REGION_FULL=y
 CONFIG_RAS=y
 CONFIG_RATIONAL=y
 # CONFIG_RAVE_SP_CORE is not set
-CONFIG_RCU_CPU_STALL_TIMEOUT=21
 CONFIG_RCU_TRACE=y
 CONFIG_REALTEK_PHY=y
 CONFIG_REGMAP=y
--- a/target/linux/rockchip/armv8/config-5.4
+++ b/target/linux/rockchip/armv8/config-5.4
@ -475,7 +475,6 @@ CONFIG_RANDOMIZE_MODULE_REGION_FULL=y
 CONFIG_RAS=y
 CONFIG_RATIONAL=y
 # CONFIG_RAVE_SP_CORE is not set
-CONFIG_RCU_CPU_STALL_TIMEOUT=21
 CONFIG_RCU_TRACE=y
 CONFIG_REALTEK_PHY=y
 CONFIG_REFCOUNT_FULL=y
--- a/target/linux/tegra/config-5.10
+++ b/target/linux/tegra/config-5.10
@ -349,7 +349,6 @@ CONFIG_PWM_SYSFS=y
 CONFIG_PWM_TEGRA=y
 CONFIG_RAS=y
 CONFIG_RATIONAL=y
-CONFIG_RCU_CPU_STALL_TIMEOUT=21
 CONFIG_REGMAP=y
 CONFIG_REGMAP_I2C=y
 CONFIG_REGMAP_MMIO=y
--- a/target/linux/tegra/config-5.4
+++ b/target/linux/tegra/config-5.4
@ -342,7 +342,6 @@ CONFIG_PWM_SYSFS=y
 CONFIG_PWM_TEGRA=y
 CONFIG_RAS=y
 CONFIG_RATIONAL=y
-CONFIG_RCU_CPU_STALL_TIMEOUT=21
 CONFIG_REFCOUNT_FULL=y
 CONFIG_REGMAP=y
 CONFIG_REGMAP_I2C=y
--- a/target/linux/x86/Makefile
+++ b/target/linux/x86/Makefile
@ -10,8 +10,7 @@ BOARDNAME:=x86
 FEATURES:=squashfs ext4 vdi vmdk pcmcia targz fpu boot-part rootfs-part
 SUBTARGETS:=64 generic legacy geode

-KERNEL_PATCHVER:=5.4
-KERNEL_TESTING_PATCHVER:=5.10
+KERNEL_PATCHVER:=5.10

 KERNELNAME:=bzImage

--- a/tools/bison/Makefile
+++ b/tools/bison/Makefile
@ -7,11 +7,11 @@
 include $(TOPDIR)/rules.mk

 PKG_NAME:=bison
-PKG_VERSION:=3.7.4
+PKG_VERSION:=3.7.6

 PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.xz
 PKG_SOURCE_URL:=@GNU/$(PKG_NAME)
-PKG_HASH:=a3b5813f48a11e540ef26f46e4d288c0c25c7907d9879ae50e430ec49f63c010
+PKG_HASH:=67d68ce1e22192050525643fc0a7a22297576682bef6a5c51446903f5aeef3cf

 HOST_BUILD_PARALLEL:=1

--- a/tools/cmake/Makefile
+++ b/tools/cmake/Makefile
@ -7,14 +7,14 @@
 include $(TOPDIR)/rules.mk

 PKG_NAME:=cmake
-PKG_VERSION:=3.20.3
+PKG_VERSION:=3.21.2
 PKG_RELEASE:=1
 PKG_CPE_ID:=cpe:/a:kitware:cmake

 PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.gz
 PKG_SOURCE_URL:=https://github.com/Kitware/CMake/releases/download/v$(PKG_VERSION)/ \
 		https://cmake.org/files/v3.19/
-PKG_HASH:=4d008ac3461e271fcfac26a05936f77fc7ab64402156fb371d41284851a651b8
+PKG_HASH:=94275e0b61c84bb42710f5320a23c6dcb2c6ee032ae7d2a616f53f68b3d21659

 HOST_BUILD_PARALLEL:=1
 HOST_CONFIGURE_PARALLEL:=1
--- a/tools/cmake/patches/120-curl-fix-libressl-linking.patch
+++ b/tools/cmake/patches/120-curl-fix-libressl-linking.patch
@ -20,7 +20,7 @@ Signed-off-by: Jo-Philipp Wich <jo@mein.io>
 ---
 --- a/Utilities/cmcurl/CMakeLists.txt
 +++ b/Utilities/cmcurl/CMakeLists.txt
-@@ -508,6 +508,14 @@ if(CMAKE_USE_OPENSSL)
+@@ -528,6 +528,14 @@ if(CMAKE_USE_OPENSSL)
   endif()
   set(SSL_ENABLED ON)
   set(USE_OPENSSL ON)
--- a/tools/cmake/patches/130-bootstrap_parallel_make_flag.patch
+++ b/tools/cmake/patches/130-bootstrap_parallel_make_flag.patch
@ -1,6 +1,6 @@
 --- a/bootstrap
 +++ b/bootstrap
-@@ -1397,7 +1397,10 @@ int main(){ printf("1%c", (char)0x0a); r
+@@ -1420,7 +1420,10 @@ int main(){ printf("1%c", (char)0x0a); r
 ' > "test.c"
 cmake_original_make_flags="${cmake_make_flags}"
 if test "x${cmake_parallel_make}" != "x"; then
--- a/tools/dosfstools/Makefile
+++ b/tools/dosfstools/Makefile
@ -9,12 +9,12 @@ include $(TOPDIR)/rules.mk

 PKG_NAME:=dosfstools
 PKG_CPE_ID:=cpe:/a:dosfstools_project:dosfstools
-PKG_VERSION:=4.1
+PKG_VERSION:=4.2

 PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.xz
 PKG_SOURCE_URL:=https://github.com/dosfstools/dosfstools/releases/download/v$(PKG_VERSION)/ \
 		http://fossies.org/linux/misc
-PKG_HASH:=e6b2aca70ccc3fe3687365009dd94a2e18e82b688ed4e260e04b7412471cc173
+PKG_HASH:=ba7c716ff9b8208a3bba5094a77584a7dc814141de09ab4ce1ae9b84bbcd7844

 HOST_FIXUP:=autoreconf

--- a/tools/dosfstools/patches/0002-Switch-to-AC_CHECK_LIB-for-iconv-library-linking.patch
+++ b/tools/dosfstools/patches/0002-Switch-to-AC_CHECK_LIB-for-iconv-library-linking.patch
@ -1,27 +0,0 @@
-From 1c6c135ee15e449c1bf2e76d5307f83a3a1d7425 Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?=C3=81lvaro=20Fern=C3=A1ndez=20Rojas?= <noltari@gmail.com>
-Date: Tue, 11 Oct 2016 12:07:48 +0200
-Subject: [PATCH] Switch to AC_CHECK_LIB for iconv library linking.
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-AC_SEARCH_LIB doesn't work properly for openwrt/lede when building dosfstools
-as a package.
-
-Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
---
- configure.ac | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
--- a/configure.ac
-+++ b/configure.ac
-@@ -59,7 +59,7 @@ if test "x$with_udev" != "xno"; then
- 		  [true])
- fi
- 
-AC_SEARCH_LIBS(iconv_open, iconv)
-+AC_CHECK_LIB(iconv, iconv_open)
- 
- # xxd (distributed with vim) is used in the testsuite
- AC_CHECK_PROG([XXD_FOUND], [xxd], [yes])
--- a/tools/findutils/Makefile
+++ b/tools/findutils/Makefile
@ -8,16 +8,20 @@ include $(TOPDIR)/rules.mk

 PKG_NAME:=findutils
 PKG_CPE_ID:=cpe:/a:gnu:findutils
-PKG_VERSION:=4.7.0
+PKG_VERSION:=4.8.0

 PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.xz
 PKG_SOURCE_URL:=@GNU/$(PKG_NAME)
-PKG_HASH:=c5fefbdf9858f7e4feb86f036e1247a54c79fc2d8e4b7064d5aaa1f47dfa789a
+PKG_HASH:=57127b7e97d91282c6ace556378d5455a9509898297e46e10443016ea1387164

 HOST_BUILD_PARALLEL:=1

 include $(INCLUDE_DIR)/host-build.mk

+ifeq ($(HOST_OS),Darwin)
+	HOST_CFLAGS +=-D__nonnull\\(params\\)=
+endif
+
 HOST_CONFIGURE_ARGS += \
 	--enable-threads=pth \
 	--disable-rpath \
--- a/tools/firmware-utils/Makefile
+++ b/tools/firmware-utils/Makefile
@ -7,7 +7,7 @@
 include $(TOPDIR)/rules.mk

 PKG_NAME := firmware-utils
-PKG_RELEASE := 9
+PKG_RELEASE := 10

 include $(INCLUDE_DIR)/host-build.mk
 include $(INCLUDE_DIR)/kernel.mk
--- a/tools/firmware-utils/src/seama.h
+++ b/tools/firmware-utils/src/seama.h
@ -1,24 +1,10 @@
+// SPDX-License-Identifier: LGPL-2.1-or-later
 /* vi: set sw=4 ts=4: */
 /*
 *	(SEA)ttle i(MA)ge is the image which used in project seattle.
 *
 *	Created by David Hsieh <david_hsieh@alphanetworks.com>
 *	Copyright (C) 2008-2009 Alpha Networks, Inc.
- *
- *	This file is free software; you can redistribute it and/or
- *	modify it under the terms of the GNU Lesser General Public
- *	License as published by the Free Software Foundation; either'
- *	version 2.1 of the License, or (at your option) any later version.
- *
- *	The GNU C Library is distributed in the hope that it will be useful,'
- *	but WITHOUT ANY WARRANTY; without even the implied warranty of
- *	MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
- *	Lesser General Public License for more details.
- *
- *	You should have received a copy of the GNU Lesser General Public
- *	License along with the GNU C Library; if not, write to the Free
- *	Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
- *	02111-1307 USA.
 */

 #ifndef __SEAMA_HEADER_FILE__
--- a/tools/firmware-utils/src/tplink-safeloader.c
+++ b/tools/firmware-utils/src/tplink-safeloader.c
@ -1619,6 +1619,48 @@ static struct device_info boards[] = {
 		.last_sysupgrade_partition = "file-system"
 	},

+	/** Firmware layout for the TL-WA1201 v2 */
+	{
+		.id     = "TL-WA1201-V2",
+		.vendor = "",
+		.support_list =
+			"SupportList:\n"
+			"{product_name:TL-WA1201,product_ver:2.0.0,special_id:45550000}\n"
+			"{product_name:TL-WA1201,product_ver:2.0.0,special_id:55530000}\n",
+		.part_trail = 0x00,
+		.soft_ver = "soft_ver:1.0.1 Build 20200709 rel.66244\n",
+
+		.partitions = {
+			{"fs-uboot", 0x00000, 0x20000},
+			{"default-mac", 0x20000, 0x00200},
+			{"pin", 0x20200, 0x00100},
+			{"product-info", 0x20300, 0x00200},
+			{"device-id", 0x20500, 0x0fb00},
+			{"firmware", 0x30000, 0xce0000},
+			{"portal-logo", 0xd10000, 0x20000},
+			{"portal-back", 0xd30000, 0x200000},
+			{"soft-version", 0xf30000, 0x00200},
+			{"extra-para", 0xf30200, 0x00200},
+			{"support-list", 0xf30400, 0x00200},
+			{"profile", 0xf30600, 0x0fa00},
+			{"apdef-config", 0xf40000, 0x10000},
+			{"ap-config", 0xf50000, 0x10000},
+			{"redef-config", 0xf60000, 0x10000},
+			{"re-config", 0xf70000, 0x10000},
+			{"multidef-config", 0xf80000, 0x10000},
+			{"multi-config", 0xf90000, 0x10000},
+			{"clientdef-config", 0xfa0000, 0x10000},
+			{"client-config", 0xfb0000, 0x10000},
+			{"partition-table", 0xfc0000, 0x10000},
+			{"user-config", 0xfd0000, 0x10000},
+			{"certificate", 0xfe0000, 0x10000},
+			{"radio", 0xff0000, 0x10000},
+			{NULL, 0, 0}
+		},
+		.first_sysupgrade_partition = "os-image",
+		.last_sysupgrade_partition = "file-system",
+	},
+
 	/** Firmware layout for the TL-WA850RE v2 */
 	{
 		.id     = "TLWA850REV2",
@ -2680,6 +2722,7 @@ static struct image_partition_entry make_soft_version(
 		.year_lo = bcd(tm->tm_year%100),
 		.month = bcd(tm->tm_mon+1),
 		.day = bcd(tm->tm_mday),
+		.rev = htonl(rev),

 		.compat_level = htonl(info->soft_ver_compat_level)
 	};
@ -2995,7 +3038,8 @@ static void build_image(const char *output,
 		const uint8_t extra_para[2] = {0x01, 0x00};
 		parts[5] = make_extra_para(info, extra_para,
 			sizeof(extra_para));
-	} else if (strcasecmp(info->id, "ARCHER-C6-V2") == 0) {
+	} else if (strcasecmp(info->id, "ARCHER-C6-V2") == 0 ||
+		   strcasecmp(info->id, "TL-WA1201-V2") == 0) {
 		const uint8_t extra_para[2] = {0x00, 0x01};
 		parts[5] = make_extra_para(info, extra_para,
 			sizeof(extra_para));
@ -3368,6 +3412,7 @@ static int firmware_info(const char *input)

 			printf("Version: %d.%d.%d\n", s->version_major, s->version_minor, s->version_patch);
 			printf("Date: %02x%02x-%02x-%02x\n", s->year_hi, s->year_lo, s->month, s->day);
+			printf("Revision: %d\n", ntohl(s->rev));
 		} else {
 			printf("Failed to parse data\n");
 		}
--- a/tools/libressl/Makefile
+++ b/tools/libressl/Makefile
@ -8,8 +8,8 @@
 include $(TOPDIR)/rules.mk

 PKG_NAME:=libressl
-PKG_VERSION:=3.3.3
-PKG_HASH:=a471565b36ccd1a70d0bd7d37c6e95c43a26a62829b487d9d2cdebfe58be3066
+PKG_VERSION:=3.3.4
+PKG_HASH:=bcce767a3fed252bfd1210f8a7e3505a2b54d3008f66e43d9b95e3f30c072931
 PKG_RELEASE:=1

 PKG_CPE_ID:=cpe:/a:openbsd:libressl
--- a/tools/libtool/Makefile
+++ b/tools/libtool/Makefile
@ -8,11 +8,11 @@ include $(TOPDIR)/rules.mk

 PKG_NAME:=libtool
 PKG_CPE_ID:=cpe:/a:gnu:libtool
-PKG_VERSION:=2.4
+PKG_VERSION:=2.4.2

 PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.xz
 PKG_SOURCE_URL:=@GNU/$(PKG_NAME)
-PKG_HASH:=afcce660d3dc54c63a0a5ba3cf05272239dc3c54bbeba20f6bad250f9dc007ae
+PKG_HASH:=1d7b6862c1ed162e327f083a6f78f40eae29218f0db8c38393d61dab764c4407

 HOST_BUILD_PARALLEL:=1

--- a/tools/libtool/patches/000-relocatable.patch
+++ b/tools/libtool/patches/000-relocatable.patch
@ -29,7 +29,7 @@
 
 --- a/libtoolize.in
 +++ b/libtoolize.in
-@@ -326,15 +326,22 @@ as_unset=as_fn_unset
+@@ -334,15 +334,22 @@ as_unset=as_fn_unset
 
 : ${CP="cp -f"}
 test "${ECHO+set}" = set || ECHO=${as_echo-'printf %s\n'}
@ -56,7 +56,7 @@
 : ${SHELL="${CONFIG_SHELL-/bin/sh}"}
 : ${Xsed="$SED -e 1s/^X//"}
 
-@@ -2476,10 +2483,17 @@ func_check_macros ()
+@@ -2487,10 +2494,17 @@ func_check_macros ()
 
   # Locations for important files:
   prefix=@prefix@
@ -80,7 +80,7 @@
   configure_ac=configure.in
 --- a/libtoolize.m4sh
 +++ b/libtoolize.m4sh
-@@ -1450,10 +1450,17 @@ func_check_macros ()
+@@ -1453,10 +1453,17 @@ func_check_macros ()
 
   # Locations for important files:
   prefix=@prefix@
@ -104,7 +104,7 @@
   configure_ac=configure.in
 --- a/libltdl/m4/libtool.m4
 +++ b/libltdl/m4/libtool.m4
-@@ -875,9 +875,8 @@ dnl AC_DEFUN([AC_LIBTOOL_RC], [])
+@@ -907,9 +907,8 @@ dnl AC_DEFUN([AC_LIBTOOL_RC], [])
 # ----------------
 m4_defun([_LT_TAG_COMPILER],
 [AC_REQUIRE([AC_PROG_CC])dnl
@ -115,7 +115,7 @@
 _LT_TAGDECL([CC], [compiler], [1], [A language specific compiler])dnl
 _LT_TAGDECL([with_gcc], [GCC], [0], [Is the compiler the GNU compiler?])dnl
 
-@@ -7509,9 +7508,9 @@ m4_defun([_LT_DECL_EGREP],
+@@ -7660,9 +7659,9 @@ m4_defun([_LT_DECL_EGREP],
 [AC_REQUIRE([AC_PROG_EGREP])dnl
 AC_REQUIRE([AC_PROG_FGREP])dnl
 test -z "$GREP" && GREP=grep
@ -128,7 +128,7 @@
 dnl Non-bleeding-edge autoconf doesn't subst GREP, so do it here too
 AC_SUBST([GREP])
 ])
-@@ -7544,9 +7543,8 @@ AC_SUBST([DLLTOOL])
+@@ -7695,9 +7694,8 @@ AC_SUBST([DLLTOOL])
 # as few characters as possible.  Prefer GNU sed if found.
 m4_defun([_LT_DECL_SED],
 [AC_PROG_SED
--- a/tools/libtool/patches/001-fix-func_append.patch
+++ b/tools/libtool/patches/001-fix-func_append.patch
@ -1,22 +0,0 @@
--- a/libltdl/config/ltmain.m4sh
-+++ b/libltdl/config/ltmain.m4sh
-@@ -7261,7 +7261,7 @@ EOF
- 	    elif test -n "$runpath_var"; then
- 	      case "$perm_rpath " in
- 	      *" $libdir "*) ;;
-	      *) func_apped perm_rpath " $libdir" ;;
-+	      *) func_append perm_rpath " $libdir" ;;
- 	      esac
- 	    fi
- 	  done
--- a/libltdl/config/ltmain.sh
-+++ b/libltdl/config/ltmain.sh
-@@ -8050,7 +8050,7 @@ EOF
- 	    elif test -n "$runpath_var"; then
- 	      case "$perm_rpath " in
- 	      *" $libdir "*) ;;
-	      *) func_apped perm_rpath " $libdir" ;;
-+	      *) func_append perm_rpath " $libdir" ;;
- 	      esac
- 	    fi
- 	  done
--- a/tools/libtool/patches/100-libdir-fixes.patch
+++ b/tools/libtool/patches/100-libdir-fixes.patch
@ -1,6 +1,6 @@
 --- a/libltdl/config/ltmain.m4sh
 +++ b/libltdl/config/ltmain.m4sh
-@@ -5715,8 +5715,14 @@ func_mode_link ()
+@@ -5731,8 +5731,14 @@ func_mode_link ()
 	    absdir="$abs_ladir"
 	    libdir="$abs_ladir"
 	  else
@ -17,7 +17,7 @@
 	  fi
 	  test "X$hardcode_automatic" = Xyes && avoidtemprpath=yes
 	else
-@@ -6114,8 +6120,6 @@ func_mode_link ()
+@@ -6130,8 +6136,6 @@ func_mode_link ()
 		add="$libdir/$linklib"
 	      fi
 	    else
@ -26,7 +26,7 @@
 	      # Try looking first in the location we're being installed to.
 	      if test -n "$inst_prefix_dir"; then
 		case $libdir in
-@@ -6270,7 +6274,17 @@ func_mode_link ()
+@@ -6286,7 +6290,17 @@ func_mode_link ()
 		  fi
 		  ;;
 		*)
@ -47,7 +47,7 @@
 		else
 --- a/libltdl/config/ltmain.sh
 +++ b/libltdl/config/ltmain.sh
-@@ -6504,8 +6504,14 @@ func_mode_link ()
+@@ -6518,8 +6518,14 @@ func_mode_link ()
 	    absdir="$abs_ladir"
 	    libdir="$abs_ladir"
 	  else
@ -64,7 +64,7 @@
 	  fi
 	  test "X$hardcode_automatic" = Xyes && avoidtemprpath=yes
 	else
-@@ -6903,8 +6909,6 @@ func_mode_link ()
+@@ -6917,8 +6923,6 @@ func_mode_link ()
 		add="$libdir/$linklib"
 	      fi
 	    else
@ -73,7 +73,7 @@
 	      # Try looking first in the location we're being installed to.
 	      if test -n "$inst_prefix_dir"; then
 		case $libdir in
-@@ -7059,7 +7063,17 @@ func_mode_link ()
+@@ -7073,7 +7077,17 @@ func_mode_link ()
 		  fi
 		  ;;
 		*)
--- a/tools/libtool/patches/110-dont-use-target-dir-for-relinking.patch
+++ b/tools/libtool/patches/110-dont-use-target-dir-for-relinking.patch
@ -1,6 +1,6 @@
 --- a/libltdl/config/ltmain.m4sh
 +++ b/libltdl/config/ltmain.m4sh
-@@ -6104,7 +6104,6 @@ func_mode_link ()
+@@ -6120,7 +6120,6 @@ func_mode_link ()
 	       test "$hardcode_direct_absolute" = no; then
 	      add="$libdir/$linklib"
 	    elif test "$hardcode_minus_L" = yes; then
@ -10,7 +10,7 @@
 	      case :$finalize_shlibpath: in
 --- a/libltdl/config/ltmain.sh
 +++ b/libltdl/config/ltmain.sh
-@@ -6893,7 +6893,6 @@ func_mode_link ()
+@@ -6907,7 +6907,6 @@ func_mode_link ()
 	       test "$hardcode_direct_absolute" = no; then
 	      add="$libdir/$linklib"
 	    elif test "$hardcode_minus_L" = yes; then
--- a/tools/libtool/patches/120-strip-unsafe-dirs-for-relinking.patch
+++ b/tools/libtool/patches/120-strip-unsafe-dirs-for-relinking.patch
@ -12,7 +12,7 @@
 	    'func_fatal_error "error: relink \`$file'\'' with the above command before installing it"'
 --- a/libltdl/config/ltmain.sh
 +++ b/libltdl/config/ltmain.sh
-@@ -2972,6 +2972,9 @@ func_mode_install ()
+@@ -2973,6 +2973,9 @@ func_mode_install ()
 	    relink_command=`$ECHO "$relink_command" | $SED "s%@inst_prefix_dir@%%"`
 	  fi
 
--- a/tools/libtool/patches/150-trailingslash.patch
+++ b/tools/libtool/patches/150-trailingslash.patch
@ -11,7 +11,7 @@ Nitin A Kamble <nitin.a.kamble@intel.com>

 --- a/libltdl/config/ltmain.m4sh
 +++ b/libltdl/config/ltmain.m4sh
-@@ -2164,8 +2164,15 @@ func_mode_install ()
+@@ -2167,8 +2167,15 @@ func_mode_install ()
 	func_append dir "$objdir"
 
 	if test -n "$relink_command"; then
@ -30,7 +30,7 @@ Nitin A Kamble <nitin.a.kamble@intel.com>
 	  # location b/c this prevents finding dependent libraries that
 --- a/libltdl/config/ltmain.sh
 +++ b/libltdl/config/ltmain.sh
-@@ -2953,8 +2953,15 @@ func_mode_install ()
+@@ -2954,8 +2954,15 @@ func_mode_install ()
 	func_append dir "$objdir"
 
 	if test -n "$relink_command"; then
--- a/tools/libtool/patches/160-passthrough-ssp.patch
+++ b/tools/libtool/patches/160-passthrough-ssp.patch
@ -1,7 +1,7 @@
 diff -ur libtool-2.4.orig/libltdl/config/ltmain.m4sh libtool-2.4/libltdl/config/ltmain.m4sh
 --- libtool-2.4.orig/libltdl/config/ltmain.m4sh	2015-06-18 10:46:15.499996979 +0200
 +++ libtool-2.4/libltdl/config/ltmain.m4sh	2015-06-18 10:48:24.686882213 +0200
-@@ -5061,7 +5061,7 @@
+@@ -5076,7 +5076,7 @@
       # -O*, -flto*, -fwhopr*, -fuse-linker-plugin GCC link-time optimization
       -64|-mips[0-9]|-r[0-9][0-9]*|-xarch=*|-xtarget=*|+DA*|+DD*|-q*|-m*| \
       -t[45]*|-txscale*|-p|-pg|--coverage|-fprofile-*|-F*|@*|-tp=*|--sysroot=*| \
--- a/tools/libtool/patches/200-openwrt-branding.patch
+++ b/tools/libtool/patches/200-openwrt-branding.patch
@ -28,7 +28,7 @@
     :
 --- a/libltdl/config/ltmain.sh
 +++ b/libltdl/config/ltmain.sh
-@@ -443,7 +443,7 @@ opt_warning=:
+@@ -439,7 +439,7 @@ opt_warning=:
 # name if it has been set yet.
 func_echo ()
 {
@ -37,7 +37,7 @@
 }
 
 # func_verbose arg...
-@@ -469,14 +469,14 @@ func_echo_all ()
+@@ -465,14 +465,14 @@ func_echo_all ()
 # Echo program name prefixed message to standard error.
 func_error ()
 {
@ -56,7 +56,7 @@
     :
 --- a/libtoolize.in
 +++ b/libtoolize.in
-@@ -640,7 +640,7 @@ opt_warning=:
+@@ -648,7 +648,7 @@ opt_warning=:
 # name if it has been set yet.
 func_echo ()
 {
@ -65,7 +65,7 @@
 }
 
 # func_verbose arg...
-@@ -666,14 +666,14 @@ func_echo_all ()
+@@ -674,14 +674,14 @@ func_echo_all ()
 # Echo program name prefixed message to standard error.
 func_error ()
 {
@ -84,7 +84,7 @@
     :
 --- a/tests/defs.in
 +++ b/tests/defs.in
-@@ -588,7 +588,7 @@ opt_warning=:
+@@ -596,7 +596,7 @@ opt_warning=:
 # name if it has been set yet.
 func_echo ()
 {
@ -93,7 +93,7 @@
 }
 
 # func_verbose arg...
-@@ -614,14 +614,14 @@ func_echo_all ()
+@@ -622,14 +622,14 @@ func_echo_all ()
 # Echo program name prefixed message to standard error.
 func_error ()
 {
--- a/tools/tar/Makefile
+++ b/tools/tar/Makefile
@ -8,11 +8,11 @@ include $(TOPDIR)/rules.mk

 PKG_NAME:=tar
 PKG_CPE_ID:=cpe:/a:gnu:tar
-PKG_VERSION:=1.32
+PKG_VERSION:=1.34

 PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.xz
 PKG_SOURCE_URL:=@GNU/tar
-PKG_HASH:=d0d3ae07f103323be809bc3eac0dcc386d52c5262499fe05511ac4788af1fdd8
+PKG_HASH:=63bebd26879c5e1eea4352f0d03c991f966aeb3ddeb3c7445c902568d5411d28

 HOST_BUILD_PARALLEL:=1

--- a/tools/tar/patches/110-symlink-force-permissions.patch
+++ b/tools/tar/patches/110-symlink-force-permissions.patch
@ -1,6 +1,6 @@
 --- a/src/create.c
 +++ b/src/create.c
-@@ -1852,6 +1852,7 @@ dump_file0 (struct tar_stat_info *st, ch
+@@ -1844,6 +1844,7 @@ dump_file0 (struct tar_stat_info *st, ch
 #ifdef HAVE_READLINK
   else if (S_ISLNK (st->stat.st_mode))
     {
--- a/tools/zstd/Makefile
+++ b/tools/zstd/Makefile
@ -1,11 +1,11 @@
 include $(TOPDIR)/rules.mk

 PKG_NAME:=zstd
-PKG_VERSION:=1.4.8
+PKG_VERSION:=1.5.0

 PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.gz
 PKG_SOURCE_URL:=https://github.com/facebook/zstd/releases/download/v$(PKG_VERSION)
-PKG_HASH:=32478297ca1500211008d596276f5367c54198495cf677e9439f4791a4c69f24
+PKG_HASH:=5194fbfa781fcf45b98c5e849651aa7b3b0a008c6b72d4a0db760f3002291e94

 PKG_LICENSE:=BSD-3-Clause
 PKG_LICENSE_FILES:=LICENSE