Merge Official Source

Signed-off-by: Tianling Shen <cnsztl@immortalwrt.org>
This commit is contained in:
Tianling Shen 2024-07-02 15:42:18 +08:00
commit dd4624e1eb
No known key found for this signature in database
GPG Key ID: 6850B6345C862176
86 changed files with 2672 additions and 433 deletions

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@ -67,6 +67,10 @@ HOST_CONFIGURE_ARGS = \
--localstatedir=$(HOST_BUILD_PREFIX)/var \
--sbindir=$(HOST_BUILD_PREFIX)/bin
ifneq ($(YEAR_2038),y)
HOST_CONFIGURE_ARGS += --disable-year2038
endif
HOST_MAKE_VARS = \
CFLAGS="$(HOST_CFLAGS)" \
CPPFLAGS="$(HOST_CPPFLAGS)" \

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@ -1,2 +1,2 @@
LINUX_VERSION-5.15 = .158
LINUX_KERNEL_HASH-5.15.158 = f9071c83a4fd8b80af026b48cfc1869bfa25883f9148b92b5dc1e1e1e26dd5c6
LINUX_VERSION-5.15 = .161
LINUX_KERNEL_HASH-5.15.161 = d629f78680dc4b65e3d78b61406fb7757b960c83c206e63ad8c2606b3e3c474c

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@ -6,9 +6,9 @@ PKG_RELEASE:=1
PKG_SOURCE_URL:=https://github.com/openwrt/bcm63xx-cfe.git
PKG_SOURCE_PROTO:=git
PKG_SOURCE_DATE:=2021-06-22
PKG_SOURCE_VERSION:=e5050f37150b34deb547b50feccd0e7439cb5bd7
PKG_MIRROR_HASH:=3b53abf21790e42707e20c73aff23fc32db9fdaf010da6f459a20a9e8f8feae6
PKG_SOURCE_DATE:=2024-06-25
PKG_SOURCE_VERSION:=6519bd2dde3535cafeea43157755f4dbef2f90c5
PKG_MIRROR_HASH:=db4da580b7a611a2b4ddd4ff812e5f8ddfd9694b6f5fd8246a341e61967c00ef
PKG_FLAGS:=nonshared

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@ -5,7 +5,7 @@
include $(TOPDIR)/rules.mk
PKG_NAME:=hostapd
PKG_RELEASE:=1
PKG_RELEASE:=2
PKG_SOURCE_URL:=https://w1.fi/hostap.git
PKG_SOURCE_PROTO:=git

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@ -0,0 +1,44 @@
From a329773522953892d9bb4548482d42fc93fea329 Mon Sep 17 00:00:00 2001
From: David Bauer <mail@david-bauer.net>
Date: Thu, 27 Jun 2024 18:45:19 +0200
Subject: [PATCH] AP: don't ignore probe-requests with invalid DSSS params
Don't ignore probe requests which contain an invalid DS parameter for the
current operating channel.
As the comment outlines, the drop shall only apply if
dot11RadioMeasurementActivated is set to 1.
However, it was observed Linux clients (Debian 12 / NixOS 23.11)
with an Intel 8265 NIC may generate a probe request frame with
dot11RadioMeasurementActivated set to false and an invalid DSSS
parameter.
These were also dropped even though they should not have been. They
however should not have contained this parameter in the first place.
Don't drop Probe Requests which contain such an invalid field. This may
lead to more probe responses being sent, however it does fix very
frequent connection issues for these clients on 2.4 GHz.
Signed-off-by: David Bauer <mail@david-bauer.net>
---
src/ap/beacon.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/ap/beacon.c b/src/ap/beacon.c
index 8cd1c4170..bb9329085 100644
--- a/src/ap/beacon.c
+++ b/src/ap/beacon.c
@@ -905,7 +905,7 @@ void handle_probe_req(struct hostapd_data *hapd,
* is less likely to see them (Probe Request frame sent on a
* neighboring, but partially overlapping, channel).
*/
- if (elems.ds_params &&
+ if (elems.ds_params && 0 &&
hapd->iface->current_mode &&
(hapd->iface->current_mode->mode == HOSTAPD_MODE_IEEE80211G ||
hapd->iface->current_mode->mode == HOSTAPD_MODE_IEEE80211B) &&
--
2.43.0

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@ -19,7 +19,7 @@ PKG_LICENSE:=GPL-2.0
PKG_LICENSE_FILES:=NOTICE
PKG_CPE_ID:=cpe:/a:e2fsprogs_project:e2fsprogs
PKG_BUILD_DEPENDS:=util-linux e2fsprogs/host
PKG_BUILD_DEPENDS:=util-linux
PKG_INSTALL:=1
PKG_BUILD_PARALLEL:=1
@ -225,23 +225,6 @@ define Build/InstallDev
$(CP) $(PKG_BUILD_DIR)/lib/e2p/e2p.h $(1)/usr/include/e2p
endef
define Host/Compile
$(MAKE) $(PKG_JOBS) -C $(HOST_BUILD_DIR)/lib/ss mk_cmds
$(MAKE) $(PKG_JOBS) -C $(HOST_BUILD_DIR)/lib/et compile_et
endef
define Host/Install
$(INSTALL_DIR) $(1)/share/et
$(CP) $(HOST_BUILD_DIR)/lib/et/et_[ch].awk $(1)/share/et/
$(INSTALL_DIR) $(1)/share/ss
$(CP) $(HOST_BUILD_DIR)/lib/ss/ct_c.{sed,awk} $(1)/share/ss/
$(INSTALL_DIR) $(1)/bin
$(CP) \
$(HOST_BUILD_DIR)/lib/et/compile_et \
$(HOST_BUILD_DIR)/lib/ss/mk_cmds \
$(1)/bin/
endef
define Package/e2fsprogs/conffiles
/etc/e2fsck.conf
endef
@ -354,4 +337,3 @@ $(eval $(call BuildPackage,filefrag))
$(eval $(call BuildPackage,debugfs))
$(eval $(call BuildPackage,chattr))
$(eval $(call BuildPackage,lsattr))
$(eval $(call HostBuild))

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@ -8,15 +8,14 @@
include $(TOPDIR)/rules.mk
PKG_NAME:=mtd-utils
PKG_VERSION:=2.1.6
PKG_RELEASE:=3
PKG_VERSION:=2.2.0
PKG_RELEASE:=1
PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.bz2
PKG_SOURCE_URL:=https://infraroot.at/pub/mtd/
PKG_HASH:=c1d853bc4adf83bcabd2792fc95af33bdd8643c97e8f7b3f0180af36af76f0e5
PKG_HASH:=250d082f67375ca8451b5fcfc9a23a53ced3ebebd8312c288daf2507bbab1324
PKG_INSTALL:=1
PKG_FIXUP:=autoreconf
PKG_FLAGS:=nonshared
PKG_BUILD_FLAGS:=gc-sections
@ -63,7 +62,8 @@ CONFIGURE_ARGS += \
--without-crypto \
--without-xattr \
--without-zstd \
--without-lzo
--without-lzo \
--without-zlib
define Package/ubi-utils/install
$(INSTALL_DIR) $(1)/usr/sbin

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@ -26,6 +26,7 @@ qstrip=$(strip $(subst ",,$(1)))
empty:=
space:= $(empty) $(empty)
comma:=,
pound:=\#
merge=$(subst $(space),,$(1))
confvar=$(shell echo '$(foreach v,$(1),$(v)=$(subst ','\'',$($(v))))' | $(MKHASH) md5)
strip_last=$(patsubst %.$(lastword $(subst .,$(space),$(1))),%,$(1))
@ -378,6 +379,19 @@ define shexport
export $(call shvar,$(1))=$$(call $(1))
endef
# Test support for 64-bit time with C code from largefile.m4 provided by GNU Gnulib
# the value is 'y' when successful and '' otherwise
define YEAR_2038
$(shell \
mkdir -p $(TMP_DIR); \
echo '$(pound) include <time.h>' > $(TMP_DIR)/year2038.c; \
echo '$(pound) define LARGE_TIME_T ((time_t) (((time_t) 1 << 30) - 1 + 3 * ((time_t) 1 << 30)))' >> $(TMP_DIR)/year2038.c; \
echo 'int verify_time_t_range[(LARGE_TIME_T / 65537 == 65535 && LARGE_TIME_T % 65537 == 0) ? 1 : -1];' >> $(TMP_DIR)/year2038.c; \
echo 'int main (void) {return 0;}' >> $(TMP_DIR)/year2038.c; \
$(HOSTCC) $(TMP_DIR)/year2038.c -o /dev/null 2>/dev/null && echo y && rm -f $(TMP_DIR)/year2038.c || rm -f $(TMP_DIR)/year2038.c; \
)
endef
# Execute commands under flock
# $(1) => The shell expression.
# $(2) => The lock name. If not given, the global lock will be used.

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@ -18,6 +18,7 @@ sercomm,h500-s-vfes)
uci add_list firewall.@zone[0].network='qtn'
;;
comtrend,vg-8050 |\
sagem,fast-3864-op |\
sercomm,shg2500)
ucidef_set_bridge_device switch
ucidef_set_interfaces_lan_wan "lan1 lan2 lan3 lan4" "wan"

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@ -10,7 +10,8 @@ platform_check_image() {
platform_do_upgrade() {
case "$(board_name)" in
comtrend,vg-8050 |\
comtrend,vr-3032u)
comtrend,vr-3032u |\
sagem,fast-3864-op)
CI_JFFS2_CLEAN_MARKERS=1
nand_do_upgrade "$1"
;;

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@ -0,0 +1,283 @@
// SPDX-License-Identifier: GPL-2.0-or-later
#include "bcm63268.dtsi"
/ {
model = "Sagemcom F@ST 3864 OP";
compatible = "sagem,fast-3864-op", "brcm,bcm63168", "brcm,bcm63268";
aliases {
led-boot = &led_power_green;
led-failsafe = &led_power_red;
led-running = &led_power_green;
led-upgrade = &led_power_green;
};
keys {
compatible = "gpio-keys-polled";
poll-interval = <100>;
reset {
label = "reset";
gpios = <&gpio 32 GPIO_ACTIVE_LOW>;
linux,code = <KEY_RESTART>;
debounce-interval = <60>;
};
wps {
label = "wps";
gpios = <&gpio 33 GPIO_ACTIVE_LOW>;
linux,code = <KEY_WPS_BUTTON>;
debounce-interval = <60>;
};
wlan {
label = "wlan";
gpios = <&gpio 34 GPIO_ACTIVE_LOW>;
linux,code = <KEY_WLAN>;
debounce-interval = <60>;
};
};
};
&ehci {
status = "okay";
};
&ethernet {
status = "okay";
nvmem-cells = <&macaddr_cferom_6a0>;
nvmem-cell-names = "mac-address";
};
&leds {
status = "okay";
brcm,serial-leds;
brcm,serial-dat-low;
brcm,serial-shift-inv;
brcm,serial-mux;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_leds &pinctrl_serial_led>;
led@0 {
reg = <0>;
active-low;
function = LED_FUNCTION_WPS;
color = <LED_COLOR_ID_GREEN>;
};
led@1 {
reg = <1>;
active-low;
function = LED_FUNCTION_WPS;
color = <LED_COLOR_ID_RED>;
};
led@2 {
reg = <2>;
active-low;
label = "red:internet";
};
led@3 {
reg = <3>;
active-low;
label = "green:dsl";
};
led@4 {
reg = <4>;
active-low;
label = "green:fxs";
};
led@5 {
reg = <5>;
active-low;
label = "red:fxs";
};
led@8 {
reg = <8>;
active-low;
label = "green:internet";
};
led@9 {
reg = <9>;
active-low;
label = "green:dsl_bonding";
};
led_power_red: led@15 {
reg = <15>;
active-low;
function = LED_FUNCTION_POWER;
color = <LED_COLOR_ID_RED>;
};
led_power_green: led@20 {
reg = <20>;
active-low;
function = LED_FUNCTION_POWER;
color = <LED_COLOR_ID_GREEN>;
};
};
&mdio_ext {
switch@1e {
compatible = "brcm,bcm53125";
reg = <0x1e>;
dsa,member = <1 0>;
ports {
#address-cells = <1>;
#size-cells = <0>;
port@1 {
reg = <1>;
label = "lan4";
};
port@2 {
reg = <2>;
label = "lan3";
};
port@3 {
reg = <3>;
label = "lan2";
};
port@4 {
reg = <4>;
label = "lan1";
};
port@8 {
reg = <8>;
phy-mode = "rgmii";
ethernet = <&switch0port4>;
fixed-link {
speed = <1000>;
full-duplex;
asym-pause;
pause;
};
};
};
};
};
&nflash {
status = "okay";
nandcs@0 {
compatible = "brcm,nandcs";
reg = <0>;
nand-ecc-step-size = <512>;
nand-ecc-strength = <15>;
nand-on-flash-bbt;
brcm,nand-oob-sector-size = <64>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "cferom_nvram";
reg = <0x00000000 0x00020000>;
read-only;
nvmem-layout {
compatible = "fixed-layout";
#address-cells = <1>;
#size-cells = <1>;
macaddr_cferom_6a0: macaddr@6a0 {
reg = <0x6a0 0x6>;
};
};
};
partition@20000 {
compatible = "brcm,wfi-split";
label = "wfi";
reg = <0x00020000 0x7ac0000>;
};
partition@7ae0000 {
label = "stock_hidden1";
reg = <0x07ae0000 0x0020000>;
read-only;
};
partition@7b00000 {
label = "stock_data";
reg = <0x07b00000 0x0400000>;
read-only;
};
partition@7f00000 {
label = "stock_hidden2";
reg = <0x07f00000 0x0100000>;
read-only;
};
};
};
};
&ohci {
status = "okay";
};
&pcie {
status = "okay";
};
&pinctrl {
pinctrl_leds: leds {
function = "led";
pins = "gpio8", "gpio9", "gpio15",
"gpio20";
};
};
&switch0 {
dsa,member = <0 0>;
ports {
port@3 {
reg = <3>;
label = "wan";
phy-handle = <&phy4>;
};
switch0port4: port@4 {
reg = <4>;
label = "extsw";
phy-mode = "rgmii";
fixed-link {
speed = <1000>;
full-duplex;
};
};
};
};
&uart0 {
status = "okay";
};
&usbh {
status = "okay";
};

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@ -42,6 +42,7 @@
cpus {
#address-cells = <1>;
#size-cells = <0>;
mips-cbr-reg = <0xff400000>;
mips-hpt-frequency = <150000000>;
cpu@0 {

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@ -43,6 +43,7 @@
cpus {
#address-cells = <1>;
#size-cells = <0>;
mips-cbr-reg = <0xff400000>;
mips-hpt-frequency = <200000000>;
cpu@0 {

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@ -25,7 +25,6 @@
#include <linux/phy.h>
#include <linux/platform_device.h>
#include <linux/reset.h>
#include <linux/version.h>
/* DMA channels */
#define DMA_CHAN_WIDTH 0x10
@ -1647,11 +1646,7 @@ static int bcm6348_emac_probe(struct platform_device *pdev)
ndev->min_mtu = ETH_ZLEN - ETH_HLEN;
ndev->mtu = ETH_DATA_LEN - VLAN_ETH_HLEN;
ndev->max_mtu = ENET_MAX_MTU - VLAN_ETH_HLEN;
#if LINUX_VERSION_CODE >= KERNEL_VERSION(6,1,0)
netif_napi_add(ndev, &emac->napi, bcm6348_emac_poll);
#else
netif_napi_add(ndev, &emac->napi, bcm6348_emac_poll, 16);
#endif
netif_napi_add_weight(ndev, &emac->napi, bcm6348_emac_poll, 16);
SET_NETDEV_DEV(ndev, dev);
ret = devm_register_netdev(dev, ndev);

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@ -20,7 +20,6 @@
#include <linux/pm_domain.h>
#include <linux/pm_runtime.h>
#include <linux/reset.h>
#include <linux/version.h>
/* TODO: Bigger frames may work but we do not trust that they are safe on all
* platforms so more research is needed, a max frame size of 2048 has been
@ -1077,11 +1076,7 @@ static int bcm6368_enetsw_probe(struct platform_device *pdev)
ndev->min_mtu = ETH_ZLEN;
ndev->mtu = ETH_DATA_LEN;
ndev->max_mtu = ENETSW_MAX_MTU;
#if LINUX_VERSION_CODE >= KERNEL_VERSION(6,1,0)
netif_napi_add(ndev, &priv->napi, bcm6368_enetsw_poll);
#else
netif_napi_add(ndev, &priv->napi, bcm6368_enetsw_poll, 16);
#endif
netif_napi_add_weight(ndev, &priv->napi, bcm6368_enetsw_poll, 16);
ret = devm_register_netdev(dev, ndev);
if (ret) {

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@ -38,6 +38,26 @@ define Device/comtrend_vr-3032u
endef
TARGET_DEVICES += comtrend_vr-3032u
define Device/sagem_fast-3864-op
$(Device/bcm63xx-nand)
DEVICE_VENDOR := Sagemcom
DEVICE_MODEL := F@ST 3864
DEVICE_VARIANT := OP
CHIP_ID := 63268
SOC := bcm63168
CFE_RAM_FILE := sagem,fast-3864-op/cferam.000
CFE_RAM_JFFS2_NAME := cferam.000
BLOCKSIZE := 128k
PAGESIZE := 2048
SUBPAGESIZE := 512
VID_HDR_OFFSET := 2048
DEVICE_PACKAGES += $(USB2_PACKAGES) \
kmod-leds-bcm6328
CFE_WFI_FLASH_TYPE := 3
CFE_WFI_VERSION := 0x5732
endef
TARGET_DEVICES += sagem_fast-3864-op
define Device/sercomm_h500-s-lowi
$(Device/sercomm-nand)
DEVICE_VENDOR := Sercomm

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@ -0,0 +1,35 @@
From ce5cdd3b05216b704a704f466fb4c2dff3778caf Mon Sep 17 00:00:00 2001
From: Christian Marangi <ansuelsmth@gmail.com>
Date: Tue, 11 Jun 2024 13:35:33 +0200
Subject: [PATCH] mips: bmips: BCM6358: make sure CBR is correctly set
It was discovered that some device have CBR address set to 0 causing
kernel panic when arch_sync_dma_for_cpu_all is called.
This was notice in situation where the system is booted from TP1 and
BMIPS_GET_CBR() returns 0 instead of a valid address and
!!(read_c0_brcm_cmt_local() & (1 << 31)); not failing.
The current check whether RAC flush should be disabled or not are not
enough hence lets check if CBR is a valid address or not.
Fixes: ab327f8acdf8 ("mips: bmips: BCM6358: disable RAC flush for TP1")
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Acked-by: Florian Fainelli <florian.fainelli@broadcom.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
---
arch/mips/bmips/setup.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
--- a/arch/mips/bmips/setup.c
+++ b/arch/mips/bmips/setup.c
@@ -110,7 +110,8 @@ static void bcm6358_quirks(void)
* RAC flush causes kernel panics on BCM6358 when booting from TP1
* because the bootloader is not initializing it properly.
*/
- bmips_rac_flush_disable = !!(read_c0_brcm_cmt_local() & (1 << 31));
+ bmips_rac_flush_disable = !!(read_c0_brcm_cmt_local() & (1 << 31)) ||
+ !!BMIPS_GET_CBR();
}
static void bcm6368_quirks(void)

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@ -0,0 +1,171 @@
From a5c05453a13ab324ad8719e8a23dfb6af01f3652 Mon Sep 17 00:00:00 2001
From: Christian Marangi <ansuelsmth@gmail.com>
Date: Thu, 20 Jun 2024 17:26:42 +0200
Subject: [PATCH 1/4] mips: bmips: rework and cache CBR addr handling
Rework the handling of the CBR address and cache it. This address
doesn't change and can be cached instead of reading the register every
time.
This is in preparation of permitting to tweak the CBR address in DT with
broken SoC or bootloader.
bmips_cbr_addr is defined in setup.c for each arch to keep compatibility
with legacy brcm47xx/brcm63xx and generic BMIPS target.
Acked-by: Florian Fainelli <florian.fainelli@broadcom.com>
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
---
arch/mips/bcm47xx/prom.c | 3 +++
arch/mips/bcm47xx/setup.c | 4 ++++
arch/mips/bcm63xx/prom.c | 3 +++
arch/mips/bcm63xx/setup.c | 4 ++++
arch/mips/bmips/dma.c | 2 +-
arch/mips/bmips/setup.c | 7 ++++++-
arch/mips/include/asm/bmips.h | 1 +
arch/mips/kernel/smp-bmips.c | 4 ++--
8 files changed, 24 insertions(+), 4 deletions(-)
--- a/arch/mips/bcm47xx/prom.c
+++ b/arch/mips/bcm47xx/prom.c
@@ -32,6 +32,7 @@
#include <linux/ssb/ssb_driver_chipcommon.h>
#include <linux/ssb/ssb_regs.h>
#include <linux/smp.h>
+#include <asm/bmips.h>
#include <asm/bootinfo.h>
#include <bcm47xx.h>
#include <bcm47xx_board.h>
@@ -109,6 +110,8 @@ static __init void prom_init_mem(void)
void __init prom_init(void)
{
+ /* Cache CBR addr before CPU/DMA setup */
+ bmips_cbr_addr = BMIPS_GET_CBR();
prom_init_mem();
setup_8250_early_printk_port(CKSEG1ADDR(BCM47XX_SERIAL_ADDR), 0, 0);
}
--- a/arch/mips/bcm47xx/setup.c
+++ b/arch/mips/bcm47xx/setup.c
@@ -37,6 +37,7 @@
#include <linux/ssb/ssb.h>
#include <linux/ssb/ssb_embedded.h>
#include <linux/bcma/bcma_soc.h>
+#include <asm/bmips.h>
#include <asm/bootinfo.h>
#include <asm/idle.h>
#include <asm/prom.h>
@@ -45,6 +46,9 @@
#include <bcm47xx.h>
#include <bcm47xx_board.h>
+/* CBR addr doesn't change and we can cache it */
+void __iomem *bmips_cbr_addr __read_mostly;
+
union bcm47xx_bus bcm47xx_bus;
EXPORT_SYMBOL(bcm47xx_bus);
--- a/arch/mips/bcm63xx/prom.c
+++ b/arch/mips/bcm63xx/prom.c
@@ -22,6 +22,9 @@ void __init prom_init(void)
{
u32 reg, mask;
+ /* Cache CBR addr before CPU/DMA setup */
+ bmips_cbr_addr = BMIPS_GET_CBR();
+
bcm63xx_cpu_init();
/* stop any running watchdog */
--- a/arch/mips/bcm63xx/setup.c
+++ b/arch/mips/bcm63xx/setup.c
@@ -12,6 +12,7 @@
#include <linux/memblock.h>
#include <linux/ioport.h>
#include <linux/pm.h>
+#include <asm/bmips.h>
#include <asm/bootinfo.h>
#include <asm/time.h>
#include <asm/reboot.h>
@@ -22,6 +23,9 @@
#include <bcm63xx_io.h>
#include <bcm63xx_gpio.h>
+/* CBR addr doesn't change and we can cache it */
+void __iomem *bmips_cbr_addr __read_mostly;
+
void bcm63xx_machine_halt(void)
{
pr_info("System halted\n");
--- a/arch/mips/bmips/dma.c
+++ b/arch/mips/bmips/dma.c
@@ -9,7 +9,7 @@ bool bmips_rac_flush_disable;
void arch_sync_dma_for_cpu_all(void)
{
- void __iomem *cbr = BMIPS_GET_CBR();
+ void __iomem *cbr = bmips_cbr_addr;
u32 cfg;
if (boot_cpu_type() != CPU_BMIPS3300 &&
--- a/arch/mips/bmips/setup.c
+++ b/arch/mips/bmips/setup.c
@@ -34,6 +34,9 @@
#define REG_BCM6328_OTP ((void __iomem *)CKSEG1ADDR(0x1000062c))
#define BCM6328_TP1_DISABLED BIT(9)
+/* CBR addr doesn't change and we can cache it */
+void __iomem *bmips_cbr_addr __read_mostly;
+
extern bool bmips_rac_flush_disable;
static const unsigned long kbase = VMLINUX_LOAD_ADDRESS & 0xfff00000;
@@ -111,7 +114,7 @@ static void bcm6358_quirks(void)
* because the bootloader is not initializing it properly.
*/
bmips_rac_flush_disable = !!(read_c0_brcm_cmt_local() & (1 << 31)) ||
- !!BMIPS_GET_CBR();
+ !!bmips_cbr_addr;
}
static void bcm6368_quirks(void)
@@ -144,6 +147,8 @@ static void __init bmips_init_cfe(void)
void __init prom_init(void)
{
+ /* Cache CBR addr before CPU/DMA setup */
+ bmips_cbr_addr = BMIPS_GET_CBR();
bmips_init_cfe();
bmips_cpu_setup();
register_bmips_smp_ops();
--- a/arch/mips/include/asm/bmips.h
+++ b/arch/mips/include/asm/bmips.h
@@ -81,6 +81,7 @@ extern char bmips_smp_movevec[];
extern char bmips_smp_int_vec[];
extern char bmips_smp_int_vec_end[];
+extern void __iomem *bmips_cbr_addr;
extern int bmips_smp_enabled;
extern int bmips_cpu_offset;
extern cpumask_t bmips_booted_mask;
--- a/arch/mips/kernel/smp-bmips.c
+++ b/arch/mips/kernel/smp-bmips.c
@@ -518,7 +518,7 @@ static void bmips_set_reset_vec(int cpu,
info.val = val;
bmips_set_reset_vec_remote(&info);
} else {
- void __iomem *cbr = BMIPS_GET_CBR();
+ void __iomem *cbr = bmips_cbr_addr;
if (cpu == 0)
__raw_writel(val, cbr + BMIPS_RELO_VECTOR_CONTROL_0);
@@ -591,7 +591,7 @@ asmlinkage void __weak plat_wired_tlb_se
void bmips_cpu_setup(void)
{
- void __iomem __maybe_unused *cbr = BMIPS_GET_CBR();
+ void __iomem __maybe_unused *cbr = bmips_cbr_addr;
u32 __maybe_unused cfg;
switch (current_cpu_type()) {

View File

@ -0,0 +1,111 @@
From b95b30e50aed225d26e20737873ae2404941901c Mon Sep 17 00:00:00 2001
From: Christian Marangi <ansuelsmth@gmail.com>
Date: Thu, 20 Jun 2024 17:26:44 +0200
Subject: [PATCH 3/4] mips: bmips: setup: make CBR address configurable
Add support to provide CBR address from DT to handle broken
SoC/Bootloader that doesn't correctly init it. This permits to use the
RAC flush even in these condition.
To provide a CBR address from DT, the property "brcm,bmips-cbr-reg"
needs to be set in the "cpus" node. On DT init, this property presence
will be checked and will set the bmips_cbr_addr value accordingly. Also
bmips_rac_flush_disable will be set to false as RAC flush can be
correctly supported.
The CBR address from DT will overwrite the cached one and the
one set in the CBR register will be ignored.
Also the DT CBR address is validated on being outside DRAM window.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Acked-by: Florian Fainelli <florian.fainelli@broadcom.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
---
arch/mips/bcm47xx/setup.c | 6 +++++-
arch/mips/bcm63xx/setup.c | 6 +++++-
arch/mips/bmips/setup.c | 30 ++++++++++++++++++++++++++++--
3 files changed, 38 insertions(+), 4 deletions(-)
--- a/arch/mips/bcm47xx/setup.c
+++ b/arch/mips/bcm47xx/setup.c
@@ -46,7 +46,11 @@
#include <bcm47xx.h>
#include <bcm47xx_board.h>
-/* CBR addr doesn't change and we can cache it */
+/*
+ * CBR addr doesn't change and we can cache it.
+ * For broken SoC/Bootloader CBR addr might also be provided via DT
+ * with "brcm,bmips-cbr-reg" in the "cpus" node.
+ */
void __iomem *bmips_cbr_addr __read_mostly;
union bcm47xx_bus bcm47xx_bus;
--- a/arch/mips/bcm63xx/setup.c
+++ b/arch/mips/bcm63xx/setup.c
@@ -23,7 +23,11 @@
#include <bcm63xx_io.h>
#include <bcm63xx_gpio.h>
-/* CBR addr doesn't change and we can cache it */
+/*
+ * CBR addr doesn't change and we can cache it.
+ * For broken SoC/Bootloader CBR addr might also be provided via DT
+ * with "brcm,bmips-cbr-reg" in the "cpus" node.
+ */
void __iomem *bmips_cbr_addr __read_mostly;
void bcm63xx_machine_halt(void)
--- a/arch/mips/bmips/setup.c
+++ b/arch/mips/bmips/setup.c
@@ -34,7 +34,11 @@
#define REG_BCM6328_OTP ((void __iomem *)CKSEG1ADDR(0x1000062c))
#define BCM6328_TP1_DISABLED BIT(9)
-/* CBR addr doesn't change and we can cache it */
+/*
+ * CBR addr doesn't change and we can cache it.
+ * For broken SoC/Bootloader CBR addr might also be provided via DT
+ * with "brcm,bmips-cbr-reg" in the "cpus" node.
+ */
void __iomem *bmips_cbr_addr __read_mostly;
extern bool bmips_rac_flush_disable;
@@ -208,13 +212,35 @@ void __init plat_mem_setup(void)
void __init device_tree_init(void)
{
struct device_node *np;
+ u32 addr;
unflatten_and_copy_device_tree();
/* Disable SMP boot unless both CPUs are listed in DT and !disabled */
np = of_find_node_by_name(NULL, "cpus");
- if (np && of_get_available_child_count(np) <= 1)
+ if (!np)
+ return;
+
+ if (of_get_available_child_count(np) <= 1)
bmips_smp_enabled = 0;
+
+ /* Check if DT provide a CBR address */
+ if (of_property_read_u32(np, "brcm,bmips-cbr-reg", &addr))
+ goto exit;
+
+ /* Make sure CBR address is outside DRAM window */
+ if (addr >= (u32)memblock_start_of_DRAM() &&
+ addr < (u32)memblock_end_of_DRAM()) {
+ WARN(1, "DT CBR %x inside DRAM window. Ignoring DT CBR.\n",
+ addr);
+ goto exit;
+ }
+
+ bmips_cbr_addr = (void __iomem *)addr;
+ /* Since CBR is provided by DT, enable RAC flush */
+ bmips_rac_flush_disable = false;
+
+exit:
of_node_put(np);
}

View File

@ -0,0 +1,57 @@
From 04f38d1a4db017f17e82442727b91ce03dd72759 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Daniel=20Gonz=C3=A1lez=20Cabanelas?= <dgcbueu@gmail.com>
Date: Thu, 20 Jun 2024 17:26:45 +0200
Subject: [PATCH 4/4] mips: bmips: enable RAC on BMIPS4350
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
The data RAC is left disabled by the bootloader in some SoCs, at least in
the core it boots from.
Enabling this feature increases the performance up to +30% depending on the
task.
Signed-off-by: Daniel González Cabanelas <dgcbueu@gmail.com>
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
[ rework code and reduce code duplication ]
Acked-by: Florian Fainelli <florian.fainelli@broadcom.com>
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
---
arch/mips/kernel/smp-bmips.c | 18 ++++++++++++++++++
1 file changed, 18 insertions(+)
--- a/arch/mips/kernel/smp-bmips.c
+++ b/arch/mips/kernel/smp-bmips.c
@@ -592,6 +592,7 @@ asmlinkage void __weak plat_wired_tlb_se
void bmips_cpu_setup(void)
{
void __iomem __maybe_unused *cbr = bmips_cbr_addr;
+ u32 __maybe_unused rac_addr;
u32 __maybe_unused cfg;
switch (current_cpu_type()) {
@@ -620,6 +621,23 @@ void bmips_cpu_setup(void)
__raw_readl(cbr + BMIPS_RAC_ADDRESS_RANGE);
break;
+ case CPU_BMIPS4350:
+ rac_addr = BMIPS_RAC_CONFIG_1;
+
+ if (!(read_c0_brcm_cmt_local() & (1 << 31)))
+ rac_addr = BMIPS_RAC_CONFIG;
+
+ /* Enable data RAC */
+ cfg = __raw_readl(cbr + rac_addr);
+ __raw_writel(cfg | 0xf, cbr + rac_addr);
+ __raw_readl(cbr + rac_addr);
+
+ /* Flush stale data out of the readahead cache */
+ cfg = __raw_readl(cbr + BMIPS_RAC_CONFIG);
+ __raw_writel(cfg | 0x100, cbr + BMIPS_RAC_CONFIG);
+ __raw_readl(cbr + BMIPS_RAC_CONFIG);
+ break;
+
case CPU_BMIPS4380:
/* CBG workaround for early BMIPS4380 CPUs */
switch (read_c0_prid()) {

View File

@ -15,7 +15,7 @@ Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
--- a/arch/mips/bmips/setup.c
+++ b/arch/mips/bmips/setup.c
@@ -31,13 +31,52 @@
@@ -31,8 +31,42 @@
#define RELO_NORMAL_VEC BIT(18)
@ -56,7 +56,9 @@ Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
+#define BCM63268_FCVO_SHIFT 21
+#define BCM63268_FCVO_MASK (0xf << BCM63268_FCVO_SHIFT)
extern bool bmips_rac_flush_disable;
/*
* CBR addr doesn't change and we can cache it.
@@ -45,6 +79,11 @@ extern bool bmips_rac_flush_disable;
static const unsigned long kbase = VMLINUX_LOAD_ADDRESS & 0xfff00000;
@ -68,7 +70,7 @@ Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
struct bmips_quirk {
const char *compatible;
void (*quirk_fn)(void);
@@ -153,17 +192,161 @@ const char *get_system_type(void)
@@ -163,17 +202,161 @@ const char *get_system_type(void)
return "Generic BMIPS kernel";
}

View File

@ -70,9 +70,9 @@ Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
+
+#define DDR_CSEND_REG 0x8
extern bool bmips_rac_flush_disable;
@@ -77,6 +98,11 @@ struct bmips_cpufreq {
/*
* CBR addr doesn't change and we can cache it.
@@ -84,6 +105,11 @@ struct bmips_cpufreq {
u32 (*cpu_freq)(void);
};
@ -84,7 +84,7 @@ Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
struct bmips_quirk {
const char *compatible;
void (*quirk_fn)(void);
@@ -351,9 +377,90 @@ void __init plat_time_init(void)
@@ -361,9 +387,90 @@ void __init plat_time_init(void)
mips_hpt_frequency = freq;
}
@ -175,7 +175,7 @@ Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
const struct bmips_quirk *q;
set_io_port_base(0);
@@ -374,6 +481,18 @@ void __init plat_mem_setup(void)
@@ -384,6 +491,18 @@ void __init plat_mem_setup(void)
__dt_setup_arch(dtb);

View File

@ -1,82 +0,0 @@
From 3e4c3863e0cfb8c2abdff6bb494ca69d3d2aed9c Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?=C3=81lvaro=20Fern=C3=A1ndez=20Rojas?= <noltari@gmail.com>
Date: Sat, 10 Jun 2023 17:01:40 +0200
Subject: [PATCH] mips: bmips: dma: fix CBR address
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
Some BCM63xx SoCs may return CBR address as 0.
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
---
arch/mips/bmips/dma.c | 12 ++++--------
arch/mips/bmips/setup.c | 11 ++++-------
2 files changed, 8 insertions(+), 15 deletions(-)
--- a/arch/mips/bmips/dma.c
+++ b/arch/mips/bmips/dma.c
@@ -5,11 +5,10 @@
#include <asm/bmips.h>
#include <asm/io.h>
-bool bmips_rac_flush_disable;
+void __iomem *bmips_cbr_addr;
void arch_sync_dma_for_cpu_all(void)
{
- void __iomem *cbr = BMIPS_GET_CBR();
u32 cfg;
if (boot_cpu_type() != CPU_BMIPS3300 &&
@@ -17,11 +16,8 @@ void arch_sync_dma_for_cpu_all(void)
boot_cpu_type() != CPU_BMIPS4380)
return;
- if (unlikely(bmips_rac_flush_disable))
- return;
-
/* Flush stale data out of the readahead cache */
- cfg = __raw_readl(cbr + BMIPS_RAC_CONFIG);
- __raw_writel(cfg | 0x100, cbr + BMIPS_RAC_CONFIG);
- __raw_readl(cbr + BMIPS_RAC_CONFIG);
+ cfg = __raw_readl(bmips_cbr_addr + BMIPS_RAC_CONFIG);
+ __raw_writel(cfg | 0x100, bmips_cbr_addr + BMIPS_RAC_CONFIG);
+ __raw_readl(bmips_cbr_addr + BMIPS_RAC_CONFIG);
}
--- a/arch/mips/bmips/setup.c
+++ b/arch/mips/bmips/setup.c
@@ -89,7 +89,7 @@
#define DDR_CSEND_REG 0x8
-extern bool bmips_rac_flush_disable;
+extern void __iomem *bmips_cbr_addr;
static const unsigned long kbase = VMLINUX_LOAD_ADDRESS & 0xfff00000;
@@ -170,12 +170,6 @@ static void bcm6358_quirks(void)
* disable SMP for now
*/
bmips_smp_enabled = 0;
-
- /*
- * RAC flush causes kernel panics on BCM6358 when booting from TP1
- * because the bootloader is not initializing it properly.
- */
- bmips_rac_flush_disable = !!(read_c0_brcm_cmt_local() & (1 << 31));
}
static void bcm6368_quirks(void)
@@ -208,6 +202,11 @@ static void __init bmips_init_cfe(void)
void __init prom_init(void)
{
+ if (!(read_c0_brcm_cbr() >> 18))
+ bmips_cbr_addr = (void __iomem *) 0xff400000;
+ else
+ bmips_cbr_addr = BMIPS_GET_CBR();
+
bmips_init_cfe();
bmips_cpu_setup();
register_bmips_smp_ops();

View File

@ -1,42 +0,0 @@
From 7f862eaedac56b67972393f0a9affcd2fe53479b Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Daniel=20Gonz=C3=A1lez=20Cabanelas?= <dgcbueu@gmail.com>
Date: Sun, 18 Jun 2023 19:59:25 +0200
Subject: [PATCH] mips: bmips: enable RAC on BMIPS4350
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
The data RAC is left disabled by the bootloader in some SoCs, at least in
the core it boots from.
Enabling this feature increases the performance up to +30% depending on the
task.
Signed-off-by: Daniel González Cabanelas <dgcbueu@gmail.com>
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
---
arch/mips/kernel/smp-bmips.c | 14 ++++++++++++++
1 file changed, 14 insertions(+)
--- a/arch/mips/kernel/smp-bmips.c
+++ b/arch/mips/kernel/smp-bmips.c
@@ -620,6 +620,20 @@ void bmips_cpu_setup(void)
__raw_readl(cbr + BMIPS_RAC_ADDRESS_RANGE);
break;
+ case CPU_BMIPS4350:
+ /* Enable data RAC */
+ if (!(read_c0_brcm_cmt_local() & (1 << 31))) {
+ cfg = __raw_readl(cbr + BMIPS_RAC_CONFIG);
+ __raw_writel(cfg | 0xa, cbr + BMIPS_RAC_CONFIG);
+ __raw_readl(cbr + BMIPS_RAC_CONFIG);
+ } else {
+ cbr = (void __iomem *)0xff400000;
+ cfg = __raw_readl(cbr + BMIPS_RAC_CONFIG_1);
+ __raw_writel(cfg | 0xa, cbr + BMIPS_RAC_CONFIG_1);
+ __raw_readl(cbr + BMIPS_RAC_CONFIG_1);
+ }
+ break;
+
case CPU_BMIPS4380:
/* CBG workaround for early BMIPS4380 CPUs */
switch (read_c0_prid()) {

View File

@ -156,7 +156,7 @@ Signed-off-by: Vinod Koul <vkoul@kernel.org>
if (priv && (priv->quirks & XHCI_SG_TRB_CACHE_SIZE_QUIRK))
--- a/drivers/usb/host/xhci-plat.h
+++ b/drivers/usb/host/xhci-plat.h
@@ -13,7 +13,6 @@
@@ -15,7 +15,6 @@ struct usb_hcd;
struct xhci_plat_priv {
const char *firmware_name;
unsigned long long quirks;

View File

@ -25,7 +25,7 @@ Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
--- a/drivers/mtd/mtdcore.c
+++ b/drivers/mtd/mtdcore.c
@@ -1236,6 +1236,34 @@ int __get_mtd_device(struct mtd_info *mt
@@ -1238,6 +1238,34 @@ int __get_mtd_device(struct mtd_info *mt
EXPORT_SYMBOL_GPL(__get_mtd_device);
/**

View File

@ -31,7 +31,7 @@ Link: https://lore.kernel.org/linux-mtd/20220629125737.14418-2-kernel@kempniu.pl
--- a/drivers/mtd/mtdcore.c
+++ b/drivers/mtd/mtdcore.c
@@ -1676,6 +1676,9 @@ int mtd_read_oob(struct mtd_info *mtd, l
@@ -1678,6 +1678,9 @@ int mtd_read_oob(struct mtd_info *mtd, l
if (!master->_read_oob && (!master->_read || ops->oobbuf))
return -EOPNOTSUPP;
@ -41,7 +41,7 @@ Link: https://lore.kernel.org/linux-mtd/20220629125737.14418-2-kernel@kempniu.pl
if (mtd->flags & MTD_SLC_ON_MLC_EMULATION)
ret_code = mtd_io_emulated_slc(mtd, from, true, ops);
else
@@ -1693,6 +1696,8 @@ int mtd_read_oob(struct mtd_info *mtd, l
@@ -1695,6 +1698,8 @@ int mtd_read_oob(struct mtd_info *mtd, l
return ret_code;
if (mtd->ecc_strength == 0)
return 0; /* device lacks ecc */

View File

@ -17,7 +17,7 @@ Link: https://lore.kernel.org/linux-mtd/20230308082021.870459-4-michael@walle.cc
--- a/drivers/mtd/mtdcore.c
+++ b/drivers/mtd/mtdcore.c
@@ -960,8 +960,8 @@ static int mtd_otp_nvmem_add(struct mtd_
@@ -962,8 +962,8 @@ static int mtd_otp_nvmem_add(struct mtd_
nvmem = mtd_otp_nvmem_register(mtd, "user-otp", size,
mtd_nvmem_user_otp_reg_read);
if (IS_ERR(nvmem)) {
@ -28,7 +28,7 @@ Link: https://lore.kernel.org/linux-mtd/20230308082021.870459-4-michael@walle.cc
}
mtd->otp_user_nvmem = nvmem;
}
@@ -978,7 +978,6 @@ static int mtd_otp_nvmem_add(struct mtd_
@@ -980,7 +980,6 @@ static int mtd_otp_nvmem_add(struct mtd_
nvmem = mtd_otp_nvmem_register(mtd, "factory-otp", size,
mtd_nvmem_fact_otp_reg_read);
if (IS_ERR(nvmem)) {
@ -36,7 +36,7 @@ Link: https://lore.kernel.org/linux-mtd/20230308082021.870459-4-michael@walle.cc
err = PTR_ERR(nvmem);
goto err;
}
@@ -991,7 +990,7 @@ static int mtd_otp_nvmem_add(struct mtd_
@@ -993,7 +992,7 @@ static int mtd_otp_nvmem_add(struct mtd_
err:
if (mtd->otp_user_nvmem)
nvmem_unregister(mtd->otp_user_nvmem);

View File

@ -148,7 +148,7 @@ Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
* of_find_node_by_phandle - Find a node given a phandle
--- a/drivers/spi/spi.c
+++ b/drivers/spi/spi.c
@@ -2140,8 +2140,8 @@ of_register_spi_device(struct spi_contro
@@ -2144,8 +2144,8 @@ of_register_spi_device(struct spi_contro
}
/* Select device driver */

View File

@ -20,7 +20,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org>
--- a/drivers/net/dsa/mv88e6xxx/chip.c
+++ b/drivers/net/dsa/mv88e6xxx/chip.c
@@ -5372,7 +5372,8 @@ static const struct mv88e6xxx_info mv88e
@@ -5414,7 +5414,8 @@ static const struct mv88e6xxx_info mv88e
.name = "Marvell 88E6191X",
.num_databases = 4096,
.num_ports = 11, /* 10 + Z80 */
@ -30,7 +30,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org>
.max_vid = 8191,
.port_base_addr = 0x0,
.phy_base_addr = 0x0,
@@ -5394,7 +5395,8 @@ static const struct mv88e6xxx_info mv88e
@@ -5436,7 +5437,8 @@ static const struct mv88e6xxx_info mv88e
.name = "Marvell 88E6193X",
.num_databases = 4096,
.num_ports = 11, /* 10 + Z80 */
@ -40,7 +40,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org>
.max_vid = 8191,
.port_base_addr = 0x0,
.phy_base_addr = 0x0,
@@ -5704,7 +5706,8 @@ static const struct mv88e6xxx_info mv88e
@@ -5746,7 +5748,8 @@ static const struct mv88e6xxx_info mv88e
.name = "Marvell 88E6393X",
.num_databases = 4096,
.num_ports = 11, /* 10 + Z80 */

View File

@ -38,7 +38,7 @@ Signed-off-by: Robert Marko <robimarko@gmail.com>
err = chip->info->ops->port_set_pause(chip, port, pause);
--- a/drivers/net/dsa/mv88e6xxx/chip.h
+++ b/drivers/net/dsa/mv88e6xxx/chip.h
@@ -485,7 +485,8 @@ struct mv88e6xxx_ops {
@@ -491,7 +491,8 @@ struct mv88e6xxx_ops {
int speed, int duplex);
/* What interface mode should be used for maximum speed? */

View File

@ -71,7 +71,7 @@ Signed-off-by: Robert Marko <robimarko@gmail.com>
mv88e6065_phylink_validate(chip, port, mask, state);
}
@@ -5651,6 +5673,31 @@ static const struct mv88e6xxx_info mv88e
@@ -5693,6 +5715,31 @@ static const struct mv88e6xxx_info mv88e
.ptp_support = true,
.ops = &mv88e6352_ops,
},

View File

@ -0,0 +1,371 @@
From dee4dd10c79aaca192b73520d8fb64628468ae0f Mon Sep 17 00:00:00 2001
From: Elad Yifee <eladwf@gmail.com>
Date: Fri, 7 Jun 2024 11:21:50 +0300
Subject: [PATCH] net: ethernet: mtk_eth_soc: ppe: add support for multiple
PPEs
Add the missing pieces to allow multiple PPEs units, one for each GMAC.
mtk_gdm_config has been modified to work on targted mac ID,
the inner loop moved outside of the function to allow unrelated
operations like setting the MAC's PPE index.
Introduce a sanity check in flow_offload_replace to account for
non-MTK ingress devices.
Additional field 'ppe_idx' was added to struct mtk_mac in order
to keep track on the assigned PPE unit.
Signed-off-by: Elad Yifee <eladwf@gmail.com>
Link: https://lore.kernel.org/r/20240607082155.20021-1-eladwf@gmail.com
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
---
drivers/net/ethernet/mediatek/mtk_eth_soc.c | 112 +++++++++++-------
drivers/net/ethernet/mediatek/mtk_eth_soc.h | 8 +-
.../net/ethernet/mediatek/mtk_ppe_offload.c | 17 ++-
3 files changed, 92 insertions(+), 45 deletions(-)
--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
@@ -80,7 +80,9 @@ static const struct mtk_reg_map mtk_reg_
.fq_blen = 0x1b2c,
},
.gdm1_cnt = 0x2400,
- .gdma_to_ppe = 0x4444,
+ .gdma_to_ppe = {
+ [0] = 0x4444,
+ },
.ppe_base = 0x0c00,
.wdma_base = {
[0] = 0x2800,
@@ -144,7 +146,10 @@ static const struct mtk_reg_map mt7986_r
.tx_sch_rate = 0x4798,
},
.gdm1_cnt = 0x1c00,
- .gdma_to_ppe = 0x3333,
+ .gdma_to_ppe = {
+ [0] = 0x3333,
+ [1] = 0x4444,
+ },
.ppe_base = 0x2000,
.wdma_base = {
[0] = 0x4800,
@@ -192,7 +197,11 @@ static const struct mtk_reg_map mt7988_r
.tx_sch_rate = 0x4798,
},
.gdm1_cnt = 0x1c00,
- .gdma_to_ppe = 0x3333,
+ .gdma_to_ppe = {
+ [0] = 0x3333,
+ [1] = 0x4444,
+ [2] = 0xcccc,
+ },
.ppe_base = 0x2000,
.wdma_base = {
[0] = 0x4800,
@@ -2015,6 +2024,7 @@ static int mtk_poll_rx(struct napi_struc
struct mtk_rx_dma_v2 *rxd, trxd;
int done = 0, bytes = 0;
dma_addr_t dma_addr = DMA_MAPPING_ERROR;
+ int ppe_idx = 0;
while (done < budget) {
unsigned int pktlen, *rxdcsum;
@@ -2058,6 +2068,7 @@ static int mtk_poll_rx(struct napi_struc
goto release_desc;
netdev = eth->netdev[mac];
+ ppe_idx = eth->mac[mac]->ppe_idx;
if (unlikely(test_bit(MTK_RESETTING, &eth->state)))
goto release_desc;
@@ -2181,7 +2192,7 @@ static int mtk_poll_rx(struct napi_struc
}
if (reason == MTK_PPE_CPU_REASON_HIT_UNBIND_RATE_REACHED)
- mtk_ppe_check_skb(eth->ppe[0], skb, hash);
+ mtk_ppe_check_skb(eth->ppe[ppe_idx], skb, hash);
skb_record_rx_queue(skb, 0);
napi_gro_receive(napi, skb);
@@ -3276,37 +3287,27 @@ static int mtk_start_dma(struct mtk_eth
return 0;
}
-static void mtk_gdm_config(struct mtk_eth *eth, u32 config)
+static void mtk_gdm_config(struct mtk_eth *eth, u32 id, u32 config)
{
- int i;
+ u32 val;
if (MTK_HAS_CAPS(eth->soc->caps, MTK_SOC_MT7628))
return;
- for (i = 0; i < MTK_MAX_DEVS; i++) {
- u32 val;
-
- if (!eth->netdev[i])
- continue;
+ val = mtk_r32(eth, MTK_GDMA_FWD_CFG(id));
- val = mtk_r32(eth, MTK_GDMA_FWD_CFG(i));
+ /* default setup the forward port to send frame to PDMA */
+ val &= ~0xffff;
- /* default setup the forward port to send frame to PDMA */
- val &= ~0xffff;
+ /* Enable RX checksum */
+ val |= MTK_GDMA_ICS_EN | MTK_GDMA_TCS_EN | MTK_GDMA_UCS_EN;
- /* Enable RX checksum */
- val |= MTK_GDMA_ICS_EN | MTK_GDMA_TCS_EN | MTK_GDMA_UCS_EN;
+ val |= config;
- val |= config;
+ if (eth->netdev[id] && netdev_uses_dsa(eth->netdev[id]))
+ val |= MTK_GDMA_SPECIAL_TAG;
- if (netdev_uses_dsa(eth->netdev[i]))
- val |= MTK_GDMA_SPECIAL_TAG;
-
- mtk_w32(eth, val, MTK_GDMA_FWD_CFG(i));
- }
- /* Reset and enable PSE */
- mtk_w32(eth, RST_GL_PSE, MTK_RST_GL);
- mtk_w32(eth, 0, MTK_RST_GL);
+ mtk_w32(eth, val, MTK_GDMA_FWD_CFG(id));
}
@@ -3366,7 +3367,10 @@ static int mtk_open(struct net_device *d
{
struct mtk_mac *mac = netdev_priv(dev);
struct mtk_eth *eth = mac->hw;
- int i, err;
+ struct mtk_mac *target_mac;
+ int i, err, ppe_num;
+
+ ppe_num = eth->soc->ppe_num;
err = phylink_of_phy_connect(mac->phylink, mac->of_node, 0);
if (err) {
@@ -3390,18 +3394,38 @@ static int mtk_open(struct net_device *d
for (i = 0; i < ARRAY_SIZE(eth->ppe); i++)
mtk_ppe_start(eth->ppe[i]);
- gdm_config = soc->offload_version ? soc->reg_map->gdma_to_ppe
- : MTK_GDMA_TO_PDMA;
- mtk_gdm_config(eth, gdm_config);
+ for (i = 0; i < MTK_MAX_DEVS; i++) {
+ if (!eth->netdev[i])
+ break;
+
+ target_mac = netdev_priv(eth->netdev[i]);
+ if (!soc->offload_version) {
+ target_mac->ppe_idx = 0;
+ gdm_config = MTK_GDMA_TO_PDMA;
+ } else if (ppe_num >= 3 && target_mac->id == 2) {
+ target_mac->ppe_idx = 2;
+ gdm_config = soc->reg_map->gdma_to_ppe[2];
+ } else if (ppe_num >= 2 && target_mac->id == 1) {
+ target_mac->ppe_idx = 1;
+ gdm_config = soc->reg_map->gdma_to_ppe[1];
+ } else {
+ target_mac->ppe_idx = 0;
+ gdm_config = soc->reg_map->gdma_to_ppe[0];
+ }
+ mtk_gdm_config(eth, target_mac->id, gdm_config);
+ }
+ /* Reset and enable PSE */
+ mtk_w32(eth, RST_GL_PSE, MTK_RST_GL);
+ mtk_w32(eth, 0, MTK_RST_GL);
napi_enable(&eth->tx_napi);
napi_enable(&eth->rx_napi);
mtk_tx_irq_enable(eth, MTK_TX_DONE_INT);
mtk_rx_irq_enable(eth, soc->rx.irq_done_mask);
refcount_set(&eth->dma_refcnt, 1);
- }
- else
+ } else {
refcount_inc(&eth->dma_refcnt);
+ }
phylink_start(mac->phylink);
netif_tx_start_all_queues(dev);
@@ -3478,7 +3502,8 @@ static int mtk_stop(struct net_device *d
if (!refcount_dec_and_test(&eth->dma_refcnt))
return 0;
- mtk_gdm_config(eth, MTK_GDMA_DROP_ALL);
+ for (i = 0; i < MTK_MAX_DEVS; i++)
+ mtk_gdm_config(eth, i, MTK_GDMA_DROP_ALL);
mtk_tx_irq_disable(eth, MTK_TX_DONE_INT);
mtk_rx_irq_disable(eth, eth->soc->rx.irq_done_mask);
@@ -4957,23 +4982,24 @@ static int mtk_probe(struct platform_dev
}
if (eth->soc->offload_version) {
- u32 num_ppe = mtk_is_netsys_v2_or_greater(eth) ? 2 : 1;
+ u8 ppe_num = eth->soc->ppe_num;
- num_ppe = min_t(u32, ARRAY_SIZE(eth->ppe), num_ppe);
- for (i = 0; i < num_ppe; i++) {
- u32 ppe_addr = eth->soc->reg_map->ppe_base + i * 0x400;
+ ppe_num = min_t(u8, ARRAY_SIZE(eth->ppe), ppe_num);
+ for (i = 0; i < ppe_num; i++) {
+ u32 ppe_addr = eth->soc->reg_map->ppe_base;
+ ppe_addr += (i == 2 ? 0xc00 : i * 0x400);
eth->ppe[i] = mtk_ppe_init(eth, eth->base + ppe_addr, i);
if (!eth->ppe[i]) {
err = -ENOMEM;
goto err_deinit_ppe;
}
- }
+ err = mtk_eth_offload_init(eth, i);
- err = mtk_eth_offload_init(eth);
- if (err)
- goto err_deinit_ppe;
+ if (err)
+ goto err_deinit_ppe;
+ }
}
for (i = 0; i < MTK_MAX_DEVS; i++) {
@@ -5076,6 +5102,7 @@ static const struct mtk_soc_data mt7621_
.required_pctl = false,
.version = 1,
.offload_version = 1,
+ .ppe_num = 1,
.hash_offset = 2,
.foe_entry_size = MTK_FOE_ENTRY_V1_SIZE,
.tx = {
@@ -5104,6 +5131,7 @@ static const struct mtk_soc_data mt7622_
.required_pctl = false,
.version = 1,
.offload_version = 2,
+ .ppe_num = 1,
.hash_offset = 2,
.has_accounting = true,
.foe_entry_size = MTK_FOE_ENTRY_V1_SIZE,
@@ -5132,6 +5160,7 @@ static const struct mtk_soc_data mt7623_
.required_pctl = true,
.version = 1,
.offload_version = 1,
+ .ppe_num = 1,
.hash_offset = 2,
.foe_entry_size = MTK_FOE_ENTRY_V1_SIZE,
.disable_pll_modes = true,
@@ -5187,6 +5216,7 @@ static const struct mtk_soc_data mt7981_
.required_pctl = false,
.version = 2,
.offload_version = 2,
+ .ppe_num = 2,
.hash_offset = 4,
.has_accounting = true,
.foe_entry_size = MTK_FOE_ENTRY_V2_SIZE,
@@ -5216,6 +5246,7 @@ static const struct mtk_soc_data mt7986_
.required_pctl = false,
.version = 2,
.offload_version = 2,
+ .ppe_num = 2,
.hash_offset = 4,
.has_accounting = true,
.foe_entry_size = MTK_FOE_ENTRY_V2_SIZE,
@@ -5245,6 +5276,7 @@ static const struct mtk_soc_data mt7988_
.required_pctl = false,
.version = 3,
.offload_version = 2,
+ .ppe_num = 3,
.hash_offset = 4,
.has_accounting = true,
.foe_entry_size = MTK_FOE_ENTRY_V3_SIZE,
--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.h
+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.h
@@ -1132,7 +1132,7 @@ struct mtk_reg_map {
u32 tx_sch_rate; /* tx scheduler rate control registers */
} qdma;
u32 gdm1_cnt;
- u32 gdma_to_ppe;
+ u32 gdma_to_ppe[3];
u32 ppe_base;
u32 wdma_base[3];
u32 pse_iq_sta;
@@ -1170,6 +1170,7 @@ struct mtk_soc_data {
u8 offload_version;
u8 hash_offset;
u8 version;
+ u8 ppe_num;
u16 foe_entry_size;
netdev_features_t hw_features;
bool has_accounting;
@@ -1294,7 +1295,7 @@ struct mtk_eth {
struct metadata_dst *dsa_meta[MTK_MAX_DSA_PORTS];
- struct mtk_ppe *ppe[2];
+ struct mtk_ppe *ppe[3];
struct rhashtable flow_table;
struct bpf_prog __rcu *prog;
@@ -1319,6 +1320,7 @@ struct mtk_eth {
struct mtk_mac {
int id;
phy_interface_t interface;
+ u8 ppe_idx;
int speed;
struct device_node *of_node;
struct phylink *phylink;
@@ -1440,7 +1442,7 @@ int mtk_gmac_sgmii_path_setup(struct mtk
int mtk_gmac_gephy_path_setup(struct mtk_eth *eth, int mac_id);
int mtk_gmac_rgmii_path_setup(struct mtk_eth *eth, int mac_id);
-int mtk_eth_offload_init(struct mtk_eth *eth);
+int mtk_eth_offload_init(struct mtk_eth *eth, u8 id);
int mtk_eth_setup_tc(struct net_device *dev, enum tc_setup_type type,
void *type_data);
int mtk_flow_offload_cmd(struct mtk_eth *eth, struct flow_cls_offload *cls,
--- a/drivers/net/ethernet/mediatek/mtk_ppe_offload.c
+++ b/drivers/net/ethernet/mediatek/mtk_ppe_offload.c
@@ -245,10 +245,10 @@ mtk_flow_offload_replace(struct mtk_eth
int ppe_index)
{
struct flow_rule *rule = flow_cls_offload_flow_rule(f);
+ struct net_device *idev = NULL, *odev = NULL;
struct flow_action_entry *act;
struct mtk_flow_data data = {};
struct mtk_foe_entry foe;
- struct net_device *odev = NULL;
struct mtk_flow_entry *entry;
int offload_type = 0;
int wed_index = -1;
@@ -264,6 +264,17 @@ mtk_flow_offload_replace(struct mtk_eth
struct flow_match_meta match;
flow_rule_match_meta(rule, &match);
+ if (mtk_is_netsys_v2_or_greater(eth)) {
+ idev = __dev_get_by_index(&init_net, match.key->ingress_ifindex);
+ if (idev) {
+ struct mtk_mac *mac = netdev_priv(idev);
+
+ if (WARN_ON(mac->ppe_idx >= eth->soc->ppe_num))
+ return -EINVAL;
+
+ ppe_index = mac->ppe_idx;
+ }
+ }
} else {
return -EOPNOTSUPP;
}
@@ -630,7 +641,9 @@ int mtk_eth_setup_tc(struct net_device *
}
}
-int mtk_eth_offload_init(struct mtk_eth *eth)
+int mtk_eth_offload_init(struct mtk_eth *eth, u8 id)
{
+ if (!eth->ppe[id] || !eth->ppe[id]->foe_table)
+ return 0;
return rhashtable_init(&eth->flow_table, &mtk_flow_ht_params);
}

View File

@ -0,0 +1,30 @@
From 73cfd947dbdb25ef9863ac49c4596a7d53ad4025 Mon Sep 17 00:00:00 2001
From: Elad Yifee <eladwf@gmail.com>
Date: Sun, 23 Jun 2024 20:51:09 +0300
Subject: [PATCH] net: ethernet: mtk_eth_soc: ppe: prevent ppe update for
non-mtk devices
Introduce an additional validation to ensure that the PPE index
is modified exclusively for mtk_eth ingress devices.
This primarily addresses the issue related
to WED operation with multiple PPEs.
Fixes: dee4dd10c79a ("net: ethernet: mtk_eth_soc: ppe: add support for multiple PPEs")
Signed-off-by: Elad Yifee <eladwf@gmail.com>
Link: https://lore.kernel.org/r/20240623175113.24437-1-eladwf@gmail.com
Signed-off-by: Paolo Abeni <pabeni@redhat.com>
---
drivers/net/ethernet/mediatek/mtk_ppe_offload.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
--- a/drivers/net/ethernet/mediatek/mtk_ppe_offload.c
+++ b/drivers/net/ethernet/mediatek/mtk_ppe_offload.c
@@ -266,7 +266,7 @@ mtk_flow_offload_replace(struct mtk_eth
flow_rule_match_meta(rule, &match);
if (mtk_is_netsys_v2_or_greater(eth)) {
idev = __dev_get_by_index(&init_net, match.key->ingress_ifindex);
- if (idev) {
+ if (idev && idev->netdev_ops == eth->netdev[0]->netdev_ops) {
struct mtk_mac *mac = netdev_priv(idev);
if (WARN_ON(mac->ppe_idx >= eth->soc->ppe_num))

View File

@ -77,7 +77,7 @@ Signed-off-by: Daniel Golle <daniel@makrotopia.org>
#include "mtdcore.h"
@@ -1106,6 +1107,8 @@ int mtd_device_parse_register(struct mtd
@@ -1108,6 +1109,8 @@ int mtd_device_parse_register(struct mtd
register_reboot_notifier(&mtd->reboot_notifier);
}

View File

@ -9,7 +9,7 @@ Subject: [PATCH] net/dsa/mv88e6xxx: disable ATU violation
--- a/drivers/net/dsa/mv88e6xxx/chip.c
+++ b/drivers/net/dsa/mv88e6xxx/chip.c
@@ -3017,6 +3017,9 @@ static int mv88e6xxx_setup_port(struct m
@@ -3027,6 +3027,9 @@ static int mv88e6xxx_setup_port(struct m
else
reg = 1 << port;

View File

@ -71,7 +71,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
*/
--- a/include/linux/skbuff.h
+++ b/include/linux/skbuff.h
@@ -2855,6 +2855,10 @@ static inline int pskb_trim(struct sk_bu
@@ -2870,6 +2870,10 @@ static inline int pskb_trim(struct sk_bu
return (len < skb->len) ? __pskb_trim(skb, len) : 0;
}
@ -82,7 +82,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
/**
* pskb_trim_unique - remove end from a paged unique (not cloned) buffer
* @skb: buffer to alter
@@ -3005,16 +3009,6 @@ static inline struct sk_buff *dev_alloc_
@@ -3020,16 +3024,6 @@ static inline struct sk_buff *dev_alloc_
}

View File

@ -396,7 +396,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
}
--- a/net/ipv4/route.c
+++ b/net/ipv4/route.c
@@ -387,6 +387,9 @@ static struct pernet_operations ip_rt_pr
@@ -388,6 +388,9 @@ static struct pernet_operations ip_rt_pr
static int __init ip_rt_proc_init(void)
{

View File

@ -87,7 +87,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
if (!net_eq(dev_net(dev), sock_net(sk)))
goto drop;
@@ -3346,6 +3348,7 @@ static int packet_create(struct net *net
@@ -3345,6 +3347,7 @@ static int packet_create(struct net *net
mutex_init(&po->pg_vec_lock);
po->rollover = NULL;
po->prot_hook.func = packet_rcv;
@ -95,7 +95,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
if (sock->type == SOCK_PACKET)
po->prot_hook.func = packet_rcv_spkt;
@@ -3983,6 +3986,16 @@ packet_setsockopt(struct socket *sock, i
@@ -3982,6 +3985,16 @@ packet_setsockopt(struct socket *sock, i
WRITE_ONCE(po->xmit, val ? packet_direct_xmit : dev_queue_xmit);
return 0;
}
@ -112,7 +112,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
default:
return -ENOPROTOOPT;
}
@@ -4039,6 +4052,13 @@ static int packet_getsockopt(struct sock
@@ -4038,6 +4051,13 @@ static int packet_getsockopt(struct sock
case PACKET_VNET_HDR:
val = po->has_vnet_hdr;
break;

View File

@ -9,7 +9,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
--- a/include/linux/skbuff.h
+++ b/include/linux/skbuff.h
@@ -2821,7 +2821,7 @@ static inline int pskb_network_may_pull(
@@ -2836,7 +2836,7 @@ static inline int pskb_network_may_pull(
* NET_IP_ALIGN(2) + ethernet_header(14) + IP_header(20/40) + ports(8)
*/
#ifndef NET_SKB_PAD

View File

@ -110,7 +110,7 @@ Signed-off-by: Jonas Gorski <jogo@openwrt.org>
return -EINVAL;
--- a/net/ipv6/route.c
+++ b/net/ipv6/route.c
@@ -97,6 +97,8 @@ static int ip6_pkt_discard(struct sk_bu
@@ -98,6 +98,8 @@ static int ip6_pkt_discard(struct sk_bu
static int ip6_pkt_discard_out(struct net *net, struct sock *sk, struct sk_buff *skb);
static int ip6_pkt_prohibit(struct sk_buff *skb);
static int ip6_pkt_prohibit_out(struct net *net, struct sock *sk, struct sk_buff *skb);
@ -119,7 +119,7 @@ Signed-off-by: Jonas Gorski <jogo@openwrt.org>
static void ip6_link_failure(struct sk_buff *skb);
static void ip6_rt_update_pmtu(struct dst_entry *dst, struct sock *sk,
struct sk_buff *skb, u32 mtu,
@@ -312,6 +314,18 @@ static const struct rt6_info ip6_prohibi
@@ -313,6 +315,18 @@ static const struct rt6_info ip6_prohibi
.rt6i_flags = (RTF_REJECT | RTF_NONEXTHOP),
};
@ -138,7 +138,7 @@ Signed-off-by: Jonas Gorski <jogo@openwrt.org>
static const struct rt6_info ip6_blk_hole_entry_template = {
.dst = {
.__refcnt = ATOMIC_INIT(1),
@@ -1033,6 +1047,7 @@ static const int fib6_prop[RTN_MAX + 1]
@@ -1034,6 +1048,7 @@ static const int fib6_prop[RTN_MAX + 1]
[RTN_BLACKHOLE] = -EINVAL,
[RTN_UNREACHABLE] = -EHOSTUNREACH,
[RTN_PROHIBIT] = -EACCES,
@ -146,7 +146,7 @@ Signed-off-by: Jonas Gorski <jogo@openwrt.org>
[RTN_THROW] = -EAGAIN,
[RTN_NAT] = -EINVAL,
[RTN_XRESOLVE] = -EINVAL,
@@ -1068,6 +1083,10 @@ static void ip6_rt_init_dst_reject(struc
@@ -1069,6 +1084,10 @@ static void ip6_rt_init_dst_reject(struc
rt->dst.output = ip6_pkt_prohibit_out;
rt->dst.input = ip6_pkt_prohibit;
break;
@ -157,7 +157,7 @@ Signed-off-by: Jonas Gorski <jogo@openwrt.org>
case RTN_THROW:
case RTN_UNREACHABLE:
default:
@@ -4557,6 +4576,17 @@ static int ip6_pkt_prohibit_out(struct n
@@ -4561,6 +4580,17 @@ static int ip6_pkt_prohibit_out(struct n
return ip6_pkt_drop(skb, ICMPV6_ADM_PROHIBITED, IPSTATS_MIB_OUTNOROUTES);
}
@ -175,7 +175,7 @@ Signed-off-by: Jonas Gorski <jogo@openwrt.org>
/*
* Allocate a dst for local (unicast / anycast) address.
*/
@@ -5044,7 +5074,8 @@ static int rtm_to_fib6_config(struct sk_
@@ -5048,7 +5078,8 @@ static int rtm_to_fib6_config(struct sk_
if (rtm->rtm_type == RTN_UNREACHABLE ||
rtm->rtm_type == RTN_BLACKHOLE ||
rtm->rtm_type == RTN_PROHIBIT ||
@ -185,7 +185,7 @@ Signed-off-by: Jonas Gorski <jogo@openwrt.org>
cfg->fc_flags |= RTF_REJECT;
if (rtm->rtm_type == RTN_LOCAL)
@@ -6291,6 +6322,8 @@ static int ip6_route_dev_notify(struct n
@@ -6295,6 +6326,8 @@ static int ip6_route_dev_notify(struct n
#ifdef CONFIG_IPV6_MULTIPLE_TABLES
net->ipv6.ip6_prohibit_entry->dst.dev = dev;
net->ipv6.ip6_prohibit_entry->rt6i_idev = in6_dev_get(dev);
@ -194,7 +194,7 @@ Signed-off-by: Jonas Gorski <jogo@openwrt.org>
net->ipv6.ip6_blk_hole_entry->dst.dev = dev;
net->ipv6.ip6_blk_hole_entry->rt6i_idev = in6_dev_get(dev);
#endif
@@ -6302,6 +6335,7 @@ static int ip6_route_dev_notify(struct n
@@ -6306,6 +6339,7 @@ static int ip6_route_dev_notify(struct n
in6_dev_put_clear(&net->ipv6.ip6_null_entry->rt6i_idev);
#ifdef CONFIG_IPV6_MULTIPLE_TABLES
in6_dev_put_clear(&net->ipv6.ip6_prohibit_entry->rt6i_idev);
@ -202,7 +202,7 @@ Signed-off-by: Jonas Gorski <jogo@openwrt.org>
in6_dev_put_clear(&net->ipv6.ip6_blk_hole_entry->rt6i_idev);
#endif
}
@@ -6493,6 +6527,8 @@ static int __net_init ip6_route_net_init
@@ -6497,6 +6531,8 @@ static int __net_init ip6_route_net_init
#ifdef CONFIG_IPV6_MULTIPLE_TABLES
net->ipv6.fib6_has_custom_rules = false;
@ -211,7 +211,7 @@ Signed-off-by: Jonas Gorski <jogo@openwrt.org>
net->ipv6.ip6_prohibit_entry = kmemdup(&ip6_prohibit_entry_template,
sizeof(*net->ipv6.ip6_prohibit_entry),
GFP_KERNEL);
@@ -6503,11 +6539,21 @@ static int __net_init ip6_route_net_init
@@ -6507,11 +6543,21 @@ static int __net_init ip6_route_net_init
ip6_template_metrics, true);
INIT_LIST_HEAD(&net->ipv6.ip6_prohibit_entry->rt6i_uncached);
@ -234,7 +234,7 @@ Signed-off-by: Jonas Gorski <jogo@openwrt.org>
net->ipv6.ip6_blk_hole_entry->dst.ops = &net->ipv6.ip6_dst_ops;
dst_init_metrics(&net->ipv6.ip6_blk_hole_entry->dst,
ip6_template_metrics, true);
@@ -6534,6 +6580,8 @@ out:
@@ -6538,6 +6584,8 @@ out:
return ret;
#ifdef CONFIG_IPV6_MULTIPLE_TABLES
@ -243,7 +243,7 @@ Signed-off-by: Jonas Gorski <jogo@openwrt.org>
out_ip6_prohibit_entry:
kfree(net->ipv6.ip6_prohibit_entry);
out_ip6_null_entry:
@@ -6553,6 +6601,7 @@ static void __net_exit ip6_route_net_exi
@@ -6557,6 +6605,7 @@ static void __net_exit ip6_route_net_exi
kfree(net->ipv6.ip6_null_entry);
#ifdef CONFIG_IPV6_MULTIPLE_TABLES
kfree(net->ipv6.ip6_prohibit_entry);
@ -251,7 +251,7 @@ Signed-off-by: Jonas Gorski <jogo@openwrt.org>
kfree(net->ipv6.ip6_blk_hole_entry);
#endif
dst_entries_destroy(&net->ipv6.ip6_dst_ops);
@@ -6636,6 +6685,9 @@ void __init ip6_route_init_special_entri
@@ -6640,6 +6689,9 @@ void __init ip6_route_init_special_entri
init_net.ipv6.ip6_prohibit_entry->rt6i_idev = in6_dev_get(init_net.loopback_dev);
init_net.ipv6.ip6_blk_hole_entry->dst.dev = init_net.loopback_dev;
init_net.ipv6.ip6_blk_hole_entry->rt6i_idev = in6_dev_get(init_net.loopback_dev);

View File

@ -17,7 +17,7 @@ Signed-off-by: Alexander Duyck <alexanderduyck@fb.com>
--- a/net/core/skbuff.c
+++ b/net/core/skbuff.c
@@ -4360,6 +4360,15 @@ int skb_gro_receive(struct sk_buff *p, s
@@ -4371,6 +4371,15 @@ int skb_gro_receive(struct sk_buff *p, s
if (unlikely(p->len + len >= 65536 || NAPI_GRO_CB(skb)->flush))
return -E2BIG;

View File

@ -162,7 +162,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
void netif_napi_add(struct net_device *dev, struct napi_struct *napi,
int (*poll)(struct napi_struct *, int), int weight)
{
@@ -11384,6 +11459,9 @@ static int dev_cpu_dead(unsigned int old
@@ -11385,6 +11460,9 @@ static int dev_cpu_dead(unsigned int old
raise_softirq_irqoff(NET_TX_SOFTIRQ);
local_irq_enable();
@ -172,7 +172,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
#ifdef CONFIG_RPS
remsd = oldsd->rps_ipi_list;
oldsd->rps_ipi_list = NULL;
@@ -11723,6 +11801,7 @@ static int __init net_dev_init(void)
@@ -11724,6 +11802,7 @@ static int __init net_dev_init(void)
sd->cpu = i;
#endif

View File

@ -17,7 +17,7 @@ Signed-off-by: Tobias Waldekranz <tobias@waldekranz.com>
--- a/drivers/net/dsa/mv88e6xxx/chip.c
+++ b/drivers/net/dsa/mv88e6xxx/chip.c
@@ -6393,6 +6393,7 @@ static int mv88e6xxx_register_switch(str
@@ -6435,6 +6435,7 @@ static int mv88e6xxx_register_switch(str
ds->ops = &mv88e6xxx_switch_ops;
ds->ageing_time_min = chip->info->age_time_coeff;
ds->ageing_time_max = chip->info->age_time_coeff * U8_MAX;

View File

@ -1,31 +0,0 @@
From 4a44a52f16ccd3d03e0cb5fb437a5eb31a5f9f05 Mon Sep 17 00:00:00 2001
From: David Bauer <mail@david-bauer.net>
Date: Mon, 26 Feb 2024 21:39:34 +0100
Subject: [PATCH] net l2tp: drop flow hash on forward
Drop the flow-hash of the skb when forwarding to the L2TP netdev.
This avoids the L2TP qdisc from using the flow-hash from the outer
packet, which is identical for every flow within the tunnel.
This does not affect every platform but is specific for the ethernet
driver. It depends on the platform including L4 information in the
flow-hash.
Signed-off-by: David Bauer <mail@david-bauer.net>
---
net/l2tp/l2tp_eth.c | 3 +++
1 file changed, 3 insertions(+)
--- a/net/l2tp/l2tp_eth.c
+++ b/net/l2tp/l2tp_eth.c
@@ -136,6 +136,9 @@ static void l2tp_eth_dev_recv(struct l2t
/* checksums verified by L2TP */
skb->ip_summed = CHECKSUM_NONE;
+ /* drop outer flow-hash */
+ skb_clear_hash(skb);
+
skb_dst_drop(skb);
nf_reset_ct(skb);

View File

@ -8,7 +8,7 @@ Signed-off-by: Daniel Golle <daniel@makrotopia.org>
--- a/drivers/mtd/ubi/build.c
+++ b/drivers/mtd/ubi/build.c
@@ -1258,6 +1258,74 @@ static struct mtd_notifier ubi_mtd_notif
@@ -1258,6 +1258,80 @@ static struct mtd_notifier ubi_mtd_notif
.remove = ubi_notify_remove,
};
@ -21,6 +21,7 @@ Signed-off-by: Daniel Golle <daniel@makrotopia.org>
+{
+ int err;
+ struct mtd_info *mtd;
+ struct device_node *np;
+ loff_t offset = 0;
+ size_t len;
+ char magic[4];
@ -33,6 +34,11 @@ Signed-off-by: Daniel Golle <daniel@makrotopia.org>
+ if (IS_ERR(mtd))
+ return;
+
+ /* skip "linux,ubi" mtd as it has already been attached */
+ np = mtd_get_of_node(mtd);
+ if (of_device_is_compatible(np, "linux,ubi"))
+ goto cleanup;
+
+ /* get the first not bad block */
+ if (mtd_can_have_bb(mtd))
+ while (mtd_block_isbad(mtd, offset)) {
@ -83,7 +89,7 @@ Signed-off-by: Daniel Golle <daniel@makrotopia.org>
static int __init ubi_init_attach(void)
{
int err, i, k;
@@ -1308,6 +1376,12 @@ static int __init ubi_init_attach(void)
@@ -1308,6 +1382,12 @@ static int __init ubi_init_attach(void)
}
}

View File

@ -668,7 +668,7 @@ Signed-off-by: Daniel Golle <daniel@makrotopia.org>
+ (imgmaxsect + MIN_FREE_SECT) < dsectors) {
+ add_fit_subimage_device(bdev, slot++, imgmaxsect,
+ dsectors - imgmaxsect, false);
+ dev_info(dev, "mapped remaing space as /dev/fitrw\n");
+ dev_info(dev, "mapped remaining space as /dev/fitrw\n");
+ }
+
+out_bootconf:

View File

@ -10,7 +10,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
@@ -4994,6 +4994,8 @@ static int mtk_probe(struct platform_dev
@@ -5020,6 +5020,8 @@ static int mtk_probe(struct platform_dev
* for NAPI to work
*/
init_dummy_netdev(&eth->dummy_dev);

View File

@ -11,7 +11,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.h
+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.h
@@ -1334,6 +1334,22 @@ struct mtk_mac {
@@ -1336,6 +1336,22 @@ struct mtk_mac {
/* the struct describing the SoC. these are declared in the soc_xyz.c files */
extern const struct of_device_id of_mtk_match[];
@ -34,7 +34,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
static inline bool mtk_is_netsys_v1(struct mtk_eth *eth)
{
return eth->soc->version == 1;
@@ -1348,6 +1364,7 @@ static inline bool mtk_is_netsys_v3_or_g
@@ -1350,6 +1366,7 @@ static inline bool mtk_is_netsys_v3_or_g
{
return eth->soc->version > 2;
}

View File

@ -24,7 +24,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
#include <net/page_pool/helpers.h>
#include "mtk_eth_soc.h"
@@ -1587,12 +1588,28 @@ static void mtk_wake_queue(struct mtk_et
@@ -1596,12 +1597,28 @@ static void mtk_wake_queue(struct mtk_et
}
}
@ -53,7 +53,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
bool gso = false;
int tx_num;
@@ -1614,6 +1631,18 @@ static netdev_tx_t mtk_start_xmit(struct
@@ -1623,6 +1640,18 @@ static netdev_tx_t mtk_start_xmit(struct
return NETDEV_TX_BUSY;
}
@ -72,7 +72,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
/* TSO: fill MSS info in tcp checksum field */
if (skb_is_gso(skb)) {
if (skb_cow_head(skb, 0)) {
@@ -1629,8 +1658,14 @@ static netdev_tx_t mtk_start_xmit(struct
@@ -1638,8 +1667,14 @@ static netdev_tx_t mtk_start_xmit(struct
}
}

View File

@ -10,7 +10,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
@@ -2129,7 +2129,7 @@ static int mtk_poll_rx(struct napi_struc
@@ -2140,7 +2140,7 @@ static int mtk_poll_rx(struct napi_struc
if (ret != XDP_PASS)
goto skip_rx;
@ -19,7 +19,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
if (unlikely(!skb)) {
page_pool_put_full_page(ring->page_pool,
page, true);
@@ -2167,7 +2167,7 @@ static int mtk_poll_rx(struct napi_struc
@@ -2178,7 +2178,7 @@ static int mtk_poll_rx(struct napi_struc
dma_unmap_single(eth->dma_dev, ((u64)trxd.rxd1 | addr64),
ring->buf_size, DMA_FROM_DEVICE);

View File

@ -0,0 +1,33 @@
From 379ae584cea112db60f4ada79c7e5ba4f3364a64 Mon Sep 17 00:00:00 2001
X-Patchwork-Submitter: Daniel Golle <daniel@makrotopia.org>
X-Patchwork-Id: 13718593
X-Patchwork-Delegate: kuba@kernel.org
List-Id: <netdev.vger.kernel.org>
From: Daniel Golle <daniel@makrotopia.org>
Date: Mon, 1 Jul 2024 19:26:28 +0100
Subject: [PATCH] net: ethernet: mediatek: Allow gaps in MAC allocation
Some devices with MediaTek SoCs don't use the first but only the second
MAC in the chip. Especially with MT7981 which got a built-in 1GE PHY
connected to the second MAC this is quite common.
Make sure to reset and enable PSE also in those cases by skipping gaps
using 'continue' instead of aborting the loop using 'break'.
Fixes: dee4dd10c79a ("net: ethernet: mtk_eth_soc: ppe: add support for multiple PPEs")
Suggested-by: Elad Yifee <eladwf@gmail.com>
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
---
drivers/net/ethernet/mediatek/mtk_eth_soc.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
@@ -3431,7 +3431,7 @@ static int mtk_open(struct net_device *d
for (i = 0; i < MTK_MAX_DEVS; i++) {
if (!eth->netdev[i])
- break;
+ continue;
target_mac = netdev_priv(eth->netdev[i]);
if (!soc->offload_version) {

View File

@ -214,7 +214,7 @@ Signed-off-by: Daniel Golle <daniel@makrotopia.org>
#include <linux/jhash.h>
#include <linux/bitfield.h>
#include <net/dsa.h>
@@ -261,12 +263,8 @@ static const char * const mtk_clks_sourc
@@ -270,12 +272,8 @@ static const char * const mtk_clks_sourc
"ethwarp_wocpu2",
"ethwarp_wocpu1",
"ethwarp_wocpu0",
@ -227,7 +227,7 @@ Signed-off-by: Daniel Golle <daniel@makrotopia.org>
"top_eth_gmii_sel",
"top_eth_refck_50m_sel",
"top_eth_sys_200m_sel",
@@ -509,6 +507,30 @@ static void mtk_setup_bridge_switch(stru
@@ -518,6 +516,30 @@ static void mtk_setup_bridge_switch(stru
MTK_GSW_CFG);
}
@ -258,7 +258,7 @@ Signed-off-by: Daniel Golle <daniel@makrotopia.org>
static struct phylink_pcs *mtk_mac_select_pcs(struct phylink_config *config,
phy_interface_t interface)
{
@@ -517,6 +539,21 @@ static struct phylink_pcs *mtk_mac_selec
@@ -526,6 +548,21 @@ static struct phylink_pcs *mtk_mac_selec
struct mtk_eth *eth = mac->hw;
unsigned int sid;
@ -280,7 +280,7 @@ Signed-off-by: Daniel Golle <daniel@makrotopia.org>
if (interface == PHY_INTERFACE_MODE_SGMII ||
phy_interface_mode_is_8023z(interface)) {
sid = (MTK_HAS_CAPS(eth->soc->caps, MTK_SHARED_SGMII)) ?
@@ -568,7 +605,22 @@ static void mtk_mac_config(struct phylin
@@ -577,7 +614,22 @@ static void mtk_mac_config(struct phylin
goto init_err;
}
break;
@ -303,7 +303,7 @@ Signed-off-by: Daniel Golle <daniel@makrotopia.org>
break;
default:
goto err_phy;
@@ -615,8 +667,6 @@ static void mtk_mac_config(struct phylin
@@ -624,8 +676,6 @@ static void mtk_mac_config(struct phylin
val &= ~SYSCFG0_GE_MODE(SYSCFG0_GE_MASK, mac->id);
val |= SYSCFG0_GE_MODE(ge_mode, mac->id);
regmap_write(eth->ethsys, ETHSYS_SYSCFG0, val);
@ -312,7 +312,7 @@ Signed-off-by: Daniel Golle <daniel@makrotopia.org>
}
/* SGMII */
@@ -633,21 +683,40 @@ static void mtk_mac_config(struct phylin
@@ -642,21 +692,40 @@ static void mtk_mac_config(struct phylin
/* Save the syscfg0 value for mac_finish */
mac->syscfg0 = val;
@ -360,7 +360,7 @@ Signed-off-by: Daniel Golle <daniel@makrotopia.org>
return;
err_phy:
@@ -660,6 +729,18 @@ init_err:
@@ -669,6 +738,18 @@ init_err:
mac->id, phy_modes(state->interface), err);
}
@ -379,7 +379,7 @@ Signed-off-by: Daniel Golle <daniel@makrotopia.org>
static int mtk_mac_finish(struct phylink_config *config, unsigned int mode,
phy_interface_t interface)
{
@@ -668,6 +749,10 @@ static int mtk_mac_finish(struct phylink
@@ -677,6 +758,10 @@ static int mtk_mac_finish(struct phylink
struct mtk_eth *eth = mac->hw;
u32 mcr_cur, mcr_new;
@ -390,7 +390,7 @@ Signed-off-by: Daniel Golle <daniel@makrotopia.org>
/* Enable SGMII */
if (interface == PHY_INTERFACE_MODE_SGMII ||
phy_interface_mode_is_8023z(interface))
@@ -692,10 +777,14 @@ static void mtk_mac_link_down(struct phy
@@ -701,10 +786,14 @@ static void mtk_mac_link_down(struct phy
{
struct mtk_mac *mac = container_of(config, struct mtk_mac,
phylink_config);
@ -408,7 +408,7 @@ Signed-off-by: Daniel Golle <daniel@makrotopia.org>
}
static void mtk_set_queue_speed(struct mtk_eth *eth, unsigned int idx,
@@ -767,13 +856,11 @@ static void mtk_set_queue_speed(struct m
@@ -776,13 +865,11 @@ static void mtk_set_queue_speed(struct m
mtk_w32(eth, val, soc->reg_map->qdma.qtx_sch + ofs);
}
@ -426,7 +426,7 @@ Signed-off-by: Daniel Golle <daniel@makrotopia.org>
u32 mcr;
mcr = mtk_r32(mac->hw, MTK_MAC_MCR(mac->id));
@@ -807,9 +894,63 @@ static void mtk_mac_link_up(struct phyli
@@ -816,9 +903,63 @@ static void mtk_mac_link_up(struct phyli
mtk_w32(mac->hw, mcr, MTK_MAC_MCR(mac->id));
}
@ -490,9 +490,9 @@ Signed-off-by: Daniel Golle <daniel@makrotopia.org>
.mac_finish = mtk_mac_finish,
.mac_link_down = mtk_mac_link_down,
.mac_link_up = mtk_mac_link_up,
@@ -3403,6 +3544,9 @@ static int mtk_open(struct net_device *d
struct mtk_eth *eth = mac->hw;
int i, err;
@@ -3407,6 +3548,9 @@ static int mtk_open(struct net_device *d
ppe_num = eth->soc->ppe_num;
+ if (mac->pextp)
+ phy_power_on(mac->pextp);
@ -500,7 +500,7 @@ Signed-off-by: Daniel Golle <daniel@makrotopia.org>
err = phylink_of_phy_connect(mac->phylink, mac->of_node, 0);
if (err) {
netdev_err(dev, "%s: could not attach PHY: %d\n", __func__,
@@ -3532,6 +3676,9 @@ static int mtk_stop(struct net_device *d
@@ -3557,6 +3701,9 @@ static int mtk_stop(struct net_device *d
for (i = 0; i < ARRAY_SIZE(eth->ppe); i++)
mtk_ppe_stop(eth->ppe[i]);
@ -510,7 +510,7 @@ Signed-off-by: Daniel Golle <daniel@makrotopia.org>
return 0;
}
@@ -4529,6 +4676,7 @@ static const struct net_device_ops mtk_n
@@ -4554,6 +4701,7 @@ static const struct net_device_ops mtk_n
static int mtk_add_mac(struct mtk_eth *eth, struct device_node *np)
{
const __be32 *_id = of_get_property(np, "reg", NULL);
@ -518,7 +518,7 @@ Signed-off-by: Daniel Golle <daniel@makrotopia.org>
phy_interface_t phy_mode;
struct phylink *phylink;
struct mtk_mac *mac;
@@ -4565,16 +4713,41 @@ static int mtk_add_mac(struct mtk_eth *e
@@ -4590,16 +4738,41 @@ static int mtk_add_mac(struct mtk_eth *e
mac->id = id;
mac->hw = eth;
mac->of_node = np;
@ -568,7 +568,7 @@ Signed-off-by: Daniel Golle <daniel@makrotopia.org>
}
memset(mac->hwlro_ip, 0, sizeof(mac->hwlro_ip));
@@ -4657,8 +4830,21 @@ static int mtk_add_mac(struct mtk_eth *e
@@ -4682,8 +4855,21 @@ static int mtk_add_mac(struct mtk_eth *e
phy_interface_zero(mac->phylink_config.supported_interfaces);
__set_bit(PHY_INTERFACE_MODE_INTERNAL,
mac->phylink_config.supported_interfaces);
@ -590,7 +590,7 @@ Signed-off-by: Daniel Golle <daniel@makrotopia.org>
phylink = phylink_create(&mac->phylink_config,
of_fwnode_handle(mac->of_node),
phy_mode, &mtk_phylink_ops);
@@ -4709,6 +4895,26 @@ free_netdev:
@@ -4734,6 +4920,26 @@ free_netdev:
return err;
}
@ -617,7 +617,7 @@ Signed-off-by: Daniel Golle <daniel@makrotopia.org>
void mtk_eth_set_dma_device(struct mtk_eth *eth, struct device *dma_dev)
{
struct net_device *dev, *tmp;
@@ -4855,7 +5061,8 @@ static int mtk_probe(struct platform_dev
@@ -4880,7 +5086,8 @@ static int mtk_probe(struct platform_dev
regmap_write(cci, 0, 3);
}
@ -627,7 +627,7 @@ Signed-off-by: Daniel Golle <daniel@makrotopia.org>
err = mtk_sgmii_init(eth);
if (err)
@@ -4966,6 +5173,24 @@ static int mtk_probe(struct platform_dev
@@ -4991,6 +5198,24 @@ static int mtk_probe(struct platform_dev
}
}
@ -652,7 +652,7 @@ Signed-off-by: Daniel Golle <daniel@makrotopia.org>
if (MTK_HAS_CAPS(eth->soc->caps, MTK_SHARED_INT)) {
err = devm_request_irq(eth->dev, eth->irq[0],
mtk_handle_irq, 0,
@@ -5068,6 +5293,11 @@ static int mtk_remove(struct platform_de
@@ -5094,6 +5319,11 @@ static int mtk_remove(struct platform_de
mtk_stop(eth->netdev[i]);
mac = netdev_priv(eth->netdev[i]);
phylink_disconnect_phy(mac->phylink);
@ -893,7 +893,7 @@ Signed-off-by: Daniel Golle <daniel@makrotopia.org>
struct mtk_tx_dma_desc_info {
dma_addr_t addr;
@@ -1322,6 +1379,9 @@ struct mtk_mac {
@@ -1324,6 +1381,9 @@ struct mtk_mac {
struct device_node *of_node;
struct phylink *phylink;
struct phylink_config phylink_config;
@ -903,7 +903,7 @@ Signed-off-by: Daniel Golle <daniel@makrotopia.org>
struct mtk_eth *hw;
struct mtk_hw_stats *hw_stats;
__be32 hwlro_ip[MTK_MAX_LRO_IP_CNT];
@@ -1445,6 +1505,19 @@ static inline u32 mtk_get_ib2_multicast_
@@ -1447,6 +1507,19 @@ static inline u32 mtk_get_ib2_multicast_
return MTK_FOE_IB2_MULTICAST;
}
@ -923,7 +923,7 @@ Signed-off-by: Daniel Golle <daniel@makrotopia.org>
/* read the hardware status register */
void mtk_stats_update_mac(struct mtk_mac *mac);
@@ -1453,8 +1526,10 @@ u32 mtk_r32(struct mtk_eth *eth, unsigne
@@ -1455,8 +1528,10 @@ u32 mtk_r32(struct mtk_eth *eth, unsigne
u32 mtk_m32(struct mtk_eth *eth, u32 mask, u32 set, unsigned int reg);
int mtk_gmac_sgmii_path_setup(struct mtk_eth *eth, int mac_id);
@ -932,5 +932,5 @@ Signed-off-by: Daniel Golle <daniel@makrotopia.org>
int mtk_gmac_rgmii_path_setup(struct mtk_eth *eth, int mac_id);
+int mtk_gmac_usxgmii_path_setup(struct mtk_eth *eth, int mac_id);
int mtk_eth_offload_init(struct mtk_eth *eth);
int mtk_eth_offload_init(struct mtk_eth *eth, u8 id);
int mtk_eth_setup_tc(struct net_device *dev, enum tc_setup_type type,

View File

@ -16,7 +16,6 @@
led-failsafe = &led_status;
led-running = &led_status;
led-upgrade = &led_upgrade;
ethernet1 = &swport5;
};
soc {
@ -266,6 +265,14 @@
#address-cells = <1>;
#size-cells = <1>;
macaddr_lan: macaddr@0 {
reg = <0x0 0x6>;
};
macaddr_wan: macaddr@6 {
reg = <0x6 0x6>;
};
precal_art_1000: precal@1000 {
reg = <0x1000 0x2f20>;
};
@ -330,6 +337,9 @@
&gmac {
status = "okay";
nvmem-cell-names = "mac-address";
nvmem-cells = <&macaddr_wan>;
};
&switch {
@ -338,22 +348,37 @@
&swport1 {
status = "okay";
nvmem-cell-names = "mac-address";
nvmem-cells = <&macaddr_lan>;
};
&swport2 {
status = "okay";
nvmem-cell-names = "mac-address";
nvmem-cells = <&macaddr_lan>;
};
&swport3 {
status = "okay";
nvmem-cell-names = "mac-address";
nvmem-cells = <&macaddr_lan>;
};
&swport4 {
status = "okay";
nvmem-cell-names = "mac-address";
nvmem-cells = <&macaddr_lan>;
};
&swport5 {
status = "okay";
nvmem-cell-names = "mac-address";
nvmem-cells = <&macaddr_wan>;
};
&wifi0 {

View File

@ -88,7 +88,7 @@ Signed-off-by: Maxime Chevallier <maxime.chevallier@bootlin.com>
+ipq_ess-objs := ipqess.o ipqess_ethtool.o
--- /dev/null
+++ b/drivers/net/ethernet/qualcomm/ipqess/ipqess.c
@@ -0,0 +1,1246 @@
@@ -0,0 +1,1251 @@
+// SPDX-License-Identifier: GPL-2.0 OR ISC
+/* Copyright (c) 2014 - 2017, The Linux Foundation. All rights reserved.
+ * Copyright (c) 2017 - 2018, John Crispin <john@phrozen.org>
@ -655,15 +655,10 @@ Signed-off-by: Maxime Chevallier <maxime.chevallier@bootlin.com>
+ }
+}
+
+static int __init ipqess_init(struct net_device *netdev)
+static int ipqess_init(struct net_device *netdev)
+{
+ struct ipqess *ess = netdev_priv(netdev);
+ struct device_node *of_node = ess->pdev->dev.of_node;
+ int ret;
+
+ ret = of_get_ethdev_address(of_node, netdev);
+ if (ret)
+ eth_hw_addr_random(netdev);
+
+ return phylink_of_phy_connect(ess->phylink, of_node, 0);
+}
@ -1201,6 +1196,16 @@ Signed-off-by: Maxime Chevallier <maxime.chevallier@bootlin.com>
+ SET_NETDEV_DEV(netdev, &pdev->dev);
+ platform_set_drvdata(pdev, netdev);
+
+ err = of_get_ethdev_address(np, netdev);
+ if (err) {
+ dev_dbg(&pdev->dev, "failed to get MAC address from DT: %d\n", err);
+ if (err == -EPROBE_DEFER)
+ return err;
+ eth_hw_addr_random(netdev);
+ dev_info(&pdev->dev, "using random MAC address %pM\n",
+ netdev->dev_addr);
+ }
+
+ ess->hw_addr = devm_platform_get_and_ioremap_resource(pdev, 0, NULL);
+ if (IS_ERR(ess->hw_addr))
+ return PTR_ERR(ess->hw_addr);

View File

@ -72,7 +72,7 @@ Signed-off-by: Matthias Schiffer <mschiffer@universe-factory.net>
napi_gro_receive(&rx_ring->napi_rx, skb);
rx_ring->ess->stats.rx_packets++;
@@ -706,6 +715,26 @@ static void ipqess_rollback_tx(struct ip
@@ -701,6 +710,26 @@ static void ipqess_rollback_tx(struct ip
tx_ring->head = start_index;
}
@ -99,7 +99,7 @@ Signed-off-by: Matthias Schiffer <mschiffer@universe-factory.net>
static int ipqess_tx_map_and_fill(struct ipqess_tx_ring *tx_ring,
struct sk_buff *skb)
{
@@ -716,6 +745,8 @@ static int ipqess_tx_map_and_fill(struct
@@ -711,6 +740,8 @@ static int ipqess_tx_map_and_fill(struct
u16 len;
int i;
@ -108,7 +108,7 @@ Signed-off-by: Matthias Schiffer <mschiffer@universe-factory.net>
if (skb_is_gso(skb)) {
if (skb_shinfo(skb)->gso_type & SKB_GSO_TCPV4) {
lso_word1 |= IPQESS_TPD_IPV4_EN;
@@ -917,6 +948,33 @@ static const struct net_device_ops ipqes
@@ -912,6 +943,33 @@ static const struct net_device_ops ipqes
.ndo_tx_timeout = ipqess_tx_timeout,
};
@ -142,7 +142,7 @@ Signed-off-by: Matthias Schiffer <mschiffer@universe-factory.net>
static void ipqess_hw_stop(struct ipqess *ess)
{
int i;
@@ -1184,12 +1242,19 @@ static int ipqess_axi_probe(struct platf
@@ -1189,12 +1247,19 @@ static int ipqess_axi_probe(struct platf
netif_napi_add(netdev, &ess->rx_ring[i].napi_rx, ipqess_rx_napi);
}

View File

@ -50,7 +50,7 @@ Signed-off-by: Robert Marko <robimarko@gmail.com>
--- a/drivers/net/ethernet/qualcomm/ipqess/ipqess.c
+++ b/drivers/net/ethernet/qualcomm/ipqess/ipqess.c
@@ -636,9 +636,22 @@ static int ipqess_stop(struct net_device
@@ -631,9 +631,22 @@ static int ipqess_stop(struct net_device
netif_tx_stop_all_queues(netdev);
phylink_stop(ess->phylink);
ipqess_irq_disable(ess);

View File

@ -38,7 +38,7 @@ Signed-off-by: Robert Marko <robimarko@gmail.com>
}
return IRQ_HANDLED;
@@ -1264,6 +1264,8 @@ static int ipqess_axi_probe(struct platf
@@ -1269,6 +1269,8 @@ static int ipqess_axi_probe(struct platf
if (err)
goto err_notifier_unregister;

View File

@ -49,6 +49,7 @@ CONFIG_ARM_QCOM_SPM_CPUIDLE=y
CONFIG_ARM_THUMB=y
CONFIG_ARM_UNWIND=y
CONFIG_ARM_VIRT_EXT=y
CONFIG_AT803X_PHY=y
CONFIG_AUTO_ZRELADDR=y
CONFIG_BINFMT_FLAT_ARGVP_ENVP_ON_STACK=y
CONFIG_BLK_DEV_LOOP=y

View File

@ -18,7 +18,6 @@
aliases {
serial0 = &gsbi7_serial;
serial1 = &gsbi2_serial;
mdio-gpio0 = &mdio0;
ethernet0 = &gmac0;
ethernet1 = &gmac2;
@ -140,6 +139,21 @@
bias-pull-up;
};
};
rgmii0_pins: rgmii0_pins {
mux {
pins = "gpio2", "gpio66";
drive-strength = <8>;
bias-disable;
};
tx {
pins = "gpio53", "gpio64";
drive-strength = <2>;
bias-pull-down;
input-enable;
};
};
};
&gsbi2 {
@ -299,26 +313,15 @@
};
};
&soc {
mdio1: mdio {
compatible = "virtual,mdio-gpio";
#address-cells = <1>;
#size-cells = <0>;
&mdio0 {
status = "okay";
status = "okay";
phy1: ethernet-phy@1 {
reg = <1>;
};
pinctrl-0 = <&mdio0_pins>;
pinctrl-names = "default";
gpios = <&qcom_pinmux 1 GPIO_ACTIVE_HIGH &qcom_pinmux 0 GPIO_ACTIVE_HIGH>;
phy1: ethernet-phy@1 {
reg = <1>;
};
phy2: ethernet-phy@2 {
reg = <2>;
};
phy2: ethernet-phy@2 {
reg = <2>;
};
};
@ -326,25 +329,23 @@
status = "okay";
qcom,id = <0>;
mdiobus = <&mdio1>;
mdiobus = <&mdio0>;
phy-mode = "rgmii";
pinctrl-0 = <&rgmii0_pins>;
pinctrl-names = "default";
phy-mode = "rgmii-id";
phy-handle = <&phy1>;
nvmem-cells = <&ethaddr 0>;
nvmem-cell-names = "mac-address";
fixed-link {
speed = <1000>;
full-duplex;
};
};
&gmac2 {
status = "okay";
qcom,id = <2>;
mdiobus = <&mdio1>;
mdiobus = <&mdio0>;
phy-mode = "sgmii";
phy-handle = <&phy2>;

View File

@ -1,7 +1,6 @@
ARCH:=mips64
CPU_TYPE:=mips64r2
SUBTARGET:=be64
FEATURES+=source-only
BOARDNAME:=Big Endian (64-bits)
define Target/Description

View File

@ -1,7 +1,6 @@
ARCH:=mipsel
CPU_TYPE:=24kc
SUBTARGET:=le
FEATURES+=source-only
BOARDNAME:=Little Endian
define Target/Description

View File

@ -1,7 +1,6 @@
ARCH:=mips64el
CPU_TYPE:=mips64r2
SUBTARGET:=le64
FEATURES+=source-only
BOARDNAME:=Little Endian (64-bits)
define Target/Description

View File

@ -12,7 +12,7 @@ CPU_TYPE:=24kc
CPU_SUBTYPE:=24kf
SUBTARGETS:=generic
KERNEL_PATCHVER:=6.1
KERNEL_PATCHVER:=6.6
include $(INCLUDE_DIR)/target.mk

View File

@ -0,0 +1,363 @@
CONFIG_ARCH_32BIT_OFF_T=y
CONFIG_ARCH_HIBERNATION_POSSIBLE=y
CONFIG_ARCH_KEEP_MEMBLOCK=y
CONFIG_ARCH_MMAP_RND_BITS_MAX=15
CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MAX=15
CONFIG_ARCH_SUSPEND_POSSIBLE=y
CONFIG_BLK_DEV_LOOP=y
CONFIG_BLK_DEV_SD=y
# CONFIG_BOARD_INGENIC is not set
CONFIG_BOARD_SCACHE=y
CONFIG_BUFFER_HEAD=y
CONFIG_BUILTIN_DTB=y
CONFIG_CC_IMPLICIT_FALLTHROUGH="-Wimplicit-fallthrough=5"
CONFIG_CC_NO_ARRAY_BOUNDS=y
CONFIG_CEVT_R4K=y
CONFIG_CLKSRC_MIPS_GIC=y
CONFIG_CLKSRC_PISTACHIO=y
CONFIG_CLOCKSOURCE_WATCHDOG=y
CONFIG_CLOCKSOURCE_WATCHDOG_MAX_SKEW_US=100
CONFIG_CLONE_BACKWARDS=y
CONFIG_COMMON_CLK=y
CONFIG_COMMON_CLK_PISTACHIO=y
CONFIG_COMPACT_UNEVICTABLE_DEFAULT=1
CONFIG_COMPAT_32BIT_TIME=y
CONFIG_CONNECTOR=y
CONFIG_CONTEXT_TRACKING=y
CONFIG_CONTEXT_TRACKING_IDLE=y
CONFIG_CPU_GENERIC_DUMP_TLB=y
CONFIG_CPU_HAS_DIEI=y
CONFIG_CPU_HAS_PREFETCH=y
CONFIG_CPU_HAS_RIXI=y
# CONFIG_CPU_HAS_SMARTMIPS is not set
CONFIG_CPU_HAS_SYNC=y
CONFIG_CPU_IDLE=y
CONFIG_CPU_IDLE_GOV_LADDER=y
CONFIG_CPU_IDLE_GOV_MENU=y
CONFIG_CPU_LITTLE_ENDIAN=y
# CONFIG_CPU_MICROMIPS is not set
CONFIG_CPU_MIPS32=y
# CONFIG_CPU_MIPS32_R1 is not set
CONFIG_CPU_MIPS32_R2=y
# CONFIG_CPU_MIPS32_R5 is not set
# CONFIG_CPU_MIPS32_R5_FEATURES is not set
# CONFIG_CPU_MIPS32_R6 is not set
# CONFIG_CPU_MIPS64_R1 is not set
# CONFIG_CPU_MIPS64_R2 is not set
# CONFIG_CPU_MIPS64_R5 is not set
# CONFIG_CPU_MIPS64_R6 is not set
CONFIG_CPU_MIPSR2=y
CONFIG_CPU_MIPSR2_IRQ_EI=y
CONFIG_CPU_MIPSR2_IRQ_VI=y
CONFIG_CPU_MITIGATIONS=y
CONFIG_CPU_NEEDS_NO_SMARTMIPS_OR_MICROMIPS=y
CONFIG_CPU_PM=y
CONFIG_CPU_R4K_CACHE_TLB=y
CONFIG_CPU_RMAP=y
CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y
CONFIG_CPU_SUPPORTS_HIGHMEM=y
CONFIG_CPU_SUPPORTS_MSA=y
CONFIG_CRC16=y
CONFIG_CRC_CCITT=y
CONFIG_CRYPTO_CBC=y
CONFIG_CRYPTO_CRC32C=y
CONFIG_CRYPTO_DEFLATE=y
CONFIG_CRYPTO_HASH_INFO=y
CONFIG_CRYPTO_LIB_BLAKE2S_GENERIC=y
CONFIG_CRYPTO_LIB_GF128MUL=y
CONFIG_CRYPTO_LIB_POLY1305_RSIZE=2
CONFIG_CRYPTO_LIB_SHA1=y
CONFIG_CRYPTO_LIB_SHA256=y
CONFIG_CRYPTO_LIB_UTILS=y
CONFIG_CRYPTO_LZO=y
CONFIG_CRYPTO_MD5=y
CONFIG_CRYPTO_RNG=y
CONFIG_CRYPTO_RNG2=y
CONFIG_CRYPTO_SHA1=y
CONFIG_CRYPTO_SHA256=y
CONFIG_CRYPTO_ZSTD=y
CONFIG_CSRC_R4K=y
CONFIG_DEBUG_INFO=y
CONFIG_DMADEVICES=y
CONFIG_DMA_ENGINE=y
CONFIG_DMA_NONCOHERENT=y
CONFIG_DMA_OF=y
CONFIG_DMA_VIRTUAL_CHANNELS=y
CONFIG_DTC=y
CONFIG_DWMAC_GENERIC=y
CONFIG_EXCLUSIVE_SYSTEM_RAM=y
CONFIG_EXT4_FS=y
# CONFIG_FIT_IMAGE_FDT_BOSTON is not set
# CONFIG_FIT_IMAGE_FDT_JAGUAR2 is not set
# CONFIG_FIT_IMAGE_FDT_LUTON is not set
CONFIG_FIT_IMAGE_FDT_MARDUK=y
# CONFIG_FIT_IMAGE_FDT_NI169445 is not set
# CONFIG_FIT_IMAGE_FDT_OCELOT is not set
# CONFIG_FIT_IMAGE_FDT_SERVAL is not set
# CONFIG_FIT_IMAGE_FDT_XILFPGA is not set
CONFIG_FIXED_PHY=y
CONFIG_FS_IOMAP=y
CONFIG_FS_MBCACHE=y
CONFIG_FS_POSIX_ACL=y
CONFIG_FUNCTION_ALIGNMENT=0
CONFIG_FWNODE_MDIO=y
CONFIG_FW_LOADER_PAGED_BUF=y
CONFIG_FW_LOADER_SYSFS=y
CONFIG_GCC10_NO_ARRAY_BOUNDS=y
CONFIG_GENERIC_ALLOCATOR=y
CONFIG_GENERIC_ATOMIC64=y
CONFIG_GENERIC_CLOCKEVENTS=y
CONFIG_GENERIC_CMOS_UPDATE=y
CONFIG_GENERIC_CPU_AUTOPROBE=y
CONFIG_GENERIC_GETTIMEOFDAY=y
CONFIG_GENERIC_IDLE_POLL_SETUP=y
CONFIG_GENERIC_IOMAP=y
CONFIG_GENERIC_IRQ_CHIP=y
CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK=y
CONFIG_GENERIC_IRQ_MIGRATION=y
CONFIG_GENERIC_IRQ_SHOW=y
CONFIG_GENERIC_LIB_ASHLDI3=y
CONFIG_GENERIC_LIB_ASHRDI3=y
CONFIG_GENERIC_LIB_CMPDI2=y
CONFIG_GENERIC_LIB_LSHRDI3=y
CONFIG_GENERIC_LIB_UCMPDI2=y
CONFIG_GENERIC_PCI_IOMAP=y
CONFIG_GENERIC_PHY=y
CONFIG_GENERIC_PINCONF=y
CONFIG_GENERIC_PINCTRL_GROUPS=y
CONFIG_GENERIC_PINMUX_FUNCTIONS=y
CONFIG_GENERIC_SCHED_CLOCK=y
CONFIG_GENERIC_SMP_IDLE_THREAD=y
CONFIG_GENERIC_TIME_VSYSCALL=y
CONFIG_GPIOLIB_IRQCHIP=y
CONFIG_GPIO_CDEV=y
CONFIG_HARDWARE_WATCHPOINTS=y
CONFIG_HAS_DMA=y
CONFIG_HAS_IOMEM=y
CONFIG_HAS_IOPORT=y
CONFIG_HAS_IOPORT_MAP=y
CONFIG_HOTPLUG_CORE_SYNC=y
CONFIG_HOTPLUG_CORE_SYNC_DEAD=y
CONFIG_HOTPLUG_CPU=y
CONFIG_HZ_PERIODIC=y
CONFIG_I2C=y
CONFIG_I2C_BOARDINFO=y
CONFIG_I2C_IMG=y
CONFIG_IMGPDC_WDT=y
CONFIG_IMG_MDC_DMA=y
CONFIG_INITRAMFS_SOURCE=""
CONFIG_IRQCHIP=y
CONFIG_IRQ_DOMAIN=y
CONFIG_IRQ_DOMAIN_HIERARCHY=y
CONFIG_IRQ_FORCED_THREADING=y
CONFIG_IRQ_MIPS_CPU=y
CONFIG_IRQ_WORK=y
CONFIG_JBD2=y
CONFIG_LEDS_GPIO=y
CONFIG_LEDS_PWM=y
# CONFIG_LEGACY_BOARD_OCELOT is not set
# CONFIG_LEGACY_BOARD_SEAD3 is not set
CONFIG_LIBFDT=y
CONFIG_LOCK_DEBUGGING_SUPPORT=y
CONFIG_LOG_BUF_SHIFT=18
CONFIG_LZO_COMPRESS=y
CONFIG_LZO_DECOMPRESS=y
CONFIG_MAGIC_SYSRQ=y
CONFIG_MAGIC_SYSRQ_DEFAULT_ENABLE=0
CONFIG_MDIO_BUS=y
CONFIG_MDIO_DEVICE=y
CONFIG_MDIO_DEVRES=y
CONFIG_MFD_SYSCON=y
CONFIG_MICREL_PHY=y
CONFIG_MIGRATION=y
CONFIG_MIPS=y
CONFIG_MIPS_ASID_BITS=8
CONFIG_MIPS_ASID_SHIFT=0
CONFIG_MIPS_AUTO_PFN_OFFSET=y
CONFIG_MIPS_CLOCK_VSYSCALL=y
CONFIG_MIPS_CM=y
CONFIG_MIPS_CMDLINE_DTB_EXTEND=y
# CONFIG_MIPS_CMDLINE_FROM_BOOTLOADER is not set
CONFIG_MIPS_CPC=y
CONFIG_MIPS_CPS=y
# CONFIG_MIPS_CPS_CPUIDLE is not set
# CONFIG_MIPS_CPS_NS16550_BOOL is not set
CONFIG_MIPS_CPS_PM=y
CONFIG_MIPS_CPU_SCACHE=y
CONFIG_MIPS_GENERIC=y
CONFIG_MIPS_GENERIC_KERNEL=y
CONFIG_MIPS_GIC=y
CONFIG_MIPS_L1_CACHE_SHIFT=7
CONFIG_MIPS_L1_CACHE_SHIFT_7=y
CONFIG_MIPS_MT=y
CONFIG_MIPS_MT_FPAFF=y
CONFIG_MIPS_MT_SMP=y
CONFIG_MIPS_NO_APPENDED_DTB=y
CONFIG_MIPS_NR_CPU_NR_MAP=4
CONFIG_MIPS_PERF_SHARED_TC_COUNTERS=y
CONFIG_MIPS_SPRAM=y
CONFIG_MMC=y
CONFIG_MMC_BLOCK=y
CONFIG_MMC_DW=y
# CONFIG_MMC_DW_BLUEFIELD is not set
# CONFIG_MMC_DW_EXYNOS is not set
# CONFIG_MMC_DW_HI3798CV200 is not set
# CONFIG_MMC_DW_K3 is not set
CONFIG_MMC_DW_PLTFM=y
CONFIG_MMU_LAZY_TLB_REFCOUNT=y
CONFIG_MODULES_USE_ELF_REL=y
CONFIG_MODULE_FORCE_UNLOAD=y
CONFIG_MTD_CMDLINE_PARTS=y
CONFIG_MTD_NAND_CORE=y
CONFIG_MTD_NAND_ECC=y
CONFIG_MTD_SPI_NAND=y
CONFIG_MTD_SPI_NOR=y
CONFIG_MTD_SPI_NOR_USE_4K_SECTORS=y
CONFIG_MTD_UBI=y
CONFIG_MTD_UBI_BEB_LIMIT=20
CONFIG_MTD_UBI_BLOCK=y
CONFIG_MTD_UBI_FASTMAP=y
CONFIG_MTD_UBI_WL_THRESHOLD=4096
CONFIG_NEED_DMA_MAP_STATE=y
CONFIG_NEED_SRCU_NMI_SAFE=y
CONFIG_NET_EGRESS=y
CONFIG_NET_FLOW_LIMIT=y
CONFIG_NET_INGRESS=y
CONFIG_NET_PTP_CLASSIFY=y
CONFIG_NET_SELFTESTS=y
CONFIG_NET_XGRESS=y
CONFIG_NLS=y
CONFIG_NO_EXCEPT_FILL=y
CONFIG_NR_CPUS=4
CONFIG_OF=y
CONFIG_OF_ADDRESS=y
CONFIG_OF_EARLY_FLATTREE=y
CONFIG_OF_FLATTREE=y
CONFIG_OF_GPIO=y
CONFIG_OF_IRQ=y
CONFIG_OF_KOBJ=y
CONFIG_OF_MDIO=y
CONFIG_PADATA=y
CONFIG_PAGE_POOL=y
CONFIG_PAGE_SIZE_LESS_THAN_256KB=y
CONFIG_PAGE_SIZE_LESS_THAN_64KB=y
CONFIG_PCI_DRIVERS_GENERIC=y
CONFIG_PCS_XPCS=y
CONFIG_PERF_USE_VMALLOC=y
CONFIG_PGTABLE_LEVELS=2
CONFIG_PHYLIB=y
CONFIG_PHYLIB_LEDS=y
CONFIG_PHYLINK=y
CONFIG_PHY_PISTACHIO_USB=y
CONFIG_PINCTRL=y
CONFIG_PINCTRL_PISTACHIO=y
CONFIG_POWER_SUPPLY=y
CONFIG_PPS=y
CONFIG_PREEMPT_NONE_BUILD=y
CONFIG_PRINTK_TIME=y
CONFIG_PROC_EVENTS=y
CONFIG_PTP_1588_CLOCK=y
CONFIG_PTP_1588_CLOCK_OPTIONAL=y
CONFIG_PWM=y
CONFIG_PWM_IMG=y
CONFIG_PWM_SYSFS=y
CONFIG_QUEUED_RWLOCKS=y
CONFIG_QUEUED_SPINLOCKS=y
CONFIG_RANDSTRUCT_NONE=y
CONFIG_RATIONAL=y
CONFIG_REGMAP=y
CONFIG_REGMAP_MMIO=y
CONFIG_REGMAP_SPI=y
CONFIG_REGULATOR=y
CONFIG_REGULATOR_FIXED_VOLTAGE=y
CONFIG_REGULATOR_GPIO=y
CONFIG_RESET_CONTROLLER=y
CONFIG_RESET_PISTACHIO=y
CONFIG_RFS_ACCEL=y
CONFIG_RPS=y
CONFIG_SCHEDSTATS=y
CONFIG_SCHED_INFO=y
CONFIG_SCSI=y
CONFIG_SCSI_COMMON=y
CONFIG_SCSI_SPI_ATTRS=y
CONFIG_SERIAL_8250_DW=y
CONFIG_SERIAL_8250_DWLIB=y
CONFIG_SERIAL_MCTRL_GPIO=y
CONFIG_SERIAL_OF_PLATFORM=y
CONFIG_SERIAL_SC16IS7XX=y
CONFIG_SERIAL_SC16IS7XX_CORE=y
# CONFIG_SERIAL_SC16IS7XX_I2C is not set
CONFIG_SERIAL_SC16IS7XX_SPI=y
CONFIG_SGL_ALLOC=y
CONFIG_SG_POOL=y
CONFIG_SMP=y
CONFIG_SMP_UP=y
CONFIG_SOCK_RX_QUEUE_MAPPING=y
CONFIG_SPI=y
CONFIG_SPI_IMG_SPFI=y
CONFIG_SPI_MASTER=y
CONFIG_SPI_MEM=y
CONFIG_SQUASHFS_DECOMP_MULTI_PERCPU=y
CONFIG_SRAM=y
CONFIG_STMMAC_ETH=y
CONFIG_STMMAC_PLATFORM=y
CONFIG_SWAP_IO_SPACE=y
CONFIG_SWPHY=y
CONFIG_SYNC_R4K=y
CONFIG_SYSCTL_EXCEPTION_TRACE=y
CONFIG_SYS_HAS_CPU_MIPS32_R1=y
CONFIG_SYS_HAS_CPU_MIPS32_R2=y
CONFIG_SYS_HAS_CPU_MIPS32_R5=y
CONFIG_SYS_HAS_CPU_MIPS32_R6=y
CONFIG_SYS_HAS_CPU_MIPS64_R1=y
CONFIG_SYS_HAS_CPU_MIPS64_R2=y
CONFIG_SYS_HAS_CPU_MIPS64_R5=y
CONFIG_SYS_HAS_CPU_MIPS64_R6=y
CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y
CONFIG_SYS_SUPPORTS_64BIT_KERNEL=y
CONFIG_SYS_SUPPORTS_ARBIT_HZ=y
CONFIG_SYS_SUPPORTS_BIG_ENDIAN=y
CONFIG_SYS_SUPPORTS_HIGHMEM=y
CONFIG_SYS_SUPPORTS_HOTPLUG_CPU=y
CONFIG_SYS_SUPPORTS_LITTLE_ENDIAN=y
CONFIG_SYS_SUPPORTS_MICROMIPS=y
CONFIG_SYS_SUPPORTS_MIPS16=y
CONFIG_SYS_SUPPORTS_MIPS_CPS=y
CONFIG_SYS_SUPPORTS_MULTITHREADING=y
CONFIG_SYS_SUPPORTS_RELOCATABLE=y
CONFIG_SYS_SUPPORTS_SCHED_SMT=y
CONFIG_SYS_SUPPORTS_SMARTMIPS=y
CONFIG_SYS_SUPPORTS_SMP=y
CONFIG_SYS_SUPPORTS_ZBOOT=y
CONFIG_TARGET_ISA_REV=2
CONFIG_TICK_CPU_ACCOUNTING=y
CONFIG_TIMER_OF=y
CONFIG_TIMER_PROBE=y
CONFIG_TMPFS_POSIX_ACL=y
CONFIG_TREE_RCU=y
CONFIG_TREE_SRCU=y
CONFIG_UBIFS_FS=y
CONFIG_UHI_BOOT=y
CONFIG_USB=y
CONFIG_USB_ANNOUNCE_NEW_DEVICES=y
CONFIG_USB_COMMON=y
CONFIG_USB_DWC2=y
CONFIG_USB_DWC2_DUAL_ROLE=y
CONFIG_USB_EHCI_HCD=y
# CONFIG_USB_EHCI_HCD_PLATFORM is not set
CONFIG_USB_GADGET=y
CONFIG_USB_ROLE_SWITCH=y
CONFIG_USB_STORAGE=y
CONFIG_USB_SUPPORT=y
CONFIG_USE_OF=y
# CONFIG_VIRT_BOARD_RANCHU is not set
CONFIG_WATCHDOG_CORE=y
CONFIG_WEAK_ORDERING=y
CONFIG_XPS=y
CONFIG_XXHASH=y
CONFIG_ZBOOT_LOAD_ADDRESS=0x0
CONFIG_ZLIB_DEFLATE=y
CONFIG_ZLIB_INFLATE=y
CONFIG_ZSTD_COMMON=y
CONFIG_ZSTD_COMPRESS=y
CONFIG_ZSTD_DECOMPRESS=y

View File

@ -0,0 +1,68 @@
From a2dd154377c9aa6ddda00d39b8c7c334e4fa16ff Mon Sep 17 00:00:00 2001
From: Damien Horsley <damien.horsley@imgtec.com>
Date: Tue, 22 Mar 2016 12:46:09 +0000
Subject: dmaengine: img-mdc: Handle early status read
It is possible that mdc_tx_status may be called before the first
node has been read from memory.
In this case, the residue value stored in the register is undefined.
Return the transfer size instead.
Signed-off-by: Damien Horsley <damien.horsley@imgtec.com>
---
drivers/dma/img-mdc-dma.c | 40 ++++++++++++++++++++++++----------------
1 file changed, 24 insertions(+), 16 deletions(-)
--- a/drivers/dma/img-mdc-dma.c
+++ b/drivers/dma/img-mdc-dma.c
@@ -617,25 +617,33 @@ static enum dma_status mdc_tx_status(str
(MDC_CMDS_PROCESSED_CMDS_DONE_MASK + 1);
/*
- * If the command loaded event hasn't been processed yet, then
- * the difference above includes an extra command.
+ * If the first node has not yet been read from memory,
+ * the residue register value is undefined
*/
- if (!mdesc->cmd_loaded)
- cmds--;
- else
- cmds += mdesc->list_cmds_done;
-
- bytes = mdesc->list_xfer_size;
- ldesc = mdesc->list;
- for (i = 0; i < cmds; i++) {
- bytes -= ldesc->xfer_size + 1;
- ldesc = ldesc->next_desc;
- }
- if (ldesc) {
- if (residue != MDC_TRANSFER_SIZE_MASK)
- bytes -= ldesc->xfer_size - residue;
+ if (!mdesc->cmd_loaded && !cmds) {
+ bytes = mdesc->list_xfer_size;
+ } else {
+ /*
+ * If the command loaded event hasn't been processed yet, then
+ * the difference above includes an extra command.
+ */
+ if (!mdesc->cmd_loaded)
+ cmds--;
else
+ cmds += mdesc->list_cmds_done;
+
+ bytes = mdesc->list_xfer_size;
+ ldesc = mdesc->list;
+ for (i = 0; i < cmds; i++) {
bytes -= ldesc->xfer_size + 1;
+ ldesc = ldesc->next_desc;
+ }
+ if (ldesc) {
+ if (residue != MDC_TRANSFER_SIZE_MASK)
+ bytes -= ldesc->xfer_size - residue;
+ else
+ bytes -= ldesc->xfer_size + 1;
+ }
}
}
spin_unlock_irqrestore(&mchan->vc.lock, flags);

View File

@ -0,0 +1,198 @@
From cd2a6af51553d38072cd31699b58d16ca6176ef5 Mon Sep 17 00:00:00 2001
From: Ionela Voinescu <ionela.voinescu@imgtec.com>
Date: Thu, 2 Feb 2017 16:46:14 +0000
Subject: spi: img-spfi: Implement dual and quad mode
For dual and quad modes to work the SPFI controller needs
to have information about command/address/dummy bytes in the
transaction register. This information is not relevant for
single mode, and therefore it can have any value in the
allowed range. Therefore, for any read or write transfers of less
than 8 bytes (cmd = 1 byte, addr up to 7 bytes), SPFI will be
configured, but not enabled (unless it is the last transfer in
the queue). The transfer will be enabled by the subsequent tranfer.
A pending transfer is determined by the content of the transaction
register: if command part is set and tsize is not.
This way we ensure that for dual and quad transactions
the command request size will apear in the command/address part
of the transaction register, while the data size will be in
tsize, all data being sent/received in the same transaction (as
set up in the transaction register).
Signed-off-by: Ionela Voinescu <ionela.voinescu@imgtec.com>
Signed-off-by: Ezequiel Garcia <ezequiel.garcia@imgtec.com>
---
drivers/spi/spi-img-spfi.c | 96 ++++++++++++++++++++++++++++++++++++++++------
1 file changed, 85 insertions(+), 11 deletions(-)
--- a/drivers/spi/spi-img-spfi.c
+++ b/drivers/spi/spi-img-spfi.c
@@ -36,7 +36,8 @@
#define SPFI_CONTROL_SOFT_RESET BIT(11)
#define SPFI_CONTROL_SEND_DMA BIT(10)
#define SPFI_CONTROL_GET_DMA BIT(9)
-#define SPFI_CONTROL_SE BIT(8)
+#define SPFI_CONTROL_SE BIT(8)
+#define SPFI_CONTROL_TX_RX BIT(1)
#define SPFI_CONTROL_TMODE_SHIFT 5
#define SPFI_CONTROL_TMODE_MASK 0x7
#define SPFI_CONTROL_TMODE_SINGLE 0
@@ -47,6 +48,10 @@
#define SPFI_TRANSACTION 0x18
#define SPFI_TRANSACTION_TSIZE_SHIFT 16
#define SPFI_TRANSACTION_TSIZE_MASK 0xffff
+#define SPFI_TRANSACTION_CMD_SHIFT 13
+#define SPFI_TRANSACTION_CMD_MASK 0x7
+#define SPFI_TRANSACTION_ADDR_SHIFT 10
+#define SPFI_TRANSACTION_ADDR_MASK 0x7
#define SPFI_PORT_STATE 0x1c
#define SPFI_PORT_STATE_DEV_SEL_SHIFT 20
@@ -83,6 +88,7 @@
*/
#define SPFI_32BIT_FIFO_SIZE 64
#define SPFI_8BIT_FIFO_SIZE 16
+#define SPFI_DATA_REQUEST_MAX_SIZE 8
struct img_spfi {
struct device *dev;
@@ -99,6 +105,8 @@ struct img_spfi {
struct dma_chan *tx_ch;
bool tx_dma_busy;
bool rx_dma_busy;
+
+ bool complete;
};
static inline u32 spfi_readl(struct img_spfi *spfi, u32 reg)
@@ -115,9 +123,11 @@ static inline void spfi_start(struct img
{
u32 val;
- val = spfi_readl(spfi, SPFI_CONTROL);
- val |= SPFI_CONTROL_SPFI_EN;
- spfi_writel(spfi, val, SPFI_CONTROL);
+ if (spfi->complete) {
+ val = spfi_readl(spfi, SPFI_CONTROL);
+ val |= SPFI_CONTROL_SPFI_EN;
+ spfi_writel(spfi, val, SPFI_CONTROL);
+ }
}
static inline void spfi_reset(struct img_spfi *spfi)
@@ -130,12 +140,21 @@ static int spfi_wait_all_done(struct img
{
unsigned long timeout = jiffies + msecs_to_jiffies(50);
+ if (!(spfi->complete))
+ return 0;
+
while (time_before(jiffies, timeout)) {
u32 status = spfi_readl(spfi, SPFI_INTERRUPT_STATUS);
if (status & SPFI_INTERRUPT_ALLDONETRIG) {
spfi_writel(spfi, SPFI_INTERRUPT_ALLDONETRIG,
SPFI_INTERRUPT_CLEAR);
+ /*
+ * Disable SPFI for it not to interfere with
+ * pending transactions
+ */
+ spfi_writel(spfi, spfi_readl(spfi, SPFI_CONTROL)
+ & ~SPFI_CONTROL_SPFI_EN, SPFI_CONTROL);
return 0;
}
cpu_relax();
@@ -441,9 +460,32 @@ static void img_spfi_config(struct spi_c
struct spi_transfer *xfer)
{
struct img_spfi *spfi = spi_controller_get_devdata(spi->controller);
- u32 val, div;
+ u32 val, div, transact;
+ bool is_pending;
/*
+ * For read or write transfers of less than 8 bytes (cmd = 1 byte,
+ * addr up to 7 bytes), SPFI will be configured, but not enabled
+ * (unless it is the last transfer in the queue).The transfer will
+ * be enabled by the subsequent transfer.
+ * A pending transfer is determined by the content of the
+ * transaction register: if command part is set and tsize
+ * is not
+ */
+ transact = spfi_readl(spfi, SPFI_TRANSACTION);
+ is_pending = ((transact >> SPFI_TRANSACTION_CMD_SHIFT) &
+ SPFI_TRANSACTION_CMD_MASK) &&
+ (!((transact >> SPFI_TRANSACTION_TSIZE_SHIFT) &
+ SPFI_TRANSACTION_TSIZE_MASK));
+
+ /* If there are no pending transactions it's OK to soft reset */
+ if (!is_pending) {
+ /* Start the transaction from a known (reset) state */
+ spfi_reset(spfi);
+ }
+
+ /*
+ * Before anything else, set up parameters.
* output = spfi_clk * (BITCLK / 512), where BITCLK must be a
* power of 2 up to 128
*/
@@ -456,20 +498,52 @@ static void img_spfi_config(struct spi_c
val |= div << SPFI_DEVICE_PARAMETER_BITCLK_SHIFT;
spfi_writel(spfi, val, SPFI_DEVICE_PARAMETER(spi_get_chipselect(spi, 0)));
- spfi_writel(spfi, xfer->len << SPFI_TRANSACTION_TSIZE_SHIFT,
- SPFI_TRANSACTION);
+ if (!list_is_last(&xfer->transfer_list, &host->cur_msg->transfers) &&
+ /*
+ * For duplex mode (both the tx and rx buffers are !NULL) the
+ * CMD, ADDR, and DUMMY byte parts of the transaction register
+ * should always be 0 and therefore the pending transfer
+ * technique cannot be used.
+ */
+ (xfer->tx_buf) && (!xfer->rx_buf) &&
+ (xfer->len <= SPFI_DATA_REQUEST_MAX_SIZE) && !is_pending) {
+ transact = (1 & SPFI_TRANSACTION_CMD_MASK) <<
+ SPFI_TRANSACTION_CMD_SHIFT;
+ transact |= ((xfer->len - 1) & SPFI_TRANSACTION_ADDR_MASK) <<
+ SPFI_TRANSACTION_ADDR_SHIFT;
+ spfi->complete = false;
+ } else {
+ spfi->complete = true;
+ if (is_pending) {
+ /* Keep setup from pending transfer */
+ transact |= ((xfer->len & SPFI_TRANSACTION_TSIZE_MASK) <<
+ SPFI_TRANSACTION_TSIZE_SHIFT);
+ } else {
+ transact = ((xfer->len & SPFI_TRANSACTION_TSIZE_MASK) <<
+ SPFI_TRANSACTION_TSIZE_SHIFT);
+ }
+ }
+ spfi_writel(spfi, transact, SPFI_TRANSACTION);
val = spfi_readl(spfi, SPFI_CONTROL);
val &= ~(SPFI_CONTROL_SEND_DMA | SPFI_CONTROL_GET_DMA);
- if (xfer->tx_buf)
+ /*
+ * We set up send DMA for pending transfers also, as
+ * those are always send transfers
+ */
+ if ((xfer->tx_buf) || is_pending)
val |= SPFI_CONTROL_SEND_DMA;
- if (xfer->rx_buf)
+ if (xfer->tx_buf)
+ val |= SPFI_CONTROL_TX_RX;
+ if (xfer->rx_buf) {
val |= SPFI_CONTROL_GET_DMA;
+ val &= ~SPFI_CONTROL_TX_RX;
+ }
val &= ~(SPFI_CONTROL_TMODE_MASK << SPFI_CONTROL_TMODE_SHIFT);
- if (xfer->tx_nbits == SPI_NBITS_DUAL &&
+ if (xfer->tx_nbits == SPI_NBITS_DUAL ||
xfer->rx_nbits == SPI_NBITS_DUAL)
val |= SPFI_CONTROL_TMODE_DUAL << SPFI_CONTROL_TMODE_SHIFT;
- else if (xfer->tx_nbits == SPI_NBITS_QUAD &&
+ else if (xfer->tx_nbits == SPI_NBITS_QUAD ||
xfer->rx_nbits == SPI_NBITS_QUAD)
val |= SPFI_CONTROL_TMODE_QUAD << SPFI_CONTROL_TMODE_SHIFT;
val |= SPFI_CONTROL_SE;

View File

@ -0,0 +1,64 @@
From 905ee06a9966113fe51d6bad1819759cb30fd0bd Mon Sep 17 00:00:00 2001
From: Ionela Voinescu <ionela.voinescu@imgtec.com>
Date: Tue, 9 Feb 2016 10:18:31 +0000
Subject: spi: img-spfi: use device 0 configuration for all devices
Given that we control the chip select line externally
we can use only one parameter register (device 0 parameter
register) and one set of configuration bits (port configuration
bits for device 0) for all devices (all chip select lines).
Signed-off-by: Ionela Voinescu <ionela.voinescu@imgtec.com>
---
drivers/spi/spi-img-spfi.c | 23 ++++++++++++++++-------
1 file changed, 16 insertions(+), 7 deletions(-)
--- a/drivers/spi/spi-img-spfi.c
+++ b/drivers/spi/spi-img-spfi.c
@@ -429,18 +429,23 @@ static int img_spfi_prepare(struct spi_c
struct img_spfi *spfi = spi_controller_get_devdata(host);
u32 val;
+ /*
+ * The chip select line is controlled externally so
+ * we can use the CS0 configuration for all devices
+ */
val = spfi_readl(spfi, SPFI_PORT_STATE);
+
+ /* 0 for device selection */
val &= ~(SPFI_PORT_STATE_DEV_SEL_MASK <<
SPFI_PORT_STATE_DEV_SEL_SHIFT);
- val |= spi_get_chipselect(msg->spi, 0) << SPFI_PORT_STATE_DEV_SEL_SHIFT;
if (msg->spi->mode & SPI_CPHA)
- val |= SPFI_PORT_STATE_CK_PHASE(spi_get_chipselect(msg->spi, 0));
+ val |= SPFI_PORT_STATE_CK_PHASE(0);
else
- val &= ~SPFI_PORT_STATE_CK_PHASE(spi_get_chipselect(msg->spi, 0));
+ val &= ~SPFI_PORT_STATE_CK_PHASE(0);
if (msg->spi->mode & SPI_CPOL)
- val |= SPFI_PORT_STATE_CK_POL(spi_get_chipselect(msg->spi, 0));
+ val |= SPFI_PORT_STATE_CK_POL(0);
else
- val &= ~SPFI_PORT_STATE_CK_POL(spi_get_chipselect(msg->spi, 0));
+ val &= ~SPFI_PORT_STATE_CK_POL(0);
spfi_writel(spfi, val, SPFI_PORT_STATE);
return 0;
@@ -492,11 +497,15 @@ static void img_spfi_config(struct spi_c
div = DIV_ROUND_UP(clk_get_rate(spfi->spfi_clk), xfer->speed_hz);
div = clamp(512 / (1 << get_count_order(div)), 1, 128);
- val = spfi_readl(spfi, SPFI_DEVICE_PARAMETER(spi_get_chipselect(spi, 0)));
+ /*
+ * The chip select line is controlled externally so
+ * we can use the CS0 parameters for all devices
+ */
+ val = spfi_readl(spfi, SPFI_DEVICE_PARAMETER(0));
val &= ~(SPFI_DEVICE_PARAMETER_BITCLK_MASK <<
SPFI_DEVICE_PARAMETER_BITCLK_SHIFT);
val |= div << SPFI_DEVICE_PARAMETER_BITCLK_SHIFT;
- spfi_writel(spfi, val, SPFI_DEVICE_PARAMETER(spi_get_chipselect(spi, 0)));
+ spfi_writel(spfi, val, SPFI_DEVICE_PARAMETER(0));
if (!list_is_last(&xfer->transfer_list, &host->cur_msg->transfers) &&
/*

View File

@ -0,0 +1,59 @@
From 56466f505f58f44b69feb7eaed3b506842800456 Mon Sep 17 00:00:00 2001
From: Ionela Voinescu <ionela.voinescu@imgtec.com>
Date: Tue, 1 Mar 2016 17:49:45 +0000
Subject: spi: img-spfi: RX maximum burst size for DMA is 8
The depth of the FIFOs is 16 bytes. The DMA request line is tied
to the half full/empty (depending on the use of the TX or RX FIFO)
threshold. For the TX FIFO, if you set a burst size of 8 (equal to
half the depth) the first burst goes into FIFO without any issues,
but due the latency involved (the time the data leaves the DMA
engine to the time it arrives at the FIFO), the DMA might trigger
another burst of 8. But given that there is no space for 2 additonal
bursts of 8, this would result in a failure. Therefore, we have to
keep the burst size for TX to 4 to accomodate for an extra burst.
For the read (RX) scenario, the DMA request line goes high when
there is at least 8 entries in the FIFO (half full), and we can
program the burst size to be 8 because the risk of accidental burst
does not exist. The DMA engine will not trigger another read until
the read data for all the burst it has sent out has been received.
While here, move the burst size setting outside of the if/else branches
as they have the same value for both 8 and 32 bit data widths.
Signed-off-by: Ionela Voinescu <ionela.voinescu@imgtec.com>
---
drivers/spi/spi-img-spfi.c | 6 ++----
1 file changed, 2 insertions(+), 4 deletions(-)
--- a/drivers/spi/spi-img-spfi.c
+++ b/drivers/spi/spi-img-spfi.c
@@ -338,12 +338,11 @@ static int img_spfi_start_dma(struct spi
if (xfer->len % 4 == 0) {
rxconf.src_addr = spfi->phys + SPFI_RX_32BIT_VALID_DATA;
rxconf.src_addr_width = 4;
- rxconf.src_maxburst = 4;
} else {
rxconf.src_addr = spfi->phys + SPFI_RX_8BIT_VALID_DATA;
rxconf.src_addr_width = 1;
- rxconf.src_maxburst = 4;
}
+ rxconf.src_maxburst = 8;
dmaengine_slave_config(spfi->rx_ch, &rxconf);
rxdesc = dmaengine_prep_slave_sg(spfi->rx_ch, xfer->rx_sg.sgl,
@@ -362,12 +361,11 @@ static int img_spfi_start_dma(struct spi
if (xfer->len % 4 == 0) {
txconf.dst_addr = spfi->phys + SPFI_TX_32BIT_VALID_DATA;
txconf.dst_addr_width = 4;
- txconf.dst_maxburst = 4;
} else {
txconf.dst_addr = spfi->phys + SPFI_TX_8BIT_VALID_DATA;
txconf.dst_addr_width = 1;
- txconf.dst_maxburst = 4;
}
+ txconf.dst_maxburst = 4;
dmaengine_slave_config(spfi->tx_ch, &txconf);
txdesc = dmaengine_prep_slave_sg(spfi->tx_ch, xfer->tx_sg.sgl,

View File

@ -0,0 +1,120 @@
From 5fcca3fd4b621d7b5bdeca18d36dfc6ca6cfe383 Mon Sep 17 00:00:00 2001
From: Ionela Voinescu <ionela.voinescu@imgtec.com>
Date: Wed, 10 Aug 2016 11:42:26 +0100
Subject: spi: img-spfi: finish every transfer cleanly
Before this change, the interrupt status bit that signaled
the end of a tranfers was cleared in the wait_all_done
function. That functionality triggered issues for DMA
duplex transactions where the wait function was called
twice, in both the TX and RX callbacks.
In order to fix the issue, clear all interrupt data bits
at the end of a PIO transfer or at the end of both TX and RX
duplex transfers, if the transfer is not a pending tranfer
(command waiting for data). After that, the status register
is checked for new incoming data or new data requests to be
signaled. If SPFI finished cleanly, no new interrupt data
bits should be set.
Signed-off-by: Ionela Voinescu <ionela.voinescu@imgtec.com>
---
drivers/spi/spi-img-spfi.c | 49 +++++++++++++++++++++++++++++++++-------------
1 file changed, 35 insertions(+), 14 deletions(-)
--- a/drivers/spi/spi-img-spfi.c
+++ b/drivers/spi/spi-img-spfi.c
@@ -79,6 +79,14 @@
#define SPFI_INTERRUPT_SDE BIT(1)
#define SPFI_INTERRUPT_SDTRIG BIT(0)
+#define SPFI_INTERRUPT_DATA_BITS (SPFI_INTERRUPT_SDHF |\
+ SPFI_INTERRUPT_SDFUL |\
+ SPFI_INTERRUPT_GDEX32BIT |\
+ SPFI_INTERRUPT_GDHF |\
+ SPFI_INTERRUPT_GDFUL |\
+ SPFI_INTERRUPT_ALLDONETRIG |\
+ SPFI_INTERRUPT_GDEX8BIT)
+
/*
* There are four parallel FIFOs of 16 bytes each. The word buffer
* (*_32BIT_VALID_DATA) accesses all four FIFOs at once, resulting in an
@@ -136,6 +144,23 @@ static inline void spfi_reset(struct img
spfi_writel(spfi, 0, SPFI_CONTROL);
}
+static inline void spfi_finish(struct img_spfi *spfi)
+{
+ if (!(spfi->complete))
+ return;
+
+ /* Clear data bits as all transfers(TX and RX) have finished */
+ spfi_writel(spfi, SPFI_INTERRUPT_DATA_BITS, SPFI_INTERRUPT_CLEAR);
+ if (spfi_readl(spfi, SPFI_INTERRUPT_STATUS) & SPFI_INTERRUPT_DATA_BITS) {
+ dev_err(spfi->dev, "SPFI did not finish transfer cleanly.\n");
+ spfi_reset(spfi);
+ }
+ /* Disable SPFI for it not to interfere with pending transactions */
+ spfi_writel(spfi,
+ spfi_readl(spfi, SPFI_CONTROL) & ~SPFI_CONTROL_SPFI_EN,
+ SPFI_CONTROL);
+}
+
static int spfi_wait_all_done(struct img_spfi *spfi)
{
unsigned long timeout = jiffies + msecs_to_jiffies(50);
@@ -144,19 +169,9 @@ static int spfi_wait_all_done(struct img
return 0;
while (time_before(jiffies, timeout)) {
- u32 status = spfi_readl(spfi, SPFI_INTERRUPT_STATUS);
-
- if (status & SPFI_INTERRUPT_ALLDONETRIG) {
- spfi_writel(spfi, SPFI_INTERRUPT_ALLDONETRIG,
- SPFI_INTERRUPT_CLEAR);
- /*
- * Disable SPFI for it not to interfere with
- * pending transactions
- */
- spfi_writel(spfi, spfi_readl(spfi, SPFI_CONTROL)
- & ~SPFI_CONTROL_SPFI_EN, SPFI_CONTROL);
+ if (spfi_readl(spfi, SPFI_INTERRUPT_STATUS) &
+ SPFI_INTERRUPT_ALLDONETRIG)
return 0;
- }
cpu_relax();
}
@@ -288,6 +303,8 @@ static int img_spfi_start_pio(struct spi
}
ret = spfi_wait_all_done(spfi);
+ spfi_finish(spfi);
+
if (ret < 0)
return ret;
@@ -303,8 +320,10 @@ static void img_spfi_dma_rx_cb(void *dat
spin_lock_irqsave(&spfi->lock, flags);
spfi->rx_dma_busy = false;
- if (!spfi->tx_dma_busy)
+ if (!spfi->tx_dma_busy) {
+ spfi_finish(spfi);
spi_finalize_current_transfer(spfi->host);
+ }
spin_unlock_irqrestore(&spfi->lock, flags);
}
@@ -317,8 +336,10 @@ static void img_spfi_dma_tx_cb(void *dat
spin_lock_irqsave(&spfi->lock, flags);
spfi->tx_dma_busy = false;
- if (!spfi->rx_dma_busy)
+ if (!spfi->rx_dma_busy) {
+ spfi_finish(spfi);
spi_finalize_current_transfer(spfi->host);
+ }
spin_unlock_irqrestore(&spfi->lock, flags);
}

View File

@ -0,0 +1,49 @@
From 3642843a06025ec333d7e92580cf52cb8db2a652 Mon Sep 17 00:00:00 2001
From: Govindraj Raja <Govindraj.Raja@imgtec.com>
Date: Fri, 8 Jan 2016 16:36:07 +0000
Subject: clk: pistachio: Fix wrong SDHost card speed
The SDHost currently clocks the card 4x slower than it
should do, because there is fixed divide by 4 in the
sdhost wrapper that is not present in the clock tree.
To model this add a fixed divide by 4 clock node in
the SDHost clock path.
This will ensure the right clock frequency is selected when
the mmc driver tries to configure frequency on card insert.
Signed-off-by: Govindraj Raja <Govindraj.Raja@imgtec.com>
---
drivers/clk/pistachio/clk-pistachio.c | 3 ++-
include/dt-bindings/clock/pistachio-clk.h | 1 +
2 files changed, 3 insertions(+), 1 deletion(-)
--- a/drivers/clk/pistachio/clk-pistachio.c
+++ b/drivers/clk/pistachio/clk-pistachio.c
@@ -41,7 +41,7 @@ static struct pistachio_gate pistachio_g
GATE(CLK_AUX_ADC_INTERNAL, "aux_adc_internal", "sys_internal_div",
0x104, 22),
GATE(CLK_AUX_ADC, "aux_adc", "aux_adc_div", 0x104, 23),
- GATE(CLK_SD_HOST, "sd_host", "sd_host_div", 0x104, 24),
+ GATE(CLK_SD_HOST, "sd_host", "sd_host_div4", 0x104, 24),
GATE(CLK_BT, "bt", "bt_div", 0x104, 25),
GATE(CLK_BT_DIV4, "bt_div4", "bt_div4_div", 0x104, 26),
GATE(CLK_BT_DIV8, "bt_div8", "bt_div8_div", 0x104, 27),
@@ -51,6 +51,7 @@ static struct pistachio_gate pistachio_g
static struct pistachio_fixed_factor pistachio_ffs[] __initdata = {
FIXED_FACTOR(CLK_WIFI_DIV4, "wifi_div4", "wifi_pll", 4),
FIXED_FACTOR(CLK_WIFI_DIV8, "wifi_div8", "wifi_pll", 8),
+ FIXED_FACTOR(CLK_SDHOST_DIV4, "sd_host_div4", "sd_host_div", 4),
};
static struct pistachio_div pistachio_divs[] __initdata = {
--- a/include/dt-bindings/clock/pistachio-clk.h
+++ b/include/dt-bindings/clock/pistachio-clk.h
@@ -18,6 +18,7 @@
/* Fixed-factor clocks */
#define CLK_WIFI_DIV4 16
#define CLK_WIFI_DIV8 17
+#define CLK_SDHOST_DIV4 18
/* Gate clocks */
#define CLK_MIPS 32

View File

@ -0,0 +1,47 @@
From 981c1d416af45eff207227aec106381ac23aac99 Mon Sep 17 00:00:00 2001
From: Ian Pozella <Ian.Pozella@imgtec.com>
Date: Mon, 20 Feb 2017 10:00:52 +0000
Subject: MIPS: DTS: img: marduk: switch mmc to 1 bit mode
The mmc block in Pistachio allows 1 to 8 data bits to be used.
Marduk uses 4 bits allowing the upper 4 bits to be allocated
to the Mikrobus ports. However these bits are still connected
internally meaning the mmc block recieves signals on all data lines
and seems the internal HW CRC checks get corrupted by this erroneous
data.
We cannot control what data is sent on these lines because they go
to external ports. 1 bit mode does not exhibit the issue hence the
safe default is to use this. If a user knows that in their use case
they will not use the upper bits then they can set to 4 bit mode in
order to improve performance.
Also make sure that the upper 4 bits don't get allocated to the mmc
driver (the default is to assign all 8 pins) so they can be allocated
to other drivers. Allocating all 4 despite setting 1 bit mode as this
matches what is there in hardware.
Signed-off-by: Ian Pozella <Ian.Pozella@imgtec.com>
---
arch/mips/boot/dts/img/pistachio_marduk.dts | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
--- a/arch/mips/boot/dts/img/pistachio_marduk.dts
+++ b/arch/mips/boot/dts/img/pistachio_marduk.dts
@@ -118,7 +118,7 @@
&sdhost {
status = "okay";
- bus-width = <4>;
+ bus-width = <1>;
disable-wp;
};
@@ -128,6 +128,7 @@
&pin_sdhost_data {
drive-strength = <2>;
+ pins = "mfio17", "mfio18", "mfio19", "mfio20";
};
&pwm {

View File

@ -0,0 +1,61 @@
From f32bc2aa01edcba2f2ed5db151cf183eac9ef919 Mon Sep 17 00:00:00 2001
From: Abhimanyu Vishwakarma <Abhimanyu.Vishwakarma@imgtec.com>
Date: Sat, 25 Feb 2017 16:42:50 +0000
Subject: mtd: nor: support mtd name from device tree
Signed-off-by: Abhimanyu Vishwakarma <Abhimanyu.Vishwakarma@imgtec.com>
---
drivers/mtd/spi-nor/spi-nor.c | 8 +++++++-
1 file changed, 7 insertions(+), 1 deletion(-)
--- a/drivers/spi/spi-mem.c
+++ b/drivers/spi/spi-mem.c
@@ -846,7 +846,9 @@ static int spi_mem_probe(struct spi_devi
{
struct spi_mem_driver *memdrv = to_spi_mem_drv(spi->dev.driver);
struct spi_controller *ctlr = spi->controller;
+ const char __maybe_unused *of_mtd_name = NULL;
struct spi_mem *mem;
+ int ret;
mem = devm_kzalloc(&spi->dev, sizeof(*mem), GFP_KERNEL);
if (!mem)
@@ -854,10 +856,15 @@ static int spi_mem_probe(struct spi_devi
mem->spi = spi;
- if (ctlr->mem_ops && ctlr->mem_ops->get_name)
+ if (ctlr->mem_ops && ctlr->mem_ops->get_name) {
mem->name = ctlr->mem_ops->get_name(mem);
- else
- mem->name = dev_name(&spi->dev);
+ } else {
+ ret = device_property_read_string(&spi->dev, "linux,mtd-name", &of_mtd_name);
+ if (!ret)
+ mem->name = of_mtd_name;
+ else
+ mem->name = dev_name(&spi->dev);
+ }
if (IS_ERR_OR_NULL(mem->name))
return PTR_ERR_OR_ZERO(mem->name);
--- a/drivers/mtd/mtdcore.c
+++ b/drivers/mtd/mtdcore.c
@@ -870,6 +870,17 @@ out_error:
*/
static void mtd_set_dev_defaults(struct mtd_info *mtd)
{
+#ifdef CONFIG_MTD_OF_PARTS
+ const char __maybe_unused *of_mtd_name = NULL;
+ struct device_node *np;
+
+ np = mtd_get_of_node(mtd);
+ if (np && !mtd->name) {
+ of_property_read_string(np, "linux,mtd-name", &of_mtd_name);
+ if (of_mtd_name)
+ mtd->name = of_mtd_name;
+ } else
+#endif
if (mtd->dev.parent) {
if (!mtd->owner && mtd->dev.parent->driver)
mtd->owner = mtd->dev.parent->driver->owner;

View File

@ -0,0 +1,30 @@
From 0023c706f7e0f0f02bd48a63a2f3c04c839532ae Mon Sep 17 00:00:00 2001
From: Hauke Mehrtens <hauke@hauke-m.de>
Date: Sat, 15 Aug 2020 16:04:53 +0200
Subject: [PATCH 901/904] MIPS: DTS: img: marduk: Add SPI NAND flash
Add Gigadevice GD5F4GQ4UCYIGT SPI NAND flash to the device tree.
The NAND flash chip is connected with quad SPI, but reading currently
fails in quad SPI mode.
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
---
arch/mips/boot/dts/img/pistachio_marduk.dts | 6 ++++++
1 file changed, 6 insertions(+)
--- a/arch/mips/boot/dts/img/pistachio_marduk.dts
+++ b/arch/mips/boot/dts/img/pistachio_marduk.dts
@@ -89,6 +89,12 @@
reg = <0>;
spi-max-frequency = <50000000>;
};
+
+ flash@1 {
+ compatible = "spi-nand";
+ reg = <1>;
+ spi-max-frequency = <50000000>;
+ };
};
&uart0 {

View File

@ -0,0 +1,43 @@
From b7700154d75e8d7c9a2022f09c2d5430137606fa Mon Sep 17 00:00:00 2001
From: Hauke Mehrtens <hauke@hauke-m.de>
Date: Sat, 15 Aug 2020 16:05:25 +0200
Subject: [PATCH 902/904] MIPS: DTS: img: marduk: Add Cascoda CA8210 6LoWPAN
Add Cascoda CA8210 6LoWPAN controller to device tree.
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
---
arch/mips/boot/dts/img/pistachio_marduk.dts | 22 +++++++++++++++++++++
1 file changed, 22 insertions(+)
--- a/arch/mips/boot/dts/img/pistachio_marduk.dts
+++ b/arch/mips/boot/dts/img/pistachio_marduk.dts
@@ -76,6 +76,28 @@
VDD-supply = <&internal_dac_supply>;
};
+&spfi0 {
+ status = "okay";
+ pinctrl-0 = <&spim0_pins>, <&spim0_cs0_alt_pin>, <&spim0_cs2_alt_pin>, <&spim0_cs3_alt_pin>, <&spim0_cs4_alt_pin>;
+ pinctrl-names = "default";
+
+ cs-gpios = <&gpio1 14 GPIO_ACTIVE_HIGH>, <&gpio0 2 GPIO_ACTIVE_HIGH>,
+ <&gpio1 12 GPIO_ACTIVE_HIGH>, <&gpio1 13 GPIO_ACTIVE_HIGH>;
+
+ ca8210: ca8210@0 {
+ status = "okay";
+ compatible = "cascoda,ca8210";
+ reg = <0>;
+ spi-max-frequency = <4000000>;
+ spi-cpol;
+ reset-gpio = <&gpio0 12 GPIO_ACTIVE_HIGH>;
+ irq-gpio = <&gpio2 12 GPIO_ACTIVE_HIGH>;
+ extclock-enable;
+ extclock-freq = <16000000>;
+ extclock-gpio = <2>;
+ };
+};
+
&spfi1 {
status = "okay";

View File

@ -0,0 +1,81 @@
From ad4eba0c36ce8af6ab9ea1bc163e4c1ac7c271c3 Mon Sep 17 00:00:00 2001
From: Hauke Mehrtens <hauke@hauke-m.de>
Date: Sat, 15 Aug 2020 16:09:02 +0200
Subject: [PATCH 903/904] MIPS: DTS: img: marduk: Add NXP SC16IS752IPW
Add NXP SC16IS752IPW SPI-UART controller to device tree.
This controller drives 2 UARTs and 7 LEDs on the board.
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
---
arch/mips/boot/dts/img/pistachio_marduk.dts | 51 +++++++++++++++++++++
1 file changed, 51 insertions(+)
--- a/arch/mips/boot/dts/img/pistachio_marduk.dts
+++ b/arch/mips/boot/dts/img/pistachio_marduk.dts
@@ -46,6 +46,46 @@
regulator-max-microvolt = <1800000>;
};
+ /* EXT clock from ca8210 is fed to sc16is752 */
+ ca8210_ext_clk: ca8210-ext-clk {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <16000000>;
+ clock-output-names = "ca8210_ext_clock";
+ };
+
+ gpioleds {
+ compatible = "gpio-leds";
+ user1 {
+ label = "marduk:red:user1";
+ gpios = <&sc16is752 0 GPIO_ACTIVE_LOW>;
+ };
+ user2 {
+ label = "marduk:red:user2";
+ gpios = <&sc16is752 1 GPIO_ACTIVE_LOW>;
+ };
+ user3 {
+ label = "marduk:red:user3";
+ gpios = <&sc16is752 2 GPIO_ACTIVE_LOW>;
+ };
+ user4 {
+ label = "marduk:red:user4";
+ gpios = <&sc16is752 3 GPIO_ACTIVE_LOW>;
+ };
+ user5 {
+ label = "marduk:red:user5";
+ gpios = <&sc16is752 4 GPIO_ACTIVE_LOW>;
+ };
+ user6 {
+ label = "marduk:red:user6";
+ gpios = <&sc16is752 5 GPIO_ACTIVE_LOW>;
+ };
+ user7 {
+ label = "marduk:red:user7";
+ gpios = <&sc16is752 6 GPIO_ACTIVE_LOW>;
+ };
+ };
+
led-controller {
compatible = "pwm-leds";
@@ -96,6 +136,17 @@
extclock-freq = <16000000>;
extclock-gpio = <2>;
};
+
+ sc16is752: sc16is752@1 {
+ compatible = "nxp,sc16is752";
+ reg = <1>;
+ clocks = <&ca8210_ext_clk>;
+ spi-max-frequency = <4000000>;
+ interrupt-parent = <&gpio0>;
+ interrupts = <11 IRQ_TYPE_EDGE_FALLING>;
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
};
&spfi1 {

View File

@ -0,0 +1,27 @@
From ff0e950b605047bf50d470023e0fb2fc2003a0f0 Mon Sep 17 00:00:00 2001
From: Ian Pozella <Ian.Pozella@imgtec.com>
Date: Mon, 20 Feb 2017 10:38:07 +0000
Subject: [PATCH 904/904] MIPS: DTS: img: marduk: Add partition name
Signed-off-by: Ian Pozella <Ian.Pozella@imgtec.com>
---
arch/mips/boot/dts/img/pistachio_marduk.dts | 2 ++
1 file changed, 2 insertions(+)
--- a/arch/mips/boot/dts/img/pistachio_marduk.dts
+++ b/arch/mips/boot/dts/img/pistachio_marduk.dts
@@ -161,12 +161,14 @@
compatible = "spansion,s25fl016k", "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <50000000>;
+ linux,mtd-name = "spi-nor";
};
flash@1 {
compatible = "spi-nand";
reg = <1>;
spi-max-frequency = <50000000>;
+ linux,mtd-name = "spi-nand";
};
};

View File

@ -0,0 +1,27 @@
--- a/arch/mips/boot/dts/img/pistachio_marduk.dts
+++ b/arch/mips/boot/dts/img/pistachio_marduk.dts
@@ -19,6 +19,11 @@
ethernet0 = &enet;
spi0 = &spfi0;
spi1 = &spfi1;
+
+ led-boot = &led_heartbeat;
+ led-failsafe = &led_heartbeat;
+ led-running = &led_heartbeat;
+ led-upgrade = &led_heartbeat;
};
chosen {
@@ -89,11 +94,10 @@
led-controller {
compatible = "pwm-leds";
- led-1 {
+ led_heartbeat: heartbeat {
label = "marduk:red:heartbeat";
pwms = <&pwm 3 300000>;
max-brightness = <255>;
- linux,default-trigger = "heartbeat";
};
};

View File

@ -33,9 +33,15 @@
keys {
compatible = "gpio-keys";
wps {
label = "wps";
gpios = <&gpio 13 GPIO_ACTIVE_LOW>;
linux,code = <KEY_WPS_BUTTON>;
};
reset {
label = "reset";
gpios = <&gpio 13 GPIO_ACTIVE_LOW>;
gpios = <&gpio 12 GPIO_ACTIVE_LOW>;
linux,code = <KEY_RESTART>;
};
};

View File

@ -97,7 +97,7 @@ $(curdir)/bison/compile := $(curdir)/flex/compile
$(curdir)/cbootimage/compile += $(curdir)/automake/compile
$(curdir)/cmake/compile += $(curdir)/libressl/compile $(curdir)/ninja/compile $(curdir)/expat/compile $(curdir)/xz/compile $(curdir)/zlib/compile $(curdir)/zstd/compile
$(curdir)/dosfstools/compile := $(curdir)/automake/compile
$(curdir)/e2fsprogs/compile := $(curdir)/libtool/compile
$(curdir)/e2fsprogs/compile := $(curdir)/libtool/compile $(curdir)/util-linux/compile
$(curdir)/elfutils/compile := $(curdir)/m4/compile $(curdir)/zlib/compile $(curdir)/gnulib/compile $(curdir)/libtool/compile
$(curdir)/fakeroot/compile := $(curdir)/libtool/compile
$(curdir)/findutils/compile := $(curdir)/bison/compile
@ -123,7 +123,7 @@ $(curdir)/mklibs/compile := $(curdir)/libtool/compile
$(curdir)/mold/compile := $(curdir)/cmake/compile $(curdir)/zlib/compile $(curdir)/zstd/compile
$(curdir)/mpc/compile := $(curdir)/mpfr/compile $(curdir)/gmp/compile
$(curdir)/mpfr/compile := $(curdir)/gmp/compile
$(curdir)/mtd-utils/compile := $(curdir)/libtool/compile $(curdir)/e2fsprogs/compile $(curdir)/zlib/compile
$(curdir)/mtd-utils/compile := $(curdir)/libtool/compile $(curdir)/zlib/compile $(curdir)/util-linux/compile
$(curdir)/padjffs2/compile := $(curdir)/findutils/compile
$(curdir)/patchelf/compile := $(curdir)/libtool/compile
$(curdir)/pkgconf/compile := $(curdir)/meson/compile
@ -131,7 +131,7 @@ $(curdir)/quilt/compile := $(curdir)/autoconf/compile $(curdir)/findutils/compil
$(curdir)/sdcc/compile := $(curdir)/bison/compile
$(curdir)/squashfs3-lzma/compile := $(curdir)/lzma-old/compile
$(curdir)/squashfs4/compile := $(curdir)/xz/compile $(curdir)/zlib/compile
$(curdir)/util-linux/compile := $(curdir)/bison/compile
$(curdir)/util-linux/compile := $(curdir)/bison/compile $(curdir)/automake/compile
$(curdir)/yafut/compile := $(curdir)/cmake/compile
ifneq ($(HOST_OS),Linux)

View File

@ -29,7 +29,6 @@ HOST_GNULIB_SKIP := \
lib/locale.in.h
HOST_CONFIGURE_ARGS += \
--disable-year2038 \
--enable-install-program=$(subst $(space),$(comma),$(strip $(PKG_PROGRAMS)))
HOST_MAKE_FLAGS += \

View File

@ -11,7 +11,6 @@ PKG_NAME:=e2fsprogs
PKG_CPE_ID:=cpe:/a:e2fsprogs_project:e2fsprogs
PKG_VERSION:=1.47.0
PKG_HASH:=0b4fe723d779b0927fb83c9ae709bc7b40f66d7df36433bef143e41c54257084
PKG_RELEASE:=1
PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.gz
PKG_SOURCE_URL:=@KERNEL/linux/kernel/people/tytso/e2fsprogs/v$(PKG_VERSION)/
@ -27,7 +26,7 @@ HOST_CFLAGS += $(HOST_FPIC)
HOST_CONFIGURE_ARGS += \
--disable-elf-shlibs \
--enable-libuuid \
--disable-libuuid \
--disable-tls \
--disable-nls \
--enable-threads=pth \
@ -39,17 +38,13 @@ define Host/Prepare
endef
define Host/Install
$(Host/Install/Default)
$(MAKE) -C $(HOST_BUILD_DIR)/lib/uuid install
mkdir -p $(STAGING_DIR_HOST)/include/e2fsprogs
$(CP) $(STAGING_DIR_HOST)/include/uuid $(STAGING_DIR_HOST)/include/e2fsprogs/
rm -rf $(STAGING_DIR_HOST)/include/uuid
$(INSTALL_DATA) $(HOST_BUILD_DIR)/lib/uuid/libuuid.a $(STAGING_DIR_HOST)/lib/
$(call Host/Install/Default)
$(SED) 's|^DIR=.*|DIR=$$$$(STAGING_DIR_HOST)/share/et|' $(STAGING_DIR_HOST)/bin/compile_et
$(SED) 's|^DIR=.*|DIR=$$$$(STAGING_DIR_HOST)/share/ss|' $(STAGING_DIR_HOST)/bin/mk_cmds
endef
define Host/Clean
rm -f $(STAGING_DIR_HOST)/bin/e2fsck
rm -f $(STAGING_DIR_HOST)/bin/tune2fs
define Host/Uninstall
-$(call Host/Compile/Default,uninstall)
endef
$(eval $(call HostBuild))

View File

@ -29,9 +29,6 @@ ifneq ($(HOST_OS),Linux)
-include fls.h
endif
HOST_CONFIGURE_VARS+= \
UUID_CFLAGS="-I$(STAGING_DIR_HOST)/include/e2fsprogs/uuid"
HOST_CONFIGURE_ARGS+= \
--without-tests \
--without-crypto \

View File

@ -14,93 +14,17 @@ PKG_SOURCE_URL:=@KERNEL/linux/utils/$(PKG_NAME)/v2.40
PKG_HASH:=8e396eececae2b3b68db232c33b8810faa7c31f6df19f98f512739293d5829b7
PKG_CPE_ID:=cpe:/a:kernel:util-linux
PKG_FIXUP:=autoreconf
HOST_BUILD_PARALLEL:=1
include $(INCLUDE_DIR)/host-build.mk
HOST_CONFIGURE_ARGS += \
--disable-poman \
--disable-nls \
--disable-asciidoc \
--disable-poman \
--disable-libuuid \
--disable-libblkid \
--disable-libmount \
--disable-libsmartcols \
--disable-libfdisk \
--disable-fdisks \
--disable-mount \
--disable-losetup \
--disable-zramctl \
--disable-fsck \
--disable-partx \
--disable-uuidd \
--disable-uuidgen \
--disable-blkid \
--disable-wipefs \
--disable-mountpoint \
--disable-fallocate \
--disable-unshare \
--disable-nsenter \
--disable-setpriv \
--disable-hardlink \
--disable-eject \
--disable-agetty \
--disable-cramfs \
--disable-bfs \
--disable-minix \
--disable-hwclock \
--disable-mkfs \
--disable-fstrim \
--disable-swapon \
--disable-lscpu \
--disable-lsfd \
--disable-lslogins \
--disable-wdctl \
--disable-cal \
--disable-logger \
--disable-whereis \
--disable-pipesz \
--disable-waitpid \
--disable-switch_root \
--disable-pivot_root \
--disable-lsmem \
--disable-chmem \
--disable-ipcmk \
--disable-ipcrm \
--disable-ipcs \
--disable-irqtop \
--disable-lsirq \
--disable-lsns \
--disable-rfkill \
--disable-scriptutils \
--disable-tunelp \
--disable-kill \
--disable-last \
--disable-utmpdump \
--disable-line \
--disable-mesg \
--disable-raw \
--disable-rename \
--disable-vipw \
--disable-newgrp \
--disable-chfn-chsh \
--disable-login \
--disable-nologin \
--disable-sulogin \
--disable-su \
--disable-runuser \
--disable-ul \
--disable-more \
--disable-pg \
--disable-setterm \
--disable-schedutils \
--disable-wall \
--disable-write \
--disable-bash-completion \
--disable-pylibmount \
--disable-pg-bell \
--disable-liblastlog2 \
--disable-shared \
--disable-all-programs \
--enable-hexdump \
--enable-libuuid \
--without-util \
--without-selinux \
--without-audit \
@ -122,12 +46,8 @@ HOST_CONFIGURE_ARGS += \
--without-python \
--without-cryptsetup
define Host/Install
$(INSTALL_BIN) $(HOST_BUILD_DIR)/hexdump $(STAGING_DIR_HOST)/bin/
endef
define Host/Uninstall
rm -f $(STAGING_DIR_HOST)/bin/hexdump
-$(call Host/Compile/Default,uninstall)
endef
$(eval $(call HostBuild))

View File

@ -0,0 +1,28 @@
From 37641f246ee9df7289b4e3054b3ded3912773722 Mon Sep 17 00:00:00 2001
From: Robert Marko <robimarko@gmail.com>
Date: Tue, 25 Jun 2024 17:32:08 +0200
Subject: [PATCH] hexdump: allow enabling with --disable-all-programs
Currently, if --disable-all-programs is used hexdump cannot be built
as --enable-hexdump is not recognized, so lets add support for it.
Signed-off-by: Robert Marko <robimarko@gmail.com>
---
configure.ac | 6 +++++-
1 file changed, 5 insertions(+), 1 deletion(-)
--- a/configure.ac
+++ b/configure.ac
@@ -2237,7 +2237,11 @@ UL_BUILD_INIT([column], [check])
UL_REQUIRES_BUILD([column], [libsmartcols])
AM_CONDITIONAL([BUILD_COLUMN], [test "x$build_column" = xyes])
-UL_BUILD_INIT([hexdump], [yes])
+AC_ARG_ENABLE([hexdump],
+ AS_HELP_STRING([--disable-hexdump], [do not build hexdump]),
+ [], [UL_DEFAULT_ENABLE([hexdump], [check])]
+)
+UL_BUILD_INIT([hexdump])
AM_CONDITIONAL([BUILD_HEXDUMP], [test "x$build_hexdump" = xyes])
UL_BUILD_INIT([rev], [yes])

View File

@ -0,0 +1,26 @@
From 9445f477cfcfb3615ffde8f93b1b98c809ee4eca Mon Sep 17 00:00:00 2001
From: Eugene Gershnik <gershnik@users.noreply.github.com>
Date: Mon, 6 May 2024 09:29:39 -0700
Subject: [PATCH] This re-enables build on macOS.
Weak aliases are not supported by clang on Darwin.
Instead this fix uses inline asm to make `_uuid_time` and alias to `___uuid_time`
Fixes util-linux/util-linux#2873
---
libuuid/src/uuid_time.c | 4 ++++
1 file changed, 4 insertions(+)
--- a/libuuid/src/uuid_time.c
+++ b/libuuid/src/uuid_time.c
@@ -85,6 +85,10 @@ time_t __uuid_time(const uuid_t uu, stru
}
#if defined(__USE_TIME_BITS64) && defined(__GLIBC__)
extern time_t uuid_time64(const uuid_t uu, struct timeval *ret_tv) __attribute__((weak, alias("__uuid_time")));
+#elif defined(__clang__) && defined(__APPLE__)
+__asm__(".globl _uuid_time");
+__asm__(".set _uuid_time, ___uuid_time");
+extern time_t uuid_time(const uuid_t uu, struct timeval *ret_tv);
#else
extern time_t uuid_time(const uuid_t uu, struct timeval *ret_tv) __attribute__((weak, alias("__uuid_time")));
#endif