Merge Official Source

Signed-off-by: Tianling Shen <cnsztl@immortalwrt.org>
2023-09-23 11:46:05 +08:00 · 2023-09-23 11:46:05 +08:00 · df11060923
commit df11060923
parent d999c2afd1 d152188906
22 changed files with 1691 additions and 10 deletions
--- a/package/boot/arm-trusted-firmware-mediatek/Makefile
+++ b/package/boot/arm-trusted-firmware-mediatek/Makefile
@ -118,7 +118,7 @@ define Trusted-Firmware-A/mt7981-sdmmc-ddr3
  DDR_TYPE:=ddr3
 endef
-define Trusted-Firmware-A/mt7986-snand-ddr3
+define Trusted-Firmware-A/mt7981-snand-ddr3
  NAME:=MediaTek MT7981 (SPI-NAND via SNFI, DDR3)
  BOOT_DEVICE:=snand
  BUILD_SUBTARGET:=filogic
@ -347,7 +347,7 @@ TFA_TARGETS:= \
 	mt7981-emmc-ddr3 \
 	mt7981-nor-ddr3 \
 	mt7981-sdmmc-ddr3 \
-	mt7986-snand-ddr3 \
+	mt7981-snand-ddr3 \
 	mt7981-spim-nand-ddr3 \
 	mt7986-emmc-ddr3 \
 	mt7986-nor-ddr3 \
--- a/package/boot/uboot-mediatek/Makefile
+++ b/package/boot/uboot-mediatek/Makefile
@ -212,6 +212,66 @@ define U-Boot/mt7981_h3c_magic-nx30-pro
  DEPENDS:=+trusted-firmware-a-mt7981-spim-nand-ddr3
 endef
 define U-Boot/mt7981_rfb-spim-nand
  NAME:=MT7981 Reference Board
  BUILD_SUBTARGET:=filogic
  BUILD_DEVICES:=mediatek_mt7981-rfb
  UBOOT_CONFIG:=mt7981_rfb
  UBOOT_IMAGE:=u-boot.fip
  BL2_BOOTDEV:=spim-nand
  BL2_SOC:=mt7981
  BL2_DDRTYPE:=ddr3
  DEPENDS:=+trusted-firmware-a-mt7981-spim-nand-ddr3
 endef
 define U-Boot/mt7981_rfb-emmc
  NAME:=MT7981 Reference Board
  BUILD_SUBTARGET:=filogic
  BUILD_DEVICES:=mediatek_mt7981-rfb
  UBOOT_CONFIG:=mt7981_emmc_rfb
  UBOOT_IMAGE:=u-boot.fip
  BL2_BOOTDEV:=emmc
  BL2_SOC:=mt7981
  BL2_DDRTYPE:=ddr3
  DEPENDS:=+trusted-firmware-a-mt7981-emmc-ddr3
 endef
 define U-Boot/mt7981_rfb-nor
  NAME:=MT7981 Reference Board
  BUILD_SUBTARGET:=filogic
  BUILD_DEVICES:=mediatek_mt7981-rfb
  UBOOT_CONFIG:=mt7981_nor_rfb
  UBOOT_IMAGE:=u-boot.fip
  BL2_BOOTDEV:=spim-nand
  BL2_SOC:=mt7981
  BL2_DDRTYPE:=ddr3
  DEPENDS:=+trusted-firmware-a-mt7981-nor-ddr3
 endef
 define U-Boot/mt7981_rfb-sd
  NAME:=MT7981 Reference Board
  BUILD_SUBTARGET:=filogic
  BUILD_DEVICES:=mediatek_mt7981-rfb
  UBOOT_CONFIG:=mt7981_sd_rfb
  UBOOT_IMAGE:=u-boot.fip
  BL2_BOOTDEV:=sdmmc
  BL2_SOC:=mt7981
  BL2_DDRTYPE:=ddr3
  DEPENDS:=+trusted-firmware-a-mt7981-sdmmc-ddr3
 endef
 define U-Boot/mt7981_rfb-snfi
  NAME:=MT7981 Reference Board
  BUILD_SUBTARGET:=filogic
  BUILD_DEVICES:=mediatek_mt7981-rfb
  UBOOT_CONFIG:=mt7981_snfi_nand_rfb
  UBOOT_IMAGE:=u-boot.fip
  BL2_BOOTDEV:=snand
  BL2_SOC:=mt7981
  BL2_DDRTYPE:=ddr3
  DEPENDS:=+trusted-firmware-a-mt7981-snand-ddr3
 endef
 define U-Boot/mt7981_qihoo_360t7
  NAME:=Qihoo 360T7
  BUILD_SUBTARGET:=filogic
@ -425,6 +485,11 @@ UBOOT_TARGETS := \
 	ravpower_rp-wd009 \
 	mt7629_rfb \
 	mt7981_h3c_magic-nx30-pro \
 	mt7981_rfb-spim-nand \
 	mt7981_rfb-emmc \
 	mt7981_rfb-nor \
 	mt7981_rfb-sd \
 	mt7981_rfb-snfi \
 	mt7981_qihoo_360t7 \
 	mt7981_xiaomi_mi-router-wr30u \
 	mt7986_bananapi_bpi-r3-emmc \
--- a/package/boot/uboot-mediatek/patches/106-configs-sync-mt7981-rfb-storage.patch
+++ b/package/boot/uboot-mediatek/patches/106-configs-sync-mt7981-rfb-storage.patch
@ -0,0 +1,129 @@
 --- a/configs/mt7981_rfb_defconfig
 +++ b/configs/mt7981_rfb_defconfig
@@ -30,6 +30,9 @@ CONFIG_CMD_MTD=y
 CONFIG_CMD_SF_TEST=y
 CONFIG_CMD_PING=y
 CONFIG_CMD_SMC=y
 +CONFIG_CMD_UBI=y
 +CONFIG_CMD_UBI_RENAME=y
 +CONFIG_ENV_OVERWRITE=y
 CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
 CONFIG_NET_RANDOM_ETHADDR=y
 CONFIG_REGMAP=y
 --- a/configs/mt7981_snfi_nand_rfb_defconfig
 +++ b/configs/mt7981_snfi_nand_rfb_defconfig
@@ -1,11 +1,12 @@
 CONFIG_ARM=y
 +CONFIG_SYS_HAS_NONCACHED_MEMORY=y
 CONFIG_POSITION_INDEPENDENT=y
 CONFIG_ARCH_MEDIATEK=y
 CONFIG_TEXT_BASE=0x41e00000
 CONFIG_SYS_MALLOC_F_LEN=0x4000
 CONFIG_NR_DRAM_BANKS=1
 -CONFIG_ENV_SIZE=0x20000
 CONFIG_DEFAULT_DEVICE_TREE="mt7981-snfi-nand-rfb"
 +CONFIG_SYS_PROMPT="MT7981> "
 CONFIG_TARGET_MT7981=y
 CONFIG_DEBUG_UART_BASE=0x11002000
 CONFIG_DEBUG_UART_CLOCK=40000000
@@ -15,7 +16,6 @@ CONFIG_DEBUG_UART=y
 CONFIG_DEFAULT_FDT_FILE="mt7981-snfi-nand-rfb"
 CONFIG_LOGLEVEL=7
 CONFIG_LOG=y
 -CONFIG_SYS_PROMPT="MT7981> "
 CONFIG_SYS_CBSIZE=512
 CONFIG_SYS_PBSIZE=1049
 # CONFIG_BOOTM_NETBSD is not set
@@ -29,8 +29,6 @@ CONFIG_CMD_GPIO=y
 CONFIG_CMD_MTD=y
 CONFIG_CMD_PING=y
 CONFIG_CMD_SMC=y
 -CONFIG_MTDIDS_DEFAULT="spi-nand0=spi-nand0"
 -CONFIG_MTDPARTS_DEFAULT="spi-nand0:1024k(bl2),512k(u-boot-env),2048k(factory),2048k(fip),65536k(ubi)"
 CONFIG_CMD_UBI=y
 CONFIG_CMD_UBI_RENAME=y
 CONFIG_ENV_OVERWRITE=y
@@ -45,7 +43,6 @@ CONFIG_DM_MTD=y
 CONFIG_MTK_SPI_NAND=y
 CONFIG_MTK_SPI_NAND_MTD=y
 CONFIG_PHY_FIXED=y
 -CONFIG_DM_ETH=y
 CONFIG_MEDIATEK_ETH=y
 CONFIG_PINCTRL=y
 CONFIG_PINCONF=y
@@ -55,3 +52,4 @@ CONFIG_MTK_POWER_DOMAIN=y
 CONFIG_DM_SERIAL=y
 CONFIG_MTK_SERIAL=y
 CONFIG_HEXDUMP=y
 +CONFIG_LMB_MAX_REGIONS=64
 --- /dev/null
 +++ b/configs/mt7981_nor_rfb_defconfig
@@ -0,0 +1,68 @@
 +CONFIG_ARM=y
 +CONFIG_SYS_HAS_NONCACHED_MEMORY=y
 +CONFIG_POSITION_INDEPENDENT=y
 +CONFIG_ARCH_MEDIATEK=y
 +CONFIG_TEXT_BASE=0x41e00000
 +CONFIG_SYS_MALLOC_F_LEN=0x4000
 +CONFIG_NR_DRAM_BANKS=1
 +CONFIG_DEFAULT_DEVICE_TREE="mt7981-rfb"
 +CONFIG_SYS_PROMPT="MT7981> "
 +CONFIG_TARGET_MT7981=y
 +CONFIG_DEBUG_UART_BASE=0x11002000
 +CONFIG_DEBUG_UART_CLOCK=40000000
 +CONFIG_SYS_LOAD_ADDR=0x46000000
 +CONFIG_DEBUG_UART=y
 +# CONFIG_AUTOBOOT is not set
 +CONFIG_DEFAULT_FDT_FILE="mt7981-rfb"
 +CONFIG_LOGLEVEL=7
 +CONFIG_LOG=y
 +CONFIG_SYS_CBSIZE=512
 +CONFIG_SYS_PBSIZE=1049
 +# CONFIG_BOOTM_NETBSD is not set
 +# CONFIG_BOOTM_PLAN9 is not set
 +# CONFIG_BOOTM_RTEMS is not set
 +# CONFIG_BOOTM_VXWORKS is not set
 +# CONFIG_CMD_ELF is not set
 +# CONFIG_CMD_UNLZ4 is not set
 +# CONFIG_CMD_UNZIP is not set
 +CONFIG_CMD_GPIO=y
 +CONFIG_CMD_MTD=y
 +CONFIG_CMD_SF_TEST=y
 +CONFIG_CMD_PING=y
 +CONFIG_CMD_SMC=y
 +CONFIG_ENV_OVERWRITE=y
 +CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
 +CONFIG_NET_RANDOM_ETHADDR=y
 +CONFIG_REGMAP=y
 +CONFIG_SYSCON=y
 +CONFIG_CLK=y
 +# CONFIG_MMC is not set
 +CONFIG_MTD=y
 +CONFIG_DM_MTD=y
 +CONFIG_MTD_SPI_NAND=y
 +CONFIG_DM_SPI_FLASH=y
 +CONFIG_SPI_FLASH_SFDP_SUPPORT=y
 +CONFIG_SPI_FLASH_EON=y
 +CONFIG_SPI_FLASH_GIGADEVICE=y
 +CONFIG_SPI_FLASH_ISSI=y
 +CONFIG_SPI_FLASH_MACRONIX=y
 +CONFIG_SPI_FLASH_SPANSION=y
 +CONFIG_SPI_FLASH_STMICRO=y
 +CONFIG_SPI_FLASH_WINBOND=y
 +CONFIG_SPI_FLASH_XMC=y
 +CONFIG_SPI_FLASH_XTX=y
 +CONFIG_SPI_FLASH_MTD=y
 +CONFIG_PHY_FIXED=y
 +CONFIG_MEDIATEK_ETH=y
 +CONFIG_PINCTRL=y
 +CONFIG_PINCONF=y
 +CONFIG_PINCTRL_MT7981=y
 +CONFIG_POWER_DOMAIN=y
 +CONFIG_MTK_POWER_DOMAIN=y
 +CONFIG_DM_SERIAL=y
 +CONFIG_MTK_SERIAL=y
 +CONFIG_SPI=y
 +CONFIG_DM_SPI=y
 +CONFIG_MTK_SPIM=y
 +CONFIG_HEXDUMP=y
 +CONFIG_LMB_MAX_REGIONS=64
--- a/package/boot/uboot-mediatek/patches/107-configs-add-useful-options-to-mt7981-rfb.patch
+++ b/package/boot/uboot-mediatek/patches/107-configs-add-useful-options-to-mt7981-rfb.patch
@ -0,0 +1,474 @@
 --- a/configs/mt7981_emmc_rfb_defconfig
 +++ b/configs/mt7981_emmc_rfb_defconfig
@@ -14,7 +14,22 @@ CONFIG_DEBUG_UART_BASE=0x11002000
 CONFIG_DEBUG_UART_CLOCK=40000000
 CONFIG_SYS_LOAD_ADDR=0x46000000
 CONFIG_DEBUG_UART=y
 -# CONFIG_AUTOBOOT is not set
 +CONFIG_OF_LIBFDT_OVERLAY=y
 +CONFIG_SMBIOS_PRODUCT_NAME=""
 +CONFIG_CFB_CONSOLE_ANSI=y
 +CONFIG_BOARD_LATE_INIT=y
 +CONFIG_BUTTON=y
 +CONFIG_BUTTON_GPIO=y
 +CONFIG_GPIO_HOG=y
 +CONFIG_CMD_ENV_FLAGS=y
 +CONFIG_FIT=y
 +CONFIG_FIT_ENABLE_SHA256_SUPPORT=y
 +CONFIG_LED=y
 +CONFIG_LED_BLINK=y
 +CONFIG_LED_GPIO=y
 +CONFIG_MMC_BOOT=y
 +CONFIG_BOOTSTD_DEFAULTS=y
 +CONFIG_BOOTSTD_FULL=y
 CONFIG_DEFAULT_FDT_FILE="mt7981-emmc-rfb"
 CONFIG_LOGLEVEL=7
 CONFIG_LOG=y
@@ -24,9 +39,23 @@ CONFIG_SYS_PBSIZE=1049
 # CONFIG_BOOTM_PLAN9 is not set
 # CONFIG_BOOTM_RTEMS is not set
 # CONFIG_BOOTM_VXWORKS is not set
 -# CONFIG_CMD_ELF is not set
 # CONFIG_CMD_UNLZ4 is not set
 # CONFIG_CMD_UNZIP is not set
 +CONFIG_CMD_BOOTMENU=y
 +CONFIG_CMD_BOOTP=y
 +CONFIG_CMD_BUTTON=y
 +CONFIG_CMD_CACHE=y
 +CONFIG_CMD_CDP=y
 +CONFIG_CMD_CPU=y
 +CONFIG_CMD_DHCP=y
 +CONFIG_CMD_DM=y
 +CONFIG_CMD_ELF=y
 +CONFIG_CMD_DNS=y
 +CONFIG_CMD_ECHO=y
 +CONFIG_CMD_ENV_READMEM=y
 +CONFIG_CMD_ERASEENV=y
 +CONFIG_CMD_FDT=y
 +CONFIG_CMD_FS_UUID=y
 CONFIG_CMD_GPIO=y
 CONFIG_CMD_GPT=y
 CONFIG_CMD_GPT_RENAME=y
@@ -36,13 +65,35 @@ CONFIG_CMD_PART=y
 CONFIG_CMD_READ=y
 CONFIG_CMD_PING=y
 CONFIG_CMD_SMC=y
 +CONFIG_CMD_TFTPBOOT=y
 +CONFIG_CMD_TFTPSRV=y
 +CONFIG_CMD_ASKENV=y
 +CONFIG_CMD_RARP=y
 +CONFIG_CMD_SETEXPR=y
 +CONFIG_CMD_SLEEP=y
 +CONFIG_CMD_SNTP=y
 +CONFIG_CMD_SOURCE=y
 +CONFIG_CMD_STRINGS=y
 +CONFIG_CMD_UUID=y
 CONFIG_CMD_FAT=y
 CONFIG_CMD_FS_GENERIC=y
 +CONFIG_CMD_HASH=y
 +CONFIG_CMD_ITEST=y
 +CONFIG_CMD_LED=y
 +CONFIG_CMD_LICENSE=y
 +CONFIG_CMD_LINK_LOCAL=y
 +CONFIG_CMD_PSTORE=y
 +CONFIG_CMD_PSTORE_MEM_ADDR=0x42ff0000
 +CONFIG_CMD_SF=y
 +CONFIG_CMD_SF_TEST=y
 +CONFIG_CMD_PING=y
 +CONFIG_CMD_PXE=y
 CONFIG_PARTITION_TYPE_GUID=y
 CONFIG_ENV_OVERWRITE=y
 CONFIG_ENV_IS_IN_MMC=y
 CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
 CONFIG_NET_RANDOM_ETHADDR=y
 +CONFIG_REGEX=y
 CONFIG_REGMAP=y
 CONFIG_SYSCON=y
 CONFIG_CLK=y
 --- a/configs/mt7981_rfb_defconfig
 +++ b/configs/mt7981_rfb_defconfig
@@ -12,7 +12,23 @@ CONFIG_DEBUG_UART_BASE=0x11002000
 CONFIG_DEBUG_UART_CLOCK=40000000
 CONFIG_SYS_LOAD_ADDR=0x46000000
 CONFIG_DEBUG_UART=y
 -# CONFIG_AUTOBOOT is not set
 +CONFIG_OF_LIBFDT_OVERLAY=y
 +CONFIG_SMBIOS_PRODUCT_NAME=""
 +CONFIG_CFB_CONSOLE_ANSI=y
 +CONFIG_BOARD_LATE_INIT=y
 +CONFIG_BUTTON=y
 +CONFIG_BUTTON_GPIO=y
 +CONFIG_GPIO_HOG=y
 +CONFIG_CMD_ENV_FLAGS=y
 +CONFIG_FIT=y
 +CONFIG_FIT_ENABLE_SHA256_SUPPORT=y
 +CONFIG_LED=y
 +CONFIG_LED_BLINK=y
 +CONFIG_LED_GPIO=y
 +CONFIG_SPI_BOOT=y
 +CONFIG_NAND_BOOT=y
 +CONFIG_BOOTSTD_DEFAULTS=y
 +CONFIG_BOOTSTD_FULL=y
 CONFIG_DEFAULT_FDT_FILE="mt7981-rfb"
 CONFIG_LOGLEVEL=7
 CONFIG_LOG=y
@@ -22,23 +38,74 @@ CONFIG_SYS_PBSIZE=1049
 # CONFIG_BOOTM_PLAN9 is not set
 # CONFIG_BOOTM_RTEMS is not set
 # CONFIG_BOOTM_VXWORKS is not set
 -# CONFIG_CMD_ELF is not set
 # CONFIG_CMD_UNLZ4 is not set
 # CONFIG_CMD_UNZIP is not set
 +CONFIG_CMD_BOOTMENU=y
 +CONFIG_CMD_BOOTP=y
 +CONFIG_CMD_BUTTON=y
 +CONFIG_CMD_CACHE=y
 +CONFIG_CMD_CDP=y
 +CONFIG_CMD_CPU=y
 +CONFIG_CMD_DHCP=y
 +CONFIG_CMD_DM=y
 +CONFIG_CMD_ELF=y
 +CONFIG_CMD_DNS=y
 +CONFIG_CMD_ECHO=y
 +CONFIG_CMD_ENV_READMEM=y
 +CONFIG_CMD_ERASEENV=y
 +CONFIG_CMD_FDT=y
 +CONFIG_CMD_FS_GENERIC=y
 +CONFIG_CMD_FS_UUID=y
 CONFIG_CMD_GPIO=y
 CONFIG_CMD_MTD=y
 -CONFIG_CMD_SF_TEST=y
 +CONFIG_CMD_HASH=y
 +CONFIG_CMD_ITEST=y
 +CONFIG_CMD_LED=y
 +CONFIG_CMD_LICENSE=y
 +CONFIG_CMD_LINK_LOCAL=y
 +CONFIG_CMD_MTD=y
 +CONFIG_CMD_NAND=y
 +# CONFIG_MTD_RAW_NAND is not set
 +CONFIG_CMD_NAND_TRIMFFS=y
 +CONFIG_CMD_PCI=y
 +CONFIG_CMD_PSTORE=y
 +CONFIG_CMD_PSTORE_MEM_ADDR=0x42ff0000
 CONFIG_CMD_PING=y
 +CONFIG_CMD_PXE=y
 +CONFIG_CMD_SF=y
 +CONFIG_CMD_SF_TEST=y
 CONFIG_CMD_SMC=y
 CONFIG_CMD_UBI=y
 CONFIG_CMD_UBI_RENAME=y
 +CONFIG_CMD_UBIFS=y
 +CONFIG_CMD_TFTPBOOT=y
 +CONFIG_CMD_TFTPSRV=y
 +CONFIG_CMD_ASKENV=y
 +CONFIG_CMD_RARP=y
 +CONFIG_CMD_SETEXPR=y
 +CONFIG_CMD_SLEEP=y
 +CONFIG_CMD_SNTP=y
 +CONFIG_CMD_SOURCE=y
 +CONFIG_CMD_STRINGS=y
 +CONFIG_CMD_UUID=y
 +CONFIG_ENV_IS_IN_UBI=y
 +CONFIG_ENV_UBI_PART="ubi"
 +CONFIG_ENV_SIZE=0x1f000
 +CONFIG_ENV_SIZE_REDUND=0x1f000
 +CONFIG_ENV_UBI_VOLUME="ubootenv"
 +CONFIG_ENV_UBI_VOLUME_REDUND="ubootenv2"
 +CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
 CONFIG_ENV_OVERWRITE=y
 CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
 CONFIG_NET_RANDOM_ETHADDR=y
 +CONFIG_REGEX=y
 CONFIG_REGMAP=y
 CONFIG_SYSCON=y
 CONFIG_CLK=y
 # CONFIG_MMC is not set
 +CONFIG_HUSH_PARSER=y
 +CONFIG_SYS_REDUNDAND_ENVIRONMENT=y
 +CONFIG_SYS_RELOC_GD_ENV_ADDR=y
 CONFIG_MTD=y
 CONFIG_DM_MTD=y
 CONFIG_MTD_SPI_NAND=y
 --- a/configs/mt7981_sd_rfb_defconfig
 +++ b/configs/mt7981_sd_rfb_defconfig
@@ -14,7 +14,22 @@ CONFIG_DEBUG_UART_BASE=0x11002000
 CONFIG_DEBUG_UART_CLOCK=40000000
 CONFIG_SYS_LOAD_ADDR=0x46000000
 CONFIG_DEBUG_UART=y
 -# CONFIG_AUTOBOOT is not set
 +CONFIG_OF_LIBFDT_OVERLAY=y
 +CONFIG_SMBIOS_PRODUCT_NAME=""
 +CONFIG_CFB_CONSOLE_ANSI=y
 +CONFIG_BOARD_LATE_INIT=y
 +CONFIG_BUTTON=y
 +CONFIG_BUTTON_GPIO=y
 +CONFIG_GPIO_HOG=y
 +CONFIG_CMD_ENV_FLAGS=y
 +CONFIG_FIT=y
 +CONFIG_FIT_ENABLE_SHA256_SUPPORT=y
 +CONFIG_LED=y
 +CONFIG_LED_BLINK=y
 +CONFIG_LED_GPIO=y
 +CONFIG_MMC_BOOT=y
 +CONFIG_BOOTSTD_DEFAULTS=y
 +CONFIG_BOOTSTD_FULL=y
 CONFIG_DEFAULT_FDT_FILE="mt7981-sd-rfb"
 CONFIG_LOGLEVEL=7
 CONFIG_LOG=y
@@ -24,9 +39,23 @@ CONFIG_SYS_PBSIZE=1049
 # CONFIG_BOOTM_PLAN9 is not set
 # CONFIG_BOOTM_RTEMS is not set
 # CONFIG_BOOTM_VXWORKS is not set
 -# CONFIG_CMD_ELF is not set
 # CONFIG_CMD_UNLZ4 is not set
 # CONFIG_CMD_UNZIP is not set
 +CONFIG_CMD_BOOTMENU=y
 +CONFIG_CMD_BOOTP=y
 +CONFIG_CMD_BUTTON=y
 +CONFIG_CMD_CACHE=y
 +CONFIG_CMD_CDP=y
 +CONFIG_CMD_CPU=y
 +CONFIG_CMD_DHCP=y
 +CONFIG_CMD_DM=y
 +CONFIG_CMD_ELF=y
 +CONFIG_CMD_DNS=y
 +CONFIG_CMD_ECHO=y
 +CONFIG_CMD_ENV_READMEM=y
 +CONFIG_CMD_ERASEENV=y
 +CONFIG_CMD_FDT=y
 +CONFIG_CMD_FS_UUID=y
 CONFIG_CMD_GPIO=y
 CONFIG_CMD_GPT=y
 CONFIG_CMD_GPT_RENAME=y
@@ -36,13 +65,35 @@ CONFIG_CMD_PART=y
 CONFIG_CMD_READ=y
 CONFIG_CMD_PING=y
 CONFIG_CMD_SMC=y
 +CONFIG_CMD_TFTPBOOT=y
 +CONFIG_CMD_TFTPSRV=y
 +CONFIG_CMD_ASKENV=y
 +CONFIG_CMD_RARP=y
 +CONFIG_CMD_SETEXPR=y
 +CONFIG_CMD_SLEEP=y
 +CONFIG_CMD_SNTP=y
 +CONFIG_CMD_SOURCE=y
 +CONFIG_CMD_STRINGS=y
 +CONFIG_CMD_UUID=y
 CONFIG_CMD_FAT=y
 CONFIG_CMD_FS_GENERIC=y
 +CONFIG_CMD_HASH=y
 +CONFIG_CMD_ITEST=y
 +CONFIG_CMD_LED=y
 +CONFIG_CMD_LICENSE=y
 +CONFIG_CMD_LINK_LOCAL=y
 +CONFIG_CMD_PSTORE=y
 +CONFIG_CMD_PSTORE_MEM_ADDR=0x42ff0000
 +CONFIG_CMD_SF=y
 +CONFIG_CMD_SF_TEST=y
 +CONFIG_CMD_PING=y
 +CONFIG_CMD_PXE=y
 CONFIG_PARTITION_TYPE_GUID=y
 CONFIG_ENV_OVERWRITE=y
 CONFIG_ENV_IS_IN_MMC=y
 CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
 CONFIG_NET_RANDOM_ETHADDR=y
 +CONFIG_REGEX=y
 CONFIG_REGMAP=y
 CONFIG_SYSCON=y
 CONFIG_CLK=y
 --- a/configs/mt7981_snfi_nand_rfb_defconfig
 +++ b/configs/mt7981_snfi_nand_rfb_defconfig
@@ -12,7 +12,23 @@ CONFIG_DEBUG_UART_BASE=0x11002000
 CONFIG_DEBUG_UART_CLOCK=40000000
 CONFIG_SYS_LOAD_ADDR=0x46000000
 CONFIG_DEBUG_UART=y
 -# CONFIG_AUTOBOOT is not set
 +CONFIG_OF_LIBFDT_OVERLAY=y
 +CONFIG_SMBIOS_PRODUCT_NAME=""
 +CONFIG_CFB_CONSOLE_ANSI=y
 +CONFIG_BOARD_LATE_INIT=y
 +CONFIG_BUTTON=y
 +CONFIG_BUTTON_GPIO=y
 +CONFIG_GPIO_HOG=y
 +CONFIG_CMD_ENV_FLAGS=y
 +CONFIG_FIT=y
 +CONFIG_FIT_ENABLE_SHA256_SUPPORT=y
 +CONFIG_LED=y
 +CONFIG_LED_BLINK=y
 +CONFIG_LED_GPIO=y
 +CONFIG_SPI_BOOT=y
 +CONFIG_NAND_BOOT=y
 +CONFIG_BOOTSTD_DEFAULTS=y
 +CONFIG_BOOTSTD_FULL=y
 CONFIG_DEFAULT_FDT_FILE="mt7981-snfi-nand-rfb"
 CONFIG_LOGLEVEL=7
 CONFIG_LOG=y
@@ -22,22 +38,73 @@ CONFIG_SYS_PBSIZE=1049
 # CONFIG_BOOTM_PLAN9 is not set
 # CONFIG_BOOTM_RTEMS is not set
 # CONFIG_BOOTM_VXWORKS is not set
 -# CONFIG_CMD_ELF is not set
 # CONFIG_CMD_UNLZ4 is not set
 # CONFIG_CMD_UNZIP is not set
 +CONFIG_CMD_BOOTMENU=y
 +CONFIG_CMD_BOOTP=y
 +CONFIG_CMD_BUTTON=y
 +CONFIG_CMD_CACHE=y
 +CONFIG_CMD_CDP=y
 +CONFIG_CMD_CPU=y
 +CONFIG_CMD_DHCP=y
 +CONFIG_CMD_DM=y
 +CONFIG_CMD_ELF=y
 +CONFIG_CMD_DNS=y
 +CONFIG_CMD_ECHO=y
 +CONFIG_CMD_ENV_READMEM=y
 +CONFIG_CMD_ERASEENV=y
 +CONFIG_CMD_FDT=y
 +CONFIG_CMD_FS_GENERIC=y
 +CONFIG_CMD_FS_UUID=y
 CONFIG_CMD_GPIO=y
 CONFIG_CMD_MTD=y
 +CONFIG_CMD_HASH=y
 +CONFIG_CMD_ITEST=y
 +CONFIG_CMD_LED=y
 +CONFIG_CMD_LICENSE=y
 +CONFIG_CMD_LINK_LOCAL=y
 +CONFIG_CMD_MTD=y
 +CONFIG_CMD_NAND=y
 +# CONFIG_MTD_RAW_NAND is not set
 +CONFIG_CMD_NAND_TRIMFFS=y
 +CONFIG_CMD_PCI=y
 +CONFIG_CMD_PSTORE=y
 +CONFIG_CMD_PSTORE_MEM_ADDR=0x42ff0000
 +CONFIG_CMD_SF=y
 +CONFIG_CMD_SF_TEST=y
 CONFIG_CMD_PING=y
 +CONFIG_CMD_PXE=y
 CONFIG_CMD_SMC=y
 CONFIG_CMD_UBI=y
 CONFIG_CMD_UBI_RENAME=y
 +CONFIG_CMD_UBIFS=y
 +CONFIG_CMD_TFTPBOOT=y
 +CONFIG_CMD_TFTPSRV=y
 +CONFIG_CMD_ASKENV=y
 +CONFIG_CMD_RARP=y
 +CONFIG_CMD_SETEXPR=y
 +CONFIG_CMD_SLEEP=y
 +CONFIG_CMD_SNTP=y
 +CONFIG_CMD_SOURCE=y
 +CONFIG_CMD_STRINGS=y
 +CONFIG_CMD_UUID=y
 CONFIG_ENV_OVERWRITE=y
 +CONFIG_ENV_IS_IN_UBI=y
 +CONFIG_ENV_UBI_PART="ubi"
 +CONFIG_ENV_SIZE=0x1f000
 +CONFIG_ENV_SIZE_REDUND=0x1f000
 +CONFIG_ENV_UBI_VOLUME="ubootenv"
 +CONFIG_ENV_UBI_VOLUME_REDUND="ubootenv2"
 CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
 CONFIG_NET_RANDOM_ETHADDR=y
 +CONFIG_REGEX=y
 CONFIG_REGMAP=y
 CONFIG_SYSCON=y
 CONFIG_CLK=y
 # CONFIG_MMC is not set
 +CONFIG_HUSH_PARSER=y
 +CONFIG_SYS_REDUNDAND_ENVIRONMENT=y
 +CONFIG_SYS_RELOC_GD_ENV_ADDR=y
 CONFIG_MTD=y
 CONFIG_DM_MTD=y
 CONFIG_MTK_SPI_NAND=y
 --- a/configs/mt7981_nor_rfb_defconfig
 +++ b/configs/mt7981_nor_rfb_defconfig
@@ -12,7 +12,22 @@ CONFIG_DEBUG_UART_BASE=0x11002000
 CONFIG_DEBUG_UART_CLOCK=40000000
 CONFIG_SYS_LOAD_ADDR=0x46000000
 CONFIG_DEBUG_UART=y
 -# CONFIG_AUTOBOOT is not set
 +CONFIG_OF_LIBFDT_OVERLAY=y
 +CONFIG_SMBIOS_PRODUCT_NAME=""
 +CONFIG_CFB_CONSOLE_ANSI=y
 +CONFIG_BOARD_LATE_INIT=y
 +CONFIG_BUTTON=y
 +CONFIG_BUTTON_GPIO=y
 +CONFIG_GPIO_HOG=y
 +CONFIG_CMD_ENV_FLAGS=y
 +CONFIG_FIT=y
 +CONFIG_FIT_ENABLE_SHA256_SUPPORT=y
 +CONFIG_LED=y
 +CONFIG_LED_BLINK=y
 +CONFIG_LED_GPIO=y
 +CONFIG_SPI_BOOT=y
 +CONFIG_BOOTSTD_DEFAULTS=y
 +CONFIG_BOOTSTD_FULL=y
 CONFIG_DEFAULT_FDT_FILE="mt7981-rfb"
 CONFIG_LOGLEVEL=7
 CONFIG_LOG=y
@@ -22,21 +37,66 @@ CONFIG_SYS_PBSIZE=1049
 # CONFIG_BOOTM_PLAN9 is not set
 # CONFIG_BOOTM_RTEMS is not set
 # CONFIG_BOOTM_VXWORKS is not set
 -# CONFIG_CMD_ELF is not set
 # CONFIG_CMD_UNLZ4 is not set
 # CONFIG_CMD_UNZIP is not set
 +CONFIG_CMD_BOOTMENU=y
 +CONFIG_CMD_BOOTP=y
 +CONFIG_CMD_BUTTON=y
 +CONFIG_CMD_CACHE=y
 +CONFIG_CMD_CDP=y
 +CONFIG_CMD_CPU=y
 +CONFIG_CMD_DHCP=y
 +CONFIG_CMD_DM=y
 +CONFIG_CMD_ELF=y
 +CONFIG_CMD_DNS=y
 +CONFIG_CMD_ECHO=y
 +CONFIG_CMD_ENV_READMEM=y
 +CONFIG_CMD_ERASEENV=y
 +CONFIG_CMD_FDT=y
 +CONFIG_CMD_FS_GENERIC=y
 +CONFIG_CMD_FS_UUID=y
 CONFIG_CMD_GPIO=y
 CONFIG_CMD_MTD=y
 +CONFIG_CMD_HASH=y
 +CONFIG_CMD_ITEST=y
 +CONFIG_CMD_LED=y
 +CONFIG_CMD_LICENSE=y
 +CONFIG_CMD_LINK_LOCAL=y
 +CONFIG_CMD_MTD=y
 +CONFIG_CMD_PCI=y
 +CONFIG_CMD_PSTORE=y
 +CONFIG_CMD_PSTORE_MEM_ADDR=0x42ff0000
 +CONFIG_CMD_SF=y
 CONFIG_CMD_SF_TEST=y
 CONFIG_CMD_PING=y
 +CONFIG_CMD_PXE=y
 CONFIG_CMD_SMC=y
 +CONFIG_CMD_TFTPBOOT=y
 +CONFIG_CMD_TFTPSRV=y
 +CONFIG_CMD_ASKENV=y
 +CONFIG_CMD_RARP=y
 +CONFIG_CMD_SETEXPR=y
 +CONFIG_CMD_SLEEP=y
 +CONFIG_CMD_SNTP=y
 +CONFIG_CMD_SOURCE=y
 +CONFIG_CMD_STRINGS=y
 +CONFIG_CMD_UUID=y
 +CONFIG_ENV_IS_IN_MTD=y
 +CONFIG_ENV_MTD_NAME="u-boot-env"
 +CONFIG_ENV_SIZE_REDUND=0x4000
 +CONFIG_ENV_SIZE=0x4000
 +CONFIG_ENV_OFFSET=0x0
 CONFIG_ENV_OVERWRITE=y
 CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
 CONFIG_NET_RANDOM_ETHADDR=y
 +CONFIG_REGEX=y
 CONFIG_REGMAP=y
 CONFIG_SYSCON=y
 CONFIG_CLK=y
 # CONFIG_MMC is not set
 +CONFIG_HUSH_PARSER=y
 +CONFIG_SYS_REDUNDAND_ENVIRONMENT=y
 +CONFIG_SYS_RELOC_GD_ENV_ADDR=y
 CONFIG_MTD=y
 CONFIG_DM_MTD=y
 CONFIG_MTD_SPI_NAND=y
--- a/package/boot/uboot-mediatek/patches/108-dts-arm64-mt7981-rfb-add-mtd-partitions.patch
+++ b/package/boot/uboot-mediatek/patches/108-dts-arm64-mt7981-rfb-add-mtd-partitions.patch
@ -0,0 +1,140 @@
 --- a/arch/arm/dts/mt7981-rfb.dts
 +++ b/arch/arm/dts/mt7981-rfb.dts
@@ -143,6 +143,37 @@
 		compatible = "spi-nand";
 		reg = <0>;
 		spi-max-frequency = <52000000>;
 +
 +		partitions {
 +			compatible = "fixed-partitions";
 +			#address-cells = <1>;
 +			#size-cells = <1>;
 +
 +			partition@0 {
 +				label = "BL2";
 +				reg = <0x00000 0x0100000>;
 +			};
 +
 +			partition@100000 {
 +				label = "u-boot-env";
 +				reg = <0x0100000 0x0080000>;
 +			};
 +
 +			factory: partition@180000 {
 +				label = "Factory";
 +				reg = <0x180000 0x0200000>;
 +			};
 +
 +			partition@380000 {
 +				label = "FIP";
 +				reg = <0x380000 0x0200000>;
 +			};
 +
 +			partition@580000 {
 +				label = "ubi";
 +				reg = <0x580000 0x4000000>;
 +			};
 +		};
 	};
 };
@@ -164,6 +195,37 @@
 		compatible = "jedec,spi-nor";
 		reg = <0>;
 		spi-max-frequency = <52000000>;
 +
 +		partitions {
 +			compatible = "fixed-partitions";
 +			#address-cells = <1>;
 +			#size-cells = <1>;
 +
 +			partition@00000 {
 +				label = "BL2";
 +				reg = <0x00000 0x0040000>;
 +			};
 +
 +			partition@40000 {
 +				label = "u-boot-env";
 +				reg = <0x40000 0x0010000>;
 +			};
 +
 +			partition@50000 {
 +				label = "Factory";
 +				reg = <0x50000 0x00B0000>;
 +			};
 +
 +			partition@100000 {
 +				label = "FIP";
 +				reg = <0x100000 0x0080000>;
 +			};
 +
 +			partition@180000 {
 +				label = "firmware";
 +				reg = <0x180000 0xE00000>;
 +			};
 +		};
 	};
 };
 --- a/arch/arm/dts/mt7981-snfi-nand-rfb.dts
 +++ b/arch/arm/dts/mt7981-snfi-nand-rfb.dts
@@ -107,11 +107,11 @@
 	};
 	mmc0_pins_default: mmc0default {
 -                mux {
 -                       function = "flash";
 -                       groups =  "emmc_45";
 -                 };
 -         };
 +		mux {
 +			function = "flash";
 +			groups =  "emmc_45";
 +		};
 +	};
 };
 &snand {
@@ -119,6 +119,42 @@
 	pinctrl-0 = <&snfi_pins>;
 	status = "okay";
 	quad-spi;
 +
 +	spi_nand@0 {
 +		compatible = "spi-nand";
 +		reg = <0>;
 +
 +		partitions {
 +			compatible = "fixed-partitions";
 +			#address-cells = <1>;
 +			#size-cells = <1>;
 +
 +			partition@0 {
 +				label = "BL2";
 +				reg = <0x00000 0x0100000>;
 +			};
 +
 +			partition@100000 {
 +				label = "u-boot-env";
 +				reg = <0x0100000 0x0080000>;
 +			};
 +
 +			factory: partition@180000 {
 +				label = "Factory";
 +				reg = <0x180000 0x0200000>;
 +			};
 +
 +			partition@380000 {
 +				label = "FIP";
 +				reg = <0x380000 0x0200000>;
 +			};
 +
 +			partition@580000 {
 +				label = "ubi";
 +				reg = <0x580000 0x4000000>;
 +			};
 +		};
 +	};
 };
 &pwm {
--- a/package/kernel/mac80211/patches/rt2x00/999-wifi-rt2x00-fix-MT7620-low-RSSI-issue.patch
+++ b/package/kernel/mac80211/patches/rt2x00/999-wifi-rt2x00-fix-MT7620-low-RSSI-issue.patch
@ -0,0 +1,39 @@
 From: Shiji Yang <yangshiji66@outlook.com>
 Date: Sat, 23 Sep 2023 07:51:39 +0800
 Subject: [PATCH] wifi: rt2x00: fix MT7620 low RSSI issue
 On Mediatek vendor driver[1], MT7620 (RT6352) uses different RSSI
 base value '-2' compared to the other RT2x00 chips. This patch
 introduces the SoC specific base value to fix the low RSSI value
 reports on MT7620.
 [1] Found on MT76x2E_MT7620_LinuxAP_V3.0.4.0_P3 ConvertToRssi().
 Signed-off-by: Shiji Yang <yangshiji66@outlook.com>
 ---
 drivers/net/wireless/ralink/rt2x00/rt2800lib.c | 7 ++++---
 1 file changed, 4 insertions(+), 3 deletions(-)
 --- a/drivers/net/wireless/ralink/rt2x00/rt2800lib.c
 +++ b/drivers/net/wireless/ralink/rt2x00/rt2800lib.c
@@ -875,6 +875,7 @@ static int rt2800_agc_to_rssi(struct rt2
 	s8 rssi0 = rt2x00_get_field32(rxwi_w2, RXWI_W2_RSSI0);
 	s8 rssi1 = rt2x00_get_field32(rxwi_w2, RXWI_W2_RSSI1);
 	s8 rssi2 = rt2x00_get_field32(rxwi_w2, RXWI_W2_RSSI2);
 +	s8 base_val = rt2x00_rt(rt2x00dev, RT6352) ? -2 : -12;
 	u16 eeprom;
 	u8 offset0;
 	u8 offset1;
@@ -899,9 +900,9 @@ static int rt2800_agc_to_rssi(struct rt2
 	 * If the value in the descriptor is 0, it is considered invalid
 	 * and the default (extremely low) rssi value is assumed
 	 */
 -	rssi0 = (rssi0) ? (-12 - offset0 - rt2x00dev->lna_gain - rssi0) : -128;
 -	rssi1 = (rssi1) ? (-12 - offset1 - rt2x00dev->lna_gain - rssi1) : -128;
 -	rssi2 = (rssi2) ? (-12 - offset2 - rt2x00dev->lna_gain - rssi2) : -128;
 +	rssi0 = (rssi0) ? (base_val - offset0 - rt2x00dev->lna_gain - rssi0) : -128;
 +	rssi1 = (rssi1) ? (base_val - offset1 - rt2x00dev->lna_gain - rssi1) : -128;
 +	rssi2 = (rssi2) ? (base_val - offset2 - rt2x00dev->lna_gain - rssi2) : -128;
 	/*
 	 * mac80211 only accepts a single RSSI value. Calculating the
--- a/package/network/services/hostapd/patches/601-ucode_support.patch
+++ b/package/network/services/hostapd/patches/601-ucode_support.patch
@ -107,14 +107,14 @@
 	hostapd_ubus_free_bss(hapd);
 	accounting_deinit(hapd);
 	hostapd_deinit_wpa(hapd);
-@@ -570,6 +573,7 @@ static void sta_track_deinit(struct host
+@@ -600,6 +603,7 @@ void hostapd_cleanup_iface_partial(struc
- void hostapd_cleanup_iface_partial(struct hostapd_iface *iface)
+ static void hostapd_cleanup_iface(struct hostapd_iface *iface)
 {
 	wpa_printf(MSG_DEBUG, "%s(%p)", __func__, iface);
 +	hostapd_ucode_free_iface(iface);
- 	eloop_cancel_timeout(channel_list_update_timeout, iface, NULL);
+ 	eloop_cancel_timeout(hostapd_interface_setup_failure_handler, iface,
- #ifdef NEED_AP_MLME
+ 			     NULL);
- 	hostapd_stop_setup_timers(iface);
+ 
@@ -1189,6 +1193,7 @@ static int hostapd_start_beacon(struct h
 		hapd->driver->set_operstate(hapd->drv_priv, 1);
--- a/package/network/services/hostapd/src/wpa_supplicant/ucode.c
+++ b/package/network/services/hostapd/src/wpa_supplicant/ucode.c
@ -136,6 +136,7 @@ static uc_value_t *
 uc_wpas_add_iface(uc_vm_t *vm, size_t nargs)
 {
 	uc_value_t *info = uc_fn_arg(0);
 	uc_value_t *driver = ucv_object_get(info, "driver", NULL);
 	uc_value_t *ifname = ucv_object_get(info, "iface", NULL);
 	uc_value_t *bridge = ucv_object_get(info, "bridge", NULL);
 	uc_value_t *config = ucv_object_get(info, "config", NULL);
@ -154,6 +155,22 @@ uc_wpas_add_iface(uc_vm_t *vm, size_t nargs)
 		.ctrl_interface = ucv_string_get(ctrl),
 	};
 	if (driver) {
 		const char *drvname;
 		if (ucv_type(driver) != UC_STRING)
 			goto out;
 		iface.driver = NULL;
 		drvname = ucv_string_get(driver);
 		for (int i = 0; wpa_drivers[i]; i++) {
 			if (!strcmp(drvname, wpa_drivers[i]->name))
 				iface.driver = wpa_drivers[i]->name;
 		}
 		if (!iface.driver)
 			goto out;
 	}
 	if (!iface.ifname || !iface.confname)
 		goto out;
--- a/target/linux/generic/pending-5.15/860-serial-8250_mtk-track-busclk-state-to-avoid-bus-error.patch
+++ b/target/linux/generic/pending-5.15/860-serial-8250_mtk-track-busclk-state-to-avoid-bus-error.patch
@ -0,0 +1,61 @@
 From 629c701fc39f1ada9416e0766a86729e83bde86c Mon Sep 17 00:00:00 2001
 Message-ID: <629c701fc39f1ada9416e0766a86729e83bde86c.1694465766.git.daniel@makrotopia.org>
 From: Daniel Golle <daniel@makrotopia.org>
 Date: Mon, 11 Sep 2023 21:27:44 +0100
 Subject: [PATCH] serial: 8250_mtk: track busclk state to avoid bus error
 To: Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
    Jiri Slaby <jirislaby@kernel.org>,
    Matthias Brugger <matthias.bgg@gmail.com>,
    AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>,
    Daniel Golle <daniel@makrotopia.org>,
    John Ogness <john.ogness@linutronix.de>,
    Chen-Yu Tsai <wenst@chromium.org>,
    Changqi Hu <changqi.hu@mediatek.com>,
    linux-kernel@vger.kernel.org,
    linux-serial@vger.kernel.org,
    linux-arm-kernel@lists.infradead.org,
    linux-mediatek@lists.infradead.org
 Commit e32a83c70cf9 ("serial: 8250-mtk: modify mtk uart power and
 clock management") introduced polling a debug register to make sure
 the UART is idle before disabling the bus clock. However, at least on
 some MediaTek SoCs access to that very debug register requires the bus
 clock being enabled. Hence calling the suspend function while already
 in suspended state results in that register access triggering a bus
 error. In order to avoid that, track the state of the bus clock and
 only poll the debug register if not already in suspended state.
 Fixes: e32a83c70cf9 ("serial: 8250-mtk: modify mtk uart power and clock management")
 Signed-off-by: Daniel Golle <daniel@makrotopia.org>
 ---
 drivers/tty/serial/8250/8250_mtk.c | 11 ++++++++++-
 1 file changed, 10 insertions(+), 1 deletion(-)
 --- a/drivers/tty/serial/8250/8250_mtk.c
 +++ b/drivers/tty/serial/8250/8250_mtk.c
@@ -32,7 +32,7 @@
 #define MTK_UART_RXTRI_AD	0x14	/* RX Trigger address */
 #define MTK_UART_FRACDIV_L	0x15	/* Fractional divider LSB address */
 #define MTK_UART_FRACDIV_M	0x16	/* Fractional divider MSB address */
 -#define MTK_UART_DEBUG0	0x18
 +#define MTK_UART_DEBUG0		0x18
 #define MTK_UART_IER_XOFFI	0x20	/* Enable XOFF character interrupt */
 #define MTK_UART_IER_RTSI	0x40	/* Enable RTS Modem status interrupt */
 #define MTK_UART_IER_CTSI	0x80	/* Enable CTS Modem status interrupt */
@@ -418,13 +418,12 @@ static int __maybe_unused mtk8250_runtim
 	struct mtk8250_data *data = dev_get_drvdata(dev);
 	struct uart_8250_port *up = serial8250_get_port(data->line);
 -	/* wait until UART in idle status */
 -	while
 -		(serial_in(up, MTK_UART_DEBUG0));
 -
 	if (data->clk_count == 0U) {
 		dev_dbg(dev, "%s clock count is 0\n", __func__);
 	} else {
 +		/* wait until UART in idle status */
 +		while
 +			(serial_in(up, MTK_UART_DEBUG0));
 		clk_disable_unprepare(data->bus_clk);
 		data->clk_count--;
 	}
--- a/target/linux/generic/pending-6.1/860-serial-8250_mtk-track-busclk-state-to-avoid-bus-error.patch
+++ b/target/linux/generic/pending-6.1/860-serial-8250_mtk-track-busclk-state-to-avoid-bus-error.patch
@ -0,0 +1,61 @@
 From 629c701fc39f1ada9416e0766a86729e83bde86c Mon Sep 17 00:00:00 2001
 Message-ID: <629c701fc39f1ada9416e0766a86729e83bde86c.1694465766.git.daniel@makrotopia.org>
 From: Daniel Golle <daniel@makrotopia.org>
 Date: Mon, 11 Sep 2023 21:27:44 +0100
 Subject: [PATCH] serial: 8250_mtk: track busclk state to avoid bus error
 To: Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
    Jiri Slaby <jirislaby@kernel.org>,
    Matthias Brugger <matthias.bgg@gmail.com>,
    AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>,
    Daniel Golle <daniel@makrotopia.org>,
    John Ogness <john.ogness@linutronix.de>,
    Chen-Yu Tsai <wenst@chromium.org>,
    Changqi Hu <changqi.hu@mediatek.com>,
    linux-kernel@vger.kernel.org,
    linux-serial@vger.kernel.org,
    linux-arm-kernel@lists.infradead.org,
    linux-mediatek@lists.infradead.org
 Commit e32a83c70cf9 ("serial: 8250-mtk: modify mtk uart power and
 clock management") introduced polling a debug register to make sure
 the UART is idle before disabling the bus clock. However, at least on
 some MediaTek SoCs access to that very debug register requires the bus
 clock being enabled. Hence calling the suspend function while already
 in suspended state results in that register access triggering a bus
 error. In order to avoid that, track the state of the bus clock and
 only poll the debug register if not already in suspended state.
 Fixes: e32a83c70cf9 ("serial: 8250-mtk: modify mtk uart power and clock management")
 Signed-off-by: Daniel Golle <daniel@makrotopia.org>
 ---
 drivers/tty/serial/8250/8250_mtk.c | 11 ++++++++++-
 1 file changed, 10 insertions(+), 1 deletion(-)
 --- a/drivers/tty/serial/8250/8250_mtk.c
 +++ b/drivers/tty/serial/8250/8250_mtk.c
@@ -32,7 +32,7 @@
 #define MTK_UART_RXTRI_AD	0x14	/* RX Trigger address */
 #define MTK_UART_FRACDIV_L	0x15	/* Fractional divider LSB address */
 #define MTK_UART_FRACDIV_M	0x16	/* Fractional divider MSB address */
 -#define MTK_UART_DEBUG0	0x18
 +#define MTK_UART_DEBUG0		0x18
 #define MTK_UART_IER_XOFFI	0x20	/* Enable XOFF character interrupt */
 #define MTK_UART_IER_RTSI	0x40	/* Enable RTS Modem status interrupt */
 #define MTK_UART_IER_CTSI	0x80	/* Enable CTS Modem status interrupt */
@@ -418,13 +418,12 @@ static int __maybe_unused mtk8250_runtim
 	struct mtk8250_data *data = dev_get_drvdata(dev);
 	struct uart_8250_port *up = serial8250_get_port(data->line);
 -	/* wait until UART in idle status */
 -	while
 -		(serial_in(up, MTK_UART_DEBUG0));
 -
 	if (data->clk_count == 0U) {
 		dev_dbg(dev, "%s clock count is 0\n", __func__);
 	} else {
 +		/* wait until UART in idle status */
 +		while
 +			(serial_in(up, MTK_UART_DEBUG0));
 		clk_disable_unprepare(data->bus_clk);
 		data->clk_count--;
 	}
--- a/target/linux/mediatek/files-5.15/arch/arm64/boot/dts/mediatek/mt7981-rfb-mxl-2p5g-phy-eth1.dtso
+++ b/target/linux/mediatek/files-5.15/arch/arm64/boot/dts/mediatek/mt7981-rfb-mxl-2p5g-phy-eth1.dtso
@ -0,0 +1,32 @@
 /* SPDX-License-Identifier: (GPL-2.0-only OR MIT) */
 /dts-v1/;
 /plugin/;
 #include <dt-bindings/gpio/gpio.h>
 / {
 	compatible = "mediatek,mt7981-rfb", "mediatek,mt7981";
 	fragment@0 {
 		target = <&gmac1>;
 		__overlay__ {
 			phy-mode = "2500base-x";
 			phy-handle = <&phy5>;
 		};
 	};
 	fragment@1 {
 		target = <&mdio_bus>;
 		__overlay__ {
 			reset-gpios = <&pio 14 GPIO_ACTIVE_LOW>;
 			reset-delay-us = <600>;
 			reset-post-delay-us = <20000>;
 			phy5: ethernet-phy@5 {
 				reg = <5>;
 				compatible = "ethernet-phy-ieee802.3-c45";
 				phy-mode = "2500base-x";
 			};
 		};
 	};
 };
--- a/target/linux/mediatek/files-5.15/arch/arm64/boot/dts/mediatek/mt7981-rfb-mxl-2p5g-phy-swp5.dtso
+++ b/target/linux/mediatek/files-5.15/arch/arm64/boot/dts/mediatek/mt7981-rfb-mxl-2p5g-phy-swp5.dtso
@ -0,0 +1,33 @@
 /* SPDX-License-Identifier: (GPL-2.0-only OR MIT) */
 /dts-v1/;
 /plugin/;
 #include <dt-bindings/gpio/gpio.h>
 / {
 	compatible = "mediatek,mt7981-rfb", "mediatek,mt7981";
 	fragment@0 {
 		target = <&sw_p5>;
 		__overlay__ {
 			phy-mode = "2500base-x";
 			phy-handle = <&phy5>;
 			status = "okay";
 		};
 	};
 	fragment@1 {
 		target = <&mdio_bus>;
 		__overlay__ {
 			reset-gpios = <&pio 14 GPIO_ACTIVE_LOW>;
 			reset-delay-us = <600>;
 			reset-post-delay-us = <20000>;
 			phy5: ethernet-phy@5 {
 				reg = <5>;
 				compatible = "ethernet-phy-ieee802.3-c45";
 				phy-mode = "2500base-x";
 			};
 		};
 	};
 };
--- a/target/linux/mediatek/files-5.15/arch/arm64/boot/dts/mediatek/mt7981-rfb-spim-nand.dtso
+++ b/target/linux/mediatek/files-5.15/arch/arm64/boot/dts/mediatek/mt7981-rfb-spim-nand.dtso
@ -0,0 +1,66 @@
 /* SPDX-License-Identifier: (GPL-2.0-only OR MIT) */
 /dts-v1/;
 /plugin/;
 / {
 	compatible = "mediatek,mt7981-rfb", "mediatek,mt7981";
 	fragment@0 {
 		target = <&spi0>;
 		__overlay__ {
 			status = "okay";
 			#address-cells = <1>;
 			#size-cells = <0>;
 			spi_nand: spi_nand@0 {
 				#address-cells = <1>;
 				#size-cells = <1>;
 				compatible = "spi-nand";
 				reg = <1>;
 				spi-max-frequency = <10000000>;
 				spi-tx-bus-width = <4>;
 				spi-rx-bus-width = <4>;
 				partitions {
 					compatible = "fixed-partitions";
 					#address-cells = <1>;
 					#size-cells = <1>;
 					partition@0 {
 						label = "BL2";
 						reg = <0x00000 0x0100000>;
 						read-only;
 					};
 					partition@100000 {
 						label = "u-boot-env";
 						reg = <0x0100000 0x0080000>;
 					};
 					factory: partition@180000 {
 						label = "Factory";
 						reg = <0x180000 0x0200000>;
 					};
 					partition@380000 {
 						label = "FIP";
 						reg = <0x380000 0x0200000>;
 					};
 					partition@580000 {
 						label = "ubi";
 						reg = <0x580000 0x4000000>;
 					};
 				};
 			};
 		};
 	};
 	fragment@1 {
 		target = <&wifi>;
 		__overlay__ {
 			mediatek,mtd-eeprom = <&factory 0x0>;
 			status = "okay";
 		};
 	};
 };
--- a/target/linux/mediatek/files-5.15/arch/arm64/boot/dts/mediatek/mt7981-rfb.dts
+++ b/target/linux/mediatek/files-5.15/arch/arm64/boot/dts/mediatek/mt7981-rfb.dts
@ -0,0 +1,188 @@
 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
 /*
 * Copyright (C) 2022 MediaTek Inc.
 * Author: Sam.Shih <sam.shih@mediatek.com>
 */
 /dts-v1/;
 #include "mt7981.dtsi"
 / {
 	model = "MediaTek MT7981 RFB";
 	compatible = "mediatek,mt7981-rfb", "mediatek,mt7981";
 	aliases {
 		serial0 = &uart0;
 	};
 	chosen {
 		stdout-path = "serial0:115200n8";
 	};
 	memory {
 		reg = <0 0x40000000 0 0x20000000>;
 	};
 	reg_3p3v: regulator-3p3v {
 		compatible = "regulator-fixed";
 		regulator-name = "fixed-3.3V";
 		regulator-min-microvolt = <3300000>;
 		regulator-max-microvolt = <3300000>;
 		regulator-boot-on;
 		regulator-always-on;
 	};
 	reg_5v: regulator-5v {
 		compatible = "regulator-fixed";
 		regulator-name = "fixed-5V";
 		regulator-min-microvolt = <5000000>;
 		regulator-max-microvolt = <5000000>;
 		regulator-boot-on;
 		regulator-always-on;
 	};
 	gpio-keys {
 		compatible = "gpio-keys";
 		reset {
 			label = "reset";
 			linux,code = <KEY_RESTART>;
 			gpios = <&pio 1 GPIO_ACTIVE_LOW>;
 		};
 		wps {
 			label = "wps";
 			linux,code = <KEY_WPS_BUTTON>;
 			gpios = <&pio 0 GPIO_ACTIVE_HIGH>;
 		};
 	};
 };
 &eth {
 	status = "okay";
 	gmac0: mac@0 {
 		compatible = "mediatek,eth-mac";
 		reg = <0>;
 		phy-mode = "2500base-x";
 		fixed-link {
 			speed = <2500>;
 			full-duplex;
 			pause;
 		};
 	};
 	gmac1: mac@1 {
 		compatible = "mediatek,eth-mac";
 		reg = <1>;
 		phy-mode = "gmii";
 		phy-handle = <&int_gbe_phy>;
 	};
 };
 &mdio_bus {
 	switch: switch@1f {
 		compatible = "mediatek,mt7531";
 		reg = <31>;
 		interrupt-controller;
 		#interrupt-cells = <1>;
 		interrupt-parent = <&pio>;
 		interrupts = <38 IRQ_TYPE_LEVEL_HIGH>;
 		reset-gpios = <&pio 5 GPIO_ACTIVE_HIGH>;
 	};
 };
 &crypto {
 	status = "okay";
 };
 &pio {
 	spi0_flash_pins: spi0-pins {
 		mux {
 			function = "spi";
 			groups = "spi0", "spi0_wp_hold";
 		};
 		conf-pu {
 			pins = "SPI0_CS", "SPI0_HOLD", "SPI0_WP";
 			drive-strength = <MTK_DRIVE_8mA>;
 			bias-pull-up = <MTK_PUPD_SET_R1R0_11>;
 		};
 		conf-pd {
 			pins = "SPI0_CLK", "SPI0_MOSI", "SPI0_MISO";
 			drive-strength = <MTK_DRIVE_8mA>;
 			bias-pull-down = <MTK_PUPD_SET_R1R0_11>;
 		};
 	};
 };
 &spi0 {
 	pinctrl-names = "default";
 	pinctrl-0 = <&spi0_flash_pins>;
 	cs-gpios = <0>, <0>;
 	#address-cells = <1>;
 	#size-cells = <0>;
 	status = "disabled";
 };
 &switch {
 	ports {
 		#address-cells = <1>;
 		#size-cells = <0>;
 		port@0 {
 			reg = <0>;
 			label = "lan1";
 		};
 		port@1 {
 			reg = <1>;
 			label = "lan2";
 		};
 		port@2 {
 			reg = <2>;
 			label = "lan3";
 		};
 		port@3 {
 			reg = <3>;
 			label = "lan4";
 		};
 		sw_p5: port@5 {
 			reg = <5>;
 			label = "lan5";
 			status = "disabled";
 		};
 		port@6 {
 			reg = <6>;
 			ethernet = <&gmac0>;
 			phy-mode = "2500base-x";
 			fixed-link {
 				speed = <2500>;
 				full-duplex;
 				pause;
 			};
 		};
 	};
 };
 &xhci {
 	vusb33-supply = <&reg_3p3v>;
 	vbus-supply = <&reg_5v>;
 	status = "okay";
 };
 &uart0 {
 	status = "okay";
 };
 &usb_phy {
 	status = "okay";
 };
 &watchdog {
 	status = "okay";
 };
--- a/target/linux/mediatek/files-6.1/arch/arm64/boot/dts/mediatek/mt7981-rfb-mxl-2p5g-phy-eth1.dtso
+++ b/target/linux/mediatek/files-6.1/arch/arm64/boot/dts/mediatek/mt7981-rfb-mxl-2p5g-phy-eth1.dtso
@ -0,0 +1,32 @@
 /* SPDX-License-Identifier: (GPL-2.0-only OR MIT) */
 /dts-v1/;
 /plugin/;
 #include <dt-bindings/gpio/gpio.h>
 / {
 	compatible = "mediatek,mt7981-rfb", "mediatek,mt7981";
 	fragment@0 {
 		target = <&gmac1>;
 		__overlay__ {
 			phy-mode = "2500base-x";
 			phy-handle = <&phy5>;
 		};
 	};
 	fragment@1 {
 		target = <&mdio_bus>;
 		__overlay__ {
 			reset-gpios = <&pio 14 GPIO_ACTIVE_LOW>;
 			reset-delay-us = <600>;
 			reset-post-delay-us = <20000>;
 			phy5: ethernet-phy@5 {
 				reg = <5>;
 				compatible = "ethernet-phy-ieee802.3-c45";
 				phy-mode = "2500base-x";
 			};
 		};
 	};
 };
--- a/target/linux/mediatek/files-6.1/arch/arm64/boot/dts/mediatek/mt7981-rfb-mxl-2p5g-phy-swp5.dtso
+++ b/target/linux/mediatek/files-6.1/arch/arm64/boot/dts/mediatek/mt7981-rfb-mxl-2p5g-phy-swp5.dtso
@ -0,0 +1,33 @@
 /* SPDX-License-Identifier: (GPL-2.0-only OR MIT) */
 /dts-v1/;
 /plugin/;
 #include <dt-bindings/gpio/gpio.h>
 / {
 	compatible = "mediatek,mt7981-rfb", "mediatek,mt7981";
 	fragment@0 {
 		target = <&sw_p5>;
 		__overlay__ {
 			phy-mode = "2500base-x";
 			phy-handle = <&phy5>;
 			status = "okay";
 		};
 	};
 	fragment@1 {
 		target = <&mdio_bus>;
 		__overlay__ {
 			reset-gpios = <&pio 14 GPIO_ACTIVE_LOW>;
 			reset-delay-us = <600>;
 			reset-post-delay-us = <20000>;
 			phy5: ethernet-phy@5 {
 				reg = <5>;
 				compatible = "ethernet-phy-ieee802.3-c45";
 				phy-mode = "2500base-x";
 			};
 		};
 	};
 };
--- a/target/linux/mediatek/files-6.1/arch/arm64/boot/dts/mediatek/mt7981-rfb-spim-nand.dtso
+++ b/target/linux/mediatek/files-6.1/arch/arm64/boot/dts/mediatek/mt7981-rfb-spim-nand.dtso
@ -0,0 +1,66 @@
 /* SPDX-License-Identifier: (GPL-2.0-only OR MIT) */
 /dts-v1/;
 /plugin/;
 / {
 	compatible = "mediatek,mt7981-rfb", "mediatek,mt7981";
 	fragment@0 {
 		target = <&spi0>;
 		__overlay__ {
 			status = "okay";
 			#address-cells = <1>;
 			#size-cells = <0>;
 			spi_nand: spi_nand@0 {
 				#address-cells = <1>;
 				#size-cells = <1>;
 				compatible = "spi-nand";
 				reg = <1>;
 				spi-max-frequency = <10000000>;
 				spi-tx-bus-width = <4>;
 				spi-rx-bus-width = <4>;
 				partitions {
 					compatible = "fixed-partitions";
 					#address-cells = <1>;
 					#size-cells = <1>;
 					partition@0 {
 						label = "BL2";
 						reg = <0x00000 0x0100000>;
 						read-only;
 					};
 					partition@100000 {
 						label = "u-boot-env";
 						reg = <0x0100000 0x0080000>;
 					};
 					factory: partition@180000 {
 						label = "Factory";
 						reg = <0x180000 0x0200000>;
 					};
 					partition@380000 {
 						label = "FIP";
 						reg = <0x380000 0x0200000>;
 					};
 					partition@580000 {
 						label = "ubi";
 						reg = <0x580000 0x4000000>;
 					};
 				};
 			};
 		};
 	};
 	fragment@1 {
 		target = <&wifi>;
 		__overlay__ {
 			mediatek,mtd-eeprom = <&factory 0x0>;
 			status = "okay";
 		};
 	};
 };
--- a/target/linux/mediatek/files-6.1/arch/arm64/boot/dts/mediatek/mt7981-rfb.dts
+++ b/target/linux/mediatek/files-6.1/arch/arm64/boot/dts/mediatek/mt7981-rfb.dts
@ -0,0 +1,188 @@
 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
 /*
 * Copyright (C) 2022 MediaTek Inc.
 * Author: Sam.Shih <sam.shih@mediatek.com>
 */
 /dts-v1/;
 #include "mt7981.dtsi"
 / {
 	model = "MediaTek MT7981 RFB";
 	compatible = "mediatek,mt7981-rfb", "mediatek,mt7981";
 	aliases {
 		serial0 = &uart0;
 	};
 	chosen {
 		stdout-path = "serial0:115200n8";
 	};
 	memory {
 		reg = <0 0x40000000 0 0x20000000>;
 	};
 	reg_3p3v: regulator-3p3v {
 		compatible = "regulator-fixed";
 		regulator-name = "fixed-3.3V";
 		regulator-min-microvolt = <3300000>;
 		regulator-max-microvolt = <3300000>;
 		regulator-boot-on;
 		regulator-always-on;
 	};
 	reg_5v: regulator-5v {
 		compatible = "regulator-fixed";
 		regulator-name = "fixed-5V";
 		regulator-min-microvolt = <5000000>;
 		regulator-max-microvolt = <5000000>;
 		regulator-boot-on;
 		regulator-always-on;
 	};
 	gpio-keys {
 		compatible = "gpio-keys";
 		reset {
 			label = "reset";
 			linux,code = <KEY_RESTART>;
 			gpios = <&pio 1 GPIO_ACTIVE_LOW>;
 		};
 		wps {
 			label = "wps";
 			linux,code = <KEY_WPS_BUTTON>;
 			gpios = <&pio 0 GPIO_ACTIVE_HIGH>;
 		};
 	};
 };
 &eth {
 	status = "okay";
 	gmac0: mac@0 {
 		compatible = "mediatek,eth-mac";
 		reg = <0>;
 		phy-mode = "2500base-x";
 		fixed-link {
 			speed = <2500>;
 			full-duplex;
 			pause;
 		};
 	};
 	gmac1: mac@1 {
 		compatible = "mediatek,eth-mac";
 		reg = <1>;
 		phy-mode = "gmii";
 		phy-handle = <&int_gbe_phy>;
 	};
 };
 &mdio_bus {
 	switch: switch@1f {
 		compatible = "mediatek,mt7531";
 		reg = <31>;
 		interrupt-controller;
 		#interrupt-cells = <1>;
 		interrupt-parent = <&pio>;
 		interrupts = <38 IRQ_TYPE_LEVEL_HIGH>;
 		reset-gpios = <&pio 5 GPIO_ACTIVE_HIGH>;
 	};
 };
 &crypto {
 	status = "okay";
 };
 &pio {
 	spi0_flash_pins: spi0-pins {
 		mux {
 			function = "spi";
 			groups = "spi0", "spi0_wp_hold";
 		};
 		conf-pu {
 			pins = "SPI0_CS", "SPI0_HOLD", "SPI0_WP";
 			drive-strength = <MTK_DRIVE_8mA>;
 			bias-pull-up = <MTK_PUPD_SET_R1R0_11>;
 		};
 		conf-pd {
 			pins = "SPI0_CLK", "SPI0_MOSI", "SPI0_MISO";
 			drive-strength = <MTK_DRIVE_8mA>;
 			bias-pull-down = <MTK_PUPD_SET_R1R0_11>;
 		};
 	};
 };
 &spi0 {
 	pinctrl-names = "default";
 	pinctrl-0 = <&spi0_flash_pins>;
 	cs-gpios = <0>, <0>;
 	#address-cells = <1>;
 	#size-cells = <0>;
 	status = "disabled";
 };
 &switch {
 	ports {
 		#address-cells = <1>;
 		#size-cells = <0>;
 		port@0 {
 			reg = <0>;
 			label = "lan1";
 		};
 		port@1 {
 			reg = <1>;
 			label = "lan2";
 		};
 		port@2 {
 			reg = <2>;
 			label = "lan3";
 		};
 		port@3 {
 			reg = <3>;
 			label = "lan4";
 		};
 		sw_p5: port@5 {
 			reg = <5>;
 			label = "lan5";
 			status = "disabled";
 		};
 		port@6 {
 			reg = <6>;
 			ethernet = <&gmac0>;
 			phy-mode = "2500base-x";
 			fixed-link {
 				speed = <2500>;
 				full-duplex;
 				pause;
 			};
 		};
 	};
 };
 &xhci {
 	vusb33-supply = <&reg_3p3v>;
 	vbus-supply = <&reg_5v>;
 	status = "okay";
 };
 &uart0 {
 	status = "okay";
 };
 &usb_phy {
 	status = "okay";
 };
 &watchdog {
 	status = "okay";
 };
--- a/target/linux/mediatek/filogic/base-files/etc/board.d/02_network
+++ b/target/linux/mediatek/filogic/base-files/etc/board.d/02_network
@ -11,7 +11,8 @@ mediatek_setup_interfaces()
 	acer,predator-w6)
 		ucidef_set_interfaces_lan_wan "lan1 lan2 lan3 game" eth1
 		;;
-	asus,tuf-ax4200)
+	asus,tuf-ax4200|\
 	mediatek,mt7981-rfb)
 		ucidef_set_interfaces_lan_wan "lan1 lan2 lan3 lan4" eth1
 		;;
 	netgear,wax220|\
--- a/target/linux/mediatek/filogic/base-files/lib/upgrade/platform.sh
+++ b/target/linux/mediatek/filogic/base-files/lib/upgrade/platform.sh
@ -89,6 +89,7 @@ platform_do_upgrade() {
 		nand_do_upgrade "$1"
 		;;
 	h3c,magic-nx30-pro|\
 	mediatek,mt7981-rfb|\
 	qihoo,360t7|\
 	tplink,tl-xdr4288|\
 	tplink,tl-xdr6086|\
--- a/target/linux/mediatek/image/filogic.mk
+++ b/target/linux/mediatek/image/filogic.mk
@ -424,6 +424,61 @@ define Device/netgear_wax220
 endef
 TARGET_DEVICES += netgear_wax220
 define Device/mediatek_mt7981-rfb
  DEVICE_VENDOR := MediaTek
  DEVICE_MODEL := MT7981 rfb
  DEVICE_DTS := mt7981-rfb
  DEVICE_DTS_OVERLAY:= \
 	mt7981-rfb-spim-nand \
 	mt7981-rfb-mxl-2p5g-phy-eth1 \
 	mt7981-rfb-mxl-2p5g-phy-swp5
  DEVICE_DTS_DIR := $(DTS_DIR)/
  DEVICE_DTC_FLAGS := --pad 4096
  DEVICE_DTS_LOADADDR := 0x43f00000
  DEVICE_PACKAGES := kmod-mt7981-firmware kmod-usb3 e2fsprogs f2fsck mkf2fs mt7981-wo-firmware
  KERNEL_LOADADDR := 0x44000000
  KERNEL := kernel-bin | gzip
  KERNEL_INITRAMFS := kernel-bin | lzma | \
 	fit lzma $$(KDIR)/image-$$(firstword $$(DEVICE_DTS)).dtb with-initrd | pad-to 64k
  KERNEL_INITRAMFS_SUFFIX := .itb
  KERNEL_IN_UBI := 1
  UBOOTENV_IN_UBI := 1
  IMAGES := sysupgrade.itb
  IMAGE_SIZE := $$(shell expr 64 + $$(CONFIG_TARGET_ROOTFS_PARTSIZE))m
  IMAGE/sysupgrade.itb := append-kernel | fit gzip $$(KDIR)/image-$$(firstword $$(DEVICE_DTS)).dtb external-with-rootfs | pad-rootfs | append-metadata
  ARTIFACTS := \
 	emmc-preloader.bin emmc-bl31-uboot.fip \
 	nor-preloader.bin nor-bl31-uboot.fip \
 	sdcard.img.gz \
 	snfi-nand-preloader.bin snfi-nand-bl31-uboot.fip \
 	spim-nand-preloader.bin spim-nand-bl31-uboot.fip
  ARTIFACT/emmc-preloader.bin		:= mt7981-bl2 emmc-ddr3
  ARTIFACT/emmc-bl31-uboot.fip		:= mt7981-bl31-uboot rfb-emmc
  ARTIFACT/nor-preloader.bin		:= mt7981-bl2 nor-ddr3
  ARTIFACT/nor-bl31-uboot.fip		:= mt7981-bl31-uboot rfb-emmc
  ARTIFACT/snfi-nand-preloader.bin	:= mt7981-bl2 snand-ddr3
  ARTIFACT/snfi-nand-bl31-uboot.fip	:= mt7981-bl31-uboot rfb-snfi
  ARTIFACT/spim-nand-preloader.bin	:= mt7981-bl2 spim-nand-ddr3
  ARTIFACT/spim-nand-bl31-uboot.fip	:= mt7981-bl31-uboot rfb-spim-nand
  ARTIFACT/sdcard.img.gz	:= mt798x-gpt sdmmc |\
 				   pad-to 17k | mt7981-bl2 sdmmc-ddr3 |\
 				   pad-to 6656k | mt7981-bl31-uboot rfb-sd |\
 				$(if $(CONFIG_TARGET_ROOTFS_INITRAMFS),\
 				   pad-to 12M | append-image-stage initramfs.itb | check-size 44m |\
 				) \
 				   pad-to 44M | mt7981-bl2 spim-nand-ddr3 |\
 				   pad-to 45M | mt7981-bl31-uboot rfb-spim-nand |\
 				   pad-to 49M | mt7981-bl2 nor-ddr3 |\
 				   pad-to 50M | mt7981-bl31-uboot rfb-nor |\
 				   pad-to 51M | mt7981-bl2 snand-ddr3 |\
 				   pad-to 53M | mt7981-bl31-uboot rfb-snfi |\
 				$(if $(CONFIG_TARGET_ROOTFS_SQUASHFS),\
 				   pad-to 64M | append-image squashfs-sysupgrade.itb | check-size |\
 				) \
 				  gzip
 endef
 TARGET_DEVICES += mediatek_mt7981-rfb
 define Device/mediatek_mt7986a-rfb-nand
  DEVICE_VENDOR := MediaTek
  DEVICE_MODEL := MT7986 rfba AP (NAND)
--- a/tools/libressl/Makefile
+++ b/tools/libressl/Makefile
@ -8,8 +8,8 @@
 include $(TOPDIR)/rules.mk
 PKG_NAME:=libressl
-PKG_VERSION:=3.7.2
+PKG_VERSION:=3.7.3
-PKG_HASH:=b06aa538fefc9c6b33c4db4931a09a5f52d9d2357219afcbff7d93fe12ebf6f7
+PKG_HASH:=7948c856a90c825bd7268b6f85674a8dcd254bae42e221781b24e3f8dc335db3
 PKG_CPE_ID:=cpe:/a:openbsd:libressl