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uboot-rockchip: orangepi-r1-plus: refresh precompiled files

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Signed-off-by: Tianling Shen <cnsztl@immortalwrt.org>
This commit is contained in:
AmadeusGhost 2021-04-21 10:30:01 +08:00 committed by Tianling Shen
parent 98c6aeaca4
commit e0d536a287
No known key found for this signature in database
GPG Key ID: 6850B6345C862176
2 changed files with 24 additions and 91 deletions
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91
package/boot/uboot-rockchip/src/of-platdata/orangepi-r1-plus-rk3328/dt-platdata.c → package/boot/uboot-rockchip/src/of-platdata/orangepi-r1-plus-rk3328/dt-plat.c
View File

@ -1,11 +1,12 @@
/*
* DO NOT MODIFY
*
* This file was generated by dtoc from a .dtb (device tree binary) file.
* Declares the U_BOOT_DRIVER() records and platform data.
* This was generated by dtoc from a .dtb (device tree binary) file.
*/
/* Allow use of U_BOOT_DEVICE() in this file */
#define DT_PLATDATA_C
/* Allow use of U_BOOT_DRVINFO() in this file */
#define DT_PLAT_C
#include <common.h>
#include <dm.h>
@ -16,10 +17,10 @@ static struct dtd_rockchip_rk3328_cru dtv_clock_controller_at_ff440000 = {
.reg = {0xff440000, 0x1000},
.rockchip_grf = 0x3a,
};
U_BOOT_DEVICE(clock_controller_at_ff440000) = {
U_BOOT_DRVINFO(clock_controller_at_ff440000) = {
.name = "rockchip_rk3328_cru",
.platdata = &dtv_clock_controller_at_ff440000,
.platdata_size = sizeof(dtv_clock_controller_at_ff440000),
.plat = &dtv_clock_controller_at_ff440000,
.plat_size = sizeof(dtv_clock_controller_at_ff440000),
.parent_idx = -1,
};
@ -53,30 +54,14 @@ static struct dtd_rockchip_rk3328_dmc dtv_dmc = {
0x9, 0x77, 0x78, 0x77, 0x77, 0x77, 0x77, 0x77,
0x77, 0x77, 0x79, 0x9},
};
U_BOOT_DEVICE(dmc) = {
U_BOOT_DRVINFO(dmc) = {
.name = "rockchip_rk3328_dmc",
.platdata = &dtv_dmc,
.platdata_size = sizeof(dtv_dmc),
.plat = &dtv_dmc,
.plat_size = sizeof(dtv_dmc),
.parent_idx = -1,
};
/* Node /pinctrl/gpio0@ff210000 index 2 */
static struct dtd_rockchip_gpio_bank dtv_gpio0_at_ff210000 = {
.clocks = {
{0, {200}},},
.gpio_controller = true,
.interrupt_controller = true,
.interrupts = {0x0, 0x33, 0x4},
.reg = {0xff210000, 0x100},
};
U_BOOT_DEVICE(gpio0_at_ff210000) = {
.name = "rockchip_gpio_bank",
.platdata = &dtv_gpio0_at_ff210000,
.platdata_size = sizeof(dtv_gpio0_at_ff210000),
.parent_idx = 4,
};
/* Node /mmc@ff500000 index 3 */
/* Node /mmc@ff500000 index 2 */
static struct dtd_rockchip_rk3288_dw_mshc dtv_mmc_at_ff500000 = {
.bus_width = 0x4,
.cap_sd_highspeed = true,
@ -100,44 +85,14 @@ static struct dtd_rockchip_rk3288_dw_mshc dtv_mmc_at_ff500000 = {
.vmmc_supply = 0x4b,
.vqmmc_supply = 0x1e,
};
U_BOOT_DEVICE(mmc_at_ff500000) = {
U_BOOT_DRVINFO(mmc_at_ff500000) = {
.name = "rockchip_rk3288_dw_mshc",
.platdata = &dtv_mmc_at_ff500000,
.platdata_size = sizeof(dtv_mmc_at_ff500000),
.plat = &dtv_mmc_at_ff500000,
.plat_size = sizeof(dtv_mmc_at_ff500000),
.parent_idx = -1,
};
/* Node /pinctrl index 4 */
static struct dtd_rockchip_rk3328_pinctrl dtv_pinctrl = {
.ranges = true,
.rockchip_grf = 0x3a,
};
U_BOOT_DEVICE(pinctrl) = {
.name = "rockchip_rk3328_pinctrl",
.platdata = &dtv_pinctrl,
.platdata_size = sizeof(dtv_pinctrl),
.parent_idx = -1,
};
/* Node /sdmmc-regulator index 5 */
static struct dtd_regulator_fixed dtv_sdmmc_regulator = {
.gpio = {0x61, 0x1e, 0x1},
.pinctrl_0 = 0x67,
.pinctrl_names = "default",
.regulator_boot_on = true,
.regulator_max_microvolt = 0x325aa0,
.regulator_min_microvolt = 0x325aa0,
.regulator_name = "vcc_sd",
.vin_supply = 0x1c,
};
U_BOOT_DEVICE(sdmmc_regulator) = {
.name = "regulator_fixed",
.platdata = &dtv_sdmmc_regulator,
.platdata_size = sizeof(dtv_sdmmc_regulator),
.parent_idx = -1,
};
/* Node /serial@ff130000 index 6 */
/* Node /serial@ff130000 index 3 */
static struct dtd_ns16550_serial dtv_serial_at_ff130000 = {
.clock_frequency = 0x16e3600,
.clocks = {
@ -152,23 +107,21 @@ static struct dtd_ns16550_serial dtv_serial_at_ff130000 = {
.reg_io_width = 0x4,
.reg_shift = 0x2,
};
U_BOOT_DEVICE(serial_at_ff130000) = {
U_BOOT_DRVINFO(serial_at_ff130000) = {
.name = "ns16550_serial",
.platdata = &dtv_serial_at_ff130000,
.platdata_size = sizeof(dtv_serial_at_ff130000),
.plat = &dtv_serial_at_ff130000,
.plat_size = sizeof(dtv_serial_at_ff130000),
.parent_idx = -1,
};
/* Node /syscon@ff100000 index 7 */
/* Node /syscon@ff100000 index 4 */
static struct dtd_rockchip_rk3328_grf dtv_syscon_at_ff100000 = {
.reg = {0xff100000, 0x1000},
};
U_BOOT_DEVICE(syscon_at_ff100000) = {
U_BOOT_DRVINFO(syscon_at_ff100000) = {
.name = "rockchip_rk3328_grf",
.platdata = &dtv_syscon_at_ff100000,
.platdata_size = sizeof(dtv_syscon_at_ff100000),
.plat = &dtv_syscon_at_ff100000,
.plat_size = sizeof(dtv_syscon_at_ff100000),
.parent_idx = -1,
};
void dm_populate_phandle_data(void) {
}

24
package/boot/uboot-rockchip/src/of-platdata/orangepi-r1-plus-rk3328/dt-structs-gen.h
View File

@ -1,7 +1,8 @@
/*
* DO NOT MODIFY
*
* This file was generated by dtoc from a .dtb (device tree binary) file.
* Defines the structs used to hold devicetree data.
* This was generated by dtoc from a .dtb (device tree binary) file.
*/
#include <stdbool.h>
@ -18,23 +19,6 @@ struct dtd_ns16550_serial {
fdt32_t reg_io_width;
fdt32_t reg_shift;
};
struct dtd_regulator_fixed {
fdt32_t gpio[3];
fdt32_t pinctrl_0;
const char * pinctrl_names;
bool regulator_boot_on;
fdt32_t regulator_max_microvolt;
fdt32_t regulator_min_microvolt;
const char * regulator_name;
fdt32_t vin_supply;
};
struct dtd_rockchip_gpio_bank {
struct phandle_1_arg clocks[1];
bool gpio_controller;
bool interrupt_controller;
fdt32_t interrupts[3];
fdt64_t reg[2];
};
struct dtd_rockchip_rk3288_dw_mshc {
fdt32_t bus_width;
bool cap_sd_highspeed;
@ -65,7 +49,3 @@ struct dtd_rockchip_rk3328_dmc {
struct dtd_rockchip_rk3328_grf {
fdt64_t reg[2];
};
struct dtd_rockchip_rk3328_pinctrl {
bool ranges;
fdt32_t rockchip_grf;
};