diff --git a/include/autotools.mk b/include/autotools.mk index e9a7a82248..f659bac3c5 100644 --- a/include/autotools.mk +++ b/include/autotools.mk @@ -113,7 +113,7 @@ ifneq ($(filter patch-libtool,$(PKG_FIXUP)),) endif ifneq ($(filter libtool,$(PKG_FIXUP)),) - PKG_BUILD_DEPENDS += libtool libiconv + PKG_BUILD_DEPENDS += libtool ifeq ($(filter no-autoreconf,$(PKG_FIXUP)),) Hooks/Configure/Pre += autoreconf_target endif @@ -124,7 +124,7 @@ ifneq ($(filter libtool-abiver,$(PKG_FIXUP)),) endif ifneq ($(filter libtool-ucxx,$(PKG_FIXUP)),) - PKG_BUILD_DEPENDS += libtool libiconv + PKG_BUILD_DEPENDS += libtool ifeq ($(filter no-autoreconf,$(PKG_FIXUP)),) Hooks/Configure/Pre += autoreconf_target endif diff --git a/include/nls.mk b/include/nls.mk index 163e480932..90fc27660f 100644 --- a/include/nls.mk +++ b/include/nls.mk @@ -10,27 +10,37 @@ ifeq ($(CONFIG_BUILD_NLS),y) INTL_PREFIX:=$(STAGING_DIR)/usr/lib/libintl-full INTL_FULL:=1 -# iconv stub else - ICONV_PREFIX:=$(STAGING_DIR)/usr/lib/libiconv-stub + ICONV_PREFIX:= ICONV_FULL:= - INTL_PREFIX:=$(STAGING_DIR)/usr/lib/libintl-stub + INTL_PREFIX:= INTL_FULL:= endif PKG_CONFIG_DEPENDS += CONFIG_BUILD_NLS -PKG_BUILD_DEPENDS += !BUILD_NLS:libiconv ICONV_DEPENDS:=+BUILD_NLS:libiconv-full -ICONV_CFLAGS:=-I$(ICONV_PREFIX)/include -ICONV_CPPFLAGS:=-I$(ICONV_PREFIX)/include -ICONV_LDFLAGS:=-L$(ICONV_PREFIX)/lib -Wl,-rpath-link=$(ICONV_PREFIX)/lib +ifeq ($(CONFIG_BUILD_NLS),y) + ICONV_CFLAGS:=-I$(ICONV_PREFIX)/include + ICONV_CPPFLAGS:=-I$(ICONV_PREFIX)/include + ICONV_LDFLAGS:=-L$(ICONV_PREFIX)/lib -Wl,-rpath-link=$(ICONV_PREFIX)/lib +else + ICONV_CFLAGS:= + ICONV_CPPFLAGS:= + ICONV_LDFLAGS:= +endif INTL_DEPENDS:=+BUILD_NLS:libintl-full -INTL_CFLAGS:=-I$(INTL_PREFIX)/include -INTL_CPPFLAGS:=-I$(INTL_PREFIX)/include -INTL_LDFLAGS:=-L$(INTL_PREFIX)/lib -Wl,-rpath-link=$(INTL_PREFIX)/lib +ifeq ($(CONFIG_BUILD_NLS),y) + INTL_CFLAGS:=-I$(INTL_PREFIX)/include + INTL_CPPFLAGS:=-I$(INTL_PREFIX)/include + INTL_LDFLAGS:=-L$(INTL_PREFIX)/lib -Wl,-rpath-link=$(INTL_PREFIX)/lib +else + INTL_CFLAGS:= + INTL_CPPFLAGS:= + INTL_LDFLAGS:= +endif TARGET_CFLAGS += $(ICONV_CFLAGS) $(INTL_CFLAGS) TARGET_CPPFLAGS += $(ICONV_CPPFLAGS) $(INTL_CPPFLAGS) diff --git a/package/boot/uboot-at91/Makefile b/package/boot/uboot-at91/Makefile index 394cd7a42a..d75e3ba3af 100644 --- a/package/boot/uboot-at91/Makefile +++ b/package/boot/uboot-at91/Makefile @@ -175,7 +175,8 @@ define Build/Compile +$(MAKE) $(PKG_JOBS) -C $(PKG_BUILD_DIR) \ CROSS_COMPILE=$(TARGET_CROSS) \ KCFLAGS="$(filter-out -fstack-protector \ - -mfloat-abi=hard, $(TARGET_CFLAGS)) -mfloat-abi=soft" + -mfloat-abi=hard, $(TARGET_CFLAGS)) -mfloat-abi=soft" \ + $(UBOOT_MAKE_FLAGS) endef $(eval $(call BuildPackage/U-Boot)) diff --git a/package/boot/uboot-imx/Makefile b/package/boot/uboot-imx/Makefile index c23e48732b..ade26db768 100644 --- a/package/boot/uboot-imx/Makefile +++ b/package/boot/uboot-imx/Makefile @@ -39,7 +39,7 @@ endef define U-Boot/pico-pi-imx7d NAME:=TechNexion PICO-PI-IMX7D UBOOT_IMAGE:=SPL u-boot-dtb.img - UBOOT_MAKE_FLAGS:=SPL u-boot-dtb.img + UBOOT_MAKE_FLAGS+=SPL u-boot-dtb.img BUILD_SUBTARGET:=cortexa7 BUILD_DEVICES:=technexion_imx7d-pico-pi endef diff --git a/package/boot/uboot-mediatek/Makefile b/package/boot/uboot-mediatek/Makefile index defae03028..a994b8be4d 100644 --- a/package/boot/uboot-mediatek/Makefile +++ b/package/boot/uboot-mediatek/Makefile @@ -1,19 +1,67 @@ include $(TOPDIR)/rules.mk include $(INCLUDE_DIR)/kernel.mk -PKG_VERSION:=2022.01 -PKG_HASH:=81b4543227db228c03f8a1bf5ddbc813b0bb8f6555ce46064ef721a6fc680413 +PKG_VERSION:=2022.07 +PKG_HASH:=92b08eb49c24da14c1adbf70a71ae8f37cc53eeb4230e859ad8b6733d13dcf5e PKG_BUILD_DEPENDS:=arm-trusted-firmware-tools/host include $(INCLUDE_DIR)/u-boot.mk include $(INCLUDE_DIR)/package.mk include $(INCLUDE_DIR)/host-build.mk +MT7621_LOWLEVEL_PRELOADER_URL:=https://raw.githubusercontent.com/mtk-openwrt/mt7621-lowlevel-preloader/master/ + +define Download/mt7621-stage-sram + FILE:=mt7621_stage_sram.bin + URL:=$(MT7621_LOWLEVEL_PRELOADER_URL) + HASH:=1dda68aa089f0ff262e01539b990dea478952e9fb68bcc0a8cd6f76f0135c62e +endef + +ifdef CONFIG_TARGET_ramips_mt7621 +$(eval $(call Download,mt7621-stage-sram)) +endif + define U-Boot/Default BUILD_TARGET:=mediatek UBOOT_IMAGE:=u-boot-mtk.bin endef +define U-Boot/mt7620_rfb + NAME:=MT7620 Reference Board + UBOOT_CONFIG:=mt7620_rfb + BUILD_DEVICES:=ralink_mt7620a-evb + BUILD_TARGET:=ramips + BUILD_SUBTARGET:=mt7620 + UBOOT_IMAGE:=u-boot-with-spl.bin +endef + +define U-Boot/mt7620_mt7530_rfb + NAME:=MT7620+MT7530 Reference Board + UBOOT_CONFIG:=mt7620_mt7530_rfb + BUILD_DEVICES:=ralink_mt7620a-mt7530-evb + BUILD_TARGET:=ramips + BUILD_SUBTARGET:=mt7620 + UBOOT_IMAGE:=u-boot-with-spl.bin +endef + +define U-Boot/mt7621_rfb + NAME:=MT7621 Reference Board + UBOOT_CONFIG:=mt7621_rfb + BUILD_DEVICES:=mediatek_mt7621-eval-board + BUILD_TARGET:=ramips + BUILD_SUBTARGET:=mt7621 + UBOOT_IMAGE:=u-boot-mt7621.bin +endef + +define U-Boot/mt7621_nand_rfb + NAME:=MT7621 Reference Board (NAND) + UBOOT_CONFIG:=mt7621_nand_rfb + BUILD_DEVICES:=mediatek_mt7621-eval-board + BUILD_TARGET:=ramips + BUILD_SUBTARGET:=mt7621 + UBOOT_IMAGE:=u-boot-mt7621.bin +endef + define U-Boot/mt7622_rfb1 NAME:=MT7622 Reference Board 1 UBOOT_CONFIG:=mt7622_rfb @@ -91,6 +139,24 @@ define U-Boot/mt7623n_bpir2 UBOOT_CONFIG:=mt7623n_bpir2 endef +define U-Boot/mt7628_rfb + NAME:=MT7628 Reference Board + BUILD_DEVICES:=mediatek_mt7628an-eval-board + BUILD_TARGET:=ramips + BUILD_SUBTARGET:=mt76x8 + UBOOT_CONFIG:=mt7628_rfb + UBOOT_IMAGE:=u-boot-with-spl.bin +endef + +define U-Boot/ravpower_rp-wd009 + NAME:=RAVPower RP-WD009 + BUILD_TARGET:=ramips + BUILD_DEVICES:=ravpower_rp-wd009 + BUILD_SUBTARGET:=mt76x8 + UBOOT_CONFIG:=ravpower-rp-wd009-ram + UBOOT_IMAGE:=u-boot.bin +endef + define U-Boot/mt7629_rfb NAME:=MT7629 Reference Board BUILD_SUBTARGET:=mt7629 @@ -99,6 +165,10 @@ define U-Boot/mt7629_rfb endef UBOOT_TARGETS := \ + mt7620_mt7530_rfb \ + mt7620_rfb \ + mt7621_nand_rfb \ + mt7621_rfb \ mt7622_bananapi_bpi-r64-emmc \ mt7622_bananapi_bpi-r64-sdmmc \ mt7622_bananapi_bpi-r64-snand \ @@ -107,9 +177,13 @@ UBOOT_TARGETS := \ mt7622_ubnt_unifi-6-lr \ mt7623n_bpir2 \ mt7623a_unielec_u7623 \ + mt7628_rfb \ + ravpower_rp-wd009 \ mt7629_rfb +ifdef CONFIG_TARGET_mediatek UBOOT_MAKE_FLAGS += $(UBOOT_IMAGE:.fip=.bin) +endif define Build/fip-image $(STAGING_DIR_HOST)/bin/fiptool create \ @@ -118,6 +192,13 @@ define Build/fip-image $(PKG_BUILD_DIR)/u-boot.fip endef +ifdef CONFIG_TARGET_ramips_mt7621 +define Build/Prepare + $(call Build/Prepare/Default) + $(CP) $(DL_DIR)/mt7621_stage_sram.bin $(PKG_BUILD_DIR)/ +endef +endif + define Build/Configure $(call Build/Configure/U-Boot) sed -i 's/CONFIG_TOOLS_LIBCRYPTO=y/# CONFIG_TOOLS_LIBCRYPTO is not set/' $(PKG_BUILD_DIR)/.config @@ -131,8 +212,10 @@ endif endef # don't stage files to bindir, let target/linux/mediatek/image/*.mk do that +ifdef CONFIG_TARGET_mediatek define Package/u-boot/install endef +endif define Build/InstallDev $(INSTALL_DIR) $(STAGING_DIR_IMAGE) diff --git a/package/boot/uboot-mediatek/patches/000-mtk-01-Revert-clk-Add-debugging-for-return-values.patch b/package/boot/uboot-mediatek/patches/000-mtk-01-Revert-clk-Add-debugging-for-return-values.patch index 1a0c1ce5b4..3b68c52713 100644 --- a/package/boot/uboot-mediatek/patches/000-mtk-01-Revert-clk-Add-debugging-for-return-values.patch +++ b/package/boot/uboot-mediatek/patches/000-mtk-01-Revert-clk-Add-debugging-for-return-values.patch @@ -46,7 +46,7 @@ This reverts commit 5c5992cb90cf9ca4d51e38d9a95a13c293904df5. } -@@ -501,7 +500,6 @@ int clk_free(struct clk *clk) +@@ -469,7 +468,6 @@ void clk_free(struct clk *clk) ulong clk_get_rate(struct clk *clk) { const struct clk_ops *ops; @@ -54,7 +54,7 @@ This reverts commit 5c5992cb90cf9ca4d51e38d9a95a13c293904df5. debug("%s(clk=%p)\n", __func__, clk); if (!clk_valid(clk)) -@@ -511,11 +509,7 @@ ulong clk_get_rate(struct clk *clk) +@@ -479,11 +477,7 @@ ulong clk_get_rate(struct clk *clk) if (!ops->get_rate) return -ENOSYS; diff --git a/package/boot/uboot-mediatek/patches/000-mtk-14-drivers-mtd-add-support-for-MediaTek-SPI-NAND-flash-.patch b/package/boot/uboot-mediatek/patches/000-mtk-14-drivers-mtd-add-support-for-MediaTek-SPI-NAND-flash-.patch index dead0db174..1caa7ffd24 100644 --- a/package/boot/uboot-mediatek/patches/000-mtk-14-drivers-mtd-add-support-for-MediaTek-SPI-NAND-flash-.patch +++ b/package/boot/uboot-mediatek/patches/000-mtk-14-drivers-mtd-add-support-for-MediaTek-SPI-NAND-flash-.patch @@ -38,9 +38,9 @@ Signed-off-by: Weijie Gao --- a/drivers/mtd/Kconfig +++ b/drivers/mtd/Kconfig -@@ -116,6 +116,8 @@ config STM32_FLASH - This is the driver of embedded flash for some STMicroelectronics - STM32 MCU. +@@ -158,6 +158,8 @@ config SYS_MAX_FLASH_BANKS_DETECT + to reduce the effective number of flash bank, between 0 and + CONFIG_SYS_MAX_FLASH_BANKS +source "drivers/mtd/mtk-snand/Kconfig" + diff --git a/package/boot/uboot-mediatek/patches/000-mtk-16-env-add-support-for-generic-MTD-device.patch b/package/boot/uboot-mediatek/patches/000-mtk-16-env-add-support-for-generic-MTD-device.patch index d4f3460614..f2e91671fb 100644 --- a/package/boot/uboot-mediatek/patches/000-mtk-16-env-add-support-for-generic-MTD-device.patch +++ b/package/boot/uboot-mediatek/patches/000-mtk-16-env-add-support-for-generic-MTD-device.patch @@ -38,7 +38,7 @@ Signed-off-by: Weijie Gao --- a/env/Kconfig +++ b/env/Kconfig -@@ -19,7 +19,7 @@ config ENV_IS_NOWHERE +@@ -37,7 +37,7 @@ config ENV_IS_NOWHERE !ENV_IS_IN_MMC && !ENV_IS_IN_NAND && \ !ENV_IS_IN_NVRAM && !ENV_IS_IN_ONENAND && \ !ENV_IS_IN_REMOTE && !ENV_IS_IN_SPI_FLASH && \ @@ -47,7 +47,7 @@ Signed-off-by: Weijie Gao help Define this if you don't want to or can't have an environment stored on a storage medium. In this case the environment will still exist -@@ -208,6 +208,27 @@ config ENV_IS_IN_MMC +@@ -226,6 +226,27 @@ config ENV_IS_IN_MMC This value is also in units of bytes, but must also be aligned to an MMC sector boundary. @@ -75,7 +75,7 @@ Signed-off-by: Weijie Gao config ENV_IS_IN_NAND bool "Environment in a NAND device" depends on !CHAIN_OF_TRUST -@@ -535,10 +556,16 @@ config ENV_ADDR_REDUND +@@ -531,10 +552,16 @@ config ENV_ADDR_REDUND Offset from the start of the device (or partition) of the redundant environment location. @@ -92,8 +92,8 @@ Signed-off-by: Weijie Gao + ENV_IS_IN_SPI_FLASH || ENV_IS_IN_MTD default 0x3f8000 if ARCH_ROCKCHIP && ENV_IS_IN_MMC default 0x140000 if ARCH_ROCKCHIP && ENV_IS_IN_SPI_FLASH - default 0x88000 if ARCH_SUNXI -@@ -583,6 +610,12 @@ config ENV_SECT_SIZE + default 0xF0000 if ARCH_SUNXI +@@ -581,6 +608,12 @@ config ENV_SECT_SIZE help Size of the sector containing the environment. diff --git a/package/boot/uboot-mediatek/patches/000-mtk-20-configs-mt7622-enable-environment-for-mt7622_rfb.patch b/package/boot/uboot-mediatek/patches/000-mtk-20-configs-mt7622-enable-environment-for-mt7622_rfb.patch index c66451dce9..cc5fb57324 100644 --- a/package/boot/uboot-mediatek/patches/000-mtk-20-configs-mt7622-enable-environment-for-mt7622_rfb.patch +++ b/package/boot/uboot-mediatek/patches/000-mtk-20-configs-mt7622-enable-environment-for-mt7622_rfb.patch @@ -20,7 +20,7 @@ Signed-off-by: Weijie Gao +CONFIG_ENV_OFFSET=0x280000 CONFIG_DEBUG_UART_BASE=0x11002000 CONFIG_DEBUG_UART_CLOCK=25000000 - CONFIG_DEBUG_UART=y + CONFIG_SYS_LOAD_ADDR=0x4007ff28 @@ -22,6 +24,9 @@ CONFIG_CMD_SF_TEST=y CONFIG_CMD_PING=y CONFIG_CMD_SMC=y diff --git a/package/boot/uboot-mediatek/patches/001-mtk-0001-mips-add-asm-mipsmtregs.h-for-MIPS-multi-threading.patch b/package/boot/uboot-mediatek/patches/001-mtk-0001-mips-add-asm-mipsmtregs.h-for-MIPS-multi-threading.patch new file mode 100644 index 0000000000..dc6a6dd204 --- /dev/null +++ b/package/boot/uboot-mediatek/patches/001-mtk-0001-mips-add-asm-mipsmtregs.h-for-MIPS-multi-threading.patch @@ -0,0 +1,163 @@ +From 65a4a80157bacde3cf86ce8cbc9a08f5f05ad9bb Mon Sep 17 00:00:00 2001 +From: Weijie Gao +Date: Fri, 20 May 2022 11:21:34 +0800 +Subject: [PATCH 01/25] mips: add asm/mipsmtregs.h for MIPS multi-threading + +To be compatible with old u-boot used by lots of MT7621 devices, the u-boot +needs to boot-up MT7621's all cores, and all VPES of each core. + +This patch adds asm/mipsmtregs.h from linux kernel which is need for +boot-up VPEs. + +Reviewed-by: Daniel Schwierzeck +Signed-off-by: Weijie Gao +--- + arch/mips/include/asm/mipsmtregs.h | 142 +++++++++++++++++++++++++++++ + 1 file changed, 142 insertions(+) + create mode 100644 arch/mips/include/asm/mipsmtregs.h + +--- /dev/null ++++ b/arch/mips/include/asm/mipsmtregs.h +@@ -0,0 +1,142 @@ ++/* SPDX-License-Identifier: GPL-2.0 */ ++/* ++ * MT regs definitions, follows on from mipsregs.h ++ * Copyright (C) 2004 - 2005 MIPS Technologies, Inc. All rights reserved. ++ * Elizabeth Clarke et. al. ++ * ++ */ ++#ifndef _ASM_MIPSMTREGS_H ++#define _ASM_MIPSMTREGS_H ++ ++#include ++ ++/* ++ * Macros for use in assembly language code ++ */ ++ ++#define CP0_MVPCONTROL $0, 1 ++#define CP0_MVPCONF0 $0, 2 ++#define CP0_MVPCONF1 $0, 3 ++#define CP0_VPECONTROL $1, 1 ++#define CP0_VPECONF0 $1, 2 ++#define CP0_VPECONF1 $1, 3 ++#define CP0_YQMASK $1, 4 ++#define CP0_VPESCHEDULE $1, 5 ++#define CP0_VPESCHEFBK $1, 6 ++#define CP0_TCSTATUS $2, 1 ++#define CP0_TCBIND $2, 2 ++#define CP0_TCRESTART $2, 3 ++#define CP0_TCHALT $2, 4 ++#define CP0_TCCONTEXT $2, 5 ++#define CP0_TCSCHEDULE $2, 6 ++#define CP0_TCSCHEFBK $2, 7 ++#define CP0_SRSCONF0 $6, 1 ++#define CP0_SRSCONF1 $6, 2 ++#define CP0_SRSCONF2 $6, 3 ++#define CP0_SRSCONF3 $6, 4 ++#define CP0_SRSCONF4 $6, 5 ++ ++/* MVPControl fields */ ++#define MVPCONTROL_EVP (_ULCAST_(1)) ++ ++#define MVPCONTROL_VPC_SHIFT 1 ++#define MVPCONTROL_VPC (_ULCAST_(1) << MVPCONTROL_VPC_SHIFT) ++ ++#define MVPCONTROL_STLB_SHIFT 2 ++#define MVPCONTROL_STLB (_ULCAST_(1) << MVPCONTROL_STLB_SHIFT) ++ ++/* MVPConf0 fields */ ++#define MVPCONF0_PTC_SHIFT 0 ++#define MVPCONF0_PTC (_ULCAST_(0xff)) ++#define MVPCONF0_PVPE_SHIFT 10 ++#define MVPCONF0_PVPE (_ULCAST_(0xf) << MVPCONF0_PVPE_SHIFT) ++#define MVPCONF0_TCA_SHIFT 15 ++#define MVPCONF0_TCA (_ULCAST_(1) << MVPCONF0_TCA_SHIFT) ++#define MVPCONF0_PTLBE_SHIFT 16 ++#define MVPCONF0_PTLBE (_ULCAST_(0x3ff) << MVPCONF0_PTLBE_SHIFT) ++#define MVPCONF0_TLBS_SHIFT 29 ++#define MVPCONF0_TLBS (_ULCAST_(1) << MVPCONF0_TLBS_SHIFT) ++#define MVPCONF0_M_SHIFT 31 ++#define MVPCONF0_M (_ULCAST_(0x1) << MVPCONF0_M_SHIFT) ++ ++/* config3 fields */ ++#define CONFIG3_MT_SHIFT 2 ++#define CONFIG3_MT (_ULCAST_(1) << CONFIG3_MT_SHIFT) ++ ++/* VPEControl fields (per VPE) */ ++#define VPECONTROL_TARGTC (_ULCAST_(0xff)) ++ ++#define VPECONTROL_TE_SHIFT 15 ++#define VPECONTROL_TE (_ULCAST_(1) << VPECONTROL_TE_SHIFT) ++#define VPECONTROL_EXCPT_SHIFT 16 ++#define VPECONTROL_EXCPT (_ULCAST_(0x7) << VPECONTROL_EXCPT_SHIFT) ++ ++/* Thread Exception Codes for EXCPT field */ ++#define THREX_TU 0 ++#define THREX_TO 1 ++#define THREX_IYQ 2 ++#define THREX_GSX 3 ++#define THREX_YSCH 4 ++#define THREX_GSSCH 5 ++ ++#define VPECONTROL_GSI_SHIFT 20 ++#define VPECONTROL_GSI (_ULCAST_(1) << VPECONTROL_GSI_SHIFT) ++#define VPECONTROL_YSI_SHIFT 21 ++#define VPECONTROL_YSI (_ULCAST_(1) << VPECONTROL_YSI_SHIFT) ++ ++/* VPEConf0 fields (per VPE) */ ++#define VPECONF0_VPA_SHIFT 0 ++#define VPECONF0_VPA (_ULCAST_(1) << VPECONF0_VPA_SHIFT) ++#define VPECONF0_MVP_SHIFT 1 ++#define VPECONF0_MVP (_ULCAST_(1) << VPECONF0_MVP_SHIFT) ++#define VPECONF0_XTC_SHIFT 21 ++#define VPECONF0_XTC (_ULCAST_(0xff) << VPECONF0_XTC_SHIFT) ++ ++/* VPEConf1 fields (per VPE) */ ++#define VPECONF1_NCP1_SHIFT 0 ++#define VPECONF1_NCP1 (_ULCAST_(0xff) << VPECONF1_NCP1_SHIFT) ++#define VPECONF1_NCP2_SHIFT 10 ++#define VPECONF1_NCP2 (_ULCAST_(0xff) << VPECONF1_NCP2_SHIFT) ++#define VPECONF1_NCX_SHIFT 20 ++#define VPECONF1_NCX (_ULCAST_(0xff) << VPECONF1_NCX_SHIFT) ++ ++/* TCStatus fields (per TC) */ ++#define TCSTATUS_TASID (_ULCAST_(0xff)) ++#define TCSTATUS_IXMT_SHIFT 10 ++#define TCSTATUS_IXMT (_ULCAST_(1) << TCSTATUS_IXMT_SHIFT) ++#define TCSTATUS_TKSU_SHIFT 11 ++#define TCSTATUS_TKSU (_ULCAST_(3) << TCSTATUS_TKSU_SHIFT) ++#define TCSTATUS_A_SHIFT 13 ++#define TCSTATUS_A (_ULCAST_(1) << TCSTATUS_A_SHIFT) ++#define TCSTATUS_DA_SHIFT 15 ++#define TCSTATUS_DA (_ULCAST_(1) << TCSTATUS_DA_SHIFT) ++#define TCSTATUS_DT_SHIFT 20 ++#define TCSTATUS_DT (_ULCAST_(1) << TCSTATUS_DT_SHIFT) ++#define TCSTATUS_TDS_SHIFT 21 ++#define TCSTATUS_TDS (_ULCAST_(1) << TCSTATUS_TDS_SHIFT) ++#define TCSTATUS_TSST_SHIFT 22 ++#define TCSTATUS_TSST (_ULCAST_(1) << TCSTATUS_TSST_SHIFT) ++#define TCSTATUS_RNST_SHIFT 23 ++#define TCSTATUS_RNST (_ULCAST_(3) << TCSTATUS_RNST_SHIFT) ++/* Codes for RNST */ ++#define TC_RUNNING 0 ++#define TC_WAITING 1 ++#define TC_YIELDING 2 ++#define TC_GATED 3 ++ ++#define TCSTATUS_TMX_SHIFT 27 ++#define TCSTATUS_TMX (_ULCAST_(1) << TCSTATUS_TMX_SHIFT) ++/* TCStatus TCU bits can use same definitions/offsets as CU bits in Status */ ++ ++/* TCBind */ ++#define TCBIND_CURVPE_SHIFT 0 ++#define TCBIND_CURVPE (_ULCAST_(0xf)) ++ ++#define TCBIND_CURTC_SHIFT 21 ++ ++#define TCBIND_CURTC (_ULCAST_(0xff) << TCBIND_CURTC_SHIFT) ++ ++/* TCHalt */ ++#define TCHALT_H (_ULCAST_(1)) ++ ++#endif diff --git a/package/boot/uboot-mediatek/patches/001-mtk-0002-mips-add-more-definitions-for-asm-cm.h.patch b/package/boot/uboot-mediatek/patches/001-mtk-0002-mips-add-more-definitions-for-asm-cm.h.patch new file mode 100644 index 0000000000..5f52fccfe0 --- /dev/null +++ b/package/boot/uboot-mediatek/patches/001-mtk-0002-mips-add-more-definitions-for-asm-cm.h.patch @@ -0,0 +1,111 @@ +From be570e7b0ce004127a7cc97bfae30037fc42a340 Mon Sep 17 00:00:00 2001 +From: Weijie Gao +Date: Fri, 20 May 2022 11:21:39 +0800 +Subject: [PATCH 02/25] mips: add more definitions for asm/cm.h + +This patch add more definitions needed for MT7621 initialization. +MT7621 needs to initialize GIC/CPC and other related parts. + +Reviewed-by: Daniel Schwierzeck +Signed-off-by: Weijie Gao +--- + arch/mips/include/asm/cm.h | 67 ++++++++++++++++++++++++++++++++++++++ + 1 file changed, 67 insertions(+) + +--- a/arch/mips/include/asm/cm.h ++++ b/arch/mips/include/asm/cm.h +@@ -8,9 +8,23 @@ + #define __MIPS_ASM_CM_H__ + + /* Global Control Register (GCR) offsets */ ++#define GCR_CONFIG 0x0000 + #define GCR_BASE 0x0008 + #define GCR_BASE_UPPER 0x000c ++#define GCR_CONTROL 0x0010 ++#define GCR_ACCESS 0x0020 + #define GCR_REV 0x0030 ++#define GCR_GIC_BASE 0x0080 ++#define GCR_CPC_BASE 0x0088 ++#define GCR_REG0_BASE 0x0090 ++#define GCR_REG0_MASK 0x0098 ++#define GCR_REG1_BASE 0x00a0 ++#define GCR_REG1_MASK 0x00a8 ++#define GCR_REG2_BASE 0x00b0 ++#define GCR_REG2_MASK 0x00b8 ++#define GCR_REG3_BASE 0x00c0 ++#define GCR_REG3_MASK 0x00c8 ++#define GCR_CPC_STATUS 0x00f0 + #define GCR_L2_CONFIG 0x0130 + #define GCR_L2_TAG_ADDR 0x0600 + #define GCR_L2_TAG_ADDR_UPPER 0x0604 +@@ -19,10 +33,59 @@ + #define GCR_L2_DATA 0x0610 + #define GCR_L2_DATA_UPPER 0x0614 + #define GCR_Cx_COHERENCE 0x2008 ++#define GCR_Cx_OTHER 0x2018 ++#define GCR_Cx_ID 0x2028 ++#define GCR_CO_COHERENCE 0x4008 ++ ++/* GCR_CONFIG fields */ ++#define GCR_CONFIG_NUM_CLUSTERS_SHIFT 23 ++#define GCR_CONFIG_NUM_CLUSTERS (0x7f << 23) ++#define GCR_CONFIG_NUMIOCU_SHIFT 8 ++#define GCR_CONFIG_NUMIOCU (0xff << 8) ++#define GCR_CONFIG_PCORES_SHIFT 0 ++#define GCR_CONFIG_PCORES (0xff << 0) ++ ++/* GCR_BASE fields */ ++#define GCR_BASE_SHIFT 15 ++#define CCA_DEFAULT_OVR_SHIFT 5 ++#define CCA_DEFAULT_OVR_MASK (0x7 << 5) ++#define CCA_DEFAULT_OVREN (0x1 << 4) ++#define CM_DEFAULT_TARGET_SHIFT 0 ++#define CM_DEFAULT_TARGET_MASK (0x3 << 0) ++ ++/* GCR_CONTROL fields */ ++#define GCR_CONTROL_SYNCCTL (0x1 << 16) + + /* GCR_REV CM versions */ + #define GCR_REV_CM3 0x0800 + ++/* GCR_GIC_BASE fields */ ++#define GCR_GIC_BASE_ADDRMASK_SHIFT 7 ++#define GCR_GIC_BASE_ADDRMASK (0x1ffffff << 7) ++#define GCR_GIC_EN (0x1 << 0) ++ ++/* GCR_CPC_BASE fields */ ++#define GCR_CPC_BASE_ADDRMASK_SHIFT 15 ++#define GCR_CPC_BASE_ADDRMASK (0x1ffff << 15) ++#define GCR_CPC_EN (0x1 << 0) ++ ++/* GCR_REGn_MASK fields */ ++#define GCR_REGn_MASK_ADDRMASK_SHIFT 16 ++#define GCR_REGn_MASK_ADDRMASK (0xffff << 16) ++#define GCR_REGn_MASK_CCAOVR_SHIFT 5 ++#define GCR_REGn_MASK_CCAOVR (0x7 << 5) ++#define GCR_REGn_MASK_CCAOVREN (1 << 4) ++#define GCR_REGn_MASK_DROPL2 (1 << 2) ++#define GCR_REGn_MASK_CMTGT_SHIFT 0 ++#define GCR_REGn_MASK_CMTGT (0x3 << 0) ++#define GCR_REGn_MASK_CMTGT_DISABLED 0x0 ++#define GCR_REGn_MASK_CMTGT_MEM 0x1 ++#define GCR_REGn_MASK_CMTGT_IOCU0 0x2 ++#define GCR_REGn_MASK_CMTGT_IOCU1 0x3 ++ ++/* GCR_CPC_STATUS fields */ ++#define GCR_CPC_EX (0x1 << 0) ++ + /* GCR_L2_CONFIG fields */ + #define GCR_L2_CONFIG_ASSOC_SHIFT 0 + #define GCR_L2_CONFIG_ASSOC_BITS 8 +@@ -36,6 +99,10 @@ + #define GCR_Cx_COHERENCE_DOM_EN (0xff << 0) + #define GCR_Cx_COHERENCE_EN (0x1 << 0) + ++/* GCR_Cx_OTHER fields */ ++#define GCR_Cx_OTHER_CORENUM_SHIFT 16 ++#define GCR_Cx_OTHER_CORENUM (0xffff << 16) ++ + #ifndef __ASSEMBLY__ + + #include diff --git a/package/boot/uboot-mediatek/patches/001-mtk-0003-mips-add-__image_copy_len-for-SPL-linker-script.patch b/package/boot/uboot-mediatek/patches/001-mtk-0003-mips-add-__image_copy_len-for-SPL-linker-script.patch new file mode 100644 index 0000000000..8a74d6728b --- /dev/null +++ b/package/boot/uboot-mediatek/patches/001-mtk-0003-mips-add-__image_copy_len-for-SPL-linker-script.patch @@ -0,0 +1,35 @@ +From 71ebc3d25147172e219ea87bec061f751257395b Mon Sep 17 00:00:00 2001 +From: Weijie Gao +Date: Fri, 20 May 2022 11:21:45 +0800 +Subject: [PATCH 03/25] mips: add __image_copy_len for SPL linker script + +This patch adds __image_copy_len needed by TPL of MT7621 SoC. +The __image_copy_len represents the binary blob size of both SPL/TPL +binaries. To achieve this, __text_start/end are added for calculation. + +Reviewed-by: Daniel Schwierzeck +Signed-off-by: Weijie Gao +--- + arch/mips/cpu/u-boot-spl.lds | 3 +++ + 1 file changed, 3 insertions(+) + +--- a/arch/mips/cpu/u-boot-spl.lds ++++ b/arch/mips/cpu/u-boot-spl.lds +@@ -13,7 +13,9 @@ SECTIONS + + . = ALIGN(4); + .text : { ++ __text_start = .; + *(.text*) ++ __text_end = .; + } > .spl_mem + + . = ALIGN(4); +@@ -36,6 +38,7 @@ SECTIONS + + . = ALIGN(4); + __image_copy_end = .; ++ __image_copy_len = __image_copy_end - __text_start; + + _image_binary_end = .; + diff --git a/package/boot/uboot-mediatek/patches/001-mtk-0004-mips-add-support-for-noncached_alloc.patch b/package/boot/uboot-mediatek/patches/001-mtk-0004-mips-add-support-for-noncached_alloc.patch new file mode 100644 index 0000000000..9af8e79e63 --- /dev/null +++ b/package/boot/uboot-mediatek/patches/001-mtk-0004-mips-add-support-for-noncached_alloc.patch @@ -0,0 +1,104 @@ +From d7cfa1cb5602a1d936df36ee70869753835de28e Mon Sep 17 00:00:00 2001 +From: Weijie Gao +Date: Fri, 20 May 2022 11:21:51 +0800 +Subject: [PATCH 04/25] mips: add support for noncached_alloc() + +This patch adds support for noncached_alloc() which was only supported by +ARM platform. + +Unlike the ARM platform, MMU is not used in u-boot for MIPS. Instead, KSEG +is provided to access uncached memory. So most code of this patch is copied +from cache.c of ARM platform, with only two differences: +1. MMU is untouched in noncached_set_region() +2. Address returned by noncached_alloc() is converted using KSEG1ADDR() + +Reviewed-by: Daniel Schwierzeck +Signed-off-by: Weijie Gao +--- + arch/mips/include/asm/system.h | 20 ++++++++++++++++ + arch/mips/lib/cache.c | 43 ++++++++++++++++++++++++++++++++++ + 2 files changed, 63 insertions(+) + +--- a/arch/mips/include/asm/system.h ++++ b/arch/mips/include/asm/system.h +@@ -282,4 +282,24 @@ static inline void instruction_hazard_ba + : "=&r"(tmp)); + } + ++#ifdef CONFIG_SYS_NONCACHED_MEMORY ++/* 1MB granularity */ ++#define MMU_SECTION_SHIFT 20 ++#define MMU_SECTION_SIZE (1 << MMU_SECTION_SHIFT) ++ ++/** ++ * noncached_init() - Initialize non-cached memory region ++ * ++ * Initialize non-cached memory area. This memory region will be typically ++ * located right below the malloc() area and be accessed from KSEG1. ++ * ++ * It is called during the generic post-relocation init sequence. ++ * ++ * Return: 0 if OK ++ */ ++int noncached_init(void); ++ ++phys_addr_t noncached_alloc(size_t size, size_t align); ++#endif /* CONFIG_SYS_NONCACHED_MEMORY */ ++ + #endif /* _ASM_SYSTEM_H */ +--- a/arch/mips/lib/cache.c ++++ b/arch/mips/lib/cache.c +@@ -6,6 +6,7 @@ + + #include + #include ++#include + #include + #include + #include +@@ -197,3 +198,45 @@ void dcache_disable(void) + /* ensure the pipeline doesn't contain now-invalid instructions */ + instruction_hazard_barrier(); + } ++ ++#ifdef CONFIG_SYS_NONCACHED_MEMORY ++static unsigned long noncached_start; ++static unsigned long noncached_end; ++static unsigned long noncached_next; ++ ++void noncached_set_region(void) ++{ ++} ++ ++int noncached_init(void) ++{ ++ phys_addr_t start, end; ++ size_t size; ++ ++ /* If this calculation changes, update board_f.c:reserve_noncached() */ ++ end = ALIGN(mem_malloc_start, MMU_SECTION_SIZE) - MMU_SECTION_SIZE; ++ size = ALIGN(CONFIG_SYS_NONCACHED_MEMORY, MMU_SECTION_SIZE); ++ start = end - size; ++ ++ debug("mapping memory %pa-%pa non-cached\n", &start, &end); ++ ++ noncached_start = start; ++ noncached_end = end; ++ noncached_next = start; ++ ++ return 0; ++} ++ ++phys_addr_t noncached_alloc(size_t size, size_t align) ++{ ++ phys_addr_t next = ALIGN(noncached_next, align); ++ ++ if (next >= noncached_end || (noncached_end - next) < size) ++ return 0; ++ ++ debug("allocated %zu bytes of uncached memory @%pa\n", size, &next); ++ noncached_next = next + size; ++ ++ return CKSEG1ADDR(next); ++} ++#endif /* CONFIG_SYS_NONCACHED_MEMORY */ diff --git a/package/boot/uboot-mediatek/patches/001-mtk-0005-mips-mtmips-add-support-for-MediaTek-MT7621-SoC.patch b/package/boot/uboot-mediatek/patches/001-mtk-0005-mips-mtmips-add-support-for-MediaTek-MT7621-SoC.patch new file mode 100644 index 0000000000..e72de85f9b --- /dev/null +++ b/package/boot/uboot-mediatek/patches/001-mtk-0005-mips-mtmips-add-support-for-MediaTek-MT7621-SoC.patch @@ -0,0 +1,2904 @@ +From e0c82f36ad5180d9582d353407ff1bf34a2734bb Mon Sep 17 00:00:00 2001 +From: Weijie Gao +Date: Fri, 20 May 2022 11:22:21 +0800 +Subject: [PATCH 05/25] mips: mtmips: add support for MediaTek MT7621 SoC + +This patch adds support for MediaTek MT7621 SoC. +All files are dedicated for u-boot. + +The default build target is u-boot-mt7621.bin. + +The specification of this chip: +https://www.mediatek.com/products/homenetworking/mt7621 + +Reviewed-by: Daniel Schwierzeck +Signed-off-by: Weijie Gao +--- + arch/mips/dts/mt7621-u-boot.dtsi | 111 ++++++ + arch/mips/dts/mt7621.dtsi | 349 +++++++++++++++++++ + arch/mips/mach-mtmips/Kconfig | 49 ++- + arch/mips/mach-mtmips/Makefile | 4 + + arch/mips/mach-mtmips/cpu.c | 2 +- + arch/mips/mach-mtmips/mt7621/Kconfig | 95 +++++ + arch/mips/mach-mtmips/mt7621/Makefile | 14 + + arch/mips/mach-mtmips/mt7621/init.c | 246 +++++++++++++ + arch/mips/mach-mtmips/mt7621/mt7621.h | 229 ++++++++++++ + arch/mips/mach-mtmips/mt7621/serial.c | 23 ++ + arch/mips/mach-mtmips/mt7621/spl/Makefile | 9 + + arch/mips/mach-mtmips/mt7621/spl/cps.c | 153 ++++++++ + arch/mips/mach-mtmips/mt7621/spl/dram.c | 153 ++++++++ + arch/mips/mach-mtmips/mt7621/spl/dram.h | 39 +++ + arch/mips/mach-mtmips/mt7621/spl/launch.c | 100 ++++++ + arch/mips/mach-mtmips/mt7621/spl/launch.h | 52 +++ + arch/mips/mach-mtmips/mt7621/spl/launch_ll.S | 339 ++++++++++++++++++ + arch/mips/mach-mtmips/mt7621/spl/serial.c | 24 ++ + arch/mips/mach-mtmips/mt7621/spl/spl.c | 95 +++++ + arch/mips/mach-mtmips/mt7621/spl/start.S | 226 ++++++++++++ + arch/mips/mach-mtmips/mt7621/sram_init.S | 22 ++ + arch/mips/mach-mtmips/mt7621/tpl/Makefile | 4 + + arch/mips/mach-mtmips/mt7621/tpl/start.S | 161 +++++++++ + arch/mips/mach-mtmips/mt7621/tpl/tpl.c | 144 ++++++++ + include/configs/mt7621.h | 65 ++++ + 25 files changed, 2702 insertions(+), 6 deletions(-) + create mode 100644 arch/mips/dts/mt7621-u-boot.dtsi + create mode 100644 arch/mips/dts/mt7621.dtsi + create mode 100644 arch/mips/mach-mtmips/mt7621/Kconfig + create mode 100644 arch/mips/mach-mtmips/mt7621/Makefile + create mode 100644 arch/mips/mach-mtmips/mt7621/init.c + create mode 100644 arch/mips/mach-mtmips/mt7621/mt7621.h + create mode 100644 arch/mips/mach-mtmips/mt7621/serial.c + create mode 100644 arch/mips/mach-mtmips/mt7621/spl/Makefile + create mode 100644 arch/mips/mach-mtmips/mt7621/spl/cps.c + create mode 100644 arch/mips/mach-mtmips/mt7621/spl/dram.c + create mode 100644 arch/mips/mach-mtmips/mt7621/spl/dram.h + create mode 100644 arch/mips/mach-mtmips/mt7621/spl/launch.c + create mode 100644 arch/mips/mach-mtmips/mt7621/spl/launch.h + create mode 100644 arch/mips/mach-mtmips/mt7621/spl/launch_ll.S + create mode 100644 arch/mips/mach-mtmips/mt7621/spl/serial.c + create mode 100644 arch/mips/mach-mtmips/mt7621/spl/spl.c + create mode 100644 arch/mips/mach-mtmips/mt7621/spl/start.S + create mode 100644 arch/mips/mach-mtmips/mt7621/sram_init.S + create mode 100644 arch/mips/mach-mtmips/mt7621/tpl/Makefile + create mode 100644 arch/mips/mach-mtmips/mt7621/tpl/start.S + create mode 100644 arch/mips/mach-mtmips/mt7621/tpl/tpl.c + create mode 100644 include/configs/mt7621.h + +--- /dev/null ++++ b/arch/mips/dts/mt7621-u-boot.dtsi +@@ -0,0 +1,111 @@ ++// SPDX-License-Identifier: GPL-2.0 ++/* ++ * Copyright (C) 2022 MediaTek Inc. All rights reserved. ++ * ++ * Author: Weijie Gao ++ */ ++ ++#include ++ ++/ { ++ binman: binman { ++ multiple-images; ++ }; ++}; ++ ++&sysc { ++ u-boot,dm-pre-reloc; ++}; ++ ++&reboot { ++ u-boot,dm-pre-reloc; ++}; ++ ++&clkctrl { ++ u-boot,dm-pre-reloc; ++}; ++ ++&rstctrl { ++ u-boot,dm-pre-reloc; ++}; ++ ++&pinctrl { ++ u-boot,dm-pre-reloc; ++}; ++ ++&uart0 { ++ u-boot,dm-pre-reloc; ++}; ++ ++&uart1 { ++ u-boot,dm-pre-reloc; ++}; ++ ++&uart2 { ++ u-boot,dm-pre-reloc; ++}; ++ ++&binman { ++ u-boot-spl-ddr { ++ align = <4>; ++ align-size = <4>; ++ filename = "u-boot-spl-ddr.bin"; ++ pad-byte = <0xff>; ++ ++ u-boot-spl { ++ align-end = <4>; ++ filename = "u-boot-spl.bin"; ++ }; ++ ++ stage_bin { ++ filename = "mt7621_stage_sram.bin"; ++ type = "blob-ext"; ++ }; ++ }; ++ ++ spl-img { ++ filename = "u-boot-spl-ddr.img"; ++ ++ mkimage { ++#ifdef CONFIG_MT7621_BOOT_FROM_NAND ++ args = "-T", "mtk_image", "-n", "mt7621=1", ++ "-a", __stringify(CONFIG_SPL_TEXT_BASE), ++ "-e", __stringify(CONFIG_SPL_TEXT_BASE); ++#else ++ args = "-A", "mips", "-T", "standalone", "-O", "u-boot", ++ "-C", "none", "-n", "MT7621 U-Boot SPL", ++ "-a", __stringify(CONFIG_SPL_TEXT_BASE), ++ "-e", __stringify(CONFIG_SPL_TEXT_BASE); ++#endif ++ ++ blob { ++ filename = "u-boot-spl-ddr.bin"; ++ }; ++ }; ++ }; ++ ++ mt7621-uboot { ++ filename = "u-boot-mt7621.bin"; ++ pad-byte = <0xff>; ++ ++#ifndef CONFIG_MT7621_BOOT_FROM_NAND ++ u-boot-tpl { ++ align-end = <4>; ++ filename = "u-boot-tpl.bin"; ++ }; ++#endif ++ ++ spl { ++#ifdef CONFIG_MT7621_BOOT_FROM_NAND ++ align-end = <0x1000>; ++#endif ++ filename = "u-boot-spl-ddr.img"; ++ type = "blob"; ++ }; ++ ++ u-boot { ++ filename = "u-boot-lzma.img"; ++ type = "blob"; ++ }; ++ }; ++}; +--- /dev/null ++++ b/arch/mips/dts/mt7621.dtsi +@@ -0,0 +1,349 @@ ++// SPDX-License-Identifier: GPL-2.0 ++/* ++ * Copyright (C) 2022 MediaTek Inc. All rights reserved. ++ * ++ * Author: Weijie Gao ++ */ ++ ++#include ++#include ++#include ++ ++/ { ++ #address-cells = <1>; ++ #size-cells = <1>; ++ compatible = "mediatek,mt7621-soc"; ++ ++ cpus { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ cpu@0 { ++ device_type = "cpu"; ++ compatible = "mips,mips1004Kc"; ++ reg = <0>; ++ }; ++ ++ cpu@1 { ++ device_type = "cpu"; ++ compatible = "mips,mips1004Kc"; ++ reg = <1>; ++ }; ++ }; ++ ++ clk48m: clk48m { ++ compatible = "fixed-clock"; ++ ++ clock-frequency = <48000000>; ++ ++ #clock-cells = <0>; ++ }; ++ ++ clk50m: clk50m { ++ compatible = "fixed-clock"; ++ ++ clock-frequency = <50000000>; ++ ++ #clock-cells = <0>; ++ }; ++ ++ sysc: sysctrl@1e000000 { ++ compatible = "mediatek,mt7621-sysc", "syscon"; ++ reg = <0x1e000000 0x100>; ++ ++ clkctrl: clock-controller@1e000030 { ++ compatible = "mediatek,mt7621-clk"; ++ mediatek,memc = <&memc>; ++ ++ #clock-cells = <1>; ++ }; ++ }; ++ ++ rstctrl: reset-controller@1e000034 { ++ compatible = "mediatek,mtmips-reset"; ++ reg = <0x1e000034 0x4>; ++ #reset-cells = <1>; ++ }; ++ ++ reboot: resetctl-reboot { ++ compatible = "resetctl-reboot"; ++ ++ resets = <&rstctrl RST_SYS>; ++ reset-names = "sysreset"; ++ }; ++ ++ memc: memctrl@1e005000 { ++ compatible = "mediatek,mt7621-memc", "syscon"; ++ reg = <0x1e005000 0x1000>; ++ }; ++ ++ pinctrl: pinctrl@1e000060 { ++ compatible = "mediatek,mt7621-pinctrl"; ++ reg = <0x1e000048 0x30>; ++ ++ pinctrl-names = "default"; ++ pinctrl-0 = <&state_default>; ++ ++ state_default: pin_state { ++ }; ++ ++ uart1_pins: uart1_pins { ++ groups = "uart1"; ++ function = "uart"; ++ }; ++ ++ uart2_pins: uart2_pins { ++ groups = "uart2"; ++ function = "uart"; ++ }; ++ ++ uart3_pins: uart3_pins { ++ groups = "uart3"; ++ function = "uart"; ++ }; ++ ++ sdxc_pins: sdxc_pins { ++ groups = "sdxc"; ++ function = "sdxc"; ++ }; ++ ++ spi_pins: spi_pins { ++ groups = "spi"; ++ function = "spi"; ++ }; ++ ++ eth_pins: eth_pins { ++ mdio_pins { ++ groups = "mdio"; ++ function = "mdio"; ++ }; ++ ++ rgmii1_pins { ++ groups = "rgmii1"; ++ function = "rgmii"; ++ }; ++ ++ esw_pins { ++ groups = "esw int"; ++ function = "esw int"; ++ }; ++ ++ mdio_pconf { ++ groups = "mdio"; ++ drive-strength = <2>; ++ }; ++ }; ++ }; ++ ++ watchdog: watchdog@1e000100 { ++ compatible = "mediatek,mt7621-wdt"; ++ reg = <0x1e000100 0x40>; ++ ++ resets = <&rstctrl RST_TIMER>; ++ reset-names = "wdt"; ++ ++ status = "disabled"; ++ }; ++ ++ gpio: gpio@1e000600 { ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ compatible = "mtk,mt7621-gpio"; ++ reg = <0x1e000600 0x100>; ++ ++ resets = <&rstctrl RST_PIO>; ++ reset-names = "pio"; ++ ++ gpio0: bank@0 { ++ reg = <0>; ++ compatible = "mtk,mt7621-gpio-bank"; ++ gpio-controller; ++ #gpio-cells = <2>; ++ }; ++ ++ gpio1: bank@1 { ++ reg = <1>; ++ compatible = "mtk,mt7621-gpio-bank"; ++ gpio-controller; ++ #gpio-cells = <2>; ++ }; ++ ++ gpio2: bank@2 { ++ reg = <2>; ++ compatible = "mtk,mt7621-gpio-bank"; ++ gpio-controller; ++ #gpio-cells = <2>; ++ }; ++ }; ++ ++ spi: spi@1e000b00 { ++ compatible = "ralink,mt7621-spi"; ++ reg = <0x1e000b00 0x40>; ++ ++ status = "disabled"; ++ ++ pinctrl-names = "default"; ++ pinctrl-0 = <&spi_pins>; ++ ++ resets = <&rstctrl RST_SPI>; ++ reset-names = "spi"; ++ ++ clocks = <&clkctrl MT7621_CLK_SPI>; ++ ++ #address-cells = <1>; ++ #size-cells = <0>; ++ }; ++ ++ uart0: uart1@1e000c00 { ++ compatible = "mediatek,hsuart", "ns16550a"; ++ reg = <0x1e000c00 0x100>; ++ ++ pinctrl-names = "default"; ++ pinctrl-0 = <&uart1_pins>; ++ ++ clocks = <&clkctrl MT7621_CLK_UART1>; ++ ++ resets = <&rstctrl RST_UART1>; ++ ++ reg-shift = <2>; ++ }; ++ ++ uart1: uart2@1e000d00 { ++ compatible = "mediatek,hsuart", "ns16550a"; ++ reg = <0x1e000d00 0x100>; ++ ++ pinctrl-names = "default"; ++ pinctrl-0 = <&uart2_pins>; ++ ++ clocks = <&clkctrl MT7621_CLK_UART2>; ++ ++ resets = <&rstctrl RST_UART2>; ++ ++ reg-shift = <2>; ++ ++ status = "disabled"; ++ }; ++ ++ uart2: uart3@1e000e00 { ++ compatible = "mediatek,hsuart", "ns16550a"; ++ reg = <0x1e000e00 0x100>; ++ ++ pinctrl-names = "default"; ++ pinctrl-0 = <&uart3_pins>; ++ ++ clocks = <&clkctrl MT7621_CLK_UART3>; ++ ++ resets = <&rstctrl RST_UART3>; ++ ++ reg-shift = <2>; ++ ++ status = "disabled"; ++ }; ++ ++ eth: eth@1e100000 { ++ compatible = "mediatek,mt7621-eth"; ++ reg = <0x1e100000 0x20000>; ++ mediatek,ethsys = <&sysc>; ++ ++ pinctrl-names = "default"; ++ pinctrl-0 = <ð_pins>; ++ ++ resets = <&rstctrl RST_FE>, <&rstctrl RST_GMAC>, <&rstctrl RST_MCM>; ++ reset-names = "fe", "gmac", "mcm"; ++ ++ clocks = <&clkctrl MT7621_CLK_GDMA>, ++ <&clkctrl MT7621_CLK_ETH>; ++ clock-names = "gmac", "fe"; ++ ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ mediatek,gmac-id = <0>; ++ phy-mode = "rgmii"; ++ mediatek,switch = "mt7530"; ++ mediatek,mcm; ++ ++ fixed-link { ++ speed = <1000>; ++ full-duplex; ++ }; ++ }; ++ ++ mmc: mmc@1e130000 { ++ compatible = "mediatek,mt7621-mmc"; ++ reg = <0x1e130000 0x4000>; ++ ++ status = "disabled"; ++ ++ bus-width = <4>; ++ builtin-cd = <1>; ++ r_smpl = <1>; ++ ++ pinctrl-names = "default"; ++ pinctrl-0 = <&sdxc_pins>; ++ ++ clocks = <&clk50m>, <&clkctrl MT7621_CLK_SHXC>; ++ clock-names = "source", "hclk"; ++ ++ resets = <&rstctrl RST_SDXC>; ++ }; ++ ++ ssusb: usb@1e1c0000 { ++ compatible = "mediatek,mt7621-xhci", "mediatek,mtk-xhci"; ++ reg = <0x1e1c0000 0x1000>, <0x1e1d0700 0x100>; ++ reg-names = "mac", "ippc"; ++ ++ clocks = <&clk48m>, <&clk48m>; ++ clock-names = "sys_ck", "ref_ck"; ++ ++ phys = <&u2port0 PHY_TYPE_USB2>, ++ <&u3port0 PHY_TYPE_USB3>, ++ <&u2port1 PHY_TYPE_USB2>; ++ ++ status = "disabled"; ++ }; ++ ++ u3phy: usb-phy@1e1d0000 { ++ compatible = "mediatek,mt7621-u3phy", ++ "mediatek,generic-tphy-v1"; ++ reg = <0x1e1d0000 0x700>; ++ #address-cells = <1>; ++ #size-cells = <1>; ++ ranges; ++ status = "disabled"; ++ ++ u2port0: usb-phy@1e1d0800 { ++ reg = <0x1e1d0800 0x0100>; ++ #phy-cells = <1>; ++ clocks = <&clk48m>; ++ clock-names = "ref"; ++ }; ++ ++ u3port0: usb-phy@1e1d0900 { ++ reg = <0x1e1d0900 0x0100>; ++ #phy-cells = <1>; ++ }; ++ ++ u2port1: usb-phy@1e1d1000 { ++ reg = <0x1e1d1000 0x0100>; ++ #phy-cells = <1>; ++ clocks = <&clk48m>; ++ clock-names = "ref"; ++ }; ++ }; ++ ++ i2c: i2c@1e000900 { ++ compatible = "i2c-gpio"; ++ ++ status = "disabled"; ++ ++ i2c-gpio,delay-us = <3>; ++ ++ gpios = <&gpio0 3 1>, /* PIN3 as SDA */ ++ <&gpio0 4 1>; /* PIN4 as CLK */ ++ ++ #address-cells = <1>; ++ #size-cells = <0>; ++ }; ++}; +--- a/arch/mips/mach-mtmips/Kconfig ++++ b/arch/mips/mach-mtmips/Kconfig +@@ -9,6 +9,7 @@ config SYS_MALLOC_F_LEN + + config SYS_SOC + default "mt7620" if SOC_MT7620 ++ default "mt7621" if SOC_MT7621 + default "mt7628" if SOC_MT7628 + + config SYS_DCACHE_SIZE +@@ -18,25 +19,45 @@ config SYS_DCACHE_LINE_SIZE + default 32 + + config SYS_ICACHE_SIZE +- default 65536 ++ default 65536 if SOC_MT7620 || SOC_MT7628 ++ default 32768 if SOC_MT7621 + + config SYS_ICACHE_LINE_SIZE + default 32 + ++config SYS_SCACHE_LINE_SIZE ++ default 32 if SOC_MT7621 ++ + config SYS_TEXT_BASE +- default 0x9c000000 if !SPL +- default 0x80200000 if SPL ++ default 0x9c000000 if !SPL && !SOC_MT7621 ++ default 0x80200000 if SPL || SOC_MT7621 + + config SPL_TEXT_BASE +- default 0x9c000000 ++ default 0x9c000000 if !SOC_MT7621 ++ default 0x80100000 if SOC_MT7621 ++ ++config SPL_SIZE_LIMIT ++ default 0x30000 if SOC_MT7621 ++ ++config TPL_TEXT_BASE ++ default 0xbfc00000 if SOC_MT7621 ++ ++config TPL_MAX_SIZE ++ default 4096 if SOC_MT7621 + + config SPL_PAYLOAD + default "u-boot-lzma.img" if SPL_LZMA + + config BUILD_TARGET +- default "u-boot-with-spl.bin" if SPL ++ default "u-boot-with-spl.bin" if SPL && !SOC_MT7621 ++ default "u-boot-lzma.img" if SOC_MT7621 + default "u-boot.bin" + ++config MAX_MEM_SIZE ++ int ++ default 256 if SOC_MT7620 || SOC_MT7628 ++ default 512 if SOC_MT7621 ++ + choice + prompt "MediaTek MIPS SoC select" + +@@ -55,6 +76,23 @@ config SOC_MT7620 + help + This supports MediaTek MT7620. + ++config SOC_MT7621 ++ bool "MT7621" ++ select MIPS_CM ++ select MIPS_L2_CACHE ++ select SYS_CACHE_SHIFT_5 ++ select SYS_MIPS_CACHE_INIT_RAM_LOAD ++ select PINCTRL_MT7621 ++ select MTK_SERIAL ++ select REGMAP ++ select SYSCON ++ select BINMAN ++ select SUPPORT_TPL ++ select SPL_LOADER_SUPPORT if SPL ++ select SPL_INIT_STACK_WITHOUT_MALLOC_F if SPL ++ help ++ This supports MediaTek MT7621. ++ + config SOC_MT7628 + bool "MT7628" + select SYS_CACHE_SHIFT_5 +@@ -80,6 +118,7 @@ config SOC_MT7628 + endchoice + + source "arch/mips/mach-mtmips/mt7620/Kconfig" ++source "arch/mips/mach-mtmips/mt7621/Kconfig" + source "arch/mips/mach-mtmips/mt7628/Kconfig" + + endmenu +--- a/arch/mips/mach-mtmips/Makefile ++++ b/arch/mips/mach-mtmips/Makefile +@@ -1,9 +1,13 @@ + # SPDX-License-Identifier: GPL-2.0+ + + obj-y += cpu.o ++ ++ifneq ($(CONFIG_SOC_MT7621),y) + obj-y += ddr_init.o + obj-y += ddr_cal.o + obj-$(CONFIG_SPL_BUILD) += spl.o ++endif + + obj-$(CONFIG_SOC_MT7620) += mt7620/ ++obj-$(CONFIG_SOC_MT7621) += mt7621/ + obj-$(CONFIG_SOC_MT7628) += mt7628/ +--- a/arch/mips/mach-mtmips/cpu.c ++++ b/arch/mips/mach-mtmips/cpu.c +@@ -16,7 +16,7 @@ DECLARE_GLOBAL_DATA_PTR; + + int dram_init(void) + { +- gd->ram_size = get_ram_size((void *)KSEG1, SZ_256M); ++ gd->ram_size = get_ram_size((void *)KSEG1, CONFIG_MAX_MEM_SIZE << 20); + + return 0; + } +--- /dev/null ++++ b/arch/mips/mach-mtmips/mt7621/Kconfig +@@ -0,0 +1,95 @@ ++ ++if SOC_MT7621 ++ ++menu "CPU & DDR configuration" ++ ++config MT7621_CPU_FREQ ++ int "CPU Frequency (MHz)" ++ range 400 1200 ++ default 880 ++ ++choice ++ prompt "DRAM Frequency" ++ default MT7621_DRAM_FREQ_1200 ++ ++config MT7621_DRAM_FREQ_400 ++ bool "400MHz" ++ ++config MT7621_DRAM_FREQ_800 ++ bool "800MHz" ++ ++config MT7621_DRAM_FREQ_1066 ++ bool "1066MHz" ++ ++config MT7621_DRAM_FREQ_1200 ++ bool "1200MHz" ++ ++endchoice ++ ++choice ++ prompt "DDR2 timing parameters" ++ default MT7621_DRAM_DDR2_1024M ++ ++config MT7621_DRAM_DDR2_512M ++ bool "64MB" ++ ++config MT7621_DRAM_DDR2_1024M ++ bool "128MB" ++ ++config MT7621_DRAM_DDR2_512M_W9751G6KB_A02_1066MHZ ++ bool "W9751G6KB_A02 @ 1066MHz (64MB)" ++ ++config MT7621_DRAM_DDR2_1024M_W971GG6KB25_800MHZ ++ bool "W971GG6KB25 @ 800MHz (128MB)" ++ ++config MT7621_DRAM_DDR2_1024M_W971GG6KB18_1066MHZ ++ bool "W971GG6KB18 @ 1066MHz (128MB)" ++ ++endchoice ++ ++choice ++ prompt "DDR3 timing parameters" ++ default MT7621_DRAM_DDR3_2048M ++ ++config MT7621_DRAM_DDR3_1024M ++ bool "128MB" ++ ++config MT7621_DRAM_DDR3_1024M_KGD ++ bool "128MB KGD (MT7621DA)" ++ ++config MT7621_DRAM_DDR3_2048M ++ bool "256MB" ++ ++config MT7621_DRAM_DDR3_4096M ++ bool "512MB" ++ ++endchoice ++ ++endmenu ++ ++config DEBUG_UART_BOARD_INIT ++ default y ++ ++config MT7621_BOOT_FROM_NAND ++ bool "Boot from NAND" ++ help ++ Select this if u-boot will boot from NAND flash. When booting from ++ NAND, SPL will be loaded by bootrom directly and no TPL is needed. ++ ++choice ++ prompt "Board select" ++ ++endchoice ++ ++config SYS_CONFIG_NAME ++ string "Board configuration name" ++ default "mt7621" if BOARD_MT7621_RFB || BOARD_MT7621_NAND_RFB ++ ++config SYS_BOARD ++ string "Board name" ++ default "mt7621" if BOARD_MT7621_RFB || BOARD_MT7621_NAND_RFB ++ ++config SYS_VENDOR ++ default "mediatek" if BOARD_MT7621_RFB || BOARD_MT7621_NAND_RFB ++ ++endif +--- /dev/null ++++ b/arch/mips/mach-mtmips/mt7621/Makefile +@@ -0,0 +1,14 @@ ++# SPDX-License-Identifier: GPL-2.0 ++ ++obj-y += init.o ++obj-y += serial.o ++ ++ifeq ($(CONFIG_SPL_BUILD),y) ++ifeq ($(CONFIG_TPL_BUILD),y) ++obj-y += tpl/ ++else ++obj-y += spl/ ++endif ++ ++obj-y += sram_init.o ++endif +--- /dev/null ++++ b/arch/mips/mach-mtmips/mt7621/init.c +@@ -0,0 +1,246 @@ ++// SPDX-License-Identifier: GPL-2.0 ++/* ++ * Copyright (C) 2022 MediaTek Inc. All rights reserved. ++ * ++ * Author: Weijie Gao ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include "mt7621.h" ++ ++DECLARE_GLOBAL_DATA_PTR; ++ ++static const char *const boot_mode[(CHIP_MODE_M >> CHIP_MODE_S) + 1] = { ++ [1] = "NAND 2K+64", ++ [2] = "SPI-NOR 3-Byte Addr", ++ [3] = "SPI-NOR 4-Byte Addr", ++ [10] = "NAND 2K+128", ++ [11] = "NAND 4K+128", ++ [12] = "NAND 4K+256", ++}; ++ ++int print_cpuinfo(void) ++{ ++ void __iomem *sysc = ioremap_nocache(SYSCTL_BASE, SYSCTL_SIZE); ++ u32 val, ver, eco, pkg, core, dram, chipmode; ++ u32 cpu_clk, ddr_clk, bus_clk, xtal_clk; ++ struct udevice *clkdev; ++ const char *bootdev; ++ struct clk clk; ++ int ret; ++ ++ val = readl(sysc + SYSCTL_CHIP_REV_ID_REG); ++ ver = FIELD_GET(VER_ID_M, val); ++ eco = FIELD_GET(ECO_ID_M, val); ++ pkg = FIELD_GET(PKG_ID, val); ++ core = FIELD_GET(CPU_ID, val); ++ ++ val = readl(sysc + SYSCTL_SYSCFG0_REG); ++ dram = FIELD_GET(DRAM_TYPE, val); ++ chipmode = FIELD_GET(CHIP_MODE_M, val); ++ ++ bootdev = boot_mode[chipmode]; ++ if (!bootdev) ++ bootdev = "Unsupported boot mode"; ++ ++ printf("CPU: MediaTek MT7621%c ver %u, eco %u\n", ++ core ? (pkg ? 'A' : 'N') : 'S', ver, eco); ++ ++ printf("Boot: DDR%u, %s\n", dram ? 2 : 3, bootdev); ++ ++ ret = uclass_get_device_by_driver(UCLASS_CLK, DM_DRIVER_GET(mt7621_clk), ++ &clkdev); ++ if (ret) ++ return ret; ++ ++ clk.dev = clkdev; ++ ++ clk.id = MT7621_CLK_CPU; ++ cpu_clk = clk_get_rate(&clk); ++ ++ clk.id = MT7621_CLK_BUS; ++ bus_clk = clk_get_rate(&clk); ++ ++ clk.id = MT7621_CLK_DDR; ++ ddr_clk = clk_get_rate(&clk); ++ ++ clk.id = MT7621_CLK_XTAL; ++ xtal_clk = clk_get_rate(&clk); ++ ++ /* Set final timer frequency */ ++ if (cpu_clk) ++ gd->arch.timer_freq = cpu_clk / 2; ++ ++ printf("Clock: CPU: %uMHz, DDR: %uMT/s, Bus: %uMHz, XTAL: %uMHz\n", ++ cpu_clk / 1000000, ddr_clk / 500000, bus_clk / 1000000, ++ xtal_clk / 1000000); ++ ++ return 0; ++} ++ ++unsigned long get_xtal_mhz(void) ++{ ++ void __iomem *sysc = ioremap_nocache(SYSCTL_BASE, SYSCTL_SIZE); ++ u32 bs, xtal_sel; ++ ++ bs = readl(sysc + SYSCTL_SYSCFG0_REG); ++ xtal_sel = FIELD_GET(XTAL_MODE_SEL_M, bs); ++ ++ if (xtal_sel <= 2) ++ return 20; ++ else if (xtal_sel <= 5) ++ return 40; ++ else ++ return 25; ++} ++ ++static void xhci_config_40mhz(void __iomem *usbh) ++{ ++ writel(FIELD_PREP(SSUSB_MAC3_SYS_CK_GATE_MASK_TIME_M, 0x20) | ++ FIELD_PREP(SSUSB_MAC2_SYS_CK_GATE_MASK_TIME_M, 0x20) | ++ FIELD_PREP(SSUSB_MAC3_SYS_CK_GATE_MODE_M, 2) | ++ FIELD_PREP(SSUSB_MAC2_SYS_CK_GATE_MODE_M, 2) | 0x10, ++ usbh + SSUSB_MAC_CK_CTRL_REG); ++ ++ writel(FIELD_PREP(SSUSB_PLL_PREDIV_PE1D_M, 2) | ++ FIELD_PREP(SSUSB_PLL_PREDIV_U3_M, 1) | ++ FIELD_PREP(SSUSB_PLL_FBKDI_M, 4), ++ usbh + DA_SSUSB_U3PHYA_10_REG); ++ ++ writel(FIELD_PREP(SSUSB_PLL_FBKDIV_PE2H_M, 0x18) | ++ FIELD_PREP(SSUSB_PLL_FBKDIV_PE1D_M, 0x18) | ++ FIELD_PREP(SSUSB_PLL_FBKDIV_PE1H_M, 0x18) | ++ FIELD_PREP(SSUSB_PLL_FBKDIV_U3_M, 0x1e), ++ usbh + DA_SSUSB_PLL_FBKDIV_REG); ++ ++ writel(FIELD_PREP(SSUSB_PLL_PCW_NCPO_U3_M, 0x1e400000), ++ usbh + DA_SSUSB_PLL_PCW_NCPO_REG); ++ ++ writel(FIELD_PREP(SSUSB_PLL_SSC_DELTA1_PE1H_M, 0x25) | ++ FIELD_PREP(SSUSB_PLL_SSC_DELTA1_U3_M, 0x73), ++ usbh + DA_SSUSB_PLL_SSC_DELTA1_REG); ++ ++ writel(FIELD_PREP(SSUSB_PLL_SSC_DELTA_U3_M, 0x71) | ++ FIELD_PREP(SSUSB_PLL_SSC_DELTA1_PE2D_M, 0x4a), ++ usbh + DA_SSUSB_U3PHYA_21_REG); ++ ++ writel(FIELD_PREP(SSUSB_PLL_SSC_PRD_M, 0x140), ++ usbh + SSUSB_U3PHYA_9_REG); ++ ++ writel(FIELD_PREP(SSUSB_SYSPLL_PCW_NCPO_M, 0x11c00000), ++ usbh + SSUSB_U3PHYA_3_REG); ++ ++ writel(FIELD_PREP(SSUSB_PCIE_CLKDRV_AMP_M, 4) | ++ FIELD_PREP(SSUSB_SYSPLL_FBSEL_M, 1) | ++ FIELD_PREP(SSUSB_SYSPLL_PREDIV_M, 1), ++ usbh + SSUSB_U3PHYA_1_REG); ++ ++ writel(FIELD_PREP(SSUSB_SYSPLL_FBDIV_M, 0x12) | ++ SSUSB_SYSPLL_VCO_DIV_SEL | SSUSB_SYSPLL_FPEN | ++ SSUSB_SYSPLL_MONCK_EN | SSUSB_SYSPLL_VOD_EN, ++ usbh + SSUSB_U3PHYA_2_REG); ++ ++ writel(SSUSB_EQ_CURSEL | FIELD_PREP(SSUSB_RX_DAC_MUX_M, 8) | ++ FIELD_PREP(SSUSB_PCIE_SIGDET_VTH_M, 1) | ++ FIELD_PREP(SSUSB_PCIE_SIGDET_LPF_M, 1), ++ usbh + SSUSB_U3PHYA_11_REG); ++ ++ writel(FIELD_PREP(SSUSB_RING_OSC_CNTEND_M, 0x1ff) | ++ FIELD_PREP(SSUSB_XTAL_OSC_CNTEND_M, 0x7f) | ++ SSUSB_RING_BYPASS_DET, ++ usbh + SSUSB_B2_ROSC_0_REG); ++ ++ writel(FIELD_PREP(SSUSB_RING_OSC_FRC_RECAL_M, 3) | ++ SSUSB_RING_OSC_FRC_SEL, ++ usbh + SSUSB_B2_ROSC_1_REG); ++} ++ ++static void xhci_config_25mhz(void __iomem *usbh) ++{ ++ writel(FIELD_PREP(SSUSB_MAC3_SYS_CK_GATE_MASK_TIME_M, 0x20) | ++ FIELD_PREP(SSUSB_MAC2_SYS_CK_GATE_MASK_TIME_M, 0x20) | ++ FIELD_PREP(SSUSB_MAC3_SYS_CK_GATE_MODE_M, 2) | ++ FIELD_PREP(SSUSB_MAC2_SYS_CK_GATE_MODE_M, 2) | 0x10, ++ usbh + SSUSB_MAC_CK_CTRL_REG); ++ ++ writel(FIELD_PREP(SSUSB_PLL_PREDIV_PE1D_M, 2) | ++ FIELD_PREP(SSUSB_PLL_FBKDI_M, 4), ++ usbh + DA_SSUSB_U3PHYA_10_REG); ++ ++ writel(FIELD_PREP(SSUSB_PLL_FBKDIV_PE2H_M, 0x18) | ++ FIELD_PREP(SSUSB_PLL_FBKDIV_PE1D_M, 0x18) | ++ FIELD_PREP(SSUSB_PLL_FBKDIV_PE1H_M, 0x18) | ++ FIELD_PREP(SSUSB_PLL_FBKDIV_U3_M, 0x19), ++ usbh + DA_SSUSB_PLL_FBKDIV_REG); ++ ++ writel(FIELD_PREP(SSUSB_PLL_PCW_NCPO_U3_M, 0x18000000), ++ usbh + DA_SSUSB_PLL_PCW_NCPO_REG); ++ ++ writel(FIELD_PREP(SSUSB_PLL_SSC_DELTA1_PE1H_M, 0x25) | ++ FIELD_PREP(SSUSB_PLL_SSC_DELTA1_U3_M, 0x4a), ++ usbh + DA_SSUSB_PLL_SSC_DELTA1_REG); ++ ++ writel(FIELD_PREP(SSUSB_PLL_SSC_DELTA_U3_M, 0x48) | ++ FIELD_PREP(SSUSB_PLL_SSC_DELTA1_PE2D_M, 0x4a), ++ usbh + DA_SSUSB_U3PHYA_21_REG); ++ ++ writel(FIELD_PREP(SSUSB_PLL_SSC_PRD_M, 0x190), ++ usbh + SSUSB_U3PHYA_9_REG); ++ ++ writel(FIELD_PREP(SSUSB_SYSPLL_PCW_NCPO_M, 0xe000000), ++ usbh + SSUSB_U3PHYA_3_REG); ++ ++ writel(FIELD_PREP(SSUSB_PCIE_CLKDRV_AMP_M, 4) | ++ FIELD_PREP(SSUSB_SYSPLL_FBSEL_M, 1), ++ usbh + SSUSB_U3PHYA_1_REG); ++ ++ writel(FIELD_PREP(SSUSB_SYSPLL_FBDIV_M, 0xf) | ++ SSUSB_SYSPLL_VCO_DIV_SEL | SSUSB_SYSPLL_FPEN | ++ SSUSB_SYSPLL_MONCK_EN | SSUSB_SYSPLL_VOD_EN, ++ usbh + SSUSB_U3PHYA_2_REG); ++ ++ writel(SSUSB_EQ_CURSEL | FIELD_PREP(SSUSB_RX_DAC_MUX_M, 8) | ++ FIELD_PREP(SSUSB_PCIE_SIGDET_VTH_M, 1) | ++ FIELD_PREP(SSUSB_PCIE_SIGDET_LPF_M, 1), ++ usbh + SSUSB_U3PHYA_11_REG); ++ ++ writel(FIELD_PREP(SSUSB_RING_OSC_CNTEND_M, 0x1ff) | ++ FIELD_PREP(SSUSB_XTAL_OSC_CNTEND_M, 0x7f) | ++ SSUSB_RING_BYPASS_DET, ++ usbh + SSUSB_B2_ROSC_0_REG); ++ ++ writel(FIELD_PREP(SSUSB_RING_OSC_FRC_RECAL_M, 3) | ++ SSUSB_RING_OSC_FRC_SEL, ++ usbh + SSUSB_B2_ROSC_1_REG); ++} ++ ++void lowlevel_init(void) ++{ ++ void __iomem *usbh = ioremap_nocache(SSUSB_BASE, SSUSB_SIZE); ++ u32 xtal = get_xtal_mhz(); ++ ++ /* Setup USB xHCI */ ++ if (xtal == 40) ++ xhci_config_40mhz(usbh); ++ else if (xtal == 25) ++ xhci_config_25mhz(usbh); ++} ++ ++ulong notrace get_tbclk(void) ++{ ++ return gd->arch.timer_freq; ++} ++ ++void _machine_restart(void) ++{ ++ void __iomem *sysc = ioremap_nocache(SYSCTL_BASE, SYSCTL_SIZE); ++ ++ while (1) ++ writel(SYS_RST, sysc + SYSCTL_RSTCTL_REG); ++} +--- /dev/null ++++ b/arch/mips/mach-mtmips/mt7621/mt7621.h +@@ -0,0 +1,229 @@ ++/* SPDX-License-Identifier: GPL-2.0 */ ++/* ++ * Copyright (C) 2022 MediaTek Inc. All rights reserved. ++ * ++ * Author: Weijie Gao ++ */ ++ ++#ifndef _MT7621_H_ ++#define _MT7621_H_ ++ ++#define SYSCTL_BASE 0x1e000000 ++#define SYSCTL_SIZE 0x100 ++#define TIMER_BASE 0x1e000100 ++#define TIMER_SIZE 0x100 ++#define RBUS_BASE 0x1e000400 ++#define RBUS_SIZE 0x100 ++#define GPIO_BASE 0x1e000600 ++#define GPIO_SIZE 0x100 ++#define DMA_CFG_ARB_BASE 0x1e000800 ++#define DMA_CFG_ARB_SIZE 0x100 ++#define SPI_BASE 0x1e000b00 ++#define SPI_SIZE 0x100 ++#define UART1_BASE 0x1e000c00 ++#define UART1_SIZE 0x100 ++#define UART2_BASE 0x1e000d00 ++#define UART2_SIZE 0x100 ++#define UART3_BASE 0x1e000e00 ++#define UART3_SIZE 0x100 ++#define NFI_BASE 0x1e003000 ++#define NFI_SIZE 0x800 ++#define NFI_ECC_BASE 0x1e003800 ++#define NFI_ECC_SIZE 0x800 ++#define DRAMC_BASE 0x1e005000 ++#define DRAMC_SIZE 0x1000 ++#define FE_BASE 0x1e100000 ++#define FE_SIZE 0xe000 ++#define GMAC_BASE 0x1e110000 ++#define GMAC_SIZE 0x8000 ++#define SSUSB_BASE 0x1e1c0000 ++#define SSUSB_SIZE 0x40000 ++ ++ /* GIC Base Address */ ++#define MIPS_GIC_BASE 0x1fbc0000 ++ ++ /* CPC Base Address */ ++#define MIPS_CPC_BASE 0x1fbf0000 ++ ++ /* Flash Memory-mapped Base Address */ ++#define FLASH_MMAP_BASE 0x1fc00000 ++#define TPL_INFO_OFFSET 0x40 ++#define TPL_INFO_MAGIC 0x31323637 /* Magic "7621" */ ++ ++/* SRAM */ ++#define FE_SRAM_BASE1 0x8000 ++#define FE_SRAM_BASE2 0xa000 ++ ++/* SYSCTL_BASE */ ++#define SYSCTL_CHIP_REV_ID_REG 0x0c ++#define CPU_ID 0x20000 ++#define PKG_ID 0x10000 ++#define VER_ID_S 8 ++#define VER_ID_M 0xf00 ++#define ECO_ID_S 0 ++#define ECO_ID_M 0x0f ++ ++#define SYSCTL_SYSCFG0_REG 0x10 ++#define XTAL_MODE_SEL_S 6 ++#define XTAL_MODE_SEL_M 0x1c0 ++#define DRAM_TYPE 0x10 ++#define CHIP_MODE_S 0 ++#define CHIP_MODE_M 0x0f ++ ++#define BOOT_SRAM_BASE_REG 0x20 ++ ++#define SYSCTL_CLKCFG0_REG 0x2c ++#define CPU_CLK_SEL_S 30 ++#define CPU_CLK_SEL_M 0xc0000000 ++#define MPLL_CFG_SEL_S 23 ++#define MPLL_CFG_SEL_M 0x800000 ++ ++#define SYSCTL_RSTCTL_REG 0x34 ++#define MCM_RST 0x04 ++#define SYS_RST 0x01 ++ ++#define SYSCTL_CUR_CLK_STS_REG 0x44 ++#define CUR_CPU_FDIV_S 8 ++#define CUR_CPU_FDIV_M 0x1f00 ++#define CUR_CPU_FFRAC_S 0 ++#define CUR_CPU_FFRAC_M 0x1f ++ ++#define SYSCTL_GPIOMODE_REG 0x60 ++#define UART2_MODE_S 5 ++#define UART2_MODE_M 0x60 ++#define UART3_MODE_S 3 ++#define UART3_MODE_M 0x18 ++#define UART1_MODE 0x02 ++ ++/* RBUS_BASE */ ++#define RBUS_DYN_CFG0_REG 0x0010 ++#define CPU_FDIV_S 8 ++#define CPU_FDIV_M 0x1f00 ++#define CPU_FFRAC_S 0 ++#define CPU_FFRAC_M 0x1f ++ ++/* DMA_CFG_ARB_BASE */ ++#define DMA_ROUTE_REG 0x000c ++ ++/* SPI_BASE */ ++#define SPI_SPACE_REG 0x003c ++#define FS_SLAVE_SEL_S 12 ++#define FS_SLAVE_SEL_M 0x70000 ++#define FS_CLK_SEL_S 0 ++#define FS_CLK_SEL_M 0xfff ++ ++/* FE_BASE */ ++#define FE_RST_GLO_REG 0x0004 ++#define FE_PSE_RAM 0x04 ++#define FE_PSE_MEM_EN 0x02 ++#define FE_PSE_RESET 0x01 ++ ++/* SSUSB_BASE */ ++#define SSUSB_MAC_CK_CTRL_REG 0x10784 ++#define SSUSB_MAC3_SYS_CK_GATE_MASK_TIME_S 16 ++#define SSUSB_MAC3_SYS_CK_GATE_MASK_TIME_M 0xff0000 ++#define SSUSB_MAC2_SYS_CK_GATE_MASK_TIME_S 8 ++#define SSUSB_MAC2_SYS_CK_GATE_MASK_TIME_M 0xff00 ++#define SSUSB_MAC3_SYS_CK_GATE_MODE_S 2 ++#define SSUSB_MAC3_SYS_CK_GATE_MODE_M 0x0c ++#define SSUSB_MAC2_SYS_CK_GATE_MODE_S 0 ++#define SSUSB_MAC2_SYS_CK_GATE_MODE_M 0x03 ++ ++#define SSUSB_B2_ROSC_0_REG 0x10a40 ++#define SSUSB_RING_OSC_CNTEND_S 23 ++#define SSUSB_RING_OSC_CNTEND_M 0xff800000 ++#define SSUSB_XTAL_OSC_CNTEND_S 16 ++#define SSUSB_XTAL_OSC_CNTEND_M 0x7f0000 ++#define SSUSB_RING_BYPASS_DET 0x01 ++ ++#define SSUSB_B2_ROSC_1_REG 0x10a44 ++#define SSUSB_RING_OSC_FRC_RECAL_S 17 ++#define SSUSB_RING_OSC_FRC_RECAL_M 0x60000 ++#define SSUSB_RING_OSC_FRC_SEL 0x01 ++ ++#define SSUSB_U3PHYA_1_REG 0x10b04 ++#define SSUSB_PCIE_CLKDRV_AMP_S 27 ++#define SSUSB_PCIE_CLKDRV_AMP_M 0x38000000 ++#define SSUSB_SYSPLL_FBSEL_S 2 ++#define SSUSB_SYSPLL_FBSEL_M 0x0c ++#define SSUSB_SYSPLL_PREDIV_S 0 ++#define SSUSB_SYSPLL_PREDIV_M 0x03 ++ ++#define SSUSB_U3PHYA_2_REG 0x10b08 ++#define SSUSB_SYSPLL_FBDIV_S 24 ++#define SSUSB_SYSPLL_FBDIV_M 0x7f000000 ++#define SSUSB_SYSPLL_VCO_DIV_SEL 0x200000 ++#define SSUSB_SYSPLL_FPEN 0x2000 ++#define SSUSB_SYSPLL_MONCK_EN 0x1000 ++#define SSUSB_SYSPLL_VOD_EN 0x200 ++ ++#define SSUSB_U3PHYA_3_REG 0x10b10 ++#define SSUSB_SYSPLL_PCW_NCPO_S 1 ++#define SSUSB_SYSPLL_PCW_NCPO_M 0xfffffffe ++ ++#define SSUSB_U3PHYA_9_REG 0x10b24 ++#define SSUSB_PLL_SSC_PRD_S 0 ++#define SSUSB_PLL_SSC_PRD_M 0xffff ++ ++#define SSUSB_U3PHYA_11_REG 0x10b2c ++#define SSUSB_EQ_CURSEL 0x1000000 ++#define SSUSB_RX_DAC_MUX_S 19 ++#define SSUSB_RX_DAC_MUX_M 0xf80000 ++#define SSUSB_PCIE_SIGDET_VTH_S 5 ++#define SSUSB_PCIE_SIGDET_VTH_M 0x60 ++#define SSUSB_PCIE_SIGDET_LPF_S 3 ++#define SSUSB_PCIE_SIGDET_LPF_M 0x18 ++ ++#define DA_SSUSB_PLL_FBKDIV_REG 0x10c1c ++#define SSUSB_PLL_FBKDIV_PE2H_S 24 ++#define SSUSB_PLL_FBKDIV_PE2H_M 0x7f000000 ++#define SSUSB_PLL_FBKDIV_PE1D_S 16 ++#define SSUSB_PLL_FBKDIV_PE1D_M 0x7f0000 ++#define SSUSB_PLL_FBKDIV_PE1H_S 8 ++#define SSUSB_PLL_FBKDIV_PE1H_M 0x7f00 ++#define SSUSB_PLL_FBKDIV_U3_S 0 ++#define SSUSB_PLL_FBKDIV_U3_M 0x7f ++ ++#define DA_SSUSB_U3PHYA_10_REG 0x10c20 ++#define SSUSB_PLL_PREDIV_PE1D_S 18 ++#define SSUSB_PLL_PREDIV_PE1D_M 0xc0000 ++#define SSUSB_PLL_PREDIV_U3_S 8 ++#define SSUSB_PLL_PREDIV_U3_M 0x300 ++#define SSUSB_PLL_FBKDI_S 0 ++#define SSUSB_PLL_FBKDI_M 0x07 ++ ++#define DA_SSUSB_PLL_PCW_NCPO_REG 0x10c24 ++#define SSUSB_PLL_PCW_NCPO_U3_S 0 ++#define SSUSB_PLL_PCW_NCPO_U3_M 0x7fffffff ++ ++#define DA_SSUSB_PLL_SSC_DELTA1_REG 0x10c38 ++#define SSUSB_PLL_SSC_DELTA1_PE1H_S 16 ++#define SSUSB_PLL_SSC_DELTA1_PE1H_M 0xffff0000 ++#define SSUSB_PLL_SSC_DELTA1_U3_S 0 ++#define SSUSB_PLL_SSC_DELTA1_U3_M 0xffff ++ ++#define DA_SSUSB_U3PHYA_21_REG 0x10c40 ++#define SSUSB_PLL_SSC_DELTA_U3_S 16 ++#define SSUSB_PLL_SSC_DELTA_U3_M 0xffff0000 ++#define SSUSB_PLL_SSC_DELTA1_PE2D_S 0 ++#define SSUSB_PLL_SSC_DELTA1_PE2D_M 0xffff ++ ++/* MT7621 specific CM values */ ++ ++/* GCR_REGx_BASE */ ++#define GCR_REG0_BASE_VALUE 0x1c000000 ++#define GCR_REG1_BASE_VALUE 0x60000000 ++#define GCR_REG2_BASE_VALUE 0x1c000000 ++#define GCR_REG3_BASE_VALUE 0x1c000000 ++ ++/* GCR_REGx_MASK */ ++#define GCR_REG0_MASK_VALUE 0x0000fc00 /* 64M Bus */ ++#define GCR_REG1_MASK_VALUE 0x0000f000 /* 256M PCI Mem */ ++#define GCR_REG2_MASK_VALUE 0x0000fc00 /* unused */ ++#define GCR_REG3_MASK_VALUE 0x0000fc00 /* unused */ ++ ++#ifndef __ASSEMBLY__ ++unsigned long get_xtal_mhz(void); ++#endif ++ ++#endif /* _MT7621_H_ */ +--- /dev/null ++++ b/arch/mips/mach-mtmips/mt7621/serial.c +@@ -0,0 +1,23 @@ ++// SPDX-License-Identifier: GPL-2.0 ++/* ++ * Copyright (C) 2022 MediaTek Inc. All rights reserved. ++ * ++ * Author: Weijie Gao ++ */ ++ ++#include ++#include ++#include "mt7621.h" ++ ++void board_debug_uart_init(void) ++{ ++ void __iomem *base = ioremap_nocache(SYSCTL_BASE, SYSCTL_SIZE); ++ ++#if CONFIG_DEBUG_UART_BASE == 0xbe000c00 /* KSEG1ADDR(UART1_BASE) */ ++ clrbits_32(base + SYSCTL_GPIOMODE_REG, UART1_MODE); ++#elif CONFIG_DEBUG_UART_BASE == 0xbe000d00 /* KSEG1ADDR(UART2_BASE) */ ++ clrbits_32(base + SYSCTL_GPIOMODE_REG, UART2_MODE_M); ++#elif CONFIG_DEBUG_UART_BASE == 0xbe000e00 /* KSEG1ADDR(UART3_BASE) */ ++ clrbits_32(base + SYSCTL_GPIOMODE_REG, UART3_MODE_M); ++#endif ++} +--- /dev/null ++++ b/arch/mips/mach-mtmips/mt7621/spl/Makefile +@@ -0,0 +1,9 @@ ++ ++extra-y += start.o ++ ++obj-y += spl.o ++obj-y += cps.o ++obj-y += dram.o ++obj-y += serial.o ++obj-y += launch.o ++obj-y += launch_ll.o +--- /dev/null ++++ b/arch/mips/mach-mtmips/mt7621/spl/cps.c +@@ -0,0 +1,153 @@ ++// SPDX-License-Identifier: GPL-2.0 ++/* ++ * Copyright (C) 2022 MediaTek Inc. All rights reserved. ++ * ++ * Author: Weijie Gao ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include "../mt7621.h" ++ ++/* GIC Shared Register Bases */ ++#define GIC_SH_POL_BASE 0x100 ++#define GIC_SH_TRIG_BASE 0x180 ++#define GIC_SH_RMASK_BASE 0x300 ++#define GIC_SH_SMASK_BASE 0x380 ++#define GIC_SH_MASK_BASE 0x400 ++#define GIC_SH_PEND_BASE 0x480 ++#define GIC_SH_MAP_PIN_BASE 0x500 ++#define GIC_SH_MAP_VPE_BASE 0x2000 ++ ++/* GIC Registers */ ++#define GIC_SH_POL31_0 (GIC_SH_POL_BASE + 0x00) ++#define GIC_SH_POL63_32 (GIC_SH_POL_BASE + 0x04) ++ ++#define GIC_SH_TRIG31_0 (GIC_SH_TRIG_BASE + 0x00) ++#define GIC_SH_TRIG63_32 (GIC_SH_TRIG_BASE + 0x04) ++ ++#define GIC_SH_RMASK31_0 (GIC_SH_RMASK_BASE + 0x00) ++#define GIC_SH_RMASK63_32 (GIC_SH_RMASK_BASE + 0x04) ++ ++#define GIC_SH_SMASK31_0 (GIC_SH_SMASK_BASE + 0x00) ++#define GIC_SH_SMASK63_32 (GIC_SH_SMASK_BASE + 0x04) ++ ++#define GIC_SH_MAP_PIN(n) (GIC_SH_MAP_PIN_BASE + (n) * 4) ++ ++#define GIC_SH_MAP_VPE(n, v) (GIC_SH_MAP_VPE_BASE + (n) * 0x20 + ((v) / 32) * 4) ++#define GIC_SH_MAP_VPE31_0(n) GIC_SH_MAP_VPE(n, 0) ++ ++/* GIC_SH_MAP_PIN fields */ ++#define GIC_MAP_TO_PIN BIT(31) ++#define GIC_MAP_TO_NMI BIT(30) ++#define GIC_MAP GENMASK(5, 0) ++#define GIC_MAP_SHIFT 0 ++ ++static void cm_init(void __iomem *cm_base) ++{ ++ u32 gcrcfg, num_cores; ++ ++ gcrcfg = readl(cm_base + GCR_CONFIG); ++ num_cores = FIELD_GET(GCR_CONFIG_PCORES, gcrcfg) + 1; ++ ++ writel((1 << num_cores) - 1, cm_base + GCR_ACCESS); ++ ++ writel(GCR_REG0_BASE_VALUE, cm_base + GCR_REG0_BASE); ++ writel(GCR_REG1_BASE_VALUE, cm_base + GCR_REG1_BASE); ++ writel(GCR_REG2_BASE_VALUE, cm_base + GCR_REG2_BASE); ++ writel(GCR_REG3_BASE_VALUE, cm_base + GCR_REG3_BASE); ++ ++ clrsetbits_32(cm_base + GCR_REG0_MASK, ++ GCR_REGn_MASK_ADDRMASK | GCR_REGn_MASK_CMTGT, ++ FIELD_PREP(GCR_REGn_MASK_ADDRMASK, GCR_REG0_MASK_VALUE) | ++ GCR_REGn_MASK_CMTGT_IOCU0); ++ ++ clrsetbits_32(cm_base + GCR_REG1_MASK, ++ GCR_REGn_MASK_ADDRMASK | GCR_REGn_MASK_CMTGT, ++ FIELD_PREP(GCR_REGn_MASK_ADDRMASK, GCR_REG1_MASK_VALUE) | ++ GCR_REGn_MASK_CMTGT_IOCU0); ++ ++ clrsetbits_32(cm_base + GCR_REG2_MASK, ++ GCR_REGn_MASK_ADDRMASK | GCR_REGn_MASK_CMTGT, ++ FIELD_PREP(GCR_REGn_MASK_ADDRMASK, GCR_REG2_MASK_VALUE) | ++ GCR_REGn_MASK_CMTGT_IOCU0); ++ ++ clrsetbits_32(cm_base + GCR_REG3_MASK, ++ GCR_REGn_MASK_ADDRMASK | GCR_REGn_MASK_CMTGT, ++ FIELD_PREP(GCR_REGn_MASK_ADDRMASK, GCR_REG3_MASK_VALUE) | ++ GCR_REGn_MASK_CMTGT_IOCU0); ++ ++ clrbits_32(cm_base + GCR_BASE, CM_DEFAULT_TARGET_MASK); ++ setbits_32(cm_base + GCR_CONTROL, GCR_CONTROL_SYNCCTL); ++} ++ ++static void gic_init(void) ++{ ++ void __iomem *gic_base = (void *)KSEG1ADDR(MIPS_GIC_BASE); ++ int i; ++ ++ /* Interrupt 0..5: Level Trigger, Active High */ ++ writel(0, gic_base + GIC_SH_TRIG31_0); ++ writel(0x3f, gic_base + GIC_SH_RMASK31_0); ++ writel(0x3f, gic_base + GIC_SH_POL31_0); ++ writel(0x3f, gic_base + GIC_SH_SMASK31_0); ++ ++ /* Interrupt 56..63: Edge Trigger, Rising Edge */ ++ /* Hardcoded to set up the last 8 external interrupts for IPI. */ ++ writel(0xff000000, gic_base + GIC_SH_TRIG63_32); ++ writel(0xff000000, gic_base + GIC_SH_RMASK63_32); ++ writel(0xff000000, gic_base + GIC_SH_POL63_32); ++ writel(0xff000000, gic_base + GIC_SH_SMASK63_32); ++ ++ /* Map interrupt source to particular hardware interrupt pin */ ++ /* source {0,1,2,3,4,5} -> pin {0,0,4,3,0,5} */ ++ writel(GIC_MAP_TO_PIN | 0, gic_base + GIC_SH_MAP_PIN(0)); ++ writel(GIC_MAP_TO_PIN | 0, gic_base + GIC_SH_MAP_PIN(1)); ++ writel(GIC_MAP_TO_PIN | 4, gic_base + GIC_SH_MAP_PIN(2)); ++ writel(GIC_MAP_TO_PIN | 3, gic_base + GIC_SH_MAP_PIN(3)); ++ writel(GIC_MAP_TO_PIN | 0, gic_base + GIC_SH_MAP_PIN(4)); ++ writel(GIC_MAP_TO_PIN | 5, gic_base + GIC_SH_MAP_PIN(5)); ++ ++ /* source 56~59 -> pin 1, 60~63 -> pin 2 */ ++ writel(GIC_MAP_TO_PIN | 1, gic_base + GIC_SH_MAP_PIN(56)); ++ writel(GIC_MAP_TO_PIN | 1, gic_base + GIC_SH_MAP_PIN(57)); ++ writel(GIC_MAP_TO_PIN | 1, gic_base + GIC_SH_MAP_PIN(58)); ++ writel(GIC_MAP_TO_PIN | 1, gic_base + GIC_SH_MAP_PIN(59)); ++ writel(GIC_MAP_TO_PIN | 2, gic_base + GIC_SH_MAP_PIN(60)); ++ writel(GIC_MAP_TO_PIN | 2, gic_base + GIC_SH_MAP_PIN(61)); ++ writel(GIC_MAP_TO_PIN | 2, gic_base + GIC_SH_MAP_PIN(62)); ++ writel(GIC_MAP_TO_PIN | 2, gic_base + GIC_SH_MAP_PIN(63)); ++ ++ /* Interrupt map to VPE (bit mask) */ ++ for (i = 0; i < 32; i++) ++ writel(BIT(0), gic_base + GIC_SH_MAP_VPE31_0(i)); ++ ++ /* ++ * Direct GIC_int 56..63 to vpe 0..3 ++ * MIPS Linux convention that last 16 interrupts implemented be set ++ * aside for IPI signaling. ++ * The actual interrupts are tied low and software sends interrupts ++ * via GIC_SH_WEDGE writes. ++ */ ++ for (i = 0; i < 4; i++) { ++ writel(BIT(i), gic_base + GIC_SH_MAP_VPE31_0(i + 56)); ++ writel(BIT(i), gic_base + GIC_SH_MAP_VPE31_0(i + 60)); ++ } ++} ++ ++void mt7621_cps_init(void) ++{ ++ void __iomem *cm_base = (void *)KSEG1ADDR(CONFIG_MIPS_CM_BASE); ++ ++ /* Enable GIC */ ++ writel(MIPS_GIC_BASE | GCR_GIC_EN, cm_base + GCR_GIC_BASE); ++ ++ /* Enable CPC */ ++ writel(MIPS_CPC_BASE | GCR_CPC_EN, cm_base + GCR_CPC_BASE); ++ ++ gic_init(); ++ cm_init(cm_base); ++} +--- /dev/null ++++ b/arch/mips/mach-mtmips/mt7621/spl/dram.c +@@ -0,0 +1,153 @@ ++// SPDX-License-Identifier: GPL-2.0 ++/* ++ * Copyright (C) 2022 MediaTek Inc. All rights reserved. ++ * ++ * Author: Weijie Gao ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include "../mt7621.h" ++#include "dram.h" ++ ++static const u32 ddr2_act[DDR_PARAM_SIZE] = { ++#if defined(CONFIG_MT7621_DRAM_DDR2_512M) ++ 0xAA00AA00, 0xAA00AA00, 0x00000007, 0x22174441, ++ 0x00000000, 0xF0748661, 0x40001273, 0x9F0A0481, ++ 0x0304692F, 0x15602842, 0x00008888, 0x88888888, ++ 0x00000000, 0x00000000, 0x00000000, 0x07100000, ++ 0x00001B63, 0x00002000, 0x00004000, 0x00006000, ++ 0x00000000, 0x00000000, 0x00000000, 0x00000000, ++#elif defined(CONFIG_MT7621_DRAM_DDR2_512M_W9751G6KB_A02_1066MHZ) ++ 0xAA00AA00, 0xAA00AA00, 0x00000007, 0x33484584, ++ 0x00000000, 0xF07486A1, 0x50001273, 0x9F010481, ++ 0x0304693F, 0x15602842, 0x00008888, 0x88888888, ++ 0x00000000, 0x00000000, 0x00000010, 0x07100000, ++ 0x00001F73, 0x00002000, 0x00004000, 0x00006000, ++ 0x00000000, 0x00000000, 0x00000000, 0x00000000, ++#elif defined(CONFIG_MT7621_DRAM_DDR2_1024M_W971GG6KB25_800MHZ) ++ 0xAA00AA00, 0xAA00AA00, 0x00000007, 0x22174430, ++ 0x01000000, 0xF0748661, 0x40001273, 0x9F0F0481, ++ 0x0304692F, 0x15602842, 0x00008888, 0x88888888, ++ 0x00000000, 0x00000000, 0x00000000, 0x07100000, ++ 0x00001B63, 0x00002000, 0x00004000, 0x00006000, ++ 0x00000000, 0x00000000, 0x00000000, 0x00000000, ++#elif defined(CONFIG_MT7621_DRAM_DDR2_1024M_W971GG6KB18_1066MHZ) ++ 0xAA00AA00, 0xAA00AA00, 0x00000007, 0x33484584, ++ 0x01000000, 0xF07486A1, 0x50001273, 0x9F070481, ++ 0x0304693F, 0x15602842, 0x00008888, 0x88888888, ++ 0x00000000, 0x00000000, 0x00000010, 0x07100000, ++ 0x00001F73, 0x00002000, 0x00004000, 0x00006000, ++ 0x00000000, 0x00000000, 0x00000000, 0x00000000, ++#else /* CONFIG_MT7621_DRAM_DDR2_1024M */ ++ 0xAA00AA00, 0xAA00AA00, 0x00000007, 0x22174441, ++ 0x01000000, 0xF0748661, 0x40001273, 0x9F0F0481, ++ 0x0304692F, 0x15602842, 0x00008888, 0x88888888, ++ 0x00000000, 0x00000000, 0x00000000, 0x07100000, ++ 0x00001B63, 0x00002000, 0x00004000, 0x00006000, ++ 0x00000000, 0x00000000, 0x00000000, 0x00000000, ++#endif ++}; ++ ++static const u32 ddr3_act[DDR_PARAM_SIZE] = { ++#if defined(CONFIG_MT7621_DRAM_DDR3_1024M) ++ 0xAA00AA00, 0xAA00AA00, 0x00000007, 0x44694683, ++ 0x01000000, 0xF07486A1, 0xC287221D, 0x9F060481, ++ 0x03046948, 0x15602842, 0x00008888, 0x88888888, ++ 0x00000000, 0x00000000, 0x00000210, 0x07100000, ++ 0x00001B61, 0x00002040, 0x00004010, 0x00006000, ++ 0x0C000000, 0x07070000, 0x00000000, 0x00000000, ++#elif defined(CONFIG_MT7621_DRAM_DDR3_4096M) ++ 0xAA00AA00, 0xAA00AA00, 0x00000007, 0x44694683, ++ 0x01000000, 0xF07486A1, 0xC287221D, 0x9F0F0481, ++ 0x03046948, 0x15602842, 0x00008888, 0x88888888, ++ 0x00000000, 0x00000000, 0x00000240, 0x07100000, ++ 0x00001B61, 0x00002040, 0x00004010, 0x00006000, ++ 0x0C000000, 0x07070000, 0x00000000, 0x00000000, ++#elif defined(CONFIG_MT7621_DRAM_DDR3_1024M_KGD) ++ 0xFF00FF00, 0xFF00FF00, 0x00000007, 0x44694683, ++ 0x01000000, 0xF07406A1, 0xC287221D, 0x9F060481, ++ 0x03046923, 0x152f2842, 0x00008888, 0x88888888, ++ 0x00000000, 0x00000000, 0x00000210, 0x07100000, ++ 0x00001B61, 0x00002040, 0x00004010, 0x00006000, ++ 0x0C000000, 0x07070000, 0x000C0000, 0x00000000, ++#else /* CONFIG_MT7621_DRAM_DDR3_2048M */ ++ 0xAA00AA00, 0xAA00AA00, 0x00000007, 0x44694673, ++ 0x01000000, 0xF07486A1, 0xC287221D, 0x9F050481, ++ 0x03046948, 0x15602842, 0x00008888, 0x88888888, ++ 0x00000000, 0x00000000, 0x00000220, 0x07100000, ++ 0x00001B61, 0x00002040, 0x00004010, 0x00006000, ++ 0x0C000000, 0x07070000, 0x00000000, 0x00000000, ++#endif ++}; ++ ++#if defined(CONFIG_MT7621_DRAM_FREQ_400) ++#define DDR_FREQ_PARAM 0x41000000 ++#elif defined(CONFIG_MT7621_DRAM_FREQ_1066) ++#define DDR_FREQ_PARAM 0x21000000 ++#elif defined(CONFIG_MT7621_DRAM_FREQ_1200) ++#define DDR_FREQ_PARAM 0x11000000 ++#else /* CONFIG_MT7621_DRAM_FREQ_800 */ ++#define DDR_FREQ_PARAM 0x31000000 ++#endif ++ ++#define RG_MEPL_FBDIV_S 4 ++#define RG_MEPL_FBDIV_M 0x7f ++ ++static inline void word_copy(u32 *dest, const u32 *src, u32 count) ++{ ++ u32 i; ++ ++ for (i = 0; i < count; i++) ++ dest[i] = src[i]; ++} ++ ++static u32 calc_cpu_pll_val(void) ++{ ++ u32 div, baseval, fb; ++ ++ div = get_xtal_mhz(); ++ ++ if (div == 40) { ++ div /= 2; ++ baseval = 0xc0005802; ++ } else { ++ baseval = 0xc0004802; ++ } ++ ++ fb = CONFIG_MT7621_CPU_FREQ / div - 1; ++ if (fb > RG_MEPL_FBDIV_M) ++ fb = RG_MEPL_FBDIV_M; ++ ++ return baseval | (fb << RG_MEPL_FBDIV_S); ++} ++ ++void prepare_stage_bin(void) ++{ ++ u32 stage_size; ++ ++ const struct stage_header *stock_stage_bin = ++ (const struct stage_header *)__image_copy_end; ++ ++ struct stage_header *new_stage_bin = ++ (struct stage_header *)STAGE_LOAD_ADDR; ++ ++ if (be32_to_cpu(stock_stage_bin->ep) != STAGE_LOAD_ADDR) ++ panic("Invalid DDR stage binary blob\n"); ++ ++ stage_size = be32_to_cpu(stock_stage_bin->stage_size); ++ ++ word_copy((u32 *)new_stage_bin, (const u32 *)stock_stage_bin, ++ (stage_size + sizeof(u32) - 1) / sizeof(u32)); ++ ++ word_copy(new_stage_bin->ddr2_act, ddr2_act, DDR_PARAM_SIZE); ++ word_copy(new_stage_bin->ddr3_act, ddr3_act, DDR_PARAM_SIZE); ++ ++ new_stage_bin->cpu_pll_cfg = calc_cpu_pll_val(); ++ new_stage_bin->ddr_pll_cfg = DDR_FREQ_PARAM; ++ new_stage_bin->baudrate = CONFIG_BAUDRATE; ++} +--- /dev/null ++++ b/arch/mips/mach-mtmips/mt7621/spl/dram.h +@@ -0,0 +1,39 @@ ++/* SPDX-License-Identifier: GPL-2.0 */ ++/* ++ * Copyright (C) 2022 MediaTek Inc. All rights reserved. ++ * ++ * Author: Weijie Gao ++ */ ++ ++#ifndef _MT7621_DRAM_H_ ++#define _MT7621_DRAM_H_ ++ ++#define STAGE_LOAD_ADDR 0xBE108800 ++ ++#ifndef __ASSEMBLY__ ++#include ++ ++#define DDR_PARAM_SIZE 24 ++ ++struct stage_header { ++ u32 jump_insn[2]; ++ u32 ep; ++ u32 stage_size; ++ u32 has_stage2; ++ u32 next_ep; ++ u32 next_size; ++ u32 next_offset; ++ u32 cpu_pll_cfg; ++ u32 ddr_pll_cfg; ++ u32 reserved2[6]; ++ char build_tag[32]; ++ u32 ddr3_act[DDR_PARAM_SIZE]; ++ u32 padding1[2]; ++ u32 ddr2_act[DDR_PARAM_SIZE]; ++ u32 padding2[2]; ++ u32 baudrate; ++ u32 padding3; ++}; ++#endif ++ ++#endif /* _MT7621_DRAM_H_ */ +--- /dev/null ++++ b/arch/mips/mach-mtmips/mt7621/spl/launch.c +@@ -0,0 +1,100 @@ ++// SPDX-License-Identifier: GPL-2.0 ++/* ++ * Copyright (C) 2022 MediaTek Inc. All rights reserved. ++ * ++ * Author: Weijie Gao ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include "launch.h" ++#include "../mt7621.h" ++ ++/* Cluster Power Controller (CPC) offsets */ ++#define CPC_CL_OTHER 0x2010 ++#define CPC_CO_CMD 0x4000 ++ ++/* CPC_CL_OTHER fields */ ++#define CPC_CL_OTHER_CORENUM_SHIFT 16 ++#define CPC_CL_OTHER_CORENUM GENMASK(23, 16) ++ ++/* CPC_CO_CMD */ ++#define PWR_UP 3 ++ ++#define NUM_CORES 2 ++#define NUM_CPUS 4 ++#define WAIT_CPUS_TIMEOUT 4000 ++ ++static void copy_launch_wait_code(void) ++{ ++ memset((void *)KSEG1, 0, SZ_4K); ++ ++ memcpy((void *)KSEG1ADDR(LAUNCH_WAITCODE), ++ &launch_wait_code_start, ++ &launch_wait_code_end - &launch_wait_code_start); ++ ++ invalidate_dcache_range(KSEG0, SZ_4K); ++} ++ ++static void bootup_secondary_core(void) ++{ ++ void __iomem *cpcbase = (void __iomem *)KSEG1ADDR(MIPS_CPC_BASE); ++ int i; ++ ++ for (i = 1; i < NUM_CORES; i++) { ++ writel(i << CPC_CL_OTHER_CORENUM_SHIFT, cpcbase + CPC_CL_OTHER); ++ writel(PWR_UP, cpcbase + CPC_CO_CMD); ++ } ++} ++ ++void secondary_cpu_init(void) ++{ ++ void __iomem *sysc = (void __iomem *)KSEG1ADDR(SYSCTL_BASE); ++ u32 i, dual_core = 0, cpuready = 1, cpumask = 0x03; ++ ulong wait_tick; ++ struct cpulaunch_t *c; ++ ++ /* Copy LAUNCH wait code used by other VPEs */ ++ copy_launch_wait_code(); ++ ++ dual_core = readl(sysc + SYSCTL_CHIP_REV_ID_REG) & CPU_ID; ++ ++ if (dual_core) { ++ /* Bootup secondary core for MT7621A */ ++ cpumask = 0x0f; ++ ++ /* Make BootROM/TPL redirect Core1's bootup flow to our entry point */ ++ writel((uintptr_t)&_start, sysc + BOOT_SRAM_BASE_REG); ++ ++ bootup_secondary_core(); ++ } ++ ++ /* Join the coherent domain */ ++ join_coherent_domain(dual_core ? 2 : 1); ++ ++ /* Bootup Core0/VPE1 */ ++ boot_vpe1(); ++ ++ /* Wait for all CPU ready */ ++ wait_tick = get_timer(0) + WAIT_CPUS_TIMEOUT; ++ ++ while (time_before(get_timer(0), wait_tick)) { ++ /* CPU0 is obviously ready */ ++ for (i = 1; i < NUM_CPUS; i++) { ++ c = (struct cpulaunch_t *)(KSEG0ADDR(CPULAUNCH) + ++ (i << LOG2CPULAUNCH)); ++ ++ if (c->flags & LAUNCH_FREADY) ++ cpuready |= BIT(i); ++ } ++ ++ if ((cpuready & cpumask) == cpumask) ++ break; ++ } ++} +--- /dev/null ++++ b/arch/mips/mach-mtmips/mt7621/spl/launch.h +@@ -0,0 +1,52 @@ ++/* SPDX-License-Identifier: GPL-2.0 */ ++/* ++ * Copyright (C) 2022 MediaTek Inc. All rights reserved. ++ * ++ * Author: Weijie Gao ++ */ ++ ++#ifndef _LAUNCH_H_ ++#define _LAUNCH_H_ ++ ++#ifndef __ASSEMBLY__ ++ ++struct cpulaunch_t { ++ unsigned long pc; ++ unsigned long gp; ++ unsigned long sp; ++ unsigned long a0; ++ unsigned long _pad[3]; /* pad to cache line size to avoid thrashing */ ++ unsigned long flags; ++}; ++ ++extern char launch_wait_code_start; ++extern char launch_wait_code_end; ++ ++void join_coherent_domain(int ncores); ++void boot_vpe1(void); ++ ++#else ++ ++#define LAUNCH_PC 0 ++#define LAUNCH_GP 4 ++#define LAUNCH_SP 8 ++#define LAUNCH_A0 12 ++#define LAUNCH_FLAGS 28 ++ ++#endif ++ ++#define LOG2CPULAUNCH 5 ++ ++#define LAUNCH_FREADY 1 ++#define LAUNCH_FGO 2 ++#define LAUNCH_FGONE 4 ++ ++#define LAUNCH_WAITCODE 0x00000d00 ++#define SCRLAUNCH 0x00000e00 ++#define CPULAUNCH 0x00000f00 ++#define NCPULAUNCH 8 ++ ++/* Polling period in count cycles for secondary CPU's */ ++#define LAUNCHPERIOD 10000 ++ ++#endif /* _LAUNCH_H_ */ +--- /dev/null ++++ b/arch/mips/mach-mtmips/mt7621/spl/launch_ll.S +@@ -0,0 +1,339 @@ ++/* SPDX-License-Identifier: GPL-2.0 */ ++/* ++ * Copyright (C) 2022 MediaTek Inc. All rights reserved. ++ * ++ * Author: Weijie Gao ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include "launch.h" ++ ++ .macro cache_loop curr, end, line_sz, op ++10: cache \op, 0(\curr) ++ PTR_ADDU \curr, \curr, \line_sz ++ bne \curr, \end, 10b ++ .endm ++ ++ .set mt ++ ++/* ++ * Join the coherent domain ++ * a0 = number of cores ++ */ ++LEAF(join_coherent_domain) ++ /* ++ * Enable coherence and allow interventions from all other cores. ++ * (Write access enabled via GCR_ACCESS by core 0.) ++ */ ++ li t1, 1 ++ sll t1, a0 ++ addiu t1, -1 ++ ++ li t0, KSEG1ADDR(CONFIG_MIPS_CM_BASE) ++ sw t1, GCR_Cx_COHERENCE(t0) ++ ehb ++ ++ move t2, zero ++ ++_next_coherent_core: ++ sll t1, t2, GCR_Cx_OTHER_CORENUM_SHIFT ++ sw t1, GCR_Cx_OTHER(t0) ++ ++_busy_wait_coherent_core: ++ lw t1, GCR_CO_COHERENCE(t0) ++ beqz t1, _busy_wait_coherent_core ++ ++ addiu t2, 1 ++ bne t2, a0, _next_coherent_core ++ ++ jr ra ++ END(join_coherent_domain) ++ ++/* ++ * All VPEs other than VPE0 will go here. ++ */ ++LEAF(launch_vpe_entry) ++ mfc0 t0, CP0_EBASE ++ and t0, t0, MIPS_EBASE_CPUNUM ++ ++ /* per-VPE cpulaunch_t */ ++ li a0, KSEG0ADDR(CPULAUNCH) ++ sll t1, t0, LOG2CPULAUNCH ++ addu a0, t1 ++ ++ /* Set CPU online flag */ ++ li t0, LAUNCH_FREADY ++ sw t0, LAUNCH_FLAGS(a0) ++ ++ /* Enable count interrupt in mask, but do not enable interrupts */ ++ mfc0 t0, CP0_STATUS ++ ori t0, STATUSF_IP7 ++ mtc0 t0, CP0_STATUS ++ ++ /* VPEs executing in wait code do not need a stack */ ++ li t9, KSEG0ADDR(LAUNCH_WAITCODE) ++ jr t9 ++ END(launch_vpe_entry) ++ ++/* ++ * This function will not be executed in place. ++ * It will be copied into memory, and VPEs other than VPE0 will be ++ * started to run into this in-memory function. ++ */ ++LEAF(launch_wait_code) ++ .globl launch_wait_code_start ++launch_wait_code_start: ++ ++ move t0, a0 ++ ++start_poll: ++ /* Poll CPU go flag */ ++ mtc0 zero, CP0_COUNT ++ li t1, LAUNCHPERIOD ++ mtc0 t1, CP0_COMPARE ++ ++time_wait: ++ /* Software wait */ ++ mfc0 t2, CP0_COUNT ++ subu t2, t1 ++ bltz t2, time_wait ++ ++ /* Check the launch flag */ ++ lw t3, LAUNCH_FLAGS(t0) ++ and t3, LAUNCH_FGO ++ beqz t3, start_poll ++ ++ /* Reset the counter and interrupts to give naive clients a chance */ ++ mfc0 t1, CP0_STATUS ++ ins t1, zero, STATUSB_IP7, 1 ++ mtc0 t1, CP0_STATUS ++ ++ mfc0 t1, CP0_COUNT ++ subu t1, 1 ++ mtc0 t1, CP0_COMPARE ++ ++ /* Jump to kernel */ ++ lw t9, LAUNCH_PC(t0) ++ lw gp, LAUNCH_GP(t0) ++ lw sp, LAUNCH_SP(t0) ++ lw a0, LAUNCH_A0(t0) ++ move a1, zero ++ move a2, zero ++ move a3, zero ++ ori t3, LAUNCH_FGONE ++ sw t3, LAUNCH_FLAGS(t0) ++ ++ jr t9 ++ ++ .globl launch_wait_code_end ++launch_wait_code_end: ++ END(launch_wait_code) ++ ++/* ++ * Core1 will go here. ++ */ ++LEAF(launch_core_entry) ++ /* Disable caches */ ++ bal mips_cache_disable ++ ++ /* Initialize L1 cache only */ ++ li a0, CONFIG_SYS_ICACHE_SIZE ++ li a1, CONFIG_SYS_ICACHE_LINE_SIZE ++ li a2, CONFIG_SYS_DCACHE_SIZE ++ li a3, CONFIG_SYS_DCACHE_LINE_SIZE ++ ++ mtc0 zero, CP0_TAGLO ++ mtc0 zero, CP0_TAGLO, 2 ++ ehb ++ ++ /* ++ * Initialize the I-cache first, ++ */ ++ li t0, KSEG0 ++ addu t1, t0, a0 ++ /* clear tag to invalidate */ ++ cache_loop t0, t1, a1, INDEX_STORE_TAG_I ++#ifdef CONFIG_SYS_MIPS_CACHE_INIT_RAM_LOAD ++ /* fill once, so data field parity is correct */ ++ PTR_LI t0, KSEG0 ++ cache_loop t0, t1, a1, FILL ++ /* invalidate again - prudent but not strictly necessary */ ++ PTR_LI t0, KSEG0 ++ cache_loop t0, t1, a1, INDEX_STORE_TAG_I ++#endif ++ ++ /* ++ * then initialize D-cache. ++ */ ++ PTR_LI t0, KSEG0 ++ PTR_ADDU t1, t0, a2 ++ /* clear all tags */ ++ cache_loop t0, t1, a3, INDEX_STORE_TAG_D ++#ifdef CONFIG_SYS_MIPS_CACHE_INIT_RAM_LOAD ++ /* load from each line (in cached space) */ ++ PTR_LI t0, KSEG0 ++2: LONG_L zero, 0(t0) ++ PTR_ADDU t0, a3 ++ bne t0, t1, 2b ++ /* clear all tags */ ++ PTR_LI t0, KSEG0 ++ cache_loop t0, t1, a3, INDEX_STORE_TAG_D ++#endif ++ ++ /* Set Cache Mode */ ++ mfc0 t0, CP0_CONFIG ++ li t1, CONF_CM_CACHABLE_COW ++ ins t0, t1, 0, 3 ++ mtc0 t0, CP0_CONFIG ++ ++ /* Join the coherent domain */ ++ li a0, 2 ++ bal join_coherent_domain ++ ++ /* Bootup Core0/VPE1 */ ++ bal boot_vpe1 ++ ++ b launch_vpe_entry ++ END(launch_core_entry) ++ ++/* ++ * Bootup VPE1. ++ * This subroutine must be executed from VPE0 with VPECONF0[MVP] already set. ++ */ ++LEAF(boot_vpe1) ++ mfc0 t0, CP0_MVPCONF0 ++ ++ /* a0 = number of TCs - 1 */ ++ ext a0, t0, MVPCONF0_PTC_SHIFT, 8 ++ beqz a0, _vpe1_init_done ++ ++ /* a1 = number of VPEs - 1 */ ++ ext a1, t0, MVPCONF0_PVPE_SHIFT, 4 ++ beqz a1, _vpe1_init_done ++ ++ /* a2 = current TC No. */ ++ move a2, zero ++ ++ /* Enter VPE Configuration State */ ++ mfc0 t0, CP0_MVPCONTROL ++ or t0, MVPCONTROL_VPC ++ mtc0 t0, CP0_MVPCONTROL ++ ehb ++ ++_next_tc: ++ /* Set the TC number to be used on MTTR and MFTR instructions */ ++ mfc0 t0, CP0_VPECONTROL ++ ins t0, a2, 0, 8 ++ mtc0 t0, CP0_VPECONTROL ++ ehb ++ ++ /* TC0 is already bound */ ++ beqz a2, _next_vpe ++ ++ /* Halt current TC */ ++ li t0, TCHALT_H ++ mttc0 t0, CP0_TCHALT ++ ehb ++ ++ /* If there is spare TC, bind it to the last VPE (VPE[a1]) */ ++ slt t1, a1, a2 ++ bnez t1, _vpe_bind_tc ++ move t1, a1 ++ ++ /* Set Exclusive TC for active TC */ ++ mftc0 t0, CP0_VPECONF0 ++ ins t0, a2, VPECONF0_XTC_SHIFT, 8 ++ mttc0 t0, CP0_VPECONF0 ++ ++ move t1, a2 ++_vpe_bind_tc: ++ /* Bind TC to a VPE */ ++ mftc0 t0, CP0_TCBIND ++ ins t0, t1, TCBIND_CURVPE_SHIFT, 4 ++ mttc0 t0, CP0_TCBIND ++ ++ /* ++ * Set up CP0_TCSTATUS register: ++ * Disable Coprocessor Usable bits ++ * Disable MDMX/DSP ASE ++ * Clear Dirty TC ++ * not dynamically allocatable ++ * not allocated ++ * Kernel mode ++ * interrupt exempt ++ * ASID 0 ++ */ ++ li t0, TCSTATUS_IXMT ++ mttc0 t0, CP0_TCSTATUS ++ ++_next_vpe: ++ slt t1, a1, a2 ++ bnez t1, _done_vpe # No more VPEs ++ ++ /* Disable TC multi-threading */ ++ mftc0 t0, CP0_VPECONTROL ++ ins t0, zero, VPECONTROL_TE_SHIFT, 1 ++ mttc0 t0, CP0_VPECONTROL ++ ++ /* Skip following configuration for TC0 */ ++ beqz a2, _done_vpe ++ ++ /* Deactivate VPE, set Master VPE */ ++ mftc0 t0, CP0_VPECONF0 ++ ins t0, zero, VPECONF0_VPA_SHIFT, 1 ++ or t0, VPECONF0_MVP ++ mttc0 t0, CP0_VPECONF0 ++ ++ mfc0 t0, CP0_STATUS ++ mttc0 t0, CP0_STATUS ++ ++ mttc0 zero, CP0_EPC ++ mttc0 zero, CP0_CAUSE ++ ++ mfc0 t0, CP0_CONFIG ++ mttc0 t0, CP0_CONFIG ++ ++ /* ++ * VPE1 of each core can execute cached as its L1 I$ has already ++ * been initialized. ++ * and the L2$ has been initialized or "disabled" via CCA override. ++ */ ++ PTR_LA t0, _start ++ mttc0 t0, CP0_TCRESTART ++ ++ /* Unset Interrupt Exempt, set Activate Thread */ ++ mftc0 t0, CP0_TCSTATUS ++ ins t0, zero, TCSTATUS_IXMT_SHIFT, 1 ++ ori t0, TCSTATUS_A ++ mttc0 t0, CP0_TCSTATUS ++ ++ /* Resume TC */ ++ mttc0 zero, CP0_TCHALT ++ ++ /* Activate VPE */ ++ mftc0 t0, CP0_VPECONF0 ++ ori t0, VPECONF0_VPA ++ mttc0 t0, CP0_VPECONF0 ++ ++_done_vpe: ++ addu a2, 1 ++ sltu t0, a0, a2 ++ beqz t0, _next_tc ++ ++ mfc0 t0, CP0_MVPCONTROL ++ /* Enable all activated VPE to execute */ ++ ori t0, MVPCONTROL_EVP ++ /* Exit VPE Configuration State */ ++ ins t0, zero, MVPCONTROL_VPC_SHIFT, 1 ++ mtc0 t0, CP0_MVPCONTROL ++ ehb ++ ++_vpe1_init_done: ++ jr ra ++ END(boot_vpe1) +--- /dev/null ++++ b/arch/mips/mach-mtmips/mt7621/spl/serial.c +@@ -0,0 +1,24 @@ ++// SPDX-License-Identifier: GPL-2.0 ++/* ++ * Copyright (C) 2022 MediaTek Inc. All rights reserved. ++ * ++ * Author: Weijie Gao ++ */ ++ ++#include ++#include "../mt7621.h" ++ ++void mtmips_spl_serial_init(void) ++{ ++#ifdef CONFIG_SPL_SERIAL ++ void __iomem *base = ioremap_nocache(SYSCTL_BASE, SYSCTL_SIZE); ++ ++#if CONFIG_CONS_INDEX == 1 ++ clrbits_32(base + SYSCTL_GPIOMODE_REG, UART1_MODE); ++#elif CONFIG_CONS_INDEX == 2 ++ clrbits_32(base + SYSCTL_GPIOMODE_REG, UART2_MODE_M); ++#elif CONFIG_CONS_INDEX == 3 ++ clrbits_32(base + SYSCTL_GPIOMODE_REG, UART3_MODE_M); ++#endif /* CONFIG_CONS_INDEX */ ++#endif /* CONFIG_SPL_SERIAL */ ++} +--- /dev/null ++++ b/arch/mips/mach-mtmips/mt7621/spl/spl.c +@@ -0,0 +1,95 @@ ++// SPDX-License-Identifier: GPL-2.0 ++/* ++ * Copyright (C) 2022 MediaTek Inc. All rights reserved. ++ * ++ * Author: Weijie Gao ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include "../mt7621.h" ++#include "dram.h" ++ ++DECLARE_GLOBAL_DATA_PTR; ++ ++struct tpl_info { ++ u32 magic; ++ u32 size; ++}; ++ ++void set_timer_freq_simple(void) ++{ ++ u32 div = get_xtal_mhz(); ++ ++ /* Round down cpu freq */ ++ gd->arch.timer_freq = rounddown(CONFIG_MT7621_CPU_FREQ, div) * 500000; ++} ++ ++void __noreturn board_init_f(ulong dummy) ++{ ++ spl_init(); ++ ++#ifdef CONFIG_SPL_SERIAL ++ /* ++ * mtmips_spl_serial_init() is useful if debug uart is enabled, ++ * or DM based serial is not enabled. ++ */ ++ mtmips_spl_serial_init(); ++ preloader_console_init(); ++#endif ++ ++ board_init_r(NULL, 0); ++} ++ ++void board_boot_order(u32 *spl_boot_list) ++{ ++#ifdef CONFIG_MT7621_BOOT_FROM_NAND ++ spl_boot_list[0] = BOOT_DEVICE_NAND; ++#else ++ spl_boot_list[0] = BOOT_DEVICE_NOR; ++#endif ++} ++ ++unsigned long spl_nor_get_uboot_base(void) ++{ ++ const struct tpl_info *tpli; ++ const image_header_t *hdr; ++ u32 addr; ++ ++ addr = FLASH_MMAP_BASE + TPL_INFO_OFFSET; ++ tpli = (const struct tpl_info *)KSEG1ADDR(addr); ++ ++ if (tpli->magic == TPL_INFO_MAGIC) { ++ addr = FLASH_MMAP_BASE + tpli->size; ++ hdr = (const image_header_t *)KSEG1ADDR(addr); ++ ++ if (image_get_magic(hdr) == IH_MAGIC) { ++ addr += sizeof(*hdr) + image_get_size(hdr); ++ return KSEG1ADDR(addr); ++ } ++ } ++ ++ panic("Unable to locate SPL payload\n"); ++ return 0; ++} ++ ++uint32_t spl_nand_get_uboot_raw_page(void) ++{ ++ const struct stage_header *sh = (const struct stage_header *)&_start; ++ u32 addr; ++ ++ addr = image_get_header_size() + be32_to_cpu(sh->stage_size); ++ addr = ALIGN(addr, SZ_4K); ++ ++ return addr; ++} +--- /dev/null ++++ b/arch/mips/mach-mtmips/mt7621/spl/start.S +@@ -0,0 +1,226 @@ ++/* SPDX-License-Identifier: GPL-2.0 */ ++/* ++ * Copyright (C) 2022 MediaTek Inc. All rights reserved. ++ * ++ * Author: Weijie Gao ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include "../mt7621.h" ++#include "dram.h" ++ ++#ifndef CONFIG_SYS_INIT_SP_ADDR ++#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + \ ++ CONFIG_SYS_INIT_SP_OFFSET) ++#endif ++ ++#define SP_ADDR_TEMP 0xbe10dff0 ++ ++ .macro init_wr sel ++ MTC0 zero, CP0_WATCHLO,\sel ++ mtc0 t1, CP0_WATCHHI,\sel ++ .endm ++ ++ .macro setup_stack_gd ++ li t0, -16 ++ PTR_LI t1, CONFIG_SYS_INIT_SP_ADDR ++ and sp, t1, t0 # force 16 byte alignment ++ PTR_SUBU \ ++ sp, sp, GD_SIZE # reserve space for gd ++ and sp, sp, t0 # force 16 byte alignment ++ move k0, sp # save gd pointer ++#if CONFIG_VAL(SYS_MALLOC_F_LEN) && \ ++ !CONFIG_IS_ENABLED(INIT_STACK_WITHOUT_MALLOC_F) ++ li t2, CONFIG_VAL(SYS_MALLOC_F_LEN) ++ PTR_SUBU \ ++ sp, sp, t2 # reserve space for early malloc ++ and sp, sp, t0 # force 16 byte alignment ++#endif ++ move fp, sp ++ ++ /* Clear gd */ ++ move t0, k0 ++1: ++ PTR_S zero, 0(t0) ++ PTR_ADDIU t0, PTRSIZE ++ blt t0, t1, 1b ++ nop ++ ++#if CONFIG_VAL(SYS_MALLOC_F_LEN) && \ ++ !CONFIG_IS_ENABLED(INIT_STACK_WITHOUT_MALLOC_F) ++ PTR_S sp, GD_MALLOC_BASE(k0) # gd->malloc_base offset ++#endif ++ .endm ++ ++ .set noreorder ++ ++ENTRY(_start) ++ b 1f ++ mtc0 zero, CP0_COUNT ++ ++ /* Stage header required by BootROM */ ++ .org 0x8 ++ .word 0 # ep, filled by mkimage ++ .word 0 # stage_size, filled by mkimage ++ .word 0 # has_stage2 ++ .word 0 # next_ep ++ .word 0 # next_size ++ .word 0 # next_offset ++ ++1: ++ /* Init CP0 Status */ ++ mfc0 t0, CP0_STATUS ++ and t0, ST0_IMPL ++ or t0, ST0_BEV | ST0_ERL ++ mtc0 t0, CP0_STATUS ++ ehb ++ ++ /* Clear Watch Status bits and disable watch exceptions */ ++ li t1, 0x7 # Clear I, R and W conditions ++ init_wr 0 ++ init_wr 1 ++ init_wr 2 ++ init_wr 3 ++ ++ /* Clear WP, IV and SW interrupts */ ++ mtc0 zero, CP0_CAUSE ++ ++ /* Clear timer interrupt (CP0_COUNT cleared on branch to 'reset') */ ++ mtc0 zero, CP0_COMPARE ++ ++ /* VPE1 goes to wait code directly */ ++ mfc0 t0, CP0_TCBIND ++ andi t0, TCBIND_CURVPE ++ bnez t0, launch_vpe_entry ++ nop ++ ++ /* Core1 goes to specific launch entry */ ++ PTR_LI t0, KSEG1ADDR(CONFIG_MIPS_CM_BASE) ++ lw t1, GCR_Cx_ID(t0) ++ bnez t1, launch_core_entry ++ nop ++ ++ /* MT7530 reset */ ++ li t0, KSEG1ADDR(SYSCTL_BASE) ++ lw t1, SYSCTL_RSTCTL_REG(t0) ++ ori t1, MCM_RST ++ sw t1, SYSCTL_RSTCTL_REG(t0) ++ ++ /* Disable DMA route for PSE SRAM set by BootROM */ ++ PTR_LI t0, KSEG1ADDR(DMA_CFG_ARB_BASE) ++ sw zero, DMA_ROUTE_REG(t0) ++ ++ /* Set CPU clock to 500MHz (Required if boot from NAND) */ ++ li t0, KSEG1ADDR(SYSCTL_BASE) ++ lw t1, SYSCTL_CLKCFG0_REG(t0) ++ ins t1, zero, 30, 2 # CPU_CLK_SEL ++ sw t1, SYSCTL_CLKCFG0_REG(t0) ++ ++ /* Set CPU clock divider to 1/1 */ ++ li t0, KSEG1ADDR(RBUS_BASE) ++ li t1, 0x101 ++ sw t1, RBUS_DYN_CFG0_REG(t0) ++ ++ /* (Re-)initialize the SRAM */ ++ bal mips_sram_init ++ nop ++ ++ /* Set up temporary stack */ ++ li sp, SP_ADDR_TEMP ++ ++ /* Setup full CPS */ ++ bal mips_cm_map ++ nop ++ ++ bal mt7621_cps_init ++ nop ++ ++ /* Prepare for CPU/DDR initialization binary blob */ ++ bal prepare_stage_bin ++ nop ++ ++ /* Call CPU/DDR initialization binary blob */ ++ li t9, STAGE_LOAD_ADDR ++ jalr t9 ++ nop ++ ++ /* Switch CPU PLL source */ ++ li t0, KSEG1ADDR(SYSCTL_BASE) ++ lw t1, SYSCTL_CLKCFG0_REG(t0) ++ li t2, 1 ++ ins t1, t2, CPU_CLK_SEL_S, 2 ++ sw t1, SYSCTL_CLKCFG0_REG(t0) ++ ++ /* ++ * Currently SPL is running on locked L2 cache (on KSEG0). ++ * To reset the entire cache, we have to writeback SPL to DRAM first. ++ * Cache flush won't work here. Use memcpy instead. ++ */ ++ ++ la a0, __text_start ++ move a1, a0 ++ la a2, __image_copy_end ++ sub a2, a2, a1 ++ li a3, 5 ++ ins a0, a3, 29, 3 # convert to KSEG1 ++ ++ bal memcpy ++ nop ++ ++ /* Disable caches */ ++ bal mips_cache_disable ++ nop ++ ++ /* Reset caches */ ++ bal mips_cache_reset ++ nop ++ ++ /* Disable SRAM */ ++ li t0, KSEG1ADDR(FE_BASE) ++ li t1, FE_PSE_RESET ++ sw t1, FE_RST_GLO_REG(t0) ++ ++ /* Clear the .bss section */ ++ la a0, __bss_start ++ la a1, __bss_end ++1: sw zero, 0(a0) ++ addiu a0, 4 ++ ble a0, a1, 1b ++ nop ++ ++ /* Set up initial stack and global data */ ++ setup_stack_gd ++ ++#if CONFIG_IS_ENABLED(INIT_STACK_WITHOUT_MALLOC_F) ++ /* Set malloc base */ ++ li t0, (CONFIG_SYS_INIT_SP_ADDR + 15) & (~15) ++ PTR_S t0, GD_MALLOC_BASE(k0) # gd->malloc_base offset ++#endif ++ ++#if defined(CONFIG_DEBUG_UART) && defined(CONFIG_SPL_SERIAL) ++ /* Earliest point to set up debug uart */ ++ bal debug_uart_init ++ nop ++#endif ++ ++ /* Setup timer */ ++ bal set_timer_freq_simple ++ nop ++ ++ /* Bootup secondary CPUs */ ++ bal secondary_cpu_init ++ nop ++ ++ move a0, zero # a0 <-- boot_flags = 0 ++ bal board_init_f ++ move ra, zero ++ ++ END(_start) +--- /dev/null ++++ b/arch/mips/mach-mtmips/mt7621/sram_init.S +@@ -0,0 +1,22 @@ ++/* SPDX-License-Identifier: GPL-2.0 */ ++/* ++ * Copyright (C) 2022 MediaTek Inc. All rights reserved. ++ * ++ * Author: Weijie Gao ++ */ ++ ++#include ++#include ++#include ++#include "mt7621.h" ++ ++LEAF(mips_sram_init) ++ li t0, KSEG1ADDR(FE_BASE) ++ li t1, FE_PSE_RESET ++ sw t1, FE_RST_GLO_REG(t0) ++ ++ li t1, (FE_PSE_RAM | FE_PSE_MEM_EN) ++ sw t1, FE_RST_GLO_REG(t0) ++ ++ jr ra ++ END(mips_sram_init) +--- /dev/null ++++ b/arch/mips/mach-mtmips/mt7621/tpl/Makefile +@@ -0,0 +1,4 @@ ++ ++extra-y += start.o ++ ++obj-y += tpl.o +--- /dev/null ++++ b/arch/mips/mach-mtmips/mt7621/tpl/start.S +@@ -0,0 +1,161 @@ ++/* SPDX-License-Identifier: GPL-2.0 */ ++/* ++ * Copyright (C) 2022 MediaTek Inc. All rights reserved. ++ * ++ * Author: Weijie Gao ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include "../mt7621.h" ++ ++#define SP_ADDR_TEMP 0xbe10dff0 ++ ++ .set noreorder ++ ++ .macro init_wr sel ++ MTC0 zero, CP0_WATCHLO,\sel ++ mtc0 t1, CP0_WATCHHI,\sel ++ .endm ++ ++ .macro uhi_mips_exception ++ move k0, t9 # preserve t9 in k0 ++ move k1, a0 # preserve a0 in k1 ++ li t9, 15 # UHI exception operation ++ li a0, 0 # Use hard register context ++ sdbbp 1 # Invoke UHI operation ++ .endm ++ ++ENTRY(_start) ++ b reset ++ mtc0 zero, CP0_COUNT ++ ++ /* ++ * Store TPL size here. ++ * This will be used by SPL to locate u-boot payload. ++ */ ++ .org TPL_INFO_OFFSET ++ .word TPL_INFO_MAGIC ++ .word __image_copy_len ++ ++ /* Exception vector */ ++ .org 0x200 ++ /* TLB refill, 32 bit task */ ++ uhi_mips_exception ++ ++ .org 0x280 ++ /* XTLB refill, 64 bit task */ ++ uhi_mips_exception ++ ++ .org 0x300 ++ /* Cache error exception */ ++ uhi_mips_exception ++ ++ .org 0x380 ++ /* General exception */ ++ uhi_mips_exception ++ ++ .org 0x400 ++ /* Catch interrupt exceptions */ ++ uhi_mips_exception ++ ++ .org 0x480 ++ /* EJTAG debug exception */ ++1: b 1b ++ nop ++ ++ .org 0x500 ++ ++reset: ++ /* Set KSEG0 to Uncached */ ++ mfc0 t0, CP0_CONFIG ++ ins t0, zero, 0, 3 ++ ori t0, t0, CONF_CM_UNCACHED ++ mtc0 t0, CP0_CONFIG ++ ehb ++ ++ /* Check for CPU number */ ++ mfc0 t0, CP0_EBASE ++ and t0, t0, MIPS_EBASE_CPUNUM ++ beqz t0, 1f ++ nop ++ ++ /* Secondary core goes to specified SPL entry address */ ++ li t0, KSEG1ADDR(SYSCTL_BASE) ++ lw t0, BOOT_SRAM_BASE_REG(t0) ++ jr t0 ++ nop ++ ++ /* Init CP0 Status */ ++1: mfc0 t0, CP0_STATUS ++ and t0, ST0_IMPL ++ or t0, ST0_BEV | ST0_ERL ++ mtc0 t0, CP0_STATUS ++ nop ++ ++ /* Clear Watch Status bits and disable watch exceptions */ ++ li t1, 0x7 # Clear I, R and W conditions ++ init_wr 0 ++ init_wr 1 ++ init_wr 2 ++ init_wr 3 ++ ++ /* Clear WP, IV and SW interrupts */ ++ mtc0 zero, CP0_CAUSE ++ ++ /* Clear timer interrupt (CP0_COUNT cleared on branch to 'reset') */ ++ mtc0 zero, CP0_COMPARE ++ ++ /* Setup basic CPS */ ++ bal mips_cm_map ++ nop ++ ++ li t0, KSEG1ADDR(CONFIG_MIPS_CM_BASE) ++ li t1, GCR_REG0_BASE_VALUE ++ sw t1, GCR_REG0_BASE(t0) ++ ++ li t1, ((GCR_REG0_MASK_VALUE << GCR_REGn_MASK_ADDRMASK_SHIFT) | \ ++ GCR_REGn_MASK_CMTGT_IOCU0) ++ sw t1, GCR_REG0_MASK(t0) ++ ++ lw t1, GCR_BASE(t0) ++ ins t1, zero, 0, 2 # CM_DEFAULT_TARGET ++ sw t1, GCR_BASE(t0) ++ ++ lw t1, GCR_CONTROL(t0) ++ li t2, GCR_CONTROL_SYNCCTL ++ or t1, t1, t2 ++ sw t1, GCR_CONTROL(t0) ++ ++ /* Increase SPI frequency */ ++ li t0, KSEG1ADDR(SPI_BASE) ++ li t1, 5 ++ sw t1, SPI_SPACE_REG(t0) ++ ++ /* Set CPU clock to 500MHz */ ++ li t0, KSEG1ADDR(SYSCTL_BASE) ++ lw t1, SYSCTL_CLKCFG0_REG(t0) ++ ins t1, zero, 30, 2 # CPU_CLK_SEL ++ sw t1, SYSCTL_CLKCFG0_REG(t0) ++ ++ /* Set CPU clock divider to 1/1 */ ++ li t0, KSEG1ADDR(RBUS_BASE) ++ li t1, 0x101 ++ sw t1, RBUS_DYN_CFG0_REG(t0) ++ ++ /* Initialize the SRAM */ ++ bal mips_sram_init ++ nop ++ ++ /* Set up initial stack */ ++ li sp, SP_ADDR_TEMP ++ ++ bal tpl_main ++ nop ++ ++ END(_start) +--- /dev/null ++++ b/arch/mips/mach-mtmips/mt7621/tpl/tpl.c +@@ -0,0 +1,144 @@ ++// SPDX-License-Identifier: GPL-2.0 ++/* ++ * Copyright (C) 2022 MediaTek Inc. All rights reserved. ++ * ++ * Author: Weijie Gao ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#define INDEX_STORE_DATA_SD 0x0f ++ ++typedef void __noreturn (*image_entry_noargs_t)(void); ++ ++/* ++ * Lock L2 cache and fill data ++ * Assume that data is 4-byte aligned and start_addr/size is 32-byte aligned ++ */ ++static void fill_lock_l2cache(uintptr_t dataptr, ulong start_addr, ulong size) ++{ ++ ulong slsize = CONFIG_SYS_DCACHE_LINE_SIZE; ++ ulong end_addr = start_addr + size; ++ const u32 *data = (u32 *)dataptr; ++ ulong i, addr; ++ u32 val; ++ ++ /* Clear WSC & SPR bit in ErrCtl */ ++ val = read_c0_ecc(); ++ val &= 0xcfffffff; ++ write_c0_ecc(val); ++ execution_hazard_barrier(); ++ ++ for (addr = start_addr; addr < end_addr; addr += slsize) { ++ /* Set STagLo to lock cache line */ ++ write_c0_staglo((addr & 0x1ffff800) | 0xa0); ++ mips_cache(INDEX_STORE_TAG_SD, (void *)addr); ++ ++ /* Fill data */ ++ for (i = 0; i < slsize; i += 8) { ++ val = *data++; ++ __write_32bit_c0_register($28, 5, val); /* sdtaglo */ ++ val = *data++; ++ __write_32bit_c0_register($29, 5, val); /* sdtaghi */ ++ mips_cache(INDEX_STORE_DATA_SD, (void *)(addr + i)); ++ } ++ } ++ ++ sync(); ++} ++ ++/* A simple function to initialize MT7621's cache */ ++static void mt7621_cache_init(void) ++{ ++ void __iomem *cm_base = (void *)KSEG1ADDR(CONFIG_MIPS_CM_BASE); ++ ulong lsize = CONFIG_SYS_DCACHE_LINE_SIZE; ++ ulong addr; ++ u32 val; ++ ++ /* Enable CCA override. Set to uncached */ ++ val = readl(cm_base + GCR_BASE); ++ val &= ~CCA_DEFAULT_OVR_MASK; ++ val |= CCA_DEFAULT_OVREN | (2 << CCA_DEFAULT_OVR_SHIFT); ++ writel(val, cm_base + GCR_BASE); ++ ++ /* Initialize L1 I-Cache */ ++ write_c0_taglo(0); ++ write_c0_taghi(0); ++ ++ for (addr = 0; addr < CONFIG_SYS_ICACHE_SIZE; addr += lsize) ++ mips_cache(INDEX_STORE_TAG_I, (void *)addr); ++ ++ /* Initialize L1 D-Cache */ ++ write_c0_dtaglo(0); ++ __write_32bit_c0_register($29, 2, 0); /* dtaghi */ ++ ++ for (addr = 0; addr < CONFIG_SYS_DCACHE_SIZE; addr += lsize) ++ mips_cache(INDEX_STORE_TAG_D, (void *)addr); ++ ++ /* Initialize L2 Cache */ ++ write_c0_staglo(0); ++ __write_32bit_c0_register($29, 4, 0); /* staghi */ ++ ++ for (addr = 0; addr < (256 << 10); addr += lsize) ++ mips_cache(INDEX_STORE_TAG_SD, (void *)addr); ++ ++ /* Dsiable CCA override */ ++ val = readl(cm_base + GCR_BASE); ++ val &= ~(CCA_DEFAULT_OVR_MASK | CCA_DEFAULT_OVREN); ++ writel(val, cm_base + GCR_BASE); ++ ++ /* Set KSEG0 to non-coherent cached (important!) */ ++ val = read_c0_config(); ++ val &= ~CONF_CM_CMASK; ++ val |= CONF_CM_CACHABLE_NONCOHERENT; ++ write_c0_config(val); ++ execution_hazard_barrier(); ++ ++ /* Again, invalidate L1 D-Cache */ ++ for (addr = 0; addr < CONFIG_SYS_DCACHE_SIZE; addr += lsize) ++ mips_cache(INDEX_WRITEBACK_INV_D, (void *)addr); ++ ++ /* Invalidate L1 I-Cache */ ++ for (addr = 0; addr < CONFIG_SYS_ICACHE_SIZE; addr += lsize) ++ mips_cache(INDEX_INVALIDATE_I, (void *)addr); ++ ++ /* Disable L2 cache bypass */ ++ val = read_c0_config2(); ++ val &= ~MIPS_CONF_IMPL; ++ write_c0_config2(val); ++ execution_hazard_barrier(); ++} ++ ++void __noreturn tpl_main(void) ++{ ++ const image_header_t *hdr = (const image_header_t *)__image_copy_end; ++ image_entry_noargs_t image_entry; ++ u32 loadaddr, size; ++ uintptr_t data; ++ ++ /* Initialize the cache first */ ++ mt7621_cache_init(); ++ ++ if (image_get_magic(hdr) != IH_MAGIC) ++ goto failed; ++ ++ loadaddr = image_get_load(hdr); ++ size = image_get_size(hdr); ++ image_entry = (image_entry_noargs_t)image_get_ep(hdr); ++ ++ /* Load TPL image to L2 cache */ ++ data = (uintptr_t)__image_copy_end + sizeof(struct image_header); ++ fill_lock_l2cache(data, loadaddr, size); ++ ++ /* Jump to SPL */ ++ image_entry(); ++ ++failed: ++ for (;;) ++ ; ++} +--- /dev/null ++++ b/include/configs/mt7621.h +@@ -0,0 +1,65 @@ ++/* SPDX-License-Identifier: GPL-2.0 */ ++/* ++ * Copyright (C) 2022 MediaTek Inc. All rights reserved. ++ * ++ * Author: Weijie Gao ++ */ ++ ++#ifndef __CONFIG_MT7621_H ++#define __CONFIG_MT7621_H ++ ++#define CONFIG_SYS_MIPS_TIMER_FREQ 440000000 ++ ++#define CONFIG_SYS_BOOTPARAMS_LEN 0x20000 ++ ++#define CONFIG_SYS_SDRAM_BASE 0x80000000 ++ ++#define CONFIG_VERY_BIG_RAM ++#define CONFIG_MAX_MEM_MAPPED 0x1c000000 ++ ++#define CONFIG_SYS_INIT_SP_OFFSET 0x800000 ++ ++#define CONFIG_SYS_BOOTM_LEN 0x2000000 ++ ++#define CONFIG_SYS_MAXARGS 16 ++#define CONFIG_SYS_CBSIZE 1024 ++ ++#define CONFIG_SYS_NONCACHED_MEMORY 0x100000 ++ ++/* MMC */ ++#define MMC_SUPPORTS_TUNING ++ ++/* NAND */ ++#define CONFIG_SYS_MAX_NAND_DEVICE 1 ++ ++/* Serial SPL */ ++#if defined(CONFIG_SPL_BUILD) && defined(CONFIG_SPL_SERIAL) ++#define CONFIG_SYS_NS16550_MEM32 ++#define CONFIG_SYS_NS16550_CLK 50000000 ++#define CONFIG_SYS_NS16550_REG_SIZE -4 ++#define CONFIG_SYS_NS16550_COM1 0xbe000c00 ++#endif ++ ++/* Serial common */ ++#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, \ ++ 230400, 460800, 921600 } ++ ++/* SPL */ ++#define CONFIG_SYS_UBOOT_START CONFIG_SYS_TEXT_BASE ++ ++#ifdef CONFIG_TPL_BUILD ++#define CONFIG_SPL_START_S_PATH "arch/mips/mach-mtmips/mt7621/tpl" ++/* .bss will not be used by TPL */ ++#define CONFIG_SPL_BSS_START_ADDR 0x80000000 ++#define CONFIG_SPL_BSS_MAX_SIZE 0 ++#else ++#define CONFIG_SPL_START_S_PATH "arch/mips/mach-mtmips/mt7621/spl" ++#define CONFIG_SPL_BSS_START_ADDR 0x80140000 ++#define CONFIG_SPL_BSS_MAX_SIZE 0x80000 ++#define CONFIG_SPL_MAX_SIZE 0x30000 ++#endif ++ ++/* Dummy value */ ++#define CONFIG_SYS_UBOOT_BASE 0 ++ ++#endif /* __CONFIG_MT7621_H */ diff --git a/package/boot/uboot-mediatek/patches/001-mtk-0006-mips-mtmips-add-two-reference-boards-for-mt7621.patch b/package/boot/uboot-mediatek/patches/001-mtk-0006-mips-mtmips-add-two-reference-boards-for-mt7621.patch new file mode 100644 index 0000000000..dcf3be696e --- /dev/null +++ b/package/boot/uboot-mediatek/patches/001-mtk-0006-mips-mtmips-add-two-reference-boards-for-mt7621.patch @@ -0,0 +1,428 @@ +From b1549087ecd1eb53f6173b17b473134fd6cca157 Mon Sep 17 00:00:00 2001 +From: Weijie Gao +Date: Fri, 20 May 2022 11:22:26 +0800 +Subject: [PATCH 06/25] mips: mtmips: add two reference boards for mt7621 + +The mt7621_rfb board supports integrated giga PHYs plus one external +giga PHYs. It also has up to 512MiB DDR3, 16MB SPI-NOR, 3 mini PCI-e x1 +slots, SDXC and USB. + +The mt7621_nand_rfb board is almost the same as mt7621_rfb board, but it +uses NAND flash and SDXC is not available. + +Reviewed-by: Stefan Roese +Reviewed-by: Daniel Schwierzeck +Signed-off-by: Weijie Gao +--- + arch/mips/dts/Makefile | 2 + + arch/mips/dts/mediatek,mt7621-nand-rfb.dts | 67 +++++++++++++++++ + arch/mips/dts/mediatek,mt7621-rfb.dts | 82 +++++++++++++++++++++ + arch/mips/mach-mtmips/mt7621/Kconfig | 20 +++++ + board/mediatek/mt7621/MAINTAINERS | 8 ++ + board/mediatek/mt7621/Makefile | 3 + + board/mediatek/mt7621/board.c | 6 ++ + configs/mt7621_nand_rfb_defconfig | 85 ++++++++++++++++++++++ + configs/mt7621_rfb_defconfig | 82 +++++++++++++++++++++ + 9 files changed, 355 insertions(+) + create mode 100644 arch/mips/dts/mediatek,mt7621-nand-rfb.dts + create mode 100644 arch/mips/dts/mediatek,mt7621-rfb.dts + create mode 100644 board/mediatek/mt7621/MAINTAINERS + create mode 100644 board/mediatek/mt7621/Makefile + create mode 100644 board/mediatek/mt7621/board.c + create mode 100644 configs/mt7621_nand_rfb_defconfig + create mode 100644 configs/mt7621_rfb_defconfig + +--- a/arch/mips/dts/Makefile ++++ b/arch/mips/dts/Makefile +@@ -16,6 +16,8 @@ dtb-$(CONFIG_BOARD_COMTREND_WAP5813N) += + dtb-$(CONFIG_BOARD_HUAWEI_HG556A) += huawei,hg556a.dtb + dtb-$(CONFIG_BOARD_MT7620_RFB) += mediatek,mt7620-rfb.dtb + dtb-$(CONFIG_BOARD_MT7620_MT7530_RFB) += mediatek,mt7620-mt7530-rfb.dtb ++dtb-$(CONFIG_BOARD_MT7621_RFB) += mediatek,mt7621-rfb.dtb ++dtb-$(CONFIG_BOARD_MT7621_NAND_RFB) += mediatek,mt7621-nand-rfb.dtb + dtb-$(CONFIG_BOARD_MT7628_RFB) += mediatek,mt7628-rfb.dtb + dtb-$(CONFIG_BOARD_GARDENA_SMART_GATEWAY_MT7688) += gardena-smart-gateway-mt7688.dtb + dtb-$(CONFIG_BOARD_LINKIT_SMART_7688) += linkit-smart-7688.dtb +--- /dev/null ++++ b/arch/mips/dts/mediatek,mt7621-nand-rfb.dts +@@ -0,0 +1,67 @@ ++// SPDX-License-Identifier: GPL-2.0 ++/* ++ * Copyright (C) 2022 MediaTek Inc. All rights reserved. ++ * ++ * Author: Weijie Gao ++ */ ++ ++/dts-v1/; ++ ++#include "mt7621.dtsi" ++ ++/ { ++ compatible = "mediatek,mt7621-nand-rfb", "mediatek,mt7621-soc"; ++ model = "MediaTek MT7621 RFB (NAND)"; ++ ++ aliases { ++ serial0 = &uart0; ++ }; ++ ++ chosen { ++ stdout-path = &uart0; ++ }; ++}; ++ ++&pinctrl { ++ state_default: pin_state { ++ nand { ++ groups = "spi", "sdxc"; ++ function = "nand"; ++ }; ++ ++ gpios { ++ groups = "i2c", "uart3", "pcie reset"; ++ function = "gpio"; ++ }; ++ ++ wdt { ++ groups = "wdt"; ++ function = "wdt rst"; ++ }; ++ ++ jtag { ++ groups = "jtag"; ++ function = "jtag"; ++ }; ++ }; ++}; ++ ++&uart0 { ++ status = "okay"; ++}; ++ ++&gpio { ++ status = "okay"; ++}; ++ ++ð { ++ status = "okay"; ++}; ++ ++&ssusb { ++ status = "okay"; ++}; ++ ++&u3phy { ++ status = "okay"; ++}; +--- /dev/null ++++ b/arch/mips/dts/mediatek,mt7621-rfb.dts +@@ -0,0 +1,82 @@ ++// SPDX-License-Identifier: GPL-2.0 ++/* ++ * Copyright (C) 2022 MediaTek Inc. All rights reserved. ++ * ++ * Author: Weijie Gao ++ */ ++ ++/dts-v1/; ++ ++#include "mt7621.dtsi" ++ ++/ { ++ compatible = "mediatek,mt7621-rfb", "mediatek,mt7621-soc"; ++ model = "MediaTek MT7621 RFB (SPI-NOR)"; ++ ++ aliases { ++ serial0 = &uart0; ++ spi0 = &spi; ++ }; ++ ++ chosen { ++ stdout-path = &uart0; ++ }; ++}; ++ ++&pinctrl { ++ state_default: pin_state { ++ gpios { ++ groups = "i2c", "uart3", "pcie reset"; ++ function = "gpio"; ++ }; ++ ++ wdt { ++ groups = "wdt"; ++ function = "wdt rst"; ++ }; ++ ++ jtag { ++ groups = "jtag"; ++ function = "jtag"; ++ }; ++ }; ++}; ++ ++&uart0 { ++ status = "okay"; ++}; ++ ++&gpio { ++ status = "okay"; ++}; ++ ++&spi { ++ status = "okay"; ++ num-cs = <2>; ++ ++ spi-flash@0 { ++ #address-cells = <1>; ++ #size-cells = <1>; ++ compatible = "jedec,spi-nor"; ++ spi-max-frequency = <25000000>; ++ reg = <0>; ++ }; ++}; ++ ++ð { ++ status = "okay"; ++}; ++ ++&mmc { ++ cap-sd-highspeed; ++ ++ status = "okay"; ++}; ++ ++&ssusb { ++ status = "okay"; ++}; ++ ++&u3phy { ++ status = "okay"; ++}; +--- a/arch/mips/mach-mtmips/mt7621/Kconfig ++++ b/arch/mips/mach-mtmips/mt7621/Kconfig +@@ -79,6 +79,26 @@ config MT7621_BOOT_FROM_NAND + choice + prompt "Board select" + ++config BOARD_MT7621_RFB ++ bool "MediaTek MT7621 RFB (SPI-NOR)" ++ help ++ The reference design of MT7621A (WS3010) booting from SPI-NOR flash. ++ The board can be configured with DDR2 (64MiB~256MiB) or DDR3 ++ (128MiB~512MiB). The board has 16 MiB SPI-NOR flash, built-in MT7530 ++ GbE switch, 1 UART, 1 USB 2.0 host, 1 USB 3.0 host, 1 SDXC, 3 PCIe ++ sockets, 1 RGMII to external GbE PHY, 2 audio jacks (in/out), ++ JTAG pins and expansion GPIO pins. ++ ++config BOARD_MT7621_NAND_RFB ++ bool "MediaTek MT7621 RFB (NAND)" ++ help ++ The reference design of MT7621A (WS3010) booting from NAND flash. ++ The board can be configured with DDR2 (64MiB~256MiB) or DDR3 ++ (128MiB~512MiB). The board has 128 MiB parallel NAND flash, built-in ++ MT7530 GbE switch, 1 UART, 1 USB 2.0 host, 1 USB 3.0 host, 3 PCIe ++ sockets, 1 RGMII to external GbE PHY, 2 audio jacks (in/out), ++ JTAG pins and expansion GPIO pins. ++ + endchoice + + config SYS_CONFIG_NAME +--- /dev/null ++++ b/board/mediatek/mt7621/MAINTAINERS +@@ -0,0 +1,8 @@ ++MT7621_RFB BOARD ++M: Weijie Gao ++S: Maintained ++F: board/mediatek/mt7621 ++F: configs/mt7621_rfb_defconfig ++F: configs/mt7621_nand_rfb_defconfig ++F: arch/mips/dts/mediatek,mt7621-rfb.dts ++F: arch/mips/dts/mediatek,mt7621-nand-rfb.dts +--- /dev/null ++++ b/board/mediatek/mt7621/Makefile +@@ -0,0 +1,3 @@ ++# SPDX-License-Identifier: GPL-2.0 ++ ++obj-y += board.o +--- /dev/null ++++ b/board/mediatek/mt7621/board.c +@@ -0,0 +1,6 @@ ++// SPDX-License-Identifier: GPL-2.0 ++/* ++ * Copyright (C) 2022 MediaTek Inc. All rights reserved. ++ * ++ * Author: Weijie Gao ++ */ +--- /dev/null ++++ b/configs/mt7621_nand_rfb_defconfig +@@ -0,0 +1,85 @@ ++CONFIG_MIPS=y ++CONFIG_SYS_MALLOC_LEN=0x100000 ++CONFIG_SPL_LIBCOMMON_SUPPORT=y ++CONFIG_SPL_LIBGENERIC_SUPPORT=y ++CONFIG_NR_DRAM_BANKS=1 ++CONFIG_ENV_SIZE=0x1000 ++CONFIG_DEFAULT_DEVICE_TREE="mediatek,mt7621-nand-rfb" ++CONFIG_SPL_SERIAL=y ++CONFIG_SPL_SYS_MALLOC_F_LEN=0x100000 ++CONFIG_SPL=y ++CONFIG_DEBUG_UART_BASE=0xbe000c00 ++CONFIG_DEBUG_UART_CLOCK=50000000 ++CONFIG_SYS_LOAD_ADDR=0x83000000 ++CONFIG_ARCH_MTMIPS=y ++CONFIG_SOC_MT7621=y ++CONFIG_MT7621_BOOT_FROM_NAND=y ++CONFIG_BOARD_MT7621_NAND_RFB=y ++# CONFIG_MIPS_CACHE_SETUP is not set ++# CONFIG_MIPS_CACHE_DISABLE is not set ++CONFIG_RESTORE_EXCEPTION_VECTOR_BASE=y ++CONFIG_MIPS_BOOT_FDT=y ++CONFIG_DEBUG_UART=y ++CONFIG_FIT=y ++# CONFIG_ARCH_FIXUP_FDT_MEMORY is not set ++CONFIG_SYS_CONSOLE_INFO_QUIET=y ++CONFIG_SPL_SYS_MALLOC_SIMPLE=y ++CONFIG_SPL_NAND_SUPPORT=y ++CONFIG_SPL_NAND_BASE=y ++CONFIG_SPL_NAND_IDENT=y ++# CONFIG_BOOTM_NETBSD is not set ++# CONFIG_BOOTM_PLAN9 is not set ++# CONFIG_BOOTM_RTEMS is not set ++# CONFIG_BOOTM_VXWORKS is not set ++# CONFIG_CMD_ELF is not set ++# CONFIG_CMD_XIMG is not set ++# CONFIG_CMD_CRC32 is not set ++# CONFIG_CMD_DM is not set ++# CONFIG_CMD_FLASH is not set ++CONFIG_CMD_GPIO=y ++# CONFIG_CMD_LOADS is not set ++CONFIG_CMD_MMC=y ++CONFIG_CMD_MTD=y ++CONFIG_CMD_PART=y ++# CONFIG_CMD_PINMUX is not set ++CONFIG_CMD_USB=y ++# CONFIG_CMD_NFS is not set ++CONFIG_CMD_FAT=y ++CONFIG_CMD_FS_GENERIC=y ++# CONFIG_SPL_DOS_PARTITION is not set ++# CONFIG_ISO_PARTITION is not set ++CONFIG_EFI_PARTITION=y ++# CONFIG_SPL_EFI_PARTITION is not set ++CONFIG_PARTITION_TYPE_GUID=y ++CONFIG_SYS_RELOC_GD_ENV_ADDR=y ++CONFIG_NET_RANDOM_ETHADDR=y ++# CONFIG_I2C is not set ++# CONFIG_INPUT is not set ++CONFIG_MMC=y ++# CONFIG_MMC_QUIRKS is not set ++# CONFIG_MMC_HW_PARTITIONING is not set ++CONFIG_MMC_MTK=y ++CONFIG_MTD=y ++CONFIG_DM_MTD=y ++CONFIG_MTD_RAW_NAND=y ++CONFIG_NAND_MT7621=y ++CONFIG_SYS_NAND_ONFI_DETECTION=y ++CONFIG_SYS_NAND_U_BOOT_LOCATIONS=y ++CONFIG_SYS_NAND_U_BOOT_OFFS=0x0 ++CONFIG_MEDIATEK_ETH=y ++CONFIG_PHY=y ++CONFIG_PHY_MTK_TPHY=y ++CONFIG_DEBUG_UART_SHIFT=2 ++CONFIG_SYSRESET=y ++CONFIG_SYSRESET_RESETCTL=y ++CONFIG_USB=y ++CONFIG_USB_XHCI_HCD=y ++CONFIG_USB_XHCI_MTK=y ++CONFIG_USB_STORAGE=y ++CONFIG_WDT=y ++CONFIG_WDT_MT7621=y ++CONFIG_FAT_WRITE=y ++# CONFIG_BINMAN_FDT is not set ++CONFIG_LZMA=y ++# CONFIG_GZIP is not set ++CONFIG_SPL_LZMA=y +--- /dev/null ++++ b/configs/mt7621_rfb_defconfig +@@ -0,0 +1,82 @@ ++CONFIG_MIPS=y ++CONFIG_SYS_MALLOC_LEN=0x100000 ++CONFIG_SPL_LIBCOMMON_SUPPORT=y ++CONFIG_SPL_LIBGENERIC_SUPPORT=y ++CONFIG_NR_DRAM_BANKS=1 ++CONFIG_ENV_SIZE=0x1000 ++CONFIG_DEFAULT_DEVICE_TREE="mediatek,mt7621-rfb" ++CONFIG_SPL_SERIAL=y ++CONFIG_SPL_SYS_MALLOC_F_LEN=0x40000 ++CONFIG_SPL=y ++CONFIG_DEBUG_UART_BASE=0xbe000c00 ++CONFIG_DEBUG_UART_CLOCK=50000000 ++CONFIG_SYS_LOAD_ADDR=0x83000000 ++CONFIG_ARCH_MTMIPS=y ++CONFIG_SOC_MT7621=y ++# CONFIG_MIPS_CACHE_SETUP is not set ++# CONFIG_MIPS_CACHE_DISABLE is not set ++CONFIG_RESTORE_EXCEPTION_VECTOR_BASE=y ++CONFIG_MIPS_BOOT_FDT=y ++CONFIG_DEBUG_UART=y ++CONFIG_TPL_SYS_MALLOC_F_LEN=0x1000 ++CONFIG_FIT=y ++# CONFIG_ARCH_FIXUP_FDT_MEMORY is not set ++CONFIG_SYS_CONSOLE_INFO_QUIET=y ++CONFIG_SPL_SYS_MALLOC_SIMPLE=y ++CONFIG_SPL_NOR_SUPPORT=y ++CONFIG_TPL=y ++# CONFIG_TPL_FRAMEWORK is not set ++# CONFIG_BOOTM_NETBSD is not set ++# CONFIG_BOOTM_PLAN9 is not set ++# CONFIG_BOOTM_RTEMS is not set ++# CONFIG_BOOTM_VXWORKS is not set ++# CONFIG_CMD_ELF is not set ++# CONFIG_CMD_XIMG is not set ++# CONFIG_CMD_CRC32 is not set ++# CONFIG_CMD_DM is not set ++CONFIG_CMD_GPIO=y ++# CONFIG_CMD_LOADS is not set ++CONFIG_CMD_MMC=y ++CONFIG_CMD_PART=y ++# CONFIG_CMD_PINMUX is not set ++CONFIG_CMD_SPI=y ++# CONFIG_CMD_NFS is not set ++CONFIG_DOS_PARTITION=y ++# CONFIG_SPL_DOS_PARTITION is not set ++# CONFIG_ISO_PARTITION is not set ++CONFIG_EFI_PARTITION=y ++# CONFIG_SPL_EFI_PARTITION is not set ++CONFIG_PARTITION_TYPE_GUID=y ++CONFIG_SYS_RELOC_GD_ENV_ADDR=y ++CONFIG_NET_RANDOM_ETHADDR=y ++# CONFIG_I2C is not set ++# CONFIG_INPUT is not set ++CONFIG_MMC=y ++# CONFIG_MMC_QUIRKS is not set ++# CONFIG_MMC_HW_PARTITIONING is not set ++CONFIG_MMC_MTK=y ++CONFIG_SF_DEFAULT_SPEED=20000000 ++CONFIG_SPI_FLASH_BAR=y ++CONFIG_SPI_FLASH_EON=y ++CONFIG_SPI_FLASH_GIGADEVICE=y ++CONFIG_SPI_FLASH_ISSI=y ++CONFIG_SPI_FLASH_MACRONIX=y ++CONFIG_SPI_FLASH_SPANSION=y ++CONFIG_SPI_FLASH_STMICRO=y ++CONFIG_SPI_FLASH_WINBOND=y ++CONFIG_SPI_FLASH_XMC=y ++CONFIG_SPI_FLASH_XTX=y ++CONFIG_MEDIATEK_ETH=y ++CONFIG_PHY=y ++CONFIG_PHY_MTK_TPHY=y ++CONFIG_DEBUG_UART_SHIFT=2 ++CONFIG_SPI=y ++CONFIG_MT7621_SPI=y ++CONFIG_SYSRESET=y ++CONFIG_SYSRESET_RESETCTL=y ++CONFIG_WDT=y ++CONFIG_WDT_MT7621=y ++# CONFIG_BINMAN_FDT is not set ++CONFIG_LZMA=y ++# CONFIG_GZIP is not set ++CONFIG_SPL_LZMA=y diff --git a/package/boot/uboot-mediatek/patches/001-mtk-0007-doc-mediatek-add-documentation-for-mt7621-reference-.patch b/package/boot/uboot-mediatek/patches/001-mtk-0007-doc-mediatek-add-documentation-for-mt7621-reference-.patch new file mode 100644 index 0000000000..748a6d9bc6 --- /dev/null +++ b/package/boot/uboot-mediatek/patches/001-mtk-0007-doc-mediatek-add-documentation-for-mt7621-reference-.patch @@ -0,0 +1,93 @@ +From 3fed02d930597c53f1c8500aff14581bb87a1e3d Mon Sep 17 00:00:00 2001 +From: Weijie Gao +Date: Fri, 20 May 2022 11:22:31 +0800 +Subject: [PATCH 07/25] doc: mediatek: add documentation for mt7621 reference + boards + +The MT7621 requires external binary blob being executed during u-boot's +boot-up flow. It's necessary to provide a guide here for users to correctly +build the u-boot. + +Reviewed-by: Daniel Schwierzeck +Signed-off-by: Weijie Gao +--- + doc/board/index.rst | 1 + + doc/board/mediatek/index.rst | 9 +++++++ + doc/board/mediatek/mt7621.rst | 48 +++++++++++++++++++++++++++++++++++ + 3 files changed, 58 insertions(+) + create mode 100644 doc/board/mediatek/index.rst + create mode 100644 doc/board/mediatek/mt7621.rst + +--- a/doc/board/index.rst ++++ b/doc/board/index.rst +@@ -23,6 +23,7 @@ Board-specific doc + highbank/index + intel/index + kontron/index ++ mediatek/index + microchip/index + nokia/index + nxp/index +--- /dev/null ++++ b/doc/board/mediatek/index.rst +@@ -0,0 +1,9 @@ ++.. SPDX-License-Identifier: GPL-2.0+ ++ ++Mediatek ++========= ++ ++.. toctree:: ++ :maxdepth: 2 ++ ++ mt7621 +--- /dev/null ++++ b/doc/board/mediatek/mt7621.rst +@@ -0,0 +1,48 @@ ++.. SPDX-License-Identifier: GPL-2.0 ++ ++mt7621_rfb/mt7621_nand_rfb ++========================== ++ ++U-Boot for the MediaTek MT7621 boards ++ ++Quick Start ++----------- ++ ++- Get the DDR initialization binary blob ++- Configure CPU and DDR parameters ++- Build U-Boot ++ ++Get the DDR initialization binary blob ++-------------------------------------- ++ ++Download one from: ++ - https://raw.githubusercontent.com/mtk-openwrt/mt7621-lowlevel-preloader/master/mt7621_stage_sram.bin ++ - https://raw.githubusercontent.com/mtk-openwrt/mt7621-lowlevel-preloader/master/mt7621_stage_sram_noprint.bin ++ ++mt7621_stage_sram_noprint.bin has removed all output logs. To use this one, ++download and rename it to mt7621_stage_sram.bin ++ ++Put the binary blob to the u-boot build directory. ++ ++Configure CPU and DDR parameters ++-------------------------------- ++ ++menuconfig > MIPS architecture > MediaTek MIPS platforms > CPU & DDR configuration ++ ++Select the correct DDR timing parameters for your board. The size shown here ++must match the DDR size of you board. ++ ++The frequency of CPU and DDR can also be adjusted. ++ ++Build U-Boot ++------------ ++ ++.. code-block:: bash ++ ++ $ export CROSS_COMPILE=mipsel-linux- ++ $ make O=build mt7621_rfb_defconfig # or mt7621_nand_rfb_defconfig ++ $ cp mt7621_stage_sram.bin ./build/mt7621_stage_sram.bin ++ $ # or cp mt7621_stage_sram_noprint.bin ./build/mt7621_stage_sram.bin ++ $ make O=build ++ ++Burn the u-boot-mt7621.bin to the SPI-NOR or NAND flash. diff --git a/package/boot/uboot-mediatek/patches/001-mtk-0008-clk-mtmips-add-clock-driver-for-MediaTek-MT7621-SoC.patch b/package/boot/uboot-mediatek/patches/001-mtk-0008-clk-mtmips-add-clock-driver-for-MediaTek-MT7621-SoC.patch new file mode 100644 index 0000000000..78a07e92ec --- /dev/null +++ b/package/boot/uboot-mediatek/patches/001-mtk-0008-clk-mtmips-add-clock-driver-for-MediaTek-MT7621-SoC.patch @@ -0,0 +1,367 @@ +From c2e579662748cb5d3bf3e31f58d99c4db4d102c1 Mon Sep 17 00:00:00 2001 +From: Weijie Gao +Date: Fri, 20 May 2022 11:22:36 +0800 +Subject: [PATCH 08/25] clk: mtmips: add clock driver for MediaTek MT7621 SoC + +This patch adds a clock driver for MediaTek MT7621 SoC. +This driver provides clock gate control as well as getting clock frequency +for CPU/SYS/XTAL and some peripherals. + +Reviewed-by: Sean Anderson +Signed-off-by: Weijie Gao +--- + drivers/clk/mtmips/Makefile | 1 + + drivers/clk/mtmips/clk-mt7621.c | 288 +++++++++++++++++++++++++ + include/dt-bindings/clock/mt7621-clk.h | 46 ++++ + 3 files changed, 335 insertions(+) + create mode 100644 drivers/clk/mtmips/clk-mt7621.c + create mode 100644 include/dt-bindings/clock/mt7621-clk.h + +--- a/drivers/clk/mtmips/Makefile ++++ b/drivers/clk/mtmips/Makefile +@@ -1,4 +1,5 @@ + # SPDX-License-Identifier: GPL-2.0 + + obj-$(CONFIG_SOC_MT7620) += clk-mt7620.o ++obj-$(CONFIG_SOC_MT7621) += clk-mt7621.o + obj-$(CONFIG_SOC_MT7628) += clk-mt7628.o +--- /dev/null ++++ b/drivers/clk/mtmips/clk-mt7621.c +@@ -0,0 +1,288 @@ ++// SPDX-License-Identifier: GPL-2.0 ++/* ++ * Copyright (C) 2022 MediaTek Inc. All rights reserved. ++ * ++ * Author: Weijie Gao ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#define SYSC_MAP_SIZE 0x100 ++#define MEMC_MAP_SIZE 0x1000 ++ ++/* SYSC */ ++#define SYSCFG0_REG 0x10 ++#define XTAL_MODE_SEL GENMASK(8, 6) ++ ++#define CLKCFG0_REG 0x2c ++#define CPU_CLK_SEL GENMASK(31, 30) ++#define PERI_CLK_SEL BIT(4) ++ ++#define CLKCFG1_REG 0x30 ++ ++#define CUR_CLK_STS_REG 0x44 ++#define CUR_CPU_FDIV GENMASK(12, 8) ++#define CUR_CPU_FFRAC GENMASK(4, 0) ++ ++/* MEMC */ ++#define MEMPLL1_REG 0x0604 ++#define RG_MEPL_DIV2_SEL GENMASK(2, 1) ++ ++#define MEMPLL6_REG 0x0618 ++#define MEMPLL18_REG 0x0648 ++#define RG_MEPL_PREDIV GENMASK(13, 12) ++#define RG_MEPL_FBDIV GENMASK(10, 4) ++ ++/* Fixed 500M clock */ ++#define GMPLL_CLK 500000000 ++ ++struct mt7621_clk_priv { ++ void __iomem *sysc_base; ++ int cpu_clk; ++ int ddr_clk; ++ int sys_clk; ++ int xtal_clk; ++}; ++ ++enum mt7621_clk_src { ++ CLK_SRC_CPU, ++ CLK_SRC_DDR, ++ CLK_SRC_SYS, ++ CLK_SRC_XTAL, ++ CLK_SRC_PERI, ++ CLK_SRC_125M, ++ CLK_SRC_150M, ++ CLK_SRC_250M, ++ CLK_SRC_270M, ++ ++ __CLK_SRC_MAX ++}; ++ ++struct mt7621_clk_map { ++ u32 cgbit; ++ enum mt7621_clk_src clksrc; ++}; ++ ++#define CLK_MAP(_id, _cg, _src) \ ++ [_id] = { .cgbit = (_cg), .clksrc = (_src) } ++ ++#define CLK_MAP_SRC(_id, _src) \ ++ [_id] = { .cgbit = UINT32_MAX, .clksrc = (_src) } ++ ++static const struct mt7621_clk_map mt7621_clk_mappings[] = { ++ CLK_MAP_SRC(MT7621_CLK_XTAL, CLK_SRC_XTAL), ++ CLK_MAP_SRC(MT7621_CLK_CPU, CLK_SRC_CPU), ++ CLK_MAP_SRC(MT7621_CLK_BUS, CLK_SRC_SYS), ++ CLK_MAP_SRC(MT7621_CLK_50M, CLK_SRC_PERI), ++ CLK_MAP_SRC(MT7621_CLK_125M, CLK_SRC_125M), ++ CLK_MAP_SRC(MT7621_CLK_150M, CLK_SRC_150M), ++ CLK_MAP_SRC(MT7621_CLK_250M, CLK_SRC_250M), ++ CLK_MAP_SRC(MT7621_CLK_270M, CLK_SRC_270M), ++ ++ CLK_MAP(MT7621_CLK_HSDMA, 5, CLK_SRC_150M), ++ CLK_MAP(MT7621_CLK_FE, 6, CLK_SRC_250M), ++ CLK_MAP(MT7621_CLK_SP_DIVTX, 7, CLK_SRC_270M), ++ CLK_MAP(MT7621_CLK_TIMER, 8, CLK_SRC_PERI), ++ CLK_MAP(MT7621_CLK_PCM, 11, CLK_SRC_270M), ++ CLK_MAP(MT7621_CLK_PIO, 13, CLK_SRC_PERI), ++ CLK_MAP(MT7621_CLK_GDMA, 14, CLK_SRC_SYS), ++ CLK_MAP(MT7621_CLK_NAND, 15, CLK_SRC_125M), ++ CLK_MAP(MT7621_CLK_I2C, 16, CLK_SRC_PERI), ++ CLK_MAP(MT7621_CLK_I2S, 17, CLK_SRC_270M), ++ CLK_MAP(MT7621_CLK_SPI, 18, CLK_SRC_SYS), ++ CLK_MAP(MT7621_CLK_UART1, 19, CLK_SRC_PERI), ++ CLK_MAP(MT7621_CLK_UART2, 20, CLK_SRC_PERI), ++ CLK_MAP(MT7621_CLK_UART3, 21, CLK_SRC_PERI), ++ CLK_MAP(MT7621_CLK_ETH, 23, CLK_SRC_PERI), ++ CLK_MAP(MT7621_CLK_PCIE0, 24, CLK_SRC_125M), ++ CLK_MAP(MT7621_CLK_PCIE1, 25, CLK_SRC_125M), ++ CLK_MAP(MT7621_CLK_PCIE2, 26, CLK_SRC_125M), ++ CLK_MAP(MT7621_CLK_CRYPTO, 29, CLK_SRC_250M), ++ CLK_MAP(MT7621_CLK_SHXC, 30, CLK_SRC_PERI), ++ ++ CLK_MAP_SRC(MT7621_CLK_MAX, __CLK_SRC_MAX), ++ ++ CLK_MAP_SRC(MT7621_CLK_DDR, CLK_SRC_DDR), ++}; ++ ++static ulong mt7621_clk_get_rate(struct clk *clk) ++{ ++ struct mt7621_clk_priv *priv = dev_get_priv(clk->dev); ++ u32 val; ++ ++ switch (mt7621_clk_mappings[clk->id].clksrc) { ++ case CLK_SRC_CPU: ++ return priv->cpu_clk; ++ case CLK_SRC_DDR: ++ return priv->ddr_clk; ++ case CLK_SRC_SYS: ++ return priv->sys_clk; ++ case CLK_SRC_XTAL: ++ return priv->xtal_clk; ++ case CLK_SRC_PERI: ++ val = readl(priv->sysc_base + CLKCFG0_REG); ++ if (val & PERI_CLK_SEL) ++ return priv->xtal_clk; ++ else ++ return GMPLL_CLK / 10; ++ case CLK_SRC_125M: ++ return 125000000; ++ case CLK_SRC_150M: ++ return 150000000; ++ case CLK_SRC_250M: ++ return 250000000; ++ case CLK_SRC_270M: ++ return 270000000; ++ default: ++ return 0; ++ } ++} ++ ++static int mt7621_clk_enable(struct clk *clk) ++{ ++ struct mt7621_clk_priv *priv = dev_get_priv(clk->dev); ++ u32 cgbit; ++ ++ cgbit = mt7621_clk_mappings[clk->id].cgbit; ++ if (cgbit == UINT32_MAX) ++ return -ENOSYS; ++ ++ setbits_32(priv->sysc_base + CLKCFG1_REG, BIT(cgbit)); ++ ++ return 0; ++} ++ ++static int mt7621_clk_disable(struct clk *clk) ++{ ++ struct mt7621_clk_priv *priv = dev_get_priv(clk->dev); ++ u32 cgbit; ++ ++ cgbit = mt7621_clk_mappings[clk->id].cgbit; ++ if (cgbit == UINT32_MAX) ++ return -ENOSYS; ++ ++ clrbits_32(priv->sysc_base + CLKCFG1_REG, BIT(cgbit)); ++ ++ return 0; ++} ++ ++static int mt7621_clk_request(struct clk *clk) ++{ ++ if (clk->id >= ARRAY_SIZE(mt7621_clk_mappings)) ++ return -EINVAL; ++ return 0; ++} ++ ++const struct clk_ops mt7621_clk_ops = { ++ .request = mt7621_clk_request, ++ .enable = mt7621_clk_enable, ++ .disable = mt7621_clk_disable, ++ .get_rate = mt7621_clk_get_rate, ++}; ++ ++static void mt7621_get_clocks(struct mt7621_clk_priv *priv, struct regmap *memc) ++{ ++ u32 bs, xtal_sel, clkcfg0, cur_clk, mempll, dividx, fb; ++ u32 xtal_clk, xtal_div, ffiv, ffrac, cpu_clk, ddr_clk; ++ static const u32 xtal_div_tbl[] = {0, 1, 2, 2}; ++ ++ bs = readl(priv->sysc_base + SYSCFG0_REG); ++ clkcfg0 = readl(priv->sysc_base + CLKCFG0_REG); ++ cur_clk = readl(priv->sysc_base + CUR_CLK_STS_REG); ++ ++ xtal_sel = FIELD_GET(XTAL_MODE_SEL, bs); ++ ++ if (xtal_sel <= 2) ++ xtal_clk = 20 * 1000 * 1000; ++ else if (xtal_sel <= 5) ++ xtal_clk = 40 * 1000 * 1000; ++ else ++ xtal_clk = 25 * 1000 * 1000; ++ ++ switch (FIELD_GET(CPU_CLK_SEL, clkcfg0)) { ++ case 0: ++ cpu_clk = GMPLL_CLK; ++ break; ++ case 1: ++ regmap_read(memc, MEMPLL18_REG, &mempll); ++ dividx = FIELD_GET(RG_MEPL_PREDIV, mempll); ++ fb = FIELD_GET(RG_MEPL_FBDIV, mempll); ++ xtal_div = 1 << xtal_div_tbl[dividx]; ++ cpu_clk = (fb + 1) * xtal_clk / xtal_div; ++ break; ++ default: ++ cpu_clk = xtal_clk; ++ } ++ ++ ffiv = FIELD_GET(CUR_CPU_FDIV, cur_clk); ++ ffrac = FIELD_GET(CUR_CPU_FFRAC, cur_clk); ++ cpu_clk = cpu_clk / ffiv * ffrac; ++ ++ regmap_read(memc, MEMPLL6_REG, &mempll); ++ dividx = FIELD_GET(RG_MEPL_PREDIV, mempll); ++ fb = FIELD_GET(RG_MEPL_FBDIV, mempll); ++ xtal_div = 1 << xtal_div_tbl[dividx]; ++ ddr_clk = fb * xtal_clk / xtal_div; ++ ++ regmap_read(memc, MEMPLL1_REG, &bs); ++ if (!FIELD_GET(RG_MEPL_DIV2_SEL, bs)) ++ ddr_clk *= 2; ++ ++ priv->cpu_clk = cpu_clk; ++ priv->sys_clk = cpu_clk / 4; ++ priv->ddr_clk = ddr_clk; ++ priv->xtal_clk = xtal_clk; ++} ++ ++static int mt7621_clk_probe(struct udevice *dev) ++{ ++ struct mt7621_clk_priv *priv = dev_get_priv(dev); ++ struct ofnode_phandle_args args; ++ struct udevice *pdev; ++ struct regmap *memc; ++ int ret; ++ ++ pdev = dev_get_parent(dev); ++ if (!pdev) ++ return -ENODEV; ++ ++ priv->sysc_base = dev_remap_addr(pdev); ++ if (!priv->sysc_base) ++ return -EINVAL; ++ ++ /* get corresponding memc phandle */ ++ ret = dev_read_phandle_with_args(dev, "mediatek,memc", NULL, 0, 0, ++ &args); ++ if (ret) ++ return ret; ++ ++ memc = syscon_node_to_regmap(args.node); ++ if (IS_ERR(memc)) ++ return PTR_ERR(memc); ++ ++ mt7621_get_clocks(priv, memc); ++ ++ return 0; ++} ++ ++static const struct udevice_id mt7621_clk_ids[] = { ++ { .compatible = "mediatek,mt7621-clk" }, ++ { } ++}; ++ ++U_BOOT_DRIVER(mt7621_clk) = { ++ .name = "mt7621-clk", ++ .id = UCLASS_CLK, ++ .of_match = mt7621_clk_ids, ++ .probe = mt7621_clk_probe, ++ .priv_auto = sizeof(struct mt7621_clk_priv), ++ .ops = &mt7621_clk_ops, ++}; +--- /dev/null ++++ b/include/dt-bindings/clock/mt7621-clk.h +@@ -0,0 +1,46 @@ ++/* SPDX-License-Identifier: GPL-2.0 */ ++/* ++ * Copyright (C) 2022 MediaTek Inc. All rights reserved. ++ * ++ * Author: Weijie Gao ++ */ ++ ++#ifndef _DT_BINDINGS_MT7621_CLK_H_ ++#define _DT_BINDINGS_MT7621_CLK_H_ ++ ++#define MT7621_CLK_XTAL 0 ++#define MT7621_CLK_CPU 1 ++#define MT7621_CLK_BUS 2 ++#define MT7621_CLK_50M 3 ++#define MT7621_CLK_125M 4 ++#define MT7621_CLK_150M 5 ++#define MT7621_CLK_250M 6 ++#define MT7621_CLK_270M 7 ++ ++#define MT7621_CLK_HSDMA 8 ++#define MT7621_CLK_FE 9 ++#define MT7621_CLK_SP_DIVTX 10 ++#define MT7621_CLK_TIMER 11 ++#define MT7621_CLK_PCM 12 ++#define MT7621_CLK_PIO 13 ++#define MT7621_CLK_GDMA 14 ++#define MT7621_CLK_NAND 15 ++#define MT7621_CLK_I2C 16 ++#define MT7621_CLK_I2S 17 ++#define MT7621_CLK_SPI 18 ++#define MT7621_CLK_UART1 19 ++#define MT7621_CLK_UART2 20 ++#define MT7621_CLK_UART3 21 ++#define MT7621_CLK_ETH 22 ++#define MT7621_CLK_PCIE0 23 ++#define MT7621_CLK_PCIE1 24 ++#define MT7621_CLK_PCIE2 25 ++#define MT7621_CLK_CRYPTO 26 ++#define MT7621_CLK_SHXC 27 ++ ++#define MT7621_CLK_MAX 28 ++ ++/* for u-boot only */ ++#define MT7621_CLK_DDR 29 ++ ++#endif /* _DT_BINDINGS_MT7621_CLK_H_ */ diff --git a/package/boot/uboot-mediatek/patches/001-mtk-0009-reset-mtmips-add-reset-controller-support-for-MediaT.patch b/package/boot/uboot-mediatek/patches/001-mtk-0009-reset-mtmips-add-reset-controller-support-for-MediaT.patch new file mode 100644 index 0000000000..100b228c4f --- /dev/null +++ b/package/boot/uboot-mediatek/patches/001-mtk-0009-reset-mtmips-add-reset-controller-support-for-MediaT.patch @@ -0,0 +1,56 @@ +From 03035a6566300808c8845799b2f9ceca471aa61a Mon Sep 17 00:00:00 2001 +From: Weijie Gao +Date: Fri, 20 May 2022 11:22:41 +0800 +Subject: [PATCH 09/25] reset: mtmips: add reset controller support for + MediaTek MT7621 SoC + +This patch adds reset controller bits definition header file for MediaTek +MT7621 SoC + +Signed-off-by: Weijie Gao +--- + include/dt-bindings/reset/mt7621-reset.h | 38 ++++++++++++++++++++++++ + 1 file changed, 38 insertions(+) + create mode 100644 include/dt-bindings/reset/mt7621-reset.h + +--- /dev/null ++++ b/include/dt-bindings/reset/mt7621-reset.h +@@ -0,0 +1,38 @@ ++/* SPDX-License-Identifier: GPL-2.0 */ ++/* ++ * Copyright (C) 2022 MediaTek Inc. All rights reserved. ++ * ++ * Author: Weijie Gao ++ */ ++ ++#ifndef _DT_BINDINGS_MT7621_RESET_H_ ++#define _DT_BINDINGS_MT7621_RESET_H_ ++ ++#define RST_PPE 31 ++#define RST_SDXC 30 ++#define RST_CRYPTO 29 ++#define RST_AUX_STCK 28 ++#define RST_PCIE2 26 ++#define RST_PCIE1 25 ++#define RST_PCIE0 24 ++#define RST_GMAC 23 ++#define RST_UART3 21 ++#define RST_UART2 20 ++#define RST_UART1 19 ++#define RST_SPI 18 ++#define RST_I2S 17 ++#define RST_I2C 16 ++#define RST_NFI 15 ++#define RST_GDMA 14 ++#define RST_PIO 13 ++#define RST_PCM 11 ++#define RST_MC 10 ++#define RST_INTC 9 ++#define RST_TIMER 8 ++#define RST_SPDIFTX 7 ++#define RST_FE 6 ++#define RST_HSDMA 5 ++#define RST_MCM 2 ++#define RST_SYS 0 ++ ++#endif /* _DT_BINDINGS_MT7621_RESET_H_ */ diff --git a/package/boot/uboot-mediatek/patches/001-mtk-0010-pinctrl-mtmips-add-support-for-MediaTek-MT7621-SoC.patch b/package/boot/uboot-mediatek/patches/001-mtk-0010-pinctrl-mtmips-add-support-for-MediaTek-MT7621-SoC.patch new file mode 100644 index 0000000000..edf3a3f6c7 --- /dev/null +++ b/package/boot/uboot-mediatek/patches/001-mtk-0010-pinctrl-mtmips-add-support-for-MediaTek-MT7621-SoC.patch @@ -0,0 +1,395 @@ +From 3cf9e2daca330a0ba89d3793ceb09037c788db46 Mon Sep 17 00:00:00 2001 +From: Weijie Gao +Date: Fri, 20 May 2022 11:22:49 +0800 +Subject: [PATCH 10/25] pinctrl: mtmips: add support for MediaTek MT7621 SoC + +This patch adds pinctrl support for MediaTek MT7621 SoC. +The MT7621 SoC supports pinconf, but it is not the same as mt7628. + +Reviewed-by: Daniel Schwierzeck +Signed-off-by: Weijie Gao +--- + drivers/pinctrl/mtmips/Kconfig | 9 + + drivers/pinctrl/mtmips/Makefile | 1 + + drivers/pinctrl/mtmips/pinctrl-mt7621.c | 306 ++++++++++++++++++ + .../pinctrl/mtmips/pinctrl-mtmips-common.c | 4 +- + .../pinctrl/mtmips/pinctrl-mtmips-common.h | 12 + + 5 files changed, 330 insertions(+), 2 deletions(-) + create mode 100644 drivers/pinctrl/mtmips/pinctrl-mt7621.c + +--- a/drivers/pinctrl/mtmips/Kconfig ++++ b/drivers/pinctrl/mtmips/Kconfig +@@ -12,6 +12,15 @@ config PINCTRL_MT7620 + The driver is controlled by a device tree node which contains + the pin mux functions for each available pin groups. + ++config PINCTRL_MT7621 ++ bool "MediaTek MT7621 pin control driver" ++ select PINCTRL_MTMIPS ++ depends on SOC_MT7621 && PINCTRL_GENERIC ++ help ++ Support pin multiplexing control on MediaTek MT7621. ++ The driver is controlled by a device tree node which contains ++ the pin mux functions for each available pin groups. ++ + config PINCTRL_MT7628 + bool "MediaTek MT7628 pin control driver" + select PINCTRL_MTMIPS +--- a/drivers/pinctrl/mtmips/Makefile ++++ b/drivers/pinctrl/mtmips/Makefile +@@ -5,4 +5,5 @@ obj-$(CONFIG_PINCTRL_MTMIPS) += pinctrl- + + # SoC Drivers + obj-$(CONFIG_PINCTRL_MT7620) += pinctrl-mt7620.o ++obj-$(CONFIG_PINCTRL_MT7621) += pinctrl-mt7621.o + obj-$(CONFIG_PINCTRL_MT7628) += pinctrl-mt7628.o +--- /dev/null ++++ b/drivers/pinctrl/mtmips/pinctrl-mt7621.c +@@ -0,0 +1,306 @@ ++// SPDX-License-Identifier: GPL-2.0 ++/* ++ * Copyright (C) 2022 MediaTek Inc. All rights reserved. ++ * ++ * Author: Weijie Gao ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++ ++#include "pinctrl-mtmips-common.h" ++ ++#define SYSC_MAP_SIZE 0x100 ++ ++#define PAD_UART1_GPIO0_OFS 0x00 ++#define PAD_UART3_I2C_OFS 0x04 ++#define PAD_UART2_JTAG_OFS 0x08 ++#define PAD_PERST_WDT_OFS 0x0c ++#define PAD_RGMII2_MDIO_OFS 0x10 ++#define PAD_SDXC_SPI_OFS 0x14 ++#define GPIOMODE_OFS 0x18 ++#define PAD_BOPT_ESWINT_OFS 0x28 ++ ++#define ESWINT_SHIFT 20 ++#define SDXC_SHIFT 18 ++#define SPI_SHIFT 16 ++#define RGMII2_SHIFT 15 ++#define RGMII1_SHIFT 14 ++#define MDIO_SHIFT 12 ++#define PERST_SHIFT 10 ++#define WDT_SHIFT 8 ++#define JTAG_SHIFT 7 ++#define UART2_SHIFT 5 ++#define UART3_SHIFT 3 ++#define I2C_SHIFT 2 ++#define UART1_SHIFT 1 ++#define GPIO0_SHIFT 0 /* Dummy */ ++ ++#define GM4_MASK 3 ++ ++#define E4_E2_M 0x03 ++#define E4_E2_S 4 ++#define PULL_UP BIT(3) ++#define PULL_DOWN BIT(2) ++#define SMT BIT(1) ++#define SR BIT(0) ++ ++struct mt7621_pinctrl_priv { ++ struct mtmips_pinctrl_priv mp; ++}; ++ ++#if CONFIG_IS_ENABLED(PINMUX) ++static const struct mtmips_pmx_func esw_int_grp[] = { ++ FUNC("gpio", 1), ++ FUNC("esw int", 0), ++}; ++ ++static const struct mtmips_pmx_func sdxc_grp[] = { ++ FUNC("nand", 2), ++ FUNC("gpio", 1), ++ FUNC("sdxc", 0), ++}; ++ ++static const struct mtmips_pmx_func spi_grp[] = { ++ FUNC("nand", 2), ++ FUNC("gpio", 1), ++ FUNC("spi", 0), ++}; ++ ++static const struct mtmips_pmx_func rgmii2_grp[] = { ++ FUNC("gpio", 1), ++ FUNC("rgmii", 0), ++}; ++ ++static const struct mtmips_pmx_func rgmii1_grp[] = { ++ FUNC("gpio", 1), ++ FUNC("rgmii", 0), ++}; ++ ++static const struct mtmips_pmx_func mdio_grp[] = { ++ FUNC("gpio", 1), ++ FUNC("mdio", 0), ++}; ++ ++static const struct mtmips_pmx_func perst_grp[] = { ++ FUNC("refclk", 2), ++ FUNC("gpio", 1), ++ FUNC("pcie reset", 0), ++}; ++ ++static const struct mtmips_pmx_func wdt_grp[] = { ++ FUNC("refclk", 2), ++ FUNC("gpio", 1), ++ FUNC("wdt rst", 0), ++}; ++ ++static const struct mtmips_pmx_func jtag_grp[] = { ++ FUNC("gpio", 1), ++ FUNC("jtag", 0), ++}; ++ ++static const struct mtmips_pmx_func uart2_grp[] = { ++ FUNC("spdif", 3), ++ FUNC("pcm", 2), ++ FUNC("gpio", 1), ++ FUNC("uart", 0), ++}; ++ ++static const struct mtmips_pmx_func uart3_grp[] = { ++ FUNC("spdif", 3), ++ FUNC("i2s", 2), ++ FUNC("gpio", 1), ++ FUNC("uart", 0), ++}; ++ ++static const struct mtmips_pmx_func i2c_grp[] = { ++ FUNC("gpio", 1), ++ FUNC("i2c", 0), ++}; ++ ++static const struct mtmips_pmx_func uart1_grp[] = { ++ FUNC("gpio", 1), ++ FUNC("uart", 0), ++}; ++ ++static const struct mtmips_pmx_func gpio0_grp[] = { ++ FUNC("gpio", 0), ++}; ++ ++static const struct mtmips_pmx_group mt7621_pmx_data[] = { ++ GRP_PCONF("esw int", esw_int_grp, GPIOMODE_OFS, ESWINT_SHIFT, 1, ++ PAD_BOPT_ESWINT_OFS, 0), ++ GRP_PCONF("sdxc", sdxc_grp, GPIOMODE_OFS, SDXC_SHIFT, GM4_MASK, ++ PAD_SDXC_SPI_OFS, 16), ++ GRP_PCONF("spi", spi_grp, GPIOMODE_OFS, SPI_SHIFT, GM4_MASK, ++ PAD_SDXC_SPI_OFS, 0), ++ GRP_PCONF("rgmii2", rgmii2_grp, GPIOMODE_OFS, RGMII2_SHIFT, 1, ++ PAD_RGMII2_MDIO_OFS, 16), ++ GRP("rgmii1", rgmii1_grp, GPIOMODE_OFS, RGMII1_SHIFT, 1), ++ GRP_PCONF("mdio", mdio_grp, GPIOMODE_OFS, MDIO_SHIFT, GM4_MASK, ++ PAD_RGMII2_MDIO_OFS, 0), ++ GRP_PCONF("pcie reset", perst_grp, GPIOMODE_OFS, PERST_SHIFT, GM4_MASK, ++ PAD_PERST_WDT_OFS, 16), ++ GRP_PCONF("wdt", wdt_grp, GPIOMODE_OFS, WDT_SHIFT, GM4_MASK, ++ PAD_PERST_WDT_OFS, 0), ++ GRP_PCONF("jtag", jtag_grp, GPIOMODE_OFS, JTAG_SHIFT, 1, ++ PAD_UART2_JTAG_OFS, 16), ++ GRP_PCONF("uart2", uart2_grp, GPIOMODE_OFS, UART2_SHIFT, GM4_MASK, ++ PAD_UART2_JTAG_OFS, 0), ++ GRP_PCONF("uart3", uart3_grp, GPIOMODE_OFS, UART3_SHIFT, GM4_MASK, ++ PAD_UART3_I2C_OFS, 16), ++ GRP_PCONF("i2c", i2c_grp, GPIOMODE_OFS, I2C_SHIFT, 1, ++ PAD_UART3_I2C_OFS, 0), ++ GRP_PCONF("uart1", uart1_grp, GPIOMODE_OFS, UART1_SHIFT, 1, ++ PAD_UART1_GPIO0_OFS, 16), ++ GRP_PCONF("gpio0", gpio0_grp, GPIOMODE_OFS, GPIO0_SHIFT, 1, ++ PAD_UART1_GPIO0_OFS, 0), ++}; ++ ++static int mt7621_get_groups_count(struct udevice *dev) ++{ ++ return ARRAY_SIZE(mt7621_pmx_data); ++} ++ ++static const char *mt7621_get_group_name(struct udevice *dev, ++ unsigned int selector) ++{ ++ return mt7621_pmx_data[selector].name; ++} ++#endif /* CONFIG_IS_ENABLED(PINMUX) */ ++ ++#if CONFIG_IS_ENABLED(PINCONF) ++static const struct pinconf_param mt7621_conf_params[] = { ++ { "bias-disable", PIN_CONFIG_BIAS_DISABLE, 0 }, ++ { "bias-pull-up", PIN_CONFIG_BIAS_PULL_UP, 1 }, ++ { "bias-pull-down", PIN_CONFIG_BIAS_PULL_DOWN, 1 }, ++ { "input-schmitt-enable", PIN_CONFIG_INPUT_SCHMITT_ENABLE, 1 }, ++ { "input-schmitt-disable", PIN_CONFIG_INPUT_SCHMITT_ENABLE, 0 }, ++ { "drive-strength", PIN_CONFIG_DRIVE_STRENGTH, 0 }, ++ { "slew-rate", PIN_CONFIG_SLEW_RATE, 0 }, ++}; ++ ++static const u32 mt7621_pconf_drv_strength_tbl[] = {2, 4, 6, 8}; ++ ++static int mt7621_pinconf_group_set(struct udevice *dev, ++ unsigned int group_selector, ++ unsigned int param, unsigned int arg) ++{ ++ struct mt7621_pinctrl_priv *priv = dev_get_priv(dev); ++ const struct mtmips_pmx_group *grp = &mt7621_pmx_data[group_selector]; ++ u32 clr = 0, set = 0; ++ int i; ++ ++ if (!grp->pconf_avail) ++ return 0; ++ ++ switch (param) { ++ case PIN_CONFIG_BIAS_DISABLE: ++ clr = PULL_UP | PULL_DOWN; ++ break; ++ ++ case PIN_CONFIG_BIAS_PULL_UP: ++ clr = PULL_DOWN; ++ set = PULL_UP; ++ break; ++ ++ case PIN_CONFIG_BIAS_PULL_DOWN: ++ clr = PULL_UP; ++ set = PULL_DOWN; ++ break; ++ ++ case PIN_CONFIG_INPUT_SCHMITT_ENABLE: ++ if (arg) ++ set = SMT; ++ else ++ clr = SMT; ++ break; ++ ++ case PIN_CONFIG_DRIVE_STRENGTH: ++ for (i = 0; i < ARRAY_SIZE(mt7621_pconf_drv_strength_tbl); i++) ++ if (mt7621_pconf_drv_strength_tbl[i] == arg) ++ break; ++ ++ if (i >= ARRAY_SIZE(mt7621_pconf_drv_strength_tbl)) ++ return -EINVAL; ++ ++ clr = E4_E2_M << E4_E2_S; ++ set = i << E4_E2_S; ++ break; ++ ++ case PIN_CONFIG_SLEW_RATE: ++ if (arg) ++ set = SR; ++ else ++ clr = SR; ++ break; ++ ++ default: ++ return -EINVAL; ++ } ++ ++ mtmips_pinctrl_reg_set(&priv->mp, grp->pconf_reg, grp->pconf_shift, ++ clr, set); ++ ++ return 0; ++} ++#endif ++ ++static int mt7621_pinctrl_probe(struct udevice *dev) ++{ ++ struct mt7621_pinctrl_priv *priv = dev_get_priv(dev); ++ int ret = 0; ++ ++#if CONFIG_IS_ENABLED(PINMUX) ++ ret = mtmips_pinctrl_probe(&priv->mp, ARRAY_SIZE(mt7621_pmx_data), ++ mt7621_pmx_data); ++#endif /* CONFIG_IS_ENABLED(PINMUX) */ ++ ++ return ret; ++} ++ ++static int mt7621_pinctrl_of_to_plat(struct udevice *dev) ++{ ++ struct mt7621_pinctrl_priv *priv = dev_get_priv(dev); ++ ++ priv->mp.base = (void __iomem *)dev_remap_addr_index(dev, 0); ++ ++ if (!priv->mp.base) ++ return -EINVAL; ++ ++ return 0; ++} ++ ++static const struct pinctrl_ops mt7621_pinctrl_ops = { ++#if CONFIG_IS_ENABLED(PINMUX) ++ .get_groups_count = mt7621_get_groups_count, ++ .get_group_name = mt7621_get_group_name, ++ .get_functions_count = mtmips_get_functions_count, ++ .get_function_name = mtmips_get_function_name, ++ .pinmux_group_set = mtmips_pinmux_group_set, ++#endif /* CONFIG_IS_ENABLED(PINMUX) */ ++#if CONFIG_IS_ENABLED(PINCONF) ++ .pinconf_num_params = ARRAY_SIZE(mt7621_conf_params), ++ .pinconf_params = mt7621_conf_params, ++ .pinconf_group_set = mt7621_pinconf_group_set, ++#endif /* CONFIG_IS_ENABLED(PINCONF) */ ++ .set_state = pinctrl_generic_set_state, ++}; ++ ++static const struct udevice_id mt7621_pinctrl_ids[] = { ++ { .compatible = "mediatek,mt7621-pinctrl" }, ++ { } ++}; ++ ++U_BOOT_DRIVER(mt7621_pinctrl) = { ++ .name = "mt7621-pinctrl", ++ .id = UCLASS_PINCTRL, ++ .of_match = mt7621_pinctrl_ids, ++ .of_to_plat = mt7621_pinctrl_of_to_plat, ++ .ops = &mt7621_pinctrl_ops, ++ .probe = mt7621_pinctrl_probe, ++ .priv_auto = sizeof(struct mt7621_pinctrl_priv), ++}; +--- a/drivers/pinctrl/mtmips/pinctrl-mtmips-common.c ++++ b/drivers/pinctrl/mtmips/pinctrl-mtmips-common.c +@@ -13,8 +13,8 @@ + + #include "pinctrl-mtmips-common.h" + +-static void mtmips_pinctrl_reg_set(struct mtmips_pinctrl_priv *priv, +- u32 reg, u32 shift, u32 mask, u32 value) ++void mtmips_pinctrl_reg_set(struct mtmips_pinctrl_priv *priv, ++ u32 reg, u32 shift, u32 mask, u32 value) + { + u32 val; + +--- a/drivers/pinctrl/mtmips/pinctrl-mtmips-common.h ++++ b/drivers/pinctrl/mtmips/pinctrl-mtmips-common.h +@@ -22,6 +22,10 @@ struct mtmips_pmx_group { + u32 shift; + char mask; + ++ int pconf_avail; ++ u32 pconf_reg; ++ u32 pconf_shift; ++ + int nfuncs; + const struct mtmips_pmx_func *funcs; + }; +@@ -42,6 +46,14 @@ struct mtmips_pinctrl_priv { + { .name = (_name), .reg = (_reg), .shift = (_shift), .mask = (_mask), \ + .funcs = (_funcs), .nfuncs = ARRAY_SIZE(_funcs) } + ++#define GRP_PCONF(_name, _funcs, _reg, _shift, _mask, _pconf_reg, _pconf_shift) \ ++ { .name = (_name), .reg = (_reg), .shift = (_shift), .mask = (_mask), \ ++ .funcs = (_funcs), .nfuncs = ARRAY_SIZE(_funcs), .pconf_avail = 1, \ ++ .pconf_reg = (_pconf_reg), .pconf_shift = (_pconf_shift) } ++ ++void mtmips_pinctrl_reg_set(struct mtmips_pinctrl_priv *priv, ++ u32 reg, u32 shift, u32 mask, u32 value); ++ + int mtmips_get_functions_count(struct udevice *dev); + const char *mtmips_get_function_name(struct udevice *dev, + unsigned int selector); diff --git a/package/boot/uboot-mediatek/patches/001-mtk-0011-usb-xhci-mtk-add-support-for-MediaTek-MT7621-SoC.patch b/package/boot/uboot-mediatek/patches/001-mtk-0011-usb-xhci-mtk-add-support-for-MediaTek-MT7621-SoC.patch new file mode 100644 index 0000000000..69414ca1b5 --- /dev/null +++ b/package/boot/uboot-mediatek/patches/001-mtk-0011-usb-xhci-mtk-add-support-for-MediaTek-MT7621-SoC.patch @@ -0,0 +1,23 @@ +From ab59bb14a0efd40c12a967f73bd08ba2f27da3be Mon Sep 17 00:00:00 2001 +From: Weijie Gao +Date: Fri, 20 May 2022 11:22:56 +0800 +Subject: [PATCH 11/25] usb: xhci-mtk: add support for MediaTek MT7621 SoC + +This patch makes xhci-mtk driver available for MediaTek MT7621 SoC + +Signed-off-by: Weijie Gao +--- + drivers/usb/host/Kconfig | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +--- a/drivers/usb/host/Kconfig ++++ b/drivers/usb/host/Kconfig +@@ -34,7 +34,7 @@ config USB_XHCI_DWC3_OF_SIMPLE + + config USB_XHCI_MTK + bool "Support for MediaTek on-chip xHCI USB controller" +- depends on ARCH_MEDIATEK ++ depends on ARCH_MEDIATEK || SOC_MT7621 + help + Enables support for the on-chip xHCI controller on MediaTek SoCs. + diff --git a/package/boot/uboot-mediatek/patches/001-mtk-0012-phy-mtk-tphy-add-support-for-MediaTek-MT7621-SoC.patch b/package/boot/uboot-mediatek/patches/001-mtk-0012-phy-mtk-tphy-add-support-for-MediaTek-MT7621-SoC.patch new file mode 100644 index 0000000000..4f36ac63cb --- /dev/null +++ b/package/boot/uboot-mediatek/patches/001-mtk-0012-phy-mtk-tphy-add-support-for-MediaTek-MT7621-SoC.patch @@ -0,0 +1,23 @@ +From 23c19fa476929b6e94cc7f1a55f5ed4d3ab03934 Mon Sep 17 00:00:00 2001 +From: Weijie Gao +Date: Fri, 20 May 2022 11:23:01 +0800 +Subject: [PATCH 12/25] phy: mtk-tphy: add support for MediaTek MT7621 SoC + +This patch makes mtk-tphy driver available for MediaTek MT7621 SoC + +Signed-off-by: Weijie Gao +--- + drivers/phy/Kconfig | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +--- a/drivers/phy/Kconfig ++++ b/drivers/phy/Kconfig +@@ -266,7 +266,7 @@ config MT76X8_USB_PHY + config PHY_MTK_TPHY + bool "MediaTek T-PHY Driver" + depends on PHY +- depends on ARCH_MEDIATEK ++ depends on ARCH_MEDIATEK || SOC_MT7621 + help + MediaTek T-PHY driver supports usb2.0, usb3.0 ports, PCIe and + SATA, and meanwhile supports two version T-PHY which have diff --git a/package/boot/uboot-mediatek/patches/001-mtk-0013-spi-add-support-for-MediaTek-MT7621-SoC.patch b/package/boot/uboot-mediatek/patches/001-mtk-0013-spi-add-support-for-MediaTek-MT7621-SoC.patch new file mode 100644 index 0000000000..a0c2027b05 --- /dev/null +++ b/package/boot/uboot-mediatek/patches/001-mtk-0013-spi-add-support-for-MediaTek-MT7621-SoC.patch @@ -0,0 +1,23 @@ +From 34b623ccfd135e846b8464729a8b0e8df4b77a66 Mon Sep 17 00:00:00 2001 +From: Weijie Gao +Date: Fri, 20 May 2022 11:23:08 +0800 +Subject: [PATCH 13/25] spi: add support for MediaTek MT7621 SoC + +This patch makes mt7621_spi driver available for MediaTek MT7621 SoC + +Signed-off-by: Weijie Gao +--- + drivers/spi/Kconfig | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +--- a/drivers/spi/Kconfig ++++ b/drivers/spi/Kconfig +@@ -240,7 +240,7 @@ config MT7620_SPI + + config MT7621_SPI + bool "MediaTek MT7621 SPI driver" +- depends on SOC_MT7628 ++ depends on SOC_MT7621 || SOC_MT7628 + help + Enable the MT7621 SPI driver. This driver can be used to access + the SPI NOR flash on platforms embedding this Ralink / MediaTek diff --git a/package/boot/uboot-mediatek/patches/001-mtk-0014-gpio-add-support-for-MediaTek-MT7621-SoC.patch b/package/boot/uboot-mediatek/patches/001-mtk-0014-gpio-add-support-for-MediaTek-MT7621-SoC.patch new file mode 100644 index 0000000000..a90d6fca2b --- /dev/null +++ b/package/boot/uboot-mediatek/patches/001-mtk-0014-gpio-add-support-for-MediaTek-MT7621-SoC.patch @@ -0,0 +1,24 @@ +From f265423a441a3bcb51e25238544adb69f74becc7 Mon Sep 17 00:00:00 2001 +From: Weijie Gao +Date: Fri, 20 May 2022 11:23:14 +0800 +Subject: [PATCH 14/25] gpio: add support for MediaTek MT7621 SoC + +This patch makes mt7621_gpio driver available for MediaTek MT7621 SoC + +Reviewed-by: Stefan Roese +Signed-off-by: Weijie Gao +--- + drivers/gpio/Kconfig | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +--- a/drivers/gpio/Kconfig ++++ b/drivers/gpio/Kconfig +@@ -553,7 +553,7 @@ config MT7620_GPIO + + config MT7621_GPIO + bool "MediaTek MT7621 GPIO driver" +- depends on DM_GPIO && SOC_MT7628 ++ depends on DM_GPIO && (SOC_MT7621 || SOC_MT7628) + default y + help + Say yes here to support MediaTek MT7621 compatible GPIOs. diff --git a/package/boot/uboot-mediatek/patches/001-mtk-0015-watchdog-add-support-for-MediaTek-MT7621-SoC.patch b/package/boot/uboot-mediatek/patches/001-mtk-0015-watchdog-add-support-for-MediaTek-MT7621-SoC.patch new file mode 100644 index 0000000000..61f28937e9 --- /dev/null +++ b/package/boot/uboot-mediatek/patches/001-mtk-0015-watchdog-add-support-for-MediaTek-MT7621-SoC.patch @@ -0,0 +1,24 @@ +From eb1806fbf65c60b2ce462a0ebe39d9f9e652235a Mon Sep 17 00:00:00 2001 +From: Weijie Gao +Date: Fri, 20 May 2022 11:23:19 +0800 +Subject: [PATCH 15/25] watchdog: add support for MediaTek MT7621 SoC + +This patch makes mt7621_wdt driver available for MediaTek MT7621 SoC + +Reviewed-by: Stefan Roese +Signed-off-by: Weijie Gao +--- + drivers/watchdog/Kconfig | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +--- a/drivers/watchdog/Kconfig ++++ b/drivers/watchdog/Kconfig +@@ -191,7 +191,7 @@ config WDT_MT7620 + + config WDT_MT7621 + bool "MediaTek MT7621 watchdog timer support" +- depends on WDT && SOC_MT7628 ++ depends on WDT && (SOC_MT7621 || SOC_MT7628) + help + Select this to enable Ralink / Mediatek watchdog timer, + which can be found on some MediaTek chips. diff --git a/package/boot/uboot-mediatek/patches/001-mtk-0016-mmc-mediatek-add-support-for-MediaTek-MT7621-SoC.patch b/package/boot/uboot-mediatek/patches/001-mtk-0016-mmc-mediatek-add-support-for-MediaTek-MT7621-SoC.patch new file mode 100644 index 0000000000..8e8aaf36f9 --- /dev/null +++ b/package/boot/uboot-mediatek/patches/001-mtk-0016-mmc-mediatek-add-support-for-MediaTek-MT7621-SoC.patch @@ -0,0 +1,42 @@ +From 4339ec44313e85dd1f6d3d708dd2e594855ce25d Mon Sep 17 00:00:00 2001 +From: Weijie Gao +Date: Fri, 20 May 2022 11:23:26 +0800 +Subject: [PATCH 16/25] mmc: mediatek: add support for MediaTek MT7621 SoC + +This patch adds SDXC support for MediaTek MT7621 SoC + +Reviewed-by: Jaehoon Chung +Signed-off-by: Weijie Gao +--- + drivers/mmc/mtk-sd.c | 13 +++++++++++++ + 1 file changed, 13 insertions(+) + +--- a/drivers/mmc/mtk-sd.c ++++ b/drivers/mmc/mtk-sd.c +@@ -1761,6 +1761,18 @@ static const struct msdc_compatible mt76 + .default_pad_dly = true, + }; + ++static const struct msdc_compatible mt7621_compat = { ++ .clk_div_bits = 8, ++ .pad_tune0 = false, ++ .async_fifo = true, ++ .data_tune = true, ++ .busy_check = false, ++ .stop_clk_fix = false, ++ .enhance_rx = false, ++ .builtin_pad_ctrl = true, ++ .default_pad_dly = true, ++}; ++ + static const struct msdc_compatible mt7622_compat = { + .clk_div_bits = 12, + .pad_tune0 = true, +@@ -1809,6 +1821,7 @@ static const struct msdc_compatible mt81 + + static const struct udevice_id msdc_ids[] = { + { .compatible = "mediatek,mt7620-mmc", .data = (ulong)&mt7620_compat }, ++ { .compatible = "mediatek,mt7621-mmc", .data = (ulong)&mt7621_compat }, + { .compatible = "mediatek,mt7622-mmc", .data = (ulong)&mt7622_compat }, + { .compatible = "mediatek,mt7623-mmc", .data = (ulong)&mt7623_compat }, + { .compatible = "mediatek,mt8512-mmc", .data = (ulong)&mt8512_compat }, diff --git a/package/boot/uboot-mediatek/patches/001-mtk-0017-net-mediatek-remap-iobase-address.patch b/package/boot/uboot-mediatek/patches/001-mtk-0017-net-mediatek-remap-iobase-address.patch new file mode 100644 index 0000000000..d9c489dfad --- /dev/null +++ b/package/boot/uboot-mediatek/patches/001-mtk-0017-net-mediatek-remap-iobase-address.patch @@ -0,0 +1,33 @@ +From 391785398f61c85e6b55b1e9edbab94e3ba1b783 Mon Sep 17 00:00:00 2001 +From: Weijie Gao +Date: Fri, 20 May 2022 11:23:31 +0800 +Subject: [PATCH 17/25] net: mediatek: remap iobase address + +The iobase address from dts node is actually physical address. It's +identical to the virtual address in ARM platform. This is ok because this +driver was used only by ARM platforms (mt7622/mt7623 ...). + +But now this driver will be used by mt7621 which is a MIPS SoC. For MIPS +platform the physical address space is mapped to KSEG0 and KSEG1 and this +makes the virtual address apparently not idential to its physical address. + +To solve this issue, this patch replaces dev_read_addr with dev_remap_addr +to get the remapped iobase address. + +Reviewed-by: Ramon Fried +Signed-off-by: Weijie Gao +--- + drivers/net/mtk_eth.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +--- a/drivers/net/mtk_eth.c ++++ b/drivers/net/mtk_eth.c +@@ -1419,7 +1419,7 @@ static int mtk_eth_of_to_plat(struct ude + + priv->soc = dev_get_driver_data(dev); + +- pdata->iobase = dev_read_addr(dev); ++ pdata->iobase = (phys_addr_t)dev_remap_addr(dev); + + /* get corresponding ethsys phandle */ + ret = dev_read_phandle_with_args(dev, "mediatek,ethsys", NULL, 0, 0, diff --git a/package/boot/uboot-mediatek/patches/001-mtk-0018-net-mediatek-use-regmap-api-to-modify-ethsys-registe.patch b/package/boot/uboot-mediatek/patches/001-mtk-0018-net-mediatek-use-regmap-api-to-modify-ethsys-registe.patch new file mode 100644 index 0000000000..163ffb68c3 --- /dev/null +++ b/package/boot/uboot-mediatek/patches/001-mtk-0018-net-mediatek-use-regmap-api-to-modify-ethsys-registe.patch @@ -0,0 +1,67 @@ +From 955cc76d8074df943d59d559895007f91de8eed5 Mon Sep 17 00:00:00 2001 +From: Weijie Gao +Date: Fri, 20 May 2022 11:23:37 +0800 +Subject: [PATCH 18/25] net: mediatek: use regmap api to modify ethsys + registers + +The address returned by regmap_get_range() is not remapped. Directly r/w +to this address is ok for ARM platforms since it's idential to the virtual +address. + +But for MIPS platform only virtual address should be used for access. +To solve this issue, the regmap api regmap_read/regmap_write should be used +since they will remap address before accessing. + +Reviewed-by: Ramon Fried +Signed-off-by: Weijie Gao +--- + drivers/net/mtk_eth.c | 22 +++++++++++----------- + 1 file changed, 11 insertions(+), 11 deletions(-) + +--- a/drivers/net/mtk_eth.c ++++ b/drivers/net/mtk_eth.c +@@ -159,9 +159,10 @@ struct mtk_eth_priv { + + void __iomem *fe_base; + void __iomem *gmac_base; +- void __iomem *ethsys_base; + void __iomem *sgmii_base; + ++ struct regmap *ethsys_regmap; ++ + struct mii_dev *mdio_bus; + int (*mii_read)(struct mtk_eth_priv *priv, u8 phy, u8 reg); + int (*mii_write)(struct mtk_eth_priv *priv, u8 phy, u8 reg, u16 val); +@@ -233,7 +234,12 @@ static void mtk_gmac_rmw(struct mtk_eth_ + static void mtk_ethsys_rmw(struct mtk_eth_priv *priv, u32 reg, u32 clr, + u32 set) + { +- clrsetbits_le32(priv->ethsys_base + reg, clr, set); ++ uint val; ++ ++ regmap_read(priv->ethsys_regmap, reg, &val); ++ val &= ~clr; ++ val |= set; ++ regmap_write(priv->ethsys_regmap, reg, val); + } + + /* Direct MDIO clause 22/45 access via SoC */ +@@ -1427,15 +1433,9 @@ static int mtk_eth_of_to_plat(struct ude + if (ret) + return ret; + +- regmap = syscon_node_to_regmap(args.node); +- if (IS_ERR(regmap)) +- return PTR_ERR(regmap); +- +- priv->ethsys_base = regmap_get_range(regmap, 0); +- if (!priv->ethsys_base) { +- dev_err(dev, "Unable to find ethsys\n"); +- return -ENODEV; +- } ++ priv->ethsys_regmap = syscon_node_to_regmap(args.node); ++ if (IS_ERR(priv->ethsys_regmap)) ++ return PTR_ERR(priv->ethsys_regmap); + + /* Reset controllers */ + ret = reset_get_by_name(dev, "fe", &priv->rst_fe); diff --git a/package/boot/uboot-mediatek/patches/001-mtk-0019-net-mediatek-add-support-for-MediaTek-MT7621-SoC.patch b/package/boot/uboot-mediatek/patches/001-mtk-0019-net-mediatek-add-support-for-MediaTek-MT7621-SoC.patch new file mode 100644 index 0000000000..384f7f89ab --- /dev/null +++ b/package/boot/uboot-mediatek/patches/001-mtk-0019-net-mediatek-add-support-for-MediaTek-MT7621-SoC.patch @@ -0,0 +1,67 @@ +From 7237a6a0c020c05bb819774391154b40b2cfaabd Mon Sep 17 00:00:00 2001 +From: Weijie Gao +Date: Fri, 20 May 2022 11:23:42 +0800 +Subject: [PATCH 19/25] net: mediatek: add support for MediaTek MT7621 SoC + +This patch adds GMAC support for MediaTek MT7621 SoC. +MT7621 has the same GMAC/Switch configuration as MT7623. + +Reviewed-by: Ramon Fried +Signed-off-by: Weijie Gao +--- + drivers/net/mtk_eth.c | 21 +++++++++++++++------ + 1 file changed, 15 insertions(+), 6 deletions(-) + +--- a/drivers/net/mtk_eth.c ++++ b/drivers/net/mtk_eth.c +@@ -145,7 +145,8 @@ enum mtk_switch { + enum mtk_soc { + SOC_MT7623, + SOC_MT7629, +- SOC_MT7622 ++ SOC_MT7622, ++ SOC_MT7621 + }; + + struct mtk_eth_priv { +@@ -675,12 +676,18 @@ static int mt7530_pad_clk_setup(struct m + static int mt7530_setup(struct mtk_eth_priv *priv) + { + u16 phy_addr, phy_val; +- u32 val; ++ u32 val, txdrv; + int i; + +- /* Select 250MHz clk for RGMII mode */ +- mtk_ethsys_rmw(priv, ETHSYS_CLKCFG0_REG, +- ETHSYS_TRGMII_CLK_SEL362_5, 0); ++ if (priv->soc != SOC_MT7621) { ++ /* Select 250MHz clk for RGMII mode */ ++ mtk_ethsys_rmw(priv, ETHSYS_CLKCFG0_REG, ++ ETHSYS_TRGMII_CLK_SEL362_5, 0); ++ ++ txdrv = 8; ++ } else { ++ txdrv = 4; ++ } + + /* Modify HWTRAP first to allow direct access to internal PHYs */ + mt753x_reg_read(priv, HWTRAP_REG, &val); +@@ -738,7 +745,8 @@ static int mt7530_setup(struct mtk_eth_p + /* Lower Tx Driving for TRGMII path */ + for (i = 0 ; i < NUM_TRGMII_CTRL ; i++) + mt753x_reg_write(priv, MT7530_TRGMII_TD_ODT(i), +- (8 << TD_DM_DRVP_S) | (8 << TD_DM_DRVN_S)); ++ (txdrv << TD_DM_DRVP_S) | ++ (txdrv << TD_DM_DRVN_S)); + + for (i = 0 ; i < NUM_TRGMII_CTRL; i++) + mt753x_reg_rmw(priv, MT7530_TRGMII_RD(i), RD_TAP_M, 16); +@@ -1540,6 +1548,7 @@ static const struct udevice_id mtk_eth_i + { .compatible = "mediatek,mt7629-eth", .data = SOC_MT7629 }, + { .compatible = "mediatek,mt7623-eth", .data = SOC_MT7623 }, + { .compatible = "mediatek,mt7622-eth", .data = SOC_MT7622 }, ++ { .compatible = "mediatek,mt7621-eth", .data = SOC_MT7621 }, + {} + }; + diff --git a/package/boot/uboot-mediatek/patches/001-mtk-0020-nand-raw-add-support-for-MediaTek-MT7621-SoC.patch b/package/boot/uboot-mediatek/patches/001-mtk-0020-nand-raw-add-support-for-MediaTek-MT7621-SoC.patch new file mode 100644 index 0000000000..84273bf34b --- /dev/null +++ b/package/boot/uboot-mediatek/patches/001-mtk-0020-nand-raw-add-support-for-MediaTek-MT7621-SoC.patch @@ -0,0 +1,1556 @@ +From 8d94833f13ccd7e1dfea605cfdf9a8eb53505515 Mon Sep 17 00:00:00 2001 +From: Weijie Gao +Date: Fri, 20 May 2022 11:23:47 +0800 +Subject: [PATCH 20/25] nand: raw: add support for MediaTek MT7621 SoC + +This patch adds NAND flash controller driver for MediaTek MT7621 SoC. +The NAND flash controller of MT7621 supports only SLC NAND flashes. +It supports 4~12 bits correction with maximum 4KB page size. + +Signed-off-by: Weijie Gao +--- + drivers/mtd/nand/raw/Kconfig | 17 +- + drivers/mtd/nand/raw/Makefile | 2 + + drivers/mtd/nand/raw/mt7621_nand.c | 1205 ++++++++++++++++++++++++ + drivers/mtd/nand/raw/mt7621_nand.h | 29 + + drivers/mtd/nand/raw/mt7621_nand_spl.c | 237 +++++ + 5 files changed, 1488 insertions(+), 2 deletions(-) + create mode 100644 drivers/mtd/nand/raw/mt7621_nand.c + create mode 100644 drivers/mtd/nand/raw/mt7621_nand.h + create mode 100644 drivers/mtd/nand/raw/mt7621_nand_spl.c + +--- a/drivers/mtd/nand/raw/Kconfig ++++ b/drivers/mtd/nand/raw/Kconfig +@@ -521,12 +521,25 @@ config TEGRA_NAND + help + Enables support for NAND Flash chips on Tegra SoCs platforms. + ++config NAND_MT7621 ++ bool "Support for MediaTek MT7621 NAND flash controller" ++ depends on SOC_MT7621 ++ select SYS_NAND_SELF_INIT ++ select SPL_SYS_NAND_SELF_INIT ++ imply CMD_NAND ++ help ++ This enables NAND driver for the NAND flash controller on MediaTek ++ MT7621 platform. ++ The controller supports 4~12 bits correction per 512 bytes with a ++ maximum 4KB page size. ++ + comment "Generic NAND options" + + config SYS_NAND_BLOCK_SIZE + hex "NAND chip eraseblock size" + depends on ARCH_SUNXI || SPL_NAND_SUPPORT || TPL_NAND_SUPPORT +- depends on !NAND_MXS && !NAND_DENALI_DT && !NAND_LPC32XX_MLC && !NAND_FSL_IFC ++ depends on !NAND_MXS && !NAND_DENALI_DT && !NAND_LPC32XX_MLC && \ ++ !NAND_FSL_IFC && !NAND_MT7621 + help + Number of data bytes in one eraseblock for the NAND chip on the + board. This is the multiple of NAND_PAGE_SIZE and the number of +@@ -551,7 +564,7 @@ config SYS_NAND_PAGE_SIZE + depends on ARCH_SUNXI || NAND_OMAP_GPMC || NAND_LPC32XX_SLC || \ + SPL_NAND_SIMPLE || (NAND_MXC && SPL_NAND_SUPPORT) || \ + (NAND_ATMEL && SPL_NAND_SUPPORT) || SPL_GENERATE_ATMEL_PMECC_HEADER +- depends on !NAND_MXS && !NAND_DENALI_DT && !NAND_LPC32XX_MLC ++ depends on !NAND_MXS && !NAND_DENALI_DT && !NAND_LPC32XX_MLC && !NAND_MT7621 + help + Number of data bytes in one page for the NAND chip on the + board, not including the OOB area. +--- a/drivers/mtd/nand/raw/Makefile ++++ b/drivers/mtd/nand/raw/Makefile +@@ -72,6 +72,7 @@ obj-$(CONFIG_NAND_ZYNQ) += zynq_nand.o + obj-$(CONFIG_NAND_STM32_FMC2) += stm32_fmc2_nand.o + obj-$(CONFIG_CORTINA_NAND) += cortina_nand.o + obj-$(CONFIG_ROCKCHIP_NAND) += rockchip_nfc.o ++obj-$(CONFIG_NAND_MT7621) += mt7621_nand.o + + else # minimal SPL drivers + +@@ -80,5 +81,6 @@ obj-$(CONFIG_NAND_FSL_IFC) += fsl_ifc_sp + obj-$(CONFIG_NAND_MXC) += mxc_nand_spl.o + obj-$(CONFIG_NAND_MXS) += mxs_nand_spl.o mxs_nand.o + obj-$(CONFIG_NAND_SUNXI) += sunxi_nand_spl.o ++obj-$(CONFIG_NAND_MT7621) += mt7621_nand_spl.o mt7621_nand.o + + endif # drivers +--- /dev/null ++++ b/drivers/mtd/nand/raw/mt7621_nand.c +@@ -0,0 +1,1205 @@ ++// SPDX-License-Identifier: GPL-2.0 ++/* ++ * Copyright (C) 2022 MediaTek Inc. All rights reserved. ++ * ++ * Author: Weijie Gao ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include "mt7621_nand.h" ++ ++/* NFI core registers */ ++#define NFI_CNFG 0x000 ++#define CNFG_OP_MODE GENMASK(14, 12) ++#define CNFG_OP_CUSTOM 6 ++#define CNFG_AUTO_FMT_EN BIT(9) ++#define CNFG_HW_ECC_EN BIT(8) ++#define CNFG_BYTE_RW BIT(6) ++#define CNFG_READ_MODE BIT(1) ++ ++#define NFI_PAGEFMT 0x004 ++#define PAGEFMT_FDM_ECC GENMASK(15, 12) ++#define PAGEFMT_FDM GENMASK(11, 8) ++#define PAGEFMT_SPARE GENMASK(5, 4) ++#define PAGEFMT_PAGE GENMASK(1, 0) ++ ++#define NFI_CON 0x008 ++#define CON_NFI_SEC GENMASK(15, 12) ++#define CON_NFI_BWR BIT(9) ++#define CON_NFI_BRD BIT(8) ++#define CON_NFI_RST BIT(1) ++#define CON_FIFO_FLUSH BIT(0) ++ ++#define NFI_ACCCON 0x00c ++#define ACCCON_POECS GENMASK(31, 28) ++#define ACCCON_POECS_DEF 3 ++#define ACCCON_PRECS GENMASK(27, 22) ++#define ACCCON_PRECS_DEF 3 ++#define ACCCON_C2R GENMASK(21, 16) ++#define ACCCON_C2R_DEF 7 ++#define ACCCON_W2R GENMASK(15, 12) ++#define ACCCON_W2R_DEF 7 ++#define ACCCON_WH GENMASK(11, 8) ++#define ACCCON_WH_DEF 15 ++#define ACCCON_WST GENMASK(7, 4) ++#define ACCCON_WST_DEF 15 ++#define ACCCON_WST_MIN 3 ++#define ACCCON_RLT GENMASK(3, 0) ++#define ACCCON_RLT_DEF 15 ++#define ACCCON_RLT_MIN 3 ++ ++#define NFI_CMD 0x020 ++ ++#define NFI_ADDRNOB 0x030 ++#define ADDR_ROW_NOB GENMASK(6, 4) ++#define ADDR_COL_NOB GENMASK(2, 0) ++ ++#define NFI_COLADDR 0x034 ++#define NFI_ROWADDR 0x038 ++ ++#define NFI_STRDATA 0x040 ++#define STR_DATA BIT(0) ++ ++#define NFI_CNRNB 0x044 ++#define CB2R_TIME GENMASK(7, 4) ++#define STR_CNRNB BIT(0) ++ ++#define NFI_DATAW 0x050 ++#define NFI_DATAR 0x054 ++ ++#define NFI_PIO_DIRDY 0x058 ++#define PIO_DIRDY BIT(0) ++ ++#define NFI_STA 0x060 ++#define STA_NFI_FSM GENMASK(19, 16) ++#define STA_FSM_CUSTOM_DATA 14 ++#define STA_BUSY BIT(8) ++#define STA_ADDR BIT(1) ++#define STA_CMD BIT(0) ++ ++#define NFI_ADDRCNTR 0x070 ++#define SEC_CNTR GENMASK(15, 12) ++#define SEC_ADDR GENMASK(9, 0) ++ ++#define NFI_CSEL 0x090 ++#define CSEL GENMASK(1, 0) ++ ++#define NFI_FDM0L 0x0a0 ++#define NFI_FDML(n) (0x0a0 + ((n) << 3)) ++ ++#define NFI_FDM0M 0x0a4 ++#define NFI_FDMM(n) (0x0a4 + ((n) << 3)) ++ ++#define NFI_MASTER_STA 0x210 ++#define MAS_ADDR GENMASK(11, 9) ++#define MAS_RD GENMASK(8, 6) ++#define MAS_WR GENMASK(5, 3) ++#define MAS_RDDLY GENMASK(2, 0) ++ ++/* ECC engine registers */ ++#define ECC_ENCCON 0x000 ++#define ENC_EN BIT(0) ++ ++#define ECC_ENCCNFG 0x004 ++#define ENC_CNFG_MSG GENMASK(28, 16) ++#define ENC_MODE GENMASK(5, 4) ++#define ENC_MODE_NFI 1 ++#define ENC_TNUM GENMASK(2, 0) ++ ++#define ECC_ENCIDLE 0x00c ++#define ENC_IDLE BIT(0) ++ ++#define ECC_DECCON 0x100 ++#define DEC_EN BIT(0) ++ ++#define ECC_DECCNFG 0x104 ++#define DEC_EMPTY_EN BIT(31) ++#define DEC_CS GENMASK(28, 16) ++#define DEC_CON GENMASK(13, 12) ++#define DEC_CON_EL 2 ++#define DEC_MODE GENMASK(5, 4) ++#define DEC_MODE_NFI 1 ++#define DEC_TNUM GENMASK(2, 0) ++ ++#define ECC_DECIDLE 0x10c ++#define DEC_IDLE BIT(1) ++ ++#define ECC_DECENUM 0x114 ++#define ERRNUM_S 2 ++#define ERRNUM_M GENMASK(3, 0) ++ ++#define ECC_DECDONE 0x118 ++#define DEC_DONE7 BIT(7) ++#define DEC_DONE6 BIT(6) ++#define DEC_DONE5 BIT(5) ++#define DEC_DONE4 BIT(4) ++#define DEC_DONE3 BIT(3) ++#define DEC_DONE2 BIT(2) ++#define DEC_DONE1 BIT(1) ++#define DEC_DONE0 BIT(0) ++ ++#define ECC_DECEL(n) (0x11c + (n) * 4) ++#define DEC_EL_ODD_S 16 ++#define DEC_EL_M 0x1fff ++#define DEC_EL_BYTE_POS_S 3 ++#define DEC_EL_BIT_POS_M GENMASK(2, 0) ++ ++#define ECC_FDMADDR 0x13c ++ ++/* ENCIDLE and DECIDLE */ ++#define ECC_IDLE BIT(0) ++ ++#define ACCTIMING(tpoecs, tprecs, tc2r, tw2r, twh, twst, trlt) \ ++ (FIELD_PREP(ACCCON_POECS, tpoecs) | \ ++ FIELD_PREP(ACCCON_PRECS, tprecs) | \ ++ FIELD_PREP(ACCCON_C2R, tc2r) | \ ++ FIELD_PREP(ACCCON_W2R, tw2r) | \ ++ FIELD_PREP(ACCCON_WH, twh) | \ ++ FIELD_PREP(ACCCON_WST, twst) | \ ++ FIELD_PREP(ACCCON_RLT, trlt)) ++ ++#define MASTER_STA_MASK (MAS_ADDR | MAS_RD | MAS_WR | \ ++ MAS_RDDLY) ++#define NFI_RESET_TIMEOUT 1000000 ++#define NFI_CORE_TIMEOUT 500000 ++#define ECC_ENGINE_TIMEOUT 500000 ++ ++#define ECC_SECTOR_SIZE 512 ++#define ECC_PARITY_BITS 13 ++ ++#define NFI_FDM_SIZE 8 ++ ++/* Register base */ ++#define NFI_BASE 0x1e003000 ++#define NFI_ECC_BASE 0x1e003800 ++ ++static struct mt7621_nfc nfc_dev; ++ ++static const u16 mt7621_nfi_page_size[] = { SZ_512, SZ_2K, SZ_4K }; ++static const u8 mt7621_nfi_spare_size[] = { 16, 26, 27, 28 }; ++static const u8 mt7621_ecc_strength[] = { 4, 6, 8, 10, 12 }; ++ ++static inline u32 nfi_read32(struct mt7621_nfc *nfc, u32 reg) ++{ ++ return readl(nfc->nfi_regs + reg); ++} ++ ++static inline void nfi_write32(struct mt7621_nfc *nfc, u32 reg, u32 val) ++{ ++ writel(val, nfc->nfi_regs + reg); ++} ++ ++static inline u16 nfi_read16(struct mt7621_nfc *nfc, u32 reg) ++{ ++ return readw(nfc->nfi_regs + reg); ++} ++ ++static inline void nfi_write16(struct mt7621_nfc *nfc, u32 reg, u16 val) ++{ ++ writew(val, nfc->nfi_regs + reg); ++} ++ ++static inline void ecc_write16(struct mt7621_nfc *nfc, u32 reg, u16 val) ++{ ++ writew(val, nfc->ecc_regs + reg); ++} ++ ++static inline u32 ecc_read32(struct mt7621_nfc *nfc, u32 reg) ++{ ++ return readl(nfc->ecc_regs + reg); ++} ++ ++static inline void ecc_write32(struct mt7621_nfc *nfc, u32 reg, u32 val) ++{ ++ return writel(val, nfc->ecc_regs + reg); ++} ++ ++static inline u8 *oob_fdm_ptr(struct nand_chip *nand, int sect) ++{ ++ return nand->oob_poi + sect * NFI_FDM_SIZE; ++} ++ ++static inline u8 *oob_ecc_ptr(struct mt7621_nfc *nfc, int sect) ++{ ++ struct nand_chip *nand = &nfc->nand; ++ ++ return nand->oob_poi + nand->ecc.steps * NFI_FDM_SIZE + ++ sect * (nfc->spare_per_sector - NFI_FDM_SIZE); ++} ++ ++static inline u8 *page_data_ptr(struct nand_chip *nand, const u8 *buf, ++ int sect) ++{ ++ return (u8 *)buf + sect * nand->ecc.size; ++} ++ ++static int mt7621_ecc_wait_idle(struct mt7621_nfc *nfc, u32 reg) ++{ ++ u32 val; ++ int ret; ++ ++ ret = readw_poll_timeout(nfc->ecc_regs + reg, val, val & ECC_IDLE, ++ ECC_ENGINE_TIMEOUT); ++ if (ret) { ++ pr_warn("ECC engine timed out entering idle mode\n"); ++ return -EIO; ++ } ++ ++ return 0; ++} ++ ++static int mt7621_ecc_decoder_wait_done(struct mt7621_nfc *nfc, u32 sect) ++{ ++ u32 val; ++ int ret; ++ ++ ret = readw_poll_timeout(nfc->ecc_regs + ECC_DECDONE, val, ++ val & (1 << sect), ECC_ENGINE_TIMEOUT); ++ if (ret) { ++ pr_warn("ECC decoder for sector %d timed out\n", sect); ++ return -ETIMEDOUT; ++ } ++ ++ return 0; ++} ++ ++static void mt7621_ecc_encoder_op(struct mt7621_nfc *nfc, bool enable) ++{ ++ mt7621_ecc_wait_idle(nfc, ECC_ENCIDLE); ++ ecc_write16(nfc, ECC_ENCCON, enable ? ENC_EN : 0); ++} ++ ++static void mt7621_ecc_decoder_op(struct mt7621_nfc *nfc, bool enable) ++{ ++ mt7621_ecc_wait_idle(nfc, ECC_DECIDLE); ++ ecc_write16(nfc, ECC_DECCON, enable ? DEC_EN : 0); ++} ++ ++static int mt7621_ecc_correct_check(struct mt7621_nfc *nfc, u8 *sector_buf, ++ u8 *fdm_buf, u32 sect) ++{ ++ struct nand_chip *nand = &nfc->nand; ++ u32 decnum, num_error_bits, fdm_end_bits; ++ u32 error_locations, error_bit_loc; ++ u32 error_byte_pos, error_bit_pos; ++ int bitflips = 0; ++ u32 i; ++ ++ decnum = ecc_read32(nfc, ECC_DECENUM); ++ num_error_bits = (decnum >> (sect << ERRNUM_S)) & ERRNUM_M; ++ fdm_end_bits = (nand->ecc.size + NFI_FDM_SIZE) << 3; ++ ++ if (!num_error_bits) ++ return 0; ++ ++ if (num_error_bits == ERRNUM_M) ++ return -1; ++ ++ for (i = 0; i < num_error_bits; i++) { ++ error_locations = ecc_read32(nfc, ECC_DECEL(i / 2)); ++ error_bit_loc = (error_locations >> ((i % 2) * DEC_EL_ODD_S)) & ++ DEC_EL_M; ++ error_byte_pos = error_bit_loc >> DEC_EL_BYTE_POS_S; ++ error_bit_pos = error_bit_loc & DEC_EL_BIT_POS_M; ++ ++ if (error_bit_loc < (nand->ecc.size << 3)) { ++ if (sector_buf) { ++ sector_buf[error_byte_pos] ^= ++ (1 << error_bit_pos); ++ } ++ } else if (error_bit_loc < fdm_end_bits) { ++ if (fdm_buf) { ++ fdm_buf[error_byte_pos - nand->ecc.size] ^= ++ (1 << error_bit_pos); ++ } ++ } ++ ++ bitflips++; ++ } ++ ++ return bitflips; ++} ++ ++static int mt7621_nfc_wait_write_completion(struct mt7621_nfc *nfc, ++ struct nand_chip *nand) ++{ ++ u16 val; ++ int ret; ++ ++ ret = readw_poll_timeout(nfc->nfi_regs + NFI_ADDRCNTR, val, ++ FIELD_GET(SEC_CNTR, val) >= nand->ecc.steps, ++ NFI_CORE_TIMEOUT); ++ ++ if (ret) { ++ pr_warn("NFI core write operation timed out\n"); ++ return -ETIMEDOUT; ++ } ++ ++ return ret; ++} ++ ++static void mt7621_nfc_hw_reset(struct mt7621_nfc *nfc) ++{ ++ u32 val; ++ int ret; ++ ++ /* reset all registers and force the NFI master to terminate */ ++ nfi_write16(nfc, NFI_CON, CON_FIFO_FLUSH | CON_NFI_RST); ++ ++ /* wait for the master to finish the last transaction */ ++ ret = readw_poll_timeout(nfc->nfi_regs + NFI_MASTER_STA, val, ++ !(val & MASTER_STA_MASK), NFI_RESET_TIMEOUT); ++ if (ret) { ++ pr_warn("Failed to reset NFI master in %dms\n", ++ NFI_RESET_TIMEOUT); ++ } ++ ++ /* ensure any status register affected by the NFI master is reset */ ++ nfi_write16(nfc, NFI_CON, CON_FIFO_FLUSH | CON_NFI_RST); ++ nfi_write16(nfc, NFI_STRDATA, 0); ++} ++ ++static inline void mt7621_nfc_hw_init(struct mt7621_nfc *nfc) ++{ ++ u32 acccon; ++ ++ /* ++ * CNRNB: nand ready/busy register ++ * ------------------------------- ++ * 7:4: timeout register for polling the NAND busy/ready signal ++ * 0 : poll the status of the busy/ready signal after [7:4]*16 cycles. ++ */ ++ nfi_write16(nfc, NFI_CNRNB, CB2R_TIME | STR_CNRNB); ++ ++ mt7621_nfc_hw_reset(nfc); ++ ++ /* Apply default access timing */ ++ acccon = ACCTIMING(ACCCON_POECS_DEF, ACCCON_PRECS_DEF, ACCCON_C2R_DEF, ++ ACCCON_W2R_DEF, ACCCON_WH_DEF, ACCCON_WST_DEF, ++ ACCCON_RLT_DEF); ++ ++ nfi_write32(nfc, NFI_ACCCON, acccon); ++} ++ ++static int mt7621_nfc_send_command(struct mt7621_nfc *nfc, u8 command) ++{ ++ u32 val; ++ int ret; ++ ++ nfi_write32(nfc, NFI_CMD, command); ++ ++ ret = readl_poll_timeout(nfc->nfi_regs + NFI_STA, val, !(val & STA_CMD), ++ NFI_CORE_TIMEOUT); ++ if (ret) { ++ pr_warn("NFI core timed out entering command mode\n"); ++ return -EIO; ++ } ++ ++ return 0; ++} ++ ++static int mt7621_nfc_send_address_byte(struct mt7621_nfc *nfc, int addr) ++{ ++ u32 val; ++ int ret; ++ ++ nfi_write32(nfc, NFI_COLADDR, addr); ++ nfi_write32(nfc, NFI_ROWADDR, 0); ++ nfi_write16(nfc, NFI_ADDRNOB, 1); ++ ++ ret = readl_poll_timeout(nfc->nfi_regs + NFI_STA, val, ++ !(val & STA_ADDR), NFI_CORE_TIMEOUT); ++ if (ret) { ++ pr_warn("NFI core timed out entering address mode\n"); ++ return -EIO; ++ } ++ ++ return 0; ++} ++ ++static void mt7621_nfc_cmd_ctrl(struct mtd_info *mtd, int dat, ++ unsigned int ctrl) ++{ ++ struct mt7621_nfc *nfc = nand_get_controller_data(mtd_to_nand(mtd)); ++ ++ if (ctrl & NAND_ALE) { ++ mt7621_nfc_send_address_byte(nfc, dat & 0xff); ++ } else if (ctrl & NAND_CLE) { ++ mt7621_nfc_hw_reset(nfc); ++ nfi_write16(nfc, NFI_CNFG, ++ FIELD_PREP(CNFG_OP_MODE, CNFG_OP_CUSTOM)); ++ mt7621_nfc_send_command(nfc, dat); ++ } ++} ++ ++static int mt7621_nfc_dev_ready(struct mtd_info *mtd) ++{ ++ struct mt7621_nfc *nfc = nand_get_controller_data(mtd_to_nand(mtd)); ++ ++ if (nfi_read32(nfc, NFI_STA) & STA_BUSY) ++ return 0; ++ ++ return 1; ++} ++ ++static void mt7621_nfc_select_chip(struct mtd_info *mtd, int chipnr) ++{ ++ struct mt7621_nfc *nfc = nand_get_controller_data(mtd_to_nand(mtd)); ++ ++ nfi_write16(nfc, NFI_CSEL, 0); ++} ++ ++static void mt7621_nfc_wait_pio_ready(struct mt7621_nfc *nfc) ++{ ++ int ret; ++ u16 val; ++ ++ ret = readw_poll_timeout(nfc->nfi_regs + NFI_PIO_DIRDY, val, ++ val & PIO_DIRDY, NFI_CORE_TIMEOUT); ++ if (ret < 0) ++ pr_err("NFI core PIO mode not ready\n"); ++} ++ ++static u32 mt7621_nfc_pio_read(struct mt7621_nfc *nfc, bool br) ++{ ++ u32 reg, fsm; ++ ++ /* after each byte read, the NFI_STA reg is reset by the hardware */ ++ reg = nfi_read32(nfc, NFI_STA); ++ fsm = FIELD_GET(STA_NFI_FSM, reg); ++ ++ if (fsm != STA_FSM_CUSTOM_DATA) { ++ reg = nfi_read16(nfc, NFI_CNFG); ++ reg |= CNFG_READ_MODE | CNFG_BYTE_RW; ++ if (!br) ++ reg &= ~CNFG_BYTE_RW; ++ nfi_write16(nfc, NFI_CNFG, reg); ++ ++ /* ++ * set to max sector to allow the HW to continue reading over ++ * unaligned accesses ++ */ ++ nfi_write16(nfc, NFI_CON, CON_NFI_SEC | CON_NFI_BRD); ++ ++ /* trigger to fetch data */ ++ nfi_write16(nfc, NFI_STRDATA, STR_DATA); ++ } ++ ++ mt7621_nfc_wait_pio_ready(nfc); ++ ++ return nfi_read32(nfc, NFI_DATAR); ++} ++ ++static void mt7621_nfc_read_data(struct mt7621_nfc *nfc, u8 *buf, u32 len) ++{ ++ while (((uintptr_t)buf & 3) && len) { ++ *buf = mt7621_nfc_pio_read(nfc, true); ++ buf++; ++ len--; ++ } ++ ++ while (len >= 4) { ++ *(u32 *)buf = mt7621_nfc_pio_read(nfc, false); ++ buf += 4; ++ len -= 4; ++ } ++ ++ while (len) { ++ *buf = mt7621_nfc_pio_read(nfc, true); ++ buf++; ++ len--; ++ } ++} ++ ++static void mt7621_nfc_read_data_discard(struct mt7621_nfc *nfc, u32 len) ++{ ++ while (len >= 4) { ++ mt7621_nfc_pio_read(nfc, false); ++ len -= 4; ++ } ++ ++ while (len) { ++ mt7621_nfc_pio_read(nfc, true); ++ len--; ++ } ++} ++ ++static void mt7621_nfc_pio_write(struct mt7621_nfc *nfc, u32 val, bool bw) ++{ ++ u32 reg, fsm; ++ ++ reg = nfi_read32(nfc, NFI_STA); ++ fsm = FIELD_GET(STA_NFI_FSM, reg); ++ ++ if (fsm != STA_FSM_CUSTOM_DATA) { ++ reg = nfi_read16(nfc, NFI_CNFG); ++ reg &= ~(CNFG_READ_MODE | CNFG_BYTE_RW); ++ if (bw) ++ reg |= CNFG_BYTE_RW; ++ nfi_write16(nfc, NFI_CNFG, reg); ++ ++ nfi_write16(nfc, NFI_CON, CON_NFI_SEC | CON_NFI_BWR); ++ nfi_write16(nfc, NFI_STRDATA, STR_DATA); ++ } ++ ++ mt7621_nfc_wait_pio_ready(nfc); ++ nfi_write32(nfc, NFI_DATAW, val); ++} ++ ++static void mt7621_nfc_write_data(struct mt7621_nfc *nfc, const u8 *buf, ++ u32 len) ++{ ++ while (((uintptr_t)buf & 3) && len) { ++ mt7621_nfc_pio_write(nfc, *buf, true); ++ buf++; ++ len--; ++ } ++ ++ while (len >= 4) { ++ mt7621_nfc_pio_write(nfc, *(const u32 *)buf, false); ++ buf += 4; ++ len -= 4; ++ } ++ ++ while (len) { ++ mt7621_nfc_pio_write(nfc, *buf, true); ++ buf++; ++ len--; ++ } ++} ++ ++static void mt7621_nfc_write_data_empty(struct mt7621_nfc *nfc, u32 len) ++{ ++ while (len >= 4) { ++ mt7621_nfc_pio_write(nfc, 0xffffffff, false); ++ len -= 4; ++ } ++ ++ while (len) { ++ mt7621_nfc_pio_write(nfc, 0xff, true); ++ len--; ++ } ++} ++ ++static void mt7621_nfc_write_byte(struct mtd_info *mtd, u8 byte) ++{ ++ struct mt7621_nfc *nfc = nand_get_controller_data(mtd_to_nand(mtd)); ++ ++ mt7621_nfc_pio_write(nfc, byte, true); ++} ++ ++static void mt7621_nfc_write_buf(struct mtd_info *mtd, const u8 *buf, int len) ++{ ++ struct mt7621_nfc *nfc = nand_get_controller_data(mtd_to_nand(mtd)); ++ ++ return mt7621_nfc_write_data(nfc, buf, len); ++} ++ ++static u8 mt7621_nfc_read_byte(struct mtd_info *mtd) ++{ ++ struct mt7621_nfc *nfc = nand_get_controller_data(mtd_to_nand(mtd)); ++ ++ return mt7621_nfc_pio_read(nfc, true); ++} ++ ++static void mt7621_nfc_read_buf(struct mtd_info *mtd, u8 *buf, int len) ++{ ++ struct mt7621_nfc *nfc = nand_get_controller_data(mtd_to_nand(mtd)); ++ ++ mt7621_nfc_read_data(nfc, buf, len); ++} ++ ++static int mt7621_nfc_calc_ecc_strength(struct mt7621_nfc *nfc, ++ u32 avail_ecc_bytes) ++{ ++ struct nand_chip *nand = &nfc->nand; ++ struct mtd_info *mtd = nand_to_mtd(nand); ++ u32 strength; ++ int i; ++ ++ strength = avail_ecc_bytes * 8 / ECC_PARITY_BITS; ++ ++ /* Find the closest supported ecc strength */ ++ for (i = ARRAY_SIZE(mt7621_ecc_strength) - 1; i >= 0; i--) { ++ if (mt7621_ecc_strength[i] <= strength) ++ break; ++ } ++ ++ if (unlikely(i < 0)) { ++ pr_err("OOB size (%u) is not supported\n", mtd->oobsize); ++ return -EINVAL; ++ } ++ ++ nand->ecc.strength = mt7621_ecc_strength[i]; ++ nand->ecc.bytes = DIV_ROUND_UP(nand->ecc.strength * ECC_PARITY_BITS, 8); ++ ++ pr_debug("ECC strength adjusted to %u bits\n", nand->ecc.strength); ++ ++ return i; ++} ++ ++static int mt7621_nfc_set_spare_per_sector(struct mt7621_nfc *nfc) ++{ ++ struct nand_chip *nand = &nfc->nand; ++ struct mtd_info *mtd = nand_to_mtd(nand); ++ u32 size; ++ int i; ++ ++ size = nand->ecc.bytes + NFI_FDM_SIZE; ++ ++ /* Find the closest supported spare size */ ++ for (i = 0; i < ARRAY_SIZE(mt7621_nfi_spare_size); i++) { ++ if (mt7621_nfi_spare_size[i] >= size) ++ break; ++ } ++ ++ if (unlikely(i >= ARRAY_SIZE(mt7621_nfi_spare_size))) { ++ pr_err("OOB size (%u) is not supported\n", mtd->oobsize); ++ return -EINVAL; ++ } ++ ++ nfc->spare_per_sector = mt7621_nfi_spare_size[i]; ++ ++ return i; ++} ++ ++static int mt7621_nfc_ecc_init(struct mt7621_nfc *nfc) ++{ ++ struct nand_chip *nand = &nfc->nand; ++ struct mtd_info *mtd = nand_to_mtd(nand); ++ u32 avail_ecc_bytes, encode_block_size, decode_block_size; ++ u32 ecc_enccfg, ecc_deccfg; ++ int ecc_cap; ++ ++ nand->ecc.options |= NAND_ECC_CUSTOM_PAGE_ACCESS; ++ ++ nand->ecc.size = ECC_SECTOR_SIZE; ++ nand->ecc.steps = mtd->writesize / nand->ecc.size; ++ ++ avail_ecc_bytes = mtd->oobsize / nand->ecc.steps - NFI_FDM_SIZE; ++ ++ ecc_cap = mt7621_nfc_calc_ecc_strength(nfc, avail_ecc_bytes); ++ if (ecc_cap < 0) ++ return ecc_cap; ++ ++ /* Sector + FDM */ ++ encode_block_size = (nand->ecc.size + NFI_FDM_SIZE) * 8; ++ ecc_enccfg = ecc_cap | FIELD_PREP(ENC_MODE, ENC_MODE_NFI) | ++ FIELD_PREP(ENC_CNFG_MSG, encode_block_size); ++ ++ /* Sector + FDM + ECC parity bits */ ++ decode_block_size = ((nand->ecc.size + NFI_FDM_SIZE) * 8) + ++ nand->ecc.strength * ECC_PARITY_BITS; ++ ecc_deccfg = ecc_cap | FIELD_PREP(DEC_MODE, DEC_MODE_NFI) | ++ FIELD_PREP(DEC_CS, decode_block_size) | ++ FIELD_PREP(DEC_CON, DEC_CON_EL) | DEC_EMPTY_EN; ++ ++ mt7621_ecc_encoder_op(nfc, false); ++ ecc_write32(nfc, ECC_ENCCNFG, ecc_enccfg); ++ ++ mt7621_ecc_decoder_op(nfc, false); ++ ecc_write32(nfc, ECC_DECCNFG, ecc_deccfg); ++ ++ return 0; ++} ++ ++static int mt7621_nfc_set_page_format(struct mt7621_nfc *nfc) ++{ ++ struct nand_chip *nand = &nfc->nand; ++ struct mtd_info *mtd = nand_to_mtd(nand); ++ int i, spare_size; ++ u32 pagefmt; ++ ++ spare_size = mt7621_nfc_set_spare_per_sector(nfc); ++ if (spare_size < 0) ++ return spare_size; ++ ++ for (i = 0; i < ARRAY_SIZE(mt7621_nfi_page_size); i++) { ++ if (mt7621_nfi_page_size[i] == mtd->writesize) ++ break; ++ } ++ ++ if (unlikely(i >= ARRAY_SIZE(mt7621_nfi_page_size))) { ++ pr_err("Page size (%u) is not supported\n", mtd->writesize); ++ return -EINVAL; ++ } ++ ++ pagefmt = FIELD_PREP(PAGEFMT_PAGE, i) | ++ FIELD_PREP(PAGEFMT_SPARE, spare_size) | ++ FIELD_PREP(PAGEFMT_FDM, NFI_FDM_SIZE) | ++ FIELD_PREP(PAGEFMT_FDM_ECC, NFI_FDM_SIZE); ++ ++ nfi_write16(nfc, NFI_PAGEFMT, pagefmt); ++ ++ return 0; ++} ++ ++static int mt7621_nfc_attach_chip(struct nand_chip *nand) ++{ ++ struct mt7621_nfc *nfc = nand_get_controller_data(nand); ++ int ret; ++ ++ if (nand->options & NAND_BUSWIDTH_16) { ++ pr_err("16-bit buswidth is not supported"); ++ return -EINVAL; ++ } ++ ++ ret = mt7621_nfc_ecc_init(nfc); ++ if (ret) ++ return ret; ++ ++ return mt7621_nfc_set_page_format(nfc); ++} ++ ++static void mt7621_nfc_write_fdm(struct mt7621_nfc *nfc) ++{ ++ struct nand_chip *nand = &nfc->nand; ++ u32 vall, valm; ++ u8 *oobptr; ++ int i, j; ++ ++ for (i = 0; i < nand->ecc.steps; i++) { ++ vall = 0; ++ valm = 0; ++ oobptr = oob_fdm_ptr(nand, i); ++ ++ for (j = 0; j < 4; j++) ++ vall |= (u32)oobptr[j] << (j * 8); ++ ++ for (j = 0; j < 4; j++) ++ valm |= (u32)oobptr[j + 4] << (j * 8); ++ ++ nfi_write32(nfc, NFI_FDML(i), vall); ++ nfi_write32(nfc, NFI_FDMM(i), valm); ++ } ++} ++ ++static void mt7621_nfc_read_sector_fdm(struct mt7621_nfc *nfc, u32 sect) ++{ ++ struct nand_chip *nand = &nfc->nand; ++ u32 vall, valm; ++ u8 *oobptr; ++ int i; ++ ++ vall = nfi_read32(nfc, NFI_FDML(sect)); ++ valm = nfi_read32(nfc, NFI_FDMM(sect)); ++ oobptr = oob_fdm_ptr(nand, sect); ++ ++ for (i = 0; i < 4; i++) ++ oobptr[i] = (vall >> (i * 8)) & 0xff; ++ ++ for (i = 0; i < 4; i++) ++ oobptr[i + 4] = (valm >> (i * 8)) & 0xff; ++} ++ ++static int mt7621_nfc_read_page_hwecc(struct mtd_info *mtd, ++ struct nand_chip *nand, uint8_t *buf, ++ int oob_required, int page) ++{ ++ struct mt7621_nfc *nfc = nand_get_controller_data(nand); ++ int bitflips = 0, ret = 0; ++ int rc, i; ++ ++ nand_read_page_op(nand, page, 0, NULL, 0); ++ ++ nfi_write16(nfc, NFI_CNFG, FIELD_PREP(CNFG_OP_MODE, CNFG_OP_CUSTOM) | ++ CNFG_READ_MODE | CNFG_AUTO_FMT_EN | CNFG_HW_ECC_EN); ++ ++ mt7621_ecc_decoder_op(nfc, true); ++ ++ nfi_write16(nfc, NFI_CON, FIELD_PREP(CON_NFI_SEC, nand->ecc.steps) | ++ CON_NFI_BRD); ++ ++ for (i = 0; i < nand->ecc.steps; i++) { ++ if (buf) ++ mt7621_nfc_read_data(nfc, page_data_ptr(nand, buf, i), ++ nand->ecc.size); ++ else ++ mt7621_nfc_read_data_discard(nfc, nand->ecc.size); ++ ++ rc = mt7621_ecc_decoder_wait_done(nfc, i); ++ ++ mt7621_nfc_read_sector_fdm(nfc, i); ++ ++ if (rc < 0) { ++ ret = -EIO; ++ continue; ++ } ++ ++ rc = mt7621_ecc_correct_check(nfc, ++ buf ? page_data_ptr(nand, buf, i) : NULL, ++ oob_fdm_ptr(nand, i), i); ++ ++ if (rc < 0) { ++ pr_warn("Uncorrectable ECC error at page %d step %d\n", ++ page, i); ++ bitflips = nand->ecc.strength + 1; ++ mtd->ecc_stats.failed++; ++ } else { ++ if (rc > bitflips) ++ bitflips = rc; ++ mtd->ecc_stats.corrected += rc; ++ } ++ } ++ ++ mt7621_ecc_decoder_op(nfc, false); ++ ++ nfi_write16(nfc, NFI_CON, 0); ++ ++ if (ret < 0) ++ return ret; ++ ++ return bitflips; ++} ++ ++static int mt7621_nfc_read_page_raw(struct mtd_info *mtd, ++ struct nand_chip *nand, uint8_t *buf, ++ int oob_required, int page) ++{ ++ struct mt7621_nfc *nfc = nand_get_controller_data(nand); ++ int i; ++ ++ nand_read_page_op(nand, page, 0, NULL, 0); ++ ++ nfi_write16(nfc, NFI_CNFG, FIELD_PREP(CNFG_OP_MODE, CNFG_OP_CUSTOM) | ++ CNFG_READ_MODE); ++ ++ nfi_write16(nfc, NFI_CON, FIELD_PREP(CON_NFI_SEC, nand->ecc.steps) | ++ CON_NFI_BRD); ++ ++ for (i = 0; i < nand->ecc.steps; i++) { ++ /* Read data */ ++ if (buf) ++ mt7621_nfc_read_data(nfc, page_data_ptr(nand, buf, i), ++ nand->ecc.size); ++ else ++ mt7621_nfc_read_data_discard(nfc, nand->ecc.size); ++ ++ /* Read FDM */ ++ mt7621_nfc_read_data(nfc, oob_fdm_ptr(nand, i), NFI_FDM_SIZE); ++ ++ /* Read ECC parity data */ ++ mt7621_nfc_read_data(nfc, oob_ecc_ptr(nfc, i), ++ nfc->spare_per_sector - NFI_FDM_SIZE); ++ } ++ ++ nfi_write16(nfc, NFI_CON, 0); ++ ++ return 0; ++} ++ ++static int mt7621_nfc_read_oob_hwecc(struct mtd_info *mtd, ++ struct nand_chip *nand, int page) ++{ ++ return mt7621_nfc_read_page_hwecc(mtd, nand, NULL, 1, page); ++} ++ ++static int mt7621_nfc_read_oob_raw(struct mtd_info *mtd, ++ struct nand_chip *nand, int page) ++{ ++ return mt7621_nfc_read_page_raw(mtd, nand, NULL, 1, page); ++} ++ ++static int mt7621_nfc_check_empty_page(struct nand_chip *nand, const u8 *buf) ++{ ++ struct mtd_info *mtd = nand_to_mtd(nand); ++ u8 *oobptr; ++ u32 i, j; ++ ++ if (buf) { ++ for (i = 0; i < mtd->writesize; i++) ++ if (buf[i] != 0xff) ++ return 0; ++ } ++ ++ for (i = 0; i < nand->ecc.steps; i++) { ++ oobptr = oob_fdm_ptr(nand, i); ++ for (j = 0; j < NFI_FDM_SIZE; j++) ++ if (oobptr[j] != 0xff) ++ return 0; ++ } ++ ++ return 1; ++} ++ ++static int mt7621_nfc_write_page_hwecc(struct mtd_info *mtd, ++ struct nand_chip *nand, ++ const u8 *buf, int oob_required, ++ int page) ++{ ++ struct mt7621_nfc *nfc = nand_get_controller_data(nand); ++ ++ if (mt7621_nfc_check_empty_page(nand, buf)) { ++ /* ++ * MT7621 ECC engine always generates parity code for input ++ * pages, even for empty pages. Doing so will write back ECC ++ * parity code to the oob region, which means such pages will ++ * no longer be empty pages. ++ * ++ * To avoid this, stop write operation if current page is an ++ * empty page. ++ */ ++ return 0; ++ } ++ ++ nand_prog_page_begin_op(nand, page, 0, NULL, 0); ++ ++ nfi_write16(nfc, NFI_CNFG, FIELD_PREP(CNFG_OP_MODE, CNFG_OP_CUSTOM) | ++ CNFG_AUTO_FMT_EN | CNFG_HW_ECC_EN); ++ ++ mt7621_ecc_encoder_op(nfc, true); ++ ++ mt7621_nfc_write_fdm(nfc); ++ ++ nfi_write16(nfc, NFI_CON, FIELD_PREP(CON_NFI_SEC, nand->ecc.steps) | ++ CON_NFI_BWR); ++ ++ if (buf) ++ mt7621_nfc_write_data(nfc, buf, mtd->writesize); ++ else ++ mt7621_nfc_write_data_empty(nfc, mtd->writesize); ++ ++ mt7621_nfc_wait_write_completion(nfc, nand); ++ ++ mt7621_ecc_encoder_op(nfc, false); ++ ++ nfi_write16(nfc, NFI_CON, 0); ++ ++ return nand_prog_page_end_op(nand); ++} ++ ++static int mt7621_nfc_write_page_raw(struct mtd_info *mtd, ++ struct nand_chip *nand, ++ const u8 *buf, int oob_required, ++ int page) ++{ ++ struct mt7621_nfc *nfc = nand_get_controller_data(nand); ++ int i; ++ ++ nand_prog_page_begin_op(nand, page, 0, NULL, 0); ++ ++ nfi_write16(nfc, NFI_CNFG, FIELD_PREP(CNFG_OP_MODE, CNFG_OP_CUSTOM)); ++ ++ nfi_write16(nfc, NFI_CON, FIELD_PREP(CON_NFI_SEC, nand->ecc.steps) | ++ CON_NFI_BWR); ++ ++ for (i = 0; i < nand->ecc.steps; i++) { ++ /* Write data */ ++ if (buf) ++ mt7621_nfc_write_data(nfc, page_data_ptr(nand, buf, i), ++ nand->ecc.size); ++ else ++ mt7621_nfc_write_data_empty(nfc, nand->ecc.size); ++ ++ /* Write FDM */ ++ mt7621_nfc_write_data(nfc, oob_fdm_ptr(nand, i), ++ NFI_FDM_SIZE); ++ ++ /* Write dummy ECC parity data */ ++ mt7621_nfc_write_data_empty(nfc, nfc->spare_per_sector - ++ NFI_FDM_SIZE); ++ } ++ ++ mt7621_nfc_wait_write_completion(nfc, nand); ++ ++ nfi_write16(nfc, NFI_CON, 0); ++ ++ return nand_prog_page_end_op(nand); ++} ++ ++static int mt7621_nfc_write_oob_hwecc(struct mtd_info *mtd, ++ struct nand_chip *nand, int page) ++{ ++ return mt7621_nfc_write_page_hwecc(mtd, nand, NULL, 1, page); ++} ++ ++static int mt7621_nfc_write_oob_raw(struct mtd_info *mtd, ++ struct nand_chip *nand, int page) ++{ ++ return mt7621_nfc_write_page_raw(mtd, nand, NULL, 1, page); ++} ++ ++static int mt7621_nfc_ooblayout_free(struct mtd_info *mtd, int section, ++ struct mtd_oob_region *oob_region) ++{ ++ struct nand_chip *nand = mtd_to_nand(mtd); ++ ++ if (section >= nand->ecc.steps) ++ return -ERANGE; ++ ++ oob_region->length = NFI_FDM_SIZE - 1; ++ oob_region->offset = section * NFI_FDM_SIZE + 1; ++ ++ return 0; ++} ++ ++static int mt7621_nfc_ooblayout_ecc(struct mtd_info *mtd, int section, ++ struct mtd_oob_region *oob_region) ++{ ++ struct nand_chip *nand = mtd_to_nand(mtd); ++ ++ if (section) ++ return -ERANGE; ++ ++ oob_region->offset = NFI_FDM_SIZE * nand->ecc.steps; ++ oob_region->length = mtd->oobsize - oob_region->offset; ++ ++ return 0; ++} ++ ++static const struct mtd_ooblayout_ops mt7621_nfc_ooblayout_ops = { ++ .rfree = mt7621_nfc_ooblayout_free, ++ .ecc = mt7621_nfc_ooblayout_ecc, ++}; ++ ++/* ++ * This function will override the default one which is not supposed to be ++ * used for ECC syndrome based pages. ++ */ ++static int mt7621_nfc_block_bad(struct mtd_info *mtd, loff_t ofs) ++{ ++ struct nand_chip *nand = mtd_to_nand(mtd); ++ struct mtd_oob_ops ops; ++ int ret, i = 0; ++ u16 bad; ++ ++ memset(&ops, 0, sizeof(ops)); ++ ops.oobbuf = (uint8_t *)&bad; ++ ops.ooboffs = nand->badblockpos; ++ if (nand->options & NAND_BUSWIDTH_16) { ++ ops.ooboffs &= ~0x01; ++ ops.ooblen = 2; ++ } else { ++ ops.ooblen = 1; ++ } ++ ops.mode = MTD_OPS_RAW; ++ ++ /* Read from first/last page(s) if necessary */ ++ if (nand->bbt_options & NAND_BBT_SCANLASTPAGE) ++ ofs += mtd->erasesize - mtd->writesize; ++ ++ do { ++ ret = mtd_read_oob(mtd, ofs, &ops); ++ if (ret) ++ return ret; ++ ++ if (likely(nand->badblockbits == 8)) ++ ret = bad != 0xFF; ++ else ++ ret = hweight8(bad) < nand->badblockbits; ++ ++ i++; ++ ofs += mtd->writesize; ++ } while (!ret && (nand->bbt_options & NAND_BBT_SCAN2NDPAGE) && i < 2); ++ ++ return ret; ++} ++ ++static void mt7621_nfc_init_chip(struct mt7621_nfc *nfc) ++{ ++ struct nand_chip *nand = &nfc->nand; ++ struct mtd_info *mtd; ++ int ret; ++ ++ nand_set_controller_data(nand, nfc); ++ ++ nand->options |= NAND_NO_SUBPAGE_WRITE; ++ ++ nand->ecc.mode = NAND_ECC_HW_SYNDROME; ++ nand->ecc.read_page = mt7621_nfc_read_page_hwecc; ++ nand->ecc.read_page_raw = mt7621_nfc_read_page_raw; ++ nand->ecc.write_page = mt7621_nfc_write_page_hwecc; ++ nand->ecc.write_page_raw = mt7621_nfc_write_page_raw; ++ nand->ecc.read_oob = mt7621_nfc_read_oob_hwecc; ++ nand->ecc.read_oob_raw = mt7621_nfc_read_oob_raw; ++ nand->ecc.write_oob = mt7621_nfc_write_oob_hwecc; ++ nand->ecc.write_oob_raw = mt7621_nfc_write_oob_raw; ++ ++ nand->dev_ready = mt7621_nfc_dev_ready; ++ nand->select_chip = mt7621_nfc_select_chip; ++ nand->write_byte = mt7621_nfc_write_byte; ++ nand->write_buf = mt7621_nfc_write_buf; ++ nand->read_byte = mt7621_nfc_read_byte; ++ nand->read_buf = mt7621_nfc_read_buf; ++ nand->cmd_ctrl = mt7621_nfc_cmd_ctrl; ++ nand->block_bad = mt7621_nfc_block_bad; ++ ++ mtd = nand_to_mtd(nand); ++ mtd_set_ooblayout(mtd, &mt7621_nfc_ooblayout_ops); ++ ++ /* Reset NFI master */ ++ mt7621_nfc_hw_init(nfc); ++ ++ ret = nand_scan_ident(mtd, 1, NULL); ++ if (ret) ++ return; ++ ++ mt7621_nfc_attach_chip(nand); ++ ++ ret = nand_scan_tail(mtd); ++ if (ret) ++ return; ++ ++ nand_register(0, mtd); ++} ++ ++static void mt7621_nfc_set_regs(struct mt7621_nfc *nfc) ++{ ++ nfc->nfi_regs = (void __iomem *)CKSEG1ADDR(NFI_BASE); ++ nfc->ecc_regs = (void __iomem *)CKSEG1ADDR(NFI_ECC_BASE); ++} ++ ++void mt7621_nfc_spl_init(struct mt7621_nfc *nfc) ++{ ++ struct nand_chip *nand = &nfc->nand; ++ ++ mt7621_nfc_set_regs(nfc); ++ ++ nand_set_controller_data(nand, nfc); ++ ++ nand->options |= NAND_NO_SUBPAGE_WRITE; ++ ++ nand->ecc.mode = NAND_ECC_HW_SYNDROME; ++ nand->ecc.read_page = mt7621_nfc_read_page_hwecc; ++ ++ nand->dev_ready = mt7621_nfc_dev_ready; ++ nand->select_chip = mt7621_nfc_select_chip; ++ nand->read_byte = mt7621_nfc_read_byte; ++ nand->read_buf = mt7621_nfc_read_buf; ++ nand->cmd_ctrl = mt7621_nfc_cmd_ctrl; ++ ++ /* Reset NFI master */ ++ mt7621_nfc_hw_init(nfc); ++} ++ ++int mt7621_nfc_spl_post_init(struct mt7621_nfc *nfc) ++{ ++ struct nand_chip *nand = &nfc->nand; ++ int nand_maf_id, nand_dev_id; ++ struct nand_flash_dev *type; ++ ++ type = nand_get_flash_type(&nand->mtd, nand, &nand_maf_id, ++ &nand_dev_id, NULL); ++ ++ if (IS_ERR(type)) ++ return PTR_ERR(type); ++ ++ nand->numchips = 1; ++ nand->mtd.size = nand->chipsize; ++ ++ return mt7621_nfc_attach_chip(nand); ++} ++ ++void board_nand_init(void) ++{ ++ mt7621_nfc_set_regs(&nfc_dev); ++ mt7621_nfc_init_chip(&nfc_dev); ++} +--- /dev/null ++++ b/drivers/mtd/nand/raw/mt7621_nand.h +@@ -0,0 +1,29 @@ ++/* SPDX-License-Identifier: GPL-2.0 */ ++/* ++ * Copyright (C) 2022 MediaTek Inc. All rights reserved. ++ * ++ * Author: Weijie Gao ++ */ ++ ++#ifndef _MT7621_NAND_H_ ++#define _MT7621_NAND_H_ ++ ++#include ++#include ++#include ++#include ++ ++struct mt7621_nfc { ++ struct nand_chip nand; ++ ++ void __iomem *nfi_regs; ++ void __iomem *ecc_regs; ++ ++ u32 spare_per_sector; ++}; ++ ++/* for SPL */ ++void mt7621_nfc_spl_init(struct mt7621_nfc *nfc); ++int mt7621_nfc_spl_post_init(struct mt7621_nfc *nfc); ++ ++#endif /* _MT7621_NAND_H_ */ +--- /dev/null ++++ b/drivers/mtd/nand/raw/mt7621_nand_spl.c +@@ -0,0 +1,237 @@ ++// SPDX-License-Identifier: GPL-2.0 ++/* ++ * Copyright (C) 2022 MediaTek Inc. All rights reserved. ++ * ++ * Author: Weijie Gao ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include "mt7621_nand.h" ++ ++static struct mt7621_nfc nfc_dev; ++static u8 *buffer; ++static int nand_valid; ++ ++static void nand_command_lp(struct mtd_info *mtd, unsigned int command, ++ int column, int page_addr) ++{ ++ register struct nand_chip *chip = mtd_to_nand(mtd); ++ ++ /* Command latch cycle */ ++ chip->cmd_ctrl(mtd, command, NAND_NCE | NAND_CLE | NAND_CTRL_CHANGE); ++ ++ if (column != -1 || page_addr != -1) { ++ int ctrl = NAND_CTRL_CHANGE | NAND_NCE | NAND_ALE; ++ ++ /* Serially input address */ ++ if (column != -1) { ++ chip->cmd_ctrl(mtd, column, ctrl); ++ ctrl &= ~NAND_CTRL_CHANGE; ++ if (command != NAND_CMD_READID) ++ chip->cmd_ctrl(mtd, column >> 8, ctrl); ++ } ++ if (page_addr != -1) { ++ chip->cmd_ctrl(mtd, page_addr, ctrl); ++ chip->cmd_ctrl(mtd, page_addr >> 8, ++ NAND_NCE | NAND_ALE); ++ if (chip->options & NAND_ROW_ADDR_3) ++ chip->cmd_ctrl(mtd, page_addr >> 16, ++ NAND_NCE | NAND_ALE); ++ } ++ } ++ chip->cmd_ctrl(mtd, NAND_CMD_NONE, NAND_NCE | NAND_CTRL_CHANGE); ++ ++ /* ++ * Program and erase have their own busy handlers status, sequential ++ * in and status need no delay. ++ */ ++ switch (command) { ++ case NAND_CMD_STATUS: ++ case NAND_CMD_READID: ++ case NAND_CMD_SET_FEATURES: ++ return; ++ ++ case NAND_CMD_READ0: ++ chip->cmd_ctrl(mtd, NAND_CMD_READSTART, ++ NAND_NCE | NAND_CLE | NAND_CTRL_CHANGE); ++ chip->cmd_ctrl(mtd, NAND_CMD_NONE, ++ NAND_NCE | NAND_CTRL_CHANGE); ++ } ++ ++ /* ++ * Apply this short delay always to ensure that we do wait tWB in ++ * any case on any machine. ++ */ ++ ndelay(100); ++ ++ nand_wait_ready(mtd); ++} ++ ++static int nfc_read_page_hwecc(struct mtd_info *mtd, void *buf, ++ unsigned int page) ++{ ++ struct nand_chip *chip = mtd_to_nand(mtd); ++ int ret; ++ ++ chip->cmdfunc(mtd, NAND_CMD_READ0, 0x0, page); ++ ++ ret = chip->ecc.read_page(mtd, chip, buf, 1, page); ++ if (ret < 0 || ret > chip->ecc.strength) ++ return -1; ++ ++ return 0; ++} ++ ++static int nfc_read_oob_hwecc(struct mtd_info *mtd, void *buf, u32 len, ++ unsigned int page) ++{ ++ struct nand_chip *chip = mtd_to_nand(mtd); ++ int ret; ++ ++ chip->cmdfunc(mtd, NAND_CMD_READ0, 0x0, page); ++ ++ ret = chip->ecc.read_page(mtd, chip, NULL, 1, page); ++ if (ret < 0) ++ return -1; ++ ++ if (len > mtd->oobsize) ++ len = mtd->oobsize; ++ ++ memcpy(buf, chip->oob_poi, len); ++ ++ return 0; ++} ++ ++static int nfc_check_bad_block(struct mtd_info *mtd, unsigned int page) ++{ ++ struct nand_chip *chip = mtd_to_nand(mtd); ++ u32 pages_per_block, i = 0; ++ int ret; ++ u8 bad; ++ ++ pages_per_block = 1 << (mtd->erasesize_shift - mtd->writesize_shift); ++ ++ /* Read from first/last page(s) if necessary */ ++ if (chip->bbt_options & NAND_BBT_SCANLASTPAGE) { ++ page += pages_per_block - 1; ++ if (chip->bbt_options & NAND_BBT_SCAN2NDPAGE) ++ page--; ++ } ++ ++ do { ++ ret = nfc_read_oob_hwecc(mtd, &bad, 1, page); ++ if (ret) ++ return ret; ++ ++ ret = bad != 0xFF; ++ ++ i++; ++ page++; ++ } while (!ret && (chip->bbt_options & NAND_BBT_SCAN2NDPAGE) && i < 2); ++ ++ return ret; ++} ++ ++int nand_spl_load_image(uint32_t offs, unsigned int size, void *dest) ++{ ++ struct mt7621_nfc *nfc = &nfc_dev; ++ struct nand_chip *chip = &nfc->nand; ++ struct mtd_info *mtd = &chip->mtd; ++ u32 addr, col, page, chksz; ++ bool check_bad = true; ++ ++ if (!nand_valid) ++ return -ENODEV; ++ ++ while (size) { ++ if (check_bad || !(offs & mtd->erasesize_mask)) { ++ addr = offs & (~mtd->erasesize_mask); ++ page = addr >> mtd->writesize_shift; ++ if (nfc_check_bad_block(mtd, page)) { ++ /* Skip bad block */ ++ if (addr >= mtd->size - mtd->erasesize) ++ return -1; ++ ++ offs += mtd->erasesize; ++ continue; ++ } ++ ++ check_bad = false; ++ } ++ ++ col = offs & mtd->writesize_mask; ++ page = offs >> mtd->writesize_shift; ++ chksz = min(mtd->writesize - col, (uint32_t)size); ++ ++ if (unlikely(chksz < mtd->writesize)) { ++ /* Not reading a full page */ ++ if (nfc_read_page_hwecc(mtd, buffer, page)) ++ return -1; ++ ++ memcpy(dest, buffer + col, chksz); ++ } else { ++ if (nfc_read_page_hwecc(mtd, dest, page)) ++ return -1; ++ } ++ ++ dest += chksz; ++ offs += chksz; ++ size -= chksz; ++ } ++ ++ return 0; ++} ++ ++int nand_default_bbt(struct mtd_info *mtd) ++{ ++ return 0; ++} ++ ++unsigned long nand_size(void) ++{ ++ if (!nand_valid) ++ return 0; ++ ++ /* Unlikely that NAND size > 2GBytes */ ++ if (nfc_dev.nand.chipsize <= SZ_2G) ++ return nfc_dev.nand.chipsize; ++ ++ return SZ_2G; ++} ++ ++void nand_deselect(void) ++{ ++} ++ ++void nand_init(void) ++{ ++ struct mtd_info *mtd; ++ struct nand_chip *chip; ++ ++ if (nand_valid) ++ return; ++ ++ mt7621_nfc_spl_init(&nfc_dev); ++ ++ chip = &nfc_dev.nand; ++ mtd = &chip->mtd; ++ chip->cmdfunc = nand_command_lp; ++ ++ if (mt7621_nfc_spl_post_init(&nfc_dev)) ++ return; ++ ++ mtd->erasesize_shift = ffs(mtd->erasesize) - 1; ++ mtd->writesize_shift = ffs(mtd->writesize) - 1; ++ mtd->erasesize_mask = (1 << mtd->erasesize_shift) - 1; ++ mtd->writesize_mask = (1 << mtd->writesize_shift) - 1; ++ ++ buffer = malloc(mtd->writesize); ++ if (!buffer) ++ return; ++ ++ nand_valid = 1; ++} diff --git a/package/boot/uboot-mediatek/patches/001-mtk-0021-spl-allow-using-nand-base-without-standard-nand-driv.patch b/package/boot/uboot-mediatek/patches/001-mtk-0021-spl-allow-using-nand-base-without-standard-nand-driv.patch new file mode 100644 index 0000000000..40aac80fae --- /dev/null +++ b/package/boot/uboot-mediatek/patches/001-mtk-0021-spl-allow-using-nand-base-without-standard-nand-driv.patch @@ -0,0 +1,24 @@ +From 474082b03ae2b569f9daf43f78b91b57f7a1ae50 Mon Sep 17 00:00:00 2001 +From: Weijie Gao +Date: Fri, 20 May 2022 11:23:53 +0800 +Subject: [PATCH 21/25] spl: allow using nand base without standard nand driver + +This patch removes the dependency to SPL_NAND_DRIVERS for SPL_NAND_BASE to +allow minimal spl nand driver to use nand base for probing NAND chips. + +Signed-off-by: Weijie Gao +--- + common/spl/Kconfig | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +--- a/common/spl/Kconfig ++++ b/common/spl/Kconfig +@@ -764,7 +764,7 @@ config SPL_NAND_SIMPLE + expose the cmd_ctrl() interface. + + config SPL_NAND_BASE +- depends on SPL_NAND_DRIVERS ++ depends on SPL_NAND_SUPPORT + bool "Use Base NAND Driver" + help + Include nand_base.c in the SPL. diff --git a/package/boot/uboot-mediatek/patches/001-mtk-0022-spl-spl_legacy-fix-the-use-of-SPL_COPY_PAYLOAD_ONLY.patch b/package/boot/uboot-mediatek/patches/001-mtk-0022-spl-spl_legacy-fix-the-use-of-SPL_COPY_PAYLOAD_ONLY.patch new file mode 100644 index 0000000000..a0ab14d260 --- /dev/null +++ b/package/boot/uboot-mediatek/patches/001-mtk-0022-spl-spl_legacy-fix-the-use-of-SPL_COPY_PAYLOAD_ONLY.patch @@ -0,0 +1,64 @@ +From ba9c81e720f39b5dbc14592252bfc9402afee79d Mon Sep 17 00:00:00 2001 +From: Weijie Gao +Date: Fri, 20 May 2022 11:23:58 +0800 +Subject: [PATCH 22/25] spl: spl_legacy: fix the use of SPL_COPY_PAYLOAD_ONLY + +If the payload is compressed, SPL_COPY_PAYLOAD_ONLY should always be set +since the payload will not be directly read to its load address. The +payload will first be read to a temporary buffer, and then be decompressed +to its load address, without image header. + +If the payload is not compressed, and SPL_COPY_PAYLOAD_ONLY is set, image +header should be skipped on loading. Otherwise image header should also be +read to its load address. + +Reviewed-by: Daniel Schwierzeck +Signed-off-by: Weijie Gao +--- + common/spl/spl_legacy.c | 21 +++++++++++++++++++-- + 1 file changed, 19 insertions(+), 2 deletions(-) + +--- a/common/spl/spl_legacy.c ++++ b/common/spl/spl_legacy.c +@@ -88,15 +88,29 @@ int spl_load_legacy_img(struct spl_image + /* Read header into local struct */ + load->read(load, header, sizeof(hdr), &hdr); + ++ /* ++ * If the payload is compressed, the decompressed data should be ++ * directly write to its load address. ++ */ ++ if (spl_image_get_comp(&hdr) != IH_COMP_NONE) ++ spl_image->flags |= SPL_COPY_PAYLOAD_ONLY; ++ + ret = spl_parse_image_header(spl_image, bootdev, &hdr); + if (ret) + return ret; + +- dataptr = header + sizeof(hdr); +- + /* Read image */ + switch (spl_image_get_comp(&hdr)) { + case IH_COMP_NONE: ++ dataptr = header; ++ ++ /* ++ * Image header will be skipped only if SPL_COPY_PAYLOAD_ONLY ++ * is set ++ */ ++ if (spl_image->flags & SPL_COPY_PAYLOAD_ONLY) ++ dataptr += sizeof(hdr); ++ + load->read(load, dataptr, spl_image->size, + (void *)(unsigned long)spl_image->load_addr); + break; +@@ -104,6 +118,9 @@ int spl_load_legacy_img(struct spl_image + case IH_COMP_LZMA: + lzma_len = LZMA_LEN; + ++ /* dataptr points to compressed payload */ ++ dataptr = header + sizeof(hdr); ++ + debug("LZMA: Decompressing %08lx to %08lx\n", + dataptr, spl_image->load_addr); + src = malloc(spl_image->size); diff --git a/package/boot/uboot-mediatek/patches/001-mtk-0023-spl-nand-support-loading-legacy-image-with-payload-c.patch b/package/boot/uboot-mediatek/patches/001-mtk-0023-spl-nand-support-loading-legacy-image-with-payload-c.patch new file mode 100644 index 0000000000..1ef16c9955 --- /dev/null +++ b/package/boot/uboot-mediatek/patches/001-mtk-0023-spl-nand-support-loading-legacy-image-with-payload-c.patch @@ -0,0 +1,59 @@ +From b4e5137067d34a099efd921532ece177560789ca Mon Sep 17 00:00:00 2001 +From: Weijie Gao +Date: Fri, 20 May 2022 11:24:04 +0800 +Subject: [PATCH 23/25] spl: nand: support loading legacy image with payload + compressed + +Add support to load legacy image with payload compressed. This redirects +the boot flow for all legacy images. If the payload is not compressed, the +actual behavior will remain unchanged. + +Reviewed-by: Daniel Schwierzeck +Signed-off-by: Weijie Gao +--- + common/spl/spl_nand.c | 27 +++++++++++++++++++++++++++ + 1 file changed, 27 insertions(+) + +--- a/common/spl/spl_nand.c ++++ b/common/spl/spl_nand.c +@@ -56,6 +56,21 @@ static ulong spl_nand_fit_read(struct sp + return size / load->bl_len; + } + ++static ulong spl_nand_legacy_read(struct spl_load_info *load, ulong offs, ++ ulong size, void *dst) ++{ ++ int err; ++ ++ debug("%s: offs %lx, size %lx, dst %p\n", ++ __func__, offs, size, dst); ++ ++ err = nand_spl_load_image(offs, size, dst); ++ if (err) ++ return 0; ++ ++ return size; ++} ++ + struct mtd_info * __weak nand_get_mtd(void) + { + return NULL; +@@ -93,6 +108,18 @@ static int spl_nand_load_element(struct + load.bl_len = bl_len; + load.read = spl_nand_fit_read; + return spl_load_imx_container(spl_image, &load, offset / bl_len); ++ } else if (IS_ENABLED(CONFIG_SPL_LEGACY_IMAGE_FORMAT) && ++ image_get_magic(header) == IH_MAGIC) { ++ struct spl_load_info load; ++ ++ debug("Found legacy image\n"); ++ load.dev = NULL; ++ load.priv = NULL; ++ load.filename = NULL; ++ load.bl_len = 1; ++ load.read = spl_nand_legacy_read; ++ ++ return spl_load_legacy_img(spl_image, bootdev, &load, offset); + } else { + err = spl_parse_image_header(spl_image, bootdev, header); + if (err) diff --git a/package/boot/uboot-mediatek/patches/001-mtk-0024-tools-mtk_image-add-support-for-MT7621-NAND-images.patch b/package/boot/uboot-mediatek/patches/001-mtk-0024-tools-mtk_image-add-support-for-MT7621-NAND-images.patch new file mode 100644 index 0000000000..e107240372 --- /dev/null +++ b/package/boot/uboot-mediatek/patches/001-mtk-0024-tools-mtk_image-add-support-for-MT7621-NAND-images.patch @@ -0,0 +1,333 @@ +From 18dd1ef9417d0880f2f492b55bd4d9ede499f137 Mon Sep 17 00:00:00 2001 +From: Weijie Gao +Date: Fri, 20 May 2022 11:24:10 +0800 +Subject: [PATCH 24/25] tools: mtk_image: add support for MT7621 NAND images + +The BootROM of MT7621 requires a image header for SPL to record its size +and load address when booting from NAND. + +To create such an image, one can use the following command line: +mkimage -T mtk_image -a 0x80200000 -e 0x80200000 -n "mt7621=1" +-d u-boot-spl-ddr.bin u-boot-spl-ddr.img + +Reviewed-by: Daniel Schwierzeck +Signed-off-by: Weijie Gao +--- + tools/mtk_image.c | 182 ++++++++++++++++++++++++++++++++++++++++++++++ + tools/mtk_image.h | 24 ++++++ + 2 files changed, 206 insertions(+) + +--- a/tools/mtk_image.c ++++ b/tools/mtk_image.c +@@ -6,7 +6,9 @@ + * Author: Weijie Gao + */ + ++#include + #include ++#include + #include + #include "imagetool.h" + #include "mtk_image.h" +@@ -251,17 +253,45 @@ static uint32_t img_size; + static enum brlyt_img_type hdr_media; + static uint32_t hdr_offset; + static int use_lk_hdr; ++static int use_mt7621_hdr; + static bool is_arm64_image; + + /* LK image name */ + static char lk_name[32] = "U-Boot"; + ++/* CRC32 normal table required by MT7621 image */ ++static uint32_t crc32tbl[256]; ++ + /* NAND header selected by user */ + static const union nand_boot_header *hdr_nand; + + /* GFH header + 2 * 4KB pages of NAND */ + static char hdr_tmp[sizeof(struct gfh_header) + 0x2000]; + ++static uint32_t crc32_normal_cal(uint32_t crc, const void *data, size_t length, ++ const uint32_t *crc32c_table) ++{ ++ const uint8_t *p = data; ++ ++ while (length--) ++ crc = crc32c_table[(uint8_t)((crc >> 24) ^ *p++)] ^ (crc << 8); ++ ++ return crc; ++} ++ ++static void crc32_normal_init(uint32_t *crc32c_table, uint32_t poly) ++{ ++ uint32_t v, i, j; ++ ++ for (i = 0; i < 256; i++) { ++ v = i << 24; ++ for (j = 0; j < 8; j++) ++ v = (v << 1) ^ ((v & (1 << 31)) ? poly : 0); ++ ++ crc32c_table[i] = v; ++ } ++} ++ + static int mtk_image_check_image_types(uint8_t type) + { + if (type == IH_TYPE_MTKIMAGE) +@@ -283,6 +313,7 @@ static int mtk_brom_parse_imagename(cons + static const char *hdr_offs = ""; + static const char *nandinfo = ""; + static const char *lk = ""; ++ static const char *mt7621 = ""; + static const char *arm64_param = ""; + + key = buf; +@@ -332,6 +363,9 @@ static int mtk_brom_parse_imagename(cons + if (!strcmp(key, "lk")) + lk = val; + ++ if (!strcmp(key, "mt7621")) ++ mt7621 = val; ++ + if (!strcmp(key, "lkname")) + snprintf(lk_name, sizeof(lk_name), "%s", val); + +@@ -352,6 +386,13 @@ static int mtk_brom_parse_imagename(cons + return 0; + } + ++ /* if user specified MT7621 image header, skip following checks */ ++ if (mt7621 && mt7621[0] == '1') { ++ use_mt7621_hdr = 1; ++ free(buf); ++ return 0; ++ } ++ + /* parse media type */ + for (i = 0; i < ARRAY_SIZE(brom_images); i++) { + if (!strcmp(brom_images[i].name, media)) { +@@ -419,6 +460,13 @@ static int mtk_image_vrec_header(struct + return 0; + } + ++ if (use_mt7621_hdr) { ++ tparams->header_size = image_get_header_size(); ++ tparams->hdr = &hdr_tmp; ++ memset(&hdr_tmp, 0, tparams->header_size); ++ return 0; ++ } ++ + if (hdr_media == BRLYT_TYPE_NAND || hdr_media == BRLYT_TYPE_SNAND) + tparams->header_size = 2 * le16_to_cpu(hdr_nand->pagesize); + else +@@ -579,9 +627,90 @@ static int mtk_image_verify_nand_header( + return 0; + } + ++static uint32_t crc32be_cal(const void *data, size_t length) ++{ ++ uint32_t crc = 0; ++ uint8_t c; ++ ++ if (crc32tbl[1] != MT7621_IH_CRC_POLYNOMIAL) ++ crc32_normal_init(crc32tbl, MT7621_IH_CRC_POLYNOMIAL); ++ ++ crc = crc32_normal_cal(crc, data, length, crc32tbl); ++ ++ for (; length; length >>= 8) { ++ c = length & 0xff; ++ crc = crc32_normal_cal(crc, &c, 1, crc32tbl); ++ } ++ ++ return ~crc; ++} ++ ++static int mtk_image_verify_mt7621_header(const uint8_t *ptr, int print) ++{ ++ const image_header_t *hdr = (const image_header_t *)ptr; ++ struct mt7621_nand_header *nhdr; ++ uint32_t spl_size, crcval; ++ image_header_t header; ++ int ret; ++ ++ spl_size = image_get_size(hdr); ++ ++ if (spl_size > img_size) { ++ if (print) ++ printf("Incomplete SPL image\n"); ++ return -1; ++ } ++ ++ ret = image_check_hcrc(hdr); ++ if (!ret) { ++ if (print) ++ printf("Bad header CRC\n"); ++ return -1; ++ } ++ ++ ret = image_check_dcrc(hdr); ++ if (!ret) { ++ if (print) ++ printf("Bad data CRC\n"); ++ return -1; ++ } ++ ++ /* Copy header so we can blank CRC field for re-calculation */ ++ memmove(&header, hdr, image_get_header_size()); ++ image_set_hcrc(&header, 0); ++ ++ nhdr = (struct mt7621_nand_header *)header.ih_name; ++ crcval = be32_to_cpu(nhdr->crc); ++ nhdr->crc = 0; ++ ++ if (crcval != crc32be_cal(&header, image_get_header_size())) { ++ if (print) ++ printf("Bad NAND header CRC\n"); ++ return -1; ++ } ++ ++ if (print) { ++ printf("Load Address: %08x\n", image_get_load(hdr)); ++ ++ printf("Image Name: %.*s\n", MT7621_IH_NMLEN, ++ image_get_name(hdr)); ++ ++ if (IMAGE_ENABLE_TIMESTAMP) { ++ printf("Created: "); ++ genimg_print_time((time_t)image_get_time(hdr)); ++ } ++ ++ printf("Data Size: "); ++ genimg_print_size(image_get_data_size(hdr)); ++ } ++ ++ return 0; ++} ++ + static int mtk_image_verify_header(unsigned char *ptr, int image_size, + struct image_tool_params *params) + { ++ image_header_t *hdr = (image_header_t *)ptr; + union lk_hdr *lk = (union lk_hdr *)ptr; + + /* nothing to verify for LK image header */ +@@ -590,6 +719,9 @@ static int mtk_image_verify_header(unsig + + img_size = image_size; + ++ if (image_get_magic(hdr) == IH_MAGIC) ++ return mtk_image_verify_mt7621_header(ptr, 0); ++ + if (!strcmp((char *)ptr, NAND_BOOT_NAME)) + return mtk_image_verify_nand_header(ptr, 0); + else +@@ -600,6 +732,7 @@ static int mtk_image_verify_header(unsig + + static void mtk_image_print_header(const void *ptr) + { ++ image_header_t *hdr = (image_header_t *)ptr; + union lk_hdr *lk = (union lk_hdr *)ptr; + + if (le32_to_cpu(lk->magic) == LK_PART_MAGIC) { +@@ -610,6 +743,11 @@ static void mtk_image_print_header(const + + printf("Image Type: MediaTek BootROM Loadable Image\n"); + ++ if (image_get_magic(hdr) == IH_MAGIC) { ++ mtk_image_verify_mt7621_header(ptr, 1); ++ return; ++ } ++ + if (!strcmp((char *)ptr, NAND_BOOT_NAME)) + mtk_image_verify_nand_header(ptr, 1); + else +@@ -773,6 +911,45 @@ static void mtk_image_set_nand_header(vo + filesize - 2 * le16_to_cpu(hdr_nand->pagesize) - SHA256_SUM_LEN); + } + ++static void mtk_image_set_mt7621_header(void *ptr, off_t filesize, ++ uint32_t loadaddr) ++{ ++ image_header_t *hdr = (image_header_t *)ptr; ++ struct mt7621_stage1_header *shdr; ++ struct mt7621_nand_header *nhdr; ++ uint32_t datasize, crcval; ++ ++ datasize = filesize - image_get_header_size(); ++ nhdr = (struct mt7621_nand_header *)hdr->ih_name; ++ shdr = (struct mt7621_stage1_header *)(ptr + image_get_header_size()); ++ ++ shdr->ep = cpu_to_be32(loadaddr); ++ shdr->stage_size = cpu_to_be32(datasize); ++ ++ image_set_magic(hdr, IH_MAGIC); ++ image_set_time(hdr, time(NULL)); ++ image_set_size(hdr, datasize); ++ image_set_load(hdr, loadaddr); ++ image_set_ep(hdr, loadaddr); ++ image_set_os(hdr, IH_OS_U_BOOT); ++ image_set_arch(hdr, IH_ARCH_MIPS); ++ image_set_type(hdr, IH_TYPE_STANDALONE); ++ image_set_comp(hdr, IH_COMP_NONE); ++ ++ crcval = crc32(0, (uint8_t *)shdr, datasize); ++ image_set_dcrc(hdr, crcval); ++ ++ strncpy(nhdr->ih_name, "MT7621 NAND", MT7621_IH_NMLEN); ++ ++ nhdr->ih_stage_offset = cpu_to_be32(image_get_header_size()); ++ ++ crcval = crc32be_cal(hdr, image_get_header_size()); ++ nhdr->crc = cpu_to_be32(crcval); ++ ++ crcval = crc32(0, (uint8_t *)hdr, image_get_header_size()); ++ image_set_hcrc(hdr, crcval); ++} ++ + static void mtk_image_set_header(void *ptr, struct stat *sbuf, int ifd, + struct image_tool_params *params) + { +@@ -791,6 +968,11 @@ static void mtk_image_set_header(void *p + img_gen = true; + img_size = sbuf->st_size; + ++ if (use_mt7621_hdr) { ++ mtk_image_set_mt7621_header(ptr, sbuf->st_size, params->addr); ++ return; ++ } ++ + if (hdr_media == BRLYT_TYPE_NAND || hdr_media == BRLYT_TYPE_SNAND) + mtk_image_set_nand_header(ptr, sbuf->st_size, params->addr); + else +--- a/tools/mtk_image.h ++++ b/tools/mtk_image.h +@@ -200,4 +200,28 @@ union lk_hdr { + + #define LK_PART_MAGIC 0x58881688 + ++/* MT7621 NAND SPL image header */ ++ ++#define MT7621_IH_NMLEN 12 ++#define MT7621_IH_CRC_POLYNOMIAL 0x04c11db7 ++ ++struct mt7621_nand_header { ++ char ih_name[MT7621_IH_NMLEN]; ++ uint32_t nand_ac_timing; ++ uint32_t ih_stage_offset; ++ uint32_t ih_bootloader_offset; ++ uint32_t nand_info_1_data; ++ uint32_t crc; ++}; ++ ++struct mt7621_stage1_header { ++ uint32_t jump_insn[2]; ++ uint32_t ep; ++ uint32_t stage_size; ++ uint32_t has_stage2; ++ uint32_t next_ep; ++ uint32_t next_size; ++ uint32_t next_offset; ++}; ++ + #endif /* _MTK_IMAGE_H */ diff --git a/package/boot/uboot-mediatek/patches/001-mtk-0025-MAINTAINERS-update-maintainer-for-MediaTek-MIPS-plat.patch b/package/boot/uboot-mediatek/patches/001-mtk-0025-MAINTAINERS-update-maintainer-for-MediaTek-MIPS-plat.patch new file mode 100644 index 0000000000..e89d204d16 --- /dev/null +++ b/package/boot/uboot-mediatek/patches/001-mtk-0025-MAINTAINERS-update-maintainer-for-MediaTek-MIPS-plat.patch @@ -0,0 +1,39 @@ +From e5fc4022af3cfd59e3459276305671a595ac5ff0 Mon Sep 17 00:00:00 2001 +From: Weijie Gao +Date: Fri, 20 May 2022 11:24:16 +0800 +Subject: [PATCH 25/25] MAINTAINERS: update maintainer for MediaTek MIPS + platform + +Update maintainer for MediaTek MIPS platform + +Signed-off-by: Weijie Gao +--- + MAINTAINERS | 8 ++++++++ + 1 file changed, 8 insertions(+) + +--- a/MAINTAINERS ++++ b/MAINTAINERS +@@ -1007,15 +1007,23 @@ R: GSS_MTK_Uboot_upstream -Date: Mon, 13 Jul 2020 23:37:37 +0200 -Subject: [PATCH 11/12] scripts: remove dependency on swig - -Don't build the libfdt tool, as it has a dependency on swig (which -OpenWrt does not ship). - -This requires more hacks, as of-platdata generation does not work -without it. - -Signed-off-by: David Bauer ---- - scripts/dtc/Makefile | 2 -- - 1 file changed, 2 deletions(-) - ---- a/scripts/dtc/Makefile -+++ b/scripts/dtc/Makefile -@@ -18,5 +18,3 @@ HOSTCFLAGS_dtc-parser.tab.o := -I$(src) - # dependencies on generated files need to be listed explicitly - $(obj)/dtc-lexer.lex.o: $(obj)/dtc-parser.tab.h - --# Added for U-Boot --subdir-$(CONFIG_PYLIBFDT) += pylibfdt diff --git a/package/boot/uboot-mediatek/patches/110-no-kwbimage.patch b/package/boot/uboot-mediatek/patches/110-no-kwbimage.patch index 65d14f5bec..6d4af1f174 100644 --- a/package/boot/uboot-mediatek/patches/110-no-kwbimage.patch +++ b/package/boot/uboot-mediatek/patches/110-no-kwbimage.patch @@ -1,6 +1,6 @@ --- a/tools/Makefile +++ b/tools/Makefile -@@ -119,7 +119,6 @@ dumpimage-mkimage-objs := aisimage.o \ +@@ -120,7 +120,6 @@ dumpimage-mkimage-objs := aisimage.o \ imximage.o \ imx8image.o \ imx8mimage.o \ diff --git a/package/boot/uboot-mediatek/patches/120-use-xz-instead-of-lzma.patch b/package/boot/uboot-mediatek/patches/120-use-xz-instead-of-lzma.patch index c13871b71a..7204c404c0 100644 --- a/package/boot/uboot-mediatek/patches/120-use-xz-instead-of-lzma.patch +++ b/package/boot/uboot-mediatek/patches/120-use-xz-instead-of-lzma.patch @@ -1,6 +1,6 @@ --- a/Makefile +++ b/Makefile -@@ -1045,7 +1045,7 @@ quiet_cmd_pad_cat = CAT $@ +@@ -1061,7 +1061,7 @@ quiet_cmd_pad_cat = CAT $@ cmd_pad_cat = $(cmd_objcopy) && $(append) || { rm -f $@; false; } quiet_cmd_lzma = LZMA $@ diff --git a/package/boot/uboot-mediatek/patches/130-fix-mkimage-host-build.patch b/package/boot/uboot-mediatek/patches/130-fix-mkimage-host-build.patch new file mode 100644 index 0000000000..8b110a880f --- /dev/null +++ b/package/boot/uboot-mediatek/patches/130-fix-mkimage-host-build.patch @@ -0,0 +1,24 @@ +--- a/tools/image-host.c ++++ b/tools/image-host.c +@@ -1122,6 +1122,7 @@ static int fit_config_add_verification_d + * 2) get public key (X509_get_pubkey) + * 3) provide der format (d2i_RSAPublicKey) + */ ++#ifdef CONFIG_TOOLS_LIBCRYPTO + static int read_pub_key(const char *keydir, const void *name, + unsigned char **pubkey, int *pubkey_len) + { +@@ -1175,6 +1176,13 @@ err_cert: + fclose(f); + return ret; + } ++#else ++static int read_pub_key(const char *keydir, const void *name, ++ unsigned char **pubkey, int *pubkey_len) ++{ ++ return -ENOSYS; ++} ++#endif + + int fit_pre_load_data(const char *keydir, void *keydest, void *fit) + { diff --git a/package/boot/uboot-mediatek/patches/200-cmd-add-imsz-and-imszb.patch b/package/boot/uboot-mediatek/patches/200-cmd-add-imsz-and-imszb.patch index 5dce177cfa..1759b04899 100644 --- a/package/boot/uboot-mediatek/patches/200-cmd-add-imsz-and-imszb.patch +++ b/package/boot/uboot-mediatek/patches/200-cmd-add-imsz-and-imszb.patch @@ -1,6 +1,6 @@ --- a/cmd/bootm.c +++ b/cmd/bootm.c -@@ -228,6 +228,65 @@ U_BOOT_CMD( +@@ -257,6 +257,65 @@ U_BOOT_CMD( /* iminfo - print header info for a requested image */ /*******************************************************************/ #if defined(CONFIG_CMD_IMI) @@ -68,7 +68,7 @@ { --- a/boot/image-fit.c +++ b/boot/image-fit.c -@@ -1993,6 +1993,51 @@ static const char *fit_get_image_type_pr +@@ -1995,6 +1995,51 @@ static const char *fit_get_image_type_pr return "unknown"; } @@ -122,7 +122,7 @@ int arch, int image_type, int bootstage_id, --- a/include/image.h +++ b/include/image.h -@@ -952,6 +952,7 @@ int fit_parse_subimage(const char *spec, +@@ -955,6 +955,7 @@ int fit_parse_subimage(const char *spec, ulong *addr, const char **image_name); int fit_get_subimage_count(const void *fit, int images_noffset); diff --git a/package/boot/uboot-mediatek/patches/210-cmd-bootmenu-add-ability-to-select-item-by-shortkey.patch b/package/boot/uboot-mediatek/patches/210-cmd-bootmenu-add-ability-to-select-item-by-shortkey.patch index c43b542dcb..dc9c9ae5e4 100644 --- a/package/boot/uboot-mediatek/patches/210-cmd-bootmenu-add-ability-to-select-item-by-shortkey.patch +++ b/package/boot/uboot-mediatek/patches/210-cmd-bootmenu-add-ability-to-select-item-by-shortkey.patch @@ -12,7 +12,7 @@ Signed-off-by: Weijie Gao --- a/cmd/bootmenu.c +++ b/cmd/bootmenu.c -@@ -11,6 +11,7 @@ +@@ -14,6 +14,7 @@ #include #include #include @@ -20,105 +20,7 @@ Signed-off-by: Weijie Gao #include #include -@@ -38,6 +39,7 @@ struct bootmenu_data { - int active; /* active menu entry */ - int count; /* total count of menu entries */ - struct bootmenu_entry *first; /* first menu entry */ -+ bool last_choiced; - }; - - enum bootmenu_key { -@@ -46,8 +48,27 @@ enum bootmenu_key { - KEY_DOWN, - KEY_SELECT, - KEY_QUIT, -+ KEY_CHOICE, - }; - -+static const char choice_chars[] = { -+ '1', '2', '3', '4', '5', '6', '7', '8', '9', -+ 'a', 'b', 'c', 'd', 'e', 'f', 'g', 'h', 'i', 'j', -+ 'k', 'l', 'm', 'n', 'o', 'p', 'q', 'r', 's', 't', -+ 'u', 'v', 'w', 'x', 'y', 'z' -+}; -+ -+static int find_choice(char choice) -+{ -+ int i; -+ -+ for (i = 0; i < ARRAY_SIZE(choice_chars); i++) -+ if (tolower(choice) == choice_chars[i]) -+ return i; -+ -+ return -1; -+} -+ - static char *bootmenu_getoption(unsigned short int n) - { - char name[MAX_ENV_SIZE]; -@@ -82,7 +103,7 @@ static void bootmenu_print_entry(void *d - } - - static void bootmenu_autoboot_loop(struct bootmenu_data *menu, -- enum bootmenu_key *key, int *esc) -+ enum bootmenu_key *key, int *esc, int *choice) - { - int i, c; - -@@ -115,6 +136,19 @@ static void bootmenu_autoboot_loop(struc - break; - default: - *key = KEY_NONE; -+ if (*esc) -+ break; -+ -+ *choice = find_choice(c); -+ if ((*choice >= 0 && -+ *choice < menu->count - 1)) { -+ *key = KEY_CHOICE; -+ } else if (c == '0') { -+ *choice = menu->count - 1; -+ *key = KEY_CHOICE; -+ } else { -+ *key = KEY_NONE; -+ } - break; - } - -@@ -136,10 +170,16 @@ static void bootmenu_autoboot_loop(struc - } - - static void bootmenu_loop(struct bootmenu_data *menu, -- enum bootmenu_key *key, int *esc) -+ enum bootmenu_key *key, int *esc, int *choice) - { - int c; - -+ if (menu->last_choiced) { -+ menu->last_choiced = false; -+ *key = KEY_SELECT; -+ return; -+ } -+ - if (*esc == 1) { - if (tstc()) { - c = getchar(); -@@ -165,6 +205,14 @@ static void bootmenu_loop(struct bootmen - if (c == '\e') { - *esc = 1; - *key = KEY_NONE; -+ } else { -+ *choice = find_choice(c); -+ if ((*choice >= 0 && *choice < menu->count - 1)) { -+ *key = KEY_CHOICE; -+ } else if (c == '0') { -+ *choice = menu->count - 1; -+ *key = KEY_CHOICE; -+ } - } - break; - case 1: -@@ -216,16 +264,17 @@ static char *bootmenu_choice_entry(void +@@ -87,16 +88,17 @@ static char *bootmenu_choice_entry(void struct bootmenu_data *menu = data; struct bootmenu_entry *iter; enum bootmenu_key key = KEY_NONE; @@ -138,7 +40,7 @@ Signed-off-by: Weijie Gao } switch (key) { -@@ -239,6 +288,12 @@ static char *bootmenu_choice_entry(void +@@ -110,6 +112,12 @@ static char *bootmenu_choice_entry(void ++menu->active; /* no menu key selected, regenerate menu */ return NULL; @@ -151,7 +53,28 @@ Signed-off-by: Weijie Gao case KEY_SELECT: iter = menu->first; for (i = 0; i < menu->active; ++i) -@@ -294,6 +349,7 @@ static struct bootmenu_data *bootmenu_cr +@@ -181,12 +189,19 @@ static int prepare_bootmenu_entry(struct + if (!entry) + return -ENOMEM; + +- entry->title = strndup(option, sep - option); ++ entry->title = malloc((sep - option) + 4); + if (!entry->title) { + free(entry); + return -ENOMEM; + } + ++ if (i < ARRAY_SIZE(choice_chars)) { ++ sprintf(entry->title, "%c. %.*s", choice_chars[i], ++ (int)(sep - option), option); ++ } else { ++ sprintf(entry->title, " %.*s", (int)(sep - option), option); ++ } ++ + entry->command = strdup(sep + 1); + if (!entry->command) { + free(entry->title); +@@ -331,6 +346,7 @@ static struct bootmenu_data *bootmenu_cr menu->delay = delay; menu->active = 0; menu->first = NULL; @@ -159,34 +82,137 @@ Signed-off-by: Weijie Gao default_str = env_get("bootmenu_default"); if (default_str) -@@ -311,12 +367,19 @@ static struct bootmenu_data *bootmenu_cr - goto cleanup; +@@ -356,9 +372,9 @@ static struct bootmenu_data *bootmenu_cr + + /* Add Quit entry if entering U-Boot console is disabled */ + if (!IS_ENABLED(CONFIG_BOOTMENU_DISABLE_UBOOT_CONSOLE)) +- entry->title = strdup("U-Boot console"); ++ entry->title = strdup("0. U-Boot console"); + else +- entry->title = strdup("Quit"); ++ entry->title = strdup("0. Quit"); - len = sep-option; -- entry->title = malloc(len + 1); -+ entry->title = malloc(len + 4); if (!entry->title) { free(entry); - goto cleanup; - } -- memcpy(entry->title, option, len); +--- a/common/menu.c ++++ b/common/menu.c +@@ -9,6 +9,7 @@ + #include + #include + #include ++#include + #include + #include + #include +@@ -47,6 +48,17 @@ struct menu { + int item_cnt; + }; + ++static int find_choice(char choice) ++{ ++ int i; + -+ if (i < ARRAY_SIZE(choice_chars)) { -+ len = sprintf(entry->title, "%c. %.*s", choice_chars[i], -+ len, option); ++ for (i = 0; i < ARRAY_SIZE(choice_chars); i++) ++ if (tolower(choice) == choice_chars[i]) ++ return i; ++ ++ return -1; ++} ++ + /* + * An iterator function for menu items. callback will be called for each item + * in m, with m, a pointer to the item, and extra being passed to callback. If +@@ -426,7 +438,7 @@ int menu_destroy(struct menu *m) + } + + void bootmenu_autoboot_loop(struct bootmenu_data *menu, +- enum bootmenu_key *key, int *esc) ++ enum bootmenu_key *key, int *esc, int *choice) + { + int i, c; + +@@ -456,6 +468,19 @@ void bootmenu_autoboot_loop(struct bootm + break; + default: + *key = KEY_NONE; ++ if (*esc) ++ break; ++ ++ *choice = find_choice(c); ++ if ((*choice >= 0 && ++ *choice < menu->count - 1)) { ++ *key = KEY_CHOICE; ++ } else if (c == '0') { ++ *choice = menu->count - 1; ++ *key = KEY_CHOICE; ++ } else { ++ *key = KEY_NONE; ++ } + break; + } + +@@ -475,10 +500,16 @@ void bootmenu_autoboot_loop(struct bootm + } + + void bootmenu_loop(struct bootmenu_data *menu, +- enum bootmenu_key *key, int *esc) ++ enum bootmenu_key *key, int *esc, int *choice) + { + int c; + ++ if (menu->last_choiced) { ++ menu->last_choiced = false; ++ *key = KEY_SELECT; ++ return; ++ } ++ + if (*esc == 1) { + if (tstc()) { + c = getchar(); +@@ -504,6 +535,14 @@ void bootmenu_loop(struct bootmenu_data + if (c == '\e') { + *esc = 1; + *key = KEY_NONE; + } else { -+ len = sprintf(entry->title, " %.*s", len, option); -+ } ++ *choice = find_choice(c); ++ if ((*choice >= 0 && *choice < menu->count - 1)) { ++ *key = KEY_CHOICE; ++ } else if (c == '0') { ++ *choice = menu->count - 1; ++ *key = KEY_CHOICE; ++ } + } + break; + case 1: +--- a/include/menu.h ++++ b/include/menu.h +@@ -40,6 +40,7 @@ struct bootmenu_data { + int active; /* active menu entry */ + int count; /* total count of menu entries */ + struct bootmenu_entry *first; /* first menu entry */ ++ bool last_choiced; + }; + + enum bootmenu_key { +@@ -48,11 +49,19 @@ enum bootmenu_key { + KEY_DOWN, + KEY_SELECT, + KEY_QUIT, ++ KEY_CHOICE, + }; + + void bootmenu_autoboot_loop(struct bootmenu_data *menu, +- enum bootmenu_key *key, int *esc); ++ enum bootmenu_key *key, int *esc, int *choice); + void bootmenu_loop(struct bootmenu_data *menu, +- enum bootmenu_key *key, int *esc); ++ enum bootmenu_key *key, int *esc, int *choice); + - entry->title[len] = 0; ++static const char choice_chars[] = { ++ '1', '2', '3', '4', '5', '6', '7', '8', '9', ++ 'a', 'b', 'c', 'd', 'e', 'f', 'g', 'h', 'i', 'j', ++ 'k', 'l', 'm', 'n', 'o', 'p', 'q', 'r', 's', 't', ++ 'u', 'v', 'w', 'x', 'y', 'z' ++}; - len = strlen(sep + 1); -@@ -353,7 +416,7 @@ static struct bootmenu_data *bootmenu_cr - if (!entry) - goto cleanup; - -- entry->title = strdup("U-Boot console"); -+ entry->title = strdup("0. U-Boot console"); - if (!entry->title) { - free(entry); - goto cleanup; + #endif /* __MENU_H__ */ diff --git a/package/boot/uboot-mediatek/patches/211-cmd-bootmenu-custom-title.patch b/package/boot/uboot-mediatek/patches/211-cmd-bootmenu-custom-title.patch index 3f98f13c6e..f1e60c6407 100644 --- a/package/boot/uboot-mediatek/patches/211-cmd-bootmenu-custom-title.patch +++ b/package/boot/uboot-mediatek/patches/211-cmd-bootmenu-custom-title.patch @@ -1,19 +1,10 @@ --- a/cmd/bootmenu.c +++ b/cmd/bootmenu.c -@@ -39,6 +39,7 @@ struct bootmenu_data { - int active; /* active menu entry */ - int count; /* total count of menu entries */ - struct bootmenu_entry *first; /* first menu entry */ -+ char *mtitle; /* custom menu title */ - bool last_choiced; - }; - -@@ -471,7 +472,12 @@ static void menu_display_statusline(stru +@@ -431,7 +431,11 @@ static void menu_display_statusline(stru printf(ANSI_CURSOR_POSITION, 1, 1); puts(ANSI_CLEAR_LINE); - printf(ANSI_CURSOR_POSITION, 2, 1); -- puts(" *** U-Boot Boot Menu ***"); -+ + printf(ANSI_CURSOR_POSITION, 2, 3); +- puts("*** U-Boot Boot Menu ***"); + if (menu->mtitle) + puts(menu->mtitle); + else @@ -22,11 +13,21 @@ puts(ANSI_CLEAR_LINE_TO_END); printf(ANSI_CURSOR_POSITION, 3, 1); puts(ANSI_CLEAR_LINE); -@@ -525,6 +531,7 @@ static void bootmenu_show(int delay) - return; +@@ -516,6 +520,7 @@ static enum bootmenu_ret bootmenu_show(i + return BOOTMENU_RET_FAIL; } + bootmenu->mtitle = env_get("bootmenu_title"); for (iter = bootmenu->first; iter; iter = iter->next) { - if (!menu_item_add(menu, iter->key, iter)) + if (menu_item_add(menu, iter->key, iter) != 1) goto cleanup; +--- a/include/menu.h ++++ b/include/menu.h +@@ -40,6 +40,7 @@ struct bootmenu_data { + int active; /* active menu entry */ + int count; /* total count of menu entries */ + struct bootmenu_entry *first; /* first menu entry */ ++ char *mtitle; /* custom menu title */ + bool last_choiced; + }; + diff --git a/package/boot/uboot-mediatek/patches/220-cmd-env-readmem.patch b/package/boot/uboot-mediatek/patches/220-cmd-env-readmem.patch index f7f2021652..544767e2fa 100644 --- a/package/boot/uboot-mediatek/patches/220-cmd-env-readmem.patch +++ b/package/boot/uboot-mediatek/patches/220-cmd-env-readmem.patch @@ -1,6 +1,6 @@ --- a/cmd/Kconfig +++ b/cmd/Kconfig -@@ -483,6 +483,12 @@ config CMD_ENV_EXISTS +@@ -540,6 +540,12 @@ config CMD_ENV_EXISTS Check if a variable is defined in the environment for use in shell scripting. @@ -76,7 +76,7 @@ #if defined(CONFIG_CMD_ENV_CALLBACK) static int print_static_binding(const char *var_name, const char *callback_name, void *priv) -@@ -1189,6 +1243,9 @@ static struct cmd_tbl cmd_env_sub[] = { +@@ -1231,6 +1285,9 @@ static struct cmd_tbl cmd_env_sub[] = { U_BOOT_CMD_MKENT(load, 1, 0, do_env_load, "", ""), #endif U_BOOT_CMD_MKENT(print, CONFIG_SYS_MAXARGS, 1, do_env_print, "", ""), @@ -86,7 +86,7 @@ #if defined(CONFIG_CMD_RUN) U_BOOT_CMD_MKENT(run, CONFIG_SYS_MAXARGS, 1, do_run, "", ""), #endif -@@ -1277,6 +1334,9 @@ static char env_help_text[] = +@@ -1322,6 +1379,9 @@ static char env_help_text[] = #if defined(CONFIG_CMD_NVEDIT_EFI) "env print -e [-guid guid] [-n] [name ...] - print UEFI environment\n" #endif @@ -96,7 +96,7 @@ #if defined(CONFIG_CMD_RUN) "env run var [...] - run commands in an environment variable\n" #endif -@@ -1386,6 +1446,17 @@ U_BOOT_CMD( +@@ -1431,6 +1491,17 @@ U_BOOT_CMD( ); #endif diff --git a/package/boot/uboot-mediatek/patches/230-cmd-add-pstore-check.patch b/package/boot/uboot-mediatek/patches/230-cmd-add-pstore-check.patch index 587245d2ab..d0abcb1acc 100644 --- a/package/boot/uboot-mediatek/patches/230-cmd-add-pstore-check.patch +++ b/package/boot/uboot-mediatek/patches/230-cmd-add-pstore-check.patch @@ -1,6 +1,6 @@ --- a/cmd/pstore.c +++ b/cmd/pstore.c -@@ -207,6 +207,58 @@ static int pstore_set(struct cmd_tbl *cm +@@ -208,6 +208,58 @@ static int pstore_set(struct cmd_tbl *cm } /** @@ -59,7 +59,7 @@ * pstore_print_buffer() - Print buffer * @type: buffer type * @buffer: buffer to print -@@ -458,6 +510,7 @@ static int pstore_save(struct cmd_tbl *c +@@ -459,6 +511,7 @@ static int pstore_save(struct cmd_tbl *c static struct cmd_tbl cmd_pstore_sub[] = { U_BOOT_CMD_MKENT(set, 8, 0, pstore_set, "", ""), @@ -67,7 +67,7 @@ U_BOOT_CMD_MKENT(display, 3, 0, pstore_display, "", ""), U_BOOT_CMD_MKENT(save, 4, 0, pstore_save, "", ""), }; -@@ -531,6 +584,8 @@ U_BOOT_CMD(pstore, 10, 0, do_pstore, +@@ -560,6 +613,8 @@ U_BOOT_CMD(pstore, 10, 0, do_pstore, " 'pmsg-size' is the size of the user space logs record.\n" " 'ecc-size' enables/disables ECC support and specifies ECC buffer size in\n" " bytes (0 disables it, 1 is a special value, means 16 bytes ECC).\n" diff --git a/package/boot/uboot-mediatek/patches/280-image-fdt-save-name-of-FIT-configuration-in-chosen-node.patch b/package/boot/uboot-mediatek/patches/280-image-fdt-save-name-of-FIT-configuration-in-chosen-node.patch index 8517ffb97c..ff41c52422 100644 --- a/package/boot/uboot-mediatek/patches/280-image-fdt-save-name-of-FIT-configuration-in-chosen-node.patch +++ b/package/boot/uboot-mediatek/patches/280-image-fdt-save-name-of-FIT-configuration-in-chosen-node.patch @@ -14,13 +14,11 @@ Reviewed-by: Tom Rini boot/image-fdt.c | 6 ++++++ 1 file changed, 6 insertions(+) -diff --git a/boot/image-fdt.c b/boot/image-fdt.c -index 692a9ad3e4..fdb69926a2 100644 --- a/boot/image-fdt.c +++ b/boot/image-fdt.c -@@ -601,6 +601,12 @@ int image_setup_libfdt(bootm_headers_t *images, void *blob, - goto err; - } +@@ -639,6 +639,12 @@ int image_setup_libfdt(bootm_headers_t * + images->fit_uname_cfg, + strlen(images->fit_uname_cfg) + 1, 1); + /* Store name of configuration node as u-boot,bootconf in /chosen node */ + if (images->fit_uname_cfg) @@ -31,6 +29,3 @@ index 692a9ad3e4..fdb69926a2 100644 /* Update ethernet nodes */ fdt_fixup_ethernet(blob); #if CONFIG_IS_ENABLED(CMD_PSTORE) --- -2.35.3 - diff --git a/package/boot/uboot-mediatek/patches/300-force-pylibfdt-build.patch b/package/boot/uboot-mediatek/patches/300-force-pylibfdt-build.patch new file mode 100644 index 0000000000..89d3c82475 --- /dev/null +++ b/package/boot/uboot-mediatek/patches/300-force-pylibfdt-build.patch @@ -0,0 +1,30 @@ +--- a/Makefile ++++ b/Makefile +@@ -2063,26 +2063,7 @@ endif + # Check dtc and pylibfdt, if DTC is provided, else build them + PHONY += scripts_dtc + scripts_dtc: scripts_basic +- $(Q)if test "$(DTC)" = "$(DTC_INTREE)"; then \ +- $(MAKE) $(build)=scripts/dtc; \ +- else \ +- if ! $(DTC) -v >/dev/null; then \ +- echo '*** Failed to check dtc version: $(DTC)'; \ +- false; \ +- else \ +- if test "$(call dtc-version)" -lt $(DTC_MIN_VERSION); then \ +- echo '*** Your dtc is too old, please upgrade to dtc $(DTC_MIN_VERSION) or newer'; \ +- false; \ +- else \ +- if [ -n "$(CONFIG_PYLIBFDT)" ]; then \ +- if ! echo "import libfdt" | $(PYTHON3) 2>/dev/null; then \ +- echo '*** pylibfdt does not seem to be available with $(PYTHON3)'; \ +- false; \ +- fi; \ +- fi; \ +- fi; \ +- fi; \ +- fi ++ $(MAKE) $(build)=scripts/dtc + + # --------------------------------------------------------------------------- + quiet_cmd_cpp_lds = LDS $@ diff --git a/package/boot/uboot-mediatek/patches/350-add-support-for-Winbond-W25Q512JV.patch b/package/boot/uboot-mediatek/patches/350-add-support-for-Winbond-W25Q512JV.patch index 50df49d823..da746bb124 100644 --- a/package/boot/uboot-mediatek/patches/350-add-support-for-Winbond-W25Q512JV.patch +++ b/package/boot/uboot-mediatek/patches/350-add-support-for-Winbond-W25Q512JV.patch @@ -1,6 +1,6 @@ --- a/drivers/mtd/spi/spi-nor-ids.c +++ b/drivers/mtd/spi/spi-nor-ids.c -@@ -369,6 +369,8 @@ const struct flash_info spi_nor_ids[] = +@@ -376,6 +376,8 @@ const struct flash_info spi_nor_ids[] = SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB) }, { INFO("w25q256", 0xef4019, 0, 64 * 1024, 512, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, diff --git a/package/boot/uboot-mediatek/patches/400-update-bpir2-defconfig.patch b/package/boot/uboot-mediatek/patches/400-update-bpir2-defconfig.patch index 01a550b301..3e13427de4 100644 --- a/package/boot/uboot-mediatek/patches/400-update-bpir2-defconfig.patch +++ b/package/boot/uboot-mediatek/patches/400-update-bpir2-defconfig.patch @@ -7,12 +7,11 @@ -CONFIG_ENV_SIZE=0x1000 +CONFIG_ENV_SIZE=0x10000 CONFIG_ENV_OFFSET=0x100000 --CONFIG_DEFAULT_DEVICE_TREE="mt7623n-bananapi-bpi-r2" - CONFIG_TARGET_MT7623=y -+CONFIG_DEFAULT_DEVICE_TREE="mt7623n-bananapi-bpi-r2" + CONFIG_DEFAULT_DEVICE_TREE="mt7623n-bananapi-bpi-r2" +CONFIG_USE_DEFAULT_ENV_FILE=y - CONFIG_DISTRO_DEFAULTS=y + CONFIG_TARGET_MT7623=y CONFIG_SYS_LOAD_ADDR=0x84000000 + CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT=y -CONFIG_FIT_VERBOSE=y +CONFIG_FIT_ENABLE_SHA256_SUPPORT=y diff --git a/package/boot/uboot-mediatek/patches/401-update-u7623-defconfig.patch b/package/boot/uboot-mediatek/patches/401-update-u7623-defconfig.patch index ac870b8614..f79c86714d 100644 --- a/package/boot/uboot-mediatek/patches/401-update-u7623-defconfig.patch +++ b/package/boot/uboot-mediatek/patches/401-update-u7623-defconfig.patch @@ -10,8 +10,8 @@ CONFIG_DEFAULT_DEVICE_TREE="mt7623a-unielec-u7623-02-emmc" +CONFIG_USE_DEFAULT_ENV_FILE=y CONFIG_TARGET_MT7623=y - CONFIG_DISTRO_DEFAULTS=y CONFIG_SYS_LOAD_ADDR=0x84000000 + CONFIG_DISTRO_DEFAULTS=y CONFIG_FIT=y -CONFIG_FIT_VERBOSE=y +CONFIG_FIT_ENABLE_SHA256_SUPPORT=y diff --git a/package/boot/uboot-mediatek/patches/410-add-linksys-e8450.patch b/package/boot/uboot-mediatek/patches/410-add-linksys-e8450.patch index fde679f386..c4a51aa442 100644 --- a/package/boot/uboot-mediatek/patches/410-add-linksys-e8450.patch +++ b/package/boot/uboot-mediatek/patches/410-add-linksys-e8450.patch @@ -337,7 +337,7 @@ +}; --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile -@@ -1133,6 +1133,7 @@ dtb-$(CONFIG_ARCH_MEDIATEK) += \ +@@ -1203,6 +1203,7 @@ dtb-$(CONFIG_ARCH_MEDIATEK) += \ mt7622-rfb.dtb \ mt7623a-unielec-u7623-02-emmc.dtb \ mt7622-bananapi-bpi-r64.dtb \ diff --git a/package/boot/uboot-mediatek/patches/412-add-ubnt-unifi-6-lr.patch b/package/boot/uboot-mediatek/patches/412-add-ubnt-unifi-6-lr.patch index 09a727422a..efe58f3042 100644 --- a/package/boot/uboot-mediatek/patches/412-add-ubnt-unifi-6-lr.patch +++ b/package/boot/uboot-mediatek/patches/412-add-ubnt-unifi-6-lr.patch @@ -349,7 +349,7 @@ +}; --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile -@@ -1134,6 +1134,7 @@ dtb-$(CONFIG_ARCH_MEDIATEK) += \ +@@ -1204,6 +1204,7 @@ dtb-$(CONFIG_ARCH_MEDIATEK) += \ mt7623a-unielec-u7623-02-emmc.dtb \ mt7622-bananapi-bpi-r64.dtb \ mt7622-linksys-e8450-ubi.dtb \ @@ -412,15 +412,15 @@ +_bootmenu_update_title=setenv _bootmenu_update_title ; setenv bootmenu_title "$bootmenu_title $ver" --- a/common/board_r.c +++ b/common/board_r.c -@@ -78,6 +78,7 @@ - #ifdef CONFIG_EFI_SETUP_EARLY +@@ -62,6 +62,7 @@ + #include #include - #endif + #include +#include DECLARE_GLOBAL_DATA_PTR; -@@ -417,6 +418,21 @@ static int initr_onenand(void) +@@ -392,6 +393,20 @@ static int initr_onenand(void) } #endif @@ -430,11 +430,10 @@ +{ + struct udevice *new; + -+ spi_flash_probe_bus_cs(CONFIG_SF_DEFAULT_BUS, -+ CONFIG_SF_DEFAULT_CS, -+ CONFIG_SF_DEFAULT_SPEED, -+ CONFIG_SF_DEFAULT_MODE, -+ &new); ++spi_flash_probe_bus_cs(CONFIG_SF_DEFAULT_BUS, ++ CONFIG_SF_DEFAULT_CS, ++ &new); ++ + return 0; +} +#endif @@ -442,7 +441,7 @@ #ifdef CONFIG_MMC static int initr_mmc(void) { -@@ -705,6 +721,9 @@ static init_fnc_t init_sequence_r[] = { +@@ -703,6 +718,9 @@ static init_fnc_t init_sequence_r[] = { #ifdef CONFIG_CMD_ONENAND initr_onenand, #endif diff --git a/package/boot/uboot-ramips/patches/0001-add-support-for-RAVPower-RP-WD009.patch b/package/boot/uboot-mediatek/patches/420-add-support-for-RAVPower-RP-WD009.patch similarity index 73% rename from package/boot/uboot-ramips/patches/0001-add-support-for-RAVPower-RP-WD009.patch rename to package/boot/uboot-mediatek/patches/420-add-support-for-RAVPower-RP-WD009.patch index 1833a627dc..80af85a959 100644 --- a/package/boot/uboot-ramips/patches/0001-add-support-for-RAVPower-RP-WD009.patch +++ b/package/boot/uboot-mediatek/patches/420-add-support-for-RAVPower-RP-WD009.patch @@ -20,23 +20,16 @@ Subject: [PATCH] add support for RAVPower RP-WD009 create mode 100644 configs/ravpower-rp-wd009-ram_defconfig create mode 100644 include/configs/ravpower-rp-wd009.h -diff --git a/arch/mips/dts/Makefile b/arch/mips/dts/Makefile -index c9d75596f2..23868ae1d2 100644 --- a/arch/mips/dts/Makefile +++ b/arch/mips/dts/Makefile -@@ -2,7 +2,8 @@ - - dtb-$(CONFIG_ARCH_MTMIPS) += \ - gardena-smart-gateway-mt7688.dtb \ -- linkit-smart-7688.dtb -+ linkit-smart-7688.dtb \ -+ ravpower-rp-wd009.dtb - dtb-$(CONFIG_TARGET_AP121) += ap121.dtb - dtb-$(CONFIG_TARGET_AP143) += ap143.dtb - dtb-$(CONFIG_TARGET_AP152) += ap152.dtb -diff --git a/arch/mips/dts/ravpower-rp-wd009.dts b/arch/mips/dts/ravpower-rp-wd009.dts -new file mode 100644 -index 0000000000..b271d5bfbc +@@ -25,6 +25,7 @@ dtb-$(CONFIG_TARGET_OCTEON_EBB7304) += m + dtb-$(CONFIG_TARGET_OCTEON_NIC23) += mrvl,octeon-nic23.dtb + dtb-$(CONFIG_BOARD_NETGEAR_CG3100D) += netgear,cg3100d.dtb + dtb-$(CONFIG_BOARD_NETGEAR_DGND3700V2) += netgear,dgnd3700v2.dtb ++dtb-$(CONFIG_BOARD_RAVPOWER_RP_WD009) += ravpower-rp-wd009.dtb + dtb-$(CONFIG_BOARD_SAGEM_FAST1704) += sagem,f@st1704.dtb + dtb-$(CONFIG_BOARD_SFR_NB4_SER) += sfr,nb4-ser.dtb + dtb-$(CONFIG_BOARD_TPLINK_WDR4300) += tplink_wdr4300.dtb --- /dev/null +++ b/arch/mips/dts/ravpower-rp-wd009.dts @@ -0,0 +1,50 @@ @@ -90,36 +83,6 @@ index 0000000000..b271d5bfbc + pinctrl-names = "default"; + pinctrl-0 = <&ephy_router_mode>; +}; -diff --git a/arch/mips/mach-mtmips/Kconfig b/arch/mips/mach-mtmips/Kconfig -index c8dcf19c0d..85ac8878ab 100644 ---- a/arch/mips/mach-mtmips/Kconfig -+++ b/arch/mips/mach-mtmips/Kconfig -@@ -32,6 +32,14 @@ config BOARD_GARDENA_SMART_GATEWAY_MT7688 - GARDENA smart Gateway boards have a MT7688 SoC with 128 MiB of RAM - and 8 MiB of flash (SPI NOR) and additional SPI NAND storage. - -+config BOARD_RAVPOWER_RP_WD009 -+ bool "RAVPower RP-WD009" -+ depends on SOC_MT7628 -+ select BOARD_LATE_INIT -+ select SUPPORTS_BOOT_RAM -+ help -+ RAVPower RP-WD009 -+ - config BOARD_LINKIT_SMART_7688 - bool "LinkIt Smart 7688" - depends on SOC_MT7628 -@@ -133,6 +141,7 @@ config SUPPORTS_BOOT_RAM - bool - - source "board/gardena/smart-gateway-mt7688/Kconfig" -+source "board/ravpower/rp-wd009/Kconfig" - source "board/seeed/linkit-smart-7688/Kconfig" - - endmenu -diff --git a/board/ravpower/rp-wd009/Kconfig b/board/ravpower/rp-wd009/Kconfig -new file mode 100644 -index 0000000000..111f8e4478 --- /dev/null +++ b/board/ravpower/rp-wd009/Kconfig @@ -0,0 +1,12 @@ @@ -135,18 +98,12 @@ index 0000000000..111f8e4478 + default "ravpower-rp-wd009" + +endif -diff --git a/board/ravpower/rp-wd009/Makefile b/board/ravpower/rp-wd009/Makefile -new file mode 100644 -index 0000000000..70cd7a8e56 --- /dev/null +++ b/board/ravpower/rp-wd009/Makefile @@ -0,0 +1,3 @@ +# SPDX-License-Identifier: GPL-2.0+ + +obj-y += board.o -diff --git a/board/ravpower/rp-wd009/board.c b/board/ravpower/rp-wd009/board.c -new file mode 100644 -index 0000000000..eabcf85735 --- /dev/null +++ b/board/ravpower/rp-wd009/board.c @@ -0,0 +1,16 @@ @@ -166,16 +123,14 @@ index 0000000000..eabcf85735 +{ + return 0; +} -diff --git a/configs/ravpower-rp-wd009-ram_defconfig b/configs/ravpower-rp-wd009-ram_defconfig -new file mode 100644 -index 0000000000..08cbf40638 --- /dev/null +++ b/configs/ravpower-rp-wd009-ram_defconfig -@@ -0,0 +1,59 @@ +@@ -0,0 +1,61 @@ +CONFIG_MIPS=y -+CONFIG_SYS_TEXT_BASE=0x80010000 ++CONFIG_SYS_LOAD_ADDR=0x80010000 +CONFIG_NR_DRAM_BANKS=1 +CONFIG_ARCH_MTMIPS=y ++CONFIG_SOC_MT7628=y +CONFIG_MIPS_BOOT_FDT=y +CONFIG_LEGACY_IMAGE_FORMAT=y +CONFIG_OF_STDOUT_VIA_ALIAS=y @@ -185,7 +140,6 @@ index 0000000000..08cbf40638 +CONFIG_SYS_CONSOLE_INFO_QUIET=y +CONFIG_VERSION_VARIABLE=y +CONFIG_BOARD_RAVPOWER_RP_WD009=y -+CONFIG_BOARD_EARLY_INIT_F=y +CONFIG_HUSH_PARSER=y +CONFIG_CMD_LICENSE=y +# CONFIG_CMD_ELF is not set @@ -203,6 +157,8 @@ index 0000000000..08cbf40638 +CONFIG_CMD_TIME=y +CONFIG_CMD_UUID=y +CONFIG_CMD_MTDPARTS=y ++CONFIG_FIT=y ++CONFIG_FIT_ENABLE_SHA256_SUPPORT=y +CONFIG_MTDIDS_DEFAULT="nor0=spi0.0" +CONFIG_MTDPARTS_DEFAULT="spi0.0:192k(factory-uboot),64k(config),64k(factory),1536k(loader),64k(params),64k(user_backup),64k(user),14272k(firmware),64k(mode)" +CONFIG_DEFAULT_DEVICE_TREE="ravpower-rp-wd009" @@ -231,12 +187,9 @@ index 0000000000..08cbf40638 +CONFIG_WDT_MT7621=y +CONFIG_LZMA=y +CONFIG_BAUDRATE=57600 -diff --git a/include/configs/ravpower-rp-wd009.h b/include/configs/ravpower-rp-wd009.h -new file mode 100644 -index 0000000000..bb4145197c --- /dev/null +++ b/include/configs/ravpower-rp-wd009.h -@@ -0,0 +1,48 @@ +@@ -0,0 +1,42 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright (C) 2018 Stefan Roese @@ -251,8 +204,6 @@ index 0000000000..bb4145197c +/* RAM */ +#define CONFIG_SYS_SDRAM_BASE 0x80000000 + -+#define CONFIG_SYS_LOAD_ADDR CONFIG_SYS_SDRAM_BASE + 0x100000 -+ +#define CONFIG_SYS_INIT_SP_OFFSET 0x400000 + +#ifdef CONFIG_BOOT_RAM @@ -269,13 +220,9 @@ index 0000000000..bb4145197c + +/* Memory usage */ +#define CONFIG_SYS_MAXARGS 64 -+#define CONFIG_SYS_MALLOC_LEN (16 * 1024 * 1024) +#define CONFIG_SYS_BOOTPARAMS_LEN (128 * 1024) +#define CONFIG_SYS_CBSIZE 512 + -+/* U-Boot */ -+#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE -+ +/* Environment settings */ + +/* @@ -285,6 +232,28 @@ index 0000000000..bb4145197c +#define CONFIG_BOARD_SIZE_LIMIT CONFIG_ENV_OFFSET + +#endif /* __CONFIG_RAVPOWER_RP_WD009_H */ --- -2.27.0 - +--- a/arch/mips/mach-mtmips/mt7628/Kconfig ++++ b/arch/mips/mach-mtmips/mt7628/Kconfig +@@ -27,6 +27,14 @@ config BOARD_MT7628_RFB + SPI-NOR flash, 1 built-in switch with 5 ports, 1 UART, 1 USB host, + 1 SDXC, 1 PCIe socket and JTAG pins. + ++config BOARD_RAVPOWER_RP_WD009 ++ bool "RAVPower RP-WD009" ++ depends on SOC_MT7628 ++ select BOARD_LATE_INIT ++ select SUPPORTS_BOOT_RAM ++ help ++ RAVPower RP-WD009 ++ + config BOARD_VOCORE2 + bool "VoCore2" + select SPL_SERIAL +@@ -53,6 +61,7 @@ config SYS_CONFIG_NAME + default "mt7628" if BOARD_MT7628_RFB + + source "board/gardena/smart-gateway-mt7688/Kconfig" ++source "board/ravpower/rp-wd009/Kconfig" + source "board/seeed/linkit-smart-7688/Kconfig" + source "board/vocore/vocore2/Kconfig" + diff --git a/package/boot/uboot-mediatek/patches/600-ubi-detect-eof-marker.patch b/package/boot/uboot-mediatek/patches/600-ubi-detect-eof-marker.patch new file mode 100644 index 0000000000..5d312eca8f --- /dev/null +++ b/package/boot/uboot-mediatek/patches/600-ubi-detect-eof-marker.patch @@ -0,0 +1,51 @@ +--- a/drivers/mtd/ubi/attach.c ++++ b/drivers/mtd/ubi/attach.c +@@ -802,6 +802,13 @@ out_unlock: + return err; + } + ++static bool ec_hdr_has_eof(struct ubi_ec_hdr *ech) ++{ ++ return ech->padding1[0] == 'E' && ++ ech->padding1[1] == 'O' && ++ ech->padding1[2] == 'F'; ++} ++ + /** + * scan_peb - scan and process UBI headers of a PEB. + * @ubi: UBI device description object +@@ -832,9 +839,21 @@ static int scan_peb(struct ubi_device *u + return 0; + } + +- err = ubi_io_read_ec_hdr(ubi, pnum, ech, 0); +- if (err < 0) +- return err; ++ if (!ai->eof_found) { ++ err = ubi_io_read_ec_hdr(ubi, pnum, ech, 0); ++ if (err < 0) ++ return err; ++ ++ if (ec_hdr_has_eof(ech)) { ++ pr_notice("UBI: EOF marker found, PEBs from %d will be erased\n", ++ pnum); ++ ai->eof_found = true; ++ } ++ } ++ ++ if (ai->eof_found) ++ err = UBI_IO_FF_BITFLIPS; ++ + switch (err) { + case 0: + break; +--- a/drivers/mtd/ubi/ubi.h ++++ b/drivers/mtd/ubi/ubi.h +@@ -745,6 +745,7 @@ struct ubi_attach_info { + int mean_ec; + uint64_t ec_sum; + int ec_count; ++ bool eof_found; + struct kmem_cache *aeb_slab_cache; + }; + diff --git a/package/boot/uboot-ramips/Makefile b/package/boot/uboot-ramips/Makefile deleted file mode 100644 index 337ea00479..0000000000 --- a/package/boot/uboot-ramips/Makefile +++ /dev/null @@ -1,34 +0,0 @@ -# SPDX-License-Identifier: GPL-2.0-only - -include $(TOPDIR)/rules.mk -include $(INCLUDE_DIR)/kernel.mk - -PKG_VERSION:=2020.04 -PKG_RELEASE:=$(AUTORELEASE) - -PKG_HASH:=fe732aaf037d9cc3c0909bad8362af366ae964bbdac6913a34081ff4ad565372 - -include $(INCLUDE_DIR)/u-boot.mk -include $(INCLUDE_DIR)/package.mk - -define U-Boot/Default - BUILD_TARGET:=ramips - UBOOT_IMAGE:=u-boot.bin -endef - -define U-Boot/ravpower_rp-wd009 - BUILD_DEVICES:=ravpower_rp-wd009 - BUILD_SUBTARGET:=mt76x8 - NAME:=RAVPower RP-WD009 - UBOOT_CONFIG:=ravpower-rp-wd009-ram -endef - -UBOOT_TARGETS := \ - ravpower_rp-wd009 - -define Build/InstallDev - $(INSTALL_DIR) $(STAGING_DIR_IMAGE) - $(INSTALL_BIN) $(PKG_BUILD_DIR)/$(UBOOT_IMAGE) $(STAGING_DIR_IMAGE)/$(VARIANT)-$(UBOOT_IMAGE) -endef - -$(eval $(call BuildPackage/U-Boot)) diff --git a/package/devel/strace/Makefile b/package/devel/strace/Makefile index d95fd41c33..bfa79490f8 100644 --- a/package/devel/strace/Makefile +++ b/package/devel/strace/Makefile @@ -10,7 +10,7 @@ include $(INCLUDE_DIR)/kernel.mk PKG_NAME:=strace PKG_VERSION:=5.18 -PKG_RELEASE:=1 +PKG_RELEASE:=2 PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.xz PKG_SOURCE_URL:=https://strace.io/files/$(PKG_VERSION) @@ -29,6 +29,7 @@ PKG_CONFIG_DEPENDS := \ CONFIG_STRACE_LIBUNWIND include $(INCLUDE_DIR)/package.mk +include $(INCLUDE_DIR)/nls.mk HOST_CFLAGS += -I$(LINUX_DIR)/user_headers/include diff --git a/package/firmware/intel-microcode/Makefile b/package/firmware/intel-microcode/Makefile index e6f730fcb2..0d51730173 100644 --- a/package/firmware/intel-microcode/Makefile +++ b/package/firmware/intel-microcode/Makefile @@ -8,12 +8,12 @@ include $(TOPDIR)/rules.mk PKG_NAME:=intel-microcode -PKG_VERSION:=20220207 +PKG_VERSION:=20220510 PKG_RELEASE:=1 PKG_SOURCE:=intel-microcode_3.$(PKG_VERSION).1.tar.xz PKG_SOURCE_URL:=@DEBIAN/pool/non-free/i/intel-microcode/ -PKG_HASH:=42f2ab3c14bda745ec64008cde5c0f416f32f40e838a9df04cf5ddf5fc87498b +PKG_HASH:=49752447c1b905dd130699cdef09fb2bba47b6f413d27787c98a5569273e283e PKG_BUILD_DIR:=$(BUILD_DIR)/intel-microcode-3.$(PKG_VERSION).1 PKG_BUILD_DEPENDS:=iucode-tool/host diff --git a/package/firmware/ipq-wifi/Makefile b/package/firmware/ipq-wifi/Makefile index f8445f0e33..ebd10cd2ec 100644 --- a/package/firmware/ipq-wifi/Makefile +++ b/package/firmware/ipq-wifi/Makefile @@ -30,7 +30,6 @@ ALLWIFIBOARDS:= \ edgecore_ecw5410 \ edgecore_oap100 \ glinet_gl-ap1300 \ - glinet_gl-b2200 \ glinet_gl-s1300 \ linksys_ea8300 \ p2w_r619ac \ @@ -102,7 +101,6 @@ $(eval $(call generate-ipq-wifi-package,devolo_magic-2-wifi-next,devolo Magic 2 $(eval $(call generate-ipq-wifi-package,edgecore_ecw5410,Edgecore ECW5410)) $(eval $(call generate-ipq-wifi-package,edgecore_oap100,Edgecore OAP100)) $(eval $(call generate-ipq-wifi-package,glinet_gl-ap1300,GL.iNet GL-AP1300)) -$(eval $(call generate-ipq-wifi-package,glinet_gl-b2200,GL.iNet GL-B2200)) $(eval $(call generate-ipq-wifi-package,glinet_gl-s1300,GL.iNet GL-S1300)) $(eval $(call generate-ipq-wifi-package,linksys_ea8300,Linksys EA8300)) $(eval $(call generate-ipq-wifi-package,p2w_r619ac,P&W R619AC)) diff --git a/package/firmware/ipq-wifi/board-p2w_r619ac.qca4019 b/package/firmware/ipq-wifi/board-p2w_r619ac.qca4019 index 0ebe28575f..00ea1d92e9 100644 Binary files a/package/firmware/ipq-wifi/board-p2w_r619ac.qca4019 and b/package/firmware/ipq-wifi/board-p2w_r619ac.qca4019 differ diff --git a/package/firmware/linux-firmware/Makefile b/package/firmware/linux-firmware/Makefile index 7b3b8ee721..c64dec83f0 100644 --- a/package/firmware/linux-firmware/Makefile +++ b/package/firmware/linux-firmware/Makefile @@ -8,12 +8,12 @@ include $(TOPDIR)/rules.mk PKG_NAME:=linux-firmware -PKG_VERSION:=20220509 +PKG_VERSION:=20220708 PKG_RELEASE:=1 PKG_SOURCE_URL:=@KERNEL/linux/kernel/firmware PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.xz -PKG_HASH:=376e0b3d7b4f8aaa2abf7f5ab74803dcf14b06b94e3d841b1467cd9a2848255e +PKG_HASH:=0abec827a035c82bdcabdf82aa37ded247bc682ef05861bd409ea6f477bab81d PKG_MAINTAINER:=Felix Fietkau diff --git a/package/firmware/prism54-firmware/Makefile b/package/firmware/prism54-firmware/Makefile index 2752ac7580..b74cb682fc 100644 --- a/package/firmware/prism54-firmware/Makefile +++ b/package/firmware/prism54-firmware/Makefile @@ -8,25 +8,17 @@ include $(TOPDIR)/rules.mk PKG_NAME:=prism54-firmware PKG_RELEASE:=1 -# Prism54 FullMAC firmware (jbnore.free.fr seems to be rather slow, so we use daemonizer.de) +# P54 SoftMAC firmware (jbnore.free.fr seems to be rather slow, so we use daemonizer.de) PRG_URL:=https://daemonizer.de/prism54/prism54-fw/ include $(INCLUDE_DIR)/package.mk -# PRISM54/P54 firmwares -PRISM54FW:=1.0.4.3.arm +# P54 firmwares P54USBFW:=2.13.24.0.lm87.arm P54PCIFW:=2.13.12.0.arm P54SPIFW:=2.13.0.0.a.13.14.arm -define Download/prism54-firmware - FILE:=$(PRISM54FW) - URL:=$(PRG_URL)/fw-fullmac - HASH:=dce24156c57234dba131429fbe8cd1de8ba818c9481ddc33cf7e5af9d57a737c -endef -$(eval $(call Download,prism54-firmware)) - define Download/p54-usb-firmware FILE:=$(P54USBFW) URL:=$(PRG_URL)/fw-usb @@ -55,11 +47,6 @@ define Package/prism54-firmware-default URL:=https://daemonizer.de/prism54/prism54-fw endef -define Package/prism54-firmware -$(Package/prism54-firmware-default) - TITLE:=prism54 firmware -endef - define Package/p54-usb-firmware $(Package/prism54-firmware-default) TITLE:=p54-usb firmware @@ -84,11 +71,6 @@ define Build/Compile endef -define Package/prism54-firmware/install - $(INSTALL_DIR) $(1)/lib/firmware - $(INSTALL_DATA) $(DL_DIR)/$(PRISM54FW) $(1)/lib/firmware/isl3890 -endef - define Package/p54-usb-firmware/install $(INSTALL_DIR) $(1)/lib/firmware $(INSTALL_DATA) $(DL_DIR)/$(P54USBFW) $(1)/lib/firmware/isl3887usb @@ -105,7 +87,6 @@ define Package/p54-spi-firmware/install endef -$(eval $(call BuildPackage,prism54-firmware)) $(eval $(call BuildPackage,p54-usb-firmware)) $(eval $(call BuildPackage,p54-pci-firmware)) $(eval $(call BuildPackage,p54-spi-firmware)) diff --git a/package/kernel/linux/modules/wireless.mk b/package/kernel/linux/modules/wireless.mk index f7a40ba10a..1e9e68a0f6 100644 --- a/package/kernel/linux/modules/wireless.mk +++ b/package/kernel/linux/modules/wireless.mk @@ -7,23 +7,6 @@ WIRELESS_MENU:=Wireless Drivers -define KernelPackage/net-prism54 - SUBMENU:=$(WIRELESS_MENU) - TITLE:=Intersil Prism54 support - DEPENDS:=@PCI_SUPPORT +@DRIVER_WEXT_SUPPORT +prism54-firmware - KCONFIG:=CONFIG_PRISM54 - FILES:= \ - $(LINUX_DIR)/drivers/net/wireless/intersil/prism54/prism54.ko - AUTOLOAD:=$(call AutoProbe,prism54) -endef - -define KernelPackage/net-prism54/description - Kernel modules for Intersil Prism54 support -endef - -$(eval $(call KernelPackage,net-prism54)) - - define KernelPackage/net-rtl8192su SUBMENU:=$(WIRELESS_MENU) TITLE:=RTL8192SU support (staging) diff --git a/package/kernel/mac80211/patches/subsys/339-mac80211-exclude-multicast-packets-from-AQL-pending-.patch b/package/kernel/mac80211/patches/subsys/339-mac80211-exclude-multicast-packets-from-AQL-pending-.patch new file mode 100644 index 0000000000..43c3e75d65 --- /dev/null +++ b/package/kernel/mac80211/patches/subsys/339-mac80211-exclude-multicast-packets-from-AQL-pending-.patch @@ -0,0 +1,30 @@ +From: Felix Fietkau +Date: Wed, 13 Jul 2022 07:32:26 +0200 +Subject: [PATCH] mac80211: exclude multicast packets from AQL pending airtime + +In AP mode, multicast traffic is handled very differently from normal traffic, +especially if at least one client is in powersave mode. +This means that multicast packets can be buffered a lot longer than normal +unicast packets, and can eat up the AQL budget very quickly because of the low +data rate. +Along with the recent change to maintain a global PHY AQL limit, this can lead +to significant latency spikes for unicast traffic. + +Since queueing multicast to hardware is currently not constrained by AQL limits +anyway, let's just exclude it from the AQL pending airtime calculation entirely. + +Fixes: 8e4bac067105 ("wifi: mac80211: add a per-PHY AQL limit to improve fairness") +Signed-off-by: Felix Fietkau +--- + +--- a/net/mac80211/tx.c ++++ b/net/mac80211/tx.c +@@ -3792,7 +3792,7 @@ begin: + encap_out: + IEEE80211_SKB_CB(skb)->control.vif = vif; + +- if (vif && ++ if (tx.sta && + wiphy_ext_feature_isset(local->hw.wiphy, NL80211_EXT_FEATURE_AQL)) { + bool ampdu = txq->ac != IEEE80211_AC_VO; + u32 airtime; diff --git a/package/libs/libiconv/COPYING b/package/libs/libiconv/COPYING deleted file mode 100644 index 223ede7de3..0000000000 --- a/package/libs/libiconv/COPYING +++ /dev/null @@ -1,504 +0,0 @@ - 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If you believe that a file -is so trivial that it should be in the Public Domain, please contact -me and, if I agree, I will explicitly release it from copyright. - -Some code has been modified by the OpenWrt project, this includes -the conversion from char map files to C arrays and the iconv.h header -file in particular. - -The library as a whole is licensed under the GNU LGPL version 2.1. -See the file COPYING for the text of this license. - -The original source can be accessed at svn://svn.mplayerhq.hu/libc/trunk diff --git a/package/libs/libiconv/Makefile b/package/libs/libiconv/Makefile deleted file mode 100644 index 4d7dcd3498..0000000000 --- a/package/libs/libiconv/Makefile +++ /dev/null @@ -1,79 +0,0 @@ -# -# Copyright (C) 2010-2012 OpenWrt.org -# -# This Makefile and the code shipped in src/ is free software, licensed -# under the GNU Lesser General Public License, version 2.1 and later. -# See src/COPYING for more information. -# -# Refer to src/COPYRIGHT for copyright statements on the source files. -# - -include $(TOPDIR)/rules.mk - -PKG_NAME:=libiconv -PKG_RELEASE:=8 - -PKG_LICENSE:=LGPL-2.1 -PKG_LICENSE_FILES:=LICENSE - -PKG_MAINTAINER:=Jo-Philipp Wich - -include $(INCLUDE_DIR)/package.mk -include $(INCLUDE_DIR)/host-build.mk - -define Package/libiconv - SECTION:=libs - CATEGORY:=Libraries - TITLE:=Tiny drop-in replacement for the GNU Character set conversion library -endef - -define Build/Configure -endef - -define Build/Compile - $(TARGET_CC) $(TARGET_CFLAGS) -c $(PKG_BUILD_DIR)/iconv.c -o $(PKG_BUILD_DIR)/iconv.o -I$(PKG_BUILD_DIR)/include $(FPIC) - $(TARGET_CROSS)ar rcs $(PKG_BUILD_DIR)/libiconv.a $(PKG_BUILD_DIR)/iconv.o -endef - -define Build/InstallDev - $(INSTALL_DIR) $(1)/usr/lib/libiconv-stub/lib - $(INSTALL_DATA) $(PKG_BUILD_DIR)/libiconv.a $(1)/usr/lib/libiconv-stub/lib/ - - $(INSTALL_DIR) $(1)/usr/lib/libiconv-stub/include - $(INSTALL_DATA) $(PKG_BUILD_DIR)/include/iconv.h $(1)/usr/lib/libiconv-stub/include/ - - $(INSTALL_DIR) $(1)/usr/share/aclocal - $(INSTALL_DATA) $(PKG_BUILD_DIR)/m4/* $(1)/usr/share/aclocal/ -endef - -define Package/libiconv/install - $(INSTALL_DIR) $(1)/tmp - touch $(1)/tmp/.libiconv-placeholder -endef - -define Host/Prepare - mkdir -p $(HOST_BUILD_DIR) -endef - -define Host/Configure - -endef - -define Host/Compile - $(HOSTCC) -c src/iconv.c -o $(HOST_BUILD_DIR)/iconv.o -Isrc/include -fPIC - ar rcs $(HOST_BUILD_DIR)/libiconv.a $(HOST_BUILD_DIR)/iconv.o -endef - -define Host/Install - $(INSTALL_DIR) $(STAGING_DIR_HOSTPKG)/lib - $(INSTALL_DATA) $(HOST_BUILD_DIR)/libiconv.a $(STAGING_DIR_HOSTPKG)/lib/ - - $(INSTALL_DIR) $(STAGING_DIR_HOSTPKG)/include - $(INSTALL_DATA) ./src/include/iconv.h $(STAGING_DIR_HOSTPKG)/include/ - - $(INSTALL_DIR) $(STAGING_DIR_HOSTPKG)/share/aclocal - $(INSTALL_DATA) ./src/m4/* $(STAGING_DIR_HOSTPKG)/share/aclocal/ -endef - -$(eval $(call HostBuild)) -$(eval $(call BuildPackage,libiconv)) diff --git a/package/libs/libiconv/src/LICENSE b/package/libs/libiconv/src/LICENSE deleted file mode 100644 index b59e7be47c..0000000000 --- a/package/libs/libiconv/src/LICENSE +++ /dev/null @@ -1,6 +0,0 @@ -The source file iconv.m4 contains the following message - -Copyright (C) 2000-2002, 2007-2010 Free Software Foundation, Inc. -This file is free software; the Free Software Foundation -gives unlimited permission to copy and/or distribute it, -with or without modifications, as long as this notice is preserved. diff --git a/package/libs/libiconv/src/iconv.c b/package/libs/libiconv/src/iconv.c deleted file mode 100644 index c3cfefa3cc..0000000000 --- a/package/libs/libiconv/src/iconv.c +++ /dev/null @@ -1,449 +0,0 @@ -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include -#include -#include - -/* builtin charmaps */ -#include "charmaps.h" - -/* only 0-7 are valid as dest charset */ -#define UTF_16BE 000 -#define UTF_16LE 001 -#define UTF_32BE 002 -#define UTF_32LE 003 -#define WCHAR_T 004 -#define UTF_8 005 -#define US_ASCII 006 -#define LATIN_1 007 - -/* additional charsets with algorithmic conversion */ -#define LATIN_9 010 -#define TIS_620 011 -#define JIS_0201 012 - -/* some programs like php need this */ -int _libiconv_version = _LIBICONV_VERSION; - -/* these must match the constants above */ -static const unsigned char charsets[] = - "\005" "UTF-8" "\0" - "\004" "WCHAR_T" "\0" - "\000" "UTF-16BE" "\0" - "\001" "UTF-16LE" "\0" - "\002" "UTF-32BE" "\0" - "\003" "UTF-32LE" "\0" - "\006" "ASCII" "\0" - "\006" "US-ASCII" "\0" - "\006" "ISO646-US" "\0" - "\006" "ISO_646.IRV:1991" "\0" - "\006" "ISO-IR-6" "\0" - "\006" "ANSI_X3.4-1968" "\0" - "\006" "ANSI_X3.4-1986" "\0" - "\006" "CP367" "\0" - "\006" "IBM367" "\0" - "\006" "US" "\0" - "\006" "CSASCII" "\0" - "\007" "ISO-8859-1" "\0" - "\007" "LATIN1" "\0" - "\010" "ISO-8859-15""\0" - "\010" "LATIN9" "\0" - "\011" "ISO-8859-11""\0" - "\011" "TIS-620" "\0" - "\012" "JIS-0201" "\0" - "\377"; - -/* separate identifiers for sbcs/dbcs/etc map type */ -#define UCS2_8BIT 000 -#define UCS3_8BIT 001 -#define EUC 002 -#define EUC_TW 003 -#define SHIFT_JIS 004 -#define BIG5 005 -#define GBK 006 - -/* FIXME: these are not implemented yet -// EUC: A1-FE A1-FE -// GBK: 81-FE 40-7E,80-FE -// Big5: A1-FE 40-7E,A1-FE -*/ - -static const unsigned short maplen[] = { - [UCS2_8BIT] = 4+ 2* 128, - [UCS3_8BIT] = 4+ 3* 128, - [EUC] = 4+ 2* 94*94, - [SHIFT_JIS] = 4+ 2* 94*94, - [BIG5] = 4+ 2* 94*157, - [GBK] = 4+ 2* 126*190, - [EUC_TW] = 4+ 2* 2*94*94, -}; - -static int find_charmap(const char *name) -{ - int i; - for (i = 0; i < (sizeof(charmaps) / sizeof(charmaps[0])); i++) - if (!strcasecmp(charmaps[i].name, name)) - return i; - return -1; -} - -static int find_charset(const char *name) -{ - const unsigned char *s; - for (s=charsets; *s<0xff && strcasecmp(s+1, name); s+=strlen(s)+1); - return *s; -} - -iconv_t iconv_open(const char *to, const char *from) -{ - unsigned f, t; - int m; - - if ((t = find_charset(to)) > 8) - return -1; - - if ((f = find_charset(from)) < 255) - return 0 | (t<<1) | (f<<8); - - if ((m = find_charmap(from)) > -1) - return 1 | (t<<1) | (m<<8); - - return -1; -} - -int iconv_close(iconv_t cd) -{ - return 0; -} - -static inline wchar_t get_16(const unsigned char *s, int endian) -{ - endian &= 1; - return s[endian]<<8 | s[endian^1]; -} - -static inline void put_16(unsigned char *s, wchar_t c, int endian) -{ - endian &= 1; - s[endian] = c>>8; - s[endian^1] = c; -} - -static inline int utf8enc_wchar(char *outb, wchar_t c) -{ - if (c <= 0x7F) { - *outb = c; - return 1; - } - else if (c <= 0x7FF) { - *outb++ = ((c >> 6) & 0x1F) | 0xC0; - *outb++ = ( c & 0x3F) | 0x80; - return 2; - } - else if (c <= 0xFFFF) { - *outb++ = ((c >> 12) & 0x0F) | 0xE0; - *outb++ = ((c >> 6) & 0x3F) | 0x80; - *outb++ = ( c & 0x3F) | 0x80; - return 3; - } - else if (c <= 0x10FFFF) { - *outb++ = ((c >> 18) & 0x07) | 0xF0; - *outb++ = ((c >> 12) & 0x3F) | 0x80; - *outb++ = ((c >> 6) & 0x3F) | 0x80; - *outb++ = ( c & 0x3F) | 0x80; - return 4; - } - else { - *outb++ = '?'; - return 1; - } -} - -static inline int utf8seq_is_overlong(char *s, int n) -{ - switch (n) - { - case 2: - /* 1100000x (10xxxxxx) */ - return (((*s >> 1) == 0x60) && - ((*(s+1) >> 6) == 0x02)); - - case 3: - /* 11100000 100xxxxx (10xxxxxx) */ - return ((*s == 0xE0) && - ((*(s+1) >> 5) == 0x04) && - ((*(s+2) >> 6) == 0x02)); - - case 4: - /* 11110000 1000xxxx (10xxxxxx 10xxxxxx) */ - return ((*s == 0xF0) && - ((*(s+1) >> 4) == 0x08) && - ((*(s+2) >> 6) == 0x02) && - ((*(s+3) >> 6) == 0x02)); - } - - return 0; -} - -static inline int utf8seq_is_surrogate(char *s, int n) -{ - return ((n == 3) && (*s == 0xED) && (*(s+1) >= 0xA0) && (*(s+1) <= 0xBF)); -} - -static inline int utf8seq_is_illegal(char *s, int n) -{ - return ((n == 3) && (*s == 0xEF) && (*(s+1) == 0xBF) && - (*(s+2) >= 0xBE) && (*(s+2) <= 0xBF)); -} - -static inline int utf8dec_wchar(wchar_t *c, unsigned char *in, size_t inb) -{ - int i; - int n = -1; - - /* trivial char */ - if (*in <= 0x7F) { - *c = *in; - return 1; - } - - /* find utf8 sequence length */ - if ((*in & 0xE0) == 0xC0) n = 2; - else if ((*in & 0xF0) == 0xE0) n = 3; - else if ((*in & 0xF8) == 0xF0) n = 4; - else if ((*in & 0xFC) == 0xF8) n = 5; - else if ((*in & 0xFE) == 0xFC) n = 6; - - /* starved? */ - if (n > inb) - return -2; - - /* decode ... */ - if (n > 1 && n < 5) { - /* reject invalid sequences */ - if (utf8seq_is_overlong(in, n) || - utf8seq_is_surrogate(in, n) || - utf8seq_is_illegal(in, n)) - return -1; - - /* decode ... */ - *c = (char)(*in++ & (0x7F >> n)); - - for (i = 1; i < n; i++) { - /* illegal continuation byte */ - if (*in < 0x80 || *in > 0xBF) - return -1; - - *c = (*c << 6) | (*in++ & 0x3F); - } - - return n; - } - - /* unmapped sequence (> 4) */ - return -1; -} - -static inline wchar_t latin9_translit(wchar_t c) -{ - /* a number of trivial iso-8859-15 <> utf-8 transliterations */ - switch (c) { - case 0x20AC: return 0xA4; /* Euro */ - case 0x0160: return 0xA6; /* S caron */ - case 0x0161: return 0xA8; /* s caron */ - case 0x017D: return 0xB4; /* Z caron */ - case 0x017E: return 0xB8; /* z caron */ - case 0x0152: return 0xBC; /* OE */ - case 0x0153: return 0xBD; /* oe */ - case 0x0178: return 0xBE; /* Y diaeresis */ - default: return 0xFFFD; /* cannot translate */ - } -} - -size_t iconv(iconv_t cd, char **in, size_t *inb, char **out, size_t *outb) -{ - size_t x=0; - unsigned char to = (cd>>1)&127; - unsigned char from = 255; - const unsigned char *map = 0; - char tmp[MB_LEN_MAX]; - wchar_t c, d; - size_t k, l; - int err; - - if (!in || !*in || !*inb) return 0; - - if (cd & 1) - map = charmaps[cd>>8].map; - else - from = cd>>8; - - for (; *inb; *in+=l, *inb-=l) { - c = *(unsigned char *)*in; - l = 1; - if (from >= UTF_8 && c < 0x80) goto charok; - switch (from) { - case WCHAR_T: - l = sizeof(wchar_t); - if (*inb < l) goto starved; - c = *(wchar_t *)*in; - break; - case UTF_8: - l = utf8dec_wchar(&c, *in, *inb); - if (!l) l++; - else if (l == (size_t)-1) goto ilseq; - else if (l == (size_t)-2) goto starved; - break; - case US_ASCII: - goto ilseq; - case LATIN_9: - if ((unsigned)c - 0xa4 <= 0xbe - 0xa4) { - static const unsigned char map[] = { - 0, 0x60, 0, 0x61, 0, 0, 0, 0, 0, 0, 0, - 0, 0, 0, 0, 0x7d, 0, 0, 0, 0x7e, 0, 0, 0, - 0x52, 0x53, 0x78 - }; - if (c == 0xa4) c = 0x20ac; - else if (map[c-0xa5]) c = 0x100 | map[c-0xa5]; - } - case LATIN_1: - goto charok; - case TIS_620: - if (c >= 0xa1) c += 0x0e01-0xa1; - goto charok; - case JIS_0201: - if (c >= 0xa1) { - if (c <= 0xdf) c += 0xff61-0xa1; - else goto ilseq; - } - goto charok; - case UTF_16BE: - case UTF_16LE: - l = 2; - if (*inb < 2) goto starved; - c = get_16(*in, from); - if ((unsigned)(c-0xdc00) < 0x400) goto ilseq; - if ((unsigned)(c-0xd800) < 0x400) { - l = 4; - if (*inb < 4) goto starved; - d = get_16(*in + 2, from); - if ((unsigned)(c-0xdc00) >= 0x400) goto ilseq; - c = ((c-0xd800)<<10) | (d-0xdc00); - } - break; - case UTF_32BE: - case UTF_32LE: - l = 4; - if (*inb < 4) goto starved; - // FIXME - // c = get_32(*in, from); - break; - default: - /* only support ascii supersets */ - if (c < 0x80) break; - switch (map[0]) { - case UCS2_8BIT: - c -= 0x80; - break; - case EUC: - if ((unsigned)c - 0xa1 >= 94) goto ilseq; - if ((unsigned)in[0][1] - 0xa1 >= 94) goto ilseq; - c = (c-0xa1)*94 + (in[0][1]-0xa1); - l = 2; - break; - case SHIFT_JIS: - if ((unsigned)c - 0xa1 <= 0xdf-0xa1) { - c += 0xff61-0xa1; - goto charok; - } - // FIXME... - l = 2; - break; - default: - goto badf; - } - c = get_16(map + 4 + 2*c, 0); - if (c == 0xffff) goto ilseq; - goto charok; - } - - if ((unsigned)c - 0xd800 < 0x800 || (unsigned)c >= 0x110000) - goto ilseq; -charok: - switch (to) { - case WCHAR_T: - if (*outb < sizeof(wchar_t)) goto toobig; - *(wchar_t *)*out = c; - *out += sizeof(wchar_t); - *outb -= sizeof(wchar_t); - break; - case UTF_8: - if (*outb < 4) { - k = utf8enc_wchar(tmp, c); - if (*outb < k) goto toobig; - memcpy(*out, tmp, k); - } else k = utf8enc_wchar(*out, c); - *out += k; - *outb -= k; - break; - case US_ASCII: - if (c > 0x7f) c = 0xfffd; - /* fall thru and count replacement in latin1 case */ - case LATIN_9: - if (c >= 0x100 && c != 0xfffd) - c = latin9_translit(c); - /* fall through */ - case LATIN_1: - if (c > 0xff) goto ilseq; - if (!*outb) goto toobig; - **out = c; - ++*out; - --*outb; - break; - case UTF_16BE: - case UTF_16LE: - if (c < 0x10000) { - if (*outb < 2) goto toobig; - put_16(*out, c, to); - *out += 2; - *outb -= 2; - break; - } - if (*outb < 4) goto toobig; - put_16(*out, (c>>10)|0xd800, to); - put_16(*out + 2, (c&0x3ff)|0xdc00, to); - *out += 4; - *outb -= 4; - break; - default: - goto badf; - } - } - return x; -ilseq: - err = EILSEQ; - x = -1; - goto end; -badf: - err = EBADF; - x = -1; - goto end; -toobig: - err = E2BIG; - x = -1; - goto end; -starved: - err = EINVAL; -end: - errno = err; - return x; -} diff --git a/package/libs/libiconv/src/include/charmaps.h b/package/libs/libiconv/src/include/charmaps.h deleted file mode 100644 index 083cd699f1..0000000000 --- a/package/libs/libiconv/src/include/charmaps.h +++ /dev/null @@ -1,80 +0,0 @@ -#include "charmaps/iso-8859-2.h" -#include "charmaps/iso-8859-10.h" -#include "charmaps/windows-874.h" -#include "charmaps/windows-1250.h" -#include "charmaps/koi8-r.h" - -#ifdef ALL_CHARSETS -#include "charmaps/iso-8859-3.h" -#include "charmaps/iso-8859-4.h" -#include "charmaps/iso-8859-5.h" -#include "charmaps/iso-8859-6.h" -#include "charmaps/iso-8859-7.h" -#include "charmaps/iso-8859-8.h" -#include "charmaps/iso-8859-9.h" -#include "charmaps/iso-8859-13.h" -#include "charmaps/iso-8859-14.h" -#include "charmaps/iso-8859-16.h" -#include "charmaps/windows-1251.h" -#include "charmaps/windows-1252.h" -#include "charmaps/windows-1253.h" -#include "charmaps/windows-1254.h" -#include "charmaps/windows-1255.h" -#include "charmaps/windows-1256.h" -#include "charmaps/windows-1257.h" -#include "charmaps/windows-1258.h" -#endif - - -struct charmap { - const char name[13]; - const unsigned char *map; -}; - -static struct charmap charmaps[] = { - { "ISO-8859-2", map_iso_8859_2 }, - { "ISO-8859-10", map_iso_8859_10 }, - -#ifdef ALL_CHARSETS - { "ISO-8859-3", map_iso_8859_3 }, - { "ISO-8859-4", map_iso_8859_4 }, - { "ISO-8859-5", map_iso_8859_5 }, - { "ISO-8859-6", map_iso_8859_6 }, - { "ISO-8859-7", map_iso_8859_7 }, - { "ISO-8859-8", map_iso_8859_8 }, - { "ISO-8859-9", map_iso_8859_9 }, - { "ISO-8859-13", map_iso_8859_13 }, - { "ISO-8859-14", map_iso_8859_14 }, - { "ISO-8859-16", map_iso_8859_16 }, -#endif - - { "WINDOWS-874", map_windows_874 }, - { "WINDOWS-1250", map_windows_1250 }, - -#ifdef ALL_CHARSETS - { "WINDOWS-1251", map_windows_1251 }, - { "WINDOWS-1252", map_windows_1252 }, - { "WINDOWS-1253", map_windows_1253 }, - { "WINDOWS-1254", map_windows_1254 }, - { "WINDOWS-1255", map_windows_1255 }, - { "WINDOWS-1256", map_windows_1256 }, - { "WINDOWS-1257", map_windows_1257 }, - { "WINDOWS-1258", map_windows_1258 }, -#endif - - { "KOI8-R", map_koi8_r }, - - /* Aliases */ - { "LATIN2", map_iso_8859_2 }, - { "LATIN6", map_iso_8859_10 }, - -#ifdef ALL_CHARSETS - { "ARABIC", map_iso_8859_6 }, - { "CYRILLIC", map_iso_8859_5 }, - { "GREEK", map_iso_8859_7 }, - { "HEBREW", map_iso_8859_8 }, - { "LATIN3", map_iso_8859_3 }, - { "LATIN4", map_iso_8859_4 }, - { "LATIN5", map_iso_8859_9 }, -#endif -}; diff --git a/package/libs/libiconv/src/include/charmaps/iso-8859-10.h b/package/libs/libiconv/src/include/charmaps/iso-8859-10.h deleted file mode 100644 index cb93d027d1..0000000000 --- a/package/libs/libiconv/src/include/charmaps/iso-8859-10.h +++ /dev/null @@ -1,24 +0,0 @@ -static const unsigned char map_iso_8859_10[] = { - 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x00, 0x81, 0x00, 0x82, 0x00, 0x83, - 0x00, 0x84, 0x00, 0x85, 0x00, 0x86, 0x00, 0x87, 0x00, 0x88, 0x00, 0x89, - 0x00, 0x8a, 0x00, 0x8b, 0x00, 0x8c, 0x00, 0x8d, 0x00, 0x8e, 0x00, 0x8f, - 0x00, 0x90, 0x00, 0x91, 0x00, 0x92, 0x00, 0x93, 0x00, 0x94, 0x00, 0x95, - 0x00, 0x96, 0x00, 0x97, 0x00, 0x98, 0x00, 0x99, 0x00, 0x9a, 0x00, 0x9b, - 0x00, 0x9c, 0x00, 0x9d, 0x00, 0x9e, 0x00, 0x9f, 0x00, 0xa0, 0x01, 0x04, - 0x01, 0x12, 0x01, 0x22, 0x01, 0x2a, 0x01, 0x28, 0x01, 0x36, 0x00, 0xa7, - 0x01, 0x3b, 0x01, 0x10, 0x01, 0x60, 0x01, 0x66, 0x01, 0x7d, 0x00, 0xad, - 0x01, 0x6a, 0x01, 0x4a, 0x00, 0xb0, 0x01, 0x05, 0x01, 0x13, 0x01, 0x23, - 0x01, 0x2b, 0x01, 0x29, 0x01, 0x37, 0x00, 0xb7, 0x01, 0x3c, 0x01, 0x11, - 0x01, 0x61, 0x01, 0x67, 0x01, 0x7e, 0x20, 0x15, 0x01, 0x6b, 0x01, 0x4b, - 0x01, 0x00, 0x00, 0xc1, 0x00, 0xc2, 0x00, 0xc3, 0x00, 0xc4, 0x00, 0xc5, - 0x00, 0xc6, 0x01, 0x2e, 0x01, 0x0c, 0x00, 0xc9, 0x01, 0x18, 0x00, 0xcb, - 0x01, 0x16, 0x00, 0xcd, 0x00, 0xce, 0x00, 0xcf, 0x00, 0xd0, 0x01, 0x45, - 0x01, 0x4c, 0x00, 0xd3, 0x00, 0xd4, 0x00, 0xd5, 0x00, 0xd6, 0x01, 0x68, - 0x00, 0xd8, 0x01, 0x72, 0x00, 0xda, 0x00, 0xdb, 0x00, 0xdc, 0x00, 0xdd, - 0x00, 0xde, 0x00, 0xdf, 0x01, 0x01, 0x00, 0xe1, 0x00, 0xe2, 0x00, 0xe3, - 0x00, 0xe4, 0x00, 0xe5, 0x00, 0xe6, 0x01, 0x2f, 0x01, 0x0d, 0x00, 0xe9, - 0x01, 0x19, 0x00, 0xeb, 0x01, 0x17, 0x00, 0xed, 0x00, 0xee, 0x00, 0xef, - 0x00, 0xf0, 0x01, 0x46, 0x01, 0x4d, 0x00, 0xf3, 0x00, 0xf4, 0x00, 0xf5, - 0x00, 0xf6, 0x01, 0x69, 0x00, 0xf8, 0x01, 0x73, 0x00, 0xfa, 0x00, 0xfb, - 0x00, 0xfc, 0x00, 0xfd, 0x00, 0xfe, 0x01, 0x38 -}; diff --git a/package/libs/libiconv/src/include/charmaps/iso-8859-13.h b/package/libs/libiconv/src/include/charmaps/iso-8859-13.h deleted file mode 100644 index b44d1b4346..0000000000 --- a/package/libs/libiconv/src/include/charmaps/iso-8859-13.h +++ /dev/null @@ -1,24 +0,0 @@ -static const unsigned char map_iso_8859_13[] = { - 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x00, 0x81, 0x00, 0x82, 0x00, 0x83, - 0x00, 0x84, 0x00, 0x85, 0x00, 0x86, 0x00, 0x87, 0x00, 0x88, 0x00, 0x89, - 0x00, 0x8a, 0x00, 0x8b, 0x00, 0x8c, 0x00, 0x8d, 0x00, 0x8e, 0x00, 0x8f, - 0x00, 0x90, 0x00, 0x91, 0x00, 0x92, 0x00, 0x93, 0x00, 0x94, 0x00, 0x95, - 0x00, 0x96, 0x00, 0x97, 0x00, 0x98, 0x00, 0x99, 0x00, 0x9a, 0x00, 0x9b, - 0x00, 0x9c, 0x00, 0x9d, 0x00, 0x9e, 0x00, 0x9f, 0x00, 0xa0, 0x20, 0x1d, - 0x00, 0xa2, 0x00, 0xa3, 0x00, 0xa4, 0x20, 0x1e, 0x00, 0xa6, 0x00, 0xa7, - 0x00, 0xd8, 0x00, 0xa9, 0x01, 0x56, 0x00, 0xab, 0x00, 0xac, 0x00, 0xad, - 0x00, 0xae, 0x00, 0xc6, 0x00, 0xb0, 0x00, 0xb1, 0x00, 0xb2, 0x00, 0xb3, - 0x20, 0x1c, 0x00, 0xb5, 0x00, 0xb6, 0x00, 0xb7, 0x00, 0xf8, 0x00, 0xb9, - 0x01, 0x57, 0x00, 0xbb, 0x00, 0xbc, 0x00, 0xbd, 0x00, 0xbe, 0x00, 0xe6, - 0x01, 0x04, 0x01, 0x2e, 0x01, 0x00, 0x01, 0x06, 0x00, 0xc4, 0x00, 0xc5, - 0x01, 0x18, 0x01, 0x12, 0x01, 0x0c, 0x00, 0xc9, 0x01, 0x79, 0x01, 0x16, - 0x01, 0x22, 0x01, 0x36, 0x01, 0x2a, 0x01, 0x3b, 0x01, 0x60, 0x01, 0x43, - 0x01, 0x45, 0x00, 0xd3, 0x01, 0x4c, 0x00, 0xd5, 0x00, 0xd6, 0x00, 0xd7, - 0x01, 0x72, 0x01, 0x41, 0x01, 0x5a, 0x01, 0x6a, 0x00, 0xdc, 0x01, 0x7b, - 0x01, 0x7d, 0x00, 0xdf, 0x01, 0x05, 0x01, 0x2f, 0x01, 0x01, 0x01, 0x07, - 0x00, 0xe4, 0x00, 0xe5, 0x01, 0x19, 0x01, 0x13, 0x01, 0x0d, 0x00, 0xe9, - 0x01, 0x7a, 0x01, 0x17, 0x01, 0x23, 0x01, 0x37, 0x01, 0x2b, 0x01, 0x3c, - 0x01, 0x61, 0x01, 0x44, 0x01, 0x46, 0x00, 0xf3, 0x01, 0x4d, 0x00, 0xf5, - 0x00, 0xf6, 0x00, 0xf7, 0x01, 0x73, 0x01, 0x42, 0x01, 0x5b, 0x01, 0x6b, - 0x00, 0xfc, 0x01, 0x7c, 0x01, 0x7e, 0x20, 0x19 -}; diff --git a/package/libs/libiconv/src/include/charmaps/iso-8859-14.h b/package/libs/libiconv/src/include/charmaps/iso-8859-14.h deleted file mode 100644 index 76cead98c7..0000000000 --- a/package/libs/libiconv/src/include/charmaps/iso-8859-14.h +++ /dev/null @@ -1,25 +0,0 @@ -static const unsigned char map_iso_8859_14[] = { - 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x00, 0x81, 0x00, 0x82, 0x00, 0x83, - 0x00, 0x84, 0x00, 0x85, 0x00, 0x86, 0x00, 0x87, 0x00, 0x88, 0x00, 0x89, - 0x00, 0x8a, 0x00, 0x8b, 0x00, 0x8c, 0x00, 0x8d, 0x00, 0x8e, 0x00, 0x8f, - 0x00, 0x90, 0x00, 0x91, 0x00, 0x92, 0x00, 0x93, 0x00, 0x94, 0x00, 0x95, - 0x00, 0x96, 0x00, 0x97, 0x00, 0x98, 0x00, 0x99, 0x00, 0x9a, 0x00, 0x9b, - 0x00, 0x9c, 0x00, 0x9d, 0x00, 0x9e, 0x00, 0x9f, 0x00, 0xa0, 0x1e, 0x02, - 0x1e, 0x03, 0x00, 0xa3, 0x01, 0x0a, 0x01, 0x0b, 0x1e, 0x0a, 0x00, 0xa7, - 0x1e, 0x80, 0x00, 0xa9, 0x1e, 0x82, 0x1e, 0x0b, 0x1e, 0xf2, 0x00, 0xad, - 0x00, 0xae, 0x01, 0x78, 0x1e, 0x1e, 0x1e, 0x1f, 0x01, 0x20, 0x01, 0x21, - 0x1e, 0x40, 0x1e, 0x41, 0x00, 0xb6, 0x1e, 0x56, 0x1e, 0x81, 0x1e, 0x57, - 0x1e, 0x83, 0x1e, 0x60, 0x1e, 0xf3, 0x1e, 0x84, 0x1e, 0x85, 0x1e, 0x61, - 0x00, 0xc0, 0x00, 0xc1, 0x00, 0xc2, 0x00, 0xc3, 0x00, 0xc4, 0x00, 0xc5, - 0x00, 0xc6, 0x00, 0xc7, 0x00, 0xc8, 0x00, 0xc9, 0x00, 0xca, 0x00, 0xcb, - 0x00, 0xcc, 0x00, 0xcd, 0x00, 0xce, 0x00, 0xcf, 0x01, 0x74, 0x00, 0xd1, - 0x00, 0xd2, 0x00, 0xd3, 0x00, 0xd4, 0x00, 0xd5, 0x00, 0xd6, 0x1e, 0x6a, - 0x00, 0xd8, 0x00, 0xd9, 0x00, 0xda, 0x00, 0xdb, 0x00, 0xdc, 0x00, 0xdd, - 0x01, 0x76, 0x00, 0xdf, 0x00, 0xe0, 0x00, 0xe1, 0x00, 0xe2, 0x00, 0xe3, - 0x00, 0xe4, 0x00, 0xe5, 0x00, 0xe6, 0x00, 0xe7, 0x00, 0xe8, 0x00, 0xe9, - 0x00, 0xea, 0x00, 0xeb, 0x00, 0xec, 0x00, 0xed, 0x00, 0xee, 0x00, 0xef, - 0x01, 0x75, 0x00, 0xf1, 0x00, 0xf2, 0x00, 0xf3, 0x00, 0xf4, 0x00, 0xf5, - 0x00, 0xf6, 0x1e, 0x6b, 0x00, 0xf8, 0x00, 0xf9, 0x00, 0xfa, 0x00, 0xfb, - 0x00, 0xfc, 0x00, 0xfd, 0x01, 0x77, 0x00, 0xff -}; - diff --git a/package/libs/libiconv/src/include/charmaps/iso-8859-16.h b/package/libs/libiconv/src/include/charmaps/iso-8859-16.h deleted file mode 100644 index 4437a41f05..0000000000 --- a/package/libs/libiconv/src/include/charmaps/iso-8859-16.h +++ /dev/null @@ -1,24 +0,0 @@ -static const unsigned char map_iso_8859_16[] = { - 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x00, 0x81, 0x00, 0x82, 0x00, 0x83, - 0x00, 0x84, 0x00, 0x85, 0x00, 0x86, 0x00, 0x87, 0x00, 0x88, 0x00, 0x89, - 0x00, 0x8a, 0x00, 0x8b, 0x00, 0x8c, 0x00, 0x8d, 0x00, 0x8e, 0x00, 0x8f, - 0x00, 0x90, 0x00, 0x91, 0x00, 0x92, 0x00, 0x93, 0x00, 0x94, 0x00, 0x95, - 0x00, 0x96, 0x00, 0x97, 0x00, 0x98, 0x00, 0x99, 0x00, 0x9a, 0x00, 0x9b, - 0x00, 0x9c, 0x00, 0x9d, 0x00, 0x9e, 0x00, 0x9f, 0x00, 0xa0, 0x01, 0x04, - 0x01, 0x05, 0x01, 0x41, 0x20, 0xac, 0x20, 0x1e, 0x01, 0x60, 0x00, 0xa7, - 0x01, 0x61, 0x00, 0xa9, 0x02, 0x18, 0x00, 0xab, 0x01, 0x79, 0x00, 0xad, - 0x01, 0x7a, 0x01, 0x7b, 0x00, 0xb0, 0x00, 0xb1, 0x01, 0x0c, 0x01, 0x42, - 0x01, 0x7d, 0x20, 0x1d, 0x00, 0xb6, 0x00, 0xb7, 0x01, 0x7e, 0x01, 0x0d, - 0x02, 0x19, 0x00, 0xbb, 0x01, 0x52, 0x01, 0x53, 0x01, 0x78, 0x01, 0x7c, - 0x00, 0xc0, 0x00, 0xc1, 0x00, 0xc2, 0x01, 0x02, 0x00, 0xc4, 0x01, 0x06, - 0x00, 0xc6, 0x00, 0xc7, 0x00, 0xc8, 0x00, 0xc9, 0x00, 0xca, 0x00, 0xcb, - 0x00, 0xcc, 0x00, 0xcd, 0x00, 0xce, 0x00, 0xcf, 0x01, 0x10, 0x01, 0x43, - 0x00, 0xd2, 0x00, 0xd3, 0x00, 0xd4, 0x01, 0x50, 0x00, 0xd6, 0x01, 0x5a, - 0x01, 0x70, 0x00, 0xd9, 0x00, 0xda, 0x00, 0xdb, 0x00, 0xdc, 0x01, 0x18, - 0x02, 0x1a, 0x00, 0xdf, 0x00, 0xe0, 0x00, 0xe1, 0x00, 0xe2, 0x01, 0x03, - 0x00, 0xe4, 0x01, 0x07, 0x00, 0xe6, 0x00, 0xe7, 0x00, 0xe8, 0x00, 0xe9, - 0x00, 0xea, 0x00, 0xeb, 0x00, 0xec, 0x00, 0xed, 0x00, 0xee, 0x00, 0xef, - 0x01, 0x11, 0x01, 0x44, 0x00, 0xf2, 0x00, 0xf3, 0x00, 0xf4, 0x01, 0x51, - 0x00, 0xf6, 0x01, 0x5b, 0x01, 0x71, 0x00, 0xf9, 0x00, 0xfa, 0x00, 0xfb, - 0x00, 0xfc, 0x01, 0x19, 0x02, 0x1b, 0x00, 0xff -}; diff --git a/package/libs/libiconv/src/include/charmaps/iso-8859-2.h b/package/libs/libiconv/src/include/charmaps/iso-8859-2.h deleted file mode 100644 index 631610e17c..0000000000 --- a/package/libs/libiconv/src/include/charmaps/iso-8859-2.h +++ /dev/null @@ -1,24 +0,0 @@ -static const unsigned char map_iso_8859_2[] = { - 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x00, 0x81, 0x00, 0x82, 0x00, 0x83, - 0x00, 0x84, 0x00, 0x85, 0x00, 0x86, 0x00, 0x87, 0x00, 0x88, 0x00, 0x89, - 0x00, 0x8a, 0x00, 0x8b, 0x00, 0x8c, 0x00, 0x8d, 0x00, 0x8e, 0x00, 0x8f, - 0x00, 0x90, 0x00, 0x91, 0x00, 0x92, 0x00, 0x93, 0x00, 0x94, 0x00, 0x95, - 0x00, 0x96, 0x00, 0x97, 0x00, 0x98, 0x00, 0x99, 0x00, 0x9a, 0x00, 0x9b, - 0x00, 0x9c, 0x00, 0x9d, 0x00, 0x9e, 0x00, 0x9f, 0x00, 0xa0, 0x01, 0x04, - 0x02, 0xd8, 0x01, 0x41, 0x00, 0xa4, 0x01, 0x3d, 0x01, 0x5a, 0x00, 0xa7, - 0x00, 0xa8, 0x01, 0x60, 0x01, 0x5e, 0x01, 0x64, 0x01, 0x79, 0x00, 0xad, - 0x01, 0x7d, 0x01, 0x7b, 0x00, 0xb0, 0x01, 0x05, 0x02, 0xdb, 0x01, 0x42, - 0x00, 0xb4, 0x01, 0x3e, 0x01, 0x5b, 0x02, 0xc7, 0x00, 0xb8, 0x01, 0x61, - 0x01, 0x5f, 0x01, 0x65, 0x01, 0x7a, 0x02, 0xdd, 0x01, 0x7e, 0x01, 0x7c, - 0x01, 0x54, 0x00, 0xc1, 0x00, 0xc2, 0x01, 0x02, 0x00, 0xc4, 0x01, 0x39, - 0x01, 0x06, 0x00, 0xc7, 0x01, 0x0c, 0x00, 0xc9, 0x01, 0x18, 0x00, 0xcb, - 0x01, 0x1a, 0x00, 0xcd, 0x00, 0xce, 0x01, 0x0e, 0x01, 0x10, 0x01, 0x43, - 0x01, 0x47, 0x00, 0xd3, 0x00, 0xd4, 0x01, 0x50, 0x00, 0xd6, 0x00, 0xd7, - 0x01, 0x58, 0x01, 0x6e, 0x00, 0xda, 0x01, 0x70, 0x00, 0xdc, 0x00, 0xdd, - 0x01, 0x62, 0x00, 0xdf, 0x01, 0x55, 0x00, 0xe1, 0x00, 0xe2, 0x01, 0x03, - 0x00, 0xe4, 0x01, 0x3a, 0x01, 0x07, 0x00, 0xe7, 0x01, 0x0d, 0x00, 0xe9, - 0x01, 0x19, 0x00, 0xeb, 0x01, 0x1b, 0x00, 0xed, 0x00, 0xee, 0x01, 0x0f, - 0x01, 0x11, 0x01, 0x44, 0x01, 0x48, 0x00, 0xf3, 0x00, 0xf4, 0x01, 0x51, - 0x00, 0xf6, 0x00, 0xf7, 0x01, 0x59, 0x01, 0x6f, 0x00, 0xfa, 0x01, 0x71, - 0x00, 0xfc, 0x00, 0xfd, 0x01, 0x63, 0x02, 0xd9 -}; diff --git a/package/libs/libiconv/src/include/charmaps/iso-8859-3.h b/package/libs/libiconv/src/include/charmaps/iso-8859-3.h deleted file mode 100644 index cd76d59c65..0000000000 --- a/package/libs/libiconv/src/include/charmaps/iso-8859-3.h +++ /dev/null @@ -1,24 +0,0 @@ -static const unsigned char map_iso_8859_3[] = { - 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x00, 0x81, 0x00, 0x82, 0x00, 0x83, - 0x00, 0x84, 0x00, 0x85, 0x00, 0x86, 0x00, 0x87, 0x00, 0x88, 0x00, 0x89, - 0x00, 0x8a, 0x00, 0x8b, 0x00, 0x8c, 0x00, 0x8d, 0x00, 0x8e, 0x00, 0x8f, - 0x00, 0x90, 0x00, 0x91, 0x00, 0x92, 0x00, 0x93, 0x00, 0x94, 0x00, 0x95, - 0x00, 0x96, 0x00, 0x97, 0x00, 0x98, 0x00, 0x99, 0x00, 0x9a, 0x00, 0x9b, - 0x00, 0x9c, 0x00, 0x9d, 0x00, 0x9e, 0x00, 0x9f, 0x00, 0xa0, 0x01, 0x26, - 0x02, 0xd8, 0x00, 0xa3, 0x00, 0xa4, 0xff, 0xff, 0x01, 0x24, 0x00, 0xa7, - 0x00, 0xa8, 0x01, 0x30, 0x01, 0x5e, 0x01, 0x1e, 0x01, 0x34, 0x00, 0xad, - 0xff, 0xff, 0x01, 0x7b, 0x00, 0xb0, 0x01, 0x27, 0x00, 0xb2, 0x00, 0xb3, - 0x00, 0xb4, 0x00, 0xb5, 0x01, 0x25, 0x00, 0xb7, 0x00, 0xb8, 0x01, 0x31, - 0x01, 0x5f, 0x01, 0x1f, 0x01, 0x35, 0x00, 0xbd, 0xff, 0xff, 0x01, 0x7c, - 0x00, 0xc0, 0x00, 0xc1, 0x00, 0xc2, 0xff, 0xff, 0x00, 0xc4, 0x01, 0x0a, - 0x01, 0x08, 0x00, 0xc7, 0x00, 0xc8, 0x00, 0xc9, 0x00, 0xca, 0x00, 0xcb, - 0x00, 0xcc, 0x00, 0xcd, 0x00, 0xce, 0x00, 0xcf, 0xff, 0xff, 0x00, 0xd1, - 0x00, 0xd2, 0x00, 0xd3, 0x00, 0xd4, 0x01, 0x20, 0x00, 0xd6, 0x00, 0xd7, - 0x01, 0x1c, 0x00, 0xd9, 0x00, 0xda, 0x00, 0xdb, 0x00, 0xdc, 0x01, 0x6c, - 0x01, 0x5c, 0x00, 0xdf, 0x00, 0xe0, 0x00, 0xe1, 0x00, 0xe2, 0xff, 0xff, - 0x00, 0xe4, 0x01, 0x0b, 0x01, 0x09, 0x00, 0xe7, 0x00, 0xe8, 0x00, 0xe9, - 0x00, 0xea, 0x00, 0xeb, 0x00, 0xec, 0x00, 0xed, 0x00, 0xee, 0x00, 0xef, - 0xff, 0xff, 0x00, 0xf1, 0x00, 0xf2, 0x00, 0xf3, 0x00, 0xf4, 0x01, 0x21, - 0x00, 0xf6, 0x00, 0xf7, 0x01, 0x1d, 0x00, 0xf9, 0x00, 0xfa, 0x00, 0xfb, - 0x00, 0xfc, 0x01, 0x6d, 0x01, 0x5d, 0x02, 0xd9 -}; diff --git a/package/libs/libiconv/src/include/charmaps/iso-8859-4.h b/package/libs/libiconv/src/include/charmaps/iso-8859-4.h deleted file mode 100644 index 5db2f77807..0000000000 --- a/package/libs/libiconv/src/include/charmaps/iso-8859-4.h +++ /dev/null @@ -1,24 +0,0 @@ -static const unsigned char map_iso_8859_4[] = { - 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x00, 0x81, 0x00, 0x82, 0x00, 0x83, - 0x00, 0x84, 0x00, 0x85, 0x00, 0x86, 0x00, 0x87, 0x00, 0x88, 0x00, 0x89, - 0x00, 0x8a, 0x00, 0x8b, 0x00, 0x8c, 0x00, 0x8d, 0x00, 0x8e, 0x00, 0x8f, - 0x00, 0x90, 0x00, 0x91, 0x00, 0x92, 0x00, 0x93, 0x00, 0x94, 0x00, 0x95, - 0x00, 0x96, 0x00, 0x97, 0x00, 0x98, 0x00, 0x99, 0x00, 0x9a, 0x00, 0x9b, - 0x00, 0x9c, 0x00, 0x9d, 0x00, 0x9e, 0x00, 0x9f, 0x00, 0xa0, 0x01, 0x04, - 0x01, 0x38, 0x01, 0x56, 0x00, 0xa4, 0x01, 0x28, 0x01, 0x3b, 0x00, 0xa7, - 0x00, 0xa8, 0x01, 0x60, 0x01, 0x12, 0x01, 0x22, 0x01, 0x66, 0x00, 0xad, - 0x01, 0x7d, 0x00, 0xaf, 0x00, 0xb0, 0x01, 0x05, 0x02, 0xdb, 0x01, 0x57, - 0x00, 0xb4, 0x01, 0x29, 0x01, 0x3c, 0x02, 0xc7, 0x00, 0xb8, 0x01, 0x61, - 0x01, 0x13, 0x01, 0x23, 0x01, 0x67, 0x01, 0x4a, 0x01, 0x7e, 0x01, 0x4b, - 0x01, 0x00, 0x00, 0xc1, 0x00, 0xc2, 0x00, 0xc3, 0x00, 0xc4, 0x00, 0xc5, - 0x00, 0xc6, 0x01, 0x2e, 0x01, 0x0c, 0x00, 0xc9, 0x01, 0x18, 0x00, 0xcb, - 0x01, 0x16, 0x00, 0xcd, 0x00, 0xce, 0x01, 0x2a, 0x01, 0x10, 0x01, 0x45, - 0x01, 0x4c, 0x01, 0x36, 0x00, 0xd4, 0x00, 0xd5, 0x00, 0xd6, 0x00, 0xd7, - 0x00, 0xd8, 0x01, 0x72, 0x00, 0xda, 0x00, 0xdb, 0x00, 0xdc, 0x01, 0x68, - 0x01, 0x6a, 0x00, 0xdf, 0x01, 0x01, 0x00, 0xe1, 0x00, 0xe2, 0x00, 0xe3, - 0x00, 0xe4, 0x00, 0xe5, 0x00, 0xe6, 0x01, 0x2f, 0x01, 0x0d, 0x00, 0xe9, - 0x01, 0x19, 0x00, 0xeb, 0x01, 0x17, 0x00, 0xed, 0x00, 0xee, 0x01, 0x2b, - 0x01, 0x11, 0x01, 0x46, 0x01, 0x4d, 0x01, 0x37, 0x00, 0xf4, 0x00, 0xf5, - 0x00, 0xf6, 0x00, 0xf7, 0x00, 0xf8, 0x01, 0x73, 0x00, 0xfa, 0x00, 0xfb, - 0x00, 0xfc, 0x01, 0x69, 0x01, 0x6b, 0x02, 0xd9 -}; diff --git a/package/libs/libiconv/src/include/charmaps/iso-8859-5.h b/package/libs/libiconv/src/include/charmaps/iso-8859-5.h deleted file mode 100644 index d9fe684a34..0000000000 --- a/package/libs/libiconv/src/include/charmaps/iso-8859-5.h +++ /dev/null @@ -1,24 +0,0 @@ -static const unsigned char map_iso_8859_5[] = { - 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x00, 0x81, 0x00, 0x82, 0x00, 0x83, - 0x00, 0x84, 0x00, 0x85, 0x00, 0x86, 0x00, 0x87, 0x00, 0x88, 0x00, 0x89, - 0x00, 0x8a, 0x00, 0x8b, 0x00, 0x8c, 0x00, 0x8d, 0x00, 0x8e, 0x00, 0x8f, - 0x00, 0x90, 0x00, 0x91, 0x00, 0x92, 0x00, 0x93, 0x00, 0x94, 0x00, 0x95, - 0x00, 0x96, 0x00, 0x97, 0x00, 0x98, 0x00, 0x99, 0x00, 0x9a, 0x00, 0x9b, - 0x00, 0x9c, 0x00, 0x9d, 0x00, 0x9e, 0x00, 0x9f, 0x00, 0xa0, 0x04, 0x01, - 0x04, 0x02, 0x04, 0x03, 0x04, 0x04, 0x04, 0x05, 0x04, 0x06, 0x04, 0x07, - 0x04, 0x08, 0x04, 0x09, 0x04, 0x0a, 0x04, 0x0b, 0x04, 0x0c, 0x00, 0xad, - 0x04, 0x0e, 0x04, 0x0f, 0x04, 0x10, 0x04, 0x11, 0x04, 0x12, 0x04, 0x13, - 0x04, 0x14, 0x04, 0x15, 0x04, 0x16, 0x04, 0x17, 0x04, 0x18, 0x04, 0x19, - 0x04, 0x1a, 0x04, 0x1b, 0x04, 0x1c, 0x04, 0x1d, 0x04, 0x1e, 0x04, 0x1f, - 0x04, 0x20, 0x04, 0x21, 0x04, 0x22, 0x04, 0x23, 0x04, 0x24, 0x04, 0x25, - 0x04, 0x26, 0x04, 0x27, 0x04, 0x28, 0x04, 0x29, 0x04, 0x2a, 0x04, 0x2b, - 0x04, 0x2c, 0x04, 0x2d, 0x04, 0x2e, 0x04, 0x2f, 0x04, 0x30, 0x04, 0x31, - 0x04, 0x32, 0x04, 0x33, 0x04, 0x34, 0x04, 0x35, 0x04, 0x36, 0x04, 0x37, - 0x04, 0x38, 0x04, 0x39, 0x04, 0x3a, 0x04, 0x3b, 0x04, 0x3c, 0x04, 0x3d, - 0x04, 0x3e, 0x04, 0x3f, 0x04, 0x40, 0x04, 0x41, 0x04, 0x42, 0x04, 0x43, - 0x04, 0x44, 0x04, 0x45, 0x04, 0x46, 0x04, 0x47, 0x04, 0x48, 0x04, 0x49, - 0x04, 0x4a, 0x04, 0x4b, 0x04, 0x4c, 0x04, 0x4d, 0x04, 0x4e, 0x04, 0x4f, - 0x21, 0x16, 0x04, 0x51, 0x04, 0x52, 0x04, 0x53, 0x04, 0x54, 0x04, 0x55, - 0x04, 0x56, 0x04, 0x57, 0x04, 0x58, 0x04, 0x59, 0x04, 0x5a, 0x04, 0x5b, - 0x04, 0x5c, 0x00, 0xa7, 0x04, 0x5e, 0x04, 0x5f -}; diff --git a/package/libs/libiconv/src/include/charmaps/iso-8859-6.h b/package/libs/libiconv/src/include/charmaps/iso-8859-6.h deleted file mode 100644 index 820020fd91..0000000000 --- a/package/libs/libiconv/src/include/charmaps/iso-8859-6.h +++ /dev/null @@ -1,24 +0,0 @@ -static const unsigned char map_iso_8859_6[] = { - 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x00, 0x81, 0x00, 0x82, 0x00, 0x83, - 0x00, 0x84, 0x00, 0x85, 0x00, 0x86, 0x00, 0x87, 0x00, 0x88, 0x00, 0x89, - 0x00, 0x8a, 0x00, 0x8b, 0x00, 0x8c, 0x00, 0x8d, 0x00, 0x8e, 0x00, 0x8f, - 0x00, 0x90, 0x00, 0x91, 0x00, 0x92, 0x00, 0x93, 0x00, 0x94, 0x00, 0x95, - 0x00, 0x96, 0x00, 0x97, 0x00, 0x98, 0x00, 0x99, 0x00, 0x9a, 0x00, 0x9b, - 0x00, 0x9c, 0x00, 0x9d, 0x00, 0x9e, 0x00, 0x9f, 0x00, 0xa0, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0x00, 0xa4, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x06, 0x0c, 0x00, 0xad, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0x06, 0x1b, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x06, 0x1f, - 0xff, 0xff, 0x06, 0x21, 0x06, 0x22, 0x06, 0x23, 0x06, 0x24, 0x06, 0x25, - 0x06, 0x26, 0x06, 0x27, 0x06, 0x28, 0x06, 0x29, 0x06, 0x2a, 0x06, 0x2b, - 0x06, 0x2c, 0x06, 0x2d, 0x06, 0x2e, 0x06, 0x2f, 0x06, 0x30, 0x06, 0x31, - 0x06, 0x32, 0x06, 0x33, 0x06, 0x34, 0x06, 0x35, 0x06, 0x36, 0x06, 0x37, - 0x06, 0x38, 0x06, 0x39, 0x06, 0x3a, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0x06, 0x40, 0x06, 0x41, 0x06, 0x42, 0x06, 0x43, - 0x06, 0x44, 0x06, 0x45, 0x06, 0x46, 0x06, 0x47, 0x06, 0x48, 0x06, 0x49, - 0x06, 0x4a, 0x06, 0x4b, 0x06, 0x4c, 0x06, 0x4d, 0x06, 0x4e, 0x06, 0x4f, - 0x06, 0x50, 0x06, 0x51, 0x06, 0x52, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff -}; diff --git a/package/libs/libiconv/src/include/charmaps/iso-8859-7.h b/package/libs/libiconv/src/include/charmaps/iso-8859-7.h deleted file mode 100644 index 174f9d3cbc..0000000000 --- a/package/libs/libiconv/src/include/charmaps/iso-8859-7.h +++ /dev/null @@ -1,24 +0,0 @@ -static const unsigned char map_iso_8859_7[] = { - 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x00, 0x81, 0x00, 0x82, 0x00, 0x83, - 0x00, 0x84, 0x00, 0x85, 0x00, 0x86, 0x00, 0x87, 0x00, 0x88, 0x00, 0x89, - 0x00, 0x8a, 0x00, 0x8b, 0x00, 0x8c, 0x00, 0x8d, 0x00, 0x8e, 0x00, 0x8f, - 0x00, 0x90, 0x00, 0x91, 0x00, 0x92, 0x00, 0x93, 0x00, 0x94, 0x00, 0x95, - 0x00, 0x96, 0x00, 0x97, 0x00, 0x98, 0x00, 0x99, 0x00, 0x9a, 0x00, 0x9b, - 0x00, 0x9c, 0x00, 0x9d, 0x00, 0x9e, 0x00, 0x9f, 0x00, 0xa0, 0x20, 0x18, - 0x20, 0x19, 0x00, 0xa3, 0x20, 0xac, 0x20, 0xaf, 0x00, 0xa6, 0x00, 0xa7, - 0x00, 0xa8, 0x00, 0xa9, 0x03, 0x7a, 0x00, 0xab, 0x00, 0xac, 0x00, 0xad, - 0xff, 0xff, 0x20, 0x15, 0x00, 0xb0, 0x00, 0xb1, 0x00, 0xb2, 0x00, 0xb3, - 0x03, 0x84, 0x03, 0x85, 0x03, 0x86, 0x00, 0xb7, 0x03, 0x88, 0x03, 0x89, - 0x03, 0x8a, 0x00, 0xbb, 0x03, 0x8c, 0x00, 0xbd, 0x03, 0x8e, 0x03, 0x8f, - 0x03, 0x90, 0x03, 0x91, 0x03, 0x92, 0x03, 0x93, 0x03, 0x94, 0x03, 0x95, - 0x03, 0x96, 0x03, 0x97, 0x03, 0x98, 0x03, 0x99, 0x03, 0x9a, 0x03, 0x9b, - 0x03, 0x9c, 0x03, 0x9d, 0x03, 0x9e, 0x03, 0x9f, 0x03, 0xa0, 0x03, 0xa1, - 0xff, 0xff, 0x03, 0xa3, 0x03, 0xa4, 0x03, 0xa5, 0x03, 0xa6, 0x03, 0xa7, - 0x03, 0xa8, 0x03, 0xa9, 0x03, 0xaa, 0x03, 0xab, 0x03, 0xac, 0x03, 0xad, - 0x03, 0xae, 0x03, 0xaf, 0x03, 0xb0, 0x03, 0xb1, 0x03, 0xb2, 0x03, 0xb3, - 0x03, 0xb4, 0x03, 0xb5, 0x03, 0xb6, 0x03, 0xb7, 0x03, 0xb8, 0x03, 0xb9, - 0x03, 0xba, 0x03, 0xbb, 0x03, 0xbc, 0x03, 0xbd, 0x03, 0xbe, 0x03, 0xbf, - 0x03, 0xc0, 0x03, 0xc1, 0x03, 0xc2, 0x03, 0xc3, 0x03, 0xc4, 0x03, 0xc5, - 0x03, 0xc6, 0x03, 0xc7, 0x03, 0xc8, 0x03, 0xc9, 0x03, 0xca, 0x03, 0xcb, - 0x03, 0xcc, 0x03, 0xcd, 0x03, 0xce, 0xff, 0xff -}; diff --git a/package/libs/libiconv/src/include/charmaps/iso-8859-8.h b/package/libs/libiconv/src/include/charmaps/iso-8859-8.h deleted file mode 100644 index 66d4a5ec1f..0000000000 --- a/package/libs/libiconv/src/include/charmaps/iso-8859-8.h +++ /dev/null @@ -1,24 +0,0 @@ -static const unsigned char map_iso_8859_8[] = { - 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x00, 0x81, 0x00, 0x82, 0x00, 0x83, - 0x00, 0x84, 0x00, 0x85, 0x00, 0x86, 0x00, 0x87, 0x00, 0x88, 0x00, 0x89, - 0x00, 0x8a, 0x00, 0x8b, 0x00, 0x8c, 0x00, 0x8d, 0x00, 0x8e, 0x00, 0x8f, - 0x00, 0x90, 0x00, 0x91, 0x00, 0x92, 0x00, 0x93, 0x00, 0x94, 0x00, 0x95, - 0x00, 0x96, 0x00, 0x97, 0x00, 0x98, 0x00, 0x99, 0x00, 0x9a, 0x00, 0x9b, - 0x00, 0x9c, 0x00, 0x9d, 0x00, 0x9e, 0x00, 0x9f, 0x00, 0xa0, 0xff, 0xff, - 0x00, 0xa2, 0x00, 0xa3, 0x00, 0xa4, 0x00, 0xa5, 0x00, 0xa6, 0x00, 0xa7, - 0x00, 0xa8, 0x00, 0xa9, 0x00, 0xd7, 0x00, 0xab, 0x00, 0xac, 0x00, 0xad, - 0x00, 0xae, 0x00, 0xaf, 0x00, 0xb0, 0x00, 0xb1, 0x00, 0xb2, 0x00, 0xb3, - 0x00, 0xb4, 0x00, 0xb5, 0x00, 0xb6, 0x00, 0xb7, 0x00, 0xb8, 0x00, 0xb9, - 0x00, 0xf7, 0x00, 0xbb, 0x00, 0xbc, 0x00, 0xbd, 0x00, 0xbe, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0x20, 0x17, 0x05, 0xd0, 0x05, 0xd1, 0x05, 0xd2, 0x05, 0xd3, - 0x05, 0xd4, 0x05, 0xd5, 0x05, 0xd6, 0x05, 0xd7, 0x05, 0xd8, 0x05, 0xd9, - 0x05, 0xda, 0x05, 0xdb, 0x05, 0xdc, 0x05, 0xdd, 0x05, 0xde, 0x05, 0xdf, - 0x05, 0xe0, 0x05, 0xe1, 0x05, 0xe2, 0x05, 0xe3, 0x05, 0xe4, 0x05, 0xe5, - 0x05, 0xe6, 0x05, 0xe7, 0x05, 0xe8, 0x05, 0xe9, 0x05, 0xea, 0xff, 0xff, - 0xff, 0xff, 0x20, 0x0e, 0x20, 0x0f, 0xff, 0xff -}; diff --git a/package/libs/libiconv/src/include/charmaps/iso-8859-9.h b/package/libs/libiconv/src/include/charmaps/iso-8859-9.h deleted file mode 100644 index f1a8646062..0000000000 --- a/package/libs/libiconv/src/include/charmaps/iso-8859-9.h +++ /dev/null @@ -1,24 +0,0 @@ -static const unsigned char map_iso_8859_9[] = { - 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x00, 0x81, 0x00, 0x82, 0x00, 0x83, - 0x00, 0x84, 0x00, 0x85, 0x00, 0x86, 0x00, 0x87, 0x00, 0x88, 0x00, 0x89, - 0x00, 0x8a, 0x00, 0x8b, 0x00, 0x8c, 0x00, 0x8d, 0x00, 0x8e, 0x00, 0x8f, - 0x00, 0x90, 0x00, 0x91, 0x00, 0x92, 0x00, 0x93, 0x00, 0x94, 0x00, 0x95, - 0x00, 0x96, 0x00, 0x97, 0x00, 0x98, 0x00, 0x99, 0x00, 0x9a, 0x00, 0x9b, - 0x00, 0x9c, 0x00, 0x9d, 0x00, 0x9e, 0x00, 0x9f, 0x00, 0xa0, 0x00, 0xa1, - 0x00, 0xa2, 0x00, 0xa3, 0x00, 0xa4, 0x00, 0xa5, 0x00, 0xa6, 0x00, 0xa7, - 0x00, 0xa8, 0x00, 0xa9, 0x00, 0xaa, 0x00, 0xab, 0x00, 0xac, 0x00, 0xad, - 0x00, 0xae, 0x00, 0xaf, 0x00, 0xb0, 0x00, 0xb1, 0x00, 0xb2, 0x00, 0xb3, - 0x00, 0xb4, 0x00, 0xb5, 0x00, 0xb6, 0x00, 0xb7, 0x00, 0xb8, 0x00, 0xb9, - 0x00, 0xba, 0x00, 0xbb, 0x00, 0xbc, 0x00, 0xbd, 0x00, 0xbe, 0x00, 0xbf, - 0x00, 0xc0, 0x00, 0xc1, 0x00, 0xc2, 0x00, 0xc3, 0x00, 0xc4, 0x00, 0xc5, - 0x00, 0xc6, 0x00, 0xc7, 0x00, 0xc8, 0x00, 0xc9, 0x00, 0xca, 0x00, 0xcb, - 0x00, 0xcc, 0x00, 0xcd, 0x00, 0xce, 0x00, 0xcf, 0x01, 0x1e, 0x00, 0xd1, - 0x00, 0xd2, 0x00, 0xd3, 0x00, 0xd4, 0x00, 0xd5, 0x00, 0xd6, 0x00, 0xd7, - 0x00, 0xd8, 0x00, 0xd9, 0x00, 0xda, 0x00, 0xdb, 0x00, 0xdc, 0x01, 0x30, - 0x01, 0x5e, 0x00, 0xdf, 0x00, 0xe0, 0x00, 0xe1, 0x00, 0xe2, 0x00, 0xe3, - 0x00, 0xe4, 0x00, 0xe5, 0x00, 0xe6, 0x00, 0xe7, 0x00, 0xe8, 0x00, 0xe9, - 0x00, 0xea, 0x00, 0xeb, 0x00, 0xec, 0x00, 0xed, 0x00, 0xee, 0x00, 0xef, - 0x01, 0x1f, 0x00, 0xf1, 0x00, 0xf2, 0x00, 0xf3, 0x00, 0xf4, 0x00, 0xf5, - 0x00, 0xf6, 0x00, 0xf7, 0x00, 0xf8, 0x00, 0xf9, 0x00, 0xfa, 0x00, 0xfb, - 0x00, 0xfc, 0x01, 0x31, 0x01, 0x5f, 0x00, 0xff -}; diff --git a/package/libs/libiconv/src/include/charmaps/koi8-r.h b/package/libs/libiconv/src/include/charmaps/koi8-r.h deleted file mode 100644 index c2453a5319..0000000000 --- a/package/libs/libiconv/src/include/charmaps/koi8-r.h +++ /dev/null @@ -1,24 +0,0 @@ -static const unsigned char map_koi8_r[] = { - 0x00, 0x00, 0x00, 0x00, 0x25, 0x00, 0x25, 0x02, 0x25, 0x0c, 0x25, 0x10, - 0x25, 0x14, 0x25, 0x18, 0x25, 0x1c, 0x25, 0x24, 0x25, 0x2c, 0x25, 0x34, - 0x25, 0x3c, 0x25, 0x80, 0x25, 0x84, 0x25, 0x88, 0x25, 0x8c, 0x25, 0x90, - 0x25, 0x91, 0x25, 0x92, 0x25, 0x93, 0x23, 0x20, 0x25, 0xa0, 0x22, 0x19, - 0x22, 0x1a, 0x22, 0x48, 0x22, 0x64, 0x22, 0x65, 0x00, 0xa0, 0x23, 0x21, - 0x00, 0xb0, 0x00, 0xb2, 0x00, 0xb7, 0x00, 0xf7, 0x25, 0x50, 0x25, 0x51, - 0x25, 0x52, 0x04, 0x51, 0x25, 0x53, 0x25, 0x54, 0x25, 0x55, 0x25, 0x56, - 0x25, 0x57, 0x25, 0x58, 0x25, 0x59, 0x25, 0x5a, 0x25, 0x5b, 0x25, 0x5c, - 0x25, 0x5d, 0x25, 0x5e, 0x25, 0x5f, 0x25, 0x60, 0x25, 0x61, 0x04, 0x01, - 0x25, 0x62, 0x25, 0x63, 0x25, 0x64, 0x25, 0x65, 0x25, 0x66, 0x25, 0x67, - 0x25, 0x68, 0x25, 0x69, 0x25, 0x6a, 0x25, 0x6b, 0x25, 0x6c, 0x00, 0xa9, - 0x04, 0x4e, 0x04, 0x30, 0x04, 0x31, 0x04, 0x46, 0x04, 0x34, 0x04, 0x35, - 0x04, 0x44, 0x04, 0x33, 0x04, 0x45, 0x04, 0x38, 0x04, 0x39, 0x04, 0x3a, - 0x04, 0x3b, 0x04, 0x3c, 0x04, 0x3d, 0x04, 0x3e, 0x04, 0x3f, 0x04, 0x4f, - 0x04, 0x40, 0x04, 0x41, 0x04, 0x42, 0x04, 0x43, 0x04, 0x36, 0x04, 0x32, - 0x04, 0x4c, 0x04, 0x4b, 0x04, 0x37, 0x04, 0x48, 0x04, 0x4d, 0x04, 0x49, - 0x04, 0x47, 0x04, 0x4a, 0x04, 0x2e, 0x04, 0x10, 0x04, 0x11, 0x04, 0x26, - 0x04, 0x14, 0x04, 0x15, 0x04, 0x24, 0x04, 0x13, 0x04, 0x25, 0x04, 0x18, - 0x04, 0x19, 0x04, 0x1a, 0x04, 0x1b, 0x04, 0x1c, 0x04, 0x1d, 0x04, 0x1e, - 0x04, 0x1f, 0x04, 0x2f, 0x04, 0x20, 0x04, 0x21, 0x04, 0x22, 0x04, 0x23, - 0x04, 0x16, 0x04, 0x12, 0x04, 0x2c, 0x04, 0x2b, 0x04, 0x17, 0x04, 0x28, - 0x04, 0x2d, 0x04, 0x29, 0x04, 0x27, 0x04, 0x2a -}; diff --git a/package/libs/libiconv/src/include/charmaps/windows-1250.h b/package/libs/libiconv/src/include/charmaps/windows-1250.h deleted file mode 100644 index 8e4723e48d..0000000000 --- a/package/libs/libiconv/src/include/charmaps/windows-1250.h +++ /dev/null @@ -1,24 +0,0 @@ -static const unsigned char map_windows_1250[] = { - 0x00, 0x00, 0x00, 0x00, 0x20, 0xac, 0xff, 0xff, 0x20, 0x1a, 0xff, 0xff, - 0x20, 0x1e, 0x20, 0x26, 0x20, 0x20, 0x20, 0x21, 0xff, 0xff, 0x20, 0x30, - 0x01, 0x60, 0x20, 0x39, 0x01, 0x5a, 0x01, 0x64, 0x01, 0x7d, 0x01, 0x79, - 0xff, 0xff, 0x20, 0x18, 0x20, 0x19, 0x20, 0x1c, 0x20, 0x1d, 0x20, 0x22, - 0x20, 0x13, 0x20, 0x14, 0xff, 0xff, 0x21, 0x22, 0x01, 0x61, 0x20, 0x3a, - 0x01, 0x5b, 0x01, 0x65, 0x01, 0x7e, 0x01, 0x7a, 0x00, 0xa0, 0x02, 0xc7, - 0x02, 0xd8, 0x01, 0x41, 0x00, 0xa4, 0x01, 0x04, 0x00, 0xa6, 0x00, 0xa7, - 0x00, 0xa8, 0x00, 0xa9, 0x01, 0x5e, 0x00, 0xab, 0x00, 0xac, 0x00, 0xad, - 0x00, 0xae, 0x01, 0x7b, 0x00, 0xb0, 0x00, 0xb1, 0x02, 0xdb, 0x01, 0x42, - 0x00, 0xb4, 0x00, 0xb5, 0x00, 0xb6, 0x00, 0xb7, 0x00, 0xb8, 0x01, 0x05, - 0x01, 0x5f, 0x00, 0xbb, 0x01, 0x3d, 0x02, 0xdd, 0x01, 0x3e, 0x01, 0x7c, - 0x01, 0x54, 0x00, 0xc1, 0x00, 0xc2, 0x01, 0x02, 0x00, 0xc4, 0x01, 0x39, - 0x01, 0x06, 0x00, 0xc7, 0x01, 0x0c, 0x00, 0xc9, 0x01, 0x18, 0x00, 0xcb, - 0x01, 0x1a, 0x00, 0xcd, 0x00, 0xce, 0x01, 0x0e, 0x01, 0x10, 0x01, 0x43, - 0x01, 0x47, 0x00, 0xd3, 0x00, 0xd4, 0x01, 0x50, 0x00, 0xd6, 0x00, 0xd7, - 0x01, 0x58, 0x01, 0x6e, 0x00, 0xda, 0x01, 0x70, 0x00, 0xdc, 0x00, 0xdd, - 0x01, 0x62, 0x00, 0xdf, 0x01, 0x55, 0x00, 0xe1, 0x00, 0xe2, 0x01, 0x03, - 0x00, 0xe4, 0x01, 0x3a, 0x01, 0x07, 0x00, 0xe7, 0x01, 0x0d, 0x00, 0xe9, - 0x01, 0x19, 0x00, 0xeb, 0x01, 0x1b, 0x00, 0xed, 0x00, 0xee, 0x01, 0x0f, - 0x01, 0x11, 0x01, 0x44, 0x01, 0x48, 0x00, 0xf3, 0x00, 0xf4, 0x01, 0x51, - 0x00, 0xf6, 0x00, 0xf7, 0x01, 0x59, 0x01, 0x6f, 0x00, 0xfa, 0x01, 0x71, - 0x00, 0xfc, 0x00, 0xfd, 0x01, 0x63, 0x02, 0xd9 -}; diff --git a/package/libs/libiconv/src/include/charmaps/windows-1251.h b/package/libs/libiconv/src/include/charmaps/windows-1251.h deleted file mode 100644 index e278850727..0000000000 --- a/package/libs/libiconv/src/include/charmaps/windows-1251.h +++ /dev/null @@ -1,24 +0,0 @@ -static const unsigned char map_windows_1251[] = { - 0x00, 0x00, 0x00, 0x00, 0x04, 0x02, 0x04, 0x03, 0x20, 0x1a, 0x04, 0x53, - 0x20, 0x1e, 0x20, 0x26, 0x20, 0x20, 0x20, 0x21, 0x20, 0xac, 0x20, 0x30, - 0x04, 0x09, 0x20, 0x39, 0x04, 0x0a, 0x04, 0x0c, 0x04, 0x0b, 0x04, 0x0f, - 0x04, 0x52, 0x20, 0x18, 0x20, 0x19, 0x20, 0x1c, 0x20, 0x1d, 0x20, 0x22, - 0x20, 0x13, 0x20, 0x14, 0xff, 0xff, 0x21, 0x22, 0x04, 0x59, 0x20, 0x3a, - 0x04, 0x5a, 0x04, 0x5c, 0x04, 0x5b, 0x04, 0x5f, 0x00, 0xa0, 0x04, 0x0e, - 0x04, 0x5e, 0x04, 0x08, 0x00, 0xa4, 0x04, 0x90, 0x00, 0xa6, 0x00, 0xa7, - 0x04, 0x01, 0x00, 0xa9, 0x04, 0x04, 0x00, 0xab, 0x00, 0xac, 0x00, 0xad, - 0x00, 0xae, 0x04, 0x07, 0x00, 0xb0, 0x00, 0xb1, 0x04, 0x06, 0x04, 0x56, - 0x04, 0x91, 0x00, 0xb5, 0x00, 0xb6, 0x00, 0xb7, 0x04, 0x51, 0x21, 0x16, - 0x04, 0x54, 0x00, 0xbb, 0x04, 0x58, 0x04, 0x05, 0x04, 0x55, 0x04, 0x57, - 0x04, 0x10, 0x04, 0x11, 0x04, 0x12, 0x04, 0x13, 0x04, 0x14, 0x04, 0x15, - 0x04, 0x16, 0x04, 0x17, 0x04, 0x18, 0x04, 0x19, 0x04, 0x1a, 0x04, 0x1b, - 0x04, 0x1c, 0x04, 0x1d, 0x04, 0x1e, 0x04, 0x1f, 0x04, 0x20, 0x04, 0x21, - 0x04, 0x22, 0x04, 0x23, 0x04, 0x24, 0x04, 0x25, 0x04, 0x26, 0x04, 0x27, - 0x04, 0x28, 0x04, 0x29, 0x04, 0x2a, 0x04, 0x2b, 0x04, 0x2c, 0x04, 0x2d, - 0x04, 0x2e, 0x04, 0x2f, 0x04, 0x30, 0x04, 0x31, 0x04, 0x32, 0x04, 0x33, - 0x04, 0x34, 0x04, 0x35, 0x04, 0x36, 0x04, 0x37, 0x04, 0x38, 0x04, 0x39, - 0x04, 0x3a, 0x04, 0x3b, 0x04, 0x3c, 0x04, 0x3d, 0x04, 0x3e, 0x04, 0x3f, - 0x04, 0x40, 0x04, 0x41, 0x04, 0x42, 0x04, 0x43, 0x04, 0x44, 0x04, 0x45, - 0x04, 0x46, 0x04, 0x47, 0x04, 0x48, 0x04, 0x49, 0x04, 0x4a, 0x04, 0x4b, - 0x04, 0x4c, 0x04, 0x4d, 0x04, 0x4e, 0x04, 0x4f -}; diff --git a/package/libs/libiconv/src/include/charmaps/windows-1252.h b/package/libs/libiconv/src/include/charmaps/windows-1252.h deleted file mode 100644 index a6dad8a05a..0000000000 --- a/package/libs/libiconv/src/include/charmaps/windows-1252.h +++ /dev/null @@ -1,25 +0,0 @@ -static const unsigned char map_windows_1252[] = { - 0x00, 0x00, 0x00, 0x00, 0x20, 0xac, 0xff, 0xff, 0x20, 0x1a, 0x01, 0x92, - 0x20, 0x1e, 0x20, 0x26, 0x20, 0x20, 0x20, 0x21, 0x02, 0xc6, 0x20, 0x30, - 0x01, 0x60, 0x20, 0x39, 0x01, 0x52, 0xff, 0xff, 0x01, 0x7d, 0xff, 0xff, - 0xff, 0xff, 0x20, 0x18, 0x20, 0x19, 0x20, 0x1c, 0x20, 0x1d, 0x20, 0x22, - 0x20, 0x13, 0x20, 0x14, 0x02, 0xdc, 0x21, 0x22, 0x01, 0x61, 0x20, 0x3a, - 0x01, 0x53, 0xff, 0xff, 0x01, 0x7e, 0x01, 0x78, 0x00, 0xa0, 0x00, 0xa1, - 0x00, 0xa2, 0x00, 0xa3, 0x00, 0xa4, 0x00, 0xa5, 0x00, 0xa6, 0x00, 0xa7, - 0x00, 0xa8, 0x00, 0xa9, 0x00, 0xaa, 0x00, 0xab, 0x00, 0xac, 0x00, 0xad, - 0x00, 0xae, 0x00, 0xaf, 0x00, 0xb0, 0x00, 0xb1, 0x00, 0xb2, 0x00, 0xb3, - 0x00, 0xb4, 0x00, 0xb5, 0x00, 0xb6, 0x00, 0xb7, 0x00, 0xb8, 0x00, 0xb9, - 0x00, 0xba, 0x00, 0xbb, 0x00, 0xbc, 0x00, 0xbd, 0x00, 0xbe, 0x00, 0xbf, - 0x00, 0xc0, 0x00, 0xc1, 0x00, 0xc2, 0x00, 0xc3, 0x00, 0xc4, 0x00, 0xc5, - 0x00, 0xc6, 0x00, 0xc7, 0x00, 0xc8, 0x00, 0xc9, 0x00, 0xca, 0x00, 0xcb, - 0x00, 0xcc, 0x00, 0xcd, 0x00, 0xce, 0x00, 0xcf, 0x00, 0xd0, 0x00, 0xd1, - 0x00, 0xd2, 0x00, 0xd3, 0x00, 0xd4, 0x00, 0xd5, 0x00, 0xd6, 0x00, 0xd7, - 0x00, 0xd8, 0x00, 0xd9, 0x00, 0xda, 0x00, 0xdb, 0x00, 0xdc, 0x00, 0xdd, - 0x00, 0xde, 0x00, 0xdf, 0x00, 0xe0, 0x00, 0xe1, 0x00, 0xe2, 0x00, 0xe3, - 0x00, 0xe4, 0x00, 0xe5, 0x00, 0xe6, 0x00, 0xe7, 0x00, 0xe8, 0x00, 0xe9, - 0x00, 0xea, 0x00, 0xeb, 0x00, 0xec, 0x00, 0xed, 0x00, 0xee, 0x00, 0xef, - 0x00, 0xf0, 0x00, 0xf1, 0x00, 0xf2, 0x00, 0xf3, 0x00, 0xf4, 0x00, 0xf5, - 0x00, 0xf6, 0x00, 0xf7, 0x00, 0xf8, 0x00, 0xf9, 0x00, 0xfa, 0x00, 0xfb, - 0x00, 0xfc, 0x00, 0xfd, 0x00, 0xfe, 0x00, 0xff -}; - diff --git a/package/libs/libiconv/src/include/charmaps/windows-1253.h b/package/libs/libiconv/src/include/charmaps/windows-1253.h deleted file mode 100644 index b0bdf1eb36..0000000000 --- a/package/libs/libiconv/src/include/charmaps/windows-1253.h +++ /dev/null @@ -1,24 +0,0 @@ -static const unsigned char map_windows_1253[] = { - 0x00, 0x00, 0x00, 0x00, 0x20, 0xac, 0xff, 0xff, 0x20, 0x1a, 0x01, 0x92, - 0x20, 0x1e, 0x20, 0x26, 0x20, 0x20, 0x20, 0x21, 0xff, 0xff, 0x20, 0x30, - 0xff, 0xff, 0x20, 0x39, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0x20, 0x18, 0x20, 0x19, 0x20, 0x1c, 0x20, 0x1d, 0x20, 0x22, - 0x20, 0x13, 0x20, 0x14, 0xff, 0xff, 0x21, 0x22, 0xff, 0xff, 0x20, 0x3a, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x00, 0xa0, 0x03, 0x85, - 0x03, 0x86, 0x00, 0xa3, 0x00, 0xa4, 0x00, 0xa5, 0x00, 0xa6, 0x00, 0xa7, - 0x00, 0xa8, 0x00, 0xa9, 0xff, 0xff, 0x00, 0xab, 0x00, 0xac, 0x00, 0xad, - 0x00, 0xae, 0x20, 0x15, 0x00, 0xb0, 0x00, 0xb1, 0x00, 0xb2, 0x00, 0xb3, - 0x03, 0x84, 0x00, 0xb5, 0x00, 0xb6, 0x00, 0xb7, 0x03, 0x88, 0x03, 0x89, - 0x03, 0x8a, 0x00, 0xbb, 0x03, 0x8c, 0x00, 0xbd, 0x03, 0x8e, 0x03, 0x8f, - 0x03, 0x90, 0x03, 0x91, 0x03, 0x92, 0x03, 0x93, 0x03, 0x94, 0x03, 0x95, - 0x03, 0x96, 0x03, 0x97, 0x03, 0x98, 0x03, 0x99, 0x03, 0x9a, 0x03, 0x9b, - 0x03, 0x9c, 0x03, 0x9d, 0x03, 0x9e, 0x03, 0x9f, 0x03, 0xa0, 0x03, 0xa1, - 0xff, 0xff, 0x03, 0xa3, 0x03, 0xa4, 0x03, 0xa5, 0x03, 0xa6, 0x03, 0xa7, - 0x03, 0xa8, 0x03, 0xa9, 0x03, 0xaa, 0x03, 0xab, 0x03, 0xac, 0x03, 0xad, - 0x03, 0xae, 0x03, 0xaf, 0x03, 0xb0, 0x03, 0xb1, 0x03, 0xb2, 0x03, 0xb3, - 0x03, 0xb4, 0x03, 0xb5, 0x03, 0xb6, 0x03, 0xb7, 0x03, 0xb8, 0x03, 0xb9, - 0x03, 0xba, 0x03, 0xbb, 0x03, 0xbc, 0x03, 0xbd, 0x03, 0xbe, 0x03, 0xbf, - 0x03, 0xc0, 0x03, 0xc1, 0x03, 0xc2, 0x03, 0xc3, 0x03, 0xc4, 0x03, 0xc5, - 0x03, 0xc6, 0x03, 0xc7, 0x03, 0xc8, 0x03, 0xc9, 0x03, 0xca, 0x03, 0xcb, - 0x03, 0xcc, 0x03, 0xcd, 0x03, 0xce, 0xff, 0xff -}; diff --git a/package/libs/libiconv/src/include/charmaps/windows-1254.h b/package/libs/libiconv/src/include/charmaps/windows-1254.h deleted file mode 100644 index be22600797..0000000000 --- a/package/libs/libiconv/src/include/charmaps/windows-1254.h +++ /dev/null @@ -1,24 +0,0 @@ -static const unsigned char map_windows_1254[] = { - 0x00, 0x00, 0x00, 0x00, 0x20, 0xac, 0xff, 0xff, 0x20, 0x1a, 0x01, 0x92, - 0x20, 0x1e, 0x20, 0x26, 0x20, 0x20, 0x20, 0x21, 0x02, 0xc6, 0x20, 0x30, - 0x01, 0x60, 0x20, 0x39, 0x01, 0x52, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0x20, 0x18, 0x20, 0x19, 0x20, 0x1c, 0x20, 0x1d, 0x20, 0x22, - 0x20, 0x13, 0x20, 0x14, 0x02, 0xdc, 0x21, 0x22, 0x01, 0x61, 0x20, 0x3a, - 0x01, 0x53, 0xff, 0xff, 0xff, 0xff, 0x01, 0x78, 0x00, 0xa0, 0x00, 0xa1, - 0x00, 0xa2, 0x00, 0xa3, 0x00, 0xa4, 0x00, 0xa5, 0x00, 0xa6, 0x00, 0xa7, - 0x00, 0xa8, 0x00, 0xa9, 0x00, 0xaa, 0x00, 0xab, 0x00, 0xac, 0x00, 0xad, - 0x00, 0xae, 0x00, 0xaf, 0x00, 0xb0, 0x00, 0xb1, 0x00, 0xb2, 0x00, 0xb3, - 0x00, 0xb4, 0x00, 0xb5, 0x00, 0xb6, 0x00, 0xb7, 0x00, 0xb8, 0x00, 0xb9, - 0x00, 0xba, 0x00, 0xbb, 0x00, 0xbc, 0x00, 0xbd, 0x00, 0xbe, 0x00, 0xbf, - 0x00, 0xc0, 0x00, 0xc1, 0x00, 0xc2, 0x00, 0xc3, 0x00, 0xc4, 0x00, 0xc5, - 0x00, 0xc6, 0x00, 0xc7, 0x00, 0xc8, 0x00, 0xc9, 0x00, 0xca, 0x00, 0xcb, - 0x00, 0xcc, 0x00, 0xcd, 0x00, 0xce, 0x00, 0xcf, 0x01, 0x1e, 0x00, 0xd1, - 0x00, 0xd2, 0x00, 0xd3, 0x00, 0xd4, 0x00, 0xd5, 0x00, 0xd6, 0x00, 0xd7, - 0x00, 0xd8, 0x00, 0xd9, 0x00, 0xda, 0x00, 0xdb, 0x00, 0xdc, 0x01, 0x30, - 0x01, 0x5e, 0x00, 0xdf, 0x00, 0xe0, 0x00, 0xe1, 0x00, 0xe2, 0x00, 0xe3, - 0x00, 0xe4, 0x00, 0xe5, 0x00, 0xe6, 0x00, 0xe7, 0x00, 0xe8, 0x00, 0xe9, - 0x00, 0xea, 0x00, 0xeb, 0x00, 0xec, 0x00, 0xed, 0x00, 0xee, 0x00, 0xef, - 0x01, 0x1f, 0x00, 0xf1, 0x00, 0xf2, 0x00, 0xf3, 0x00, 0xf4, 0x00, 0xf5, - 0x00, 0xf6, 0x00, 0xf7, 0x00, 0xf8, 0x00, 0xf9, 0x00, 0xfa, 0x00, 0xfb, - 0x00, 0xfc, 0x01, 0x31, 0x01, 0x5f, 0x00, 0xff -}; diff --git a/package/libs/libiconv/src/include/charmaps/windows-1255.h b/package/libs/libiconv/src/include/charmaps/windows-1255.h deleted file mode 100644 index 28bf513d46..0000000000 --- a/package/libs/libiconv/src/include/charmaps/windows-1255.h +++ /dev/null @@ -1,24 +0,0 @@ -static const unsigned char map_windows_1255[] = { - 0x00, 0x00, 0x00, 0x00, 0x20, 0xac, 0xff, 0xff, 0x20, 0x1a, 0x01, 0x92, - 0x20, 0x1e, 0x20, 0x26, 0x20, 0x20, 0x20, 0x21, 0x02, 0xc6, 0x20, 0x30, - 0xff, 0xff, 0x20, 0x39, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0x20, 0x18, 0x20, 0x19, 0x20, 0x1c, 0x20, 0x1d, 0x20, 0x22, - 0x20, 0x13, 0x20, 0x14, 0x02, 0xdc, 0x21, 0x22, 0xff, 0xff, 0x20, 0x3a, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x00, 0xa0, 0x00, 0xa1, - 0x00, 0xa2, 0x00, 0xa3, 0x20, 0xaa, 0x00, 0xa5, 0x00, 0xa6, 0x00, 0xa7, - 0x00, 0xa8, 0x00, 0xa9, 0x00, 0xd7, 0x00, 0xab, 0x00, 0xac, 0x00, 0xad, - 0x00, 0xae, 0x00, 0xaf, 0x00, 0xb0, 0x00, 0xb1, 0x00, 0xb2, 0x00, 0xb3, - 0x00, 0xb4, 0x00, 0xb5, 0x00, 0xb6, 0x00, 0xb7, 0x00, 0xb8, 0x00, 0xb9, - 0x00, 0xf7, 0x00, 0xbb, 0x00, 0xbc, 0x00, 0xbd, 0x00, 0xbe, 0x00, 0xbf, - 0x05, 0xb0, 0x05, 0xb1, 0x05, 0xb2, 0x05, 0xb3, 0x05, 0xb4, 0x05, 0xb5, - 0x05, 0xb6, 0x05, 0xb7, 0x05, 0xb8, 0x05, 0xb9, 0xff, 0xff, 0x05, 0xbb, - 0x05, 0xbc, 0x05, 0xbd, 0x05, 0xbe, 0x05, 0xbf, 0x05, 0xc0, 0x05, 0xc1, - 0x05, 0xc2, 0x05, 0xc3, 0x05, 0xf0, 0x05, 0xf1, 0x05, 0xf2, 0x05, 0xf3, - 0x05, 0xf4, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0x05, 0xd0, 0x05, 0xd1, 0x05, 0xd2, 0x05, 0xd3, - 0x05, 0xd4, 0x05, 0xd5, 0x05, 0xd6, 0x05, 0xd7, 0x05, 0xd8, 0x05, 0xd9, - 0x05, 0xda, 0x05, 0xdb, 0x05, 0xdc, 0x05, 0xdd, 0x05, 0xde, 0x05, 0xdf, - 0x05, 0xe0, 0x05, 0xe1, 0x05, 0xe2, 0x05, 0xe3, 0x05, 0xe4, 0x05, 0xe5, - 0x05, 0xe6, 0x05, 0xe7, 0x05, 0xe8, 0x05, 0xe9, 0x05, 0xea, 0xff, 0xff, - 0xff, 0xff, 0x20, 0x0e, 0x20, 0x0f, 0xff, 0xff -}; diff --git a/package/libs/libiconv/src/include/charmaps/windows-1256.h b/package/libs/libiconv/src/include/charmaps/windows-1256.h deleted file mode 100644 index fbca315eff..0000000000 --- a/package/libs/libiconv/src/include/charmaps/windows-1256.h +++ /dev/null @@ -1,24 +0,0 @@ -static const unsigned char map_windows_1256[] = { - 0x00, 0x00, 0x00, 0x00, 0x20, 0xac, 0x06, 0x7e, 0x20, 0x1a, 0x01, 0x92, - 0x20, 0x1e, 0x20, 0x26, 0x20, 0x20, 0x20, 0x21, 0x02, 0xc6, 0x20, 0x30, - 0x06, 0x79, 0x20, 0x39, 0x01, 0x52, 0x06, 0x86, 0x06, 0x98, 0x06, 0x88, - 0x06, 0xaf, 0x20, 0x18, 0x20, 0x19, 0x20, 0x1c, 0x20, 0x1d, 0x20, 0x22, - 0x20, 0x13, 0x20, 0x14, 0x06, 0xa9, 0x21, 0x22, 0x06, 0x91, 0x20, 0x3a, - 0x01, 0x53, 0x20, 0x0c, 0x20, 0x0d, 0x06, 0xba, 0x00, 0xa0, 0x06, 0x0c, - 0x00, 0xa2, 0x00, 0xa3, 0x00, 0xa4, 0x00, 0xa5, 0x00, 0xa6, 0x00, 0xa7, - 0x00, 0xa8, 0x00, 0xa9, 0x06, 0xbe, 0x00, 0xab, 0x00, 0xac, 0x00, 0xad, - 0x00, 0xae, 0x00, 0xaf, 0x00, 0xb0, 0x00, 0xb1, 0x00, 0xb2, 0x00, 0xb3, - 0x00, 0xb4, 0x00, 0xb5, 0x00, 0xb6, 0x00, 0xb7, 0x00, 0xb8, 0x00, 0xb9, - 0x06, 0x1b, 0x00, 0xbb, 0x00, 0xbc, 0x00, 0xbd, 0x00, 0xbe, 0x06, 0x1f, - 0x06, 0xc1, 0x06, 0x21, 0x06, 0x22, 0x06, 0x23, 0x06, 0x24, 0x06, 0x25, - 0x06, 0x26, 0x06, 0x27, 0x06, 0x28, 0x06, 0x29, 0x06, 0x2a, 0x06, 0x2b, - 0x06, 0x2c, 0x06, 0x2d, 0x06, 0x2e, 0x06, 0x2f, 0x06, 0x30, 0x06, 0x31, - 0x06, 0x32, 0x06, 0x33, 0x06, 0x34, 0x06, 0x35, 0x06, 0x36, 0x00, 0xd7, - 0x06, 0x37, 0x06, 0x38, 0x06, 0x39, 0x06, 0x3a, 0x06, 0x40, 0x06, 0x41, - 0x06, 0x42, 0x06, 0x43, 0x00, 0xe0, 0x06, 0x44, 0x00, 0xe2, 0x06, 0x45, - 0x06, 0x46, 0x06, 0x47, 0x06, 0x48, 0x00, 0xe7, 0x00, 0xe8, 0x00, 0xe9, - 0x00, 0xea, 0x00, 0xeb, 0x06, 0x49, 0x06, 0x4a, 0x00, 0xee, 0x00, 0xef, - 0x06, 0x4b, 0x06, 0x4c, 0x06, 0x4d, 0x06, 0x4e, 0x00, 0xf4, 0x06, 0x4f, - 0x06, 0x50, 0x00, 0xf7, 0x06, 0x51, 0x00, 0xf9, 0x06, 0x52, 0x00, 0xfb, - 0x00, 0xfc, 0x20, 0x0e, 0x20, 0x0f, 0x06, 0xd2 -}; diff --git a/package/libs/libiconv/src/include/charmaps/windows-1257.h b/package/libs/libiconv/src/include/charmaps/windows-1257.h deleted file mode 100644 index 69d4474bc2..0000000000 --- a/package/libs/libiconv/src/include/charmaps/windows-1257.h +++ /dev/null @@ -1,24 +0,0 @@ -static const unsigned char map_windows_1257[] = { - 0x00, 0x00, 0x00, 0x00, 0x20, 0xac, 0xff, 0xff, 0x20, 0x1a, 0xff, 0xff, - 0x20, 0x1e, 0x20, 0x26, 0x20, 0x20, 0x20, 0x21, 0xff, 0xff, 0x20, 0x30, - 0xff, 0xff, 0x20, 0x39, 0xff, 0xff, 0x00, 0xa8, 0x02, 0xc7, 0x00, 0xb8, - 0xff, 0xff, 0x20, 0x18, 0x20, 0x19, 0x20, 0x1c, 0x20, 0x1d, 0x20, 0x22, - 0x20, 0x13, 0x20, 0x14, 0xff, 0xff, 0x21, 0x22, 0xff, 0xff, 0x20, 0x3a, - 0xff, 0xff, 0x00, 0xaf, 0x02, 0xdb, 0xff, 0xff, 0x00, 0xa0, 0xff, 0xff, - 0x00, 0xa2, 0x00, 0xa3, 0x00, 0xa4, 0xff, 0xff, 0x00, 0xa6, 0x00, 0xa7, - 0x00, 0xd8, 0x00, 0xa9, 0x01, 0x56, 0x00, 0xab, 0x00, 0xac, 0x00, 0xad, - 0x00, 0xae, 0x00, 0xc6, 0x00, 0xb0, 0x00, 0xb1, 0x00, 0xb2, 0x00, 0xb3, - 0x00, 0xb4, 0x00, 0xb5, 0x00, 0xb6, 0x00, 0xb7, 0x00, 0xf8, 0x00, 0xb9, - 0x01, 0x57, 0x00, 0xbb, 0x00, 0xbc, 0x00, 0xbd, 0x00, 0xbe, 0x00, 0xe6, - 0x01, 0x04, 0x01, 0x2e, 0x01, 0x00, 0x01, 0x06, 0x00, 0xc4, 0x00, 0xc5, - 0x01, 0x18, 0x01, 0x12, 0x01, 0x0c, 0x00, 0xc9, 0x01, 0x79, 0x01, 0x16, - 0x01, 0x22, 0x01, 0x36, 0x01, 0x2a, 0x01, 0x3b, 0x01, 0x60, 0x01, 0x43, - 0x01, 0x45, 0x00, 0xd3, 0x01, 0x4c, 0x00, 0xd5, 0x00, 0xd6, 0x00, 0xd7, - 0x01, 0x72, 0x01, 0x41, 0x01, 0x5a, 0x01, 0x6a, 0x00, 0xdc, 0x01, 0x7b, - 0x01, 0x7d, 0x00, 0xdf, 0x01, 0x05, 0x01, 0x2f, 0x01, 0x01, 0x01, 0x07, - 0x00, 0xe4, 0x00, 0xe5, 0x01, 0x19, 0x01, 0x13, 0x01, 0x0d, 0x00, 0xe9, - 0x01, 0x7a, 0x01, 0x17, 0x01, 0x23, 0x01, 0x37, 0x01, 0x2b, 0x01, 0x3c, - 0x01, 0x61, 0x01, 0x44, 0x01, 0x46, 0x00, 0xf3, 0x01, 0x4d, 0x00, 0xf5, - 0x00, 0xf6, 0x00, 0xf7, 0x01, 0x73, 0x01, 0x42, 0x01, 0x5b, 0x01, 0x6b, - 0x00, 0xfc, 0x01, 0x7c, 0x01, 0x7e, 0x02, 0xd9 -}; diff --git a/package/libs/libiconv/src/include/charmaps/windows-1258.h b/package/libs/libiconv/src/include/charmaps/windows-1258.h deleted file mode 100644 index 5bbd737aec..0000000000 --- a/package/libs/libiconv/src/include/charmaps/windows-1258.h +++ /dev/null @@ -1,24 +0,0 @@ -static const unsigned char map_windows_1258[] = { - 0x00, 0x00, 0x00, 0x00, 0x20, 0xac, 0xff, 0xff, 0x20, 0x1a, 0x01, 0x92, - 0x20, 0x1e, 0x20, 0x26, 0x20, 0x20, 0x20, 0x21, 0x02, 0xc6, 0x20, 0x30, - 0xff, 0xff, 0x20, 0x39, 0x01, 0x52, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0x20, 0x18, 0x20, 0x19, 0x20, 0x1c, 0x20, 0x1d, 0x20, 0x22, - 0x20, 0x13, 0x20, 0x14, 0x02, 0xdc, 0x21, 0x22, 0xff, 0xff, 0x20, 0x3a, - 0x01, 0x53, 0xff, 0xff, 0xff, 0xff, 0x01, 0x78, 0x00, 0xa0, 0x00, 0xa1, - 0x00, 0xa2, 0x00, 0xa3, 0x00, 0xa4, 0x00, 0xa5, 0x00, 0xa6, 0x00, 0xa7, - 0x00, 0xa8, 0x00, 0xa9, 0x00, 0xaa, 0x00, 0xab, 0x00, 0xac, 0x00, 0xad, - 0x00, 0xae, 0x00, 0xaf, 0x00, 0xb0, 0x00, 0xb1, 0x00, 0xb2, 0x00, 0xb3, - 0x00, 0xb4, 0x00, 0xb5, 0x00, 0xb6, 0x00, 0xb7, 0x00, 0xb8, 0x00, 0xb9, - 0x00, 0xba, 0x00, 0xbb, 0x00, 0xbc, 0x00, 0xbd, 0x00, 0xbe, 0x00, 0xbf, - 0x00, 0xc0, 0x00, 0xc1, 0x00, 0xc2, 0x01, 0x02, 0x00, 0xc4, 0x00, 0xc5, - 0x00, 0xc6, 0x00, 0xc7, 0x00, 0xc8, 0x00, 0xc9, 0x00, 0xca, 0x00, 0xcb, - 0x03, 0x00, 0x00, 0xcd, 0x00, 0xce, 0x00, 0xcf, 0x01, 0x10, 0x00, 0xd1, - 0x03, 0x09, 0x00, 0xd3, 0x00, 0xd4, 0x01, 0xa0, 0x00, 0xd6, 0x00, 0xd7, - 0x00, 0xd8, 0x00, 0xd9, 0x00, 0xda, 0x00, 0xdb, 0x00, 0xdc, 0x01, 0xaf, - 0x03, 0x03, 0x00, 0xdf, 0x00, 0xe0, 0x00, 0xe1, 0x00, 0xe2, 0x01, 0x03, - 0x00, 0xe4, 0x00, 0xe5, 0x00, 0xe6, 0x00, 0xe7, 0x00, 0xe8, 0x00, 0xe9, - 0x00, 0xea, 0x00, 0xeb, 0x03, 0x01, 0x00, 0xed, 0x00, 0xee, 0x00, 0xef, - 0x01, 0x11, 0x00, 0xf1, 0x03, 0x23, 0x00, 0xf3, 0x00, 0xf4, 0x01, 0xa1, - 0x00, 0xf6, 0x00, 0xf7, 0x00, 0xf8, 0x00, 0xf9, 0x00, 0xfa, 0x00, 0xfb, - 0x00, 0xfc, 0x01, 0xb0, 0x20, 0xab, 0x00, 0xff -}; diff --git a/package/libs/libiconv/src/include/charmaps/windows-874.h b/package/libs/libiconv/src/include/charmaps/windows-874.h deleted file mode 100644 index 5749280a5e..0000000000 --- a/package/libs/libiconv/src/include/charmaps/windows-874.h +++ /dev/null @@ -1,24 +0,0 @@ -static const unsigned char map_windows_874[] = { - 0x00, 0x00, 0x00, 0x00, 0x20, 0xac, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0x20, 0x26, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0x20, 0x18, 0x20, 0x19, 0x20, 0x1c, 0x20, 0x1d, 0x20, 0x22, - 0x20, 0x13, 0x20, 0x14, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x00, 0xa0, 0x0e, 0x01, - 0x0e, 0x02, 0x0e, 0x03, 0x0e, 0x04, 0x0e, 0x05, 0x0e, 0x06, 0x0e, 0x07, - 0x0e, 0x08, 0x0e, 0x09, 0x0e, 0x0a, 0x0e, 0x0b, 0x0e, 0x0c, 0x0e, 0x0d, - 0x0e, 0x0e, 0x0e, 0x0f, 0x0e, 0x10, 0x0e, 0x11, 0x0e, 0x12, 0x0e, 0x13, - 0x0e, 0x14, 0x0e, 0x15, 0x0e, 0x16, 0x0e, 0x17, 0x0e, 0x18, 0x0e, 0x19, - 0x0e, 0x1a, 0x0e, 0x1b, 0x0e, 0x1c, 0x0e, 0x1d, 0x0e, 0x1e, 0x0e, 0x1f, - 0x0e, 0x20, 0x0e, 0x21, 0x0e, 0x22, 0x0e, 0x23, 0x0e, 0x24, 0x0e, 0x25, - 0x0e, 0x26, 0x0e, 0x27, 0x0e, 0x28, 0x0e, 0x29, 0x0e, 0x2a, 0x0e, 0x2b, - 0x0e, 0x2c, 0x0e, 0x2d, 0x0e, 0x2e, 0x0e, 0x2f, 0x0e, 0x30, 0x0e, 0x31, - 0x0e, 0x32, 0x0e, 0x33, 0x0e, 0x34, 0x0e, 0x35, 0x0e, 0x36, 0x0e, 0x37, - 0x0e, 0x38, 0x0e, 0x39, 0x0e, 0x3a, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0x0e, 0x3f, 0x0e, 0x40, 0x0e, 0x41, 0x0e, 0x42, 0x0e, 0x43, - 0x0e, 0x44, 0x0e, 0x45, 0x0e, 0x46, 0x0e, 0x47, 0x0e, 0x48, 0x0e, 0x49, - 0x0e, 0x4a, 0x0e, 0x4b, 0x0e, 0x4c, 0x0e, 0x4d, 0x0e, 0x4e, 0x0e, 0x4f, - 0x0e, 0x50, 0x0e, 0x51, 0x0e, 0x52, 0x0e, 0x53, 0x0e, 0x54, 0x0e, 0x55, - 0x0e, 0x56, 0x0e, 0x57, 0x0e, 0x58, 0x0e, 0x59, 0x0e, 0x5a, 0x0e, 0x5b, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff -}; diff --git a/package/libs/libiconv/src/include/iconv.h b/package/libs/libiconv/src/include/iconv.h deleted file mode 100644 index 8767be42ee..0000000000 --- a/package/libs/libiconv/src/include/iconv.h +++ /dev/null @@ -1,36 +0,0 @@ -#ifndef _LIBICONV_H -#define _LIBICONV_H 1 - -#define _LIBICONV_VERSION 0x010B /* version number: (major<<8) + minor */ - -#include - -#ifdef __cplusplus -extern "C" { -#endif - -extern int _libiconv_version; /* Likewise */ - -typedef long iconv_t; - -#define iconv_open libiconv_open -#define iconv libiconv -#define iconv_close libiconv_close - -extern iconv_t -iconv_open(const char *tocode, const char *fromcode); - -extern size_t -iconv(iconv_t cd, char **inbuf, size_t *inbytesleft, - char **outbuf, size_t *outbytesleft); - -extern int -iconv_close(iconv_t cd); - -#define libiconv_set_relocation_prefix(...) do {} while(0) - -#ifdef __cplusplus -} -#endif - -#endif /* _LIBICONV_H */ diff --git a/package/libs/libiconv/src/m4/iconv.m4 b/package/libs/libiconv/src/m4/iconv.m4 deleted file mode 100644 index e2041b9b49..0000000000 --- a/package/libs/libiconv/src/m4/iconv.m4 +++ /dev/null @@ -1,214 +0,0 @@ -# iconv.m4 serial 11 (gettext-0.18.1) -dnl Copyright (C) 2000-2002, 2007-2010 Free Software Foundation, Inc. -dnl This file is free software; the Free Software Foundation -dnl gives unlimited permission to copy and/or distribute it, -dnl with or without modifications, as long as this notice is preserved. - -dnl From Bruno Haible. - -AC_DEFUN([AM_ICONV_LINKFLAGS_BODY], -[ - dnl Prerequisites of AC_LIB_LINKFLAGS_BODY. - AC_REQUIRE([AC_LIB_PREPARE_PREFIX]) - AC_REQUIRE([AC_LIB_RPATH]) - - dnl Search for libiconv and define LIBICONV, LTLIBICONV and INCICONV - dnl accordingly. - AC_LIB_LINKFLAGS_BODY([iconv]) -]) - -AC_DEFUN([AM_ICONV_LINK], -[ - dnl Some systems have iconv in libc, some have it in libiconv (OSF/1 and - dnl those with the standalone portable GNU libiconv installed). - AC_REQUIRE([AC_CANONICAL_HOST]) dnl for cross-compiles - - dnl Search for libiconv and define LIBICONV, LTLIBICONV and INCICONV - dnl accordingly. - AC_REQUIRE([AM_ICONV_LINKFLAGS_BODY]) - - dnl Add $INCICONV to CPPFLAGS before performing the following checks, - dnl because if the user has installed libiconv and not disabled its use - dnl via --without-libiconv-prefix, he wants to use it. The first - dnl AC_TRY_LINK will then fail, the second AC_TRY_LINK will succeed. - am_save_CPPFLAGS="$CPPFLAGS" - AC_LIB_APPENDTOVAR([CPPFLAGS], [$INCICONV]) - - AC_CACHE_CHECK([for iconv], [am_cv_func_iconv], [ - am_cv_func_iconv="no, consider installing GNU libiconv" - am_cv_lib_iconv=no - AC_TRY_LINK([#include -#include ], - [iconv_t cd = iconv_open("",""); - iconv(cd,NULL,NULL,NULL,NULL); - iconv_close(cd);], - [am_cv_func_iconv=yes]) - if test "$am_cv_func_iconv" != yes; then - am_save_LIBS="$LIBS" - LIBS="$LIBS $LIBICONV" - AC_TRY_LINK([#include -#include ], - [iconv_t cd = iconv_open("",""); - iconv(cd,NULL,NULL,NULL,NULL); - iconv_close(cd);], - [am_cv_lib_iconv=yes] - [am_cv_func_iconv=yes]) - LIBS="$am_save_LIBS" - fi - ]) - if test "$am_cv_func_iconv" = yes; then - AC_CACHE_CHECK([for working iconv], [am_cv_func_iconv_works], [ - dnl This tests against bugs in AIX 5.1, HP-UX 11.11, Solaris 10. - am_save_LIBS="$LIBS" - if test $am_cv_lib_iconv = yes; then - LIBS="$LIBS $LIBICONV" - fi - AC_TRY_RUN([ -#include -#include -int main () -{ - /* Test against AIX 5.1 bug: Failures are not distinguishable from successful - returns. */ - { - iconv_t cd_utf8_to_88591 = iconv_open ("ISO8859-1", "UTF-8"); - if (cd_utf8_to_88591 != (iconv_t)(-1)) - { - static const char input[] = "\342\202\254"; /* EURO SIGN */ - char buf[10]; - const char *inptr = input; - size_t inbytesleft = strlen (input); - char *outptr = buf; - size_t outbytesleft = sizeof (buf); - size_t res = iconv (cd_utf8_to_88591, - (char **) &inptr, &inbytesleft, - &outptr, &outbytesleft); - if (res == 0) - return 1; - } - } - /* Test against Solaris 10 bug: Failures are not distinguishable from - successful returns. */ - { - iconv_t cd_ascii_to_88591 = iconv_open ("ISO8859-1", "646"); - if (cd_ascii_to_88591 != (iconv_t)(-1)) - { - static const char input[] = "\263"; - char buf[10]; - const char *inptr = input; - size_t inbytesleft = strlen (input); - char *outptr = buf; - size_t outbytesleft = sizeof (buf); - size_t res = iconv (cd_ascii_to_88591, - (char **) &inptr, &inbytesleft, - &outptr, &outbytesleft); - if (res == 0) - return 1; - } - } -#if 0 /* This bug could be worked around by the caller. */ - /* Test against HP-UX 11.11 bug: Positive return value instead of 0. */ - { - iconv_t cd_88591_to_utf8 = iconv_open ("utf8", "iso88591"); - if (cd_88591_to_utf8 != (iconv_t)(-1)) - { - static const char input[] = "\304rger mit b\366sen B\374bchen ohne Augenma\337"; - char buf[50]; - const char *inptr = input; - size_t inbytesleft = strlen (input); - char *outptr = buf; - size_t outbytesleft = sizeof (buf); - size_t res = iconv (cd_88591_to_utf8, - (char **) &inptr, &inbytesleft, - &outptr, &outbytesleft); - if ((int)res > 0) - return 1; - } - } -#endif - /* Test against HP-UX 11.11 bug: No converter from EUC-JP to UTF-8 is - provided. */ - if (/* Try standardized names. */ - iconv_open ("UTF-8", "EUC-JP") == (iconv_t)(-1) - /* Try IRIX, OSF/1 names. */ - && iconv_open ("UTF-8", "eucJP") == (iconv_t)(-1) - /* Try AIX names. */ - && iconv_open ("UTF-8", "IBM-eucJP") == (iconv_t)(-1) - /* Try HP-UX names. */ - && iconv_open ("utf8", "eucJP") == (iconv_t)(-1)) - return 1; - return 0; -}], [am_cv_func_iconv_works=yes], [am_cv_func_iconv_works=no], - [case "$host_os" in - aix* | hpux*) am_cv_func_iconv_works="guessing no" ;; - *) am_cv_func_iconv_works="guessing yes" ;; - esac]) - LIBS="$am_save_LIBS" - ]) - case "$am_cv_func_iconv_works" in - *no) am_func_iconv=no am_cv_lib_iconv=no ;; - *) am_func_iconv=yes ;; - esac - else - am_func_iconv=no am_cv_lib_iconv=no - fi - if test "$am_func_iconv" = yes; then - AC_DEFINE([HAVE_ICONV], [1], - [Define if you have the iconv() function and it works.]) - fi - if test "$am_cv_lib_iconv" = yes; then - AC_MSG_CHECKING([how to link with libiconv]) - AC_MSG_RESULT([$LIBICONV]) - else - dnl If $LIBICONV didn't lead to a usable library, we don't need $INCICONV - dnl either. - CPPFLAGS="$am_save_CPPFLAGS" - LIBICONV= - LTLIBICONV= - fi - AC_SUBST([LIBICONV]) - AC_SUBST([LTLIBICONV]) -]) - -dnl Define AM_ICONV using AC_DEFUN_ONCE for Autoconf >= 2.64, in order to -dnl avoid warnings like -dnl "warning: AC_REQUIRE: `AM_ICONV' was expanded before it was required". -dnl This is tricky because of the way 'aclocal' is implemented: -dnl - It requires defining an auxiliary macro whose name ends in AC_DEFUN. -dnl Otherwise aclocal's initial scan pass would miss the macro definition. -dnl - It requires a line break inside the AC_DEFUN_ONCE and AC_DEFUN expansions. -dnl Otherwise aclocal would emit many "Use of uninitialized value $1" -dnl warnings. -m4_define([gl_iconv_AC_DEFUN], - m4_version_prereq([2.64], - [[AC_DEFUN_ONCE( - [$1], [$2])]], - [[AC_DEFUN( - [$1], [$2])]])) -gl_iconv_AC_DEFUN([AM_ICONV], -[ - AM_ICONV_LINK - if test "$am_cv_func_iconv" = yes; then - AC_MSG_CHECKING([for iconv declaration]) - AC_CACHE_VAL([am_cv_proto_iconv], [ - AC_TRY_COMPILE([ -#include -#include -extern -#ifdef __cplusplus -"C" -#endif -#if defined(__STDC__) || defined(__cplusplus) -size_t iconv (iconv_t cd, char * *inbuf, size_t *inbytesleft, char * *outbuf, size_t *outbytesleft); -#else -size_t iconv(); -#endif -], [], [am_cv_proto_iconv_arg1=""], [am_cv_proto_iconv_arg1="const"]) - am_cv_proto_iconv="extern size_t iconv (iconv_t cd, $am_cv_proto_iconv_arg1 char * *inbuf, size_t *inbytesleft, char * *outbuf, size_t *outbytesleft);"]) - am_cv_proto_iconv=`echo "[$]am_cv_proto_iconv" | tr -s ' ' | sed -e 's/( /(/'` - AC_MSG_RESULT([ - $am_cv_proto_iconv]) - AC_DEFINE_UNQUOTED([ICONV_CONST], [$am_cv_proto_iconv_arg1], - [Define as const if the declaration of iconv() needs const.]) - fi -]) diff --git a/package/libs/wolfssl/Makefile b/package/libs/wolfssl/Makefile index a511837800..55928f1446 100644 --- a/package/libs/wolfssl/Makefile +++ b/package/libs/wolfssl/Makefile @@ -8,12 +8,12 @@ include $(TOPDIR)/rules.mk PKG_NAME:=wolfssl -PKG_VERSION:=5.3.0-stable +PKG_VERSION:=5.4.0-stable PKG_RELEASE:=$(AUTORELEASE) PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.gz PKG_SOURCE_URL:=https://github.com/wolfSSL/wolfssl/archive/v$(PKG_VERSION) -PKG_HASH:=1a3bb310dc01d3e73d9ad91b6ea8249d081016f8eef4ae8f21d3421f91ef1de9 +PKG_HASH:=dc36cc19dad197253e5c2ecaa490c7eef579ad448706e55d73d79396e814098b PKG_FIXUP:=libtool libtool-abiver PKG_INSTALL:=1 diff --git a/package/libs/wolfssl/patches/100-disable-hardening-check.patch b/package/libs/wolfssl/patches/100-disable-hardening-check.patch index 7e473b390b..d3ad2e27bc 100644 --- a/package/libs/wolfssl/patches/100-disable-hardening-check.patch +++ b/package/libs/wolfssl/patches/100-disable-hardening-check.patch @@ -1,6 +1,6 @@ --- a/wolfssl/wolfcrypt/settings.h +++ b/wolfssl/wolfcrypt/settings.h -@@ -2338,7 +2338,7 @@ extern void uITRON4_free(void *p) ; +@@ -2442,7 +2442,7 @@ extern void uITRON4_free(void *p) ; #endif /* warning for not using harden build options (default with ./configure) */ diff --git a/package/libs/wolfssl/patches/200-ecc-rng.patch b/package/libs/wolfssl/patches/200-ecc-rng.patch index f1f156a8ae..2e09e6d273 100644 --- a/package/libs/wolfssl/patches/200-ecc-rng.patch +++ b/package/libs/wolfssl/patches/200-ecc-rng.patch @@ -11,7 +11,7 @@ RNG regardless of the built settings for wolfssl. --- a/wolfcrypt/src/ecc.c +++ b/wolfcrypt/src/ecc.c -@@ -11655,21 +11655,21 @@ void wc_ecc_fp_free(void) +@@ -12288,21 +12288,21 @@ void wc_ecc_fp_free(void) #endif /* FP_ECC */ diff --git a/package/libs/wolfssl/patches/300-AESNI-fix-configure-to-use-minimal-compiler-flags.patch b/package/libs/wolfssl/patches/300-AESNI-fix-configure-to-use-minimal-compiler-flags.patch deleted file mode 100644 index d65a117d1e..0000000000 --- a/package/libs/wolfssl/patches/300-AESNI-fix-configure-to-use-minimal-compiler-flags.patch +++ /dev/null @@ -1,44 +0,0 @@ -From 9ba77300f9f5dea9f53aed00bf6c33d10b7b2fce Mon Sep 17 00:00:00 2001 -From: Sean Parkinson -Date: Thu, 7 Jul 2022 09:30:48 +1000 -Subject: [PATCH] AESNI: fix configure to use minimal compiler flags - - -diff --git a/configure.ac b/configure.ac -index df97ac75c..6abb0c744 100644 ---- a/configure.ac -+++ b/configure.ac -@@ -2142,21 +2142,19 @@ then - if test "$ENABLED_AESNI" = "yes" || test "$ENABLED_INTELASM" = "yes" - then - AM_CFLAGS="$AM_CFLAGS -DWOLFSSL_AESNI" -- if test "$GCC" = "yes" -+ if test "$CC" != "icc" - then -- # clang needs these flags -- if test "$CC" = "clang" -- then -- AM_CFLAGS="$AM_CFLAGS -maes -mpclmul" -- else -- # GCC needs these flags, icc doesn't -- # opt levels greater than 2 may cause problems on systems w/o -- # aesni -- if test "$CC" != "icc" -- then -- AM_CFLAGS="$AM_CFLAGS -maes -msse4 -mpclmul" -- fi -- fi -+ case $host_os in -+ mingw*) -+ # Windows uses intrinsics for GCM which uses SSE4 instructions. -+ # MSVC has own build files. -+ AM_CFLAGS="$AM_CFLAGS -maes -msse4 -mpclmul" -+ ;; -+ *) -+ # Intrinsics used in AES_set_decrypt_key (TODO: rework) -+ AM_CFLAGS="$AM_CFLAGS -maes" -+ ;; -+ esac - fi - AS_IF([test "x$ENABLED_AESGCM" != "xno"],[AM_CCASFLAGS="$AM_CCASFLAGS -DHAVE_AESGCM"]) - fi diff --git a/package/network/config/firewall/Makefile b/package/network/config/firewall/Makefile index 4226981afb..df3aa74527 100644 --- a/package/network/config/firewall/Makefile +++ b/package/network/config/firewall/Makefile @@ -15,7 +15,7 @@ PKG_SOURCE_PROTO:=git PKG_SOURCE_URL=$(PROJECT_GIT)/project/firewall3.git PKG_SOURCE_DATE:=2022-02-17 PKG_SOURCE_VERSION:=4cd7d4f36bea731bf901cb067456f1d460294926 -PKG_MIRROR_HASH:=307baf09c61ce727b4edb4283144b0d8128ebba34b858cc6389571421f829a24 +PKG_MIRROR_HASH:=ce9e8ac1bcf22afbb0a80c3da1a8e8e887851299681097e3dfbfc347f2c4c80f PKG_MAINTAINER:=Jo-Philipp Wich PKG_LICENSE:=ISC diff --git a/package/network/services/hostapd/files/hostapd.sh b/package/network/services/hostapd/files/hostapd.sh index c4411cb012..78a9df417d 100644 --- a/package/network/services/hostapd/files/hostapd.sh +++ b/package/network/services/hostapd/files/hostapd.sh @@ -249,7 +249,7 @@ EOF hostapd_common_add_bss_config() { config_add_string 'bssid:macaddr' 'ssid:string' - config_add_boolean wds wmm uapsd hidden utf8_ssid + config_add_boolean wds wmm uapsd hidden utf8_ssid ppsk config_add_int maxassoc max_inactivity config_add_boolean disassoc_low_ack isolate short_preamble skip_inactivity_poll @@ -546,7 +546,7 @@ hostapd_set_bss_options() { acct_server acct_secret acct_port acct_interval \ bss_load_update_period chan_util_avg_period sae_require_mfp sae_pwe \ multi_ap multi_ap_backhaul_ssid multi_ap_backhaul_key skip_inactivity_poll \ - airtime_bss_weight airtime_bss_limit airtime_sta_weight \ + ppsk airtime_bss_weight airtime_bss_limit airtime_sta_weight \ multicast_to_unicast proxy_arp per_sta_vif \ eap_server eap_user_file ca_cert server_cert private_key private_key_passwd server_id \ vendor_elements fils ocv @@ -569,6 +569,7 @@ hostapd_set_bss_options() { set_default chan_util_avg_period 600 set_default utf8_ssid 1 set_default multi_ap 0 + set_default ppsk 0 set_default airtime_bss_weight 0 set_default airtime_bss_limit 0 set_default eap_server 0 @@ -656,7 +657,15 @@ hostapd_set_bss_options() { ;; psk|sae|psk-sae) json_get_vars key wpa_psk_file - if [ ${#key} -eq 64 ]; then + if [ "$auth_type" = "psk" ] && [ "$ppsk" -ne 0 ] ; then + json_get_vars auth_server auth_secret auth_port + set_default auth_port 1812 + append bss_conf "auth_server_addr=$auth_server" "$N" + append bss_conf "auth_server_port=$auth_port" "$N" + append bss_conf "auth_server_shared_secret=$auth_secret" "$N" + append bss_conf "macaddr_acl=2" "$N" + append bss_conf "wpa_psk_radius=2" "$N" + elif [ ${#key} -eq 64 ]; then append bss_conf "wpa_psk=$key" "$N" elif [ ${#key} -ge 8 ] && [ ${#key} -le 63 ]; then append bss_conf "wpa_passphrase=$key" "$N" diff --git a/package/system/gpio-cdev/nu801/Makefile b/package/system/gpio-cdev/nu801/Makefile index 1ac5c6d510..73de6210f6 100644 --- a/package/system/gpio-cdev/nu801/Makefile +++ b/package/system/gpio-cdev/nu801/Makefile @@ -7,8 +7,8 @@ PKG_RELEASE:=1 PKG_SOURCE_PROTO:=git PKG_SOURCE_URL:=https://github.com/chunkeey/nu801.git -PKG_SOURCE_VERSION:=d9942c0ceb949080b93366a9431028de3608e535 -PKG_MIRROR_HASH:=859be7dec96d2a0d6ee8b80c6f1a703384940d19caeeb74a4ac0a961b2a985db +PKG_SOURCE_VERSION:=f623879a393d0315f29095fe46b19cd2246d10d7 +PKG_MIRROR_HASH:=db21671a1c14f0bfeb65525cbfd0576d2d5bbebf3901e35e64f9bf92a9a53b0d PKG_MAINTAINER:=Christian Lamparter PKG_LICENSE:=GPL-3.0-or-later PKG_LICENSE_FILES:=LICENSE @@ -20,7 +20,7 @@ define Package/nu801 SECTION:=utils CATEGORY:=Utilities SUBMENU:=Userspace GPIO Drivers - DEPENDS:=@TARGET_x86 + DEPENDS:=@TARGET_x86||@TARGET_bcm53xx KCONFIG:=CONFIG_GPIO_CDEV=y TITLE:=NU801 LED Driver endef diff --git a/package/system/ubox/Makefile b/package/system/ubox/Makefile index d295778e60..a184ef6eb2 100644 --- a/package/system/ubox/Makefile +++ b/package/system/ubox/Makefile @@ -1,13 +1,13 @@ include $(TOPDIR)/rules.mk PKG_NAME:=ubox -PKG_RELEASE:=2 +PKG_RELEASE:=$(AUTORELEASE) PKG_SOURCE_PROTO:=git PKG_SOURCE_URL=$(PROJECT_GIT)/project/ubox.git -PKG_SOURCE_DATE:=2022-01-06 -PKG_SOURCE_VERSION:=b87a4fdca6346a01c19e94fe0461fb9ef7493815 -PKG_MIRROR_HASH:=4b41596fa00637134b23175a4952de66ff80b2edb956f685347f146d90d910c5 +PKG_SOURCE_DATE:=2022-07-17 +PKG_SOURCE_VERSION:=46a33b8be298e1e700e56f05b5ba4f06daf83efa +PKG_MIRROR_HASH:=551560cc481dd5d12e1dc81f368af8be29027891ce091ba71fee8fe5d9afcb87 CMAKE_INSTALL:=1 PKG_LICENSE:=GPL-2.0 diff --git a/package/utils/spidev_test/Makefile b/package/utils/spidev_test/Makefile index 0f288ad010..a756b3633b 100644 --- a/package/utils/spidev_test/Makefile +++ b/package/utils/spidev_test/Makefile @@ -19,7 +19,7 @@ include $(INCLUDE_DIR)/package.mk define Package/spidev-test SECTION:=utils CATEGORY:=Utilities - DEPENDS:=+kmod-spi-dev @!IN_SDK + DEPENDS:=+PACKAGE_kmod-spi-dev:kmod-spi-dev @!IN_SDK TITLE:=SPI testing utility VERSION:=$(LINUX_VERSION)-$(PKG_RELEASE) URL:=http://www.kernel.org diff --git a/target/linux/ath79/dts/qca9563_tplink_archer-c6-v2-us.dts b/target/linux/ath79/dts/qca9563_tplink_archer-c6-v2-us.dts index 76e19294f8..e6fd689c99 100644 --- a/target/linux/ath79/dts/qca9563_tplink_archer-c6-v2-us.dts +++ b/target/linux/ath79/dts/qca9563_tplink_archer-c6-v2-us.dts @@ -43,12 +43,12 @@ wan { label = "green:wan"; - gpios = <&gpio 8 GPIO_ACTIVE_LOW>; + gpios = <&gpio 7 GPIO_ACTIVE_LOW>; }; wan_fail { label = "amber:wan"; - gpios = <&gpio 7 GPIO_ACTIVE_LOW>; + gpios = <&gpio 8 GPIO_ACTIVE_LOW>; }; wps { diff --git a/target/linux/ath79/files/drivers/net/ethernet/atheros/ag71xx/ag71xx_main.c b/target/linux/ath79/files/drivers/net/ethernet/atheros/ag71xx/ag71xx_main.c index d6e8dd20c8..d553c62401 100644 --- a/target/linux/ath79/files/drivers/net/ethernet/atheros/ag71xx/ag71xx_main.c +++ b/target/linux/ath79/files/drivers/net/ethernet/atheros/ag71xx/ag71xx_main.c @@ -34,7 +34,7 @@ MODULE_PARM_DESC(msg_level, "Message level (-1=defaults,0=none,...,16=all)"); #define ETH_SWITCH_HEADER_LEN 2 -static int ag71xx_tx_packets(struct ag71xx *ag, bool flush); +static int ag71xx_tx_packets(struct ag71xx *ag, bool flush, int budget); static inline unsigned int ag71xx_max_frame_len(unsigned int mtu) { @@ -478,7 +478,7 @@ static void ag71xx_fast_reset(struct ag71xx *ag) mii_reg = ag71xx_rr(ag, AG71XX_REG_MII_CFG); rx_ds = ag71xx_rr(ag, AG71XX_REG_RX_DESC); - ag71xx_tx_packets(ag, true); + ag71xx_tx_packets(ag, true, 0); reset_control_assert(ag->mac_reset); udelay(10); @@ -1245,7 +1245,7 @@ static bool ag71xx_check_dma_stuck(struct ag71xx *ag) return false; } -static int ag71xx_tx_packets(struct ag71xx *ag, bool flush) +static int ag71xx_tx_packets(struct ag71xx *ag, bool flush, int budget) { struct ag71xx_ring *ring = &ag->tx_ring; bool dma_stuck = false; @@ -1278,7 +1278,7 @@ static int ag71xx_tx_packets(struct ag71xx *ag, bool flush) if (!skb) continue; - napi_consume_skb(skb, !flush); + napi_consume_skb(skb, budget); ring->buf[i].skb = NULL; bytes_compl += ring->buf[i].len; @@ -1404,7 +1404,7 @@ static int ag71xx_poll(struct napi_struct *napi, int limit) int tx_done; int rx_done; - tx_done = ag71xx_tx_packets(ag, false); + tx_done = ag71xx_tx_packets(ag, false, limit); DBG("%s: processing RX ring\n", dev->name); rx_done = ag71xx_rx_packets(ag, limit); diff --git a/target/linux/bcm27xx/patches-5.15/950-0577-ARM-dts-Update-rpi-400-and-cm4-dts-to-match-4-b.patch b/target/linux/bcm27xx/patches-5.15/950-0577-ARM-dts-Update-rpi-400-and-cm4-dts-to-match-4-b.patch index 6aabb715dd..00223ef0ce 100644 --- a/target/linux/bcm27xx/patches-5.15/950-0577-ARM-dts-Update-rpi-400-and-cm4-dts-to-match-4-b.patch +++ b/target/linux/bcm27xx/patches-5.15/950-0577-ARM-dts-Update-rpi-400-and-cm4-dts-to-match-4-b.patch @@ -60,48 +60,7 @@ Signed-off-by: Phil Elwell status = "okay"; }; -@@ -78,31 +64,15 @@ - status = "okay"; - }; - --&firmware { -- firmware_clocks: clocks { -- compatible = "raspberrypi,firmware-clocks"; -- #clock-cells = <1>; -- }; -- -- expgpio: gpio { -- compatible = "raspberrypi,firmware-gpio"; -- gpio-controller; -- #gpio-cells = <2>; -- gpio-line-names = "BT_ON", -- "WL_ON", -- "PWR_LED_OFF", -- "GLOBAL_RESET", -- "VDD_SD_IO_SEL", -- "CAM_GPIO", -- "SD_PWR_ON", -- "SD_OC_N"; -- status = "okay"; -- }; -- -- reset: reset { -- compatible = "raspberrypi,firmware-reset"; -- #reset-cells = <1>; -- }; -+&expgpio { -+ gpio-line-names = "BT_ON", -+ "WL_ON", -+ "PWR_LED_OFF", -+ "GLOBAL_RESET", -+ "VDD_SD_IO_SEL", -+ "GLOBAL_SHUTDOWN", -+ "SD_PWR_ON", -+ "SHUTDOWN_REQUEST"; - }; - - &gpio { -@@ -179,23 +149,13 @@ +@@ -179,23 +165,13 @@ }; &hdmi0 { @@ -125,7 +84,7 @@ Signed-off-by: Phil Elwell &pixelvalve0 { status = "okay"; }; -@@ -218,22 +178,6 @@ +@@ -218,22 +194,6 @@ status = "okay"; }; @@ -148,7 +107,7 @@ Signed-off-by: Phil Elwell /* SDHCI is used to control the SDIO for wireless */ &sdhci { #address-cells = <1>; -@@ -274,7 +218,7 @@ +@@ -274,7 +234,7 @@ &pcie0 { pci@0,0 { @@ -157,7 +116,7 @@ Signed-off-by: Phil Elwell #address-cells = <3>; #size-cells = <2>; ranges; -@@ -282,7 +226,7 @@ +@@ -282,7 +242,7 @@ reg = <0 0 0 0 0>; usb@0,0 { @@ -166,7 +125,7 @@ Signed-off-by: Phil Elwell resets = <&reset RASPBERRYPI_FIRMWARE_RESET_ID_USB>; }; }; -@@ -309,10 +253,6 @@ +@@ -309,10 +269,6 @@ status = "okay"; }; diff --git a/target/linux/bcm53xx/base-files/etc/board.d/02_network b/target/linux/bcm53xx/base-files/etc/board.d/02_network index 822320c0a6..c2e5afc5ed 100644 --- a/target/linux/bcm53xx/base-files/etc/board.d/02_network +++ b/target/linux/bcm53xx/base-files/etc/board.d/02_network @@ -22,6 +22,7 @@ bcm53xx_setup_interfaces() luxul,xap-1610-v1) ucidef_set_interface_lan "poe lan" "dhcp" ;; + meraki,mr26 | \ meraki,mr32) ucidef_set_interface_lan "poe" "dhcp" ;; @@ -58,6 +59,11 @@ bcm53xx_setup_macs() etXmacaddr=$(nvram get et0macaddr) offset=5 ;; + meraki,mr26) + label_mac="$(mtd_get_mac_binary_ubi board-config 0x66)" + ucidef_set_interface_macaddr "lan" "$label_mac" + ucidef_set_label_macaddr "$label_mac" + ;; *) etXmacaddr=$(nvram get et0macaddr) offset=1 diff --git a/target/linux/bcm53xx/base-files/etc/hotplug.d/ieee80211/10-fix-mac-address b/target/linux/bcm53xx/base-files/etc/hotplug.d/ieee80211/10-fix-mac-address new file mode 100644 index 0000000000..c1c56a10f3 --- /dev/null +++ b/target/linux/bcm53xx/base-files/etc/hotplug.d/ieee80211/10-fix-mac-address @@ -0,0 +1,18 @@ +#!/bin/ash + +[ "$ACTION" = "add" ] || exit 0 + +PHYNBR=${DEVPATH##*/phy} + +[ -n $PHYNBR ] || exit 0 + +. /lib/functions.sh +. /lib/functions/system.sh + +board=$(board_name) + +case "$board" in +meraki,mr26) + macaddr_add "$(macaddr_setbit_la $(mtd_get_mac_binary_ubi 'board-config' 0x66))" $(($PHYNBR * 8 + 1)) > /sys${DEVPATH}/macaddress + ;; +esac diff --git a/target/linux/bcm53xx/base-files/lib/upgrade/platform.sh b/target/linux/bcm53xx/base-files/lib/upgrade/platform.sh index 62a36dac49..3ebde77d3f 100644 --- a/target/linux/bcm53xx/base-files/lib/upgrade/platform.sh +++ b/target/linux/bcm53xx/base-files/lib/upgrade/platform.sh @@ -193,12 +193,16 @@ platform_other_check_image() { } platform_check_image() { - case "$(board_name)" in + local board + + board="$(board_name)" + case "$board" in + # Ideally, REQUIRE_IMAGE_METADATA=1 would suffice + # but this would require converting all other + # devices too. + meraki,mr26 | \ meraki,mr32) - # Ideally, REQUIRE_IMAGE_METADATA=1 would suffice - # but this would require converting all other - # devices too. - nand_do_platform_check meraki-mr32 "$1" + nand_do_platform_check "${board//,/_}" "$1" return $? ;; *) @@ -394,6 +398,7 @@ platform_other_do_upgrade() { platform_do_upgrade() { case "$(board_name)" in + meraki,mr26 | \ meraki,mr32) CI_KERNPART="part.safe" nand_do_upgrade "$1" diff --git a/target/linux/bcm53xx/image/Makefile b/target/linux/bcm53xx/image/Makefile index d08865b264..ac1d8f4475 100644 --- a/target/linux/bcm53xx/image/Makefile +++ b/target/linux/bcm53xx/image/Makefile @@ -322,6 +322,23 @@ define Device/luxul_xwr-3150 endef TARGET_DEVICES += luxul_xwr-3150 +define Device/meraki_mr26 + DEVICE_VENDOR := Meraki + DEVICE_MODEL := MR26 + DEVICE_PACKAGES := $(B43) kmod-i2c-bcm-iproc kmod-eeprom-at24 \ + kmod-hwmon-ina2xx nu801 + DEVICE_DTS := bcm53015-meraki-mr26 +# resize the initramfs to fit the size of the existing part.safe. + KERNEL_LOADADDR := 0x00008000 + KERNEL_INITRAMFS_SUFFIX := .bin + KERNEL_INITRAMFS := kernel-bin | append-dtb | gzip | uImage gzip | pad-to 9310208 +# LZMA is not supported by the uboot + KERNEL := kernel-bin | append-dtb | gzip | uImage gzip + IMAGES += sysupgrade.bin + IMAGE/sysupgrade.bin := sysupgrade-tar | append-metadata +endef +TARGET_DEVICES += meraki_mr26 + define Device/meraki_mr32 DEVICE_VENDOR := Meraki DEVICE_MODEL := MR32 @@ -339,7 +356,6 @@ define Device/meraki_mr32 pad-to 10362880 KERNEL := kernel-bin | fit none $$(DTS_DIR)/$$(DEVICE_DTS).dtb IMAGES += sysupgrade.bin -# Currently the only device that uses the new image check IMAGE/sysupgrade.bin := sysupgrade-tar | append-metadata # The loader is specifically looking for fdt@2: diff --git a/target/linux/bcm53xx/patches-5.10/081-next-ARM_dts_BCM53015-add-mr26.patch b/target/linux/bcm53xx/patches-5.10/081-next-ARM_dts_BCM53015-add-mr26.patch new file mode 100644 index 0000000000..4517b23f8b --- /dev/null +++ b/target/linux/bcm53xx/patches-5.10/081-next-ARM_dts_BCM53015-add-mr26.patch @@ -0,0 +1,242 @@ +From 935327a73553001f8d81375c76985d05f604507f Mon Sep 17 00:00:00 2001 +From: Christian Lamparter +Date: Sat, 18 Jun 2022 00:00:29 +0200 +Subject: [PATCH] ARM: dts: BCM5301X: Add DT for Meraki MR26 + +Meraki MR26 is an EOL wireless access point featuring a +PoE ethernet port and two dual-band 3x3 MIMO 802.11n +radios and 1x1 dual-band WIFI dedicated to scanning. + +Thank you Amir for the unit and PSU. + +Hardware info: +SOC : Broadcom BCM53015A1KFEBG (dual-core Cortex-A9 CPU at 800 MHz) +RAM : SK Hynix Inc. H5TQ1G63EFR, 1 GBit DDR3 SDRAM = 128 MiB +NAND : Spansion S34ML01G100TF100, 1 GBit SLC NAND Flash = 128 MiB +ETH : 1 GBit Ethernet Port - PoE (TPS23754 PoE Interface) +WIFI0 : Broadcom BCM43431KMLG, BCM43431 802.11 abgn (3x3:3) +WIFI1 : Broadcom BCM43431KMLG, BCM43431 802.11 abgn (3x3:3) +WIFI2 : Broadcom BCM43428 "Air Marshal" 802.11 abgn (1x1:1) +BUTTON: One reset key behind a small hole next to the Ethernet Port +LEDS : One amber (fault), one white (indicator) LED, separate RGB-LED +MISC : Atmel AT24C64 8KiB EEPROM i2c + : Ti INA219 26V, 12-bit, i2c output current/voltage/power monitor + +SERIAL: + WARNING: The serial port needs a TTL/RS-232 3V3 level converter! + The Serial setting is 115200-8-N-1. The board has a populated + right angle 1x4 0.1" pinheader. + The pinout is: VCC (next to J3, has the pin 1 indicator), RX, TX, GND. + +Odd stuff: + +- uboot does not support lzma compression, but gzip'd uImage/DTB work. +- uboot claims to support FIT, but fails to pass the DTB to the kernel. + Appending the dtb after the kernel image works. +- RGB-controller is supported through an external userspace program. +- The ubi partition contains a "board-config" volume. It stores the + MAC Address (0x66 in binary) and Serial No. (0x7c alpha-numerical). +- SoC's temperature sensor always reports that it is on fire. + This causes the system to immediately shutdown! Looking at reported + "418 degree Celsius" suggests that this sensor is not working. + +WIFI: +b43 is able to initialize all three WIFIs @ 802.11bg. +| b43-phy0: Broadcom 43431 WLAN found (core revision 29) +| bcma-pci-bridge 0000:01:00.0: bus1: Switched to core: 0x812 +| b43-phy0: Found PHY: Analog 9, Type 7 (HT), Revision 1 +| b43-phy0: Found Radio: Manuf 0x17F, ID 0x2059, Revision 0, Version 1 +| b43-phy0 warning: 5 GHz band is unsupported on this PHY +| b43-phy1: Broadcom 43431 WLAN found (core revision 29) +| bcma-pci-bridge 0001:01:00.0: bus2: Switched to core: 0x812 +| b43-phy1: Found PHY: Analog 9, Type 7 (HT), Revision 1 +| b43-phy1: Found Radio: Manuf 0x17F, ID 0x2059, Revision 0, Version 1 +| b43-phy1 warning: 5 GHz band is unsupported on this PHY +| b43-phy2: Broadcom 43228 WLAN found (core revision 30) +| bcma-pci-bridge 0002:01:00.0: bus3: Switched to core: 0x812 +| b43-phy2: Found PHY: Analog 9, Type 4 (N), Revision 16 +| b43-phy2: Found Radio: Manuf 0x17F, ID 0x2057, Revision 9, Version 1 +| Broadcom 43xx driver loaded [ Features: NL ] + +Signed-off-by: Christian Lamparter +Signed-off-by: Florian Fainelli +--- +--- /dev/null ++++ b/arch/arm/boot/dts/bcm53015-meraki-mr26.dts +@@ -0,0 +1,166 @@ ++// SPDX-License-Identifier: GPL-2.0-or-later OR MIT ++/* ++ * Broadcom BCM470X / BCM5301X ARM platform code. ++ * DTS for Meraki MR26 / Codename: Venom ++ * ++ * Copyright (C) 2022 Christian Lamparter ++ */ ++ ++/dts-v1/; ++ ++#include "bcm4708.dtsi" ++#include "bcm5301x-nand-cs0-bch8.dtsi" ++#include ++ ++/ { ++ compatible = "meraki,mr26", "brcm,bcm53015", "brcm,bcm4708"; ++ model = "Meraki MR26"; ++ ++ memory@0 { ++ reg = <0x00000000 0x08000000>; ++ device_type = "memory"; ++ }; ++ ++ leds { ++ compatible = "gpio-leds"; ++ ++ led-0 { ++ function = LED_FUNCTION_FAULT; ++ color = ; ++ gpios = <&chipcommon 13 GPIO_ACTIVE_HIGH>; ++ panic-indicator; ++ }; ++ led-1 { ++ function = LED_FUNCTION_INDICATOR; ++ color = ; ++ gpios = <&chipcommon 12 GPIO_ACTIVE_HIGH>; ++ }; ++ }; ++ ++ keys { ++ compatible = "gpio-keys"; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ key-restart { ++ label = "Reset"; ++ linux,code = ; ++ gpios = <&chipcommon 11 GPIO_ACTIVE_LOW>; ++ }; ++ }; ++}; ++ ++&uart0 { ++ clock-frequency = <50000000>; ++ /delete-property/ clocks; ++}; ++ ++&uart1 { ++ status = "disabled"; ++}; ++ ++&gmac0 { ++ status = "okay"; ++}; ++ ++&gmac1 { ++ status = "disabled"; ++}; ++&gmac2 { ++ status = "disabled"; ++}; ++&gmac3 { ++ status = "disabled"; ++}; ++ ++&nandcs { ++ nand-ecc-algo = "hw"; ++ ++ partitions { ++ compatible = "fixed-partitions"; ++ #address-cells = <0x1>; ++ #size-cells = <0x1>; ++ ++ partition@0 { ++ label = "u-boot"; ++ reg = <0x0 0x200000>; ++ read-only; ++ }; ++ ++ partition@200000 { ++ label = "u-boot-env"; ++ reg = <0x200000 0x200000>; ++ /* empty */ ++ }; ++ ++ partition@400000 { ++ label = "u-boot-backup"; ++ reg = <0x400000 0x200000>; ++ /* empty */ ++ }; ++ ++ partition@600000 { ++ label = "u-boot-env-backup"; ++ reg = <0x600000 0x200000>; ++ /* empty */ ++ }; ++ ++ partition@800000 { ++ label = "ubi"; ++ reg = <0x800000 0x7780000>; ++ }; ++ }; ++}; ++ ++&srab { ++ status = "okay"; ++ ++ ports { ++ port@0 { ++ reg = <0>; ++ label = "poe"; ++ }; ++ ++ port@5 { ++ reg = <5>; ++ label = "cpu"; ++ ethernet = <&gmac0>; ++ ++ fixed-link { ++ speed = <1000>; ++ duplex-full; ++ }; ++ }; ++ }; ++}; ++ ++&i2c0 { ++ status = "okay"; ++ ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinmux_i2c>; ++ ++ clock-frequency = <100000>; ++ ++ ina219@40 { ++ compatible = "ti,ina219"; /* PoE power */ ++ reg = <0x40>; ++ shunt-resistor = <60000>; /* = 60 mOhms */ ++ }; ++ ++ eeprom@56 { ++ compatible = "atmel,24c64"; ++ reg = <0x56>; ++ pagesize = <32>; ++ read-only; ++ #address-cells = <1>; ++ #size-cells = <1>; ++ ++ /* it's empty */ ++ }; ++}; ++ ++&thermal { ++ status = "disabled"; ++ /* does not work, reads 418 degree Celsius */ ++}; +--- a/arch/arm/boot/dts/Makefile ++++ b/arch/arm/boot/dts/Makefile +@@ -129,6 +129,7 @@ dtb-$(CONFIG_ARCH_BCM_5301X) += \ + bcm47094-luxul-xwr-3150-v1.dtb \ + bcm47094-netgear-r8500.dtb \ + bcm47094-phicomm-k3.dtb \ ++ bcm53015-meraki-mr26.dtb \ + bcm53016-meraki-mr32.dtb \ + bcm94708.dtb \ + bcm94709.dtb \ diff --git a/target/linux/bcm53xx/patches-5.15/072-next-ARM_dts_BCM53015-add-mr26.patch b/target/linux/bcm53xx/patches-5.15/072-next-ARM_dts_BCM53015-add-mr26.patch new file mode 100644 index 0000000000..4517b23f8b --- /dev/null +++ b/target/linux/bcm53xx/patches-5.15/072-next-ARM_dts_BCM53015-add-mr26.patch @@ -0,0 +1,242 @@ +From 935327a73553001f8d81375c76985d05f604507f Mon Sep 17 00:00:00 2001 +From: Christian Lamparter +Date: Sat, 18 Jun 2022 00:00:29 +0200 +Subject: [PATCH] ARM: dts: BCM5301X: Add DT for Meraki MR26 + +Meraki MR26 is an EOL wireless access point featuring a +PoE ethernet port and two dual-band 3x3 MIMO 802.11n +radios and 1x1 dual-band WIFI dedicated to scanning. + +Thank you Amir for the unit and PSU. + +Hardware info: +SOC : Broadcom BCM53015A1KFEBG (dual-core Cortex-A9 CPU at 800 MHz) +RAM : SK Hynix Inc. H5TQ1G63EFR, 1 GBit DDR3 SDRAM = 128 MiB +NAND : Spansion S34ML01G100TF100, 1 GBit SLC NAND Flash = 128 MiB +ETH : 1 GBit Ethernet Port - PoE (TPS23754 PoE Interface) +WIFI0 : Broadcom BCM43431KMLG, BCM43431 802.11 abgn (3x3:3) +WIFI1 : Broadcom BCM43431KMLG, BCM43431 802.11 abgn (3x3:3) +WIFI2 : Broadcom BCM43428 "Air Marshal" 802.11 abgn (1x1:1) +BUTTON: One reset key behind a small hole next to the Ethernet Port +LEDS : One amber (fault), one white (indicator) LED, separate RGB-LED +MISC : Atmel AT24C64 8KiB EEPROM i2c + : Ti INA219 26V, 12-bit, i2c output current/voltage/power monitor + +SERIAL: + WARNING: The serial port needs a TTL/RS-232 3V3 level converter! + The Serial setting is 115200-8-N-1. The board has a populated + right angle 1x4 0.1" pinheader. + The pinout is: VCC (next to J3, has the pin 1 indicator), RX, TX, GND. + +Odd stuff: + +- uboot does not support lzma compression, but gzip'd uImage/DTB work. +- uboot claims to support FIT, but fails to pass the DTB to the kernel. + Appending the dtb after the kernel image works. +- RGB-controller is supported through an external userspace program. +- The ubi partition contains a "board-config" volume. It stores the + MAC Address (0x66 in binary) and Serial No. (0x7c alpha-numerical). +- SoC's temperature sensor always reports that it is on fire. + This causes the system to immediately shutdown! Looking at reported + "418 degree Celsius" suggests that this sensor is not working. + +WIFI: +b43 is able to initialize all three WIFIs @ 802.11bg. +| b43-phy0: Broadcom 43431 WLAN found (core revision 29) +| bcma-pci-bridge 0000:01:00.0: bus1: Switched to core: 0x812 +| b43-phy0: Found PHY: Analog 9, Type 7 (HT), Revision 1 +| b43-phy0: Found Radio: Manuf 0x17F, ID 0x2059, Revision 0, Version 1 +| b43-phy0 warning: 5 GHz band is unsupported on this PHY +| b43-phy1: Broadcom 43431 WLAN found (core revision 29) +| bcma-pci-bridge 0001:01:00.0: bus2: Switched to core: 0x812 +| b43-phy1: Found PHY: Analog 9, Type 7 (HT), Revision 1 +| b43-phy1: Found Radio: Manuf 0x17F, ID 0x2059, Revision 0, Version 1 +| b43-phy1 warning: 5 GHz band is unsupported on this PHY +| b43-phy2: Broadcom 43228 WLAN found (core revision 30) +| bcma-pci-bridge 0002:01:00.0: bus3: Switched to core: 0x812 +| b43-phy2: Found PHY: Analog 9, Type 4 (N), Revision 16 +| b43-phy2: Found Radio: Manuf 0x17F, ID 0x2057, Revision 9, Version 1 +| Broadcom 43xx driver loaded [ Features: NL ] + +Signed-off-by: Christian Lamparter +Signed-off-by: Florian Fainelli +--- +--- /dev/null ++++ b/arch/arm/boot/dts/bcm53015-meraki-mr26.dts +@@ -0,0 +1,166 @@ ++// SPDX-License-Identifier: GPL-2.0-or-later OR MIT ++/* ++ * Broadcom BCM470X / BCM5301X ARM platform code. ++ * DTS for Meraki MR26 / Codename: Venom ++ * ++ * Copyright (C) 2022 Christian Lamparter ++ */ ++ ++/dts-v1/; ++ ++#include "bcm4708.dtsi" ++#include "bcm5301x-nand-cs0-bch8.dtsi" ++#include ++ ++/ { ++ compatible = "meraki,mr26", "brcm,bcm53015", "brcm,bcm4708"; ++ model = "Meraki MR26"; ++ ++ memory@0 { ++ reg = <0x00000000 0x08000000>; ++ device_type = "memory"; ++ }; ++ ++ leds { ++ compatible = "gpio-leds"; ++ ++ led-0 { ++ function = LED_FUNCTION_FAULT; ++ color = ; ++ gpios = <&chipcommon 13 GPIO_ACTIVE_HIGH>; ++ panic-indicator; ++ }; ++ led-1 { ++ function = LED_FUNCTION_INDICATOR; ++ color = ; ++ gpios = <&chipcommon 12 GPIO_ACTIVE_HIGH>; ++ }; ++ }; ++ ++ keys { ++ compatible = "gpio-keys"; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ ++ key-restart { ++ label = "Reset"; ++ linux,code = ; ++ gpios = <&chipcommon 11 GPIO_ACTIVE_LOW>; ++ }; ++ }; ++}; ++ ++&uart0 { ++ clock-frequency = <50000000>; ++ /delete-property/ clocks; ++}; ++ ++&uart1 { ++ status = "disabled"; ++}; ++ ++&gmac0 { ++ status = "okay"; ++}; ++ ++&gmac1 { ++ status = "disabled"; ++}; ++&gmac2 { ++ status = "disabled"; ++}; ++&gmac3 { ++ status = "disabled"; ++}; ++ ++&nandcs { ++ nand-ecc-algo = "hw"; ++ ++ partitions { ++ compatible = "fixed-partitions"; ++ #address-cells = <0x1>; ++ #size-cells = <0x1>; ++ ++ partition@0 { ++ label = "u-boot"; ++ reg = <0x0 0x200000>; ++ read-only; ++ }; ++ ++ partition@200000 { ++ label = "u-boot-env"; ++ reg = <0x200000 0x200000>; ++ /* empty */ ++ }; ++ ++ partition@400000 { ++ label = "u-boot-backup"; ++ reg = <0x400000 0x200000>; ++ /* empty */ ++ }; ++ ++ partition@600000 { ++ label = "u-boot-env-backup"; ++ reg = <0x600000 0x200000>; ++ /* empty */ ++ }; ++ ++ partition@800000 { ++ label = "ubi"; ++ reg = <0x800000 0x7780000>; ++ }; ++ }; ++}; ++ ++&srab { ++ status = "okay"; ++ ++ ports { ++ port@0 { ++ reg = <0>; ++ label = "poe"; ++ }; ++ ++ port@5 { ++ reg = <5>; ++ label = "cpu"; ++ ethernet = <&gmac0>; ++ ++ fixed-link { ++ speed = <1000>; ++ duplex-full; ++ }; ++ }; ++ }; ++}; ++ ++&i2c0 { ++ status = "okay"; ++ ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pinmux_i2c>; ++ ++ clock-frequency = <100000>; ++ ++ ina219@40 { ++ compatible = "ti,ina219"; /* PoE power */ ++ reg = <0x40>; ++ shunt-resistor = <60000>; /* = 60 mOhms */ ++ }; ++ ++ eeprom@56 { ++ compatible = "atmel,24c64"; ++ reg = <0x56>; ++ pagesize = <32>; ++ read-only; ++ #address-cells = <1>; ++ #size-cells = <1>; ++ ++ /* it's empty */ ++ }; ++}; ++ ++&thermal { ++ status = "disabled"; ++ /* does not work, reads 418 degree Celsius */ ++}; +--- a/arch/arm/boot/dts/Makefile ++++ b/arch/arm/boot/dts/Makefile +@@ -129,6 +129,7 @@ dtb-$(CONFIG_ARCH_BCM_5301X) += \ + bcm47094-luxul-xwr-3150-v1.dtb \ + bcm47094-netgear-r8500.dtb \ + bcm47094-phicomm-k3.dtb \ ++ bcm53015-meraki-mr26.dtb \ + bcm53016-meraki-mr32.dtb \ + bcm94708.dtb \ + bcm94709.dtb \ diff --git a/target/linux/generic/hack-5.10/221-module_exports.patch b/target/linux/generic/hack-5.10/221-module_exports.patch index cd38125f28..b5ddaf1c6d 100644 --- a/target/linux/generic/hack-5.10/221-module_exports.patch +++ b/target/linux/generic/hack-5.10/221-module_exports.patch @@ -89,6 +89,30 @@ Signed-off-by: Felix Fietkau "__kstrtab_" #sym ": \n" \ " .asciz \"" #sym "\" \n" \ "__kstrtabns_" #sym ": \n" \ +--- a/include/asm-generic/export.h ++++ b/include/asm-generic/export.h +@@ -26,6 +26,12 @@ + #endif + .endm + ++#ifdef MODULE ++#define __EXPORT_SUFFIX(name) ++#else ++#define __EXPORT_SUFFIX(name) + #name ++#endif ++ + /* + * note on .section use: we specify progbits since usage of the "M" (SHF_MERGE) + * section flag requires it. Use '%progbits' instead of '@progbits' since the +@@ -42,7 +42,7 @@ + __ksymtab_\name: + __put \val, __kstrtab_\name + .previous +- .section __ksymtab_strings,"aMS",%progbits,1 ++ .section __ksymtab_strings __EXPORT_SUFFIX(name),"aMS",%progbits,1 + __kstrtab_\name: + .asciz "\name" + .previous --- a/scripts/Makefile.build +++ b/scripts/Makefile.build @@ -367,7 +367,7 @@ targets += $(lib-y) $(always-y) $(MAKECM diff --git a/target/linux/generic/hack-5.15/205-kconfig-exit.patch b/target/linux/generic/hack-5.15/205-kconfig-exit.patch index e61c3ffdd9..9f98c16b07 100644 --- a/target/linux/generic/hack-5.15/205-kconfig-exit.patch +++ b/target/linux/generic/hack-5.15/205-kconfig-exit.patch @@ -1,3 +1,14 @@ +From 300d26562ce4dc427154cb247beb75db4b1f0774 Mon Sep 17 00:00:00 2001 +From: OpenWrt community +Date: Wed, 13 Jul 2022 13:29:57 +0200 +Subject: [PATCH] scripts/Kconfig: Kconfig exit + +--- + scripts/kconfig/conf.c | 2 ++ + 1 file changed, 2 insertions(+) + +diff --git a/scripts/kconfig/conf.c b/scripts/kconfig/conf.c +index 5d84b44a2a2a..d279d95aac92 100644 --- a/scripts/kconfig/conf.c +++ b/scripts/kconfig/conf.c @@ -435,6 +435,8 @@ static int conf_sym(struct menu *menu) @@ -9,3 +20,5 @@ newval = oldval; break; case '?': +-- + diff --git a/target/linux/generic/hack-5.15/221-module_exports.patch b/target/linux/generic/hack-5.15/221-module_exports.patch index 95aef8edf8..47f013de4f 100644 --- a/target/linux/generic/hack-5.15/221-module_exports.patch +++ b/target/linux/generic/hack-5.15/221-module_exports.patch @@ -89,6 +89,30 @@ Signed-off-by: Felix Fietkau "__kstrtab_" #sym ": \n" \ " .asciz \"" #sym "\" \n" \ "__kstrtabns_" #sym ": \n" \ +--- a/include/asm-generic/export.h ++++ b/include/asm-generic/export.h +@@ -26,6 +26,12 @@ struct kernel_symbol { + #endif + .endm + ++#ifdef MODULE ++#define __EXPORT_SUFFIX(name) ++#else ++#define __EXPORT_SUFFIX(name) + #name ++#endif ++ + /* + * note on .section use: we specify progbits since usage of the "M" (SHF_MERGE) + * section flag requires it. Use '%progbits' instead of '@progbits' since the +@@ -42,7 +42,7 @@ struct kernel_symbol { + __ksymtab_\name: + __put \val, __kstrtab_\name + .previous +- .section __ksymtab_strings,"aMS",%progbits,1 ++ .section __ksymtab_strings __EXPORT_SUFFIX(name),"aMS",%progbits,1 + __kstrtab_\name: + .asciz "\name" + .previous --- a/scripts/Makefile.build +++ b/scripts/Makefile.build @@ -396,7 +396,7 @@ targets += $(real-dtb-y) $(lib-y) $(alwa diff --git a/target/linux/generic/hack-5.15/249-udp-tunnel-selection.patch b/target/linux/generic/hack-5.15/249-udp-tunnel-selection.patch index 2c74298dfe..6a5d3b3f86 100644 --- a/target/linux/generic/hack-5.15/249-udp-tunnel-selection.patch +++ b/target/linux/generic/hack-5.15/249-udp-tunnel-selection.patch @@ -1,3 +1,14 @@ +From 4487708144118bfd5e1b1da7003a486951fb9c5a Mon Sep 17 00:00:00 2001 +From: OpenWrt community +Date: Wed, 13 Jul 2022 13:31:51 +0200 +Subject: [PATCH] net/ipv4: add udp tunnel tristate string + +--- + net/ipv4/Kconfig | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/net/ipv4/Kconfig b/net/ipv4/Kconfig +index 87983e70f03f..426b44d39277 100644 --- a/net/ipv4/Kconfig +++ b/net/ipv4/Kconfig @@ -315,7 +315,7 @@ config NET_IPVTI @@ -9,3 +20,5 @@ select NET_IP_TUNNEL default n +-- + diff --git a/target/linux/generic/hack-5.15/253-ksmbd-config.patch b/target/linux/generic/hack-5.15/253-ksmbd-config.patch index 559898f78d..820197bb2b 100644 --- a/target/linux/generic/hack-5.15/253-ksmbd-config.patch +++ b/target/linux/generic/hack-5.15/253-ksmbd-config.patch @@ -1,3 +1,15 @@ +From dcd966fa7ca63f38cf7147e1184d13d66e2ca340 Mon Sep 17 00:00:00 2001 +From: OpenWrt community +Date: Wed, 13 Jul 2022 13:33:30 +0200 +Subject: [PATCH] Kconfig: add tristate for OID and ASNI string + +--- + init/Kconfig | 2 +- + lib/Kconfig | 2 +- + 2 files changed, 2 insertions(+), 2 deletions(-) + +diff --git a/init/Kconfig b/init/Kconfig +index 5a2514bbb11d..32ba9490a6e4 100644 --- a/init/Kconfig +++ b/init/Kconfig @@ -2384,7 +2384,7 @@ config PADATA @@ -9,6 +21,8 @@ help Build a simple ASN.1 grammar compiler that produces a bytecode output that can be interpreted by the ASN.1 stream decoder and used to +diff --git a/lib/Kconfig b/lib/Kconfig +index d6c6cfd1fac9..6595c53abd3c 100644 --- a/lib/Kconfig +++ b/lib/Kconfig @@ -614,7 +614,7 @@ config LIBFDT @@ -20,3 +34,5 @@ help Enable fast lookup object identifier registry. +-- + diff --git a/target/linux/generic/hack-5.15/261-lib-arc4-unhide.patch b/target/linux/generic/hack-5.15/261-lib-arc4-unhide.patch index 4ffd8cfa37..65dd7ff126 100644 --- a/target/linux/generic/hack-5.15/261-lib-arc4-unhide.patch +++ b/target/linux/generic/hack-5.15/261-lib-arc4-unhide.patch @@ -1,7 +1,18 @@ +From 241e5d3f7b0dd3c01f8c7fa83cbc9a3882286d53 Mon Sep 17 00:00:00 2001 +From: OpenWrt community +Date: Wed, 13 Jul 2022 13:35:18 +0200 +Subject: [PATCH] lib/crypto: add tristate string for ARC4 + This makes it possible to select CONFIG_CRYPTO_LIB_ARC4 directly. We need this to be able to compile this into the kernel and make use of it from backports. +--- + lib/crypto/Kconfig | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/lib/crypto/Kconfig b/lib/crypto/Kconfig +index 5056663c2aff..8a4d4e5bcd7a 100644 --- a/lib/crypto/Kconfig +++ b/lib/crypto/Kconfig @@ -6,7 +6,7 @@ config CRYPTO_LIB_AES @@ -13,3 +24,5 @@ from backports. config CRYPTO_ARCH_HAVE_LIB_BLAKE2S bool +-- + diff --git a/target/linux/generic/hack-5.15/410-block-fit-partition-parser.patch b/target/linux/generic/hack-5.15/410-block-fit-partition-parser.patch index 7539bc8627..b31479e5ac 100644 --- a/target/linux/generic/hack-5.15/410-block-fit-partition-parser.patch +++ b/target/linux/generic/hack-5.15/410-block-fit-partition-parser.patch @@ -1,6 +1,27 @@ +From 69357074558daf6ff24c9f58714935e9e095a865 Mon Sep 17 00:00:00 2001 +From: OpenWrt community +Date: Wed, 13 Jul 2022 13:37:33 +0200 +Subject: [PATCH] kernel: add block fit partition parser + +--- + block/blk.h | 2 ++ + block/partitions/Kconfig | 7 +++++++ + block/partitions/Makefile | 1 + + block/partitions/check.h | 3 +++ + block/partitions/core.c | 17 +++++++++++++++++ + block/partitions/efi.c | 8 ++++++++ + block/partitions/efi.h | 3 +++ + block/partitions/msdos.c | 10 ++++++++++ + drivers/mtd/mtd_blkdevs.c | 2 ++ + drivers/mtd/ubi/block.c | 3 +++ + include/linux/msdos_partition.h | 1 + + 11 files changed, 57 insertions(+) + +diff --git a/block/blk.h b/block/blk.h +index aab72194d226..ed23a4fac950 100644 --- a/block/blk.h +++ b/block/blk.h -@@ -354,6 +354,8 @@ void blk_free_ext_minor(unsigned int min +@@ -354,6 +354,8 @@ void blk_free_ext_minor(unsigned int minor); #define ADDPART_FLAG_NONE 0 #define ADDPART_FLAG_RAID 1 #define ADDPART_FLAG_WHOLEDISK 2 @@ -9,6 +30,8 @@ int bdev_add_partition(struct gendisk *disk, int partno, sector_t start, sector_t length); int bdev_del_partition(struct gendisk *disk, int partno); +diff --git a/block/partitions/Kconfig b/block/partitions/Kconfig +index 278593b8e4e9..d4cd2f36ea95 100644 --- a/block/partitions/Kconfig +++ b/block/partitions/Kconfig @@ -101,6 +101,13 @@ config ATARI_PARTITION @@ -25,6 +48,8 @@ config IBM_PARTITION bool "IBM disk label and partition support" depends on PARTITION_ADVANCED && S390 +diff --git a/block/partitions/Makefile b/block/partitions/Makefile +index a7f05cdb02a8..d319eb1deba9 100644 --- a/block/partitions/Makefile +++ b/block/partitions/Makefile @@ -8,6 +8,7 @@ obj-$(CONFIG_ACORN_PARTITION) += acorn.o @@ -35,9 +60,11 @@ obj-$(CONFIG_CMDLINE_PARTITION) += cmdline.o obj-$(CONFIG_MAC_PARTITION) += mac.o obj-$(CONFIG_LDM_PARTITION) += ldm.o +diff --git a/block/partitions/check.h b/block/partitions/check.h +index d5b28e309d64..1b2fd18b2480 100644 --- a/block/partitions/check.h +++ b/block/partitions/check.h -@@ -58,6 +58,7 @@ int amiga_partition(struct parsed_partit +@@ -58,6 +58,7 @@ int amiga_partition(struct parsed_partitions *state); int atari_partition(struct parsed_partitions *state); int cmdline_partition(struct parsed_partitions *state); int efi_partition(struct parsed_partitions *state); @@ -45,12 +72,14 @@ int ibm_partition(struct parsed_partitions *); int karma_partition(struct parsed_partitions *state); int ldm_partition(struct parsed_partitions *state); -@@ -68,3 +69,5 @@ int sgi_partition(struct parsed_partitio +@@ -68,3 +69,5 @@ int sgi_partition(struct parsed_partitions *state); int sun_partition(struct parsed_partitions *state); int sysv68_partition(struct parsed_partitions *state); int ultrix_partition(struct parsed_partitions *state); + +int parse_fit_partitions(struct parsed_partitions *state, u64 start_sector, u64 nr_sectors, int *slot, int add_remain); +diff --git a/block/partitions/core.c b/block/partitions/core.c +index b9e9af84f518..176f7fe79c56 100644 --- a/block/partitions/core.c +++ b/block/partitions/core.c @@ -12,6 +12,10 @@ @@ -64,7 +93,7 @@ #include "check.h" static int (*check_part[])(struct parsed_partitions *) = { -@@ -48,6 +52,9 @@ static int (*check_part[])(struct parsed +@@ -48,6 +52,9 @@ static int (*check_part[])(struct parsed_partitions *) = { #ifdef CONFIG_EFI_PARTITION efi_partition, /* this must come before msdos */ #endif @@ -74,7 +103,7 @@ #ifdef CONFIG_SGI_PARTITION sgi_partition, #endif -@@ -408,6 +415,11 @@ static struct block_device *add_partitio +@@ -408,6 +415,11 @@ static struct block_device *add_partition(struct gendisk *disk, int partno, goto out_del; } @@ -86,7 +115,7 @@ /* everything is up and running, commence */ err = xa_insert(&disk->part_tbl, partno, bdev, GFP_KERNEL); if (err) -@@ -598,6 +610,11 @@ static bool blk_add_partition(struct gen +@@ -598,6 +610,11 @@ static bool blk_add_partition(struct gendisk *disk, (state->parts[p].flags & ADDPART_FLAG_RAID)) md_autodetect_dev(part->bd_dev); @@ -98,32 +127,11 @@ return true; } ---- a/drivers/mtd/ubi/block.c -+++ b/drivers/mtd/ubi/block.c -@@ -428,6 +428,9 @@ int ubiblock_create(struct ubi_volume_in - goto out_cleanup_disk; - } - gd->private_data = dev; -+#ifdef CONFIG_FIT_PARTITION -+ gd->flags |= GENHD_FL_EXT_DEVT; -+#endif - sprintf(gd->disk_name, "ubiblock%d_%d", dev->ubi_num, dev->vol_id); - set_capacity(gd, disk_capacity); - dev->gd = gd; ---- a/drivers/mtd/mtd_blkdevs.c -+++ b/drivers/mtd/mtd_blkdevs.c -@@ -345,6 +345,8 @@ int add_mtd_blktrans_dev(struct mtd_blkt - gd->first_minor = (new->devnum) << tr->part_bits; - gd->minors = 1 << tr->part_bits; - gd->fops = &mtd_block_ops; -+ if (IS_ENABLED(CONFIG_FIT_PARTITION) && !mtd_type_is_nand(new->mtd)) -+ gd->flags |= GENHD_FL_EXT_DEVT; - - if (tr->part_bits) - if (new->devnum < 26) +diff --git a/block/partitions/efi.c b/block/partitions/efi.c +index 7ca5c4c374d4..9ecd2b3d5674 100644 --- a/block/partitions/efi.c +++ b/block/partitions/efi.c -@@ -716,6 +716,9 @@ int efi_partition(struct parsed_partitio +@@ -716,6 +716,9 @@ int efi_partition(struct parsed_partitions *state) gpt_entry *ptes = NULL; u32 i; unsigned ssz = queue_logical_block_size(state->disk->queue) / 512; @@ -133,7 +141,7 @@ if (!find_valid_gpt(state, &gpt, &ptes) || !gpt || !ptes) { kfree(gpt); -@@ -749,6 +752,11 @@ int efi_partition(struct parsed_partitio +@@ -749,6 +752,11 @@ int efi_partition(struct parsed_partitions *state) ARRAY_SIZE(ptes[i].partition_name)); utf16_le_to_7bit(ptes[i].partition_name, label_max, info->volname); state->parts[i + 1].has_info = true; @@ -145,6 +153,8 @@ } kfree(ptes); kfree(gpt); +diff --git a/block/partitions/efi.h b/block/partitions/efi.h +index 8cc2b88d0aa8..b5807e35bafc 100644 --- a/block/partitions/efi.h +++ b/block/partitions/efi.h @@ -52,6 +52,9 @@ @@ -157,9 +167,11 @@ typedef struct _gpt_header { __le64 signature; +diff --git a/block/partitions/msdos.c b/block/partitions/msdos.c +index b5d5c229cc3b..ff7e74911359 100644 --- a/block/partitions/msdos.c +++ b/block/partitions/msdos.c -@@ -564,6 +564,15 @@ static void parse_minix(struct parsed_pa +@@ -564,6 +564,15 @@ static void parse_minix(struct parsed_partitions *state, #endif /* CONFIG_MINIX_SUBPARTITION */ } @@ -183,6 +195,35 @@ {0, NULL}, }; +diff --git a/drivers/mtd/mtd_blkdevs.c b/drivers/mtd/mtd_blkdevs.c +index 65470d1b8fc8..5dd9b54d6555 100644 +--- a/drivers/mtd/mtd_blkdevs.c ++++ b/drivers/mtd/mtd_blkdevs.c +@@ -345,6 +345,8 @@ int add_mtd_blktrans_dev(struct mtd_blktrans_dev *new) + gd->first_minor = (new->devnum) << tr->part_bits; + gd->minors = 1 << tr->part_bits; + gd->fops = &mtd_block_ops; ++ if (IS_ENABLED(CONFIG_FIT_PARTITION) && !mtd_type_is_nand(new->mtd)) ++ gd->flags |= GENHD_FL_EXT_DEVT; + + if (tr->part_bits) + if (new->devnum < 26) +diff --git a/drivers/mtd/ubi/block.c b/drivers/mtd/ubi/block.c +index 57b984dd73b4..5982070e470b 100644 +--- a/drivers/mtd/ubi/block.c ++++ b/drivers/mtd/ubi/block.c +@@ -428,6 +428,9 @@ int ubiblock_create(struct ubi_volume_info *vi) + goto out_cleanup_disk; + } + gd->private_data = dev; ++#ifdef CONFIG_FIT_PARTITION ++ gd->flags |= GENHD_FL_EXT_DEVT; ++#endif + sprintf(gd->disk_name, "ubiblock%d_%d", dev->ubi_num, dev->vol_id); + set_capacity(gd, disk_capacity); + dev->gd = gd; +diff --git a/include/linux/msdos_partition.h b/include/linux/msdos_partition.h +index 2cb82db2a43c..c15b6c759aca 100644 --- a/include/linux/msdos_partition.h +++ b/include/linux/msdos_partition.h @@ -31,6 +31,7 @@ enum msdos_sys_ind { @@ -193,3 +234,5 @@ SOLARIS_X86_PARTITION = 0x82, /* also Linux swap partitions */ NEW_SOLARIS_X86_PARTITION = 0xbf, +-- + diff --git a/target/linux/generic/hack-5.15/430-mtk-bmt-support.patch b/target/linux/generic/hack-5.15/430-mtk-bmt-support.patch index 2a98fe6f81..48181950b7 100644 --- a/target/linux/generic/hack-5.15/430-mtk-bmt-support.patch +++ b/target/linux/generic/hack-5.15/430-mtk-bmt-support.patch @@ -1,3 +1,15 @@ +From ac84397efb3b3868c71c10ad7521161773228a17 Mon Sep 17 00:00:00 2001 +From: OpenWrt community +Date: Wed, 13 Jul 2022 13:41:44 +0200 +Subject: [PATCH] mtd/nand: add MediaTek NAND bad block managment table + +--- + drivers/mtd/nand/Kconfig | 4 ++++ + drivers/mtd/nand/Makefile | 1 + + 2 files changed, 5 insertions(+) + +diff --git a/drivers/mtd/nand/Kconfig b/drivers/mtd/nand/Kconfig +index b40455234cbd..72ef18c59cee 100644 --- a/drivers/mtd/nand/Kconfig +++ b/drivers/mtd/nand/Kconfig @@ -46,6 +46,10 @@ config MTD_NAND_ECC_SW_BCH @@ -11,6 +23,8 @@ endmenu endmenu +diff --git a/drivers/mtd/nand/Makefile b/drivers/mtd/nand/Makefile +index 1c0b46960eb1..b9d97626bb47 100644 --- a/drivers/mtd/nand/Makefile +++ b/drivers/mtd/nand/Makefile @@ -2,6 +2,7 @@ @@ -21,3 +35,5 @@ obj-y += onenand/ obj-y += raw/ +-- + diff --git a/target/linux/generic/hack-5.15/600-bridge_offload.patch b/target/linux/generic/hack-5.15/600-bridge_offload.patch index 5d49d07753..7e87d9a3fd 100644 --- a/target/linux/generic/hack-5.15/600-bridge_offload.patch +++ b/target/linux/generic/hack-5.15/600-bridge_offload.patch @@ -1,3 +1,30 @@ +From 11c3fae5afa6cac444d12622e2cf5af60a99c1ef Mon Sep 17 00:00:00 2001 +From: OpenWrt community +Date: Wed, 13 Jul 2022 13:43:15 +0200 +Subject: [PATCH] net/bridge: add bridge offload + +--- + include/linux/if_bridge.h | 1 + + net/bridge/Makefile | 2 +- + net/bridge/br.c | 8 + + net/bridge/br_device.c | 2 + + net/bridge/br_fdb.c | 5 + + net/bridge/br_forward.c | 3 + + net/bridge/br_if.c | 6 +- + net/bridge/br_input.c | 5 + + net/bridge/br_offload.c | 438 ++++++++++++++++++++++++++++++++ + net/bridge/br_private.h | 22 +- + net/bridge/br_private_offload.h | 23 ++ + net/bridge/br_stp.c | 3 + + net/bridge/br_sysfs_br.c | 35 +++ + net/bridge/br_sysfs_if.c | 2 + + net/bridge/br_vlan_tunnel.c | 3 + + 15 files changed, 555 insertions(+), 3 deletions(-) + create mode 100644 net/bridge/br_offload.c + create mode 100644 net/bridge/br_private_offload.h + +diff --git a/include/linux/if_bridge.h b/include/linux/if_bridge.h +index 18d3b264b754..944630df0ec3 100644 --- a/include/linux/if_bridge.h +++ b/include/linux/if_bridge.h @@ -59,6 +59,7 @@ struct br_ip_list { @@ -8,6 +35,8 @@ #define BR_DEFAULT_AGEING_TIME (300 * HZ) +diff --git a/net/bridge/Makefile b/net/bridge/Makefile +index 7fb9a021873b..0ebf3665c216 100644 --- a/net/bridge/Makefile +++ b/net/bridge/Makefile @@ -5,7 +5,7 @@ @@ -19,6 +48,8 @@ br_ioctl.o br_stp.o br_stp_bpdu.o \ br_stp_if.o br_stp_timer.o br_netlink.o \ br_netlink_tunnel.o br_arp_nd_proxy.o +diff --git a/net/bridge/br.c b/net/bridge/br.c +index d3a32c6813e0..42e4d4fec604 100644 --- a/net/bridge/br.c +++ b/net/bridge/br.c @@ -18,6 +18,7 @@ @@ -40,7 +71,7 @@ err = register_pernet_subsys(&br_net_ops); if (err) goto err_out1; -@@ -430,6 +435,8 @@ err_out3: +@@ -430,6 +435,8 @@ static int __init br_init(void) err_out2: unregister_pernet_subsys(&br_net_ops); err_out1: @@ -57,9 +88,11 @@ br_fdb_fini(); } +diff --git a/net/bridge/br_device.c b/net/bridge/br_device.c +index 8d6bab244c4a..d69d8e9ed7aa 100644 --- a/net/bridge/br_device.c +++ b/net/bridge/br_device.c -@@ -524,6 +524,8 @@ void br_dev_setup(struct net_device *dev +@@ -524,6 +524,8 @@ void br_dev_setup(struct net_device *dev) br->bridge_hello_time = br->hello_time = 2 * HZ; br->bridge_forward_delay = br->forward_delay = 15 * HZ; br->bridge_ageing_time = br->ageing_time = BR_DEFAULT_AGEING_TIME; @@ -68,6 +101,8 @@ dev->max_mtu = ETH_MAX_MTU; br_netfilter_rtable_init(br); +diff --git a/net/bridge/br_fdb.c b/net/bridge/br_fdb.c +index 46812b659710..20ea8f75d140 100644 --- a/net/bridge/br_fdb.c +++ b/net/bridge/br_fdb.c @@ -23,6 +23,7 @@ @@ -78,7 +113,7 @@ static const struct rhashtable_params br_fdb_rht_params = { .head_offset = offsetof(struct net_bridge_fdb_entry, rhnode), -@@ -518,6 +519,8 @@ static struct net_bridge_fdb_entry *fdb_ +@@ -518,6 +519,8 @@ static struct net_bridge_fdb_entry *fdb_create(struct net_bridge *br, fdb->key.vlan_id = vid; fdb->flags = flags; fdb->updated = fdb->used = jiffies; @@ -87,7 +122,7 @@ if (rhashtable_lookup_insert_fast(&br->fdb_hash_tbl, &fdb->rhnode, br_fdb_rht_params)) { -@@ -794,6 +797,8 @@ static void fdb_notify(struct net_bridge +@@ -794,6 +797,8 @@ static void fdb_notify(struct net_bridge *br, struct sk_buff *skb; int err = -ENOBUFS; @@ -96,6 +131,8 @@ if (swdev_notify) br_switchdev_fdb_notify(br, fdb, type); +diff --git a/net/bridge/br_forward.c b/net/bridge/br_forward.c +index 9fe5c888f27d..6d9025106d9d 100644 --- a/net/bridge/br_forward.c +++ b/net/bridge/br_forward.c @@ -16,6 +16,7 @@ @@ -106,7 +143,7 @@ /* Don't forward packets to originating port or forwarding disabled */ static inline int should_deliver(const struct net_bridge_port *p, -@@ -32,6 +33,8 @@ static inline int should_deliver(const s +@@ -32,6 +33,8 @@ static inline int should_deliver(const struct net_bridge_port *p, int br_dev_queue_push_xmit(struct net *net, struct sock *sk, struct sk_buff *skb) { @@ -115,6 +152,8 @@ skb_push(skb, ETH_HLEN); if (!is_skb_forwardable(skb->dev, skb)) goto drop; +diff --git a/net/bridge/br_if.c b/net/bridge/br_if.c +index 4a02f8bb278a..b1d3295b861c 100644 --- a/net/bridge/br_if.c +++ b/net/bridge/br_if.c @@ -25,6 +25,7 @@ @@ -125,7 +164,7 @@ /* * Determine initial path cost based on speed. -@@ -428,7 +429,7 @@ static struct net_bridge_port *new_nbp(s +@@ -428,7 +429,7 @@ static struct net_bridge_port *new_nbp(struct net_bridge *br, p->path_cost = port_cost(dev); p->priority = 0x8000 >> BR_PORT_BITS; p->port_no = index; @@ -134,7 +173,7 @@ br_init_port(p); br_set_state(p, BR_STATE_DISABLED); br_stp_port_timer_init(p); -@@ -771,6 +772,9 @@ void br_port_flags_change(struct net_bri +@@ -771,6 +772,9 @@ void br_port_flags_change(struct net_bridge_port *p, unsigned long mask) if (mask & BR_NEIGH_SUPPRESS) br_recalculate_neigh_suppress_enabled(br); @@ -144,6 +183,8 @@ } bool br_port_flag_is_set(const struct net_device *dev, unsigned long flag) +diff --git a/net/bridge/br_input.c b/net/bridge/br_input.c +index 65416af73714..b0601e6aed8c 100644 --- a/net/bridge/br_input.c +++ b/net/bridge/br_input.c @@ -22,6 +22,7 @@ @@ -154,7 +195,7 @@ static int br_netif_receive_skb(struct net *net, struct sock *sk, struct sk_buff *skb) -@@ -171,6 +172,7 @@ int br_handle_frame_finish(struct net *n +@@ -171,6 +172,7 @@ int br_handle_frame_finish(struct net *net, struct sock *sk, struct sk_buff *skb dst->used = now; br_forward(dst->dst, skb, local_rcv, false); } else { @@ -162,7 +203,7 @@ if (!mcast_hit) br_flood(br, skb, pkt_type, local_rcv, false); else -@@ -304,6 +306,9 @@ static rx_handler_result_t br_handle_fra +@@ -304,6 +306,9 @@ static rx_handler_result_t br_handle_frame(struct sk_buff **pskb) memset(skb->cb, 0, sizeof(struct br_input_skb_cb)); p = br_port_get_rcu(skb->dev); @@ -172,6 +213,9 @@ if (p->flags & BR_VLAN_TUNNEL) br_handle_ingress_vlan_tunnel(skb, p, nbp_vlan_group_rcu(p)); +diff --git a/net/bridge/br_offload.c b/net/bridge/br_offload.c +new file mode 100644 +index 000000000000..88173ed11093 --- /dev/null +++ b/net/bridge/br_offload.c @@ -0,0 +1,438 @@ @@ -613,6 +657,8 @@ +{ + kmem_cache_destroy(offload_cache); +} +diff --git a/net/bridge/br_private.h b/net/bridge/br_private.h +index bd218c2b2cd9..951ba1d993ca 100644 --- a/net/bridge/br_private.h +++ b/net/bridge/br_private.h @@ -268,7 +268,13 @@ struct net_bridge_fdb_entry { @@ -672,6 +718,9 @@ #ifdef CONFIG_NET_SWITCHDEV /* Set if TX data plane offloading is used towards at least one +diff --git a/net/bridge/br_private_offload.h b/net/bridge/br_private_offload.h +new file mode 100644 +index 000000000000..97c13af2866b --- /dev/null +++ b/net/bridge/br_private_offload.h @@ -0,0 +1,23 @@ @@ -698,6 +747,8 @@ +} + +#endif +diff --git a/net/bridge/br_stp.c b/net/bridge/br_stp.c +index 1d80f34a139c..b57788b53d24 100644 --- a/net/bridge/br_stp.c +++ b/net/bridge/br_stp.c @@ -12,6 +12,7 @@ @@ -708,7 +759,7 @@ /* since time values in bpdu are in jiffies and then scaled (1/256) * before sending, make sure that is at least one STP tick. -@@ -52,6 +53,8 @@ void br_set_state(struct net_bridge_port +@@ -52,6 +53,8 @@ void br_set_state(struct net_bridge_port *p, unsigned int state) (unsigned int) p->port_no, p->dev->name, br_port_state_names[p->state]); @@ -717,6 +768,8 @@ if (p->br->stp_enabled == BR_KERNEL_STP) { switch (p->state) { case BR_STATE_BLOCKING: +diff --git a/net/bridge/br_sysfs_br.c b/net/bridge/br_sysfs_br.c +index 7b0c19772111..814cbfb77d25 100644 --- a/net/bridge/br_sysfs_br.c +++ b/net/bridge/br_sysfs_br.c @@ -18,6 +18,7 @@ @@ -727,7 +780,7 @@ /* IMPORTANT: new bridge options must be added with netlink support only * please do not add new sysfs entries -@@ -930,6 +931,38 @@ static ssize_t vlan_stats_per_port_store +@@ -930,6 +931,38 @@ static ssize_t vlan_stats_per_port_store(struct device *d, static DEVICE_ATTR_RW(vlan_stats_per_port); #endif @@ -766,7 +819,7 @@ static struct attribute *bridge_attrs[] = { &dev_attr_forward_delay.attr, &dev_attr_hello_time.attr, -@@ -984,6 +1017,8 @@ static struct attribute *bridge_attrs[] +@@ -984,6 +1017,8 @@ static struct attribute *bridge_attrs[] = { &dev_attr_vlan_stats_enabled.attr, &dev_attr_vlan_stats_per_port.attr, #endif @@ -775,9 +828,11 @@ NULL }; +diff --git a/net/bridge/br_sysfs_if.c b/net/bridge/br_sysfs_if.c +index 9ee9c60738e2..2b44e5fb19e4 100644 --- a/net/bridge/br_sysfs_if.c +++ b/net/bridge/br_sysfs_if.c -@@ -241,6 +241,7 @@ BRPORT_ATTR_FLAG(broadcast_flood, BR_BCA +@@ -241,6 +241,7 @@ BRPORT_ATTR_FLAG(broadcast_flood, BR_BCAST_FLOOD); BRPORT_ATTR_FLAG(neigh_suppress, BR_NEIGH_SUPPRESS); BRPORT_ATTR_FLAG(isolated, BR_ISOLATED); BRPORT_ATTR_FLAG(bpdu_filter, BR_BPDU_FILTER); @@ -785,7 +840,7 @@ #ifdef CONFIG_BRIDGE_IGMP_SNOOPING static ssize_t show_multicast_router(struct net_bridge_port *p, char *buf) -@@ -295,6 +296,7 @@ static const struct brport_attribute *br +@@ -295,6 +296,7 @@ static const struct brport_attribute *brport_attrs[] = { &brport_attr_isolated, &brport_attr_bpdu_filter, &brport_attr_backup_port, @@ -793,6 +848,8 @@ NULL }; +diff --git a/net/bridge/br_vlan_tunnel.c b/net/bridge/br_vlan_tunnel.c +index 6399a8a69d07..ffc65dc4eea8 100644 --- a/net/bridge/br_vlan_tunnel.c +++ b/net/bridge/br_vlan_tunnel.c @@ -15,6 +15,7 @@ @@ -803,7 +860,7 @@ static inline int br_vlan_tunid_cmp(struct rhashtable_compare_arg *arg, const void *ptr) -@@ -180,6 +181,7 @@ void br_handle_ingress_vlan_tunnel(struc +@@ -180,6 +181,7 @@ void br_handle_ingress_vlan_tunnel(struct sk_buff *skb, skb_dst_drop(skb); __vlan_hwaccel_put_tag(skb, p->br->vlan_proto, vlan->vid); @@ -811,7 +868,7 @@ } int br_handle_egress_vlan_tunnel(struct sk_buff *skb, -@@ -201,6 +203,7 @@ int br_handle_egress_vlan_tunnel(struct +@@ -201,6 +203,7 @@ int br_handle_egress_vlan_tunnel(struct sk_buff *skb, if (err) return err; @@ -819,3 +876,5 @@ tunnel_dst = rcu_dereference(vlan->tinfo.tunnel_dst); if (tunnel_dst && dst_hold_safe(&tunnel_dst->dst)) skb_dst_set(skb, &tunnel_dst->dst); +-- + diff --git a/target/linux/generic/hack-5.15/711-net-dsa-mv88e6xxx-disable-ATU-violation.patch b/target/linux/generic/hack-5.15/711-net-dsa-mv88e6xxx-disable-ATU-violation.patch index 5e2b2910ab..8d7919a6e4 100644 --- a/target/linux/generic/hack-5.15/711-net-dsa-mv88e6xxx-disable-ATU-violation.patch +++ b/target/linux/generic/hack-5.15/711-net-dsa-mv88e6xxx-disable-ATU-violation.patch @@ -1,6 +1,17 @@ +From ebd924d773223593142d417c41d4ee6fa16f1805 Mon Sep 17 00:00:00 2001 +From: OpenWrt community +Date: Wed, 13 Jul 2022 13:45:56 +0200 +Subject: [PATCH] net/dsa/mv88e6xxx: disable ATU violation + +--- + drivers/net/dsa/mv88e6xxx/chip.c | 3 +++ + 1 file changed, 3 insertions(+) + +diff --git a/drivers/net/dsa/mv88e6xxx/chip.c b/drivers/net/dsa/mv88e6xxx/chip.c +index cad98ab421d7..790e1887d73b 100644 --- a/drivers/net/dsa/mv88e6xxx/chip.c +++ b/drivers/net/dsa/mv88e6xxx/chip.c -@@ -2981,6 +2981,9 @@ static int mv88e6xxx_setup_port(struct m +@@ -2981,6 +2981,9 @@ static int mv88e6xxx_setup_port(struct mv88e6xxx_chip *chip, int port) else reg = 1 << port; @@ -10,3 +21,5 @@ err = mv88e6xxx_port_write(chip, port, MV88E6XXX_PORT_ASSOC_VECTOR, reg); if (err) +-- + diff --git a/target/linux/generic/hack-5.15/780-usb-net-MeigLink_modem_support.patch b/target/linux/generic/hack-5.15/780-usb-net-MeigLink_modem_support.patch index d067ef973e..fcf0a412ae 100644 --- a/target/linux/generic/hack-5.15/780-usb-net-MeigLink_modem_support.patch +++ b/target/linux/generic/hack-5.15/780-usb-net-MeigLink_modem_support.patch @@ -1,6 +1,18 @@ +From f81700b6bb2eda3756247bce472d8eaf6f466f61 Mon Sep 17 00:00:00 2001 +From: OpenWrt community +Date: Wed, 13 Jul 2022 13:49:26 +0200 +Subject: [PATCH] net/usb/qmi_wwan: add MeigLink modem support + +--- + drivers/net/usb/qmi_wwan.c | 1 + + drivers/usb/serial/option.c | 7 +++++++ + 2 files changed, 8 insertions(+) + +diff --git a/drivers/net/usb/qmi_wwan.c b/drivers/net/usb/qmi_wwan.c +index 8f1487f41085..d992985d599e 100644 --- a/drivers/net/usb/qmi_wwan.c +++ b/drivers/net/usb/qmi_wwan.c -@@ -1085,6 +1085,7 @@ static const struct usb_device_id produc +@@ -1085,6 +1085,7 @@ static const struct usb_device_id products[] = { {QMI_MATCH_FF_FF_FF(0x2c7c, 0x0512)}, /* Quectel EG12/EM12 */ {QMI_MATCH_FF_FF_FF(0x2c7c, 0x0620)}, /* Quectel EM160R-GL */ {QMI_MATCH_FF_FF_FF(0x2c7c, 0x0800)}, /* Quectel RM500Q-GL */ @@ -8,9 +20,11 @@ /* 3. Combined interface devices matching on interface number */ {QMI_FIXED_INTF(0x0408, 0xea42, 4)}, /* Yota / Megafon M100-1 */ +diff --git a/drivers/usb/serial/option.c b/drivers/usb/serial/option.c +index de59fa919540..9f00d047f5e9 100644 --- a/drivers/usb/serial/option.c +++ b/drivers/usb/serial/option.c -@@ -243,6 +243,8 @@ static void option_instat_callback(struc +@@ -243,6 +243,8 @@ static void option_instat_callback(struct urb *urb); #define UBLOX_PRODUCT_R6XX 0x90fa /* These Yuga products use Qualcomm's vendor ID */ #define YUGA_PRODUCT_CLM920_NC5 0x9625 @@ -19,7 +33,7 @@ #define QUECTEL_VENDOR_ID 0x2c7c /* These Quectel products use Quectel's vendor ID */ -@@ -1133,6 +1135,11 @@ static const struct usb_device_id option +@@ -1133,6 +1135,11 @@ static const struct usb_device_id option_ids[] = { { USB_DEVICE_AND_INTERFACE_INFO(QUECTEL_VENDOR_ID, QUECTEL_PRODUCT_EG95, 0xff, 0, 0) }, { USB_DEVICE(QUECTEL_VENDOR_ID, QUECTEL_PRODUCT_BG96), .driver_info = RSVD(4) }, @@ -31,3 +45,5 @@ { USB_DEVICE_AND_INTERFACE_INFO(QUECTEL_VENDOR_ID, QUECTEL_PRODUCT_EP06, 0xff, 0xff, 0xff), .driver_info = RSVD(1) | RSVD(2) | RSVD(3) | RSVD(4) | NUMEP2 }, { USB_DEVICE_AND_INTERFACE_INFO(QUECTEL_VENDOR_ID, QUECTEL_PRODUCT_EP06, 0xff, 0, 0) }, +-- + diff --git a/target/linux/generic/hack-5.15/920-device_tree_cmdline.patch b/target/linux/generic/hack-5.15/920-device_tree_cmdline.patch index 287b85996d..0051edc25e 100644 --- a/target/linux/generic/hack-5.15/920-device_tree_cmdline.patch +++ b/target/linux/generic/hack-5.15/920-device_tree_cmdline.patch @@ -1,6 +1,17 @@ +From e08bcbbaa52fcc41f02743fd2e62a33255ce52da Mon Sep 17 00:00:00 2001 +From: OpenWrt community +Date: Wed, 13 Jul 2022 13:52:28 +0200 +Subject: [PATCH] of/ftd: add device tree cmdline + +--- + drivers/of/fdt.c | 3 +++ + 1 file changed, 3 insertions(+) + +diff --git a/drivers/of/fdt.c b/drivers/of/fdt.c +index 59a7a9ee58ef..3b0b62b410dd 100644 --- a/drivers/of/fdt.c +++ b/drivers/of/fdt.c -@@ -1158,6 +1158,9 @@ int __init early_init_dt_scan_chosen(uns +@@ -1158,6 +1158,9 @@ int __init early_init_dt_scan_chosen(unsigned long node, const char *uname, p = of_get_flat_dt_prop(node, "bootargs", &l); if (p != NULL && l > 0) strlcpy(data, p, min(l, COMMAND_LINE_SIZE)); @@ -10,3 +21,5 @@ /* * CONFIG_CMDLINE is meant to be a default in case nothing else +-- + diff --git a/target/linux/generic/pending-5.15/101-Use-stddefs.h-instead-of-compiler.h.patch b/target/linux/generic/pending-5.15/101-Use-stddefs.h-instead-of-compiler.h.patch index 824b9444ee..eefbe4b543 100644 --- a/target/linux/generic/pending-5.15/101-Use-stddefs.h-instead-of-compiler.h.patch +++ b/target/linux/generic/pending-5.15/101-Use-stddefs.h-instead-of-compiler.h.patch @@ -1,3 +1,16 @@ +From d3c5b26768dbe990c4e1bd79e420c11ce7491d51 Mon Sep 17 00:00:00 2001 +From: OpenWrt community +Date: Wed, 13 Jul 2022 11:36:00 +0200 +Subject: [PATCH] swab: use stddefs.h instead of compiler.h + +Fix an issue with kernel headers that broke perf. + +--- + include/uapi/linux/swab.h | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/include/uapi/linux/swab.h b/include/uapi/linux/swab.h +index 7272f85d6d6a..3736f2fe1541 100644 --- a/include/uapi/linux/swab.h +++ b/include/uapi/linux/swab.h @@ -3,7 +3,7 @@ @@ -9,3 +22,5 @@ #include #include +-- + diff --git a/target/linux/generic/pending-5.15/400-mtd-mtdsplit-support.patch b/target/linux/generic/pending-5.15/400-mtd-mtdsplit-support.patch index 461341ce76..63df1d070d 100644 --- a/target/linux/generic/pending-5.15/400-mtd-mtdsplit-support.patch +++ b/target/linux/generic/pending-5.15/400-mtd-mtdsplit-support.patch @@ -1,3 +1,18 @@ +From 39717277d5c87bdb183cf2f258957b44ba99b4df Mon Sep 17 00:00:00 2001 +From: OpenWrt community +Date: Wed, 13 Jul 2022 11:47:35 +0200 +Subject: [PATCH] mtd: mtdsplit support + +--- + drivers/mtd/Kconfig | 19 ++++ + drivers/mtd/Makefile | 2 + + drivers/mtd/mtdpart.c | 169 ++++++++++++++++++++++++++++----- + include/linux/mtd/mtd.h | 25 +++++ + include/linux/mtd/partitions.h | 7 ++ + 5 files changed, 197 insertions(+), 25 deletions(-) + +diff --git a/drivers/mtd/Kconfig b/drivers/mtd/Kconfig +index 796a2eccbef0..f9ed93c4cf0f 100644 --- a/drivers/mtd/Kconfig +++ b/drivers/mtd/Kconfig @@ -12,6 +12,25 @@ menuconfig MTD @@ -26,6 +41,21 @@ config MTD_TESTS tristate "MTD tests support (DANGEROUS)" depends on m +diff --git a/drivers/mtd/Makefile b/drivers/mtd/Makefile +index 593d0593a038..b14b7fe0f597 100644 +--- a/drivers/mtd/Makefile ++++ b/drivers/mtd/Makefile +@@ -9,6 +9,8 @@ mtd-y := mtdcore.o mtdsuper.o mtdconcat.o mtdpart.o mtdchar.o + + obj-y += parsers/ + ++obj-$(CONFIG_MTD_SPLIT) += mtdsplit/ ++ + # 'Users' - code which presents functionality to userspace. + obj-$(CONFIG_MTD_BLKDEVS) += mtd_blkdevs.o + obj-$(CONFIG_MTD_BLOCK) += mtdblock.o +diff --git a/drivers/mtd/mtdpart.c b/drivers/mtd/mtdpart.c +index d442fa94c872..f1ed12aae1fe 100644 --- a/drivers/mtd/mtdpart.c +++ b/drivers/mtd/mtdpart.c @@ -15,11 +15,13 @@ @@ -42,7 +72,7 @@ /* * MTD methods which simply translate the effective address and pass through -@@ -236,6 +238,146 @@ static int mtd_add_partition_attrs(struc +@@ -236,6 +238,146 @@ static int mtd_add_partition_attrs(struct mtd_info *new) return ret; } @@ -189,7 +219,7 @@ int mtd_add_partition(struct mtd_info *parent, const char *name, long long offset, long long length) { -@@ -274,6 +416,7 @@ int mtd_add_partition(struct mtd_info *p +@@ -274,6 +416,7 @@ int mtd_add_partition(struct mtd_info *parent, const char *name, if (ret) goto err_remove_part; @@ -197,7 +227,7 @@ mtd_add_partition_attrs(child); return 0; -@@ -422,6 +565,7 @@ int add_mtd_partitions(struct mtd_info * +@@ -422,6 +565,7 @@ int add_mtd_partitions(struct mtd_info *parent, goto err_del_partitions; } @@ -205,7 +235,7 @@ mtd_add_partition_attrs(child); /* Look for subpartitions */ -@@ -438,31 +582,6 @@ err_del_partitions: +@@ -438,31 +582,6 @@ int add_mtd_partitions(struct mtd_info *parent, return ret; } @@ -237,43 +267,11 @@ /* * Many partition parsers just expected the core to kfree() all their data in * one chunk. Do that by default. ---- a/include/linux/mtd/partitions.h -+++ b/include/linux/mtd/partitions.h -@@ -75,6 +75,12 @@ struct mtd_part_parser_data { - * Functions dealing with the various ways of partitioning the space - */ - -+enum mtd_parser_type { -+ MTD_PARSER_TYPE_DEVICE = 0, -+ MTD_PARSER_TYPE_ROOTFS, -+ MTD_PARSER_TYPE_FIRMWARE, -+}; -+ - struct mtd_part_parser { - struct list_head list; - struct module *owner; -@@ -83,6 +89,7 @@ struct mtd_part_parser { - int (*parse_fn)(struct mtd_info *, const struct mtd_partition **, - struct mtd_part_parser_data *); - void (*cleanup)(const struct mtd_partition *pparts, int nr_parts); -+ enum mtd_parser_type type; - }; - - /* Container for passing around a set of parsed partitions */ ---- a/drivers/mtd/Makefile -+++ b/drivers/mtd/Makefile -@@ -9,6 +9,8 @@ mtd-y := mtdcore.o mtdsuper.o mtdconc - - obj-y += parsers/ - -+obj-$(CONFIG_MTD_SPLIT) += mtdsplit/ -+ - # 'Users' - code which presents functionality to userspace. - obj-$(CONFIG_MTD_BLKDEVS) += mtd_blkdevs.o - obj-$(CONFIG_MTD_BLOCK) += mtdblock.o +diff --git a/include/linux/mtd/mtd.h b/include/linux/mtd/mtd.h +index 8a2c60235ebb..b092bf6ff97d 100644 --- a/include/linux/mtd/mtd.h +++ b/include/linux/mtd/mtd.h -@@ -613,6 +613,24 @@ static inline void mtd_align_erase_req(s +@@ -613,6 +613,24 @@ static inline void mtd_align_erase_req(struct mtd_info *mtd, req->len += mtd->erasesize - mod; } @@ -298,7 +296,7 @@ static inline uint32_t mtd_div_by_ws(uint64_t sz, struct mtd_info *mtd) { if (mtd->writesize_shift) -@@ -685,6 +703,13 @@ extern void __put_mtd_device(struct mtd_ +@@ -685,6 +703,13 @@ extern void __put_mtd_device(struct mtd_info *mtd); extern struct mtd_info *get_mtd_device_nm(const char *name); extern void put_mtd_device(struct mtd_info *mtd); @@ -312,3 +310,30 @@ struct mtd_notifier { void (*add)(struct mtd_info *mtd); +diff --git a/include/linux/mtd/partitions.h b/include/linux/mtd/partitions.h +index b74a539ec581..65ba0dbf961d 100644 +--- a/include/linux/mtd/partitions.h ++++ b/include/linux/mtd/partitions.h +@@ -75,6 +75,12 @@ struct mtd_part_parser_data { + * Functions dealing with the various ways of partitioning the space + */ + ++enum mtd_parser_type { ++ MTD_PARSER_TYPE_DEVICE = 0, ++ MTD_PARSER_TYPE_ROOTFS, ++ MTD_PARSER_TYPE_FIRMWARE, ++}; ++ + struct mtd_part_parser { + struct list_head list; + struct module *owner; +@@ -83,6 +89,7 @@ struct mtd_part_parser { + int (*parse_fn)(struct mtd_info *, const struct mtd_partition **, + struct mtd_part_parser_data *); + void (*cleanup)(const struct mtd_partition *pparts, int nr_parts); ++ enum mtd_parser_type type; + }; + + /* Container for passing around a set of parsed partitions */ +-- + diff --git a/target/linux/generic/pending-5.15/482-mtd-spi-nor-add-support-for-Gigadevice-GD25D05.patch b/target/linux/generic/pending-5.15/481-mtd-spi-nor-add-support-for-Gigadevice-GD25D05.patch similarity index 100% rename from target/linux/generic/pending-5.15/482-mtd-spi-nor-add-support-for-Gigadevice-GD25D05.patch rename to target/linux/generic/pending-5.15/481-mtd-spi-nor-add-support-for-Gigadevice-GD25D05.patch diff --git a/target/linux/generic/pending-5.15/482-mtd-spi-nor-add-gd25q512.patch b/target/linux/generic/pending-5.15/482-mtd-spi-nor-add-gd25q512.patch new file mode 100644 index 0000000000..96848e103f --- /dev/null +++ b/target/linux/generic/pending-5.15/482-mtd-spi-nor-add-gd25q512.patch @@ -0,0 +1,25 @@ +From f8943df3beb0d3f9754bb35320c3a378727175a8 Mon Sep 17 00:00:00 2001 +From: OpenWrt community +Date: Thu, 14 Jul 2022 08:38:07 +0200 +Subject: [PATCH] spi-nor/gigadevic: add gd25q512 + +--- + drivers/mtd/spi-nor/gigadevice.c | 3 +++ + 1 file changed, 3 insertions(+) + +diff --git a/drivers/mtd/spi-nor/gigadevice.c b/drivers/mtd/spi-nor/gigadevice.c +index e52ed19d864f..d25292ec1eb9 100644 +--- a/drivers/mtd/spi-nor/gigadevice.c ++++ b/drivers/mtd/spi-nor/gigadevice.c +@@ -53,6 +53,9 @@ static const struct flash_info gigadevice_parts[] = { + SPI_NOR_4B_OPCODES | SPI_NOR_HAS_LOCK | + SPI_NOR_HAS_TB | SPI_NOR_TB_SR_BIT6) + .fixups = &gd25q256_fixups }, ++ { "gd25q512", INFO(0xc84020, 0, 64 * 1024, 1024, ++ SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | ++ SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB | SPI_NOR_4B_OPCODES) }, + }; + + const struct spi_nor_manufacturer spi_nor_gigadevice = { +-- + diff --git a/target/linux/generic/pending-5.15/483-mtd-spi-nor-add-gd25q512.patch b/target/linux/generic/pending-5.15/483-mtd-spi-nor-add-gd25q512.patch deleted file mode 100644 index 6f41546964..0000000000 --- a/target/linux/generic/pending-5.15/483-mtd-spi-nor-add-gd25q512.patch +++ /dev/null @@ -1,12 +0,0 @@ ---- a/drivers/mtd/spi-nor/gigadevice.c -+++ b/drivers/mtd/spi-nor/gigadevice.c -@@ -53,6 +53,9 @@ static const struct flash_info gigadevic - SPI_NOR_4B_OPCODES | SPI_NOR_HAS_LOCK | - SPI_NOR_HAS_TB | SPI_NOR_TB_SR_BIT6) - .fixups = &gd25q256_fixups }, -+ { "gd25q512", INFO(0xc84020, 0, 64 * 1024, 1024, -+ SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | -+ SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB | SPI_NOR_4B_OPCODES) }, - }; - - const struct spi_nor_manufacturer spi_nor_gigadevice = { diff --git a/target/linux/generic/pending-5.15/484-mtd-spi-nor-add-esmt-f25l16pa.patch b/target/linux/generic/pending-5.15/484-mtd-spi-nor-add-esmt-f25l16pa.patch index b2f0b92a18..d5b7259351 100644 --- a/target/linux/generic/pending-5.15/484-mtd-spi-nor-add-esmt-f25l16pa.patch +++ b/target/linux/generic/pending-5.15/484-mtd-spi-nor-add-esmt-f25l16pa.patch @@ -1,3 +1,17 @@ +From 87363cc0e522de3294ea6ae10fb468d2a8d6fb2f Mon Sep 17 00:00:00 2001 +From: OpenWrt community +Date: Wed, 13 Jul 2022 12:17:21 +0200 +Subject: [PATCH] spi-nor/esmt.c: add esmt f25l16pa + +This fixes support for Dongwon T&I DW02-412H which uses F25L16PA(2S) +flash. + +--- + drivers/mtd/spi-nor/esmt.c | 2 ++ + 1 file changed, 2 insertions(+) + +diff --git a/drivers/mtd/spi-nor/esmt.c b/drivers/mtd/spi-nor/esmt.c +index cfc9218c1053..d1750807f005 100644 --- a/drivers/mtd/spi-nor/esmt.c +++ b/drivers/mtd/spi-nor/esmt.c @@ -10,6 +10,8 @@ @@ -9,3 +23,5 @@ { "f25l32pa", INFO(0x8c2016, 0, 64 * 1024, 64, SECT_4K | SPI_NOR_HAS_LOCK | SPI_NOR_SWP_IS_VOLATILE) }, { "f25l32qa", INFO(0x8c4116, 0, 64 * 1024, 64, +-- + diff --git a/target/linux/generic/pending-5.15/485-mtd-spi-nor-add-xmc-xm25qh128c.patch b/target/linux/generic/pending-5.15/485-mtd-spi-nor-add-xmc-xm25qh128c.patch index 4b3f674170..2823464a60 100644 --- a/target/linux/generic/pending-5.15/485-mtd-spi-nor-add-xmc-xm25qh128c.patch +++ b/target/linux/generic/pending-5.15/485-mtd-spi-nor-add-xmc-xm25qh128c.patch @@ -1,6 +1,21 @@ +From f6b33d850f7f12555df2fa0e3349b33427bf5890 Mon Sep 17 00:00:00 2001 +From: OpenWrt community +Date: Wed, 13 Jul 2022 12:19:01 +0200 +Subject: [PATCH] spi-nor/xmc.c: add xm25qh128c + +The XMC XM25QH128C is a 16MB SPI NOR chip. The patch is verified on +Ruijie RG-EW3200GX PRO. +Datasheet available at https://www.xmcwh.com/uploads/435/XM25QH128C.pdf + +--- + drivers/mtd/spi-nor/xmc.c | 2 ++ + 1 file changed, 2 insertions(+) + +diff --git a/drivers/mtd/spi-nor/xmc.c b/drivers/mtd/spi-nor/xmc.c +index 2c7773b68993..99ee43a654c4 100644 --- a/drivers/mtd/spi-nor/xmc.c +++ b/drivers/mtd/spi-nor/xmc.c -@@ -14,6 +14,8 @@ static const struct flash_info xmc_parts +@@ -14,6 +14,8 @@ static const struct flash_info xmc_parts[] = { SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, { "XM25QH128A", INFO(0x207018, 0, 64 * 1024, 256, SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, @@ -9,3 +24,5 @@ }; const struct spi_nor_manufacturer spi_nor_xmc = { +-- + diff --git a/target/linux/generic/pending-5.15/500-fs_cdrom_dependencies.patch b/target/linux/generic/pending-5.15/500-fs_cdrom_dependencies.patch index 0a5a3aae5d..b46865fb55 100644 --- a/target/linux/generic/pending-5.15/500-fs_cdrom_dependencies.patch +++ b/target/linux/generic/pending-5.15/500-fs_cdrom_dependencies.patch @@ -1,3 +1,17 @@ +From af7b91bcecce0eae24e90acd35d96ecee73e1407 Mon Sep 17 00:00:00 2001 +From: OpenWrt community +Date: Wed, 13 Jul 2022 12:21:15 +0200 +Subject: [PATCH] fs: add cdrom dependency + +--- + fs/hfs/Kconfig | 1 + + fs/hfsplus/Kconfig | 1 + + fs/isofs/Kconfig | 1 + + fs/udf/Kconfig | 1 + + 4 files changed, 4 insertions(+) + +diff --git a/fs/hfs/Kconfig b/fs/hfs/Kconfig +index 129926b5142d..e0d2c647aa07 100644 --- a/fs/hfs/Kconfig +++ b/fs/hfs/Kconfig @@ -2,6 +2,7 @@ @@ -8,6 +22,8 @@ select NLS help If you say Y here, you will be able to mount Macintosh-formatted +diff --git a/fs/hfsplus/Kconfig b/fs/hfsplus/Kconfig +index 7d4229aecec0..648d91d1881f 100644 --- a/fs/hfsplus/Kconfig +++ b/fs/hfsplus/Kconfig @@ -2,6 +2,7 @@ @@ -18,6 +34,8 @@ select NLS select NLS_UTF8 help +diff --git a/fs/isofs/Kconfig b/fs/isofs/Kconfig +index 08ffd37b9bb8..f74680379207 100644 --- a/fs/isofs/Kconfig +++ b/fs/isofs/Kconfig @@ -1,6 +1,7 @@ @@ -28,6 +46,8 @@ help This is the standard file system used on CD-ROMs. It was previously known as "High Sierra File System" and is called "hsfs" on other +diff --git a/fs/udf/Kconfig b/fs/udf/Kconfig +index 26e1a49f3ba7..3f85a084d2b5 100644 --- a/fs/udf/Kconfig +++ b/fs/udf/Kconfig @@ -1,6 +1,7 @@ @@ -38,3 +58,5 @@ select CRC_ITU_T select NLS help +-- + diff --git a/target/linux/generic/pending-5.15/683-of_net-add-mac-address-to-of-tree.patch b/target/linux/generic/pending-5.15/683-of_net-add-mac-address-to-of-tree.patch index 88ade300a4..742d58b708 100644 --- a/target/linux/generic/pending-5.15/683-of_net-add-mac-address-to-of-tree.patch +++ b/target/linux/generic/pending-5.15/683-of_net-add-mac-address-to-of-tree.patch @@ -1,6 +1,25 @@ +From 8585756342caa6d27008d1ad0c18023e4211a40a Mon Sep 17 00:00:00 2001 +From: OpenWrt community +Date: Wed, 13 Jul 2022 12:22:48 +0200 +Subject: [PATCH] of/of_net: write back netdev MAC-address to device-tree + +The label-mac logic relies on the mac-address property of a netdev +devices of-node. However, the mac address can also be stored as a +different property or read from e.g. an mtd device. + +Create this node when reading a mac-address from OF if it does not +already exist and copy the mac-address used for the device to this +property. This way, the MAC address can be accessed using procfs. + +--- + net/core/of_net.c | 22 ++++++++++++++++++++++ + 1 file changed, 22 insertions(+) + +diff --git a/net/core/of_net.c b/net/core/of_net.c +index 71c38b532f72..43b28c8ddff9 100644 --- a/net/core/of_net.c +++ b/net/core/of_net.c -@@ -95,6 +95,27 @@ static int of_get_mac_addr_nvmem(struct +@@ -95,6 +95,27 @@ static int of_get_mac_addr_nvmem(struct device_node *np, u8 *addr) return 0; } @@ -28,7 +47,7 @@ /** * of_get_mac_address() * @np: Caller's Device Node -@@ -175,6 +196,7 @@ found: +@@ -175,6 +196,7 @@ int of_get_mac_address(struct device_node *np, u8 *addr) addr[5] = (mac_val >> 0) & 0xff; } @@ -36,3 +55,5 @@ return ret; } EXPORT_SYMBOL(of_get_mac_address); +-- + diff --git a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-r619ac.dtsi b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-r619ac.dtsi index 33be77ec36..87e0d103b7 100644 --- a/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-r619ac.dtsi +++ b/target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-r619ac.dtsi @@ -353,12 +353,12 @@ status = "okay"; nvmem-cell-names = "pre-calibration"; nvmem-cells = <&precal_art_1000>; - qcom,ath10k-calibration-variant = "P&W R619AC"; + qcom,ath10k-calibration-variant = "P&W-R619AC"; }; &wifi1 { status = "okay"; nvmem-cell-names = "pre-calibration"; nvmem-cells = <&precal_art_5000>; - qcom,ath10k-calibration-variant = "P&W R619AC"; + qcom,ath10k-calibration-variant = "P&W-R619AC"; }; diff --git a/target/linux/ipq40xx/image/generic.mk b/target/linux/ipq40xx/image/generic.mk index 26d9082638..792122f7a1 100644 --- a/target/linux/ipq40xx/image/generic.mk +++ b/target/linux/ipq40xx/image/generic.mk @@ -576,7 +576,7 @@ define Device/glinet_gl-b2200 pad-to 33792k | append-rootfs |\ append-metadata | gzip IMAGE/sysupgrade.bin := sysupgrade-tar | append-metadata - DEVICE_PACKAGES := ath10k-firmware-qca9888-ct ipq-wifi-glinet_gl-b2200 \ + DEVICE_PACKAGES := ath10k-firmware-qca9888-ct \ kmod-fs-ext4 kmod-mmc kmod-spi-dev mkf2fs e2fsprogs kmod-fs-f2fs endef TARGET_DEVICES += glinet_gl-b2200 diff --git a/target/linux/mediatek/patches-5.15/920-dts-mt7622-bpi-r64-fix-wps-button.patch b/target/linux/mediatek/patches-5.15/920-linux-next-dts-mt7622-bpi-r64-fix-wps-button.patch similarity index 100% rename from target/linux/mediatek/patches-5.15/920-dts-mt7622-bpi-r64-fix-wps-button.patch rename to target/linux/mediatek/patches-5.15/920-linux-next-dts-mt7622-bpi-r64-fix-wps-button.patch diff --git a/target/linux/realtek/files-5.10/drivers/net/ethernet/rtl838x_eth.c b/target/linux/realtek/files-5.10/drivers/net/ethernet/rtl838x_eth.c index cf6aabc614..0eee06d803 100644 --- a/target/linux/realtek/files-5.10/drivers/net/ethernet/rtl838x_eth.c +++ b/target/linux/realtek/files-5.10/drivers/net/ethernet/rtl838x_eth.c @@ -92,67 +92,60 @@ struct notify_b { u32 reserved2[8]; }; -static void rtl838x_create_tx_header(struct p_hdr *h, int dest_port, int prio) +static void rtl838x_create_tx_header(struct p_hdr *h, unsigned int dest_port, int prio) { - prio &= 0x7; + // cpu_tag[0] is reserved on the RTL83XX SoCs + h->cpu_tag[1] = 0x0401; // BIT 10: RTL8380_CPU_TAG, BIT0: L2LEARNING on + h->cpu_tag[2] = 0x0200; // Set only AS_DPM, to enable DPM settings below + h->cpu_tag[3] = 0x0000; + h->cpu_tag[4] = BIT(dest_port) >> 16; + h->cpu_tag[5] = BIT(dest_port) & 0xffff; - if (dest_port > 0) { - // cpu_tag[0] is reserved on the RTL83XX SoCs - h->cpu_tag[1] = 0x0401; // BIT 10: RTL8380_CPU_TAG, BIT0: L2LEARNING on - h->cpu_tag[2] = 0x0200; // Set only AS_DPM, to enable DPM settings below - h->cpu_tag[3] = 0x0000; + /* Set internal priority (PRI) and enable (AS_PRI) */ + if (prio >= 0) + h->cpu_tag[2] |= ((prio & 0x7) | BIT(3)) << 12; +} + +static void rtl839x_create_tx_header(struct p_hdr *h, unsigned int dest_port, int prio) +{ + // cpu_tag[0] is reserved on the RTL83XX SoCs + h->cpu_tag[1] = 0x0100; // RTL8390_CPU_TAG marker + h->cpu_tag[2] = BIT(4) | BIT(7); /* AS_DPM (4) and L2LEARNING (7) flags */ + h->cpu_tag[3] = h->cpu_tag[4] = h->cpu_tag[5] = 0; + // h->cpu_tag[1] |= BIT(1) | BIT(0); // Bypass filter 1/2 + if (dest_port >= 32) { + dest_port -= 32; + h->cpu_tag[2] = BIT(dest_port) >> 16; + h->cpu_tag[3] = BIT(dest_port) & 0xffff; + } else { h->cpu_tag[4] = BIT(dest_port) >> 16; h->cpu_tag[5] = BIT(dest_port) & 0xffff; - // Set internal priority and AS_PRIO - if (prio >= 0) - h->cpu_tag[2] |= (prio | 0x8) << 12; } + + /* Set internal priority (PRI) and enable (AS_PRI) */ + if (prio >= 0) + h->cpu_tag[2] |= ((prio & 0x7) | BIT(3)) << 8; } -static void rtl839x_create_tx_header(struct p_hdr *h, int dest_port, int prio) -{ - prio &= 0x7; - - if (dest_port > 0) { - // cpu_tag[0] is reserved on the RTL83XX SoCs - h->cpu_tag[1] = 0x0100; // RTL8390_CPU_TAG marker - h->cpu_tag[2] = h->cpu_tag[3] = h->cpu_tag[4] = h->cpu_tag[5] = 0; - // h->cpu_tag[1] |= BIT(1) | BIT(0); // Bypass filter 1/2 - if (dest_port >= 32) { - dest_port -= 32; - h->cpu_tag[2] = BIT(dest_port) >> 16; - h->cpu_tag[3] = BIT(dest_port) & 0xffff; - } else { - h->cpu_tag[4] = BIT(dest_port) >> 16; - h->cpu_tag[5] = BIT(dest_port) & 0xffff; - } - h->cpu_tag[2] |= BIT(5); // Enable destination port mask use - h->cpu_tag[2] |= BIT(8); // Enable L2 Learning - // Set internal priority and AS_PRIO - if (prio >= 0) - h->cpu_tag[1] |= prio | BIT(3); - } -} - -static void rtl930x_create_tx_header(struct p_hdr *h, int dest_port, int prio) +static void rtl930x_create_tx_header(struct p_hdr *h, unsigned int dest_port, int prio) { h->cpu_tag[0] = 0x8000; // CPU tag marker h->cpu_tag[1] = h->cpu_tag[2] = 0; - if (prio >= 0) - h->cpu_tag[2] = BIT(13) | prio << 8; // Enable and set Priority Queue h->cpu_tag[3] = 0; h->cpu_tag[4] = 0; h->cpu_tag[5] = 0; h->cpu_tag[6] = BIT(dest_port) >> 16; h->cpu_tag[7] = BIT(dest_port) & 0xffff; + + /* Enable (AS_QID) and set priority queue (QID) */ + if (prio >= 0) + h->cpu_tag[2] = (BIT(5) | (prio & 0x1f)) << 8; } -static void rtl931x_create_tx_header(struct p_hdr *h, int dest_port, int prio) +static void rtl931x_create_tx_header(struct p_hdr *h, unsigned int dest_port, int prio) { h->cpu_tag[0] = 0x8000; // CPU tag marker h->cpu_tag[1] = h->cpu_tag[2] = 0; - if (prio >= 0) - h->cpu_tag[2] = BIT(13) | prio << 8; // Enable and set Priority Queue h->cpu_tag[3] = 0; h->cpu_tag[4] = h->cpu_tag[5] = h->cpu_tag[6] = h->cpu_tag[7] = 0; if (dest_port >= 32) { @@ -163,6 +156,10 @@ static void rtl931x_create_tx_header(struct p_hdr *h, int dest_port, int prio) h->cpu_tag[6] = BIT(dest_port) >> 16; h->cpu_tag[7] = BIT(dest_port) & 0xffff; } + + /* Enable (AS_QID) and set priority queue (QID) */ + if (prio >= 0) + h->cpu_tag[2] = (BIT(5) | (prio & 0x1f)) << 8; } static void rtl93xx_header_vlan_set(struct p_hdr *h, int vlan) @@ -1142,9 +1139,10 @@ static int rtl838x_eth_tx(struct sk_buff *skb, struct net_device *dev) len = skb->len; /* Check for DSA tagging at the end of the buffer */ - if (netdev_uses_dsa(dev) && skb->data[len-4] == 0x80 && skb->data[len-3] > 0 - && skb->data[len-3] < priv->cpu_port && skb->data[len-2] == 0x10 - && skb->data[len-1] == 0x00) { + if (netdev_uses_dsa(dev) && skb->data[len-4] == 0x80 + && skb->data[len-3] < priv->cpu_port + && skb->data[len-2] == 0x10 + && skb->data[len-1] == 0x00) { /* Reuse tag space for CRC if possible */ dest_port = skb->data[len-3]; skb->data[len-4] = skb->data[len-3] = skb->data[len-2] = skb->data[len-1] = 0x00; @@ -1171,7 +1169,8 @@ static int rtl838x_eth_tx(struct sk_buff *skb, struct net_device *dev) h->len -= 4; } - priv->r->create_tx_header(h, dest_port, skb->priority >> 1); + if (dest_port >= 0) + priv->r->create_tx_header(h, dest_port, skb->priority >> 1); /* Copy packet data to tx buffer */ memcpy((void *)KSEG1ADDR(h->buf), skb->data, len); diff --git a/target/linux/realtek/files-5.10/drivers/net/ethernet/rtl838x_eth.h b/target/linux/realtek/files-5.10/drivers/net/ethernet/rtl838x_eth.h index 2d1f80dc9d..5db5f545b9 100644 --- a/target/linux/realtek/files-5.10/drivers/net/ethernet/rtl838x_eth.h +++ b/target/linux/realtek/files-5.10/drivers/net/ethernet/rtl838x_eth.h @@ -436,7 +436,7 @@ struct rtl838x_eth_reg { int mac; int l2_tbl_flush_ctrl; void (*update_cntr)(int r, int work_done); - void (*create_tx_header)(struct p_hdr *h, int dest_port, int prio); + void (*create_tx_header)(struct p_hdr *h, unsigned int dest_port, int prio); bool (*decode_tag)(struct p_hdr *h, struct dsa_tag *tag); }; diff --git a/tools/automake/files/aclocal b/tools/automake/files/aclocal index a60df10c42..689cb041f5 100755 --- a/tools/automake/files/aclocal +++ b/tools/automake/files/aclocal @@ -1,2 +1,2 @@ #!/usr/bin/env sh -aclocal.real $ACLOCAL_INCLUDE $@ +${STAGING_DIR_HOST}/bin/aclocal.real $ACLOCAL_INCLUDE $@ diff --git a/tools/coreutils/Makefile b/tools/coreutils/Makefile index fc5c259d8f..87c9102fa6 100644 --- a/tools/coreutils/Makefile +++ b/tools/coreutils/Makefile @@ -16,7 +16,7 @@ PKG_HASH:=4458d8de7849df44ccab15e16b1548b285224dbba5f08fac070c1c0e0bcc4cfa HOST_BUILD_PARALLEL := 1 -BUILD_PROGRAMS = date readlink touch ln chown +BUILD_PROGRAMS = date readlink touch ln chown ginstall include $(INCLUDE_DIR)/host-build.mk @@ -31,7 +31,8 @@ HOST_MAKE_FLAGS += \ define Host/Install $(INSTALL_DIR) $(1)/bin - $(CP) $(patsubst %,$(HOST_BUILD_DIR)/%,$(BUILD_BINS)) $(1)/bin/ + $(INSTALL_BIN) $(patsubst %,$(HOST_BUILD_DIR)/%,$(BUILD_BINS)) $(1)/bin/ + ln -sf ginstall $(1)/bin/install endef $(eval $(call HostBuild))