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Merge Official Source

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Signed-off-by: Tianling Shen <cnsztl@immortalwrt.org>
This commit is contained in:
Tianling Shen 2021-03-09 18:04:19 +08:00
commit e5404a90e4
No known key found for this signature in database
GPG Key ID: 6850B6345C862176
27 changed files with 526 additions and 104 deletions
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1
.gitignore vendored
View File

@ -29,3 +29,4 @@ git-src
.project
.cproject
.ccache
.vscode

2
package/boot/arm-trusted-firmware-mediatek/Makefile
View File

@ -48,7 +48,7 @@ define Trusted-Firmware-A/mt7622-snand-1ddr
endef
define Trusted-Firmware-A/mt7622-snand-2ddr
NAME:=MediaTek MT7622 (SPI-SNAND, 2x DDR3)
NAME:=MediaTek MT7622 (SPI-NAND, 2x DDR3)
BOOT_DEVICE:=snand
DDR3_FLYBY:=1
endef

8
package/libs/libselinux/Makefile
View File

@ -6,12 +6,12 @@
include $(TOPDIR)/rules.mk
PKG_NAME:=libselinux
PKG_VERSION:=3.1
PKG_RELEASE:=3
PKG_VERSION:=3.2
PKG_RELEASE:=1
PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.gz
PKG_SOURCE_URL:=https://github.com/SELinuxProject/selinux/releases/download/20200710
PKG_HASH:=ea5dcbb4d859e3f999c26a13c630da2f16dff9462e3cc8cb7b458ac157d112e7
PKG_SOURCE_URL:=https://github.com/SELinuxProject/selinux/releases/download/3.2
PKG_HASH:=df758ef1d9d4811051dd901ea6b029ae334ffd7c671c128beb16bce1e25ac161
HOST_BUILD_DEPENDS:=libsepol/host pcre/host
PKG_LICENSE:=libselinux-1.0

6
package/libs/libsemanage/Makefile
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@ -6,12 +6,12 @@
include $(TOPDIR)/rules.mk
PKG_NAME:=libsemanage
PKG_VERSION:=3.1
PKG_VERSION:=3.2
PKG_RELEASE:=1
PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.gz
PKG_SOURCE_URL:=https://github.com/SELinuxProject/selinux/releases/download/20200710
PKG_HASH:=22d6c75526e40d1781c30bcf29abf97171bdfe6780923f11c8e1c76a75a21ff8
PKG_SOURCE_URL:=https://github.com/SELinuxProject/selinux/releases/download/3.2
PKG_HASH:=d722a55ca4fe2d4e2b30527720db657e6238b28079e69e2e4affeb8e733ee511
PKG_MAINTAINER:=Thomas Petazzoni <thomas.petazzoni@bootlin.com>
PKG_LICENSE:=LGPL-2.1
PKG_LICENSE_FILES:=COPYING

6
package/libs/libsepol/Makefile
View File

@ -6,12 +6,12 @@
include $(TOPDIR)/rules.mk
PKG_NAME:=libsepol
PKG_VERSION:=3.1
PKG_VERSION:=3.2
PKG_RELEASE:=1
PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.gz
PKG_SOURCE_URL:=https://github.com/SELinuxProject/selinux/releases/download/20200710
PKG_HASH:=ae6778d01443fdd38cd30eeee846494e19f4d407b09872580372f4aa4bf8a3cc
PKG_SOURCE_URL:=https://github.com/SELinuxProject/selinux/releases/download/3.2
PKG_HASH:=dfc7f662af8000116e56a01de6a0394ed79be1b34b999e551346233c5dd19508
PKG_MAINTAINER:=Thomas Petazzoni <thomas.petazzoni@bootlin.com>

4
package/network/utils/bpftools/Makefile
View File

@ -145,6 +145,10 @@ define Build/InstallDev/libbpf
$(INSTALL_DIR) $(1)/usr/lib/pkgconfig
$(CP) $(PKG_INSTALL_DIR)/usr/lib$(LIB_SUFFIX)/pkgconfig/libbpf.pc \
$(1)/usr/lib/pkgconfig/
$(SED) 's,/usr/include,$$$${prefix}/include,g' \
$(1)/usr/lib/pkgconfig/libbpf.pc
$(SED) 's,/usr/lib,$$$${exec_prefix}/lib,g' \
$(1)/usr/lib/pkgconfig/libbpf.pc
endef
ifeq ($(BUILD_VARIANT),lib)

11
package/network/utils/bpftools/patches/200-fix-install-param-order-on-macos.patch Normal file
View File

@ -0,0 +1,11 @@
--- a/tools/lib/bpf/Makefile
+++ b/tools/lib/bpf/Makefile
@@ -236,7 +236,7 @@ define do_install
if [ ! -d '$(DESTDIR_SQ)$2' ]; then \
$(INSTALL) -d -m 755 '$(DESTDIR_SQ)$2'; \
fi; \
- $(INSTALL) $1 $(if $3,-m $3,) '$(DESTDIR_SQ)$2'
+ $(INSTALL) $(if $3,-m $3,) $1 '$(DESTDIR_SQ)$2'
endef
install_lib: all_cmd

6
package/system/procd/Makefile
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@ -12,9 +12,9 @@ PKG_RELEASE:=$(AUTORELEASE)
PKG_SOURCE_PROTO:=git
PKG_SOURCE_URL=$(PROJECT_GIT)/project/procd.git
PKG_SOURCE_DATE:=2021-03-02
PKG_SOURCE_VERSION:=64e9f3a4ef61b53f72d0c9cf03da109e43b6700e
PKG_MIRROR_HASH:=59e1ea81e16b865c8e1bf16d747fd802285fd6bf8d689065e48dc1dee07447fb
PKG_SOURCE_DATE:=2021-03-08
PKG_SOURCE_VERSION:=2cfc26f8456a4d5ba3836c914a742f3d00bad781
PKG_MIRROR_HASH:=4b514143949b6ea5799a7b0b2f2f4ad5f084f88929eb0ac5a01ffc7852a71d22
CMAKE_INSTALL:=1
PKG_LICENSE:=GPL-2.0

6
package/utils/checkpolicy/Makefile
View File

@ -6,12 +6,12 @@
include $(TOPDIR)/rules.mk
PKG_NAME:=checkpolicy
PKG_VERSION:=3.1
PKG_VERSION:=3.2
PKG_RELEASE:=1
PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.gz
PKG_SOURCE_URL:=https://github.com/SELinuxProject/selinux/releases/download/20200710
PKG_HASH:=dfc7707070520c93b14fbbdfdbe081364d806bf28e3e79e10318c2594c77bbb2
PKG_SOURCE_URL:=https://github.com/SELinuxProject/selinux/releases/download/3.2
PKG_HASH:=9b1c81fa86fe3867842164448d90c8e7ea94b2987497809c65d4caa87a5c5bc8
PKG_INSTALL:=1
PKG_BUILD_DEPENDS:=libselinux
HOST_BUILD_DEPENDS:=libselinux/host

16
package/utils/policycoreutils/Makefile
View File

@ -6,12 +6,12 @@
include $(TOPDIR)/rules.mk
PKG_NAME:=policycoreutils
PKG_VERSION:=3.1
PKG_RELEASE:=5
PKG_VERSION:=3.2
PKG_RELEASE:=1
PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.gz
PKG_SOURCE_URL:=https://github.com/SELinuxProject/selinux/releases/download/20200710
PKG_HASH:=c889f62ee80f8b6a369469a9b8af51f5b797975aeaa291f5c5960cc12eed1934
PKG_SOURCE_URL:=https://github.com/SELinuxProject/selinux/releases/download/3.2
PKG_HASH:=d1331c6fa766c547b071c491de90b9f343c8dbffdb119be8a5a7e491199b93a9
PKG_INSTALL:=1
HOST_BUILD_DEPENDS:=libsemanage/host gettext-full/host
PKG_BUILD_DEPENDS:=BUSYBOX_CONFIG_PAM:libpam gettext-full/host
@ -27,11 +27,11 @@ include $(INCLUDE_DIR)/host-build.mk
DIR_USR_BIN:= \
newrole \
secon
secon \
sestatus
DIR_USR_SBIN:= \
load_policy \
sestatus \
setsebool
LIBEXEC_UTILS := \
@ -43,7 +43,8 @@ SBIN_UTILS:= \
USR_BIN_UTILS:= \
newrole \
secon
secon \
sestatus
USR_SBIN_UTILS:= \
fixfiles \
@ -52,7 +53,6 @@ USR_SBIN_UTILS:= \
run_init \
semodule \
load_policy \
sestatus \
setsebool
TARGET_LDFLAGS += $(INTL_LDFLAGS) $(if $(INTL_FULL),-lintl)

6
package/utils/secilc/Makefile
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@ -6,12 +6,12 @@
include $(TOPDIR)/rules.mk
PKG_NAME:=secilc
PKG_VERSION:=3.1
PKG_VERSION:=3.2
PKG_RELEASE:=1
PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.gz
PKG_SOURCE_URL:=https://github.com/SELinuxProject/selinux/releases/download/20200710
PKG_HASH:=86117246fec3017af710a9ff7c1dae3ed1cd571e232a86cff3e2a3de2d6aa65c
PKG_SOURCE_URL:=https://github.com/SELinuxProject/selinux/releases/download/3.2
PKG_HASH:=5f6e6528a281b29ac5e558babffc3d8aab682fd8df8977daff5f266a50292cc3
HOST_BUILD_DEPENDS:=libsepol/host
PKG_MAINTAINER:=Dominick Grift <dominick.grift@defensec.nl>

24
target/linux/bcm63xx/dts/bcm6328-sercomm-ad1018-nor.dts
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@ -146,6 +146,30 @@
};
};
&nflash {
status = "okay";
nandcs@0 {
compatible = "brcm,nandcs";
reg = <0>;
nand-ecc-step-size = <512>;
nand-ecc-strength = <15>;
nand-on-flash-bbt;
brcm,nand-oob-sector-size = <64>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "storage";
reg = <0 0>; /* autodetected size */
};
};
};
};
&uart0 {
status = "okay";
};

7
target/linux/bmips/dts/bcm63168-comtrend-vr-3032u.dts
View File

@ -15,11 +15,6 @@
led-usb = &led_usb_green;
};
memory@0 {
device_type = "memory";
reg = <0x00000000 0x04000000>;
};
keys {
compatible = "gpio-keys-polled";
poll-interval = <20>;
@ -152,8 +147,6 @@
nandcs@0 {
compatible = "brcm,nandcs";
#size-cells = <1>;
#address-cells = <1>;
reg = <0>;
nand-ecc-step-size = <512>;
nand-ecc-strength = <15>;

5
target/linux/bmips/dts/bcm6318-comtrend-ar-5315u.dts
View File

@ -13,11 +13,6 @@
led-upgrade = &led_power_green;
};
memory@0 {
device_type = "memory";
reg = <0x00000000 0x04000000>;
};
keys {
compatible = "gpio-keys-polled";
poll-interval = <20>;

6
target/linux/bmips/dts/bcm6318.dtsi
View File

@ -21,7 +21,7 @@
};
chosen {
bootargs = "console=ttyS0,115200n8 earlycon";
bootargs = "earlycon";
stdout-path = "serial0:115200n8";
};
@ -282,10 +282,10 @@
};
hsspi: spi@10003000 {
compatible = "brcm,bcm6328-hsspi";
reg = <0x10003000 0x600>;
#address-cells = <1>;
#size-cells = <0>;
compatible = "brcm,bcm6328-hsspi";
reg = <0x10003000 0x600>;
interrupt-parent = <&periph_intc>;
interrupts = <BCM6318_IRQ_HSSPI>;

14
target/linux/bmips/dts/bcm63268.dtsi
View File

@ -24,7 +24,7 @@
};
chosen {
bootargs = "console=ttyS0,115200n8 earlycon";
bootargs = "earlycon";
stdout-path = "serial0:115200n8";
};
@ -311,11 +311,11 @@
};
nflash: nand@10000200 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "brcm,nand-bcm6368",
"brcm,brcmnand-v4.0",
"brcm,brcmnand";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x10000200 0x180>,
<0x10000600 0x200>,
<0x100000b0 0x10>;
@ -336,10 +336,10 @@
};
lsspi: spi@10000800 {
compatible = "brcm,bcm6358-spi";
reg = <0x10000800 0x70c>;
#address-cells = <1>;
#size-cells = <0>;
compatible = "brcm,bcm6358-spi";
reg = <0x10000800 0x70c>;
interrupt-parent = <&periph_intc>;
interrupts = <BCM63268_IRQ_LSSPI>;
@ -353,10 +353,10 @@
};
hsspi: spi@10001000 {
compatible = "brcm,bcm6328-hsspi";
reg = <0x10001000 0x600>;
#address-cells = <1>;
#size-cells = <0>;
compatible = "brcm,bcm6328-hsspi";
reg = <0x10001000 0x600>;
interrupt-parent = <&periph_intc>;
interrupts = <BCM63268_IRQ_HSSPI>;

5
target/linux/bmips/dts/bcm6328-comtrend-ar-5387un.dts
View File

@ -13,11 +13,6 @@
led-upgrade = &led_power_green;
};
memory@0 {
device_type = "memory";
reg = <0x00000000 0x04000000>;
};
keys {
compatible = "gpio-keys-polled";
poll-interval = <20>;

6
target/linux/bmips/dts/bcm6328.dtsi
View File

@ -23,7 +23,7 @@
};
chosen {
bootargs = "console=ttyS0,115200n8 earlycon";
bootargs = "earlycon";
stdout-path = "serial0:115200n8";
};
@ -299,10 +299,10 @@
};
hsspi: spi@10001000 {
compatible = "brcm,bcm6328-hsspi";
reg = <0x10001000 0x600>;
#address-cells = <1>;
#size-cells = <0>;
compatible = "brcm,bcm6328-hsspi";
reg = <0x10001000 0x600>;
interrupt-parent = <&periph_intc>;
interrupts = <BCM6328_IRQ_HSSPI>;

5
target/linux/bmips/dts/bcm6358-huawei-hg556a-b.dts
View File

@ -17,11 +17,6 @@
led-usb = &hspa_red;
};
memory@0 {
device_type = "memory";
reg = <0x00000000 0x04000000>;
};
keys {
compatible = "gpio-keys-polled";
poll-interval = <20>;

6
target/linux/bmips/dts/bcm6358.dtsi
View File

@ -22,7 +22,7 @@
};
chosen {
bootargs = "console=ttyS0,115200n8 earlycon";
bootargs = "earlycon";
stdout-path = "serial0:115200n8";
};
@ -264,10 +264,10 @@
};
lsspi: spi@fffe0800 {
compatible = "brcm,bcm6358-spi";
reg = <0xfffe0800 0x70c>;
#address-cells = <1>;
#size-cells = <0>;
compatible = "brcm,bcm6358-spi";
reg = <0xfffe0800 0x70c>;
interrupt-parent = <&periph_intc>;
interrupts = <BCM6358_IRQ_SPI>;

7
target/linux/bmips/dts/bcm6362-netgear-dgnd3700-v2.dts
View File

@ -17,11 +17,6 @@
led-usb2 = &led_usb2_green;
};
memory@0 {
device_type = "memory";
reg = <0x00000000 0x04000000>;
};
keys {
compatible = "gpio-keys-polled";
poll-interval = <20>;
@ -149,8 +144,6 @@
nandcs@0 {
compatible = "brcm,nandcs";
#size-cells = <1>;
#address-cells = <1>;
reg = <0>;
nand-ecc-step-size = <512>;
nand-ecc-strength = <15>;

10
target/linux/bmips/dts/bcm6362.dtsi
View File

@ -24,7 +24,7 @@
};
chosen {
bootargs = "console=ttyS0,115200n8 earlycon";
bootargs = "earlycon";
stdout-path = "serial0:115200n8";
};
@ -371,10 +371,10 @@
};
lsspi: spi@10000800 {
compatible = "brcm,bcm6358-spi";
reg = <0x10000800 0x70c>;
#address-cells = <1>;
#size-cells = <0>;
compatible = "brcm,bcm6358-spi";
reg = <0x10000800 0x70c>;
interrupt-parent = <&periph_intc>;
interrupts = <BCM6362_IRQ_LSSPI>;
@ -388,10 +388,10 @@
};
hsspi: spi@10001000 {
compatible = "brcm,bcm6328-hsspi";
reg = <0x10001000 0x600>;
#address-cells = <1>;
#size-cells = <0>;
compatible = "brcm,bcm6328-hsspi";
reg = <0x10001000 0x600>;
interrupt-parent = <&periph_intc>;
interrupts = <BCM6362_IRQ_HSSPI>;

5
target/linux/bmips/dts/bcm6368-comtrend-vr-3025u.dts
View File

@ -13,11 +13,6 @@
led-upgrade = &led_power_green;
};
memory@0 {
device_type = "memory";
reg = <0x00000000 0x04000000>;
};
keys {
compatible = "gpio-keys-polled";
poll-interval = <20>;

6
target/linux/bmips/dts/bcm6368.dtsi
View File

@ -23,7 +23,7 @@
};
chosen {
bootargs = "console=ttyS0,115200n8 earlycon";
bootargs = "earlycon";
stdout-path = "serial0:115200n8";
};
@ -398,10 +398,10 @@
};
lsspi: spi@10000800 {
compatible = "brcm,bcm6358-spi";
reg = <0x10000800 0x70c>;
#address-cells = <1>;
#size-cells = <0>;
compatible = "brcm,bcm6358-spi";
reg = <0x10000800 0x70c>;
interrupt-parent = <&periph_intc>;
interrupts = <BCM6368_IRQ_SPI>;

238
target/linux/bmips/patches-5.10/200-mips-bmips-automatically-detect-CPU-frequency.patch Normal file
View File

@ -0,0 +1,238 @@
From 0377ad93031d3e51c2afe44231241185f684b6af Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?=C3=81lvaro=20Fern=C3=A1ndez=20Rojas?= <noltari@gmail.com>
Date: Fri, 5 Mar 2021 15:14:32 +0100
Subject: [PATCH 1/2] mips: bmips: automatically detect CPU frequency
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
Some BCM63xx SoCs support multiple CPU frequencies depending on HW config.
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
---
arch/mips/bmips/setup.c | 198 ++++++++++++++++++++++++++++++++++++++--
1 file changed, 191 insertions(+), 7 deletions(-)
--- a/arch/mips/bmips/setup.c
+++ b/arch/mips/bmips/setup.c
@@ -31,11 +31,51 @@
#define RELO_NORMAL_VEC BIT(18)
+#define REG_BCM6318_SOB ((void __iomem *)CKSEG1ADDR(0x10000900))
+#define BCM6318_FREQ_SHIFT 23
+#define BCM6318_FREQ_MASK (0x3 << BCM6318_FREQ_SHIFT)
+
#define REG_BCM6328_OTP ((void __iomem *)CKSEG1ADDR(0x1000062c))
#define BCM6328_TP1_DISABLED BIT(9)
+#define REG_BCM6328_MISC_SB ((void __iomem *)CKSEG1ADDR(0x10001a40))
+#define BCM6328_FCVO_SHIFT 7
+#define BCM6328_FCVO_MASK (0x1f << BCM6328_FCVO_SHIFT)
+
+#define REG_BCM6358_DDR_PLLC ((void __iomem *)0xfffe12b8)
+#define BCM6358_PLLC_M1_SHIFT 0
+#define BCM6358_PLLC_M1_MASK (0xff << BCM6358_PLLC_M1_SHIFT)
+#define BCM6358_PLLC_N1_SHIFT 23
+#define BCM6358_PLLC_N1_MASK (0x3f << BCM6358_PLLC_N1_SHIFT)
+#define BCM6358_PLLC_N2_SHIFT 29
+#define BCM6358_PLLC_N2_MASK (0x7 << BCM6358_PLLC_N2_SHIFT)
+
+#define REG_BCM6362_MISC_SB ((void __iomem *)CKSEG1ADDR(0x10001814))
+#define BCM6362_FCVO_SHIFT 1
+#define BCM6362_FCVO_MASK (0x1f << BCM6362_FCVO_SHIFT)
+
+#define REG_BCM6368_DDR_PLLC ((void __iomem *)CKSEG1ADDR(0x100012a0))
+#define BCM6368_PLLC_P1_SHIFT 0
+#define BCM6368_PLLC_P1_MASK (0xf << BCM6368_PLLC_P1_SHIFT)
+#define BCM6368_PLLC_P2_SHIFT 4
+#define BCM6368_PLLC_P2_MASK (0xf << BCM6368_PLLC_P2_SHIFT)
+#define BCM6368_PLLC_NDIV_SHIFT 16
+#define BCM6368_PLLC_NDIV_MASK (0x1ff << BCM6368_PLLC_NDIV_SHIFT)
+#define REG_BCM6368_DDR_PLLD ((void __iomem *)CKSEG1ADDR(0x100012a4))
+#define BCM6368_PLLD_MDIV_SHIFT 0
+#define BCM6368_PLLD_MDIV_MASK (0xff << BCM6368_PLLD_MDIV_SHIFT)
+
+#define REG_BCM63268_MISC_SB ((void __iomem *)CKSEG1ADDR(0x10001814))
+#define BCM63268_FCVO_SHIFT 21
+#define BCM63268_FCVO_MASK (0xf << BCM63268_FCVO_SHIFT)
+
static const unsigned long kbase = VMLINUX_LOAD_ADDRESS & 0xfff00000;
+struct bmips_cpufreq {
+ const char *compatible;
+ u32 (*cpu_freq)(void);
+};
+
struct bmips_quirk {
const char *compatible;
void (*quirk_fn)(void);
@@ -138,17 +178,161 @@ const char *get_system_type(void)
return "Generic BMIPS kernel";
}
+static u32 bcm6318_cpufreq(void)
+{
+ u32 val = __raw_readl(REG_BCM6318_SOB);
+
+ switch ((val & BCM6318_FREQ_MASK) >> BCM6318_FREQ_SHIFT) {
+ case 0:
+ return 166000000;
+ case 2:
+ return 250000000;
+ case 3:
+ return 333000000;
+ case 1:
+ return 400000000;
+ default:
+ return 0;
+ }
+}
+
+static u32 bcm6328_cpufreq(void)
+{
+ u32 val = __raw_readl(REG_BCM6328_MISC_SB);
+
+ switch ((val & BCM6328_FCVO_MASK) >> BCM6328_FCVO_SHIFT) {
+ case 0x12:
+ case 0x14:
+ case 0x19:
+ return 160000000;
+ case 0x1c:
+ return 192000000;
+ case 0x13:
+ case 0x15:
+ return 200000000;
+ case 0x1a:
+ return 384000000;
+ case 0x16:
+ return 400000000;
+ default:
+ return 320000000;
+ }
+}
+
+static u32 bcm6358_cpufreq(void)
+{
+ u32 val, n1, n2, m1;
+
+ val = __raw_readl(REG_BCM6358_DDR_PLLC);
+ n1 = (val & BCM6358_PLLC_N1_MASK) >> BCM6358_PLLC_N1_SHIFT;
+ n2 = (val & BCM6358_PLLC_N2_MASK) >> BCM6358_PLLC_N2_SHIFT;
+ m1 = (val & BCM6358_PLLC_M1_MASK) >> BCM6358_PLLC_M1_SHIFT;
+
+ return (16 * 1000000 * n1 * n2) / m1;
+}
+
+static u32 bcm6362_cpufreq(void)
+{
+ u32 val = __raw_readl(REG_BCM6362_MISC_SB);
+
+ switch ((val & BCM6362_FCVO_MASK) >> BCM6362_FCVO_SHIFT) {
+ case 0x04:
+ case 0x0c:
+ case 0x14:
+ case 0x1c:
+ return 160000000;
+ case 0x15:
+ case 0x1d:
+ return 200000000;
+ case 0x03:
+ case 0x0b:
+ case 0x13:
+ case 0x1b:
+ return 240000000;
+ case 0x07:
+ case 0x17:
+ return 384000000;
+ case 0x05:
+ case 0x0e:
+ case 0x16:
+ case 0x1e:
+ case 0x1f:
+ return 400000000;
+ case 0x06:
+ return 440000000;
+ default:
+ return 320000000;
+ }
+}
+
+static u32 bcm6368_cpufreq(void)
+{
+ u32 val, p1, p2, ndiv, m1;
+
+ val = __raw_readl(REG_BCM6368_DDR_PLLC);
+ p1 = (val & BCM6368_PLLC_P1_MASK) >> BCM6368_PLLC_P1_SHIFT;
+ p2 = (val & BCM6368_PLLC_P2_MASK) >> BCM6368_PLLC_P2_SHIFT;
+ ndiv = (val & BCM6368_PLLC_NDIV_MASK) >>
+ BCM6368_PLLC_NDIV_SHIFT;
+
+ val = __raw_readl(REG_BCM6368_DDR_PLLD);
+ m1 = (val & BCM6368_PLLD_MDIV_MASK) >> BCM6368_PLLD_MDIV_SHIFT;
+
+ return (((64 * 1000000) / p1) * p2 * ndiv) / m1;
+}
+
+static u32 bcm63268_cpufreq(void)
+{
+ u32 val = __raw_readl(REG_BCM63268_MISC_SB);
+
+ switch ((val & BCM63268_FCVO_MASK) >> BCM63268_FCVO_SHIFT) {
+ case 0x3:
+ case 0xe:
+ return 320000000;
+ case 0xa:
+ return 333000000;
+ case 0x2:
+ case 0xb:
+ case 0xf:
+ return 400000000;
+ default:
+ return 0;
+ }
+}
+
+static const struct bmips_cpufreq bmips_cpufreq_list[] = {
+ { "brcm,bcm6318", &bcm6318_cpufreq },
+ { "brcm,bcm6328", &bcm6328_cpufreq },
+ { "brcm,bcm6358", &bcm6358_cpufreq },
+ { "brcm,bcm6362", &bcm6362_cpufreq },
+ { "brcm,bcm6368", &bcm6368_cpufreq },
+ { "brcm,bcm63268", &bcm63268_cpufreq },
+ { /* sentinel */ }
+};
+
void __init plat_time_init(void)
{
+ const struct bmips_cpufreq *cf;
struct device_node *np;
- u32 freq;
+ u32 freq = 0;
- np = of_find_node_by_name(NULL, "cpus");
- if (!np)
- panic("missing 'cpus' DT node");
- if (of_property_read_u32(np, "mips-hpt-frequency", &freq) < 0)
- panic("missing 'mips-hpt-frequency' property");
- of_node_put(np);
+ for (cf = bmips_cpufreq_list; cf->cpu_freq; cf++) {
+ if (of_flat_dt_is_compatible(of_get_flat_dt_root(),
+ cf->compatible)) {
+ freq = cf->cpu_freq() / 2;
+ printk("%s detected @ %u MHz\n", cf->compatible, freq / 500000);
+ break;
+ }
+ }
+
+ if (!freq) {
+ np = of_find_node_by_name(NULL, "cpus");
+ if (!np)
+ panic("missing 'cpus' DT node");
+ if (of_property_read_u32(np, "mips-hpt-frequency", &freq) < 0)
+ panic("missing 'mips-hpt-frequency' property");
+ of_node_put(np);
+ }
mips_hpt_frequency = freq;
}

196
target/linux/bmips/patches-5.10/201-mips-bmips-automatically-detect-RAM-size.patch Normal file
View File

@ -0,0 +1,196 @@
From f9ee3f28ecb979c77423be965ef9dd313bdb9e9b Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?=C3=81lvaro=20Fern=C3=A1ndez=20Rojas?= <noltari@gmail.com>
Date: Mon, 8 Mar 2021 16:58:34 +0100
Subject: [PATCH 2/2] mips: bmips: automatically detect RAM size
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
Some devices have different amounts of RAM installed depending on HW revision.
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
---
arch/mips/bmips/setup.c | 118 ++++++++++++++++++++++++++++++++++++++++
1 file changed, 118 insertions(+)
--- a/arch/mips/bmips/setup.c
+++ b/arch/mips/bmips/setup.c
@@ -19,6 +19,7 @@
#include <linux/of_platform.h>
#include <linux/libfdt.h>
#include <linux/smp.h>
+#include <linux/types.h>
#include <asm/addrspace.h>
#include <asm/bmips.h>
#include <asm/bootinfo.h>
@@ -34,13 +35,16 @@
#define REG_BCM6318_SOB ((void __iomem *)CKSEG1ADDR(0x10000900))
#define BCM6318_FREQ_SHIFT 23
#define BCM6318_FREQ_MASK (0x3 << BCM6318_FREQ_SHIFT)
+#define BCM6318_SDRAM_ADDR ((void __iomem *)CKSEG1ADDR(0x10004000))
#define REG_BCM6328_OTP ((void __iomem *)CKSEG1ADDR(0x1000062c))
#define BCM6328_TP1_DISABLED BIT(9)
#define REG_BCM6328_MISC_SB ((void __iomem *)CKSEG1ADDR(0x10001a40))
#define BCM6328_FCVO_SHIFT 7
#define BCM6328_FCVO_MASK (0x1f << BCM6328_FCVO_SHIFT)
+#define BCM6328_MEMC_ADDR ((void __iomem *)CKSEG1ADDR(0x10003000))
+#define BCM6358_MEMC_ADDR ((void __iomem *)0xfffe1200)
#define REG_BCM6358_DDR_PLLC ((void __iomem *)0xfffe12b8)
#define BCM6358_PLLC_M1_SHIFT 0
#define BCM6358_PLLC_M1_MASK (0xff << BCM6358_PLLC_M1_SHIFT)
@@ -52,7 +56,9 @@
#define REG_BCM6362_MISC_SB ((void __iomem *)CKSEG1ADDR(0x10001814))
#define BCM6362_FCVO_SHIFT 1
#define BCM6362_FCVO_MASK (0x1f << BCM6362_FCVO_SHIFT)
+#define BCM6362_MEMC_ADDR ((void __iomem *)CKSEG1ADDR(0x10003000))
+#define BCM6368_MEMC_ADDR ((void __iomem *)CKSEG1ADDR(0x10001200))
#define REG_BCM6368_DDR_PLLC ((void __iomem *)CKSEG1ADDR(0x100012a0))
#define BCM6368_PLLC_P1_SHIFT 0
#define BCM6368_PLLC_P1_MASK (0xf << BCM6368_PLLC_P1_SHIFT)
@@ -67,7 +73,21 @@
#define REG_BCM63268_MISC_SB ((void __iomem *)CKSEG1ADDR(0x10001814))
#define BCM63268_FCVO_SHIFT 21
#define BCM63268_FCVO_MASK (0xf << BCM63268_FCVO_SHIFT)
+#define BCM63268_MEMC_ADDR ((void __iomem *)CKSEG1ADDR(0x10003000))
+#define SDRAM_CFG_REG 0x0
+#define SDRAM_SPACE_SHIFT 4
+#define SDRAM_SPACE_MASK (0xf << SDRAM_SPACE_SHIFT)
+
+#define MEMC_CFG_REG 0x4
+#define MEMC_CFG_32B_SHIFT 1
+#define MEMC_CFG_32B_MASK (1 << MEMC_CFG_32B_SHIFT)
+#define MEMC_CFG_COL_SHIFT 3
+#define MEMC_CFG_COL_MASK (0x3 << MEMC_CFG_COL_SHIFT)
+#define MEMC_CFG_ROW_SHIFT 6
+#define MEMC_CFG_ROW_MASK (0x3 << MEMC_CFG_ROW_SHIFT)
+
+#define DDR_CSEND_REG 0x8
static const unsigned long kbase = VMLINUX_LOAD_ADDRESS & 0xfff00000;
@@ -76,6 +96,11 @@ struct bmips_cpufreq {
u32 (*cpu_freq)(void);
};
+struct bmips_memsize {
+ const char *compatible;
+ phys_addr_t (*mem_size)(void);
+};
+
struct bmips_quirk {
const char *compatible;
void (*quirk_fn)(void);
@@ -337,9 +362,90 @@ void __init plat_time_init(void)
mips_hpt_frequency = freq;
}
+static inline phys_addr_t bmips_dram_size(unsigned int cols,
+ unsigned int rows,
+ unsigned int is_32b,
+ unsigned int banks)
+{
+ rows += 11; /* 0 => 11 address bits ... 2 => 13 address bits */
+ cols += 8; /* 0 => 8 address bits ... 2 => 10 address bits */
+ is_32b += 1;
+
+ return 1 << (cols + rows + is_32b + banks);
+}
+
+static phys_addr_t _bcm6318_memsize(void __iomem *addr)
+{
+ u32 val;
+
+ val = __raw_readl(addr + SDRAM_CFG_REG);
+ val = (val & SDRAM_SPACE_MASK) >> SDRAM_SPACE_SHIFT;
+
+ return (1 << (val + 20));
+}
+
+static phys_addr_t _bcm6328_memsize(void __iomem *addr)
+{
+ return __raw_readl(addr + DDR_CSEND_REG) << 24;
+}
+
+static phys_addr_t _bcm6358_memsize(void __iomem *addr)
+{
+ unsigned int cols, rows, is_32b;
+ u32 val;
+
+ val = __raw_readl(addr + MEMC_CFG_REG);
+ rows = (val & MEMC_CFG_ROW_MASK) >> MEMC_CFG_ROW_SHIFT;
+ cols = (val & MEMC_CFG_COL_MASK) >> MEMC_CFG_COL_SHIFT;
+ is_32b = (val & MEMC_CFG_32B_MASK) ? 0 : 1;
+
+ return bmips_dram_size(cols, rows, is_32b, 2);
+}
+
+static phys_addr_t bcm6318_memsize(void)
+{
+ return _bcm6318_memsize(BCM6318_SDRAM_ADDR);
+}
+
+static phys_addr_t bcm6328_memsize(void)
+{
+ return _bcm6328_memsize(BCM6328_MEMC_ADDR);
+}
+
+static phys_addr_t bcm6358_memsize(void)
+{
+ return _bcm6358_memsize(BCM6358_MEMC_ADDR);
+}
+
+static phys_addr_t bcm6362_memsize(void)
+{
+ return _bcm6328_memsize(BCM6362_MEMC_ADDR);
+}
+
+static phys_addr_t bcm6368_memsize(void)
+{
+ return _bcm6358_memsize(BCM6368_MEMC_ADDR);
+}
+
+static phys_addr_t bcm63268_memsize(void)
+{
+ return _bcm6328_memsize(BCM63268_MEMC_ADDR);
+}
+
+static const struct bmips_memsize bmips_memsize_list[] = {
+ { "brcm,bcm6318", &bcm6318_memsize },
+ { "brcm,bcm6328", &bcm6328_memsize },
+ { "brcm,bcm6358", &bcm6358_memsize },
+ { "brcm,bcm6362", &bcm6362_memsize },
+ { "brcm,bcm6368", &bcm6368_memsize },
+ { "brcm,bcm63268", &bcm63268_memsize },
+ { /* sentinel */ }
+};
+
void __init plat_mem_setup(void)
{
void *dtb;
+ const struct bmips_memsize *ms;
const struct bmips_quirk *q;
set_io_port_base(0);
@@ -358,6 +464,18 @@ void __init plat_mem_setup(void)
__dt_setup_arch(dtb);
+ for (ms = bmips_memsize_list; ms->mem_size; ms++) {
+ if (of_flat_dt_is_compatible(of_get_flat_dt_root(),
+ ms->compatible)) {
+ phys_addr_t mem = ms->mem_size();
+ if (mem) {
+ memblock_add(0, mem);
+ printk("%uMB of RAM installed\n", mem >> 20);
+ break;
+ }
+ }
+ }
+
for (q = bmips_quirk_list; q->quirk_fn; q++) {
if (of_flat_dt_is_compatible(of_get_flat_dt_root(),
q->compatible)) {

18
target/linux/mediatek/mt7622/base-files/lib/preinit/79_move_config
View File

@ -1,18 +0,0 @@
. /lib/upgrade/common.sh
RECOVERY_PART=/dev/mmcblk0p6
move_config() {
if [ -b $RECOVERY_PART ]; then
insmod nls_cp437
insmod nls_iso8859-1
insmod fat
insmod vfat
mkdir -p /recovery
mount -o rw,noatime $RECOVERY_PART /recovery
[ -f "/recovery/$BACKUP_FILE" ] && mv -f "/recovery/$BACKUP_FILE" /
umount /recovery
fi
}
boot_hook_add preinit_mount_root move_config