Merge Official Source
Signed-off-by: Tianling Shen <cnsztl@immortalwrt.org>
This commit is contained in:
commit
e6cbb6469a
@ -37,7 +37,11 @@ define Build/package-kernel-ubifs
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endef
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define Build/append-image
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dd if=$(BIN_DIR)/$(DEVICE_IMG_PREFIX)-$(1) >> $@
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cp "$(BIN_DIR)/$(DEVICE_IMG_PREFIX)-$(1)" "$@.stripmeta"
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fwtool -s /dev/null -t "$@.stripmeta" || :
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fwtool -i /dev/null -t "$@.stripmeta" || :
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dd if="$@.stripmeta" >> "$@"
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rm "$@.stripmeta"
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endef
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ifdef IB
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@ -46,8 +50,12 @@ define Build/append-image-stage
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endef
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else
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define Build/append-image-stage
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dd if=$(BIN_DIR)/$(DEVICE_IMG_PREFIX)-$(1) of=$(STAGING_DIR_IMAGE)/$(BOARD)$(if $(SUBTARGET),-$(SUBTARGET))-$(DEVICE_NAME)-$(1)
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dd if=$(BIN_DIR)/$(DEVICE_IMG_PREFIX)-$(1) >> $@
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cp "$(BIN_DIR)/$(DEVICE_IMG_PREFIX)-$(1)" "$@.stripmeta"
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fwtool -s /dev/null -t "$@.stripmeta" || :
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fwtool -i /dev/null -t "$@.stripmeta" || :
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dd if="$@.stripmeta" of="$(STAGING_DIR_IMAGE)/$(BOARD)$(if $(SUBTARGET),-$(SUBTARGET))-$(DEVICE_NAME)-$(1)"
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dd if="$@.stripmeta" >> "$@"
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rm "$@.stripmeta"
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endef
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endif
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@ -188,22 +188,30 @@ USE_SUBTARGET_CONFIG = $(if $(wildcard $(LINUX_TARGET_CONFIG)),,$(if $(LINUX_SUB
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LINUX_RECONFIG_LIST = $(wildcard $(GENERIC_LINUX_CONFIG) $(LINUX_TARGET_CONFIG) $(if $(USE_SUBTARGET_CONFIG),$(LINUX_SUBTARGET_CONFIG)))
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LINUX_RECONFIG_TARGET = $(if $(USE_SUBTARGET_CONFIG),$(LINUX_SUBTARGET_CONFIG),$(LINUX_TARGET_CONFIG))
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CFG_TARGET = $(CONFIG_TARGET)
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ifeq ($(CFG_TARGET),platform)
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CFG_TARGET = target
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$(warning Deprecation warning: use CONFIG_TARGET=target instead.)
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else ifeq ($(CFG_TARGET),subtarget_platform)
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CFG_TARGET = subtarget_target
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$(warning Deprecation warning: use CONFIG_TARGET=subtarget_target instead.)
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endif
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# select the config file to be changed by kernel_menuconfig/kernel_oldconfig
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ifeq ($(CONFIG_TARGET),platform)
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ifeq ($(CFG_TARGET),target)
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LINUX_RECONFIG_LIST = $(wildcard $(GENERIC_LINUX_CONFIG) $(LINUX_TARGET_CONFIG))
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LINUX_RECONFIG_TARGET = $(LINUX_TARGET_CONFIG)
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endif
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ifeq ($(CONFIG_TARGET),subtarget)
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else ifeq ($(CFG_TARGET),subtarget)
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LINUX_RECONFIG_LIST = $(wildcard $(GENERIC_LINUX_CONFIG) $(LINUX_TARGET_CONFIG) $(LINUX_SUBTARGET_CONFIG))
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LINUX_RECONFIG_TARGET = $(LINUX_SUBTARGET_CONFIG)
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endif
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ifeq ($(CONFIG_TARGET),subtarget_platform)
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else ifeq ($(CFG_TARGET),subtarget_target)
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LINUX_RECONFIG_LIST = $(wildcard $(GENERIC_LINUX_CONFIG) $(LINUX_SUBTARGET_CONFIG) $(LINUX_TARGET_CONFIG))
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LINUX_RECONFIG_TARGET = $(LINUX_TARGET_CONFIG)
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endif
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ifeq ($(CONFIG_TARGET),env)
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else ifeq ($(CFG_TARGET),env)
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LINUX_RECONFIG_LIST = $(LINUX_KCONFIG_LIST)
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LINUX_RECONFIG_TARGET = $(TOPDIR)/env/kernel-config
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else ifneq ($(strip $(CFG_TARGET)),)
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$(error CONFIG_TARGET=$(CFG_TARGET) is invalid. Valid: target|subtarget|subtarget_target|env)
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endif
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__linux_confcmd = $(2) $(patsubst %,+,$(wordlist 2,9999,$(1))) $(1)
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@ -143,6 +143,7 @@ nand_upgrade_prepare_ubi() {
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ubiattach -m "$mtdnum"
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sync
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ubidev="$( nand_find_ubi "$CI_UBIPART" )"
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[ ! "$ubidev" ] && return 1
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[ "$has_env" -gt 0 ] && {
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ubimkvol /dev/$ubidev -n 0 -N ubootenv -s 1MiB
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ubimkvol /dev/$ubidev -n 1 -N ubootenv2 -s 1MiB
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@ -154,8 +155,13 @@ nand_upgrade_prepare_ubi() {
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local data_ubivol="$( nand_find_volume $ubidev rootfs_data )"
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local ubiblk ubiblkvol
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for ubiblk in /dev/ubiblock*_? ; do
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for ubiblk in /dev/ubiblock${ubidev:3}_* ; do
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[ -e "$ubiblk" ] || continue
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case "$ubiblk" in
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/dev/ubiblock*_*p*)
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continue
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;;
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esac
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echo "removing ubiblock${ubiblk:13}"
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ubiblkvol=ubi${ubiblk:13}
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if ! ubiblock -r /dev/$ubiblkvol; then
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@ -165,9 +171,9 @@ nand_upgrade_prepare_ubi() {
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done
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# kill volumes
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[ "$kern_ubivol" ] && ubirmvol /dev/$ubidev -N $CI_KERNPART || true
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[ "$root_ubivol" -a "$root_ubivol" != "$kern_ubivol" ] && ubirmvol /dev/$ubidev -N $CI_ROOTPART || true
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[ "$data_ubivol" ] && ubirmvol /dev/$ubidev -N rootfs_data || true
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[ "$kern_ubivol" ] && ubirmvol /dev/$ubidev -N $CI_KERNPART || :
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[ "$root_ubivol" -a "$root_ubivol" != "$kern_ubivol" ] && ubirmvol /dev/$ubidev -N $CI_ROOTPART || :
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[ "$data_ubivol" ] && ubirmvol /dev/$ubidev -N rootfs_data || :
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# update kernel
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if [ -n "$kernel_length" ]; then
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@ -69,6 +69,8 @@ samsung,wam250|\
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ubnt,nanostation-m|\
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yuncore,a770|\
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yuncore,a782|\
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yuncore,a930|\
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yuncore,xd3200|\
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yuncore,xd4200|\
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ziking,cpe46b|\
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zyxel,nbg6616)
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@ -141,7 +141,7 @@ $(eval $(call KernelPackage,mii))
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define KernelPackage/mdio-devres
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SUBMENU:=$(NETWORK_DEVICES_MENU)
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TITLE:=Supports MDIO device registration
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DEPENDS:=@(LINUX_5_10||LINUX_5_15) +kmod-libphy PACKAGE_kmod-of-mdio:kmod-of-mdio
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DEPENDS:=@(LINUX_5_10||LINUX_5_15) +kmod-libphy +(TARGET_armvirt||TARGET_bcm27xx_bcm2708||TARGET_tegra):kmod-of-mdio
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KCONFIG:=CONFIG_MDIO_DEVRES
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HIDDEN:=1
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FILES:=$(LINUX_DIR)/drivers/net/phy/mdio_devres.ko
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@ -1057,7 +1057,8 @@ define KernelPackage/of-mdio
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KCONFIG:=CONFIG_OF_MDIO
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FILES:= \
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$(LINUX_DIR)/drivers/of/of_mdio.ko@lt5.10 \
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$(LINUX_DIR)/drivers/net/mdio/of_mdio.ko@ge5.10
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$(LINUX_DIR)/drivers/net/mdio/of_mdio.ko@ge5.10 \
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$(LINUX_DIR)/drivers/net/mdio/fwnode_mdio.ko@ge5.15
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AUTOLOAD:=$(call AutoLoad,41,of_mdio)
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endef
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@ -1245,6 +1246,22 @@ endef
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$(eval $(call KernelPackage,mlx5-core))
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define KernelPackage/net-selftests
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SUBMENU:=$(NETWORK_DEVICES_MENU)
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DEPENDS:=+kmod-libphy
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TITLE:=Network generic selftest support
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KCONFIG:=CONFIG_NET_SELFTESTS
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FILES:=$(LINUX_DIR)/net/core/selftests.ko
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AUTOLOAD:=$(call AutoLoad,99,selftests)
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endef
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define KernelPackage/net-selftests/description
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Kernel modules for the generic selftest support
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endef
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$(eval $(call KernelPackage,net-selftests))
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define KernelPackage/qlcnic
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SUBMENU:=$(NETWORK_DEVICES_MENU)
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DEPENDS:=@PCI_SUPPORT +kmod-hwmon-core
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@ -1139,7 +1139,7 @@ $(eval $(call KernelPackage,usb-net-aqc111))
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define KernelPackage/usb-net-asix
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TITLE:=Kernel module for USB-to-Ethernet Asix convertors
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DEPENDS:=+kmod-libphy
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DEPENDS:=+kmod-libphy +LINUX_5_15:kmod-net-selftests +LINUX_5_15:kmod-mdio-devres
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KCONFIG:=CONFIG_USB_NET_AX8817X
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FILES:=$(LINUX_DIR)/drivers/$(USBNET_DIR)/asix.ko
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AUTOLOAD:=$(call AutoProbe,asix)
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@ -1267,7 +1267,7 @@ $(eval $(call KernelPackage,usb-net-smsc75xx))
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define KernelPackage/usb-net-smsc95xx
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TITLE:=SMSC LAN95XX based USB 2.0 10/100 ethernet devices
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DEPENDS:=+LINUX_5_10:kmod-libphy
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DEPENDS:=+(LINUX_5_10||LINUX_5_15):kmod-libphy
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KCONFIG:=CONFIG_USB_NET_SMSC95XX
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FILES:=$(LINUX_DIR)/drivers/$(USBNET_DIR)/smsc95xx.ko
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AUTOLOAD:=$(call AutoProbe,smsc95xx)
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@ -0,0 +1,18 @@
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--- a/drivers/net/wireless/ath/ath9k/ar9003_eeprom.c
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+++ b/drivers/net/wireless/ath/ath9k/ar9003_eeprom.c
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@@ -3604,10 +3604,13 @@ static void ar9003_hw_xpa_bias_level_app
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{
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int bias = ar9003_modal_header(ah, is2ghz)->xpaBiasLvl;
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+
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+
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if (AR_SREV_9485(ah) || AR_SREV_9330(ah) || AR_SREV_9340(ah) ||
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- AR_SREV_9531(ah) || AR_SREV_9561(ah))
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+ AR_SREV_9531(ah))
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REG_RMW_FIELD(ah, AR_CH0_TOP2, AR_CH0_TOP2_XPABIASLVL, bias);
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- else if (AR_SREV_9462(ah) || AR_SREV_9550(ah) || AR_SREV_9565(ah))
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+ else if (AR_SREV_9462(ah) || AR_SREV_9550(ah) || AR_SREV_9565(ah) ||
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+ AR_SREV_9561(ah))
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REG_RMW_FIELD(ah, AR_CH0_TOP, AR_CH0_TOP_XPABIASLVL, bias);
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else {
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REG_RMW_FIELD(ah, AR_CH0_TOP, AR_CH0_TOP_XPABIASLVL, bias);
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@ -13,9 +13,9 @@ PKG_RELEASE:=2
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PKG_SOURCE_PROTO:=git
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PKG_SOURCE_URL=$(PROJECT_GIT)/project/firewall3.git
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PKG_SOURCE_DATE:=2022-01-10
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PKG_SOURCE_VERSION:=0f16ea5f055722a532d4e68c7ba34ed084b48b37
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PKG_MIRROR_HASH:=219478ef95b170b5122030715eac7b3317f2ac4d67e1a936c22a78b10e056123
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PKG_SOURCE_DATE:=2022-02-17
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PKG_SOURCE_VERSION:=4cd7d4f36bea731bf901cb067456f1d460294926
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PKG_MIRROR_HASH:=307baf09c61ce727b4edb4283144b0d8128ebba34b858cc6389571421f829a24
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PKG_MAINTAINER:=Jo-Philipp Wich <jo@mein.io>
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PKG_LICENSE:=ISC
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@ -1,6 +1,6 @@
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#!/bin/sh
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[ -L /sbin/udhcpc ] || exit 0
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[ -x /sbin/udhcpc ] || exit 0
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. /lib/functions.sh
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. ../netifd-proto.sh
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@ -12,9 +12,9 @@ PKG_RELEASE:=$(AUTORELEASE)
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PKG_SOURCE_PROTO:=git
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PKG_SOURCE_URL=$(PROJECT_GIT)/project/procd.git
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PKG_MIRROR_HASH:=af4ca76197b89943c85e4e2d27a1036f43337d475971d0041cb525bcbca075c1
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PKG_SOURCE_DATE:=2022-02-19
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PKG_SOURCE_VERSION:=ad652490d47916a27c01e3dd8f9eafcecbb4bc7f
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PKG_MIRROR_HASH:=28630389c91e6025a718abcbd100534d72446afce3c5956f94d6972e56ed7c5f
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PKG_SOURCE_DATE:=2022-04-13
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PKG_SOURCE_VERSION:=eb03f03105a857a0b7310e4c93bff46aa29f3a40
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CMAKE_INSTALL:=1
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PKG_LICENSE:=GPL-2.0
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@ -9,6 +9,7 @@ include $(INCLUDE_DIR)/package.mk
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define Package/urandom-seed
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SECTION:=base
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CATEGORY:=Base system
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DEPENDS:=+getrandom
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TITLE:=/etc/urandom.seed handling for OpenWrt
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URL:=https://openwrt.org/
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endef
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@ -18,15 +19,11 @@ define Build/Prepare
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endef
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define Build/Compile/Default
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$(TARGET_CC) $(TARGET_CFLAGS) $(TARGET_CPPFLAGS) $(TARGET_LDFLAGS) \
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-std=gnu99 -o $(PKG_BUILD_DIR)/seedrng seedrng.c
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endef
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Build/Compile = $(Build/Compile/Default)
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define Package/urandom-seed/install
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$(CP) ./files/* $(1)/
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$(INSTALL_DIR) $(1)/sbin
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$(CP) $(PKG_BUILD_DIR)/seedrng $(1)/sbin/
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endef
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$(eval $(call BuildPackage,urandom-seed))
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@ -5,7 +5,7 @@ USE_PROCD=1
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start_service() {
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procd_open_instance "urandom_seed"
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procd_set_param command "/sbin/seedrng"
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procd_set_param command "/sbin/urandom_seed"
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procd_set_param stdout 1
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procd_set_param stderr 1
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procd_close_instance
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@ -2,11 +2,21 @@ log_urandom_seed() {
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echo "urandom-seed: $1" > /dev/kmsg
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}
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_do_urandom_seed() {
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[ -f "$1" ] || { log_urandom_seed "Seed file not found ($1)"; return; }
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[ -O "$1" -a -G "$1" -a ! -x "$1" ] || { log_urandom_seed "Wrong owner / permissions for $1"; return; }
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log_urandom_seed "Seeding with $1"
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cat "$1" > /dev/urandom
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}
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do_urandom_seed() {
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[ -c /dev/urandom ] || { log_urandom_seed "Something is wrong with /dev/urandom"; return; }
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seedrng 2>&1 | while read -r line; do
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log_urandom_seed "$line"
|
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done
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|
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_do_urandom_seed "/etc/urandom.seed"
|
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|
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SEED="$(uci -q get system.@system[0].urandom_seed)"
|
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[ "${SEED:0:1}" = "/" -a "$SEED" != "/etc/urandom.seed" ] && _do_urandom_seed "$SEED"
|
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}
|
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|
||||
boot_hook_add preinit_main do_urandom_seed
|
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|
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20
package/system/urandom-seed/files/sbin/urandom_seed
Executable file
20
package/system/urandom-seed/files/sbin/urandom_seed
Executable file
@ -0,0 +1,20 @@
|
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#!/bin/sh
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set -e
|
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|
||||
trap '[ "$?" -eq 0 ] || echo "An error occured" >&2' EXIT
|
||||
|
||||
save() {
|
||||
touch "$1.tmp"
|
||||
chown root:root "$1.tmp"
|
||||
chmod 600 "$1.tmp"
|
||||
getrandom 512 > "$1.tmp"
|
||||
mv "$1.tmp" "$1"
|
||||
echo "Seed saved ($1)"
|
||||
}
|
||||
|
||||
SEED="$(uci -q get system.@system[0].urandom_seed || true)"
|
||||
[ "${SEED:0:1}" = "/" ] && save "$SEED"
|
||||
|
||||
SEED=/etc/urandom.seed
|
||||
[ ! -f $SEED ] && save "$SEED"
|
||||
true
|
||||
@ -1,434 +0,0 @@
|
||||
// SPDX-License-Identifier: (GPL-2.0 OR MIT OR Apache-2.0)
|
||||
/*
|
||||
* Copyright (C) 2022 Jason A. Donenfeld <Jason@zx2c4.com>. All Rights Reserved.
|
||||
*/
|
||||
|
||||
#include <linux/random.h>
|
||||
#include <sys/random.h>
|
||||
#include <sys/ioctl.h>
|
||||
#include <sys/file.h>
|
||||
#include <sys/stat.h>
|
||||
#include <sys/types.h>
|
||||
#include <fcntl.h>
|
||||
#include <poll.h>
|
||||
#include <unistd.h>
|
||||
#include <time.h>
|
||||
#include <errno.h>
|
||||
#include <endian.h>
|
||||
#include <stdbool.h>
|
||||
#include <stdint.h>
|
||||
#include <string.h>
|
||||
#include <stdio.h>
|
||||
#include <stdlib.h>
|
||||
|
||||
#define SEED_DIR "/etc/seedrng"
|
||||
#define CREDITABLE_SEED SEED_DIR "/seed.credit"
|
||||
#define NON_CREDITABLE_SEED SEED_DIR "/seed.no-credit"
|
||||
#define LOCK_FILE "/tmp/run/seedrng.lock"
|
||||
|
||||
enum blake2s_lengths {
|
||||
BLAKE2S_BLOCK_LEN = 64,
|
||||
BLAKE2S_HASH_LEN = 32,
|
||||
BLAKE2S_KEY_LEN = 32
|
||||
};
|
||||
|
||||
enum seedrng_lengths {
|
||||
MAX_SEED_LEN = 512,
|
||||
MIN_SEED_LEN = BLAKE2S_HASH_LEN
|
||||
};
|
||||
|
||||
struct blake2s_state {
|
||||
uint32_t h[8];
|
||||
uint32_t t[2];
|
||||
uint32_t f[2];
|
||||
uint8_t buf[BLAKE2S_BLOCK_LEN];
|
||||
unsigned int buflen;
|
||||
unsigned int outlen;
|
||||
};
|
||||
|
||||
#define le32_to_cpup(a) le32toh(*(a))
|
||||
#define cpu_to_le32(a) htole32(a)
|
||||
#ifndef ARRAY_SIZE
|
||||
#define ARRAY_SIZE(x) (sizeof(x) / sizeof((x)[0]))
|
||||
#endif
|
||||
#ifndef DIV_ROUND_UP
|
||||
#define DIV_ROUND_UP(n, d) (((n) + (d) - 1) / (d))
|
||||
#endif
|
||||
|
||||
static inline void cpu_to_le32_array(uint32_t *buf, unsigned int words)
|
||||
{
|
||||
while (words--) {
|
||||
*buf = cpu_to_le32(*buf);
|
||||
++buf;
|
||||
}
|
||||
}
|
||||
|
||||
static inline void le32_to_cpu_array(uint32_t *buf, unsigned int words)
|
||||
{
|
||||
while (words--) {
|
||||
*buf = le32_to_cpup(buf);
|
||||
++buf;
|
||||
}
|
||||
}
|
||||
|
||||
static inline uint32_t ror32(uint32_t word, unsigned int shift)
|
||||
{
|
||||
return (word >> (shift & 31)) | (word << ((-shift) & 31));
|
||||
}
|
||||
|
||||
static const uint32_t blake2s_iv[8] = {
|
||||
0x6A09E667UL, 0xBB67AE85UL, 0x3C6EF372UL, 0xA54FF53AUL,
|
||||
0x510E527FUL, 0x9B05688CUL, 0x1F83D9ABUL, 0x5BE0CD19UL
|
||||
};
|
||||
|
||||
static const uint8_t blake2s_sigma[10][16] = {
|
||||
{ 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15 },
|
||||
{ 14, 10, 4, 8, 9, 15, 13, 6, 1, 12, 0, 2, 11, 7, 5, 3 },
|
||||
{ 11, 8, 12, 0, 5, 2, 15, 13, 10, 14, 3, 6, 7, 1, 9, 4 },
|
||||
{ 7, 9, 3, 1, 13, 12, 11, 14, 2, 6, 5, 10, 4, 0, 15, 8 },
|
||||
{ 9, 0, 5, 7, 2, 4, 10, 15, 14, 1, 11, 12, 6, 8, 3, 13 },
|
||||
{ 2, 12, 6, 10, 0, 11, 8, 3, 4, 13, 7, 5, 15, 14, 1, 9 },
|
||||
{ 12, 5, 1, 15, 14, 13, 4, 10, 0, 7, 6, 3, 9, 2, 8, 11 },
|
||||
{ 13, 11, 7, 14, 12, 1, 3, 9, 5, 0, 15, 4, 8, 6, 2, 10 },
|
||||
{ 6, 15, 14, 9, 11, 3, 0, 8, 12, 2, 13, 7, 1, 4, 10, 5 },
|
||||
{ 10, 2, 8, 4, 7, 6, 1, 5, 15, 11, 9, 14, 3, 12, 13, 0 },
|
||||
};
|
||||
|
||||
static void blake2s_set_lastblock(struct blake2s_state *state)
|
||||
{
|
||||
state->f[0] = -1;
|
||||
}
|
||||
|
||||
static void blake2s_increment_counter(struct blake2s_state *state, const uint32_t inc)
|
||||
{
|
||||
state->t[0] += inc;
|
||||
state->t[1] += (state->t[0] < inc);
|
||||
}
|
||||
|
||||
static void blake2s_init_param(struct blake2s_state *state, const uint32_t param)
|
||||
{
|
||||
int i;
|
||||
|
||||
memset(state, 0, sizeof(*state));
|
||||
for (i = 0; i < 8; ++i)
|
||||
state->h[i] = blake2s_iv[i];
|
||||
state->h[0] ^= param;
|
||||
}
|
||||
|
||||
static void blake2s_init(struct blake2s_state *state, const size_t outlen)
|
||||
{
|
||||
blake2s_init_param(state, 0x01010000 | outlen);
|
||||
state->outlen = outlen;
|
||||
}
|
||||
|
||||
static void blake2s_compress(struct blake2s_state *state, const uint8_t *block, size_t nblocks, const uint32_t inc)
|
||||
{
|
||||
uint32_t m[16];
|
||||
uint32_t v[16];
|
||||
int i;
|
||||
|
||||
while (nblocks > 0) {
|
||||
blake2s_increment_counter(state, inc);
|
||||
memcpy(m, block, BLAKE2S_BLOCK_LEN);
|
||||
le32_to_cpu_array(m, ARRAY_SIZE(m));
|
||||
memcpy(v, state->h, 32);
|
||||
v[ 8] = blake2s_iv[0];
|
||||
v[ 9] = blake2s_iv[1];
|
||||
v[10] = blake2s_iv[2];
|
||||
v[11] = blake2s_iv[3];
|
||||
v[12] = blake2s_iv[4] ^ state->t[0];
|
||||
v[13] = blake2s_iv[5] ^ state->t[1];
|
||||
v[14] = blake2s_iv[6] ^ state->f[0];
|
||||
v[15] = blake2s_iv[7] ^ state->f[1];
|
||||
|
||||
#define G(r, i, a, b, c, d) do { \
|
||||
a += b + m[blake2s_sigma[r][2 * i + 0]]; \
|
||||
d = ror32(d ^ a, 16); \
|
||||
c += d; \
|
||||
b = ror32(b ^ c, 12); \
|
||||
a += b + m[blake2s_sigma[r][2 * i + 1]]; \
|
||||
d = ror32(d ^ a, 8); \
|
||||
c += d; \
|
||||
b = ror32(b ^ c, 7); \
|
||||
} while (0)
|
||||
|
||||
#define ROUND(r) do { \
|
||||
G(r, 0, v[0], v[ 4], v[ 8], v[12]); \
|
||||
G(r, 1, v[1], v[ 5], v[ 9], v[13]); \
|
||||
G(r, 2, v[2], v[ 6], v[10], v[14]); \
|
||||
G(r, 3, v[3], v[ 7], v[11], v[15]); \
|
||||
G(r, 4, v[0], v[ 5], v[10], v[15]); \
|
||||
G(r, 5, v[1], v[ 6], v[11], v[12]); \
|
||||
G(r, 6, v[2], v[ 7], v[ 8], v[13]); \
|
||||
G(r, 7, v[3], v[ 4], v[ 9], v[14]); \
|
||||
} while (0)
|
||||
ROUND(0);
|
||||
ROUND(1);
|
||||
ROUND(2);
|
||||
ROUND(3);
|
||||
ROUND(4);
|
||||
ROUND(5);
|
||||
ROUND(6);
|
||||
ROUND(7);
|
||||
ROUND(8);
|
||||
ROUND(9);
|
||||
|
||||
#undef G
|
||||
#undef ROUND
|
||||
|
||||
for (i = 0; i < 8; ++i)
|
||||
state->h[i] ^= v[i] ^ v[i + 8];
|
||||
|
||||
block += BLAKE2S_BLOCK_LEN;
|
||||
--nblocks;
|
||||
}
|
||||
}
|
||||
|
||||
static void blake2s_update(struct blake2s_state *state, const void *inp, size_t inlen)
|
||||
{
|
||||
const size_t fill = BLAKE2S_BLOCK_LEN - state->buflen;
|
||||
const uint8_t *in = inp;
|
||||
|
||||
if (!inlen)
|
||||
return;
|
||||
if (inlen > fill) {
|
||||
memcpy(state->buf + state->buflen, in, fill);
|
||||
blake2s_compress(state, state->buf, 1, BLAKE2S_BLOCK_LEN);
|
||||
state->buflen = 0;
|
||||
in += fill;
|
||||
inlen -= fill;
|
||||
}
|
||||
if (inlen > BLAKE2S_BLOCK_LEN) {
|
||||
const size_t nblocks = DIV_ROUND_UP(inlen, BLAKE2S_BLOCK_LEN);
|
||||
blake2s_compress(state, in, nblocks - 1, BLAKE2S_BLOCK_LEN);
|
||||
in += BLAKE2S_BLOCK_LEN * (nblocks - 1);
|
||||
inlen -= BLAKE2S_BLOCK_LEN * (nblocks - 1);
|
||||
}
|
||||
memcpy(state->buf + state->buflen, in, inlen);
|
||||
state->buflen += inlen;
|
||||
}
|
||||
|
||||
static void blake2s_final(struct blake2s_state *state, uint8_t *out)
|
||||
{
|
||||
blake2s_set_lastblock(state);
|
||||
memset(state->buf + state->buflen, 0, BLAKE2S_BLOCK_LEN - state->buflen);
|
||||
blake2s_compress(state, state->buf, 1, state->buflen);
|
||||
cpu_to_le32_array(state->h, ARRAY_SIZE(state->h));
|
||||
memcpy(out, state->h, state->outlen);
|
||||
}
|
||||
|
||||
static size_t determine_optimal_seed_len(void)
|
||||
{
|
||||
size_t ret = 0;
|
||||
char poolsize_str[11] = { 0 };
|
||||
int fd = open("/proc/sys/kernel/random/poolsize", O_RDONLY);
|
||||
|
||||
if (fd < 0 || read(fd, poolsize_str, sizeof(poolsize_str) - 1) < 0) {
|
||||
fprintf(stderr, "WARNING: Unable to determine pool size, falling back to %u bits: %s\n", MIN_SEED_LEN * 8, strerror(errno));
|
||||
ret = MIN_SEED_LEN;
|
||||
} else
|
||||
ret = DIV_ROUND_UP(strtoul(poolsize_str, NULL, 10), 8);
|
||||
if (fd >= 0)
|
||||
close(fd);
|
||||
if (ret < MIN_SEED_LEN)
|
||||
ret = MIN_SEED_LEN;
|
||||
else if (ret > MAX_SEED_LEN)
|
||||
ret = MAX_SEED_LEN;
|
||||
return ret;
|
||||
}
|
||||
|
||||
static int read_new_seed(uint8_t *seed, size_t len, bool *is_creditable)
|
||||
{
|
||||
ssize_t ret;
|
||||
int urandom_fd;
|
||||
|
||||
*is_creditable = false;
|
||||
ret = getrandom(seed, len, GRND_NONBLOCK);
|
||||
if (ret == (ssize_t)len) {
|
||||
*is_creditable = true;
|
||||
return 0;
|
||||
} else if (ret < 0 && errno == ENOSYS) {
|
||||
struct pollfd random_fd = {
|
||||
.fd = open("/dev/random", O_RDONLY),
|
||||
.events = POLLIN
|
||||
};
|
||||
if (random_fd.fd < 0)
|
||||
return -errno;
|
||||
*is_creditable = poll(&random_fd, 1, 0) == 1;
|
||||
close(random_fd.fd);
|
||||
} else if (getrandom(seed, len, GRND_INSECURE) == (ssize_t)len)
|
||||
return 0;
|
||||
urandom_fd = open("/dev/urandom", O_RDONLY);
|
||||
if (urandom_fd < 0)
|
||||
return -errno;
|
||||
ret = read(urandom_fd, seed, len);
|
||||
if (ret == (ssize_t)len)
|
||||
ret = 0;
|
||||
else
|
||||
ret = -errno ? -errno : -EIO;
|
||||
close(urandom_fd);
|
||||
return ret;
|
||||
}
|
||||
|
||||
static int seed_rng(uint8_t *seed, size_t len, bool credit)
|
||||
{
|
||||
struct {
|
||||
int entropy_count;
|
||||
int buf_size;
|
||||
uint8_t buffer[MAX_SEED_LEN];
|
||||
} req = {
|
||||
.entropy_count = credit ? len * 8 : 0,
|
||||
.buf_size = len
|
||||
};
|
||||
int random_fd, ret;
|
||||
|
||||
if (len > sizeof(req.buffer))
|
||||
return -EFBIG;
|
||||
memcpy(req.buffer, seed, len);
|
||||
|
||||
random_fd = open("/dev/random", O_RDWR);
|
||||
if (random_fd < 0)
|
||||
return -errno;
|
||||
ret = ioctl(random_fd, RNDADDENTROPY, &req);
|
||||
if (ret)
|
||||
ret = -errno ? -errno : -EIO;
|
||||
close(random_fd);
|
||||
return ret;
|
||||
}
|
||||
|
||||
static int seed_from_file_if_exists(const char *filename, bool credit, struct blake2s_state *hash)
|
||||
{
|
||||
uint8_t seed[MAX_SEED_LEN];
|
||||
ssize_t seed_len;
|
||||
int fd, dfd, ret = 0;
|
||||
|
||||
fd = open(filename, O_RDONLY);
|
||||
if (fd < 0 && errno == ENOENT)
|
||||
return 0;
|
||||
else if (fd < 0) {
|
||||
ret = -errno;
|
||||
fprintf(stderr, "ERROR: Unable to open seed file: %s\n", strerror(errno));
|
||||
return ret;
|
||||
}
|
||||
dfd = open(SEED_DIR, O_DIRECTORY | O_RDONLY);
|
||||
if (dfd < 0) {
|
||||
ret = -errno;
|
||||
close(fd);
|
||||
fprintf(stderr, "ERROR: Unable to open seed directory: %s\n", strerror(errno));
|
||||
return ret;
|
||||
}
|
||||
seed_len = read(fd, seed, sizeof(seed));
|
||||
if (seed_len < 0) {
|
||||
ret = -errno;
|
||||
fprintf(stderr, "ERROR: Unable to read seed file: %s\n", strerror(errno));
|
||||
}
|
||||
close(fd);
|
||||
if (ret) {
|
||||
close(dfd);
|
||||
return ret;
|
||||
}
|
||||
if ((unlink(filename) < 0 || fsync(dfd) < 0) && seed_len) {
|
||||
ret = -errno;
|
||||
fprintf(stderr, "ERROR: Unable to remove seed after reading, so not seeding: %s\n", strerror(errno));
|
||||
}
|
||||
close(dfd);
|
||||
if (ret)
|
||||
return ret;
|
||||
if (!seed_len)
|
||||
return 0;
|
||||
|
||||
blake2s_update(hash, &seed_len, sizeof(seed_len));
|
||||
blake2s_update(hash, seed, seed_len);
|
||||
|
||||
fprintf(stdout, "Seeding %zd bits %s crediting\n", seed_len * 8, credit ? "and" : "without");
|
||||
ret = seed_rng(seed, seed_len, credit);
|
||||
if (ret < 0)
|
||||
fprintf(stderr, "ERROR: Unable to seed: %s\n", strerror(-ret));
|
||||
return ret;
|
||||
}
|
||||
|
||||
static bool skip_credit(void)
|
||||
{
|
||||
const char *skip = getenv("SEEDRNG_SKIP_CREDIT");
|
||||
return skip && (!strcmp(skip, "1") || !strcasecmp(skip, "true") ||
|
||||
!strcasecmp(skip, "yes") || !strcasecmp(skip, "y"));
|
||||
}
|
||||
|
||||
int main(int argc __attribute__((unused)), char *argv[] __attribute__((unused)))
|
||||
{
|
||||
static const char seedrng_prefix[] = "SeedRNG v1 Old+New Prefix";
|
||||
static const char seedrng_failure[] = "SeedRNG v1 No New Seed Failure";
|
||||
int ret, fd = -1, lock, program_ret = 0;
|
||||
uint8_t new_seed[MAX_SEED_LEN];
|
||||
size_t new_seed_len;
|
||||
bool new_seed_creditable;
|
||||
struct timespec realtime = { 0 }, boottime = { 0 };
|
||||
struct blake2s_state hash;
|
||||
|
||||
umask(0077);
|
||||
if (getuid()) {
|
||||
fprintf(stderr, "ERROR: This program requires root\n");
|
||||
return 1;
|
||||
}
|
||||
|
||||
blake2s_init(&hash, BLAKE2S_HASH_LEN);
|
||||
blake2s_update(&hash, seedrng_prefix, strlen(seedrng_prefix));
|
||||
clock_gettime(CLOCK_REALTIME, &realtime);
|
||||
clock_gettime(CLOCK_BOOTTIME, &boottime);
|
||||
blake2s_update(&hash, &realtime, sizeof(realtime));
|
||||
blake2s_update(&hash, &boottime, sizeof(boottime));
|
||||
|
||||
if (mkdir(SEED_DIR, 0700) < 0 && errno != EEXIST) {
|
||||
fprintf(stderr, "ERROR: Unable to create \"%s\" directory: %s\n", SEED_DIR, strerror(errno));
|
||||
return 1;
|
||||
}
|
||||
|
||||
lock = open(LOCK_FILE, O_WRONLY | O_CREAT, 0000);
|
||||
if (lock < 0 || flock(lock, LOCK_EX) < 0) {
|
||||
fprintf(stderr, "ERROR: Unable to open lock file: %s\n", strerror(errno));
|
||||
program_ret = 1;
|
||||
goto out;
|
||||
}
|
||||
|
||||
ret = seed_from_file_if_exists(NON_CREDITABLE_SEED, false, &hash);
|
||||
if (ret < 0)
|
||||
program_ret |= 1 << 1;
|
||||
ret = seed_from_file_if_exists(CREDITABLE_SEED, !skip_credit(), &hash);
|
||||
if (ret < 0)
|
||||
program_ret |= 1 << 2;
|
||||
|
||||
new_seed_len = determine_optimal_seed_len();
|
||||
ret = read_new_seed(new_seed, new_seed_len, &new_seed_creditable);
|
||||
if (ret < 0) {
|
||||
fprintf(stderr, "ERROR: Unable to read new seed: %s\n", strerror(-ret));
|
||||
new_seed_len = BLAKE2S_HASH_LEN;
|
||||
strncpy((char *)new_seed, seedrng_failure, new_seed_len);
|
||||
program_ret |= 1 << 3;
|
||||
}
|
||||
blake2s_update(&hash, &new_seed_len, sizeof(new_seed_len));
|
||||
blake2s_update(&hash, new_seed, new_seed_len);
|
||||
blake2s_final(&hash, new_seed + new_seed_len - BLAKE2S_HASH_LEN);
|
||||
|
||||
fprintf(stdout, "Saving %zu bits of %s seed for next boot\n", new_seed_len * 8, new_seed_creditable ? "creditable" : "non-creditable");
|
||||
fd = open(NON_CREDITABLE_SEED, O_WRONLY | O_CREAT | O_TRUNC, 0400);
|
||||
if (fd < 0) {
|
||||
fprintf(stderr, "ERROR: Unable to open seed file for writing: %s\n", strerror(errno));
|
||||
program_ret |= 1 << 4;
|
||||
goto out;
|
||||
}
|
||||
if (write(fd, new_seed, new_seed_len) != (ssize_t)new_seed_len || fsync(fd) < 0) {
|
||||
fprintf(stderr, "ERROR: Unable to write seed file: %s\n", strerror(errno));
|
||||
program_ret |= 1 << 5;
|
||||
goto out;
|
||||
}
|
||||
if (new_seed_creditable && rename(NON_CREDITABLE_SEED, CREDITABLE_SEED) < 0) {
|
||||
fprintf(stderr, "WARNING: Unable to make new seed creditable: %s\n", strerror(errno));
|
||||
program_ret |= 1 << 6;
|
||||
}
|
||||
out:
|
||||
if (fd >= 0)
|
||||
close(fd);
|
||||
if (lock >= 0)
|
||||
close(lock);
|
||||
return program_ret;
|
||||
}
|
||||
@ -26,14 +26,31 @@ KERNELSIZE="$2"
|
||||
ROOTFSOFFSET="$(($3 / 512))"
|
||||
ROOTFSSIZE="$(($4 / 512))"
|
||||
|
||||
# Using mcopy -s ... is using READDIR(3) to iterate through the directory
|
||||
# entries, hence they end up in the FAT filesystem in traversal order which
|
||||
# breaks reproducibility.
|
||||
# Implement recursive copy with reproducible order.
|
||||
dos_dircopy() {
|
||||
local entry
|
||||
local baseentry
|
||||
for entry in "$1"/* ; do
|
||||
if [ -f "$entry" ]; then
|
||||
mcopy -i "$OUTPUT.kernel" "$entry" ::"$2"
|
||||
elif [ -d "$entry" ]; then
|
||||
baseentry="$(basename "$entry")"
|
||||
mmd -i "$OUTPUT.kernel" ::"$2""$baseentry"
|
||||
dos_dircopy "$entry" "$2""$baseentry"/
|
||||
fi
|
||||
done
|
||||
}
|
||||
|
||||
[ -n "$PADDING" ] && dd if=/dev/zero of="$OUTPUT" bs=512 seek="$ROOTFSOFFSET" conv=notrunc count="$ROOTFSSIZE"
|
||||
dd if="$ROOTFSIMAGE" of="$OUTPUT" bs=512 seek="$ROOTFSOFFSET" conv=notrunc
|
||||
|
||||
if [ -n "$GUID" ]; then
|
||||
[ -n "$PADDING" ] && dd if=/dev/zero of="$OUTPUT" bs=512 seek="$((ROOTFSOFFSET + ROOTFSSIZE))" conv=notrunc count="$sect"
|
||||
mkfs.fat --invariant -n kernel -C "$OUTPUT.kernel" -S 512 "$((KERNELSIZE / 1024))"
|
||||
[ "$SOURCE_DATE_EPOCH" ] && find "$KERNELDIR"/ -mindepth 1 -execdir touch -hcd "@${SOURCE_DATE_EPOCH}" "{}" +
|
||||
LC_ALL=C mcopy -m -s -i "$OUTPUT.kernel" "$KERNELDIR"/* ::/
|
||||
LC_ALL=C dos_dircopy "$KERNELDIR" /
|
||||
else
|
||||
make_ext4fs -J -L kernel -l "$KERNELSIZE" ${SOURCE_DATE_EPOCH:+-T ${SOURCE_DATE_EPOCH}} "$OUTPUT.kernel" "$KERNELDIR"
|
||||
fi
|
||||
|
||||
@ -84,12 +84,10 @@
|
||||
};
|
||||
|
||||
hard_config {
|
||||
label = "hard_config";
|
||||
read-only;
|
||||
};
|
||||
|
||||
bios {
|
||||
label = "bios";
|
||||
size = <0x1000>;
|
||||
read-only;
|
||||
};
|
||||
@ -100,7 +98,6 @@
|
||||
};
|
||||
|
||||
soft_config {
|
||||
label = "soft_config";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
@ -173,7 +173,7 @@
|
||||
read-only;
|
||||
};
|
||||
|
||||
hard_config: hard_config {
|
||||
hard_config {
|
||||
read-only;
|
||||
};
|
||||
|
||||
|
||||
@ -29,7 +29,7 @@
|
||||
read-only;
|
||||
};
|
||||
|
||||
hard_config: hard_config {
|
||||
hard_config {
|
||||
read-only;
|
||||
};
|
||||
|
||||
@ -45,7 +45,6 @@
|
||||
};
|
||||
|
||||
soft_config {
|
||||
label = "soft_config";
|
||||
};
|
||||
};
|
||||
|
||||
|
||||
@ -109,7 +109,7 @@
|
||||
read-only;
|
||||
};
|
||||
|
||||
hard_config: hard_config {
|
||||
hard_config {
|
||||
read-only;
|
||||
};
|
||||
|
||||
|
||||
@ -48,7 +48,7 @@
|
||||
read-only;
|
||||
};
|
||||
|
||||
hard_config: hard_config {
|
||||
hard_config {
|
||||
read-only;
|
||||
};
|
||||
|
||||
@ -64,7 +64,6 @@
|
||||
};
|
||||
|
||||
soft_config {
|
||||
label = "soft_config";
|
||||
};
|
||||
};
|
||||
|
||||
|
||||
118
target/linux/ath79/dts/qca9533_yuncore_a930.dts
Normal file
118
target/linux/ath79/dts/qca9533_yuncore_a930.dts
Normal file
@ -0,0 +1,118 @@
|
||||
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
|
||||
|
||||
#include "qca953x.dtsi"
|
||||
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
#include <dt-bindings/input/input.h>
|
||||
|
||||
/ {
|
||||
compatible = "yuncore,a930", "qca,qca9533";
|
||||
model = "YunCore A930";
|
||||
|
||||
aliases {
|
||||
label-mac-device = ð1;
|
||||
led-boot = &led_system;
|
||||
led-failsafe = &led_system;
|
||||
led-running = &led_system;
|
||||
led-upgrade = &led_system;
|
||||
};
|
||||
|
||||
keys {
|
||||
compatible = "gpio-keys";
|
||||
|
||||
reset {
|
||||
label = "reset";
|
||||
linux,code = <KEY_RESTART>;
|
||||
gpios = <&gpio 17 GPIO_ACTIVE_LOW>;
|
||||
debounce-interval = <60>;
|
||||
};
|
||||
};
|
||||
|
||||
leds {
|
||||
compatible = "gpio-leds";
|
||||
|
||||
led_system: system {
|
||||
label = "green:system";
|
||||
gpios = <&gpio 12 GPIO_ACTIVE_LOW>;
|
||||
default-state = "keep";
|
||||
};
|
||||
|
||||
wlan2g {
|
||||
label = "blue:wlan2g";
|
||||
gpios = <&gpio 13 GPIO_ACTIVE_LOW>;
|
||||
linux,default-trigger = "phy0tpt";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&spi {
|
||||
status = "okay";
|
||||
|
||||
flash@0 {
|
||||
compatible = "jedec,spi-nor";
|
||||
reg = <0>;
|
||||
spi-max-frequency = <25000000>;
|
||||
|
||||
partitions {
|
||||
compatible = "fixed-partitions";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
partition@0 {
|
||||
label = "u-boot";
|
||||
reg = <0x000000 0x040000>;
|
||||
read-only;
|
||||
};
|
||||
|
||||
partition@40000 {
|
||||
label = "u-boot-env";
|
||||
reg = <0x040000 0x010000>;
|
||||
};
|
||||
|
||||
partition@50000 {
|
||||
compatible = "denx,uimage";
|
||||
label = "firmware";
|
||||
reg = <0x050000 0xfa0000>;
|
||||
};
|
||||
|
||||
art: partition@ff0000 {
|
||||
label = "art";
|
||||
reg = <0xff0000 0x010000>;
|
||||
read-only;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
ð0 {
|
||||
status = "okay";
|
||||
|
||||
phy-handle = <&swphy4>;
|
||||
|
||||
nvmem-cells = <&macaddr_art_0>;
|
||||
nvmem-cell-names = "mac-address";
|
||||
};
|
||||
|
||||
ð1 {
|
||||
nvmem-cells = <&macaddr_art_6>;
|
||||
nvmem-cell-names = "mac-address";
|
||||
};
|
||||
|
||||
&wmac {
|
||||
status = "okay";
|
||||
mtd-cal-data = <&art 0x1000>;
|
||||
};
|
||||
|
||||
&art {
|
||||
compatible = "nvmem-cells";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
macaddr_art_0: macaddr@0 {
|
||||
reg = <0x0 0x6>;
|
||||
};
|
||||
|
||||
macaddr_art_6: macaddr@6 {
|
||||
reg = <0x6 0x6>;
|
||||
};
|
||||
};
|
||||
@ -83,7 +83,7 @@
|
||||
read-only;
|
||||
};
|
||||
|
||||
hard_config: hard_config {
|
||||
hard_config {
|
||||
read-only;
|
||||
};
|
||||
|
||||
@ -99,7 +99,6 @@
|
||||
};
|
||||
|
||||
soft_config {
|
||||
label = "soft_config";
|
||||
};
|
||||
};
|
||||
|
||||
|
||||
@ -131,7 +131,7 @@
|
||||
read-only;
|
||||
};
|
||||
|
||||
hard_config: hard_config {
|
||||
hard_config {
|
||||
read-only;
|
||||
};
|
||||
|
||||
|
||||
32
target/linux/ath79/dts/qca9563_yuncore_xd3200.dts
Normal file
32
target/linux/ath79/dts/qca9563_yuncore_xd3200.dts
Normal file
@ -0,0 +1,32 @@
|
||||
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
|
||||
|
||||
#include "qca9563_yuncore_xd4200.dtsi"
|
||||
|
||||
/ {
|
||||
compatible = "yuncore,xd3200", "qca,qca9563";
|
||||
model = "YunCore XD3200";
|
||||
|
||||
aliases {
|
||||
label-mac-device = ð0;
|
||||
led-boot = &led_system;
|
||||
led-failsafe = &led_system;
|
||||
led-running = &led_system;
|
||||
led-upgrade = &led_system;
|
||||
};
|
||||
|
||||
leds {
|
||||
compatible = "gpio-leds";
|
||||
|
||||
led_system: system {
|
||||
label = "green:system";
|
||||
gpios = <&gpio 1 GPIO_ACTIVE_LOW>;
|
||||
default-state = "keep";
|
||||
};
|
||||
|
||||
wlan2g {
|
||||
label = "blue:wlan2g";
|
||||
gpios = <&gpio 19 GPIO_ACTIVE_LOW>;
|
||||
linux,default-trigger = "phy1tpt";
|
||||
};
|
||||
};
|
||||
};
|
||||
@ -246,7 +246,8 @@ glinet,gl-x750)
|
||||
hak5,lan-turtle)
|
||||
ucidef_set_led_netdev "wan" "WAN" "orange:system" "eth1"
|
||||
;;
|
||||
joyit,jt-or750i)
|
||||
joyit,jt-or750i|\
|
||||
yuncore,xd3200)
|
||||
ucidef_set_led_default "ath10k" "ath10k-disable" "ath10k-phy0" "0"
|
||||
;;
|
||||
meraki,mr12|\
|
||||
|
||||
@ -366,6 +366,7 @@ ath79_setup_interfaces()
|
||||
ubnt,nanobeam-ac-gen2|\
|
||||
ubnt,nanostation-ac|\
|
||||
yuncore,a782|\
|
||||
yuncore,xd3200|\
|
||||
yuncore,xd4200)
|
||||
ucidef_add_switch "switch0" \
|
||||
"0@eth0" "2:lan" "3:wan"
|
||||
|
||||
@ -46,7 +46,8 @@ case "$FIRMWARE" in
|
||||
ubnt,powerbeam-5ac-gen2|\
|
||||
ubnt,rocket-5ac-lite|\
|
||||
ubnt,unifiac-pro|\
|
||||
yuncore,a770)
|
||||
yuncore,a770|\
|
||||
yuncore,xd3200)
|
||||
caldata_extract "art" 0x5000 0x844
|
||||
;;
|
||||
avm,fritz1750e|\
|
||||
|
||||
@ -2542,6 +2542,27 @@ define Device/yuncore_a782
|
||||
endef
|
||||
TARGET_DEVICES += yuncore_a782
|
||||
|
||||
define Device/yuncore_a930
|
||||
SOC := qca9533
|
||||
DEVICE_VENDOR := YunCore
|
||||
DEVICE_MODEL := A930
|
||||
IMAGE_SIZE := 16000k
|
||||
IMAGES += tftp.bin
|
||||
IMAGE/tftp.bin := $$(IMAGE/sysupgrade.bin) | yuncore-tftp-header-16m
|
||||
endef
|
||||
TARGET_DEVICES += yuncore_a930
|
||||
|
||||
define Device/yuncore_xd3200
|
||||
SOC := qca9563
|
||||
DEVICE_VENDOR := YunCore
|
||||
DEVICE_MODEL := XD3200
|
||||
DEVICE_PACKAGES := kmod-ath10k-ct ath10k-firmware-qca988x-ct
|
||||
IMAGE_SIZE := 16000k
|
||||
IMAGES += tftp.bin
|
||||
IMAGE/tftp.bin := $$(IMAGE/sysupgrade.bin) | yuncore-tftp-header-16m
|
||||
endef
|
||||
TARGET_DEVICES += yuncore_xd3200
|
||||
|
||||
define Device/yuncore_xd4200
|
||||
SOC := qca9563
|
||||
DEVICE_VENDOR := YunCore
|
||||
|
||||
@ -4,6 +4,8 @@ FEATURES += nand
|
||||
|
||||
DEFAULT_PACKAGES += wpad-basic-wolfssl
|
||||
|
||||
KERNEL_TESTING_PATCHVER:=5.15
|
||||
|
||||
define Target/Description
|
||||
Firmware for boards using Qualcomm Atheros, MIPS-based SoCs
|
||||
in the ar72xx and subsequent series, with support for NAND flash
|
||||
|
||||
@ -10,7 +10,7 @@ BOARDNAME:=Cortina Systems CS351x
|
||||
FEATURES:=squashfs pci rtc usb dt gpio display ext4 rootfs-part boot-part
|
||||
CPU_TYPE:=fa526
|
||||
|
||||
KERNEL_PATCHVER:=5.10
|
||||
KERNEL_PATCHVER:=5.15
|
||||
|
||||
define Target/Description
|
||||
Build firmware images for the StorLink/Cortina Gemini CS351x ARM FA526 CPU
|
||||
|
||||
420
target/linux/gemini/config-5.15
Normal file
420
target/linux/gemini/config-5.15
Normal file
@ -0,0 +1,420 @@
|
||||
CONFIG_ALIGNMENT_TRAP=y
|
||||
CONFIG_AMBA_PL08X=y
|
||||
CONFIG_ARCH_32BIT_OFF_T=y
|
||||
CONFIG_ARCH_GEMINI=y
|
||||
CONFIG_ARCH_KEEP_MEMBLOCK=y
|
||||
CONFIG_ARCH_MIGHT_HAVE_PC_PARPORT=y
|
||||
# CONFIG_ARCH_MOXART is not set
|
||||
CONFIG_ARCH_MULTIPLATFORM=y
|
||||
CONFIG_ARCH_MULTI_V4=y
|
||||
# CONFIG_ARCH_MULTI_V4T is not set
|
||||
CONFIG_ARCH_MULTI_V4_V5=y
|
||||
# CONFIG_ARCH_MULTI_V5 is not set
|
||||
CONFIG_ARCH_NR_GPIO=0
|
||||
CONFIG_ARCH_OPTIONAL_KERNEL_RWX=y
|
||||
CONFIG_ARCH_SELECT_MEMORY_MODEL=y
|
||||
CONFIG_ARCH_SPARSEMEM_ENABLE=y
|
||||
CONFIG_ARM=y
|
||||
CONFIG_ARM_AMBA=y
|
||||
CONFIG_ARM_APPENDED_DTB=y
|
||||
# CONFIG_ARM_ATAG_DTB_COMPAT is not set
|
||||
CONFIG_ARM_HAS_SG_CHAIN=y
|
||||
CONFIG_ARM_L1_CACHE_SHIFT=5
|
||||
CONFIG_ARM_PATCH_PHYS_VIRT=y
|
||||
# CONFIG_ARM_SMMU is not set
|
||||
CONFIG_ARM_UNWIND=y
|
||||
CONFIG_ATA=y
|
||||
CONFIG_ATAGS=y
|
||||
CONFIG_ATA_FORCE=y
|
||||
CONFIG_ATA_VERBOSE_ERROR=y
|
||||
CONFIG_AUTO_ZRELADDR=y
|
||||
CONFIG_BINFMT_FLAT_ARGVP_ENVP_ON_STACK=y
|
||||
CONFIG_BLK_DEV_SD=y
|
||||
CONFIG_BLK_MQ_PCI=y
|
||||
CONFIG_BLK_PM=y
|
||||
CONFIG_BOUNCE=y
|
||||
CONFIG_CLKSRC_MMIO=y
|
||||
CONFIG_CLONE_BACKWARDS=y
|
||||
CONFIG_CMA=y
|
||||
CONFIG_CMA_ALIGNMENT=8
|
||||
CONFIG_CMA_AREAS=7
|
||||
# CONFIG_CMA_DEBUG is not set
|
||||
# CONFIG_CMA_DEBUGFS is not set
|
||||
CONFIG_CMA_SIZE_PERCENTAGE=10
|
||||
# CONFIG_CMA_SIZE_SEL_MAX is not set
|
||||
# CONFIG_CMA_SIZE_SEL_MBYTES is not set
|
||||
# CONFIG_CMA_SIZE_SEL_MIN is not set
|
||||
CONFIG_CMA_SIZE_SEL_PERCENTAGE=y
|
||||
# CONFIG_CMA_SYSFS is not set
|
||||
CONFIG_COMMON_CLK=y
|
||||
CONFIG_COMMON_CLK_GEMINI=y
|
||||
CONFIG_COMPAT_32BIT_TIME=y
|
||||
CONFIG_CONSOLE_TRANSLATIONS=y
|
||||
CONFIG_CONTIG_ALLOC=y
|
||||
CONFIG_COREDUMP=y
|
||||
CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS=y
|
||||
CONFIG_CPU_32v4=y
|
||||
CONFIG_CPU_ABRT_EV4=y
|
||||
CONFIG_CPU_CACHE_FA=y
|
||||
CONFIG_CPU_CACHE_VIVT=y
|
||||
CONFIG_CPU_COPY_FA=y
|
||||
CONFIG_CPU_CP15=y
|
||||
CONFIG_CPU_CP15_MMU=y
|
||||
# CONFIG_CPU_DCACHE_WRITETHROUGH is not set
|
||||
CONFIG_CPU_FA526=y
|
||||
CONFIG_CPU_NO_EFFICIENT_FFS=y
|
||||
CONFIG_CPU_PABRT_LEGACY=y
|
||||
CONFIG_CPU_THERMAL=y
|
||||
CONFIG_CPU_TLB_FA=y
|
||||
CONFIG_CPU_USE_DOMAINS=y
|
||||
CONFIG_CRASH_CORE=y
|
||||
CONFIG_CRC16=y
|
||||
# CONFIG_CRC32_SARWATE is not set
|
||||
CONFIG_CRC32_SLICEBY8=y
|
||||
CONFIG_CRC_CCITT=y
|
||||
CONFIG_CRC_ITU_T=y
|
||||
CONFIG_CROSS_MEMORY_ATTACH=y
|
||||
CONFIG_CRYPTO_CMAC=y
|
||||
CONFIG_CRYPTO_CRC32C=y
|
||||
CONFIG_CRYPTO_DES=y
|
||||
CONFIG_CRYPTO_DEV_SL3516=y
|
||||
# CONFIG_CRYPTO_DEV_SL3516_DEBUG is not set
|
||||
CONFIG_CRYPTO_DRBG=y
|
||||
CONFIG_CRYPTO_DRBG_HMAC=y
|
||||
CONFIG_CRYPTO_DRBG_MENU=y
|
||||
CONFIG_CRYPTO_ECB=y
|
||||
CONFIG_CRYPTO_ECHAINIV=y
|
||||
CONFIG_CRYPTO_ENGINE=y
|
||||
CONFIG_CRYPTO_HMAC=y
|
||||
CONFIG_CRYPTO_HW=y
|
||||
CONFIG_CRYPTO_JITTERENTROPY=y
|
||||
CONFIG_CRYPTO_LIB_DES=y
|
||||
CONFIG_CRYPTO_LIB_SHA256=y
|
||||
CONFIG_CRYPTO_MD4=y
|
||||
CONFIG_CRYPTO_MD5=y
|
||||
CONFIG_CRYPTO_RNG=y
|
||||
CONFIG_CRYPTO_RNG2=y
|
||||
CONFIG_CRYPTO_RNG_DEFAULT=y
|
||||
CONFIG_CRYPTO_SEQIV=y
|
||||
CONFIG_CRYPTO_SHA256=y
|
||||
CONFIG_CRYPTO_SHA512=y
|
||||
CONFIG_DEBUG_BUGVERBOSE=y
|
||||
CONFIG_DEBUG_LL_INCLUDE="mach/debug-macro.S"
|
||||
CONFIG_DEBUG_MEMORY_INIT=y
|
||||
CONFIG_DECOMPRESS_BZIP2=y
|
||||
CONFIG_DECOMPRESS_GZIP=y
|
||||
CONFIG_DECOMPRESS_LZ4=y
|
||||
CONFIG_DECOMPRESS_LZMA=y
|
||||
CONFIG_DECOMPRESS_LZO=y
|
||||
CONFIG_DECOMPRESS_XZ=y
|
||||
CONFIG_DMADEVICES=y
|
||||
CONFIG_DMATEST=y
|
||||
CONFIG_DMA_CMA=y
|
||||
CONFIG_DMA_ENGINE=y
|
||||
CONFIG_DMA_ENGINE_RAID=y
|
||||
CONFIG_DMA_OF=y
|
||||
CONFIG_DMA_OPS=y
|
||||
CONFIG_DMA_REMAP=y
|
||||
CONFIG_DMA_SHARED_BUFFER=y
|
||||
CONFIG_DMA_VIRTUAL_CHANNELS=y
|
||||
CONFIG_DRM=y
|
||||
CONFIG_DRM_BRIDGE=y
|
||||
CONFIG_DRM_FBDEV_EMULATION=y
|
||||
CONFIG_DRM_FBDEV_OVERALLOC=100
|
||||
CONFIG_DRM_GEM_CMA_HELPER=y
|
||||
CONFIG_DRM_KMS_CMA_HELPER=y
|
||||
CONFIG_DRM_KMS_HELPER=y
|
||||
CONFIG_DRM_PANEL=y
|
||||
CONFIG_DRM_PANEL_BRIDGE=y
|
||||
CONFIG_DRM_PANEL_ILITEK_IL9322=y
|
||||
CONFIG_DRM_PANEL_ORIENTATION_QUIRKS=y
|
||||
CONFIG_DRM_TVE200=y
|
||||
CONFIG_DTC=y
|
||||
CONFIG_DUMMY_CONSOLE=y
|
||||
CONFIG_EDAC_ATOMIC_SCRUB=y
|
||||
CONFIG_EDAC_SUPPORT=y
|
||||
CONFIG_EEPROM_93CX6=y
|
||||
CONFIG_ELF_CORE=y
|
||||
# CONFIG_EMBEDDED is not set
|
||||
# CONFIG_EXPERT is not set
|
||||
CONFIG_EXT4_FS=y
|
||||
CONFIG_FARADAY_FTINTC010=y
|
||||
CONFIG_FB=y
|
||||
CONFIG_FB_CFB_COPYAREA=y
|
||||
CONFIG_FB_CFB_FILLRECT=y
|
||||
CONFIG_FB_CFB_IMAGEBLIT=y
|
||||
CONFIG_FB_CMDLINE=y
|
||||
CONFIG_FB_DEFERRED_IO=y
|
||||
CONFIG_FB_SYS_COPYAREA=y
|
||||
CONFIG_FB_SYS_FILLRECT=y
|
||||
CONFIG_FB_SYS_FOPS=y
|
||||
CONFIG_FB_SYS_IMAGEBLIT=y
|
||||
CONFIG_FHANDLE=y
|
||||
CONFIG_FIXED_PHY=y
|
||||
CONFIG_FIX_EARLYCON_MEM=y
|
||||
CONFIG_FONT_8x16=y
|
||||
CONFIG_FONT_8x8=y
|
||||
CONFIG_FONT_SUPPORT=y
|
||||
CONFIG_FRAMEBUFFER_CONSOLE=y
|
||||
CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y
|
||||
# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set
|
||||
CONFIG_FS_IOMAP=y
|
||||
CONFIG_FS_MBCACHE=y
|
||||
CONFIG_FS_POSIX_ACL=y
|
||||
CONFIG_FTTMR010_TIMER=y
|
||||
CONFIG_FTWDT010_WATCHDOG=y
|
||||
CONFIG_FWNODE_MDIO=y
|
||||
CONFIG_FW_LOADER_PAGED_BUF=y
|
||||
# CONFIG_FW_LOADER_USER_HELPER_FALLBACK is not set
|
||||
CONFIG_GEMINI_ETHERNET=y
|
||||
CONFIG_GENERIC_ALLOCATOR=y
|
||||
CONFIG_GENERIC_ATOMIC64=y
|
||||
CONFIG_GENERIC_BUG=y
|
||||
CONFIG_GENERIC_CLOCKEVENTS=y
|
||||
CONFIG_GENERIC_CPU_AUTOPROBE=y
|
||||
CONFIG_GENERIC_EARLY_IOREMAP=y
|
||||
CONFIG_GENERIC_IDLE_POLL_SETUP=y
|
||||
CONFIG_GENERIC_IRQ_MULTI_HANDLER=y
|
||||
CONFIG_GENERIC_IRQ_SHOW=y
|
||||
CONFIG_GENERIC_IRQ_SHOW_LEVEL=y
|
||||
CONFIG_GENERIC_LIB_DEVMEM_IS_ALLOWED=y
|
||||
CONFIG_GENERIC_PCI_IOMAP=y
|
||||
CONFIG_GENERIC_PINCONF=y
|
||||
CONFIG_GENERIC_SCHED_CLOCK=y
|
||||
CONFIG_GENERIC_SMP_IDLE_THREAD=y
|
||||
CONFIG_GENERIC_STRNCPY_FROM_USER=y
|
||||
CONFIG_GENERIC_STRNLEN_USER=y
|
||||
CONFIG_GLOB=y
|
||||
CONFIG_GPIOLIB=y
|
||||
CONFIG_GPIOLIB_IRQCHIP=y
|
||||
CONFIG_GPIO_CDEV=y
|
||||
CONFIG_GPIO_FTGPIO010=y
|
||||
CONFIG_GPIO_GENERIC=y
|
||||
CONFIG_GRO_CELLS=y
|
||||
CONFIG_HANDLE_DOMAIN_IRQ=y
|
||||
CONFIG_HARDIRQS_SW_RESEND=y
|
||||
CONFIG_HAS_DMA=y
|
||||
CONFIG_HAS_IOMEM=y
|
||||
CONFIG_HAS_IOPORT_MAP=y
|
||||
CONFIG_HDMI=y
|
||||
CONFIG_HIGHMEM=y
|
||||
CONFIG_HIGHPTE=y
|
||||
CONFIG_HWMON=y
|
||||
CONFIG_HW_CONSOLE=y
|
||||
CONFIG_HW_RANDOM=y
|
||||
CONFIG_HZ_FIXED=0
|
||||
CONFIG_I2C=y
|
||||
CONFIG_I2C_ALGOBIT=y
|
||||
CONFIG_I2C_BOARDINFO=y
|
||||
CONFIG_I2C_COMPAT=y
|
||||
CONFIG_I2C_GPIO=y
|
||||
CONFIG_I2C_HELPER_AUTO=y
|
||||
CONFIG_INITRAMFS_SOURCE=""
|
||||
CONFIG_INPUT=y
|
||||
CONFIG_INPUT_KEYBOARD=y
|
||||
# CONFIG_IOMMU_DEBUGFS is not set
|
||||
# CONFIG_IOMMU_IO_PGTABLE_ARMV7S is not set
|
||||
# CONFIG_IOMMU_IO_PGTABLE_LPAE is not set
|
||||
CONFIG_IOMMU_SUPPORT=y
|
||||
CONFIG_IO_URING=y
|
||||
CONFIG_IPC_NS=y
|
||||
CONFIG_IRQCHIP=y
|
||||
CONFIG_IRQ_DOMAIN=y
|
||||
CONFIG_IRQ_FORCED_THREADING=y
|
||||
CONFIG_IRQ_WORK=y
|
||||
# CONFIG_ISDN is not set
|
||||
CONFIG_JBD2=y
|
||||
CONFIG_KALLSYMS=y
|
||||
CONFIG_KCMP=y
|
||||
CONFIG_KERNEL_LZMA=y
|
||||
# CONFIG_KERNEL_XZ is not set
|
||||
CONFIG_KEXEC=y
|
||||
CONFIG_KEXEC_CORE=y
|
||||
CONFIG_KEYBOARD_DLINK_DIR685=y
|
||||
CONFIG_KMAP_LOCAL=y
|
||||
CONFIG_KMAP_LOCAL_NON_LINEAR_PTE_ARRAY=y
|
||||
# CONFIG_LDM_DEBUG is not set
|
||||
CONFIG_LDM_PARTITION=y
|
||||
CONFIG_LEDS_TRIGGER_DISK=y
|
||||
CONFIG_LIBFDT=y
|
||||
CONFIG_LOCK_DEBUGGING_SUPPORT=y
|
||||
CONFIG_LOGO=y
|
||||
CONFIG_LOGO_LINUX_CLUT224=y
|
||||
# CONFIG_LOGO_LINUX_MONO is not set
|
||||
CONFIG_LOGO_LINUX_VGA16=y
|
||||
CONFIG_LZ4_DECOMPRESS=y
|
||||
CONFIG_LZO_DECOMPRESS=y
|
||||
CONFIG_MARVELL_PHY=y
|
||||
CONFIG_MDIO_BITBANG=y
|
||||
CONFIG_MDIO_BUS=y
|
||||
CONFIG_MDIO_DEVICE=y
|
||||
CONFIG_MDIO_DEVRES=y
|
||||
CONFIG_MDIO_GPIO=y
|
||||
CONFIG_MEMFD_CREATE=y
|
||||
CONFIG_MEMORY_ISOLATION=y
|
||||
CONFIG_MFD_SYSCON=y
|
||||
CONFIG_MIGRATION=y
|
||||
CONFIG_MODULES_USE_ELF_REL=y
|
||||
# CONFIG_MODULE_UNLOAD is not set
|
||||
CONFIG_MQ_IOSCHED_DEADLINE=y
|
||||
CONFIG_MQ_IOSCHED_KYBER=y
|
||||
CONFIG_MTD_CFI_STAA=y
|
||||
CONFIG_MTD_JEDECPROBE=y
|
||||
CONFIG_MTD_PHYSMAP=y
|
||||
CONFIG_MTD_PHYSMAP_GEMINI=y
|
||||
CONFIG_MTD_REDBOOT_PARTS=y
|
||||
CONFIG_MTD_SPLIT_FIRMWARE=y
|
||||
CONFIG_MTD_SPLIT_WRGG_FW=y
|
||||
CONFIG_NAMESPACES=y
|
||||
CONFIG_NEED_DMA_MAP_STATE=y
|
||||
CONFIG_NEED_KUSER_HELPERS=y
|
||||
CONFIG_NEED_PER_CPU_KM=y
|
||||
CONFIG_NET_DEVLINK=y
|
||||
CONFIG_NET_DSA=y
|
||||
CONFIG_NET_DSA_REALTEK_SMI=y
|
||||
CONFIG_NET_DSA_TAG_RTL4_A=y
|
||||
CONFIG_NET_NS=y
|
||||
CONFIG_NET_SELFTESTS=y
|
||||
CONFIG_NET_SWITCHDEV=y
|
||||
CONFIG_NLS=y
|
||||
CONFIG_NO_HZ_COMMON=y
|
||||
CONFIG_NO_HZ_IDLE=y
|
||||
CONFIG_NVMEM=y
|
||||
CONFIG_OF=y
|
||||
CONFIG_OF_ADDRESS=y
|
||||
CONFIG_OF_EARLY_FLATTREE=y
|
||||
CONFIG_OF_FLATTREE=y
|
||||
CONFIG_OF_GPIO=y
|
||||
CONFIG_OF_IRQ=y
|
||||
CONFIG_OF_KOBJ=y
|
||||
CONFIG_OF_MDIO=y
|
||||
CONFIG_OLD_SIGACTION=y
|
||||
CONFIG_OLD_SIGSUSPEND3=y
|
||||
CONFIG_PAGE_OFFSET=0xC0000000
|
||||
# CONFIG_PANIC_ON_OOPS is not set
|
||||
CONFIG_PANIC_ON_OOPS_VALUE=0
|
||||
CONFIG_PANIC_TIMEOUT=0
|
||||
CONFIG_PATA_FTIDE010=y
|
||||
CONFIG_PCI=y
|
||||
CONFIG_PCIEASPM=y
|
||||
CONFIG_PCIEASPM_DEFAULT=y
|
||||
# CONFIG_PCIEASPM_PERFORMANCE is not set
|
||||
# CONFIG_PCIEASPM_POWERSAVE is not set
|
||||
# CONFIG_PCIEASPM_POWER_SUPERSAVE is not set
|
||||
CONFIG_PCI_DOMAINS=y
|
||||
CONFIG_PCI_DOMAINS_GENERIC=y
|
||||
CONFIG_PCI_FTPCI100=y
|
||||
CONFIG_PERF_USE_VMALLOC=y
|
||||
CONFIG_PGTABLE_LEVELS=2
|
||||
CONFIG_PHYLIB=y
|
||||
CONFIG_PHYLINK=y
|
||||
CONFIG_PID_NS=y
|
||||
CONFIG_PINCTRL=y
|
||||
CONFIG_PINCTRL_GEMINI=y
|
||||
# CONFIG_PINCTRL_SINGLE is not set
|
||||
CONFIG_PM=y
|
||||
CONFIG_PM_CLK=y
|
||||
CONFIG_POWER_RESET=y
|
||||
CONFIG_POWER_RESET_GEMINI_POWEROFF=y
|
||||
CONFIG_POWER_RESET_SYSCON=y
|
||||
CONFIG_PREEMPT=y
|
||||
CONFIG_PREEMPTION=y
|
||||
CONFIG_PREEMPT_COUNT=y
|
||||
# CONFIG_PREEMPT_NONE is not set
|
||||
CONFIG_PREEMPT_RCU=y
|
||||
CONFIG_PROC_PAGE_MONITOR=y
|
||||
CONFIG_PTP_1588_CLOCK_OPTIONAL=y
|
||||
CONFIG_RATIONAL=y
|
||||
CONFIG_RD_BZIP2=y
|
||||
CONFIG_RD_GZIP=y
|
||||
CONFIG_RD_LZ4=y
|
||||
CONFIG_RD_LZMA=y
|
||||
CONFIG_RD_LZO=y
|
||||
CONFIG_RD_XZ=y
|
||||
CONFIG_REALTEK_PHY=y
|
||||
CONFIG_REGMAP=y
|
||||
CONFIG_REGMAP_I2C=y
|
||||
CONFIG_REGMAP_MMIO=y
|
||||
CONFIG_REGULATOR=y
|
||||
CONFIG_REGULATOR_FIXED_VOLTAGE=y
|
||||
CONFIG_RELAY=y
|
||||
CONFIG_RESET_CONTROLLER=y
|
||||
CONFIG_RSEQ=y
|
||||
CONFIG_RTC_CLASS=y
|
||||
CONFIG_RTC_DRV_FTRTC010=y
|
||||
CONFIG_RTC_I2C_AND_SPI=y
|
||||
CONFIG_RTC_MC146818_LIB=y
|
||||
CONFIG_RTC_NVMEM=y
|
||||
CONFIG_SATA_GEMINI=y
|
||||
CONFIG_SATA_HOST=y
|
||||
CONFIG_SATA_PMP=y
|
||||
CONFIG_SCSI=y
|
||||
CONFIG_SCSI_COMMON=y
|
||||
# CONFIG_SCSI_LOWLEVEL is not set
|
||||
# CONFIG_SCSI_PROC_FS is not set
|
||||
CONFIG_SENSORS_DRIVETEMP=y
|
||||
CONFIG_SENSORS_GPIO_FAN=y
|
||||
CONFIG_SENSORS_LM75=y
|
||||
CONFIG_SERIAL_8250_DEPRECATED_OPTIONS=y
|
||||
CONFIG_SERIAL_8250_EXAR=y
|
||||
CONFIG_SERIAL_8250_FSL=y
|
||||
CONFIG_SERIAL_8250_NR_UARTS=1
|
||||
CONFIG_SERIAL_8250_PCI=y
|
||||
CONFIG_SERIAL_8250_RUNTIME_UARTS=1
|
||||
CONFIG_SERIAL_MCTRL_GPIO=y
|
||||
CONFIG_SERIAL_OF_PLATFORM=y
|
||||
CONFIG_SERIO=y
|
||||
CONFIG_SERIO_LIBPS2=y
|
||||
CONFIG_SERIO_SERPORT=y
|
||||
CONFIG_SG_POOL=y
|
||||
CONFIG_SLUB_DEBUG=y
|
||||
CONFIG_SPARSE_IRQ=y
|
||||
CONFIG_SPI=y
|
||||
CONFIG_SPI_BITBANG=y
|
||||
CONFIG_SPI_GPIO=y
|
||||
CONFIG_SPI_MASTER=y
|
||||
CONFIG_SPLIT_PTLOCK_CPUS=999999
|
||||
CONFIG_SRCU=y
|
||||
# CONFIG_STRIP_ASM_SYMS is not set
|
||||
CONFIG_SWPHY=y
|
||||
CONFIG_SYNC_FILE=y
|
||||
CONFIG_SYSFS_SYSCALL=y
|
||||
CONFIG_SYS_SUPPORTS_APM_EMULATION=y
|
||||
CONFIG_THERMAL=y
|
||||
CONFIG_THERMAL_DEFAULT_GOV_STEP_WISE=y
|
||||
CONFIG_THERMAL_EMERGENCY_POWEROFF_DELAY_MS=0
|
||||
CONFIG_THERMAL_GOV_STEP_WISE=y
|
||||
CONFIG_THERMAL_HWMON=y
|
||||
CONFIG_THERMAL_OF=y
|
||||
CONFIG_TICK_CPU_ACCOUNTING=y
|
||||
CONFIG_TIMER_OF=y
|
||||
CONFIG_TIMER_PROBE=y
|
||||
CONFIG_TMPFS_POSIX_ACL=y
|
||||
CONFIG_TREE_RCU=y
|
||||
CONFIG_TREE_SRCU=y
|
||||
CONFIG_UNCOMPRESS_INCLUDE="debug/uncompress.h"
|
||||
CONFIG_UNINLINE_SPIN_UNLOCK=y
|
||||
CONFIG_UNWINDER_ARM=y
|
||||
CONFIG_USB_SUPPORT=y
|
||||
CONFIG_USER_NS=y
|
||||
CONFIG_USE_OF=y
|
||||
CONFIG_UTS_NS=y
|
||||
CONFIG_VGA_ARB=y
|
||||
CONFIG_VGA_ARB_MAX_GPUS=16
|
||||
CONFIG_VITESSE_PHY=y
|
||||
CONFIG_VM_EVENT_COUNTERS=y
|
||||
CONFIG_VT=y
|
||||
CONFIG_VT_CONSOLE=y
|
||||
CONFIG_VT_HW_CONSOLE_BINDING=y
|
||||
CONFIG_WATCHDOG_CORE=y
|
||||
# CONFIG_WQ_POWER_EFFICIENT_DEFAULT is not set
|
||||
CONFIG_XZ_DEC_ARM=y
|
||||
CONFIG_XZ_DEC_ARMTHUMB=y
|
||||
CONFIG_XZ_DEC_BCJ=y
|
||||
CONFIG_XZ_DEC_IA64=y
|
||||
CONFIG_XZ_DEC_POWERPC=y
|
||||
CONFIG_XZ_DEC_SPARC=y
|
||||
CONFIG_XZ_DEC_X86=y
|
||||
CONFIG_ZBOOT_ROM_BSS=0
|
||||
CONFIG_ZBOOT_ROM_TEXT=0
|
||||
CONFIG_ZLIB_INFLATE=y
|
||||
@ -0,0 +1,131 @@
|
||||
From ff887de2f7af17d6264eb946f6b336e6e1521222 Mon Sep 17 00:00:00 2001
|
||||
From: Linus Walleij <linus.walleij@linaro.org>
|
||||
Date: Fri, 21 Apr 2017 22:19:00 +0200
|
||||
Subject: [PATCH 1/2] usb: host: fotg2: add Gemini-specific handling
|
||||
|
||||
The Cortina Systems Gemini has bolted on a PHY inside the
|
||||
silicon that can be handled by six bits in a MISC register in
|
||||
the system controller.
|
||||
|
||||
If we are running on Gemini, look up a syscon regmap through
|
||||
a phandle and enable VBUS and optionally the Mini-B connector.
|
||||
|
||||
If the device is flagged as "wakeup-source" using the standard
|
||||
DT bindings, we also enable this in the global controller for
|
||||
respective port.
|
||||
|
||||
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
|
||||
---
|
||||
drivers/usb/host/Kconfig | 1 +
|
||||
drivers/usb/host/fotg210-hcd.c | 76 ++++++++++++++++++++++++++++++++++
|
||||
2 files changed, 77 insertions(+)
|
||||
|
||||
--- a/drivers/usb/host/Kconfig
|
||||
+++ b/drivers/usb/host/Kconfig
|
||||
@@ -381,6 +381,7 @@ config USB_ISP1362_HCD
|
||||
config USB_FOTG210_HCD
|
||||
tristate "FOTG210 HCD support"
|
||||
depends on USB && HAS_DMA && HAS_IOMEM
|
||||
+ select MFD_SYSCON
|
||||
help
|
||||
Faraday FOTG210 is an OTG controller which can be configured as
|
||||
an USB2.0 host. It is designed to meet USB2.0 EHCI specification
|
||||
--- a/drivers/usb/host/fotg210-hcd.c
|
||||
+++ b/drivers/usb/host/fotg210-hcd.c
|
||||
@@ -34,6 +34,10 @@
|
||||
#include <linux/io.h>
|
||||
#include <linux/iopoll.h>
|
||||
#include <linux/clk.h>
|
||||
+#include <linux/bitops.h>
|
||||
+/* For Cortina Gemini */
|
||||
+#include <linux/mfd/syscon.h>
|
||||
+#include <linux/regmap.h>
|
||||
|
||||
#include <asm/byteorder.h>
|
||||
#include <asm/irq.h>
|
||||
@@ -5557,6 +5561,72 @@ static void fotg210_init(struct fotg210_
|
||||
}
|
||||
|
||||
/*
|
||||
+ * Gemini-specific initialization function, only executed on the
|
||||
+ * Gemini SoC using the global misc control register.
|
||||
+ */
|
||||
+#define GEMINI_GLOBAL_MISC_CTRL 0x30
|
||||
+#define GEMINI_MISC_USB0_WAKEUP BIT(14)
|
||||
+#define GEMINI_MISC_USB1_WAKEUP BIT(15)
|
||||
+#define GEMINI_MISC_USB0_VBUS_ON BIT(22)
|
||||
+#define GEMINI_MISC_USB1_VBUS_ON BIT(23)
|
||||
+#define GEMINI_MISC_USB0_MINI_B BIT(29)
|
||||
+#define GEMINI_MISC_USB1_MINI_B BIT(30)
|
||||
+
|
||||
+static int fotg210_gemini_init(struct device *dev, struct usb_hcd *hcd)
|
||||
+{
|
||||
+ struct device_node *np = dev->of_node;
|
||||
+ struct regmap *map;
|
||||
+ bool mini_b;
|
||||
+ bool wakeup;
|
||||
+ u32 mask, val;
|
||||
+ int ret;
|
||||
+
|
||||
+ map = syscon_regmap_lookup_by_phandle(np, "syscon");
|
||||
+ if (IS_ERR(map)) {
|
||||
+ dev_err(dev, "no syscon\n");
|
||||
+ return PTR_ERR(map);
|
||||
+ }
|
||||
+ mini_b = of_property_read_bool(np, "cortina,gemini-mini-b");
|
||||
+ wakeup = of_property_read_bool(np, "wakeup-source");
|
||||
+
|
||||
+ /*
|
||||
+ * Figure out if this is USB0 or USB1 by simply checking the
|
||||
+ * physical base address.
|
||||
+ */
|
||||
+ mask = 0;
|
||||
+ if (hcd->rsrc_start == 0x69000000) {
|
||||
+ val = GEMINI_MISC_USB1_VBUS_ON;
|
||||
+ if (mini_b)
|
||||
+ val |= GEMINI_MISC_USB1_MINI_B;
|
||||
+ else
|
||||
+ mask |= GEMINI_MISC_USB1_MINI_B;
|
||||
+ if (wakeup)
|
||||
+ val |= GEMINI_MISC_USB1_WAKEUP;
|
||||
+ else
|
||||
+ mask |= GEMINI_MISC_USB1_WAKEUP;
|
||||
+ } else {
|
||||
+ val = GEMINI_MISC_USB0_VBUS_ON;
|
||||
+ if (mini_b)
|
||||
+ val |= GEMINI_MISC_USB0_MINI_B;
|
||||
+ else
|
||||
+ mask |= GEMINI_MISC_USB0_MINI_B;
|
||||
+ if (wakeup)
|
||||
+ val |= GEMINI_MISC_USB0_WAKEUP;
|
||||
+ else
|
||||
+ mask |= GEMINI_MISC_USB0_WAKEUP;
|
||||
+ }
|
||||
+
|
||||
+ ret = regmap_update_bits(map, GEMINI_GLOBAL_MISC_CTRL, mask, val);
|
||||
+ if (ret) {
|
||||
+ dev_err(dev, "failed to initialize Gemini PHY\n");
|
||||
+ return ret;
|
||||
+ }
|
||||
+
|
||||
+ dev_info(dev, "initialized Gemini PHY\n");
|
||||
+ return 0;
|
||||
+}
|
||||
+
|
||||
+/**
|
||||
* fotg210_hcd_probe - initialize faraday FOTG210 HCDs
|
||||
*
|
||||
* Allocates basic resources for this USB host controller, and
|
||||
@@ -5633,6 +5703,12 @@ static int fotg210_hcd_probe(struct plat
|
||||
|
||||
fotg210_init(fotg210);
|
||||
|
||||
+ if (of_device_is_compatible(dev->of_node, "cortina,gemini-usb")) {
|
||||
+ retval = fotg210_gemini_init(dev, hcd);
|
||||
+ if (retval)
|
||||
+ goto failed_dis_clk;
|
||||
+ }
|
||||
+
|
||||
retval = usb_add_hcd(hcd, irq, IRQF_SHARED);
|
||||
if (retval) {
|
||||
dev_err(dev, "failed to add hcd with err %d\n", retval);
|
||||
@ -0,0 +1,37 @@
|
||||
From 36ee838bf83c01cff7cb47c7b07be278d2950ac0 Mon Sep 17 00:00:00 2001
|
||||
From: Linus Walleij <linus.walleij@linaro.org>
|
||||
Date: Mon, 11 Mar 2019 15:44:29 +0100
|
||||
Subject: [PATCH 2/2] ARM: dts: Augment DIR-685 partition table for OpenWrt
|
||||
|
||||
Rename the firmware partition so that the firmware MTD
|
||||
splitter will do its job, drop the rootfs arguments as
|
||||
the MTD splitter will set this up automatically.
|
||||
|
||||
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
|
||||
---
|
||||
arch/arm/boot/dts/gemini-dlink-dir-685.dts | 6 +++---
|
||||
1 file changed, 3 insertions(+), 3 deletions(-)
|
||||
|
||||
--- a/arch/arm/boot/dts/gemini-dlink-dir-685.dts
|
||||
+++ b/arch/arm/boot/dts/gemini-dlink-dir-685.dts
|
||||
@@ -20,7 +20,7 @@
|
||||
};
|
||||
|
||||
chosen {
|
||||
- bootargs = "console=ttyS0,19200n8 root=/dev/sda1 rw rootwait consoleblank=300";
|
||||
+ bootargs = "console=ttyS0,19200n8 consoleblank=300";
|
||||
stdout-path = "uart0:19200n8";
|
||||
};
|
||||
|
||||
@@ -317,9 +317,9 @@
|
||||
* this is called "upgrade" on the vendor system.
|
||||
*/
|
||||
partition@40000 {
|
||||
- label = "upgrade";
|
||||
+ compatible = "wrg";
|
||||
+ label = "firmware";
|
||||
reg = <0x00040000 0x01f40000>;
|
||||
- read-only;
|
||||
};
|
||||
/* RGDB, Residental Gateway Database? */
|
||||
partition@1f80000 {
|
||||
@ -0,0 +1,141 @@
|
||||
From c9111895fd38dadf125e07be627778a9950d8d77 Mon Sep 17 00:00:00 2001
|
||||
From: DENG Qingfang <dqfext@gmail.com>
|
||||
Date: Sun, 26 Sep 2021 00:59:24 +0200
|
||||
Subject: [PATCH 01/11] net: dsa: rtl8366rb: Support bridge offloading
|
||||
MIME-Version: 1.0
|
||||
Content-Type: text/plain; charset=UTF-8
|
||||
Content-Transfer-Encoding: 8bit
|
||||
|
||||
Use port isolation registers to configure bridge offloading.
|
||||
|
||||
Tested on the D-Link DIR-685, switching between ports and
|
||||
sniffing ports to make sure no packets leak.
|
||||
|
||||
Cc: Vladimir Oltean <olteanv@gmail.com>
|
||||
Cc: Mauri Sandberg <sandberg@mailfence.com>
|
||||
Reviewed-by: Vladimir Oltean <olteanv@gmail.com>
|
||||
Reviewed-by: Alvin Šipraga <alsi@bang-olufsen.dk>
|
||||
Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
|
||||
Signed-off-by: DENG Qingfang <dqfext@gmail.com>
|
||||
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
|
||||
Signed-off-by: David S. Miller <davem@davemloft.net>
|
||||
---
|
||||
drivers/net/dsa/rtl8366rb.c | 86 +++++++++++++++++++++++++++++++++++++
|
||||
1 file changed, 86 insertions(+)
|
||||
|
||||
--- a/drivers/net/dsa/rtl8366rb.c
|
||||
+++ b/drivers/net/dsa/rtl8366rb.c
|
||||
@@ -300,6 +300,13 @@
|
||||
#define RTL8366RB_INTERRUPT_STATUS_REG 0x0442
|
||||
#define RTL8366RB_NUM_INTERRUPT 14 /* 0..13 */
|
||||
|
||||
+/* Port isolation registers */
|
||||
+#define RTL8366RB_PORT_ISO_BASE 0x0F08
|
||||
+#define RTL8366RB_PORT_ISO(pnum) (RTL8366RB_PORT_ISO_BASE + (pnum))
|
||||
+#define RTL8366RB_PORT_ISO_EN BIT(0)
|
||||
+#define RTL8366RB_PORT_ISO_PORTS_MASK GENMASK(7, 1)
|
||||
+#define RTL8366RB_PORT_ISO_PORTS(pmask) ((pmask) << 1)
|
||||
+
|
||||
/* bits 0..5 enable force when cleared */
|
||||
#define RTL8366RB_MAC_FORCE_CTRL_REG 0x0F11
|
||||
|
||||
@@ -835,6 +842,21 @@ static int rtl8366rb_setup(struct dsa_sw
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
+ /* Isolate all user ports so they can only send packets to itself and the CPU port */
|
||||
+ for (i = 0; i < RTL8366RB_PORT_NUM_CPU; i++) {
|
||||
+ ret = regmap_write(smi->map, RTL8366RB_PORT_ISO(i),
|
||||
+ RTL8366RB_PORT_ISO_PORTS(BIT(RTL8366RB_PORT_NUM_CPU)) |
|
||||
+ RTL8366RB_PORT_ISO_EN);
|
||||
+ if (ret)
|
||||
+ return ret;
|
||||
+ }
|
||||
+ /* CPU port can send packets to all ports */
|
||||
+ ret = regmap_write(smi->map, RTL8366RB_PORT_ISO(RTL8366RB_PORT_NUM_CPU),
|
||||
+ RTL8366RB_PORT_ISO_PORTS(dsa_user_ports(ds)) |
|
||||
+ RTL8366RB_PORT_ISO_EN);
|
||||
+ if (ret)
|
||||
+ return ret;
|
||||
+
|
||||
/* Set up the "green ethernet" feature */
|
||||
ret = rtl8366rb_jam_table(rtl8366rb_green_jam,
|
||||
ARRAY_SIZE(rtl8366rb_green_jam), smi, false);
|
||||
@@ -1127,6 +1149,68 @@ rtl8366rb_port_disable(struct dsa_switch
|
||||
rb8366rb_set_port_led(smi, port, false);
|
||||
}
|
||||
|
||||
+static int
|
||||
+rtl8366rb_port_bridge_join(struct dsa_switch *ds, int port,
|
||||
+ struct net_device *bridge)
|
||||
+{
|
||||
+ struct realtek_smi *smi = ds->priv;
|
||||
+ unsigned int port_bitmap = 0;
|
||||
+ int ret, i;
|
||||
+
|
||||
+ /* Loop over all other ports than the current one */
|
||||
+ for (i = 0; i < RTL8366RB_PORT_NUM_CPU; i++) {
|
||||
+ /* Current port handled last */
|
||||
+ if (i == port)
|
||||
+ continue;
|
||||
+ /* Not on this bridge */
|
||||
+ if (dsa_to_port(ds, i)->bridge_dev != bridge)
|
||||
+ continue;
|
||||
+ /* Join this port to each other port on the bridge */
|
||||
+ ret = regmap_update_bits(smi->map, RTL8366RB_PORT_ISO(i),
|
||||
+ RTL8366RB_PORT_ISO_PORTS(BIT(port)),
|
||||
+ RTL8366RB_PORT_ISO_PORTS(BIT(port)));
|
||||
+ if (ret)
|
||||
+ dev_err(smi->dev, "failed to join port %d\n", port);
|
||||
+
|
||||
+ port_bitmap |= BIT(i);
|
||||
+ }
|
||||
+
|
||||
+ /* Set the bits for the ports we can access */
|
||||
+ return regmap_update_bits(smi->map, RTL8366RB_PORT_ISO(port),
|
||||
+ RTL8366RB_PORT_ISO_PORTS(port_bitmap),
|
||||
+ RTL8366RB_PORT_ISO_PORTS(port_bitmap));
|
||||
+}
|
||||
+
|
||||
+static void
|
||||
+rtl8366rb_port_bridge_leave(struct dsa_switch *ds, int port,
|
||||
+ struct net_device *bridge)
|
||||
+{
|
||||
+ struct realtek_smi *smi = ds->priv;
|
||||
+ unsigned int port_bitmap = 0;
|
||||
+ int ret, i;
|
||||
+
|
||||
+ /* Loop over all other ports than this one */
|
||||
+ for (i = 0; i < RTL8366RB_PORT_NUM_CPU; i++) {
|
||||
+ /* Current port handled last */
|
||||
+ if (i == port)
|
||||
+ continue;
|
||||
+ /* Not on this bridge */
|
||||
+ if (dsa_to_port(ds, i)->bridge_dev != bridge)
|
||||
+ continue;
|
||||
+ /* Remove this port from any other port on the bridge */
|
||||
+ ret = regmap_update_bits(smi->map, RTL8366RB_PORT_ISO(i),
|
||||
+ RTL8366RB_PORT_ISO_PORTS(BIT(port)), 0);
|
||||
+ if (ret)
|
||||
+ dev_err(smi->dev, "failed to leave port %d\n", port);
|
||||
+
|
||||
+ port_bitmap |= BIT(i);
|
||||
+ }
|
||||
+
|
||||
+ /* Clear the bits for the ports we can not access, leave ourselves */
|
||||
+ regmap_update_bits(smi->map, RTL8366RB_PORT_ISO(port),
|
||||
+ RTL8366RB_PORT_ISO_PORTS(port_bitmap), 0);
|
||||
+}
|
||||
+
|
||||
static int rtl8366rb_change_mtu(struct dsa_switch *ds, int port, int new_mtu)
|
||||
{
|
||||
struct realtek_smi *smi = ds->priv;
|
||||
@@ -1510,6 +1594,8 @@ static const struct dsa_switch_ops rtl83
|
||||
.get_strings = rtl8366_get_strings,
|
||||
.get_ethtool_stats = rtl8366_get_ethtool_stats,
|
||||
.get_sset_count = rtl8366_get_sset_count,
|
||||
+ .port_bridge_join = rtl8366rb_port_bridge_join,
|
||||
+ .port_bridge_leave = rtl8366rb_port_bridge_leave,
|
||||
.port_vlan_filtering = rtl8366_vlan_filtering,
|
||||
.port_vlan_add = rtl8366_vlan_add,
|
||||
.port_vlan_del = rtl8366_vlan_del,
|
||||
@ -0,0 +1,118 @@
|
||||
From 96cf10a8e7297065459473c081a6fb6432a22312 Mon Sep 17 00:00:00 2001
|
||||
From: Linus Walleij <linus.walleij@linaro.org>
|
||||
Date: Sun, 26 Sep 2021 00:59:25 +0200
|
||||
Subject: [PATCH 02/11] net: dsa: rtl8366: Drop custom VLAN set-up
|
||||
MIME-Version: 1.0
|
||||
Content-Type: text/plain; charset=UTF-8
|
||||
Content-Transfer-Encoding: 8bit
|
||||
|
||||
This hacky default VLAN setup was done in order to direct
|
||||
packets to the right ports and provide port isolation, both
|
||||
which we now support properly using custom tags and proper
|
||||
bridge port isolation.
|
||||
|
||||
We can drop the custom VLAN code and leave all VLAN handling
|
||||
alone, as users expect things to be. We can also drop
|
||||
ds->configure_vlan_while_not_filtering = false; and let
|
||||
the core deal with any VLANs it wants.
|
||||
|
||||
Cc: Mauri Sandberg <sandberg@mailfence.com>
|
||||
Cc: DENG Qingfang <dqfext@gmail.com>
|
||||
Reviewed-by: Vladimir Oltean <olteanv@gmail.com>
|
||||
Reviewed-by: Alvin Šipraga <alsi@bang-olufsen.dk>
|
||||
Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
|
||||
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
|
||||
Signed-off-by: David S. Miller <davem@davemloft.net>
|
||||
---
|
||||
drivers/net/dsa/realtek-smi-core.h | 1 -
|
||||
drivers/net/dsa/rtl8366.c | 48 ------------------------------
|
||||
drivers/net/dsa/rtl8366rb.c | 4 +--
|
||||
3 files changed, 1 insertion(+), 52 deletions(-)
|
||||
|
||||
--- a/drivers/net/dsa/realtek-smi-core.h
|
||||
+++ b/drivers/net/dsa/realtek-smi-core.h
|
||||
@@ -129,7 +129,6 @@ int rtl8366_set_pvid(struct realtek_smi
|
||||
int rtl8366_enable_vlan4k(struct realtek_smi *smi, bool enable);
|
||||
int rtl8366_enable_vlan(struct realtek_smi *smi, bool enable);
|
||||
int rtl8366_reset_vlan(struct realtek_smi *smi);
|
||||
-int rtl8366_init_vlan(struct realtek_smi *smi);
|
||||
int rtl8366_vlan_filtering(struct dsa_switch *ds, int port, bool vlan_filtering,
|
||||
struct netlink_ext_ack *extack);
|
||||
int rtl8366_vlan_add(struct dsa_switch *ds, int port,
|
||||
--- a/drivers/net/dsa/rtl8366.c
|
||||
+++ b/drivers/net/dsa/rtl8366.c
|
||||
@@ -292,54 +292,6 @@ int rtl8366_reset_vlan(struct realtek_sm
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(rtl8366_reset_vlan);
|
||||
|
||||
-int rtl8366_init_vlan(struct realtek_smi *smi)
|
||||
-{
|
||||
- int port;
|
||||
- int ret;
|
||||
-
|
||||
- ret = rtl8366_reset_vlan(smi);
|
||||
- if (ret)
|
||||
- return ret;
|
||||
-
|
||||
- /* Loop over the available ports, for each port, associate
|
||||
- * it with the VLAN (port+1)
|
||||
- */
|
||||
- for (port = 0; port < smi->num_ports; port++) {
|
||||
- u32 mask;
|
||||
-
|
||||
- if (port == smi->cpu_port)
|
||||
- /* For the CPU port, make all ports members of this
|
||||
- * VLAN.
|
||||
- */
|
||||
- mask = GENMASK((int)smi->num_ports - 1, 0);
|
||||
- else
|
||||
- /* For all other ports, enable itself plus the
|
||||
- * CPU port.
|
||||
- */
|
||||
- mask = BIT(port) | BIT(smi->cpu_port);
|
||||
-
|
||||
- /* For each port, set the port as member of VLAN (port+1)
|
||||
- * and untagged, except for the CPU port: the CPU port (5) is
|
||||
- * member of VLAN 6 and so are ALL the other ports as well.
|
||||
- * Use filter 0 (no filter).
|
||||
- */
|
||||
- dev_info(smi->dev, "VLAN%d port mask for port %d, %08x\n",
|
||||
- (port + 1), port, mask);
|
||||
- ret = rtl8366_set_vlan(smi, (port + 1), mask, mask, 0);
|
||||
- if (ret)
|
||||
- return ret;
|
||||
-
|
||||
- dev_info(smi->dev, "VLAN%d port %d, PVID set to %d\n",
|
||||
- (port + 1), port, (port + 1));
|
||||
- ret = rtl8366_set_pvid(smi, port, (port + 1));
|
||||
- if (ret)
|
||||
- return ret;
|
||||
- }
|
||||
-
|
||||
- return rtl8366_enable_vlan(smi, true);
|
||||
-}
|
||||
-EXPORT_SYMBOL_GPL(rtl8366_init_vlan);
|
||||
-
|
||||
int rtl8366_vlan_filtering(struct dsa_switch *ds, int port, bool vlan_filtering,
|
||||
struct netlink_ext_ack *extack)
|
||||
{
|
||||
--- a/drivers/net/dsa/rtl8366rb.c
|
||||
+++ b/drivers/net/dsa/rtl8366rb.c
|
||||
@@ -985,7 +985,7 @@ static int rtl8366rb_setup(struct dsa_sw
|
||||
return ret;
|
||||
}
|
||||
|
||||
- ret = rtl8366_init_vlan(smi);
|
||||
+ ret = rtl8366_reset_vlan(smi);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
@@ -999,8 +999,6 @@ static int rtl8366rb_setup(struct dsa_sw
|
||||
return -ENODEV;
|
||||
}
|
||||
|
||||
- ds->configure_vlan_while_not_filtering = false;
|
||||
-
|
||||
return 0;
|
||||
}
|
||||
|
||||
@ -0,0 +1,270 @@
|
||||
From 7028f54b620f8df344b18e46e4a78e266091ab45 Mon Sep 17 00:00:00 2001
|
||||
From: Linus Walleij <linus.walleij@linaro.org>
|
||||
Date: Sun, 26 Sep 2021 00:59:26 +0200
|
||||
Subject: [PATCH 03/11] net: dsa: rtl8366rb: Rewrite weird VLAN filering
|
||||
enablement
|
||||
MIME-Version: 1.0
|
||||
Content-Type: text/plain; charset=UTF-8
|
||||
Content-Transfer-Encoding: 8bit
|
||||
|
||||
While we were defining one VLAN per port for isolating the ports
|
||||
the port_vlan_filtering() callback was implemented to enable a
|
||||
VLAN on the port + 1. This function makes no sense, not only is
|
||||
it incomplete as it only enables the VLAN, it doesn't do what
|
||||
the callback is supposed to do, which is to selectively enable
|
||||
and disable filtering on a certain port.
|
||||
|
||||
Implement the correct callback: we have two registers dealing
|
||||
with filtering on the RTL9366RB, so we implement an ASIC-specific
|
||||
callback and implement filering using the register bit that makes
|
||||
the switch drop frames if the port is not in the VLAN member set.
|
||||
|
||||
The DSA documentation Documentation/networking/switchdev.rst states:
|
||||
|
||||
When the bridge has VLAN filtering enabled and a PVID is not
|
||||
configured on the ingress port, untagged and 802.1p tagged
|
||||
packets must be dropped. When the bridge has VLAN filtering
|
||||
enabled and a PVID exists on the ingress port, untagged and
|
||||
priority-tagged packets must be accepted and forwarded according
|
||||
to the bridge's port membership of the PVID VLAN. When the
|
||||
bridge has VLAN filtering disabled, the presence/lack of a
|
||||
PVID should not influence the packet forwarding decision.
|
||||
|
||||
To comply with this, we add two arrays of bool in the RTL8366RB
|
||||
state that keeps track of if filtering and PVID is enabled or
|
||||
not for each port. We then add code such that whenever filtering
|
||||
or PVID changes, we update the filter according to the
|
||||
specification.
|
||||
|
||||
Cc: Vladimir Oltean <olteanv@gmail.com>
|
||||
Cc: Mauri Sandberg <sandberg@mailfence.com>
|
||||
Cc: Alvin Šipraga <alsi@bang-olufsen.dk>
|
||||
Cc: Florian Fainelli <f.fainelli@gmail.com>
|
||||
Cc: DENG Qingfang <dqfext@gmail.com>
|
||||
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
|
||||
Signed-off-by: David S. Miller <davem@davemloft.net>
|
||||
---
|
||||
drivers/net/dsa/realtek-smi-core.h | 2 -
|
||||
drivers/net/dsa/rtl8366.c | 35 ----------
|
||||
drivers/net/dsa/rtl8366rb.c | 102 +++++++++++++++++++++++++++--
|
||||
3 files changed, 95 insertions(+), 44 deletions(-)
|
||||
|
||||
--- a/drivers/net/dsa/realtek-smi-core.h
|
||||
+++ b/drivers/net/dsa/realtek-smi-core.h
|
||||
@@ -129,8 +129,6 @@ int rtl8366_set_pvid(struct realtek_smi
|
||||
int rtl8366_enable_vlan4k(struct realtek_smi *smi, bool enable);
|
||||
int rtl8366_enable_vlan(struct realtek_smi *smi, bool enable);
|
||||
int rtl8366_reset_vlan(struct realtek_smi *smi);
|
||||
-int rtl8366_vlan_filtering(struct dsa_switch *ds, int port, bool vlan_filtering,
|
||||
- struct netlink_ext_ack *extack);
|
||||
int rtl8366_vlan_add(struct dsa_switch *ds, int port,
|
||||
const struct switchdev_obj_port_vlan *vlan,
|
||||
struct netlink_ext_ack *extack);
|
||||
--- a/drivers/net/dsa/rtl8366.c
|
||||
+++ b/drivers/net/dsa/rtl8366.c
|
||||
@@ -292,41 +292,6 @@ int rtl8366_reset_vlan(struct realtek_sm
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(rtl8366_reset_vlan);
|
||||
|
||||
-int rtl8366_vlan_filtering(struct dsa_switch *ds, int port, bool vlan_filtering,
|
||||
- struct netlink_ext_ack *extack)
|
||||
-{
|
||||
- struct realtek_smi *smi = ds->priv;
|
||||
- struct rtl8366_vlan_4k vlan4k;
|
||||
- int ret;
|
||||
-
|
||||
- /* Use VLAN nr port + 1 since VLAN0 is not valid */
|
||||
- if (!smi->ops->is_vlan_valid(smi, port + 1))
|
||||
- return -EINVAL;
|
||||
-
|
||||
- dev_info(smi->dev, "%s filtering on port %d\n",
|
||||
- vlan_filtering ? "enable" : "disable",
|
||||
- port);
|
||||
-
|
||||
- /* TODO:
|
||||
- * The hardware support filter ID (FID) 0..7, I have no clue how to
|
||||
- * support this in the driver when the callback only says on/off.
|
||||
- */
|
||||
- ret = smi->ops->get_vlan_4k(smi, port + 1, &vlan4k);
|
||||
- if (ret)
|
||||
- return ret;
|
||||
-
|
||||
- /* Just set the filter to FID 1 for now then */
|
||||
- ret = rtl8366_set_vlan(smi, port + 1,
|
||||
- vlan4k.member,
|
||||
- vlan4k.untag,
|
||||
- 1);
|
||||
- if (ret)
|
||||
- return ret;
|
||||
-
|
||||
- return 0;
|
||||
-}
|
||||
-EXPORT_SYMBOL_GPL(rtl8366_vlan_filtering);
|
||||
-
|
||||
int rtl8366_vlan_add(struct dsa_switch *ds, int port,
|
||||
const struct switchdev_obj_port_vlan *vlan,
|
||||
struct netlink_ext_ack *extack)
|
||||
--- a/drivers/net/dsa/rtl8366rb.c
|
||||
+++ b/drivers/net/dsa/rtl8366rb.c
|
||||
@@ -143,6 +143,21 @@
|
||||
#define RTL8366RB_PHY_NO_OFFSET 9
|
||||
#define RTL8366RB_PHY_NO_MASK (0x1f << 9)
|
||||
|
||||
+/* VLAN Ingress Control Register 1, one bit per port.
|
||||
+ * bit 0 .. 5 will make the switch drop ingress frames without
|
||||
+ * VID such as untagged or priority-tagged frames for respective
|
||||
+ * port.
|
||||
+ * bit 6 .. 11 will make the switch drop ingress frames carrying
|
||||
+ * a C-tag with VID != 0 for respective port.
|
||||
+ */
|
||||
+#define RTL8366RB_VLAN_INGRESS_CTRL1_REG 0x037E
|
||||
+#define RTL8366RB_VLAN_INGRESS_CTRL1_DROP(port) (BIT((port)) | BIT((port) + 6))
|
||||
+
|
||||
+/* VLAN Ingress Control Register 2, one bit per port.
|
||||
+ * bit0 .. bit5 will make the switch drop all ingress frames with
|
||||
+ * a VLAN classification that does not include the port is in its
|
||||
+ * member set.
|
||||
+ */
|
||||
#define RTL8366RB_VLAN_INGRESS_CTRL2_REG 0x037f
|
||||
|
||||
/* LED control registers */
|
||||
@@ -321,9 +336,13 @@
|
||||
/**
|
||||
* struct rtl8366rb - RTL8366RB-specific data
|
||||
* @max_mtu: per-port max MTU setting
|
||||
+ * @pvid_enabled: if PVID is set for respective port
|
||||
+ * @vlan_filtering: if VLAN filtering is enabled for respective port
|
||||
*/
|
||||
struct rtl8366rb {
|
||||
unsigned int max_mtu[RTL8366RB_NUM_PORTS];
|
||||
+ bool pvid_enabled[RTL8366RB_NUM_PORTS];
|
||||
+ bool vlan_filtering[RTL8366RB_NUM_PORTS];
|
||||
};
|
||||
|
||||
static struct rtl8366_mib_counter rtl8366rb_mib_counters[] = {
|
||||
@@ -933,11 +952,13 @@ static int rtl8366rb_setup(struct dsa_sw
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
- /* Discard VLAN tagged packets if the port is not a member of
|
||||
- * the VLAN with which the packets is associated.
|
||||
- */
|
||||
+ /* Accept all packets by default, we enable filtering on-demand */
|
||||
+ ret = regmap_write(smi->map, RTL8366RB_VLAN_INGRESS_CTRL1_REG,
|
||||
+ 0);
|
||||
+ if (ret)
|
||||
+ return ret;
|
||||
ret = regmap_write(smi->map, RTL8366RB_VLAN_INGRESS_CTRL2_REG,
|
||||
- RTL8366RB_PORT_ALL);
|
||||
+ 0);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
@@ -1209,6 +1230,53 @@ rtl8366rb_port_bridge_leave(struct dsa_s
|
||||
RTL8366RB_PORT_ISO_PORTS(port_bitmap), 0);
|
||||
}
|
||||
|
||||
+/**
|
||||
+ * rtl8366rb_drop_untagged() - make the switch drop untagged and C-tagged frames
|
||||
+ * @smi: SMI state container
|
||||
+ * @port: the port to drop untagged and C-tagged frames on
|
||||
+ * @drop: whether to drop or pass untagged and C-tagged frames
|
||||
+ */
|
||||
+static int rtl8366rb_drop_untagged(struct realtek_smi *smi, int port, bool drop)
|
||||
+{
|
||||
+ return regmap_update_bits(smi->map, RTL8366RB_VLAN_INGRESS_CTRL1_REG,
|
||||
+ RTL8366RB_VLAN_INGRESS_CTRL1_DROP(port),
|
||||
+ drop ? RTL8366RB_VLAN_INGRESS_CTRL1_DROP(port) : 0);
|
||||
+}
|
||||
+
|
||||
+static int rtl8366rb_vlan_filtering(struct dsa_switch *ds, int port,
|
||||
+ bool vlan_filtering,
|
||||
+ struct netlink_ext_ack *extack)
|
||||
+{
|
||||
+ struct realtek_smi *smi = ds->priv;
|
||||
+ struct rtl8366rb *rb;
|
||||
+ int ret;
|
||||
+
|
||||
+ rb = smi->chip_data;
|
||||
+
|
||||
+ dev_dbg(smi->dev, "port %d: %s VLAN filtering\n", port,
|
||||
+ vlan_filtering ? "enable" : "disable");
|
||||
+
|
||||
+ /* If the port is not in the member set, the frame will be dropped */
|
||||
+ ret = regmap_update_bits(smi->map, RTL8366RB_VLAN_INGRESS_CTRL2_REG,
|
||||
+ BIT(port), vlan_filtering ? BIT(port) : 0);
|
||||
+ if (ret)
|
||||
+ return ret;
|
||||
+
|
||||
+ /* Keep track if filtering is enabled on each port */
|
||||
+ rb->vlan_filtering[port] = vlan_filtering;
|
||||
+
|
||||
+ /* If VLAN filtering is enabled and PVID is also enabled, we must
|
||||
+ * not drop any untagged or C-tagged frames. If we turn off VLAN
|
||||
+ * filtering on a port, we need ti accept any frames.
|
||||
+ */
|
||||
+ if (vlan_filtering)
|
||||
+ ret = rtl8366rb_drop_untagged(smi, port, !rb->pvid_enabled[port]);
|
||||
+ else
|
||||
+ ret = rtl8366rb_drop_untagged(smi, port, false);
|
||||
+
|
||||
+ return ret;
|
||||
+}
|
||||
+
|
||||
static int rtl8366rb_change_mtu(struct dsa_switch *ds, int port, int new_mtu)
|
||||
{
|
||||
struct realtek_smi *smi = ds->priv;
|
||||
@@ -1420,14 +1488,34 @@ static int rtl8366rb_get_mc_index(struct
|
||||
|
||||
static int rtl8366rb_set_mc_index(struct realtek_smi *smi, int port, int index)
|
||||
{
|
||||
+ struct rtl8366rb *rb;
|
||||
+ bool pvid_enabled;
|
||||
+ int ret;
|
||||
+
|
||||
+ rb = smi->chip_data;
|
||||
+ pvid_enabled = !!index;
|
||||
+
|
||||
if (port >= smi->num_ports || index >= RTL8366RB_NUM_VLANS)
|
||||
return -EINVAL;
|
||||
|
||||
- return regmap_update_bits(smi->map, RTL8366RB_PORT_VLAN_CTRL_REG(port),
|
||||
+ ret = regmap_update_bits(smi->map, RTL8366RB_PORT_VLAN_CTRL_REG(port),
|
||||
RTL8366RB_PORT_VLAN_CTRL_MASK <<
|
||||
RTL8366RB_PORT_VLAN_CTRL_SHIFT(port),
|
||||
(index & RTL8366RB_PORT_VLAN_CTRL_MASK) <<
|
||||
RTL8366RB_PORT_VLAN_CTRL_SHIFT(port));
|
||||
+ if (ret)
|
||||
+ return ret;
|
||||
+
|
||||
+ rb->pvid_enabled[port] = pvid_enabled;
|
||||
+
|
||||
+ /* If VLAN filtering is enabled and PVID is also enabled, we must
|
||||
+ * not drop any untagged or C-tagged frames. Make sure to update the
|
||||
+ * filtering setting.
|
||||
+ */
|
||||
+ if (rb->vlan_filtering[port])
|
||||
+ ret = rtl8366rb_drop_untagged(smi, port, !pvid_enabled);
|
||||
+
|
||||
+ return ret;
|
||||
}
|
||||
|
||||
static bool rtl8366rb_is_vlan_valid(struct realtek_smi *smi, unsigned int vlan)
|
||||
@@ -1437,7 +1525,7 @@ static bool rtl8366rb_is_vlan_valid(stru
|
||||
if (smi->vlan4k_enabled)
|
||||
max = RTL8366RB_NUM_VIDS - 1;
|
||||
|
||||
- if (vlan == 0 || vlan > max)
|
||||
+ if (vlan > max)
|
||||
return false;
|
||||
|
||||
return true;
|
||||
@@ -1594,7 +1682,7 @@ static const struct dsa_switch_ops rtl83
|
||||
.get_sset_count = rtl8366_get_sset_count,
|
||||
.port_bridge_join = rtl8366rb_port_bridge_join,
|
||||
.port_bridge_leave = rtl8366rb_port_bridge_leave,
|
||||
- .port_vlan_filtering = rtl8366_vlan_filtering,
|
||||
+ .port_vlan_filtering = rtl8366rb_vlan_filtering,
|
||||
.port_vlan_add = rtl8366_vlan_add,
|
||||
.port_vlan_del = rtl8366_vlan_del,
|
||||
.port_enable = rtl8366rb_port_enable,
|
||||
@ -0,0 +1,51 @@
|
||||
From ddb59a5dc42714999c335dab4bf256125ba3120c Mon Sep 17 00:00:00 2001
|
||||
From: Linus Walleij <linus.walleij@linaro.org>
|
||||
Date: Sun, 26 Sep 2021 00:59:29 +0200
|
||||
Subject: [PATCH 06/11] net: dsa: rtl8366: Drop and depromote pointless prints
|
||||
MIME-Version: 1.0
|
||||
Content-Type: text/plain; charset=UTF-8
|
||||
Content-Transfer-Encoding: 8bit
|
||||
|
||||
We don't need a message for every VLAN association, dbg
|
||||
is fine. The message about adding the DSA or CPU
|
||||
port to a VLAN is directly misleading, this is perfectly
|
||||
fine.
|
||||
|
||||
Cc: Vladimir Oltean <olteanv@gmail.com>
|
||||
Cc: Mauri Sandberg <sandberg@mailfence.com>
|
||||
Cc: DENG Qingfang <dqfext@gmail.com>
|
||||
Reviewed-by: Alvin Šipraga <alsi@bang-olufsen.dk>
|
||||
Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
|
||||
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
|
||||
Signed-off-by: David S. Miller <davem@davemloft.net>
|
||||
---
|
||||
drivers/net/dsa/rtl8366.c | 11 ++++-------
|
||||
1 file changed, 4 insertions(+), 7 deletions(-)
|
||||
|
||||
--- a/drivers/net/dsa/rtl8366.c
|
||||
+++ b/drivers/net/dsa/rtl8366.c
|
||||
@@ -318,12 +318,9 @@ int rtl8366_vlan_add(struct dsa_switch *
|
||||
return ret;
|
||||
}
|
||||
|
||||
- dev_info(smi->dev, "add VLAN %d on port %d, %s, %s\n",
|
||||
- vlan->vid, port, untagged ? "untagged" : "tagged",
|
||||
- pvid ? " PVID" : "no PVID");
|
||||
-
|
||||
- if (dsa_is_dsa_port(ds, port) || dsa_is_cpu_port(ds, port))
|
||||
- dev_err(smi->dev, "port is DSA or CPU port\n");
|
||||
+ dev_dbg(smi->dev, "add VLAN %d on port %d, %s, %s\n",
|
||||
+ vlan->vid, port, untagged ? "untagged" : "tagged",
|
||||
+ pvid ? "PVID" : "no PVID");
|
||||
|
||||
member |= BIT(port);
|
||||
|
||||
@@ -356,7 +353,7 @@ int rtl8366_vlan_del(struct dsa_switch *
|
||||
struct realtek_smi *smi = ds->priv;
|
||||
int ret, i;
|
||||
|
||||
- dev_info(smi->dev, "del VLAN %04x on port %d\n", vlan->vid, port);
|
||||
+ dev_dbg(smi->dev, "del VLAN %d on port %d\n", vlan->vid, port);
|
||||
|
||||
for (i = 0; i < smi->num_vlan_mc; i++) {
|
||||
struct rtl8366_vlan_mc vlanmc;
|
||||
@ -0,0 +1,61 @@
|
||||
From 5c9b66f3c8a3f72fa2a58e89a57c6d7afd550bf0 Mon Sep 17 00:00:00 2001
|
||||
From: Linus Walleij <linus.walleij@linaro.org>
|
||||
Date: Wed, 29 Sep 2021 13:23:22 +0200
|
||||
Subject: [PATCH 07/11] net: dsa: rtl8366rb: Use core filtering tracking
|
||||
MIME-Version: 1.0
|
||||
Content-Type: text/plain; charset=UTF-8
|
||||
Content-Transfer-Encoding: 8bit
|
||||
|
||||
We added a state variable to track whether a certain port
|
||||
was VLAN filtering or not, but we can just inquire the DSA
|
||||
core about this.
|
||||
|
||||
Cc: Vladimir Oltean <olteanv@gmail.com>
|
||||
Cc: Mauri Sandberg <sandberg@mailfence.com>
|
||||
Cc: DENG Qingfang <dqfext@gmail.com>
|
||||
Cc: Alvin Šipraga <alsi@bang-olufsen.dk>
|
||||
Cc: Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
|
||||
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
|
||||
Signed-off-by: David S. Miller <davem@davemloft.net>
|
||||
---
|
||||
drivers/net/dsa/rtl8366rb.c | 9 ++-------
|
||||
1 file changed, 2 insertions(+), 7 deletions(-)
|
||||
|
||||
--- a/drivers/net/dsa/rtl8366rb.c
|
||||
+++ b/drivers/net/dsa/rtl8366rb.c
|
||||
@@ -337,12 +337,10 @@
|
||||
* struct rtl8366rb - RTL8366RB-specific data
|
||||
* @max_mtu: per-port max MTU setting
|
||||
* @pvid_enabled: if PVID is set for respective port
|
||||
- * @vlan_filtering: if VLAN filtering is enabled for respective port
|
||||
*/
|
||||
struct rtl8366rb {
|
||||
unsigned int max_mtu[RTL8366RB_NUM_PORTS];
|
||||
bool pvid_enabled[RTL8366RB_NUM_PORTS];
|
||||
- bool vlan_filtering[RTL8366RB_NUM_PORTS];
|
||||
};
|
||||
|
||||
static struct rtl8366_mib_counter rtl8366rb_mib_counters[] = {
|
||||
@@ -1262,12 +1260,9 @@ static int rtl8366rb_vlan_filtering(stru
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
- /* Keep track if filtering is enabled on each port */
|
||||
- rb->vlan_filtering[port] = vlan_filtering;
|
||||
-
|
||||
/* If VLAN filtering is enabled and PVID is also enabled, we must
|
||||
* not drop any untagged or C-tagged frames. If we turn off VLAN
|
||||
- * filtering on a port, we need ti accept any frames.
|
||||
+ * filtering on a port, we need to accept any frames.
|
||||
*/
|
||||
if (vlan_filtering)
|
||||
ret = rtl8366rb_drop_untagged(smi, port, !rb->pvid_enabled[port]);
|
||||
@@ -1512,7 +1507,7 @@ static int rtl8366rb_set_mc_index(struct
|
||||
* not drop any untagged or C-tagged frames. Make sure to update the
|
||||
* filtering setting.
|
||||
*/
|
||||
- if (rb->vlan_filtering[port])
|
||||
+ if (dsa_port_is_vlan_filtering(dsa_to_port(smi->ds, port)))
|
||||
ret = rtl8366rb_drop_untagged(smi, port, !pvid_enabled);
|
||||
|
||||
return ret;
|
||||
@ -0,0 +1,115 @@
|
||||
From 831a3d26bea0d14f8563eecf96def660a74a3000 Mon Sep 17 00:00:00 2001
|
||||
From: Linus Walleij <linus.walleij@linaro.org>
|
||||
Date: Tue, 5 Oct 2021 21:47:02 +0200
|
||||
Subject: [PATCH 08/11] net: dsa: rtl8366rb: Support disabling learning
|
||||
MIME-Version: 1.0
|
||||
Content-Type: text/plain; charset=UTF-8
|
||||
Content-Transfer-Encoding: 8bit
|
||||
|
||||
The RTL8366RB hardware supports disabling learning per-port
|
||||
so let's make use of this feature. Rename some unfortunately
|
||||
named registers in the process.
|
||||
|
||||
Suggested-by: Vladimir Oltean <olteanv@gmail.com>
|
||||
Cc: Alvin Šipraga <alsi@bang-olufsen.dk>
|
||||
Cc: Mauri Sandberg <sandberg@mailfence.com>
|
||||
Cc: Florian Fainelli <f.fainelli@gmail.com>
|
||||
Cc: DENG Qingfang <dqfext@gmail.com>
|
||||
Reviewed-by: Vladimir Oltean <olteanv@gmail.com>
|
||||
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
|
||||
Signed-off-by: David S. Miller <davem@davemloft.net>
|
||||
---
|
||||
drivers/net/dsa/rtl8366rb.c | 50 ++++++++++++++++++++++++++++++++-----
|
||||
1 file changed, 44 insertions(+), 6 deletions(-)
|
||||
|
||||
--- a/drivers/net/dsa/rtl8366rb.c
|
||||
+++ b/drivers/net/dsa/rtl8366rb.c
|
||||
@@ -14,6 +14,7 @@
|
||||
|
||||
#include <linux/bitops.h>
|
||||
#include <linux/etherdevice.h>
|
||||
+#include <linux/if_bridge.h>
|
||||
#include <linux/interrupt.h>
|
||||
#include <linux/irqdomain.h>
|
||||
#include <linux/irqchip/chained_irq.h>
|
||||
@@ -42,9 +43,12 @@
|
||||
/* Port Enable Control register */
|
||||
#define RTL8366RB_PECR 0x0001
|
||||
|
||||
-/* Switch Security Control registers */
|
||||
-#define RTL8366RB_SSCR0 0x0002
|
||||
-#define RTL8366RB_SSCR1 0x0003
|
||||
+/* Switch per-port learning disablement register */
|
||||
+#define RTL8366RB_PORT_LEARNDIS_CTRL 0x0002
|
||||
+
|
||||
+/* Security control, actually aging register */
|
||||
+#define RTL8366RB_SECURITY_CTRL 0x0003
|
||||
+
|
||||
#define RTL8366RB_SSCR2 0x0004
|
||||
#define RTL8366RB_SSCR2_DROP_UNKNOWN_DA BIT(0)
|
||||
|
||||
@@ -927,13 +931,14 @@ static int rtl8366rb_setup(struct dsa_sw
|
||||
/* layer 2 size, see rtl8366rb_change_mtu() */
|
||||
rb->max_mtu[i] = 1532;
|
||||
|
||||
- /* Enable learning for all ports */
|
||||
- ret = regmap_write(smi->map, RTL8366RB_SSCR0, 0);
|
||||
+ /* Disable learning for all ports */
|
||||
+ ret = regmap_write(smi->map, RTL8366RB_PORT_LEARNDIS_CTRL,
|
||||
+ RTL8366RB_PORT_ALL);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
/* Enable auto ageing for all ports */
|
||||
- ret = regmap_write(smi->map, RTL8366RB_SSCR1, 0);
|
||||
+ ret = regmap_write(smi->map, RTL8366RB_SECURITY_CTRL, 0);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
@@ -1272,6 +1277,37 @@ static int rtl8366rb_vlan_filtering(stru
|
||||
return ret;
|
||||
}
|
||||
|
||||
+static int
|
||||
+rtl8366rb_port_pre_bridge_flags(struct dsa_switch *ds, int port,
|
||||
+ struct switchdev_brport_flags flags,
|
||||
+ struct netlink_ext_ack *extack)
|
||||
+{
|
||||
+ /* We support enabling/disabling learning */
|
||||
+ if (flags.mask & ~(BR_LEARNING))
|
||||
+ return -EINVAL;
|
||||
+
|
||||
+ return 0;
|
||||
+}
|
||||
+
|
||||
+static int
|
||||
+rtl8366rb_port_bridge_flags(struct dsa_switch *ds, int port,
|
||||
+ struct switchdev_brport_flags flags,
|
||||
+ struct netlink_ext_ack *extack)
|
||||
+{
|
||||
+ struct realtek_smi *smi = ds->priv;
|
||||
+ int ret;
|
||||
+
|
||||
+ if (flags.mask & BR_LEARNING) {
|
||||
+ ret = regmap_update_bits(smi->map, RTL8366RB_PORT_LEARNDIS_CTRL,
|
||||
+ BIT(port),
|
||||
+ (flags.val & BR_LEARNING) ? 0 : BIT(port));
|
||||
+ if (ret)
|
||||
+ return ret;
|
||||
+ }
|
||||
+
|
||||
+ return 0;
|
||||
+}
|
||||
+
|
||||
static int rtl8366rb_change_mtu(struct dsa_switch *ds, int port, int new_mtu)
|
||||
{
|
||||
struct realtek_smi *smi = ds->priv;
|
||||
@@ -1682,6 +1718,8 @@ static const struct dsa_switch_ops rtl83
|
||||
.port_vlan_del = rtl8366_vlan_del,
|
||||
.port_enable = rtl8366rb_port_enable,
|
||||
.port_disable = rtl8366rb_port_disable,
|
||||
+ .port_pre_bridge_flags = rtl8366rb_port_pre_bridge_flags,
|
||||
+ .port_bridge_flags = rtl8366rb_port_bridge_flags,
|
||||
.port_change_mtu = rtl8366rb_change_mtu,
|
||||
.port_max_mtu = rtl8366rb_max_mtu,
|
||||
};
|
||||
@ -0,0 +1,57 @@
|
||||
From 8eb13420eb9ab4a4e2ebd612bf5dc9dba0039236 Mon Sep 17 00:00:00 2001
|
||||
From: Linus Walleij <linus.walleij@linaro.org>
|
||||
Date: Tue, 5 Oct 2021 21:47:03 +0200
|
||||
Subject: [PATCH 09/11] net: dsa: rtl8366rb: Support fast aging
|
||||
MIME-Version: 1.0
|
||||
Content-Type: text/plain; charset=UTF-8
|
||||
Content-Transfer-Encoding: 8bit
|
||||
|
||||
This implements fast aging per-port using the special "security"
|
||||
register, which will flush any learned L2 LUT entries on a port.
|
||||
|
||||
The vendor API just enabled setting and clearing this bit, so
|
||||
we set it to age out any entries on the port and then we clear
|
||||
it again.
|
||||
|
||||
Suggested-by: Vladimir Oltean <olteanv@gmail.com>
|
||||
Cc: Mauri Sandberg <sandberg@mailfence.com>
|
||||
Cc: DENG Qingfang <dqfext@gmail.com>
|
||||
Cc: Florian Fainelli <f.fainelli@gmail.com>
|
||||
Reviewed-by: Alvin Šipraga <alsi@bang-olufsen.dk>
|
||||
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
|
||||
Reviewed-by: Vladimir Oltean <olteanv@gmail.com>
|
||||
Signed-off-by: David S. Miller <davem@davemloft.net>
|
||||
---
|
||||
drivers/net/dsa/rtl8366rb.c | 14 ++++++++++++++
|
||||
1 file changed, 14 insertions(+)
|
||||
|
||||
--- a/drivers/net/dsa/rtl8366rb.c
|
||||
+++ b/drivers/net/dsa/rtl8366rb.c
|
||||
@@ -1308,6 +1308,19 @@ rtl8366rb_port_bridge_flags(struct dsa_s
|
||||
return 0;
|
||||
}
|
||||
|
||||
+static void
|
||||
+rtl8366rb_port_fast_age(struct dsa_switch *ds, int port)
|
||||
+{
|
||||
+ struct realtek_smi *smi = ds->priv;
|
||||
+
|
||||
+ /* This will age out any learned L2 entries */
|
||||
+ regmap_update_bits(smi->map, RTL8366RB_SECURITY_CTRL,
|
||||
+ BIT(port), BIT(port));
|
||||
+ /* Restore the normal state of things */
|
||||
+ regmap_update_bits(smi->map, RTL8366RB_SECURITY_CTRL,
|
||||
+ BIT(port), 0);
|
||||
+}
|
||||
+
|
||||
static int rtl8366rb_change_mtu(struct dsa_switch *ds, int port, int new_mtu)
|
||||
{
|
||||
struct realtek_smi *smi = ds->priv;
|
||||
@@ -1720,6 +1733,7 @@ static const struct dsa_switch_ops rtl83
|
||||
.port_disable = rtl8366rb_port_disable,
|
||||
.port_pre_bridge_flags = rtl8366rb_port_pre_bridge_flags,
|
||||
.port_bridge_flags = rtl8366rb_port_bridge_flags,
|
||||
+ .port_fast_age = rtl8366rb_port_fast_age,
|
||||
.port_change_mtu = rtl8366rb_change_mtu,
|
||||
.port_max_mtu = rtl8366rb_max_mtu,
|
||||
};
|
||||
@ -0,0 +1,107 @@
|
||||
From 90c855471a89d3e05ecf5b6464bd04abf2c83b70 Mon Sep 17 00:00:00 2001
|
||||
From: Linus Walleij <linus.walleij@linaro.org>
|
||||
Date: Tue, 5 Oct 2021 21:47:04 +0200
|
||||
Subject: [PATCH 10/11] net: dsa: rtl8366rb: Support setting STP state
|
||||
MIME-Version: 1.0
|
||||
Content-Type: text/plain; charset=UTF-8
|
||||
Content-Transfer-Encoding: 8bit
|
||||
|
||||
This adds support for setting the STP state to the RTL8366RB
|
||||
DSA switch. This rids the following message from the kernel on
|
||||
e.g. OpenWrt:
|
||||
|
||||
DSA: failed to set STP state 3 (-95)
|
||||
|
||||
Since the RTL8366RB has one STP state register per FID with
|
||||
two bit per port in each, we simply loop over all the FIDs
|
||||
and set the state on all of them.
|
||||
|
||||
Cc: Vladimir Oltean <olteanv@gmail.com>
|
||||
Cc: Alvin Šipraga <alsi@bang-olufsen.dk>
|
||||
Cc: Mauri Sandberg <sandberg@mailfence.com>
|
||||
Cc: DENG Qingfang <dqfext@gmail.com>
|
||||
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
|
||||
Reviewed-by: Vladimir Oltean <olteanv@gmail.com>
|
||||
Signed-off-by: David S. Miller <davem@davemloft.net>
|
||||
---
|
||||
drivers/net/dsa/rtl8366rb.c | 48 +++++++++++++++++++++++++++++++++++++
|
||||
1 file changed, 48 insertions(+)
|
||||
|
||||
--- a/drivers/net/dsa/rtl8366rb.c
|
||||
+++ b/drivers/net/dsa/rtl8366rb.c
|
||||
@@ -110,6 +110,18 @@
|
||||
|
||||
#define RTL8366RB_POWER_SAVING_REG 0x0021
|
||||
|
||||
+/* Spanning tree status (STP) control, two bits per port per FID */
|
||||
+#define RTL8366RB_STP_STATE_BASE 0x0050 /* 0x0050..0x0057 */
|
||||
+#define RTL8366RB_STP_STATE_DISABLED 0x0
|
||||
+#define RTL8366RB_STP_STATE_BLOCKING 0x1
|
||||
+#define RTL8366RB_STP_STATE_LEARNING 0x2
|
||||
+#define RTL8366RB_STP_STATE_FORWARDING 0x3
|
||||
+#define RTL8366RB_STP_MASK GENMASK(1, 0)
|
||||
+#define RTL8366RB_STP_STATE(port, state) \
|
||||
+ ((state) << ((port) * 2))
|
||||
+#define RTL8366RB_STP_STATE_MASK(port) \
|
||||
+ RTL8366RB_STP_STATE((port), RTL8366RB_STP_MASK)
|
||||
+
|
||||
/* CPU port control reg */
|
||||
#define RTL8368RB_CPU_CTRL_REG 0x0061
|
||||
#define RTL8368RB_CPU_PORTS_MSK 0x00FF
|
||||
@@ -234,6 +246,7 @@
|
||||
#define RTL8366RB_NUM_LEDGROUPS 4
|
||||
#define RTL8366RB_NUM_VIDS 4096
|
||||
#define RTL8366RB_PRIORITYMAX 7
|
||||
+#define RTL8366RB_NUM_FIDS 8
|
||||
#define RTL8366RB_FIDMAX 7
|
||||
|
||||
#define RTL8366RB_PORT_1 BIT(0) /* In userspace port 0 */
|
||||
@@ -1309,6 +1322,40 @@ rtl8366rb_port_bridge_flags(struct dsa_s
|
||||
}
|
||||
|
||||
static void
|
||||
+rtl8366rb_port_stp_state_set(struct dsa_switch *ds, int port, u8 state)
|
||||
+{
|
||||
+ struct realtek_smi *smi = ds->priv;
|
||||
+ u32 val;
|
||||
+ int i;
|
||||
+
|
||||
+ switch (state) {
|
||||
+ case BR_STATE_DISABLED:
|
||||
+ val = RTL8366RB_STP_STATE_DISABLED;
|
||||
+ break;
|
||||
+ case BR_STATE_BLOCKING:
|
||||
+ case BR_STATE_LISTENING:
|
||||
+ val = RTL8366RB_STP_STATE_BLOCKING;
|
||||
+ break;
|
||||
+ case BR_STATE_LEARNING:
|
||||
+ val = RTL8366RB_STP_STATE_LEARNING;
|
||||
+ break;
|
||||
+ case BR_STATE_FORWARDING:
|
||||
+ val = RTL8366RB_STP_STATE_FORWARDING;
|
||||
+ break;
|
||||
+ default:
|
||||
+ dev_err(smi->dev, "unknown bridge state requested\n");
|
||||
+ return;
|
||||
+ };
|
||||
+
|
||||
+ /* Set the same status for the port on all the FIDs */
|
||||
+ for (i = 0; i < RTL8366RB_NUM_FIDS; i++) {
|
||||
+ regmap_update_bits(smi->map, RTL8366RB_STP_STATE_BASE + i,
|
||||
+ RTL8366RB_STP_STATE_MASK(port),
|
||||
+ RTL8366RB_STP_STATE(port, val));
|
||||
+ }
|
||||
+}
|
||||
+
|
||||
+static void
|
||||
rtl8366rb_port_fast_age(struct dsa_switch *ds, int port)
|
||||
{
|
||||
struct realtek_smi *smi = ds->priv;
|
||||
@@ -1733,6 +1780,7 @@ static const struct dsa_switch_ops rtl83
|
||||
.port_disable = rtl8366rb_port_disable,
|
||||
.port_pre_bridge_flags = rtl8366rb_port_pre_bridge_flags,
|
||||
.port_bridge_flags = rtl8366rb_port_bridge_flags,
|
||||
+ .port_stp_state_set = rtl8366rb_port_stp_state_set,
|
||||
.port_fast_age = rtl8366rb_port_fast_age,
|
||||
.port_change_mtu = rtl8366rb_change_mtu,
|
||||
.port_max_mtu = rtl8366rb_max_mtu,
|
||||
@ -3511,6 +3511,11 @@ CONFIG_MESSAGE_LOGLEVEL_DEFAULT=4
|
||||
# CONFIG_MFD_WM8994 is not set
|
||||
# CONFIG_MG_DISK is not set
|
||||
# CONFIG_MHI_BUS is not set
|
||||
# CONFIG_MHI_BUS_DEBUG is not set
|
||||
# CONFIG_MHI_BUS_PCI_GENERIC is not set
|
||||
# CONFIG_MHI_NET is not set
|
||||
# CONFIG_MHI_WWAN_CTRL is not set
|
||||
# CONFIG_MHI_WWAN_MBIM is not set
|
||||
# CONFIG_MICREL_KS8995MA is not set
|
||||
# CONFIG_MICREL_PHY is not set
|
||||
# CONFIG_MICROCHIP_KSZ is not set
|
||||
@ -4863,6 +4868,8 @@ CONFIG_PWRSEQ_SIMPLE=y
|
||||
# CONFIG_QORIQ_CPUFREQ is not set
|
||||
# CONFIG_QORIQ_THERMAL is not set
|
||||
# CONFIG_QRTR is not set
|
||||
# CONFIG_QRTR_MHI is not set
|
||||
# CONFIG_QRTR_TUN is not set
|
||||
# CONFIG_QSEMI_PHY is not set
|
||||
# CONFIG_QUEUED_LOCK_STAT is not set
|
||||
# CONFIG_QUICC_ENGINE is not set
|
||||
|
||||
@ -0,0 +1,143 @@
|
||||
From a43b844cb40bf1b783055fdc81b7f991e21e7e76 Mon Sep 17 00:00:00 2001
|
||||
From: Chuanhong Guo <gch981213@gmail.com>
|
||||
Date: Wed, 13 Apr 2022 11:58:17 +0800
|
||||
Subject: [PATCH] mtd: spinand: add support for ESMT F50x1G41LB
|
||||
|
||||
This patch adds support for ESMT F50L1G41LB and F50D1G41LB.
|
||||
It seems that ESMT likes to use random JEDEC ID from other vendors.
|
||||
Their 1G chips uses 0xc8 from GigaDevice and 2G/4G chips uses 0x2c from
|
||||
Micron. For this reason, the ESMT entry is named esmt_c8 with explicit
|
||||
JEDEC ID in variable name.
|
||||
|
||||
Datasheets:
|
||||
https://www.esmt.com.tw/upload/pdf/ESMT/datasheets/F50L1G41LB(2M).pdf
|
||||
https://www.esmt.com.tw/upload/pdf/ESMT/datasheets/F50D1G41LB(2M).pdf
|
||||
|
||||
Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
|
||||
---
|
||||
drivers/mtd/nand/spi/Makefile | 2 +-
|
||||
drivers/mtd/nand/spi/core.c | 1 +
|
||||
drivers/mtd/nand/spi/esmt.c | 89 +++++++++++++++++++++++++++++++++++
|
||||
include/linux/mtd/spinand.h | 1 +
|
||||
4 files changed, 92 insertions(+), 1 deletion(-)
|
||||
create mode 100644 drivers/mtd/nand/spi/esmt.c
|
||||
|
||||
--- a/drivers/mtd/nand/spi/Makefile
|
||||
+++ b/drivers/mtd/nand/spi/Makefile
|
||||
@@ -1,3 +1,3 @@
|
||||
# SPDX-License-Identifier: GPL-2.0
|
||||
-spinand-objs := core.o gigadevice.o macronix.o micron.o paragon.o toshiba.o winbond.o xtx.o
|
||||
+spinand-objs := core.o esmt.o gigadevice.o macronix.o micron.o paragon.o toshiba.o winbond.o xtx.o
|
||||
obj-$(CONFIG_MTD_SPI_NAND) += spinand.o
|
||||
--- a/drivers/mtd/nand/spi/core.c
|
||||
+++ b/drivers/mtd/nand/spi/core.c
|
||||
@@ -896,6 +896,7 @@ static const struct nand_ops spinand_ops
|
||||
};
|
||||
|
||||
static const struct spinand_manufacturer *spinand_manufacturers[] = {
|
||||
+ &esmt_c8_spinand_manufacturer,
|
||||
&gigadevice_spinand_manufacturer,
|
||||
¯onix_spinand_manufacturer,
|
||||
µn_spinand_manufacturer,
|
||||
--- /dev/null
|
||||
+++ b/drivers/mtd/nand/spi/esmt.c
|
||||
@@ -0,0 +1,89 @@
|
||||
+// SPDX-License-Identifier: GPL-2.0
|
||||
+/*
|
||||
+ * Author:
|
||||
+ * Chuanhong Guo <gch981213@gmail.com>
|
||||
+ */
|
||||
+
|
||||
+#include <linux/device.h>
|
||||
+#include <linux/kernel.h>
|
||||
+#include <linux/mtd/spinand.h>
|
||||
+
|
||||
+/* ESMT uses GigaDevice 0xc8 JECDEC ID on some SPI NANDs */
|
||||
+#define SPINAND_MFR_ESMT_C8 0xc8
|
||||
+
|
||||
+static SPINAND_OP_VARIANTS(read_cache_variants,
|
||||
+ SPINAND_PAGE_READ_FROM_CACHE_QUADIO_OP(0, 2, NULL, 0),
|
||||
+ SPINAND_PAGE_READ_FROM_CACHE_X4_OP(0, 1, NULL, 0),
|
||||
+ SPINAND_PAGE_READ_FROM_CACHE_DUALIO_OP(0, 1, NULL, 0),
|
||||
+ SPINAND_PAGE_READ_FROM_CACHE_X2_OP(0, 1, NULL, 0),
|
||||
+ SPINAND_PAGE_READ_FROM_CACHE_OP(true, 0, 1, NULL, 0),
|
||||
+ SPINAND_PAGE_READ_FROM_CACHE_OP(false, 0, 1, NULL, 0));
|
||||
+
|
||||
+static SPINAND_OP_VARIANTS(write_cache_variants,
|
||||
+ SPINAND_PROG_LOAD_X4(true, 0, NULL, 0),
|
||||
+ SPINAND_PROG_LOAD(true, 0, NULL, 0));
|
||||
+
|
||||
+static SPINAND_OP_VARIANTS(update_cache_variants,
|
||||
+ SPINAND_PROG_LOAD_X4(false, 0, NULL, 0),
|
||||
+ SPINAND_PROG_LOAD(false, 0, NULL, 0));
|
||||
+
|
||||
+static int f50l1g41lb_ooblayout_ecc(struct mtd_info *mtd, int section,
|
||||
+ struct mtd_oob_region *region)
|
||||
+{
|
||||
+ if (section > 3)
|
||||
+ return -ERANGE;
|
||||
+
|
||||
+ region->offset = 16 * section + 8;
|
||||
+ region->length = 8;
|
||||
+
|
||||
+ return 0;
|
||||
+}
|
||||
+
|
||||
+static int f50l1g41lb_ooblayout_free(struct mtd_info *mtd, int section,
|
||||
+ struct mtd_oob_region *region)
|
||||
+{
|
||||
+ if (section > 3)
|
||||
+ return -ERANGE;
|
||||
+
|
||||
+ region->offset = 16 * section + 2;
|
||||
+ region->length = 6;
|
||||
+
|
||||
+ return 0;
|
||||
+}
|
||||
+
|
||||
+static const struct mtd_ooblayout_ops f50l1g41lb_ooblayout = {
|
||||
+ .ecc = f50l1g41lb_ooblayout_ecc,
|
||||
+ .free = f50l1g41lb_ooblayout_free,
|
||||
+};
|
||||
+
|
||||
+static const struct spinand_info esmt_c8_spinand_table[] = {
|
||||
+ SPINAND_INFO("F50L1G41LB",
|
||||
+ SPINAND_ID(SPINAND_READID_METHOD_OPCODE_ADDR, 0x01),
|
||||
+ NAND_MEMORG(1, 2048, 64, 64, 1024, 20, 1, 1, 1),
|
||||
+ NAND_ECCREQ(1, 512),
|
||||
+ SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
|
||||
+ &write_cache_variants,
|
||||
+ &update_cache_variants),
|
||||
+ 0,
|
||||
+ SPINAND_ECCINFO(&f50l1g41lb_ooblayout, NULL)),
|
||||
+ SPINAND_INFO("F50D1G41LB",
|
||||
+ SPINAND_ID(SPINAND_READID_METHOD_OPCODE_ADDR, 0x11),
|
||||
+ NAND_MEMORG(1, 2048, 64, 64, 1024, 20, 1, 1, 1),
|
||||
+ NAND_ECCREQ(1, 512),
|
||||
+ SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
|
||||
+ &write_cache_variants,
|
||||
+ &update_cache_variants),
|
||||
+ 0,
|
||||
+ SPINAND_ECCINFO(&f50l1g41lb_ooblayout, NULL)),
|
||||
+};
|
||||
+
|
||||
+static const struct spinand_manufacturer_ops esmt_spinand_manuf_ops = {
|
||||
+};
|
||||
+
|
||||
+const struct spinand_manufacturer esmt_c8_spinand_manufacturer = {
|
||||
+ .id = SPINAND_MFR_ESMT_C8,
|
||||
+ .name = "ESMT",
|
||||
+ .chips = esmt_c8_spinand_table,
|
||||
+ .nchips = ARRAY_SIZE(esmt_c8_spinand_table),
|
||||
+ .ops = &esmt_spinand_manuf_ops,
|
||||
+};
|
||||
--- a/include/linux/mtd/spinand.h
|
||||
+++ b/include/linux/mtd/spinand.h
|
||||
@@ -260,6 +260,7 @@ struct spinand_manufacturer {
|
||||
};
|
||||
|
||||
/* SPI NAND manufacturers */
|
||||
+extern const struct spinand_manufacturer esmt_c8_spinand_manufacturer;
|
||||
extern const struct spinand_manufacturer gigadevice_spinand_manufacturer;
|
||||
extern const struct spinand_manufacturer macronix_spinand_manufacturer;
|
||||
extern const struct spinand_manufacturer micron_spinand_manufacturer;
|
||||
263
target/linux/malta/config-5.15
Normal file
263
target/linux/malta/config-5.15
Normal file
@ -0,0 +1,263 @@
|
||||
CONFIG_ARCH_32BIT_OFF_T=y
|
||||
CONFIG_ARCH_KEEP_MEMBLOCK=y
|
||||
CONFIG_ARCH_MAY_HAVE_PC_FDC=y
|
||||
CONFIG_ARCH_MIGHT_HAVE_PC_PARPORT=y
|
||||
CONFIG_ARCH_MIGHT_HAVE_PC_SERIO=y
|
||||
CONFIG_ARCH_MMAP_RND_BITS_MAX=15
|
||||
CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MAX=15
|
||||
CONFIG_ATA=y
|
||||
CONFIG_ATA_PIIX=y
|
||||
CONFIG_BLK_DEV_BSG=y
|
||||
CONFIG_BLK_DEV_BSGLIB=y
|
||||
CONFIG_BLK_DEV_BSG_COMMON=y
|
||||
# CONFIG_BLK_DEV_INITRD is not set
|
||||
CONFIG_BLK_DEV_LOOP=y
|
||||
CONFIG_BLK_DEV_RAM=y
|
||||
CONFIG_BLK_DEV_RAM_COUNT=16
|
||||
CONFIG_BLK_DEV_RAM_SIZE=4096
|
||||
CONFIG_BLK_DEV_SD=y
|
||||
CONFIG_BLK_MQ_PCI=y
|
||||
CONFIG_BOARD_SCACHE=y
|
||||
CONFIG_BOOT_ELF32=y
|
||||
CONFIG_BUILTIN_DTB=y
|
||||
CONFIG_CEVT_R4K=y
|
||||
CONFIG_CLKBLD_I8253=y
|
||||
CONFIG_CLKEVT_I8253=y
|
||||
CONFIG_CLKSRC_I8253=y
|
||||
CONFIG_CLKSRC_MIPS_GIC=y
|
||||
CONFIG_CLOCKSOURCE_WATCHDOG=y
|
||||
CONFIG_CLONE_BACKWARDS=y
|
||||
CONFIG_COMMON_CLK=y
|
||||
CONFIG_COMPAT_32BIT_TIME=y
|
||||
CONFIG_CONSOLE_TRANSLATIONS=y
|
||||
CONFIG_CPU_GENERIC_DUMP_TLB=y
|
||||
CONFIG_CPU_HAS_PREFETCH=y
|
||||
# CONFIG_CPU_HAS_SMARTMIPS is not set
|
||||
CONFIG_CPU_HAS_SYNC=y
|
||||
# CONFIG_CPU_MICROMIPS is not set
|
||||
# CONFIG_CPU_MIPS32 is not set
|
||||
# CONFIG_CPU_MIPS32_3_5_FEATURES is not set
|
||||
# CONFIG_CPU_MIPS32_R1 is not set
|
||||
# CONFIG_CPU_MIPS32_R2 is not set
|
||||
# CONFIG_CPU_MIPS32_R5 is not set
|
||||
# CONFIG_CPU_MIPS32_R5_FEATURES is not set
|
||||
# CONFIG_CPU_MIPS32_R6 is not set
|
||||
# CONFIG_CPU_MIPS64_R1 is not set
|
||||
# CONFIG_CPU_MIPS64_R2 is not set
|
||||
# CONFIG_CPU_MIPS64_R6 is not set
|
||||
# CONFIG_CPU_MIPSR1 is not set
|
||||
# CONFIG_CPU_MIPSR2 is not set
|
||||
# CONFIG_CPU_MIPSR2_IRQ_EI is not set
|
||||
# CONFIG_CPU_MIPSR2_IRQ_VI is not set
|
||||
CONFIG_CPU_NEEDS_NO_SMARTMIPS_OR_MICROMIPS=y
|
||||
# CONFIG_CPU_NEVADA is not set
|
||||
CONFIG_CPU_R4K_CACHE_TLB=y
|
||||
# CONFIG_CPU_RM7000 is not set
|
||||
CONFIG_CPU_RMAP=y
|
||||
CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y
|
||||
CONFIG_CPU_SUPPORTS_HIGHMEM=y
|
||||
CONFIG_CRC16=y
|
||||
CONFIG_CRYPTO_CRC32=y
|
||||
CONFIG_CRYPTO_CRC32C=y
|
||||
CONFIG_CRYPTO_LIB_POLY1305_RSIZE=2
|
||||
CONFIG_CRYPTO_RNG2=y
|
||||
CONFIG_CSRC_R4K=y
|
||||
CONFIG_DMA_NONCOHERENT=y
|
||||
CONFIG_DNOTIFY=y
|
||||
CONFIG_DTC=y
|
||||
CONFIG_DUMMY_CONSOLE=y
|
||||
CONFIG_EXT4_FS=y
|
||||
CONFIG_F2FS_FS=y
|
||||
CONFIG_FS_IOMAP=y
|
||||
CONFIG_FS_MBCACHE=y
|
||||
CONFIG_FS_POSIX_ACL=y
|
||||
CONFIG_FW_LOADER_PAGED_BUF=y
|
||||
CONFIG_GENERIC_ATOMIC64=y
|
||||
CONFIG_GENERIC_CLOCKEVENTS=y
|
||||
CONFIG_GENERIC_CMOS_UPDATE=y
|
||||
CONFIG_GENERIC_CPU_AUTOPROBE=y
|
||||
CONFIG_GENERIC_FIND_FIRST_BIT=y
|
||||
CONFIG_GENERIC_GETTIMEOFDAY=y
|
||||
CONFIG_GENERIC_IOMAP=y
|
||||
CONFIG_GENERIC_IRQ_CHIP=y
|
||||
CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK=y
|
||||
CONFIG_GENERIC_IRQ_SHOW=y
|
||||
CONFIG_GENERIC_ISA_DMA=y
|
||||
CONFIG_GENERIC_LIB_ASHLDI3=y
|
||||
CONFIG_GENERIC_LIB_ASHRDI3=y
|
||||
CONFIG_GENERIC_LIB_CMPDI2=y
|
||||
CONFIG_GENERIC_LIB_LSHRDI3=y
|
||||
CONFIG_GENERIC_LIB_UCMPDI2=y
|
||||
CONFIG_GENERIC_PCI_IOMAP=y
|
||||
CONFIG_GENERIC_SCHED_CLOCK=y
|
||||
CONFIG_GENERIC_SMP_IDLE_THREAD=y
|
||||
CONFIG_GENERIC_TIME_VSYSCALL=y
|
||||
CONFIG_GLOB=y
|
||||
CONFIG_HANDLE_DOMAIN_IRQ=y
|
||||
CONFIG_HARDWARE_WATCHPOINTS=y
|
||||
CONFIG_HAS_DMA=y
|
||||
CONFIG_HAS_IOMEM=y
|
||||
CONFIG_HAS_IOPORT_MAP=y
|
||||
CONFIG_HW_CONSOLE=y
|
||||
CONFIG_I8253=y
|
||||
CONFIG_I8253_LOCK=y
|
||||
CONFIG_I8259=y
|
||||
CONFIG_INPUT=y
|
||||
# CONFIG_INPUT_MISC is not set
|
||||
CONFIG_INPUT_MOUSEDEV=y
|
||||
CONFIG_INPUT_MOUSEDEV_PSAUX=y
|
||||
CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
|
||||
CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
|
||||
CONFIG_IRQCHIP=y
|
||||
CONFIG_IRQ_DOMAIN=y
|
||||
CONFIG_IRQ_DOMAIN_HIERARCHY=y
|
||||
CONFIG_IRQ_FORCED_THREADING=y
|
||||
CONFIG_IRQ_MIPS_CPU=y
|
||||
CONFIG_IRQ_WORK=y
|
||||
CONFIG_ISA_DMA_API=y
|
||||
CONFIG_JBD2=y
|
||||
CONFIG_JFFS2_FS_POSIX_ACL=y
|
||||
CONFIG_JFFS2_FS_SECURITY=y
|
||||
CONFIG_KALLSYMS=y
|
||||
CONFIG_KERNEL_GZIP=y
|
||||
# CONFIG_KERNEL_XZ is not set
|
||||
CONFIG_LIBFDT=y
|
||||
CONFIG_LOCK_DEBUGGING_SUPPORT=y
|
||||
CONFIG_MD=y
|
||||
CONFIG_MEMFD_CREATE=y
|
||||
CONFIG_MFD_SYSCON=y
|
||||
CONFIG_MIGRATION=y
|
||||
CONFIG_MIPS=y
|
||||
CONFIG_MIPS_ASID_BITS=8
|
||||
CONFIG_MIPS_ASID_SHIFT=0
|
||||
CONFIG_MIPS_BONITO64=y
|
||||
CONFIG_MIPS_CLOCK_VSYSCALL=y
|
||||
CONFIG_MIPS_CM=y
|
||||
CONFIG_MIPS_CMDLINE_FROM_BOOTLOADER=y
|
||||
CONFIG_MIPS_CPC=y
|
||||
CONFIG_MIPS_CPU_SCACHE=y
|
||||
CONFIG_MIPS_EBPF_JIT=y
|
||||
CONFIG_MIPS_EXTERNAL_TIMER=y
|
||||
CONFIG_MIPS_GIC=y
|
||||
CONFIG_MIPS_L1_CACHE_SHIFT=6
|
||||
CONFIG_MIPS_L1_CACHE_SHIFT_6=y
|
||||
CONFIG_MIPS_LD_CAN_LINK_VDSO=y
|
||||
CONFIG_MIPS_MALTA=y
|
||||
CONFIG_MIPS_MSC=y
|
||||
CONFIG_MIPS_MT=y
|
||||
CONFIG_MIPS_MT_FPAFF=y
|
||||
CONFIG_MIPS_MT_SMP=y
|
||||
CONFIG_MIPS_NO_APPENDED_DTB=y
|
||||
CONFIG_MIPS_NR_CPU_NR_MAP=2
|
||||
CONFIG_MIPS_PERF_SHARED_TC_COUNTERS=y
|
||||
CONFIG_MODULES_USE_ELF_REL=y
|
||||
CONFIG_MODULE_FORCE_UNLOAD=y
|
||||
CONFIG_MTD_CFI_STAA=y
|
||||
# CONFIG_MTD_COMPLEX_MAPPINGS is not set
|
||||
CONFIG_NEED_DMA_MAP_STATE=y
|
||||
CONFIG_NET_FLOW_LIMIT=y
|
||||
CONFIG_NLS=y
|
||||
CONFIG_NO_GENERIC_PCI_IOPORT_MAP=y
|
||||
CONFIG_NO_HZ=y
|
||||
CONFIG_NO_HZ_COMMON=y
|
||||
CONFIG_NO_HZ_IDLE=y
|
||||
CONFIG_NR_CPUS=2
|
||||
CONFIG_NVMEM=y
|
||||
CONFIG_OF=y
|
||||
CONFIG_OF_ADDRESS=y
|
||||
CONFIG_OF_EARLY_FLATTREE=y
|
||||
CONFIG_OF_FLATTREE=y
|
||||
CONFIG_OF_IRQ=y
|
||||
CONFIG_OF_KOBJ=y
|
||||
CONFIG_PADATA=y
|
||||
# CONFIG_PARTITION_ADVANCED is not set
|
||||
CONFIG_PATA_LEGACY=y
|
||||
CONFIG_PATA_TIMINGS=y
|
||||
CONFIG_PCI=y
|
||||
CONFIG_PCI_DOMAINS=y
|
||||
CONFIG_PCI_DRIVERS_LEGACY=y
|
||||
CONFIG_PCI_GT64XXX_PCI0=y
|
||||
CONFIG_PCSPKR_PLATFORM=y
|
||||
CONFIG_PERF_USE_VMALLOC=y
|
||||
CONFIG_PGTABLE_LEVELS=2
|
||||
CONFIG_POWER_RESET=y
|
||||
CONFIG_POWER_RESET_PIIX4_POWEROFF=y
|
||||
CONFIG_POWER_RESET_SYSCON=y
|
||||
CONFIG_PRINT_QUOTA_WARNING=y
|
||||
CONFIG_PROC_PAGE_MONITOR=y
|
||||
CONFIG_PTP_1588_CLOCK_OPTIONAL=y
|
||||
CONFIG_QFMT_V2=y
|
||||
CONFIG_QUEUED_RWLOCKS=y
|
||||
CONFIG_QUEUED_SPINLOCKS=y
|
||||
CONFIG_QUOTA=y
|
||||
CONFIG_QUOTACTL=y
|
||||
CONFIG_QUOTA_TREE=y
|
||||
CONFIG_RATIONAL=y
|
||||
CONFIG_REGMAP=y
|
||||
CONFIG_REGMAP_MMIO=y
|
||||
CONFIG_RELAY=y
|
||||
CONFIG_RFS_ACCEL=y
|
||||
CONFIG_RPS=y
|
||||
CONFIG_RTC_CLASS=y
|
||||
CONFIG_RTC_MC146818_LIB=y
|
||||
CONFIG_SATA_HOST=y
|
||||
CONFIG_SCSI=y
|
||||
CONFIG_SCSI_COMMON=y
|
||||
CONFIG_SECCOMP=y
|
||||
CONFIG_SECCOMP_FILTER=y
|
||||
CONFIG_SERIAL_8250_NR_UARTS=4
|
||||
CONFIG_SERIAL_8250_RUNTIME_UARTS=4
|
||||
CONFIG_SERIO=y
|
||||
CONFIG_SERIO_SERPORT=y
|
||||
CONFIG_SG_POOL=y
|
||||
CONFIG_SMP=y
|
||||
CONFIG_SMP_UP=y
|
||||
CONFIG_SOCK_RX_QUEUE_MAPPING=y
|
||||
CONFIG_SRCU=y
|
||||
CONFIG_SWAP_IO_SPACE=y
|
||||
CONFIG_SYNC_R4K=y
|
||||
CONFIG_SYSCTL_EXCEPTION_TRACE=y
|
||||
CONFIG_SYSFS_DEPRECATED=y
|
||||
CONFIG_SYSFS_DEPRECATED_V2=y
|
||||
CONFIG_SYS_HAS_CPU_MIPS32_R1=y
|
||||
CONFIG_SYS_HAS_CPU_MIPS32_R2=y
|
||||
CONFIG_SYS_HAS_CPU_MIPS32_R3_5=y
|
||||
CONFIG_SYS_HAS_CPU_MIPS32_R5=y
|
||||
CONFIG_SYS_HAS_CPU_MIPS32_R6=y
|
||||
CONFIG_SYS_HAS_CPU_MIPS64_R1=y
|
||||
CONFIG_SYS_HAS_CPU_MIPS64_R2=y
|
||||
CONFIG_SYS_HAS_CPU_MIPS64_R6=y
|
||||
CONFIG_SYS_HAS_CPU_NEVADA=y
|
||||
CONFIG_SYS_HAS_CPU_RM7000=y
|
||||
CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y
|
||||
CONFIG_SYS_SUPPORTS_64BIT_KERNEL=y
|
||||
CONFIG_SYS_SUPPORTS_ARBIT_HZ=y
|
||||
CONFIG_SYS_SUPPORTS_BIG_ENDIAN=y
|
||||
CONFIG_SYS_SUPPORTS_HIGHMEM=y
|
||||
CONFIG_SYS_SUPPORTS_LITTLE_ENDIAN=y
|
||||
CONFIG_SYS_SUPPORTS_MICROMIPS=y
|
||||
CONFIG_SYS_SUPPORTS_MIPS16=y
|
||||
CONFIG_SYS_SUPPORTS_MIPS_CMP=y
|
||||
CONFIG_SYS_SUPPORTS_MIPS_CPS=y
|
||||
CONFIG_SYS_SUPPORTS_MULTITHREADING=y
|
||||
CONFIG_SYS_SUPPORTS_RELOCATABLE=y
|
||||
CONFIG_SYS_SUPPORTS_SCHED_SMT=y
|
||||
CONFIG_SYS_SUPPORTS_SMARTMIPS=y
|
||||
CONFIG_SYS_SUPPORTS_SMP=y
|
||||
CONFIG_SYS_SUPPORTS_VPE_LOADER=y
|
||||
CONFIG_SYS_SUPPORTS_ZBOOT=y
|
||||
CONFIG_TARGET_ISA_REV=1
|
||||
CONFIG_TICK_CPU_ACCOUNTING=y
|
||||
CONFIG_TIMER_OF=y
|
||||
CONFIG_TIMER_PROBE=y
|
||||
CONFIG_TREE_RCU=y
|
||||
CONFIG_TREE_SRCU=y
|
||||
CONFIG_USB_SUPPORT=y
|
||||
CONFIG_USE_OF=y
|
||||
CONFIG_VM_EVENT_COUNTERS=y
|
||||
CONFIG_VT=y
|
||||
CONFIG_VT_CONSOLE=y
|
||||
CONFIG_VT_HW_CONSOLE_BINDING=y
|
||||
CONFIG_VXFS_FS=y
|
||||
CONFIG_WAR_ICACHE_REFILLS=y
|
||||
CONFIG_XPS=y
|
||||
@ -246,6 +246,7 @@ CONFIG_HARDIRQS_SW_RESEND=y
|
||||
CONFIG_HAS_DMA=y
|
||||
CONFIG_HAS_IOMEM=y
|
||||
CONFIG_HAS_IOPORT_MAP=y
|
||||
CONFIG_HAVE_ARM_ARCH_TIMER=Y
|
||||
CONFIG_HAVE_SMP=y
|
||||
CONFIG_HDMI=y
|
||||
CONFIG_HID=y
|
||||
|
||||
@ -14,6 +14,8 @@ CONFIG_ARCH_SELECT_MEMORY_MODEL=y
|
||||
CONFIG_ARCH_SPARSEMEM_ENABLE=y
|
||||
CONFIG_ARCH_SUSPEND_POSSIBLE=y
|
||||
CONFIG_ARM=y
|
||||
CONFIG_ARM_ARCH_TIMER=y
|
||||
CONFIG_ARM_ARCH_TIMER_EVTSTREAM=y
|
||||
CONFIG_ARM_GIC=y
|
||||
CONFIG_ARM_HAS_SG_CHAIN=y
|
||||
CONFIG_ARM_HEAVY_MB=y
|
||||
|
||||
@ -0,0 +1,10 @@
|
||||
--- a/arch/arm/mach-mediatek/Kconfig
|
||||
+++ b/arch/arm/mach-mediatek/Kconfig
|
||||
@@ -30,6 +30,7 @@ config MACH_MT7623
|
||||
config MACH_MT7629
|
||||
bool "MediaTek MT7629 SoCs support"
|
||||
default ARCH_MEDIATEK
|
||||
+ select HAVE_ARM_ARCH_TIMER
|
||||
|
||||
config MACH_MT8127
|
||||
bool "MediaTek MT8127 SoCs support"
|
||||
@ -7,11 +7,11 @@
|
||||
include $(TOPDIR)/rules.mk
|
||||
|
||||
PKG_NAME:=mtools
|
||||
PKG_VERSION:=4.0.38
|
||||
PKG_VERSION:=4.0.39
|
||||
|
||||
PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.bz2
|
||||
PKG_SOURCE_URL:=@GNU/$(PKG_NAME)
|
||||
PKG_HASH:=7b94485f486e7df08cca68b00a164a13cd38f4c63cb8684d188759ee7bc5e729
|
||||
PKG_HASH:=397f1e2b7b7a2a270eb7970fa363e445f956926ec51e8170c3869da85b0987bd
|
||||
|
||||
HOST_BUILD_PARALLEL:=1
|
||||
|
||||
|
||||
Loading…
Reference in New Issue
Block a user