Merge Official Source

Signed-off-by: Tianling Shen <cnsztl@immortalwrt.org>

package/base-files/files/lib/upgrade/nand.sh

@@ -387,9 +387,11 @@ nand_verify_tar_file() {
 
 nand_do_flash_file() {
 	local file="$1"
+	local cmd="$2"
+	local file_type
 
-	local cmd="$(identify_if_gzip "$file")cat"
+	[ -z "$cmd" ] && cmd="$(identify_if_gzip "$file")cat"
-	local file_type="$(identify "$file" "$cmd" "")"
+	file_type="$(identify "$file" "$cmd" "")"
 
 	[ ! "$(find_mtd_index "$CI_UBIPART")" ] && CI_UBIPART=rootfs
 
@@ -423,17 +425,22 @@ nand_do_restore_config() {
 # Supported firmware containers:
 # 1. Raw file
 # 2. Gzip
+# 3. Custom (requires passing extracting command)
 #
 # Supported data formats:
 # 1. Tar with kernel/rootfs
 # 2. UBI image (built using "ubinized")
 # 3. UBIFS image (to update UBI volume with)
 # 4. FIT image (to update UBI volume with)
+#
+# $(1): firmware file path
+# $(2): (optional) pipe command to extract firmware
 nand_do_upgrade() {
 	local file="$1"
+	local cmd="$2"
 
 	sync
-	nand_do_flash_file "$file" && nand_do_upgrade_success
+	nand_do_flash_file "$file" "$cmd" && nand_do_upgrade_success
 	nand_do_upgrade_failed
 }
 

package/boot/arm-trusted-firmware-rockchip/Makefile

@@ -24,6 +24,19 @@ define Trusted-Firmware-A/Default
   BUILD_TARGET:=rockchip
 endef
 
+define Trusted-Firmware-A/rk3308
+  BUILD_SUBTARGET:=armv8
+  ATF:=rk33/$(RK3308_ATF)
+  TPL:=rk33/$(RK3308_TPL)
+endef
+
+define Trusted-Firmware-A/rk3308-rock-pi-s
+  NAME:=Radxa ROCK Pi S board
+  BUILD_SUBTARGET:=armv8
+  ATF:=rk33/$(RK3308_ATF)
+  TPL:=rk33/$(RK3308_TPL_ROCK_PI_S)
+endef
+
 define Trusted-Firmware-A/rk3328
   BUILD_SUBTARGET:=armv8
   ATF:=rk33/$(RK3328_ATF)
@@ -64,6 +77,8 @@ define Trusted-Firmware-A/rk3588
 endef
 
 TFA_TARGETS:= \
+	rk3308 \
+	rk3308-rock-pi-s \
 	rk3328 \
 	rk3399 \
 	rk3566 \

package/boot/arm-trusted-firmware-rockchip/atf-version.mk

@@ -1,3 +1,7 @@
+RK3308_ATF:=rk3308_bl31_v2.26.elf
+RK3308_TPL:=rk3308_ddr_589MHz_uart2_m1_v2.07.bin
+RK3308_TPL_ROCK_PI_S:=rk3308_ddr_589MHz_uart0_m0_v2.07.bin
+
 RK3328_ATF:=rk322xh_bl31_v1.49.elf
 RK3328_TPL:=rk3328_ddr_333MHz_v1.19.bin
 RK3328_LOADER:=rk322xh_miniloader_v2.50.bin

package/boot/uboot-mediatek/patches/451-add-tplink-xtr8488.patch

@@ -133,7 +133,7 @@
 +CONFIG_LMB_MAX_REGIONS=64
 --- /dev/null
 +++ b/arch/arm/dts/mt7986a-tplink-tl-xtr8488.dts
-@@ -0,0 +1,200 @@
+@@ -0,0 +1,196 @@
 +// SPDX-License-Identifier: GPL-2.0
 +/*
 + * Copyright (c) 2021 MediaTek Inc.
@@ -161,48 +161,44 @@
 +		reg = <0x40000000 0x40000000>;
 +	};
 +
-+	gpio-keys {
++	keys {
 +		compatible = "gpio-keys";
 +
-+		button-reset {
++		reset {
 +			label = "reset";
 +			linux,code = <KEY_RESTART>;
 +			gpios = <&gpio 15 GPIO_ACTIVE_LOW>;
 +		};
 +
-+		button-turbo {
++		wps {
-+			label = "turbo";
-+			linux,code = <BTN_1>;
-+			gpios = <&gpio 11 GPIO_ACTIVE_LOW>;
-+		};
-+
-+		button-wps {
 +			label = "wps";
 +			linux,code = <KEY_WPS_BUTTON>;
 +			gpios = <&gpio 16 GPIO_ACTIVE_LOW>;
 +		};
 +
++		turbo {
++			label = "turbo";
++			linux,code = <BTN_1>;
++			gpios = <&gpio 11 GPIO_ACTIVE_LOW>;
++		};
 +	};
 +
-+	gpio-leds {
++	leds {
 +		compatible = "gpio-leds";
 +
-+		led_status_red: led-0 {
++		status_red {
 +			label = "red:status";
 +			gpios = <&gpio 7 GPIO_ACTIVE_HIGH>;
-+			default-state = "off";
 +		};
 +
-+		led_status_green: led-1 {
++		status_green {
 +			label = "green:status";
 +			gpios = <&gpio 8 GPIO_ACTIVE_HIGH>;
-+			default-state = "on";
 +		};
 +
-+		led-2 {
++		turbo {
 +			label = "green:turbo";
 +			gpios = <&gpio 12 GPIO_ACTIVE_LOW>;
-+			default-state = "off";
 +		};
 +	};
 +};
@@ -336,13 +332,11 @@
 +};
 --- /dev/null
 +++ b/tplink_tl-xtr8488_env
-@@ -0,0 +1,56 @@
+@@ -0,0 +1,57 @@
-+ethaddr_factory=mtd read config 0x40080000 0x0 0x20000 && env readmem -b ethaddr 0x4008001c 0x6 ; setenv ethaddr_factory
 +ipaddr=192.168.1.1
 +serverip=192.168.1.254
 +loadaddr=0x46000000
 +console=earlycon=uart8250,mmio32,0x11002000 console=ttyS0
-+bootargs=root=/dev/fit0 rootwait
 +bootcmd=if pstore check ; then run boot_recovery ; else run boot_ubi ; fi
 +bootconf=config-1
 +bootdelay=0
@@ -378,6 +372,8 @@
 +boot_tftp=tftpboot $loadaddr $bootfile && bootm $loadaddr#$bootconf
 +boot_tftp_write_fip=tftpboot $loadaddr $bootfile_fip && run mtd_write_fip && run reset_factory
 +boot_tftp_write_bl2=tftpboot $loadaddr $bootfile_bl2 && run mtd_write_bl2
++part_default=production
++part_recovery=recovery
 +reset_factory=ubi part ubi ; mw $loadaddr 0x0 0x800 ; ubi write $loadaddr ubootenv 0x800 ; ubi write $loadaddr ubootenv2 0x800
 +mtd_write_fip=mtd erase fip && mtd write fip $loadaddr
 +mtd_write_bl2=mtd erase bl2 && mtd write bl2 $loadaddr
@@ -389,6 +385,7 @@
 +ubi_remove_rootfs=ubi check rootfs_data && ubi remove rootfs_data
 +ubi_write_production=ubi check fit && ubi remove fit ; run ubi_remove_rootfs ; ubi create fit $filesize dynamic && ubi write $loadaddr fit $filesize
 +ubi_write_recovery=ubi check recovery && ubi remove recovery ; run ubi_remove_rootfs ; ubi create recovery $filesize dynamic && ubi write $loadaddr recovery $filesize
++ethaddr_factory=mtd read config 0x40080000 0x0 0x20000 && env readmem -b ethaddr 0x4008001c 0x6 ; setenv ethaddr_factory
 +_init_env=setenv _init_env ; run ubi_create_env ; saveenv ; saveenv
 +_firstboot=setenv _firstboot ; run ethaddr_factory ; run _switch_to_menu ; run _init_env ; run boot_first
 +_switch_to_menu=setenv _switch_to_menu ; setenv bootdelay 3 ; setenv bootmenu_delay 3 ; setenv bootmenu_0 $bootmenu_0d ; setenv bootmenu_0d ; run _bootmenu_update_title

package/boot/uboot-rockchip/Makefile

@@ -25,6 +25,25 @@ define U-Boot/Default
 endef
 
 
+# RK3308 boards
+
+define U-Boot/rk3308/Default
+  BUILD_SUBTARGET:=armv8
+  DEPENDS:=+PACKAGE_u-boot-$(1):trusted-firmware-a-rk3308
+  ATF:=$(RK3308_ATF)
+  TPL:=$(RK3308_TPL)
+endef
+
+define U-Boot/rock-pi-s-rk3308
+  $(U-Boot/rk3308/Default)
+  DEPENDS:=+PACKAGE_u-boot-$(1):trusted-firmware-a-rk3308-rock-pi-s
+  TPL:=$(RK3308_TPL_ROCK_PI_S)
+  NAME:=ROCK Pi S
+  BUILD_DEVICES:= \
+    radxa_rock-pi-s
+endef
+
+
 # RK3328 boards
 
 define U-Boot/Default/rk3328
@@ -235,7 +254,7 @@ endef
 
 define U-Boot/rock-3a-rk3568
   $(U-Boot/Default/rk3568)
-  NAME:=Rock 3A
+  NAME:=ROCK 3A
   BUILD_DEVICES:= \
     radxa_rock-3a
 endef
@@ -316,6 +335,7 @@ UBOOT_TARGETS := \
   nanopi-r4se-rk3399 \
   rock-pi-4-rk3399 \
   rockpro64-rk3399 \
+  rock-pi-s-rk3308 \
   nanopi-r2c-rk3328 \
   nanopi-r2c-plus-rk3328 \
   nanopi-r2s-rk3328 \

package/network/config/wifi-scripts/Makefile

@@ -19,7 +19,7 @@ include $(INCLUDE_DIR)/package.mk
 define Package/wifi-scripts
   SECTION:=utils
   CATEGORY:=Base system
-  DEPENDS:=+netifd +ucode +ucode-mod-nl80211 +ucode-mod-ubus +ucode-mod-uci
+  DEPENDS:=+netifd +ucode +ucode-mod-nl80211 +ucode-mod-rtnl +ucode-mod-ubus +ucode-mod-uci
   TITLE:=Wi-Fi configuration scripts
   PKGARCH:=all
 endef

target/linux/mediatek/dts/mt7986a-tplink-tl-xtr8488.dts

@@ -26,53 +26,10 @@
 		stdout-path = "serial0:115200n8";
 	};
 
-	memory@40000000 {
+	memory {
 		reg = <0 0x40000000 0 0x40000000>;
 	};
 
-	gpio-keys {
-		compatible = "gpio-keys";
-
-		button-reset {
-			label = "reset";
-			linux,code = <KEY_RESTART>;
-			gpios = <&pio 15 GPIO_ACTIVE_LOW>;
-		};
-
-		button-turbo {
-			label = "turbo";
-			linux,code = <BTN_1>;
-			gpios = <&pio 11 GPIO_ACTIVE_LOW>;
-		};
-
-		button-wps {
-			label = "wps";
-			linux,code = <KEY_WPS_BUTTON>;
-			gpios = <&pio 16 GPIO_ACTIVE_LOW>;
-		};
-	};
-
-	gpio-leds {
-		compatible = "gpio-leds";
-
-		led_status_red: led-0 {
-			function = LED_FUNCTION_STATUS;
-			color = <LED_COLOR_ID_RED>;
-			gpios = <&pio 7 GPIO_ACTIVE_HIGH>;
-		};
-
-		led_status_green: led-1 {
-			function = LED_FUNCTION_STATUS;
-			color = <LED_COLOR_ID_GREEN>;
-			gpios = <&pio 8 GPIO_ACTIVE_HIGH>;
-		};
-
-		led-2 {
-			label = "green:turbo";
-			gpios = <&pio 12 GPIO_ACTIVE_LOW>;
-		};
-	};
-
 	reg_3p3v: regulator-3p3v {
 		compatible = "regulator-fixed";
 		regulator-name = "fixed-3.3V";
@@ -90,6 +47,50 @@
 		regulator-boot-on;
 		regulator-always-on;
 	};
+
+	keys {
+		compatible = "gpio-keys";
+
+		reset {
+			label = "reset";
+			linux,code = <KEY_RESTART>;
+			gpios = <&pio 15 GPIO_ACTIVE_LOW>;
+		};
+
+		wps {
+			label = "wps";
+			linux,code = <KEY_WPS_BUTTON>;
+			gpios = <&pio 16 GPIO_ACTIVE_LOW>;
+		};
+
+		turbo {
+			label = "turbo";
+			linux,code = <BTN_1>;
+			gpios = <&pio 11 GPIO_ACTIVE_LOW>;
+		};
+	};
+
+	leds {
+		compatible = "gpio-leds";
+
+		led_status_red: status-red {
+			color = <LED_COLOR_ID_RED>;
+			function = LED_FUNCTION_STATUS;
+			gpios = <&pio 7 GPIO_ACTIVE_HIGH>;
+		};
+
+		led_status_green: status-green {
+			color = <LED_COLOR_ID_GREEN>;
+			function = LED_FUNCTION_STATUS;
+			gpios = <&pio 8 GPIO_ACTIVE_HIGH>;
+		};
+
+		turbo {
+			label = "green:turbo";
+			color = <LED_COLOR_ID_GREEN>;
+			gpios = <&pio 12 GPIO_ACTIVE_LOW>;
+		};
+	};
 };
 
 &crypto {
@@ -131,18 +132,16 @@
 };
 
 &mdio {
-	phy5: ethernet-phy@5 {
+	phy5: phy@5 {
 		compatible = "ethernet-phy-ieee802.3-c45";
 		reg = <5>;
 		realtek,aldps-enable;
-		realtek,led-link-select = <0xa7 0x0 0x0>;
 	};
 
-	phy7: ethernet-phy@7 {
+	phy7: phy@7 {
 		compatible = "ethernet-phy-ieee802.3-c45";
 		reg = <7>;
 		realtek,aldps-enable;
-		realtek,led-link-select = <0xa7 0x0 0x0>;
 	};
 
 	switch: switch@1f {
@@ -156,6 +155,52 @@
 	};
 };
 
+&switch {
+	ports {
+		#address-cells = <1>;
+		#size-cells = <0>;
+
+		port@0 {
+			reg = <0>;
+			label = "lan1";
+		};
+
+		port@1 {
+			reg = <1>;
+			label = "lan2";
+		};
+
+		port@2 {
+			reg = <2>;
+			label = "lan3";
+		};
+
+		port@3 {
+			reg = <3>;
+			label = "lan4";
+		};
+
+		port@5 {
+			reg = <5>;
+			label = "lan5";
+			phy-handle = <&phy5>;
+			phy-mode = "2500base-x";
+		};
+
+		port@6 {
+			reg = <6>;
+			ethernet = <&gmac0>;
+			phy-mode = "2500base-x";
+
+			fixed-link {
+				speed = <2500>;
+				full-duplex;
+				pause;
+			};
+		};
+	};
+};
+
 &spi0 {
 	pinctrl-names = "default";
 	pinctrl-0 = <&spi_flash_pins>;
@@ -178,13 +223,13 @@
 
 			partition@0 {
 				label = "bl2";
-				reg = <0x0 0x100000>;
+				reg = <0x000000 0x0100000>;
 				read-only;
 			};
 
 			partition@100000 {
 				label = "config";
-				reg = <0x100000 0x40000>;
+				reg = <0x100000 0x0040000>;
 				read-only;
 
 				nvmem-layout {
@@ -202,7 +247,7 @@
 
 			partition@140000 {
 				label = "factory";
-				reg = <0x140000 0x40000>;
+				reg = <0x140000 0x0040000>;
 				read-only;
 
 				nvmem-layout {
@@ -215,21 +260,27 @@
 					};
 
 					eeprom_factory_1000: eeprom@1000 {
-						reg = <0x1000 0x1000>;
+						reg = <0x1000 0xe00>;
 					};
 				};
 			};
 
+			partition@180000 {
+				label = "reserved";
+				reg = <0x180000 0x0200000>;
+				read-only;
+			};
+
 			partition@380000 {
 				label = "fip";
-				reg = <0x380000 0x200000>;
+				reg = <0x380000 0x0200000>;
 				read-only;
 			};
 
 			partition@580000 {
 				compatible = "linux,ubi";
-				label = "ubi";
 				reg = <0x580000 0x7800000>;
+				label = "ubi";
 
 				volumes {
 					ubi_rootdisk: ubi-volume-fit {
@@ -253,6 +304,7 @@
 			compatible = "mediatek,mt76";
 			reg = <0x0000 0 0 0 0>;
 			ieee80211-freq-limit = <5470000 5875000>;
+
 			nvmem-cells = <&eeprom_factory_1000>, <&macaddr_config_1c 3>;
 			nvmem-cell-names = "eeprom", "mac-address";
 		};
@@ -271,7 +323,7 @@
 		};
 	};
 
-	spi_flash_pins: spi-flash-pins-33-to-38 {
+	spi_flash_pins: spi-flash-pins {
 		mux {
 			function = "spi";
 			groups = "spi0", "spi0_wp_hold";
@@ -279,12 +331,12 @@
 		conf-pu {
 			pins = "SPI2_CS", "SPI2_HOLD", "SPI2_WP";
 			drive-strength = <8>;
-			mediatek,pull-up-adv = <0>;
+			mediatek,pull-up-adv = <0>; /* bias-disable */
 		};
 		conf-pd {
 			pins = "SPI2_CLK", "SPI2_MOSI", "SPI2_MISO";
 			drive-strength = <8>;
-			mediatek,pull-down-adv = <0>;
+			mediatek,pull-down-adv = <0>; /* bias-disable */
 		};
 	};
 
@@ -312,52 +364,6 @@
 	status = "okay";
 };
 
-&switch {
-	ports {
-		#address-cells = <1>;
-		#size-cells = <0>;
-
-		port@0 {
-			reg = <0>;
-			label = "lan4";
-		};
-
-		port@1 {
-			reg = <1>;
-			label = "lan3";
-		};
-
-		port@2 {
-			reg = <2>;
-			label = "lan2";
-		};
-
-		port@3 {
-			reg = <3>;
-			label = "lan1";
-		};
-
-		port@5 {
-			reg = <5>;
-			label = "lan5";
-			phy-handle = <&phy5>;
-			phy-mode = "2500base-x";
-		};
-
-		port@6 {
-			reg = <6>;
-			ethernet = <&gmac0>;
-			phy-mode = "2500base-x";
-
-			fixed-link {
-				speed = <2500>;
-				full-duplex;
-				pause;
-			};
-		};
-	};
-};
-
 &trng {
 	status = "okay";
 };
@@ -375,9 +381,10 @@
 };
 
 &wifi {
-	nvmem-cells = <&eeprom_factory_0>;
-	nvmem-cell-names = "eeprom";
 	pinctrl-names = "default";
 	pinctrl-0 = <&wf_2g_5g_pins>;
+	ieee80211-freq-limit = <2400000 2500000>, <5170000 5350000>;
+	nvmem-cells = <&eeprom_factory_0>, <&macaddr_config_1c 2>;
+	nvmem-cell-names = "eeprom", "mac-address";
 	status = "okay";
 };

target/linux/mediatek/filogic/base-files/etc/hotplug.d/ieee80211/11_fix_wifi_mac

@@ -167,9 +167,7 @@ case "$board" in
 		[ "$PHYNBR" = "0" ] && get_mac_label > /sys${DEVPATH}/macaddress
 		;;
 	tplink,tl-xtr8488)
-		addr=$(cat /sys/class/net/eth0/address)
+		[ "$PHYNBR" = "1" ] && get_mac_label > /sys${DEVPATH}/macaddress
-		[ "$PHYNBR" = "1" ] && echo "$addr" > /sys${DEVPATH}/macaddress
-		[ "$PHYNBR" = "2" ] && macaddr_add $addr 2 > /sys${DEVPATH}/macaddress
 		;;
 	ubnt,unifi-6-plus)
 		addr=$(mtd_get_mac_binary EEPROM 0x6)

target/linux/mediatek/image/filogic.mk

@@ -1310,14 +1310,14 @@ define Device/tplink_tl-xtr8488
   DEVICE_DTS := mt7986a-tplink-tl-xtr8488
   $(call Device/tplink_tl-xdr-common)
   DEVICE_PACKAGES += kmod-mt7915-firmware
-  ARTIFACT/bl31-uboot.fip := mt7986-bl31-uboot tplink_tl-xtr8488
   ARTIFACT/preloader.bin := mt7986-bl2 spim-nand-ddr4
+  ARTIFACT/bl31-uboot.fip := mt7986-bl31-uboot tplink_tl-xtr8488
 endef
 TARGET_DEVICES += tplink_tl-xtr8488
 
 define Device/ubnt_unifi-6-plus
   DEVICE_VENDOR := Ubiquiti
-  DEVICE_MODEL := UniFi 6 Plus
+  DEVICE_MODEL := UniFi U6+
   DEVICE_DTS := mt7981a-ubnt-unifi-6-plus
   DEVICE_DTS_DIR := ../dts
   DEVICE_PACKAGES := kmod-mt7915e kmod-mt7981-firmware mt7981-wo-firmware e2fsprogs f2fsck mkf2fs fdisk partx-utils

target/linux/mediatek/image/mt7622.mk

@@ -328,7 +328,7 @@ TARGET_DEVICES += totolink_a8000ru
 
 define Device/ubnt_unifi-6-lr-v1
   DEVICE_VENDOR := Ubiquiti
-  DEVICE_MODEL := UniFi 6 LR
+  DEVICE_MODEL := UniFi U6 Long-Range
   DEVICE_VARIANT := v1
   DEVICE_DTS_CONFIG := config@1
   DEVICE_DTS := mt7622-ubnt-unifi-6-lr-v1
@@ -340,7 +340,7 @@ TARGET_DEVICES += ubnt_unifi-6-lr-v1
 
 define Device/ubnt_unifi-6-lr-v1-ubootmod
   DEVICE_VENDOR := Ubiquiti
-  DEVICE_MODEL := UniFi 6 LR
+  DEVICE_MODEL := UniFi U6 Long-Range
   DEVICE_VARIANT := v1 U-Boot mod
   DEVICE_DTS := mt7622-ubnt-unifi-6-lr-v1-ubootmod
   DEVICE_DTS_DIR := ../dts
@@ -359,7 +359,7 @@ TARGET_DEVICES += ubnt_unifi-6-lr-v1-ubootmod
 
 define Device/ubnt_unifi-6-lr-v2
   DEVICE_VENDOR := Ubiquiti
-  DEVICE_MODEL := UniFi 6 LR
+  DEVICE_MODEL := UniFi U6 Long-Range
   DEVICE_VARIANT := v2
   DEVICE_DTS_CONFIG := config@1
   DEVICE_DTS := mt7622-ubnt-unifi-6-lr-v2
@@ -370,7 +370,7 @@ TARGET_DEVICES += ubnt_unifi-6-lr-v2
 
 define Device/ubnt_unifi-6-lr-v2-ubootmod
   DEVICE_VENDOR := Ubiquiti
-  DEVICE_MODEL := UniFi 6 LR
+  DEVICE_MODEL := UniFi U6 Long-Range
   DEVICE_VARIANT := v2 U-Boot mod
   DEVICE_DTS := mt7622-ubnt-unifi-6-lr-v2-ubootmod
   DEVICE_DTS_DIR := ../dts
@@ -388,7 +388,7 @@ TARGET_DEVICES += ubnt_unifi-6-lr-v2-ubootmod
 
 define Device/ubnt_unifi-6-lr-v3
   DEVICE_VENDOR := Ubiquiti
-  DEVICE_MODEL := UniFi 6 LR
+  DEVICE_MODEL := UniFi U6 Long-Range
   DEVICE_VARIANT := v3
   DEVICE_DTS_CONFIG := config@1
   DEVICE_DTS := mt7622-ubnt-unifi-6-lr-v3
@@ -399,7 +399,7 @@ TARGET_DEVICES += ubnt_unifi-6-lr-v3
 
 define Device/ubnt_unifi-6-lr-v3-ubootmod
   DEVICE_VENDOR := Ubiquiti
-  DEVICE_MODEL := UniFi 6 LR
+  DEVICE_MODEL := UniFi U6 Long-Range
   DEVICE_VARIANT := v3 U-Boot mod
   DEVICE_DTS := mt7622-ubnt-unifi-6-lr-v3-ubootmod
   DEVICE_DTS_DIR := ../dts

target/linux/ramips/image/mt7621.mk

@@ -2700,7 +2700,7 @@ TARGET_DEVICES += ubnt_edgerouter-x-sfp
 define Device/ubnt_unifi-6-lite
   $(Device/dsa-migration)
   DEVICE_VENDOR := Ubiquiti
-  DEVICE_MODEL := UniFi 6 Lite
+  DEVICE_MODEL := UniFi U6 Lite
   DEVICE_DTS_CONFIG := config@1
   DEVICE_DTS_LOADADDR := 0x87000000
   DEVICE_PACKAGES += kmod-mt7603 kmod-mt7915-firmware -uboot-envtools

target/linux/rockchip/image/armv8.mk

@@ -249,6 +249,7 @@ define Device/radxa_rock-3a
   SOC := rk3568
   SUPPORTED_DEVICES := radxa,rock3a
   BOOT_FLOW := pine64-img
+  DEVICE_PACKAGES := kmod-usb-net-cdc-ncm kmod-usb-net-rndis
 endef
 TARGET_DEVICES += radxa_rock-3a
 
@@ -293,6 +294,15 @@ define Device/radxa_rock-pi-e
 endef
 TARGET_DEVICES += radxa_rock-pi-e
 
+define Device/radxa_rock-pi-s
+  DEVICE_VENDOR := Radxa
+  DEVICE_MODEL := ROCK Pi S
+  SOC := rk3308
+  BOOT_SCRIPT := rock-pi-s
+  DEVICE_PACKAGES := kmod-usb-net-cdc-ncm kmod-usb-net-rndis
+endef
+TARGET_DEVICES += radxa_rock-pi-s
+
 define Device/sinovoip_bpi-r2-pro
   DEVICE_VENDOR := Bananapi
   DEVICE_MODEL := BPi-R2 Pro

target/linux/rockchip/image/rock-pi-s.bootscript

@@ -0,0 +1,7 @@
+part uuid ${devtype} ${devnum}:2 uuid
+
+setenv bootargs "console=ttyS0,1500000 earlycon=uart8250,mmio32,0xff0a0000 root=PARTUUID=${uuid} rw rootwait";
+
+load ${devtype} ${devnum}:1 ${kernel_addr_r} kernel.img
+
+bootm ${kernel_addr_r}

target/linux/rockchip/patches-6.6/005-01-v6.8-arm64-dts-rockchip-add-gpio-line-names-to-rk3308-roc.patch

@@ -0,0 +1,84 @@
+From c45de75d7a9ab44a15dedc7a121d6371d6891301 Mon Sep 17 00:00:00 2001
+From: Trevor Woerner <twoerner@gmail.com>
+Date: Mon, 20 Nov 2023 11:22:32 -0500
+Subject: [PATCH] arm64: dts: rockchip: add gpio-line-names to rk3308-rock-pi-s
+
+Add names to the pins of the general-purpose expansion header as given in the
+Radxa GPIO page[1] following the conventions in the kernel documentation[2] to
+make it easier for users to correlate the pins with functions when using
+utilities such as gpioinfo.
+
+[1] https://wiki.radxa.com/RockpiS/hardware/gpio
+[2] Documentation/devicetree/bindings/gpio/gpio.txt
+
+Signed-off-by: Trevor Woerner <twoerner@gmail.com>
+Link: https://lore.kernel.org/r/20231120162232.27653-1-twoerner@gmail.com
+Signed-off-by: Heiko Stuebner <heiko@sntech.de>
+---
+ .../boot/dts/rockchip/rk3308-rock-pi-s.dts    | 58 +++++++++++++++++++
+ 1 file changed, 58 insertions(+)
+
+--- a/arch/arm64/boot/dts/rockchip/rk3308-rock-pi-s.dts
++++ b/arch/arm64/boot/dts/rockchip/rk3308-rock-pi-s.dts
+@@ -258,3 +258,61 @@
+ &wdt {
+ 	status = "okay";
+ };
++
++&gpio0 {
++	gpio-line-names =
++	/* GPIO0_A0 - A7 */
++	"", "", "", "", "", "", "", "",
++	/* GPIO0_B0 - B7 */
++	"", "", "", "header1-pin3 [GPIO0_B3]", "header1-pin5 [GPIO0_B4]",
++	"", "", "header1-pin11 [GPIO0_B7]",
++	/* GPIO0_C0 - C7 */
++	"header1-pin13 [GPIO0_C0]", "header1-pin15 [GPIO0_C1]", "", "", "",
++	"", "", "",
++	/* GPIO0_D0 - D8 */
++	"", "", "", "", "", "", "", "";
++};
++
++&gpio1 {
++	gpio-line-names =
++	/* GPIO1_A0 - A7 */
++	"", "", "", "", "", "", "", "",
++	/* GPIO1_B0 - B7 */
++	"", "", "", "", "", "", "", "",
++	/* GPIO1_C0 - C7 */
++	"", "", "", "", "", "", "header1-pin21 [GPIO1_C6]",
++	"header1-pin19 [GPIO1_C7]",
++	/* GPIO1_D0 - D8 */
++	"header1-pin23 [GPIO1_D0]", "header1-pin24 [GPIO1_D1]", "", "", "",
++	"", "", "";
++};
++
++&gpio2 {
++	gpio-line-names =
++	/* GPIO2_A0 - A7 */
++	"header1-pin10 [GPIO2_A0]", "header1-pin8 [GPIO2_A1]", "", "",
++	"header1-pin7 [GPIO2_A4]", "header1-pin12 [GPIO2_A5]",
++	"header2-pin46 [GPIO2_A6]", "header1-pin22 [GPIO1_A7]",
++	/* GPIO2_B0 - B7 */
++	"header2-pin45 [GPIO2_B0]", "header1-pin18 [GPIO2_B1]",
++	"header1-pin16 [GPIO2_B2]", "header2-pin44 [GPIO2_B3]",
++	"header2-pin43 [GPIO2_B4]", "header2-pin28 [GPIO2_B5]",
++	"header2-pin30 [GPIO2_B6]", "header2-pin32 [GPIO2_B7]",
++	/* GPIO2_C0 - C7 */
++	"header2-pin34 [GPIO2_C0]", "", "", "", "", "", "", "",
++	/* GPIO2_D0 - D8 */
++	"", "", "", "", "", "", "", "";
++};
++
++&gpio3 {
++	gpio-line-names =
++	/* GPIO3_A0 - A7 */
++	"", "", "", "", "", "", "", "",
++	/* GPIO3_B0 - B7 */
++	"", "", "header2-pin42 [GPIO3_B2]", "header2-pin41 [GPIO3_B3]",
++	"header2-pin40 [GPIO3_B4]", "header2-pin39 [GPIO3_B5]", "", "",
++	/* GPIO3_C0 - C7 */
++	"", "", "", "", "", "", "", "",
++	/* GPIO3_D0 - D8 */
++	"", "", "", "", "", "", "", "";
++};

target/linux/rockchip/patches-6.6/005-02-v6.8-arm64-dts-rockchip-rk3308-rock-pi-s-gpio-line-names-.patch

@@ -0,0 +1,152 @@
+From 085021cc825ed90a6ddc4406f608fb8a85745f81 Mon Sep 17 00:00:00 2001
+From: Trevor Woerner <twoerner@gmail.com>
+Date: Tue, 19 Dec 2023 12:38:13 -0500
+Subject: [PATCH] arm64: dts: rockchip: rk3308-rock-pi-s gpio-line-names
+ cleanup
+
+Perform the following cleanups on a previous patch:
+- indent lines after "gpio-line-names"
+- fix D0-D8 -> D0-D7
+- sort phandle references
+
+Fixes: c45de75d7a9a ("arm64: dts: rockchip: add gpio-line-names to rk3308-rock-pi-s")
+Signed-off-by: Trevor Woerner <twoerner@gmail.com>
+Link: https://lore.kernel.org/r/20231219173814.1569-1-twoerner@gmail.com
+Signed-off-by: Heiko Stuebner <heiko@sntech.de>
+---
+ .../boot/dts/rockchip/rk3308-rock-pi-s.dts    | 120 +++++++++---------
+ 1 file changed, 62 insertions(+), 58 deletions(-)
+
+--- a/arch/arm64/boot/dts/rockchip/rk3308-rock-pi-s.dts
++++ b/arch/arm64/boot/dts/rockchip/rk3308-rock-pi-s.dts
+@@ -151,6 +151,68 @@
+ 	status = "okay";
+ };
+ 
++&gpio0 {
++	gpio-line-names =
++		/* GPIO0_A0 - A7 */
++		"", "", "", "", "", "", "", "",
++		/* GPIO0_B0 - B7 */
++		"", "", "", "header1-pin3 [GPIO0_B3]",
++		"header1-pin5 [GPIO0_B4]", "", "",
++		"header1-pin11 [GPIO0_B7]",
++		/* GPIO0_C0 - C7 */
++		"header1-pin13 [GPIO0_C0]",
++		"header1-pin15 [GPIO0_C1]", "", "", "",
++		"", "", "",
++		/* GPIO0_D0 - D7 */
++		"", "", "", "", "", "", "", "";
++};
++
++&gpio1 {
++	gpio-line-names =
++		/* GPIO1_A0 - A7 */
++		"", "", "", "", "", "", "", "",
++		/* GPIO1_B0 - B7 */
++		"", "", "", "", "", "", "", "",
++		/* GPIO1_C0 - C7 */
++		"", "", "", "", "", "", "header1-pin21 [GPIO1_C6]",
++		"header1-pin19 [GPIO1_C7]",
++		/* GPIO1_D0 - D7 */
++		"header1-pin23 [GPIO1_D0]", "header1-pin24 [GPIO1_D1]",
++		"", "", "", "", "", "";
++};
++
++&gpio2 {
++	gpio-line-names =
++		/* GPIO2_A0 - A7 */
++		"header1-pin10 [GPIO2_A0]", "header1-pin8 [GPIO2_A1]",
++		"", "",
++		"header1-pin7 [GPIO2_A4]", "header1-pin12 [GPIO2_A5]",
++		"header2-pin46 [GPIO2_A6]", "header1-pin22 [GPIO1_A7]",
++		/* GPIO2_B0 - B7 */
++		"header2-pin45 [GPIO2_B0]", "header1-pin18 [GPIO2_B1]",
++		"header1-pin16 [GPIO2_B2]", "header2-pin44 [GPIO2_B3]",
++		"header2-pin43 [GPIO2_B4]", "header2-pin28 [GPIO2_B5]",
++		"header2-pin30 [GPIO2_B6]", "header2-pin32 [GPIO2_B7]",
++		/* GPIO2_C0 - C7 */
++		"header2-pin34 [GPIO2_C0]", "", "", "", "", "", "", "",
++		/* GPIO2_D0 - D7 */
++		"", "", "", "", "", "", "", "";
++};
++
++&gpio3 {
++	gpio-line-names =
++		/* GPIO3_A0 - A7 */
++		"", "", "", "", "", "", "", "",
++		/* GPIO3_B0 - B7 */
++		"", "", "header2-pin42 [GPIO3_B2]",
++		"header2-pin41 [GPIO3_B3]", "header2-pin40 [GPIO3_B4]",
++		"header2-pin39 [GPIO3_B5]", "", "",
++		/* GPIO3_C0 - C7 */
++		"", "", "", "", "", "", "", "",
++		/* GPIO3_D0 - D7 */
++		"", "", "", "", "", "", "", "";
++};
++
+ &i2c1 {
+ 	status = "okay";
+ };
+@@ -258,61 +320,3 @@
+ &wdt {
+ 	status = "okay";
+ };
+-
+-&gpio0 {
+-	gpio-line-names =
+-	/* GPIO0_A0 - A7 */
+-	"", "", "", "", "", "", "", "",
+-	/* GPIO0_B0 - B7 */
+-	"", "", "", "header1-pin3 [GPIO0_B3]", "header1-pin5 [GPIO0_B4]",
+-	"", "", "header1-pin11 [GPIO0_B7]",
+-	/* GPIO0_C0 - C7 */
+-	"header1-pin13 [GPIO0_C0]", "header1-pin15 [GPIO0_C1]", "", "", "",
+-	"", "", "",
+-	/* GPIO0_D0 - D8 */
+-	"", "", "", "", "", "", "", "";
+-};
+-
+-&gpio1 {
+-	gpio-line-names =
+-	/* GPIO1_A0 - A7 */
+-	"", "", "", "", "", "", "", "",
+-	/* GPIO1_B0 - B7 */
+-	"", "", "", "", "", "", "", "",
+-	/* GPIO1_C0 - C7 */
+-	"", "", "", "", "", "", "header1-pin21 [GPIO1_C6]",
+-	"header1-pin19 [GPIO1_C7]",
+-	/* GPIO1_D0 - D8 */
+-	"header1-pin23 [GPIO1_D0]", "header1-pin24 [GPIO1_D1]", "", "", "",
+-	"", "", "";
+-};
+-
+-&gpio2 {
+-	gpio-line-names =
+-	/* GPIO2_A0 - A7 */
+-	"header1-pin10 [GPIO2_A0]", "header1-pin8 [GPIO2_A1]", "", "",
+-	"header1-pin7 [GPIO2_A4]", "header1-pin12 [GPIO2_A5]",
+-	"header2-pin46 [GPIO2_A6]", "header1-pin22 [GPIO1_A7]",
+-	/* GPIO2_B0 - B7 */
+-	"header2-pin45 [GPIO2_B0]", "header1-pin18 [GPIO2_B1]",
+-	"header1-pin16 [GPIO2_B2]", "header2-pin44 [GPIO2_B3]",
+-	"header2-pin43 [GPIO2_B4]", "header2-pin28 [GPIO2_B5]",
+-	"header2-pin30 [GPIO2_B6]", "header2-pin32 [GPIO2_B7]",
+-	/* GPIO2_C0 - C7 */
+-	"header2-pin34 [GPIO2_C0]", "", "", "", "", "", "", "",
+-	/* GPIO2_D0 - D8 */
+-	"", "", "", "", "", "", "", "";
+-};
+-
+-&gpio3 {
+-	gpio-line-names =
+-	/* GPIO3_A0 - A7 */
+-	"", "", "", "", "", "", "", "",
+-	/* GPIO3_B0 - B7 */
+-	"", "", "header2-pin42 [GPIO3_B2]", "header2-pin41 [GPIO3_B3]",
+-	"header2-pin40 [GPIO3_B4]", "header2-pin39 [GPIO3_B5]", "", "",
+-	/* GPIO3_C0 - C7 */
+-	"", "", "", "", "", "", "", "",
+-	/* GPIO3_D0 - D8 */
+-	"", "", "", "", "", "", "", "";
+-};

target/linux/rockchip/patches-6.6/005-03-v6.11-arm64-dts-rockchip-Add-sdmmc-related-properties-on-r.patch

@@ -0,0 +1,32 @@
+From fc0daeccc384233eadfa9d5ddbd00159653c6bdc Mon Sep 17 00:00:00 2001
+From: Jonas Karlman <jonas@kwiboo.se>
+Date: Tue, 21 May 2024 21:10:07 +0000
+Subject: [PATCH] arm64: dts: rockchip: Add sdmmc related properties on
+ rk3308-rock-pi-s
+
+Add cap-mmc-highspeed to allow use of high speed MMC mode using an eMMC
+to uSD board. Use disable-wp to signal that no physical write-protect
+line is present. Also add vcc_io used for card and IO line power as
+vmmc-supply.
+
+Fixes: 2e04c25b1320 ("arm64: dts: rockchip: add ROCK Pi S DTS support")
+Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
+Link: https://lore.kernel.org/r/20240521211029.1236094-5-jonas@kwiboo.se
+Signed-off-by: Heiko Stuebner <heiko@sntech.de>
+---
+ arch/arm64/boot/dts/rockchip/rk3308-rock-pi-s.dts | 3 +++
+ 1 file changed, 3 insertions(+)
+
+--- a/arch/arm64/boot/dts/rockchip/rk3308-rock-pi-s.dts
++++ b/arch/arm64/boot/dts/rockchip/rk3308-rock-pi-s.dts
+@@ -272,7 +272,10 @@
+ };
+ 
+ &sdmmc {
++	cap-mmc-highspeed;
+ 	cap-sd-highspeed;
++	disable-wp;
++	vmmc-supply = <&vcc_io>;
+ 	status = "okay";
+ };
+ 

target/linux/rockchip/patches-6.6/005-04-v6.11-arm64-dts-rockchip-Add-pinctrl-for-UART0-to-rk3308-r.patch

@@ -0,0 +1,31 @@
+From 7affb86ef62581e3475ce3e0a7640da1f2ee29f8 Mon Sep 17 00:00:00 2001
+From: Jonas Karlman <jonas@kwiboo.se>
+Date: Tue, 21 May 2024 21:10:08 +0000
+Subject: [PATCH] arm64: dts: rockchip: Add pinctrl for UART0 to
+ rk3308-rock-pi-s
+
+UAR0 CTS/RTS is not wired to any pin and is not used for the default
+serial console use of UART0 on ROCK Pi S.
+
+Override the SoC defined pinctrl props to limit configuration of the
+two xfer pins wired to one of the GPIO pin headers.
+
+Fixes: 2e04c25b1320 ("arm64: dts: rockchip: add ROCK Pi S DTS support")
+Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
+Link: https://lore.kernel.org/r/20240521211029.1236094-6-jonas@kwiboo.se
+Signed-off-by: Heiko Stuebner <heiko@sntech.de>
+---
+ arch/arm64/boot/dts/rockchip/rk3308-rock-pi-s.dts | 2 ++
+ 1 file changed, 2 insertions(+)
+
+--- a/arch/arm64/boot/dts/rockchip/rk3308-rock-pi-s.dts
++++ b/arch/arm64/boot/dts/rockchip/rk3308-rock-pi-s.dts
+@@ -294,6 +294,8 @@
+ };
+ 
+ &uart0 {
++	pinctrl-names = "default";
++	pinctrl-0 = <&uart0_xfer>;
+ 	status = "okay";
+ };
+ 

target/linux/rockchip/patches-6.6/005-05-v6.11-arm64-dts-rockchip-Add-mdio-and-ethernet-phy-nodes-t.patch

@@ -0,0 +1,61 @@
+From 4b64ed510ed946a4e4ca6d51d6512bf5361f6a04 Mon Sep 17 00:00:00 2001
+From: Jonas Karlman <jonas@kwiboo.se>
+Date: Tue, 21 May 2024 21:10:10 +0000
+Subject: [PATCH] arm64: dts: rockchip: Add mdio and ethernet-phy nodes to
+ rk3308-rock-pi-s
+
+Be explicit about the Ethernet port and define mdio and ethernet-phy
+nodes in the device tree for ROCK Pi S.
+
+Fixes: bc3753aed81f ("arm64: dts: rockchip: rock-pi-s add more peripherals")
+Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
+Link: https://lore.kernel.org/r/20240521211029.1236094-8-jonas@kwiboo.se
+Signed-off-by: Heiko Stuebner <heiko@sntech.de>
+---
+ .../boot/dts/rockchip/rk3308-rock-pi-s.dts    | 26 ++++++++++++++++---
+ 1 file changed, 23 insertions(+), 3 deletions(-)
+
+--- a/arch/arm64/boot/dts/rockchip/rk3308-rock-pi-s.dts
++++ b/arch/arm64/boot/dts/rockchip/rk3308-rock-pi-s.dts
+@@ -144,11 +144,25 @@
+ 
+ &gmac {
+ 	clock_in_out = "output";
++	phy-handle = <&rtl8201f>;
+ 	phy-supply = <&vcc_io>;
+-	snps,reset-gpio = <&gpio0 RK_PA7 GPIO_ACTIVE_LOW>;
+-	snps,reset-active-low;
+-	snps,reset-delays-us = <0 50000 50000>;
+ 	status = "okay";
++
++	mdio {
++		compatible = "snps,dwmac-mdio";
++		#address-cells = <1>;
++		#size-cells = <0>;
++
++		rtl8201f: ethernet-phy@1 {
++			compatible = "ethernet-phy-ieee802.3-c22";
++			reg = <1>;
++			pinctrl-names = "default";
++			pinctrl-0 = <&mac_rst>;
++			reset-assert-us = <20000>;
++			reset-deassert-us = <50000>;
++			reset-gpios = <&gpio0 RK_PA7 GPIO_ACTIVE_LOW>;
++		};
++	};
+ };
+ 
+ &gpio0 {
+@@ -221,6 +235,12 @@
+ 	pinctrl-names = "default";
+ 	pinctrl-0 = <&rtc_32k>;
+ 
++	gmac {
++		mac_rst: mac-rst {
++			rockchip,pins = <0 RK_PA7 RK_FUNC_GPIO &pcfg_pull_none>;
++		};
++	};
++
+ 	leds {
+ 		green_led: green-led {
+ 			rockchip,pins = <0 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>;

target/linux/rockchip/patches-6.6/100-rockchip-use-system-LED-for-OpenWrt.patch

@@ -13,6 +13,44 @@ Signed-off-by: David Bauer <mail@david-bauer.net>
  arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2s.dts | 9 ++++++++-
  1 file changed, 8 insertions(+), 1 deletion(-)
 
+--- a/arch/arm64/boot/dts/rockchip/rk3308-rock-pi-s.dts
++++ b/arch/arm64/boot/dts/rockchip/rk3308-rock-pi-s.dts
+@@ -17,6 +17,10 @@
+ 		ethernet0 = &gmac;
+ 		mmc0 = &emmc;
+ 		mmc1 = &sdmmc;
++		led-boot = &blue_led;
++		led-failsafe = &blue_led;
++		led-running = &blue_led;
++		led-upgrade = &blue_led;
+ 	};
+ 
+ 	chosen {
+@@ -28,22 +32,19 @@
+ 		pinctrl-names = "default";
+ 		pinctrl-0 = <&green_led>, <&heartbeat_led>;
+ 
+-		green-led {
++		led-0 {
+ 			color = <LED_COLOR_ID_GREEN>;
+ 			default-state = "on";
+ 			function = LED_FUNCTION_POWER;
+ 			gpios = <&gpio0 RK_PA6 GPIO_ACTIVE_HIGH>;
+-			label = "rockpis:green:power";
+ 			linux,default-trigger = "default-on";
+ 		};
+ 
+-		blue-led {
++		blue_led: led-1 {
+ 			color = <LED_COLOR_ID_BLUE>;
+ 			default-state = "on";
+ 			function = LED_FUNCTION_HEARTBEAT;
+ 			gpios = <&gpio0 RK_PA5 GPIO_ACTIVE_HIGH>;
+-			label = "rockpis:blue:user";
+-			linux,default-trigger = "heartbeat";
+ 		};
+ 	};
+ 
 --- a/arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2s.dts
 +++ b/arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2s.dts
 @@ -6,6 +6,7 @@