Merge Official Source

Signed-off-by: Tianling Shen <cnsztl@immortalwrt.org>
This commit is contained in:
Tianling Shen 2021-07-26 15:24:57 +08:00
commit e8c1b7c79e
No known key found for this signature in database
GPG Key ID: 6850B6345C862176
91 changed files with 1806 additions and 248 deletions

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@ -6,11 +6,11 @@ ifdef CONFIG_TESTING_KERNEL
KERNEL_PATCHVER:=$(KERNEL_TESTING_PATCHVER)
endif
LINUX_VERSION-5.4 = .132
LINUX_VERSION-5.10 = .51
LINUX_VERSION-5.4 = .134
LINUX_VERSION-5.10 = .52
LINUX_KERNEL_HASH-5.4.132 = 8466adbfb3579e751ede683496df7bb20f258b5f882250f3dd82be63736d00ef
LINUX_KERNEL_HASH-5.10.51 = 95bae893c274ccc3a8a6271f377bcc7fd3badcb7990ecd41b05b2731f1d67ae2
LINUX_KERNEL_HASH-5.4.134 = c9fb861642161c256e10c97c35ccce18831e688d87ead53c18e3226778e05841
LINUX_KERNEL_HASH-5.10.52 = 769e57a0fa218589fa2f8460b8682eb784a72718c7a3d95295f382a77902ae79
remove_uri_prefix=$(subst git://,,$(subst http://,,$(subst https://,,$(1))))
sanitize_uri=$(call qstrip,$(subst @,_,$(subst :,_,$(subst .,_,$(subst -,_,$(subst /,_,$(1)))))))

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@ -7,9 +7,9 @@
include $(TOPDIR)/rules.mk
PKG_VERSION:=2.4
PKG_RELEASE:=1
PKG_HASH:=bf3eb3617a74cddd7fb0e0eacbfe38c3258ee07d4c8ed730deef7a175cc3d55b
PKG_VERSION:=2.5
PKG_RELEASE:=$(AUTORELEASE)
PKG_HASH:=ad8a2ffcbcd12d919723da07630fc0840c3c2fba7656d1462e45488e42995d7c
PKG_MAINTAINER:=Vladimir Vid <vladimir.vid@sartura.hr>
@ -107,68 +107,104 @@ TFA_TARGETS:= \
udpu
TFA_MAKE_FLAGS += \
CROSS_CM3=$(STAGING_DIR_IMAGE)/$(LINARO_NAME)-$(LINARO_RELEASE).$(LINARO_VERSION)/bin/arm-linux-gnueabi- \
CROSS_CM3=$(STAGING_DIR_IMAGE)/$(CM3_GCC_NAME)-$(CM3_GCC_RELEASE)-$(CM3_GCC_VERSION)/bin/arm-none-eabi- \
BL33=$(STAGING_DIR_IMAGE)/$(UBOOT)-u-boot.bin \
MV_DDR_PATH=$(STAGING_DIR_IMAGE)/$(MV_DDR_NAME) \
WTP=$(STAGING_DIR_IMAGE)/$(A3700_UTILS_NAME) \
WTMI_IMG=$(STAGING_DIR_IMAGE)/$(MOX_BB_NAME)-$(MOX_BB_RELEASE)/wtmi_app.bin \
USE_COHERENT_MEM=0 \
FIP_ALIGN=0x100 \
DDR_TOPOLOGY=$(DDR_TOPOLOGY) \
CLOCKSPRESET=$(CLOCKSPRESET) \
A3700_UTILS_COMMIT_ID=$(A3700_UTILS_RELEASE) \
MV_DDR_COMMIT_ID=$(MV_DDR_RELEASE) \
all \
mrvl_flash
mrvl_flash \
mrvl_uart
A3700_UTILS_NAME:=a3700-utils
A3700_UTILS_RELEASE:=5598e150
A3700_UTILS_RELEASE:=2efdb10f
A3700_UTILS_SOURCE=$(A3700_UTILS_NAME)-$(A3700_UTILS_RELEASE).tar.bz2
define Download/a3700-utils
FILE:=$(A3700_UTILS_SOURCE)
PROTO:=git
URL:=https://github.com/MarvellEmbeddedProcessors/A3700-utils-marvell.git
VERSION:=5598e150fa3a1568256c30223fd2b214d729f26a
MIRROR_HASH:=4c3a3bed97833d08af4e42995c0c5af6c107f990fd492cd90aa3e79134d2751e
VERSION:=2efdb10f3524c534d276002adf81fec06e0f1cf2
MIRROR_HASH:=4476e1bacfa7abb4a1303c6cf3aa7d067038b24090dfd5da13ca2a72a0d5c7a4
SUBDIR:=$(A3700_UTILS_NAME)
endef
MV_DDR_NAME:=mv-ddr-marvell
MV_DDR_RELEASE:=6fb99002
MV_DDR_RELEASE:=02e23dbc
MV_DDR_SOURCE:=$(MV_DDR_NAME)-$(MV_DDR_RELEASE).tar.bz2
define Download/mv-ddr-marvell
FILE:=$(MV_DDR_SOURCE)
PROTO:=git
URL:=https://github.com/MarvellEmbeddedProcessors/mv-ddr-marvell.git
VERSION:=6fb99002be5dec9c7f5375b074f53148dbc0739c
MIRROR_HASH:=6836e5ea47618a7ee2f96a1a6bd8218f003789b877e521fdfcb008f2f6475dd6
VERSION:=02e23dbcf8dd22e038986052d99319a0eba8f25f
MIRROR_HASH:=d87dcc288b3895d1a1a78908fc607976d500b317ef81edfe667035579df0b440
SUBDIR:=$(MV_DDR_NAME)
endef
LINARO_NAME:=gcc-linaro
LINARO_RELEASE:=6
LINARO_VERSION:=5.0-2018.12-$(HOST_ARCH)_arm-linux-gnueabi
LINARO_SOURCE=$(LINARO_NAME)-$(LINARO_RELEASE).$(LINARO_VERSION).tar.xz
MOX_BB_NAME:=mox-boot-builder
MOX_BB_RELEASE:=v2021.04.09
MOX_BB_SOURCE:=$(MOX_BB_NAME)-$(MOX_BB_RELEASE).tar.bz2
define Download/gcc-linaro
FILE:=$(LINARO_SOURCE)
URL:=https://releases.linaro.org/components/toolchain/binaries/latest-$(LINARO_RELEASE)/arm-linux-gnueabi/
HASH:=2d4a92d6c8b384ae404b2e02c1c412e3ec18f9b714135acf046b2b1b510e9ace
define Download/mox-boot-builder
FILE:=$(MOX_BB_SOURCE)
URL:=https://gitlab.nic.cz/turris/mox-boot-builder/-/archive/$(MOX_BB_RELEASE)
HASH:=f0ed4fa25006e36a07d4256f633e3f25d6f8898dbe2e081e578251a182885520
endef
CM3_GCC_NAME:=gcc-arm
CM3_GCC_RELEASE:=10.2-2020.11
CM3_GCC_VERSION:=$(HOST_ARCH)-arm-none-eabi
CM3_GCC_SOURCE=$(CM3_GCC_NAME)-$(CM3_GCC_RELEASE)-$(CM3_GCC_VERSION).tar.xz
define Download/cm3-gcc
FILE:=$(CM3_GCC_SOURCE)
URL:=https://developer.arm.com/-/media/Files/downloads/gnu-a/$(CM3_GCC_RELEASE)/binrel
HASH:=bf7ee185936d22d787b80c8da573f72ead5675695331fb8b590f0133ef1f6bb9
endef
define Build/Clean
rm -rf \
$(STAGING_DIR_IMAGE)/$(A3700_UTILS_NAME) \
$(STAGING_DIR_IMAGE)/$(MV_DDR_NAME) \
$(STAGING_DIR_IMAGE)/$(MOX_BB_NAME)-$(MOX_BB_RELEASE) \
$(STAGING_DIR_IMAGE)/$(CM3_GCC_NAME)-$(CM3_GCC_RELEASE)-$(CM3_GCC_VERSION)
endef
define Build/Prepare
# Download sources
$(eval $(call Download,a3700-utils))
$(eval $(call Download,mv-ddr-marvell))
$(eval $(call Download,gcc-linaro))
$(eval $(call Download,mox-boot-builder))
$(eval $(call Download,cm3-gcc))
$(call Build/Prepare/Default,)
mkdir -p $(STAGING_DIR_IMAGE)
$(TAR) -C $(STAGING_DIR_IMAGE) -xf $(DL_DIR)/$(A3700_UTILS_SOURCE)
echo "master" > $(STAGING_DIR_IMAGE)/$(A3700_UTILS_NAME)/branch.txt
$(call PatchDir/Default,$(STAGING_DIR_IMAGE)/$(A3700_UTILS_NAME),./patches-a3700-utils)
$(TAR) -C $(STAGING_DIR_IMAGE) -xf $(DL_DIR)/$(MV_DDR_SOURCE)
echo "master" > $(STAGING_DIR_IMAGE)/$(MV_DDR_NAME)/branch.txt
$(call PatchDir/Default,$(STAGING_DIR_IMAGE)/$(MV_DDR_NAME),./patches-mv-ddr-marvell)
$(TAR) -C $(STAGING_DIR_IMAGE) -xf $(DL_DIR)/$(LINARO_SOURCE)
$(TAR) -C $(STAGING_DIR_IMAGE) -xf $(DL_DIR)/$(MOX_BB_SOURCE)
$(call PatchDir/Default,$(STAGING_DIR_IMAGE)/$(MOX_BB_NAME)-$(MOX_BB_RELEASE),./patches-mox-boot-builder)
$(TAR) -C $(STAGING_DIR_IMAGE) -xf $(DL_DIR)/$(CM3_GCC_SOURCE)
endef
define Build/Compile
+$(MAKE) \
CROSS_CM3=$(STAGING_DIR_IMAGE)/$(CM3_GCC_NAME)-$(CM3_GCC_RELEASE)-$(CM3_GCC_VERSION)/bin/arm-none-eabi- \
WTMI_VERSION=$(MOX_BB_RELEASE) \
-C $(STAGING_DIR_IMAGE)/$(MOX_BB_NAME)-$(MOX_BB_RELEASE) \
wtmi_app.bin
$(call Build/Compile/Default)
endef
$(eval $(call BuildPackage/Trusted-Firmware-A))

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@ -1,13 +1,14 @@
diff --git a/wtmi/sys_init/Makefile b/wtmi/sys_init/Makefile
--- a/wtmi/sys_init/Makefile
+++ b/wtmi/sys_init/Makefile
@@ -51,7 +51,8 @@ ECHO = @echo
@@ -51,8 +51,8 @@ ECHO = @echo
SED = @sed
LOCAL_VERSION_STRING ?= -armada
-BUILD_STRING := $(shell git log -n 1 --pretty=format:"%h")
+A3700_UTILS_COMMIT_ID ?= $(shell git log -n 1 --pretty=format:"%h")
+BUILD_STRING := $(A3700_UTILS_COMMIT_ID)
VERSION_STRING := $(LOCAL_VERSION_STRING)-$(BUILD_STRING)
-BUILD_STRING := $(shell git log -n 1 --pretty=format:"%h" && (git diff-index --quiet HEAD || echo -dirty))
-VERSION_STRING := $(LOCAL_VERSION_STRING)-$(BUILD_STRING)
+A3700_UTILS_COMMIT_ID ?= $(shell git log -n 1 --pretty=format:"%h" && (git diff-index --quiet HEAD || echo -dirty))
+VERSION_STRING := $(LOCAL_VERSION_STRING)-$(A3700_UTILS_COMMIT_ID)
CPUOPTS = -mthumb -mcpu=cortex-m3 -mlittle-endian
BINPATH = build

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@ -0,0 +1,12 @@
diff --git a/wtmi/Makefile b/wtmi/Makefile
index 75754dc..3602ec3 100644
--- a/wtmi/Makefile
+++ b/wtmi/Makefile
@@ -41,7 +41,6 @@ else
LTO_FLAGS =
endif
-override WTMI_VERSION = $(shell git describe --always --dirty --tags)
ifndef WTMI_VERSION
$(error Repository is without git tags, please do a full git clone again)
endif

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@ -0,0 +1,13 @@
diff --git a/wtmi/Makefile b/wtmi/Makefile
index 75754dc..0c6238f 100644
--- a/wtmi/Makefile
+++ b/wtmi/Makefile
@@ -36,7 +36,7 @@ LDSCRIPT = wtmi.ld
INCLUDE = -I.
ifeq ($(LTO), 1)
- LTO_FLAGS = -flto -flto-partition=none -Wl,-fuse-ld=gold
+ LTO_FLAGS = -flto -flto-partition=none
else
LTO_FLAGS =
endif

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@ -0,0 +1,66 @@
From fb5e436843614f93b30aec0a2a00e5e59a133aab Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Marek=20Beh=C3=BAn?= <marek.behun@nic.cz>
Date: Sat, 15 May 2021 17:44:24 +0200
Subject: [PATCH] wtmi: uart: fix UART baudrate divisor calculation
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
The UART code uses the xtal clock as parent for UART baudrate
generation, but it assumes that xtal runs at 25 MHz, which isn't
necessarily the case for all A3720 boards.
Use get_ref_clk() to determine xtal clock rate.
Use rounding division to compute the divisor value.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Suggested-by: Pali Rohár <pali@kernel.org>
---
wtmi/types.h | 5 +++++
wtmi/uart.c | 7 ++++---
2 files changed, 9 insertions(+), 3 deletions(-)
diff --git a/wtmi/types.h b/wtmi/types.h
index 7a6c6c6..ea873fc 100644
--- a/wtmi/types.h
+++ b/wtmi/types.h
@@ -47,4 +47,9 @@ typedef u32 size_t;
#define maybe_unused __attribute__((unused))
+static inline u32 div_round_closest_u32(u32 x, u32 d)
+{
+ return (x + d / 2) / d;
+}
+
#endif /* __TYPES_H */
diff --git a/wtmi/uart.c b/wtmi/uart.c
index d40633d..75864b5 100644
--- a/wtmi/uart.c
+++ b/wtmi/uart.c
@@ -40,8 +40,6 @@
#include "stdio.h"
#include "debug.h"
-#define UART_CLOCK_FREQ 25804800
-
const struct uart_info uart1_info = {
.rx = 0xc0012000,
.tx = 0xc0012004,
@@ -76,8 +74,11 @@ void uart_set_stdio(const struct uart_info *info)
void uart_reset(const struct uart_info *info, unsigned int baudrate)
{
+ u32 parent_rate = get_ref_clk() * 1000000;
+
/* set baudrate */
- writel((UART_CLOCK_FREQ / baudrate / 16), info->baud);
+ writel(div_round_closest_u32(parent_rate, baudrate * 16), info->baud);
+
/* set Programmable Oversampling Stack to 0, UART defaults to 16X scheme */
writel(0, info->possr);
--
2.30.2

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@ -0,0 +1,48 @@
From 3f33626ac7037bd62df9391e899f50e076e58cf7 Mon Sep 17 00:00:00 2001
From: zachary <zhangzg@marvell.com>
Date: Wed, 25 Oct 2017 15:50:29 +0800
Subject: [PATCH] fix: clock: a3700: change pwm clock for 600/600 and 1200/750
preset
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
This patch is to change pwm clock from 100MHz to 50MHz for 600/600 and
1200/750 preset to align with other presets.
Change-Id: I067e189043be8c776bd3e7015a06f8ddf2590b96
Signed-off-by: zachary <zhangzg@marvell.com>
Reviewed-on: http://vgitil04.il.marvell.com:8080/45513
Tested-by: iSoC Platform CI <ykjenk@marvell.com>
Reviewed-by: Kostya Porotchkin <kostap@marvell.com>
Reviewed-by: Hua Jing <jinghua@marvell.com>
Signed-off-by: Marek Behún <marek.behun@nic.cz>
---
wtmi/clock.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/wtmi/clock.c b/wtmi/clock.c
index 97c2825..1a1f0c6 100644
--- a/wtmi/clock.c
+++ b/wtmi/clock.c
@@ -447,7 +447,7 @@ static struct clock_cfg clk_cfg_all[] = {\
/* NorthBridge */\
{{TBG_A_S, TBG_B_S, TBG_B_S, TBG_B_S, TBG_A_P, TBG_A_P, TBG_A_P,\
TBG_B_S, TBG_B_S, TBG_A_P, TBG_B_S, TBG_A_P, TBG_B_S},\
- {2, 5, 2, 4, 1, 2, 6, 2}, /* DIV0 */\
+ {4, 5, 2, 4, 1, 2, 6, 2}, /* DIV0 */\
{1, 5, 2, 5, 2, 3, 2, 2, 3}, /* DIV1 */\
{4, 1, 5, 1, 3, 1, 2, 0, 0, 1} }, /* DIV2 */\
/* SouthBridge */\
@@ -495,7 +495,7 @@ static struct clock_cfg clk_cfg_all[] = {\
/* NorthBridge */\
{{TBG_B_S, TBG_B_S, TBG_B_S, TBG_B_S, TBG_B_S, TBG_B_S, TBG_B_S,\
TBG_B_S, TBG_A_S, TBG_B_S, TBG_A_P, TBG_B_S, TBG_A_S},\
- {3, 4, 3, 4, 1, 1, 5, 1}, /* DIV0 */\
+ {6, 4, 3, 4, 1, 1, 5, 1}, /* DIV0 */\
{1, 6, 3, 4, 1, 6, 1, 1, 6}, /* DIV1 */\
{4, 1, 6, 1, 3, 1, 3, 0, 0, 1} }, /* DIV2 */\
/* SouthBridge */\
--
2.30.2

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@ -0,0 +1,52 @@
From 15ff10623c83ee2e626d93d16e022b115dcb608f Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Pali=20Roh=C3=A1r?= <pali@kernel.org>
Date: Sat, 10 Apr 2021 16:56:12 +0200
Subject: [PATCH] avs: Validate VDD value from OTP
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
CPU VDD voltage value for 1.2 GHz frequency on some Espressobin boards is
not set and raw value 0x00 is returned. In this case init_avs() function
calculated CPU VDD voltage value to 0x00 + AVS_VDD_BASE = 0.898 V, which is
too low for any operation and Espressobin board immediately crashed
init_avs() function set this low value.
This patch fixes above issue by validating returned VDD value from OTP and
using default VDD value when invalid value is in OTP. With this patch
init_avs() function does cause CPU crash anymore.
Signed-off-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Marek Behún <marek.behun@nic.cz>
---
wtmi/avs.c | 14 ++++++++++----
1 file changed, 10 insertions(+), 4 deletions(-)
diff --git a/wtmi/avs.c b/wtmi/avs.c
index 36ca9fa..4624359 100644
--- a/wtmi/avs.c
+++ b/wtmi/avs.c
@@ -140,10 +140,16 @@ int init_avs(u32 speed)
}
if (svc_rev >= SVC_REVISION_2) {
- vdd_otp = ((otp_data[OTP_DATA_SVC_SPEED_ID] >> shift) +
- AVS_VDD_BASE) & AVS_VDD_MASK;
- regval |= (vdd_otp << HIGH_VDD_LIMIT_OFF);
- regval |= (vdd_otp << LOW_VDD_LIMIT_OFF);
+ vdd_otp = (otp_data[OTP_DATA_SVC_SPEED_ID] >> shift) &
+ AVS_VDD_MASK;
+ if (!vdd_otp || vdd_otp + AVS_VDD_BASE > AVS_VDD_MASK) {
+ regval |= (vdd_default << HIGH_VDD_LIMIT_OFF);
+ regval |= (vdd_default << LOW_VDD_LIMIT_OFF);
+ } else {
+ vdd_otp += AVS_VDD_BASE;
+ regval |= (vdd_otp << HIGH_VDD_LIMIT_OFF);
+ regval |= (vdd_otp << LOW_VDD_LIMIT_OFF);
+ }
} else {
regval |= (vdd_default << HIGH_VDD_LIMIT_OFF);
regval |= (vdd_default << LOW_VDD_LIMIT_OFF);
--
2.30.2

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@ -0,0 +1,20 @@
--- a/plat/marvell/armada/a3k/common/a3700_common.mk
+++ b/plat/marvell/armada/a3k/common/a3700_common.mk
@@ -76,7 +76,7 @@ $(if $(wildcard $(value WTP)/*),,$(error
$(if $(shell test -s "$(value WTP)/branch.txt" || git -C $(value WTP) rev-parse --show-cdup 2>&1),$(error "'WTP=$(value WTP)' was specified, but '$(value WTP)' does not contain valid Marvell a3700_utils release tarball nor git repository"))
DOIMAGEPATH := $(WTP)
-DOIMAGETOOL := $(DOIMAGEPATH)/wtptp/src/TBB_Linux/release/TBB_linux
+DOIMAGETOOL := $(DOIMAGEPATH)/wtptp/linux/tbb_linux
BUILD_UART := uart-images
UART_IMAGE := $(BUILD_UART).tgz.bin
@@ -132,7 +132,7 @@ TIMBLDUARTARGS := $(MARVELL_SECURE_BOOT
CRYPTOPP_LIBDIR ?= $(CRYPTOPP_PATH)
CRYPTOPP_INCDIR ?= $(CRYPTOPP_PATH)
-$(DOIMAGETOOL): FORCE
+$(DOIMAGETOOL):
$(if $(CRYPTOPP_LIBDIR),,$(error "Platform '$(PLAT)' for WTP image tool requires CRYPTOPP_PATH or CRYPTOPP_LIBDIR. Please set CRYPTOPP_PATH or CRYPTOPP_LIBDIR to point to the right directory"))
$(if $(CRYPTOPP_INCDIR),,$(error "Platform '$(PLAT)' for WTP image tool requires CRYPTOPP_PATH or CRYPTOPP_INCDIR. Please set CRYPTOPP_PATH or CRYPTOPP_INCDIR to point to the right directory"))
$(if $(wildcard $(CRYPTOPP_LIBDIR)/*),,$(error "Either 'CRYPTOPP_PATH' or 'CRYPTOPP_LIB' was set to '$(CRYPTOPP_LIBDIR)', but '$(CRYPTOPP_LIBDIR)' does not exist"))

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@ -0,0 +1,60 @@
From 66a7752834382595d26214783ae4698fd1f00bd6 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Pali=20Roh=C3=A1r?= <pali@kernel.org>
Date: Thu, 13 May 2021 14:53:44 +0200
Subject: [PATCH] fix(plat/marvell/a3720/uart): fix UART clock rate value and
divisor calculation
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
UART parent clock is by default the platform's xtal clock, which is
25 MHz.
The value defined in the driver, though, is 25.8048 MHz. This is a hack
for the suboptimal divisor calculation
Divisor = UART clock / (16 * baudrate)
which does not use rounding division, resulting in a suboptimal value
for divisor if the correct parent clock rate was used.
Change the code for divisor calculation to
Divisor = Round(UART clock / (16 * baudrate))
and change the parent clock rate value to 25 MHz.
The final UART divisor for default baudrate 115200 is not affected by
this change.
(Note that the parent clock rate should not be defined via a macro,
since the xtal clock can also be 40 MHz. This is outside of the scope of
this fix, though.)
Signed-off-by: Pali Rohár <pali@kernel.org>
Change-Id: Iaa401173df87aec94f2dd1b38a90fb6ed0bf0ec6
---
drivers/marvell/uart/a3700_console.S | 3 ++-
plat/marvell/armada/a3k/common/include/platform_def.h | 2 +-
2 files changed, 3 insertions(+), 2 deletions(-)
--- a/drivers/marvell/uart/a3700_console.S
+++ b/drivers/marvell/uart/a3700_console.S
@@ -45,8 +45,9 @@ func console_a3700_core_init
cbz w2, init_fail
/* Program the baudrate */
- /* Divisor = Uart clock / (16 * baudrate) */
+ /* Divisor = Round(Uartclock / (16 * baudrate)) */
lsl w2, w2, #4
+ add w1, w1, w2, lsr #1
udiv w2, w1, w2
and w2, w2, #0x3ff
--- a/plat/marvell/armada/a3k/common/include/platform_def.h
+++ b/plat/marvell/armada/a3k/common/include/platform_def.h
@@ -164,7 +164,7 @@
* PL011 related constants
*/
#define PLAT_MARVELL_BOOT_UART_BASE (MVEBU_REGS_BASE + 0x12000)
-#define PLAT_MARVELL_BOOT_UART_CLK_IN_HZ 25804800
+#define PLAT_MARVELL_BOOT_UART_CLK_IN_HZ 25000000
#define PLAT_MARVELL_CRASH_UART_BASE PLAT_MARVELL_BOOT_UART_BASE
#define PLAT_MARVELL_CRASH_UART_CLK_IN_HZ PLAT_MARVELL_BOOT_UART_CLK_IN_HZ

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@ -0,0 +1,53 @@
From b9185c75f7ec2b600ebe0d49281e216a2456b764 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Pali=20Roh=C3=A1r?= <pali@kernel.org>
Date: Thu, 13 May 2021 15:11:06 +0200
Subject: [PATCH] fix(plat/marvell/a3720/uart): fix configuring UART clock
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
When configuring the UART_BAUD_REG register, the function
console_a3700_core_init() currently only changes the baud divisor field,
leaving other fields to their previous value.
This is incorrect, because the baud divisor is computed with the
assumption that the parent clock rate is 25 MHz, and since the other
fields in this register configure the parent clock, which could have
been changed by U-Boot or Linux.
Fix this function to also configure the other fields so that the UART
parent clock is selected to be the xtal clock.
For example without this change TF-A prints only
ERROR: a3700_system_off needs to be implemented
followed by garbage after plat_crash_console_init() is called.
After applying this change instead of garbage it also print crash info:
PANIC at PC : 0x0000000004023800
Signed-off-by: Pali Rohár <pali@kernel.org>
Change-Id: I72f338355cc60d939b8bb978d9c7fdd576416b81
---
drivers/marvell/uart/a3700_console.S | 7 ++-----
1 file changed, 2 insertions(+), 5 deletions(-)
--- a/drivers/marvell/uart/a3700_console.S
+++ b/drivers/marvell/uart/a3700_console.S
@@ -49,12 +49,9 @@ func console_a3700_core_init
lsl w2, w2, #4
add w1, w1, w2, lsr #1
udiv w2, w1, w2
- and w2, w2, #0x3ff
+ and w2, w2, #0x3ff /* clear all other bits to use default clock */
- ldr w3, [x0, #UART_BAUD_REG]
- bic w3, w3, 0x3ff
- orr w3, w3, w2
- str w3, [x0, #UART_BAUD_REG]/* set baud rate divisor */
+ str w2, [x0, #UART_BAUD_REG]/* set baud rate divisor */
/* Set UART to default 16X scheme */
mov w3, #0

View File

@ -0,0 +1,122 @@
From 3133625859b74df42deddd80b705578af6fc2fea Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Pali=20Roh=C3=A1r?= <pali@kernel.org>
Date: Fri, 14 May 2021 13:21:56 +0200
Subject: [PATCH] refactor(plat/marvell/uart): de-duplicate PLAT_MARVELL_UART
macros
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
Macros PLAT_MARVELL_BOOT_UART* and PLAT_MARVELL_CRASH_UART* are defined
to same values. De-duplicate them into PLAT_MARVELL_UART* macros.
Signed-off-by: Pali Rohár <pali@kernel.org>
Change-Id: Iae5daf7cad6a971e6f3dbe561df3d0174106ca7f
---
plat/marvell/armada/a3k/common/include/platform_def.h | 7 ++-----
plat/marvell/armada/a8k/a80x0_puzzle/board/system_power.c | 4 ++--
plat/marvell/armada/a8k/common/include/platform_def.h | 7 ++-----
plat/marvell/armada/common/aarch64/marvell_helpers.S | 8 ++++----
plat/marvell/armada/common/marvell_console.c | 8 ++++----
5 files changed, 14 insertions(+), 20 deletions(-)
--- a/plat/marvell/armada/a3k/common/include/platform_def.h
+++ b/plat/marvell/armada/a3k/common/include/platform_def.h
@@ -163,11 +163,8 @@
/*
* PL011 related constants
*/
-#define PLAT_MARVELL_BOOT_UART_BASE (MVEBU_REGS_BASE + 0x12000)
-#define PLAT_MARVELL_BOOT_UART_CLK_IN_HZ 25000000
-
-#define PLAT_MARVELL_CRASH_UART_BASE PLAT_MARVELL_BOOT_UART_BASE
-#define PLAT_MARVELL_CRASH_UART_CLK_IN_HZ PLAT_MARVELL_BOOT_UART_CLK_IN_HZ
+#define PLAT_MARVELL_UART_BASE (MVEBU_REGS_BASE + 0x12000)
+#define PLAT_MARVELL_UART_CLK_IN_HZ 25000000
#define PLAT_MARVELL_BL31_RUN_UART_BASE PLAT_MARVELL_BOOT_UART_BASE
#define PLAT_MARVELL_BL31_RUN_UART_CLK_IN_HZ PLAT_MARVELL_BOOT_UART_CLK_IN_HZ
--- a/plat/marvell/armada/a8k/a80x0_puzzle/board/system_power.c
+++ b/plat/marvell/armada/a8k/a80x0_puzzle/board/system_power.c
@@ -41,8 +41,8 @@ int system_power_off(void)
len = sizeof(system_off_now);
system_off_now[len - 1] = add_xor_checksum(system_off_now, len);
- console_16550_register(PLAT_MARVELL_BOOT_UART_BASE + 0x100,
- PLAT_MARVELL_BOOT_UART_CLK_IN_HZ, 115200, &console);
+ console_16550_register(PLAT_MARVELL_UART_BASE + 0x100,
+ PLAT_MARVELL_UART_CLK_IN_HZ, 115200, &console);
/* Send system_off_now to console */
for (i = 0; i < len; i++) {
--- a/plat/marvell/armada/a8k/common/include/platform_def.h
+++ b/plat/marvell/armada/a8k/common/include/platform_def.h
@@ -168,11 +168,8 @@
/*
* PL011 related constants
*/
-#define PLAT_MARVELL_BOOT_UART_BASE (MVEBU_REGS_BASE + 0x512000)
-#define PLAT_MARVELL_BOOT_UART_CLK_IN_HZ 200000000
-
-#define PLAT_MARVELL_CRASH_UART_BASE PLAT_MARVELL_BOOT_UART_BASE
-#define PLAT_MARVELL_CRASH_UART_CLK_IN_HZ PLAT_MARVELL_BOOT_UART_CLK_IN_HZ
+#define PLAT_MARVELL_UART_BASE (MVEBU_REGS_BASE + 0x512000)
+#define PLAT_MARVELL_UART_CLK_IN_HZ 200000000
#define PLAT_MARVELL_BL31_RUN_UART_BASE PLAT_MARVELL_BOOT_UART_BASE
#define PLAT_MARVELL_BL31_RUN_UART_CLK_IN_HZ PLAT_MARVELL_BOOT_UART_CLK_IN_HZ
--- a/plat/marvell/armada/common/aarch64/marvell_helpers.S
+++ b/plat/marvell/armada/common/aarch64/marvell_helpers.S
@@ -63,8 +63,8 @@ endfunc plat_marvell_calc_core_pos
* ---------------------------------------------
*/
func plat_crash_console_init
- mov_imm x0, PLAT_MARVELL_CRASH_UART_BASE
- mov_imm x1, PLAT_MARVELL_CRASH_UART_CLK_IN_HZ
+ mov_imm x0, PLAT_MARVELL_UART_BASE
+ mov_imm x1, PLAT_MARVELL_UART_CLK_IN_HZ
mov_imm x2, MARVELL_CONSOLE_BAUDRATE
#ifdef PLAT_a3700
b console_a3700_core_init
@@ -81,7 +81,7 @@ endfunc plat_crash_console_init
* ---------------------------------------------
*/
func plat_crash_console_putc
- mov_imm x1, PLAT_MARVELL_CRASH_UART_BASE
+ mov_imm x1, PLAT_MARVELL_UART_BASE
#ifdef PLAT_a3700
b console_a3700_core_putc
@@ -99,7 +99,7 @@ endfunc plat_crash_console_putc
* ---------------------------------------------
*/
func plat_crash_console_flush
- mov_imm x0, PLAT_MARVELL_CRASH_UART_BASE
+ mov_imm x0, PLAT_MARVELL_UART_BASE
#ifdef PLAT_a3700
b console_a3700_core_flush
#else
--- a/plat/marvell/armada/common/marvell_console.c
+++ b/plat/marvell/armada/common/marvell_console.c
@@ -31,8 +31,8 @@ static console_t marvell_runtime_console
void marvell_console_boot_init(void)
{
int rc =
- console_marvell_register(PLAT_MARVELL_BOOT_UART_BASE,
- PLAT_MARVELL_BOOT_UART_CLK_IN_HZ,
+ console_marvell_register(PLAT_MARVELL_UART_BASE,
+ PLAT_MARVELL_UART_CLK_IN_HZ,
MARVELL_CONSOLE_BAUDRATE,
&marvell_boot_console);
if (rc == 0) {
@@ -58,8 +58,8 @@ void marvell_console_boot_end(void)
void marvell_console_runtime_init(void)
{
int rc =
- console_marvell_register(PLAT_MARVELL_BOOT_UART_BASE,
- PLAT_MARVELL_BOOT_UART_CLK_IN_HZ,
+ console_marvell_register(PLAT_MARVELL_UART_BASE,
+ PLAT_MARVELL_UART_CLK_IN_HZ,
MARVELL_CONSOLE_BAUDRATE,
&marvell_runtime_console);
if (rc == 0)

View File

@ -0,0 +1,177 @@
From 5a91c439cbeb1f64b8b9830de91efad5113d3c89 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Pali=20Roh=C3=A1r?= <pali@kernel.org>
Date: Fri, 14 May 2021 15:52:11 +0200
Subject: [PATCH] fix(plat/marvell/a3720/uart): fix UART parent clock rate
determination
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
The UART code for the A3K platform assumes that UART parent clock rate
is always 25 MHz. This is incorrect, because the xtal clock can also run
at 40 MHz (this is board specific).
The frequency of the xtal clock is determined by a value on a strapping
pin during SOC reset. The code to determine this frequency is already in
A3K's comphy driver.
Move the get_ref_clk() function from the comphy driver to a separate
file and use it for UART parent clock rate determination.
Signed-off-by: Pali Rohár <pali@kernel.org>
Change-Id: I8bb18a2d020ef18fe65aa06ffa4ab205c71be92e
---
drivers/marvell/comphy/phy-comphy-3700.c | 24 +------------
.../marvell/armada/a3k/common/plat_marvell.h | 2 ++
.../marvell/armada/a3k/common/a3700_common.mk | 1 +
.../armada/a3k/common/aarch64/a3700_clock.S | 35 +++++++++++++++++++
.../armada/a3k/common/include/platform_def.h | 1 -
.../armada/common/aarch64/marvell_helpers.S | 10 +++++-
plat/marvell/armada/common/marvell_console.c | 1 +
7 files changed, 49 insertions(+), 25 deletions(-)
create mode 100644 plat/marvell/armada/a3k/common/aarch64/a3700_clock.S
--- a/drivers/marvell/comphy/phy-comphy-3700.c
+++ b/drivers/marvell/comphy/phy-comphy-3700.c
@@ -14,6 +14,7 @@
#include <mvebu.h>
#include <mvebu_def.h>
+#include <plat_marvell.h>
#include "phy-comphy-3700.h"
#include "phy-comphy-common.h"
@@ -29,15 +30,6 @@
#define USB3_GBE1_PHY (MVEBU_REGS_BASE + 0x5C000)
#define COMPHY_SD_ADDR (MVEBU_REGS_BASE + 0x1F000)
-/*
- * Below address in used only for reading, therefore no problem with concurrent
- * Linux access.
- */
-#define MVEBU_TEST_PIN_LATCH_N (MVEBU_NB_GPIO_REG_BASE + 0x8)
- #define MVEBU_XTAL_MODE_MASK BIT(9)
- #define MVEBU_XTAL_MODE_OFFS 9
- #define MVEBU_XTAL_CLOCK_25MHZ 0x0
-
struct sgmii_phy_init_data_fix {
uint16_t addr;
uint16_t value;
@@ -125,20 +117,6 @@ static uint16_t sgmii_phy_init[512] = {
0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000 /*1F8 */
};
-/* returns reference clock in MHz (25 or 40) */
-static uint32_t get_ref_clk(void)
-{
- uint32_t val;
-
- val = (mmio_read_32(MVEBU_TEST_PIN_LATCH_N) & MVEBU_XTAL_MODE_MASK) >>
- MVEBU_XTAL_MODE_OFFS;
-
- if (val == MVEBU_XTAL_CLOCK_25MHZ)
- return 25;
- else
- return 40;
-}
-
/* PHY selector configures with corresponding modes */
static void mvebu_a3700_comphy_set_phy_selector(uint8_t comphy_index,
uint32_t comphy_mode)
--- a/include/plat/marvell/armada/a3k/common/plat_marvell.h
+++ b/include/plat/marvell/armada/a3k/common/plat_marvell.h
@@ -100,4 +100,6 @@ void plat_marvell_interconnect_enter_coh
const mmap_region_t *plat_marvell_get_mmap(void);
+uint32_t get_ref_clk(void);
+
#endif /* PLAT_MARVELL_H */
--- a/plat/marvell/armada/a3k/common/a3700_common.mk
+++ b/plat/marvell/armada/a3k/common/a3700_common.mk
@@ -38,6 +38,7 @@ PLAT_INCLUDES := -I$(PLAT_FAMILY_BASE)/
-I$/drivers/arm/gic/common/
PLAT_BL_COMMON_SOURCES := $(PLAT_COMMON_BASE)/aarch64/a3700_common.c \
+ $(PLAT_COMMON_BASE)/aarch64/a3700_clock.S \
$(MARVELL_DRV_BASE)/uart/a3700_console.S
BL1_SOURCES += $(PLAT_COMMON_BASE)/aarch64/plat_helpers.S \
--- /dev/null
+++ b/plat/marvell/armada/a3k/common/aarch64/a3700_clock.S
@@ -0,0 +1,35 @@
+/*
+ * Copyright (C) 2018 Marvell International Ltd.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ * https://spdx.org/licenses
+ */
+
+#include <asm_macros.S>
+#include <platform_def.h>
+
+/*
+ * Below address in used only for reading, therefore no problem with concurrent
+ * Linux access.
+ */
+#define MVEBU_TEST_PIN_LATCH_N (MVEBU_NB_GPIO_REG_BASE + 0x8)
+ #define MVEBU_XTAL_MODE_MASK BIT(9)
+
+ /* -----------------------------------------------------
+ * uint32_t get_ref_clk (void);
+ *
+ * returns reference clock in MHz (25 or 40)
+ * -----------------------------------------------------
+ */
+.globl get_ref_clk
+func get_ref_clk
+ mov_imm x0, MVEBU_TEST_PIN_LATCH_N
+ ldr w0, [x0]
+ tst w0, #MVEBU_XTAL_MODE_MASK
+ bne 40
+ mov w0, #25
+ ret
+40:
+ mov w0, #40
+ ret
+endfunc get_ref_clk
--- a/plat/marvell/armada/a3k/common/include/platform_def.h
+++ b/plat/marvell/armada/a3k/common/include/platform_def.h
@@ -164,7 +164,6 @@
* PL011 related constants
*/
#define PLAT_MARVELL_UART_BASE (MVEBU_REGS_BASE + 0x12000)
-#define PLAT_MARVELL_UART_CLK_IN_HZ 25000000
#define PLAT_MARVELL_BL31_RUN_UART_BASE PLAT_MARVELL_BOOT_UART_BASE
#define PLAT_MARVELL_BL31_RUN_UART_CLK_IN_HZ PLAT_MARVELL_BOOT_UART_CLK_IN_HZ
--- a/plat/marvell/armada/common/aarch64/marvell_helpers.S
+++ b/plat/marvell/armada/common/aarch64/marvell_helpers.S
@@ -63,8 +63,16 @@ endfunc plat_marvell_calc_core_pos
* ---------------------------------------------
*/
func plat_crash_console_init
- mov_imm x0, PLAT_MARVELL_UART_BASE
+#ifdef PLAT_a3700
+ mov x1, x30
+ bl get_ref_clk
+ mov x30, x1
+ mov_imm x1, 1000000
+ mul x1, x0, x1
+#else
mov_imm x1, PLAT_MARVELL_UART_CLK_IN_HZ
+#endif
+ mov_imm x0, PLAT_MARVELL_UART_BASE
mov_imm x2, MARVELL_CONSOLE_BAUDRATE
#ifdef PLAT_a3700
b console_a3700_core_init
--- a/plat/marvell/armada/common/marvell_console.c
+++ b/plat/marvell/armada/common/marvell_console.c
@@ -14,6 +14,7 @@
#ifdef PLAT_a3700
#include <drivers/marvell/uart/a3700_console.h>
+#define PLAT_MARVELL_UART_CLK_IN_HZ (get_ref_clk() * 1000000)
#define console_marvell_register console_a3700_register
#else
#include <drivers/ti/uart/uart_16550.h>

View File

@ -17,7 +17,10 @@ buffalo,ls421de)
ubootenv_add_uci_config "/dev/mtd3" "0x0" "0x10000"
;;
cznic,turris-omnia)
if grep -q 'U-Boot 2015.10-rc2' /dev/mtd0; then
idx="$(find_mtd_index u-boot-env)"
if [ -n "$idx" ]; then
ubootenv_add_uci_config "/dev/mtd${idx}" "0x0" "0x10000" "0x10000"
elif grep -q 'U-Boot 2015.10-rc2' /dev/mtd0; then
ubootenv_add_uci_config "/dev/mtd0" "0xc0000" "0x10000" "0x40000"
else
ubootenv_add_uci_config "/dev/mtd0" "0xf0000" "0x10000" "0x10000"

View File

@ -8,10 +8,10 @@
include $(TOPDIR)/rules.mk
include $(INCLUDE_DIR)/kernel.mk
PKG_VERSION:=2021.01
PKG_RELEASE:=1
PKG_VERSION:=2021.07
PKG_RELEASE:=$(AUTORELEASE)
PKG_HASH:=b407e1510a74e863b8b5cb42a24625344f0e0c2fc7582d8c866bd899367d0454
PKG_HASH:=312b7eeae44581d1362c3a3f02c28d806647756c82ba8c72241c7cdbe68ba77e
include $(INCLUDE_DIR)/u-boot.mk
include $(INCLUDE_DIR)/package.mk

View File

@ -3,7 +3,7 @@ needed dependencies are added too.
--- a/tools/Makefile
+++ b/tools/Makefile
@@ -158,7 +158,7 @@ ifneq ($(CONFIG_MX23)$(CONFIG_MX28)$(CON
@@ -168,7 +168,7 @@ ifneq ($(CONFIG_MX23)$(CONFIG_MX28)$(CON
HOSTCFLAGS_kwbimage.o += \
$(shell pkg-config --cflags libssl libcrypto 2> /dev/null || echo "")
HOSTLDLIBS_mkimage += \

View File

@ -9,6 +9,22 @@ define Download/qca99x0-board
endef
$(eval $(call Download,qca99x0-board))
define Download/qca99x0-board-5g
URL:=https://github.com/kvalo/ath10k-firmware/raw/master/QCA99X0/hw2.0/
URL_FILE:=boardData_AR900B_CUS239_5G_v2_001.bin
FILE:=boardData_AR900B_CUS239_5G_v2_001.bin
HASH:=3bf7561ee373b369025dcd366d276d038a97d3397ccae41ce841d98a58b30aff
endef
$(eval $(call Download,qca99x0-board-5g))
define Download/qca99x0-board-2g
URL:=https://github.com/kvalo/ath10k-firmware/raw/master/QCA99X0/hw2.0/
URL_FILE:=boardData_AR900B_CUS260_2G_v2_002.bin
FILE:=boardData_AR900B_CUS260_2G_v2_002.bin
HASH:=fd91ddf93a271633c28fb1831a1dc5e829c345fbf2aa8980e816585cf9b9e9ed
endef
$(eval $(call Download,qca99x0-board-2g))
Package/ath10k-board-qca4019 = $(call Package/firmware-default,ath10k qca4019 board firmware)
define Package/ath10k-board-qca4019/install
$(INSTALL_DIR) $(1)/lib/firmware/ath10k/QCA4019/hw1.0
@ -124,6 +140,25 @@ define Package/ath10k-board-qca99x0/install
$(1)/lib/firmware/ath10k/QCA99X0/hw2.0/board.bin
endef
$(eval $(call BuildPackage,ath10k-board-qca99x0))
Package/ath10k-board-qca99x0-2g = $(call Package/firmware-default,ath10k qca99x0 board 2g precal firmware)
define Package/ath10k-board-qca99x0-2g/install
$(INSTALL_DIR) $(1)/lib/firmware/ath10k/QCA99X0/hw2.0
$(INSTALL_DATA) \
$(DL_DIR)/boardData_AR900B_CUS260_2G_v2_002.bin \
$(1)/lib/firmware/ath10k/QCA99X0/hw2.0/board-2g-precal.bin
endef
$(eval $(call BuildPackage,ath10k-board-qca99x0-2g))
Package/ath10k-board-qca99x0-5g = $(call Package/firmware-default,ath10k qca99x0 board 5g precal firmware)
define Package/ath10k-board-qca99x0-5g/install
$(INSTALL_DIR) $(1)/lib/firmware/ath10k/QCA99X0/hw2.0
$(INSTALL_DATA) \
$(DL_DIR)/boardData_AR900B_CUS239_5G_v2_001.bin \
$(1)/lib/firmware/ath10k/QCA99X0/hw2.0/board-5g-precal.bin
endef
$(eval $(call BuildPackage,ath10k-board-qca99x0-5g))
Package/ath10k-firmware-qca99x0 = $(call Package/firmware-default,ath10k qca99x0 firmware,+ath10k-board-qca99x0)
define Package/ath10k-firmware-qca99x0/install
$(INSTALL_DIR) $(1)/lib/firmware/ath10k/QCA99X0/hw2.0

View File

@ -0,0 +1,22 @@
--- a/libebl/libebl.h
+++ b/libebl/libebl.h
@@ -245,7 +245,7 @@ extern ssize_t ebl_register_info (Ebl *e
Each of these is filled with the DWARF register number corresponding,
or -1 if there is none. Returns zero when the information is available. */
extern int ebl_syscall_abi (Ebl *ebl, int *sp, int *pc,
- int *callno, int args[6]);
+ int *callno, int args[]);
/* Supply the ABI-specified state of DWARF CFI before CIE initial programs.
--- a/libdw/libdw.h
+++ b/libdw/libdw.h
@@ -1065,7 +1065,7 @@ extern int dwarf_frame_cfa (Dwarf_Frame
expressions in the CFI, *OPS is an internal pointer that can be used as
long as the Dwarf_CFI used to create FRAME remains alive. */
extern int dwarf_frame_register (Dwarf_Frame *frame, int regno,
- Dwarf_Op ops_mem[3],
+ Dwarf_Op ops_mem[],
Dwarf_Op **ops, size_t *nops)
__nonnull_attribute__ (3, 4, 5);

View File

@ -5,9 +5,9 @@ PKG_RELEASE:=1
PKG_SOURCE_PROTO:=git
PKG_SOURCE_URL=$(PROJECT_GIT)/project/netifd.git
PKG_SOURCE_DATE:=2021-07-14
PKG_SOURCE_VERSION:=7f24a063475e1e2be4e0c516a5b62c3fae5ec542
PKG_MIRROR_HASH:=3fad25b8655e01e20f54b6c6decad6a660a34ab3ca2de97fe3c9b7db5aa485fe
PKG_SOURCE_DATE:=2021-07-23
PKG_SOURCE_VERSION:=17e453bd68b41780b6564dafa8358efc29a00930
PKG_MIRROR_HASH:=06b6e10a71e3002fa03579846b97af29be9503d61486486c639dbfae423b398f
PKG_MAINTAINER:=Felix Fietkau <nbd@nbd.name>
PKG_LICENSE:=GPL-2.0

View File

@ -12,9 +12,9 @@ PKG_RELEASE:=$(AUTORELEASE)
PKG_SOURCE_PROTO:=git
PKG_SOURCE_URL=$(PROJECT_GIT)/project/procd.git
PKG_SOURCE_DATE:=2021-07-18
PKG_SOURCE_VERSION:=9bd1b7f0951ec2bcf56674fa729af3872b276057
PKG_MIRROR_HASH:=87681b3f320af1392bfdecfe6e3c69a32a95169af0ca243e44bad78f22b34e3d
PKG_SOURCE_DATE:=2021-07-25
PKG_SOURCE_VERSION:=f26233edb6a550bf23d51d5d4c864baf093e46e1
PKG_MIRROR_HASH:=6160291a1b94cf89e4e438440ef393119f88c6182937d557a9e2864e765322a6
CMAKE_INSTALL:=1
PKG_LICENSE:=GPL-2.0

View File

@ -234,7 +234,7 @@ Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.org>
static int bcm2708_fb_register(struct bcm2708_fb *fb)
--- a/drivers/video/fbdev/core/fbmem.c
+++ b/drivers/video/fbdev/core/fbmem.c
@@ -1076,6 +1076,30 @@ fb_blank(struct fb_info *info, int blank
@@ -1074,6 +1074,30 @@ fb_blank(struct fb_info *info, int blank
}
EXPORT_SYMBOL(fb_blank);
@ -265,7 +265,7 @@ Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.org>
static long do_fb_ioctl(struct fb_info *info, unsigned int cmd,
unsigned long arg)
{
@@ -1084,6 +1108,7 @@ static long do_fb_ioctl(struct fb_info *
@@ -1082,6 +1106,7 @@ static long do_fb_ioctl(struct fb_info *
struct fb_fix_screeninfo fix;
struct fb_cmap cmap_from;
struct fb_cmap_user cmap;
@ -273,7 +273,7 @@ Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.org>
void __user *argp = (void __user *)arg;
long ret = 0;
@@ -1159,6 +1184,15 @@ static long do_fb_ioctl(struct fb_info *
@@ -1157,6 +1182,15 @@ static long do_fb_ioctl(struct fb_info *
unlock_fb_info(info);
console_unlock();
break;
@ -289,7 +289,7 @@ Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.org>
default:
lock_fb_info(info);
fb = info->fbops;
@@ -1304,6 +1338,7 @@ static long fb_compat_ioctl(struct file
@@ -1302,6 +1336,7 @@ static long fb_compat_ioctl(struct file
case FBIOPAN_DISPLAY:
case FBIOGET_CON2FBMAP:
case FBIOPUT_CON2FBMAP:

View File

@ -267,7 +267,7 @@ Signed-off-by: Yaroslav Rosomakho <yaroslavros@gmail.com>
goto out;
--- a/drivers/mmc/core/core.c
+++ b/drivers/mmc/core/core.c
@@ -1922,7 +1922,8 @@ EXPORT_SYMBOL(mmc_erase);
@@ -1925,7 +1925,8 @@ EXPORT_SYMBOL(mmc_erase);
int mmc_can_erase(struct mmc_card *card)
{
if ((card->host->caps & MMC_CAP_ERASE) &&

View File

@ -82,7 +82,7 @@ Cc: linux-rockchip@lists.infradead.org
--- a/drivers/pci/controller/pci-aardvark.c
+++ b/drivers/pci/controller/pci-aardvark.c
@@ -1049,7 +1049,8 @@ static int advk_pcie_probe(struct platfo
@@ -1060,7 +1060,8 @@ static int advk_pcie_probe(struct platfo
return ret;
}

View File

@ -22,7 +22,7 @@ Signed-off-by: Maxime Ripard <maxime@cerno.tech>
#define MAX_TUNING_LOOP 40
@@ -2758,7 +2758,7 @@ static void sdhci_timeout_timer(struct t
@@ -2762,7 +2762,7 @@ static void sdhci_timeout_timer(struct t
spin_lock_irqsave(&host->lock, flags);
if (host->cmd && !sdhci_data_line_cmd(host->cmd)) {
@ -31,7 +31,7 @@ Signed-off-by: Maxime Ripard <maxime@cerno.tech>
mmc_hostname(host->mmc));
sdhci_dumpregs(host);
@@ -2780,7 +2780,7 @@ static void sdhci_timeout_data_timer(str
@@ -2784,7 +2784,7 @@ static void sdhci_timeout_data_timer(str
if (host->data || host->data_cmd ||
(host->cmd && sdhci_data_line_cmd(host->cmd))) {

View File

@ -20,7 +20,7 @@ Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org>
--- a/include/media/v4l2-subdev.h
+++ b/include/media/v4l2-subdev.h
@@ -670,6 +670,29 @@ struct v4l2_subdev_pad_config {
@@ -674,6 +674,29 @@ struct v4l2_subdev_pad_config {
*
* @set_frame_desc: set the low level media bus frame parameters, @fd array
* may be adjusted by the subdev driver to device capabilities.
@ -50,7 +50,7 @@ Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org>
*/
struct v4l2_subdev_pad_ops {
int (*init_cfg)(struct v4l2_subdev *sd,
@@ -710,6 +733,10 @@ struct v4l2_subdev_pad_ops {
@@ -714,6 +737,10 @@ struct v4l2_subdev_pad_ops {
struct v4l2_mbus_frame_desc *fd);
int (*set_frame_desc)(struct v4l2_subdev *sd, unsigned int pad,
struct v4l2_mbus_frame_desc *fd);

View File

@ -17,7 +17,7 @@ Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org>
--- a/include/media/v4l2-subdev.h
+++ b/include/media/v4l2-subdev.h
@@ -402,12 +402,6 @@ struct v4l2_mbus_frame_desc {
@@ -406,12 +406,6 @@ struct v4l2_mbus_frame_desc {
*
* @query_dv_timings: callback for VIDIOC_QUERY_DV_TIMINGS() ioctl handler code.
*
@ -30,7 +30,7 @@ Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org>
* @s_rx_buffer: set a host allocated memory buffer for the subdev. The subdev
* can adjust @size to a lower value and must not write more data to the
* buffer starting at @data than the original value of @size.
@@ -435,10 +429,6 @@ struct v4l2_subdev_video_ops {
@@ -439,10 +433,6 @@ struct v4l2_subdev_video_ops {
struct v4l2_dv_timings *timings);
int (*query_dv_timings)(struct v4l2_subdev *sd,
struct v4l2_dv_timings *timings);

View File

@ -0,0 +1,144 @@
From 0d035bed2a4a6c4878518749348be61bf082d12a Mon Sep 17 00:00:00 2001
From: Russell King <rmk+kernel@armlinux.org.uk>
Date: Wed, 9 Dec 2020 11:22:49 +0000
Subject: [PATCH] net: sfp: VSOL V2801F / CarlitoxxPro CPGOS03-0490 v2.0
workaround
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
Add a workaround for the detection of VSOL V2801F / CarlitoxxPro
CPGOS03-0490 v2.0 GPON module which CarlitoxxPro states needs single
byte I2C reads to the EEPROM.
Pali Rohár reports that he also has a CarlitoxxPro-based V2801F module,
which reports a manufacturer of "OEM". This manufacturer can't be
matched as it appears in many different modules, so also match the part
number too.
Reported-by: Thomas Schreiber <tschreibe@gmail.com>
Reported-by: Pali Rohár <pali@kernel.org>
Tested-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Signed-off-by: David S. Miller <davem@davemloft.net>
---
drivers/net/phy/sfp.c | 63 +++++++++++++++++++++++++++++++++++++++----
1 file changed, 58 insertions(+), 5 deletions(-)
--- a/drivers/net/phy/sfp.c
+++ b/drivers/net/phy/sfp.c
@@ -191,6 +191,7 @@ struct sfp {
struct sfp_bus *sfp_bus;
struct phy_device *mod_phy;
const struct sff_data *type;
+ size_t i2c_block_size;
u32 max_power_mW;
unsigned int (*get_state)(struct sfp *);
@@ -305,10 +306,19 @@ static int sfp_i2c_read(struct sfp *sfp,
size_t len)
{
struct i2c_msg msgs[2];
- u8 bus_addr = a2 ? 0x51 : 0x50;
+ size_t block_size;
size_t this_len;
+ u8 bus_addr;
int ret;
+ if (a2) {
+ block_size = 16;
+ bus_addr = 0x51;
+ } else {
+ block_size = sfp->i2c_block_size;
+ bus_addr = 0x50;
+ }
+
msgs[0].addr = bus_addr;
msgs[0].flags = 0;
msgs[0].len = 1;
@@ -320,8 +330,8 @@ static int sfp_i2c_read(struct sfp *sfp,
while (len) {
this_len = len;
- if (this_len > 16)
- this_len = 16;
+ if (this_len > block_size)
+ this_len = block_size;
msgs[1].len = this_len;
@@ -1569,6 +1579,28 @@ static int sfp_sm_mod_hpower(struct sfp
return 0;
}
+/* Some modules (Nokia 3FE46541AA) lock up if byte 0x51 is read as a
+ * single read. Switch back to reading 16 byte blocks unless we have
+ * a CarlitoxxPro module (rebranded VSOL V2801F). Even more annoyingly,
+ * some VSOL V2801F have the vendor name changed to OEM.
+ */
+static int sfp_quirk_i2c_block_size(const struct sfp_eeprom_base *base)
+{
+ if (!memcmp(base->vendor_name, "VSOL ", 16))
+ return 1;
+ if (!memcmp(base->vendor_name, "OEM ", 16) &&
+ !memcmp(base->vendor_pn, "V2801F ", 16))
+ return 1;
+
+ /* Some modules can't cope with long reads */
+ return 16;
+}
+
+static void sfp_quirks_base(struct sfp *sfp, const struct sfp_eeprom_base *base)
+{
+ sfp->i2c_block_size = sfp_quirk_i2c_block_size(base);
+}
+
static int sfp_sm_mod_probe(struct sfp *sfp, bool report)
{
/* SFP module inserted - read I2C data */
@@ -1577,14 +1609,20 @@ static int sfp_sm_mod_probe(struct sfp *
u8 check;
int ret;
- ret = sfp_read(sfp, false, 0, &id, sizeof(id));
+ /* Some modules (CarlitoxxPro CPGOS03-0490) do not support multibyte
+ * reads from the EEPROM, so start by reading the base identifying
+ * information one byte at a time.
+ */
+ sfp->i2c_block_size = 1;
+
+ ret = sfp_read(sfp, false, 0, &id.base, sizeof(id.base));
if (ret < 0) {
if (report)
dev_err(sfp->dev, "failed to read EEPROM: %d\n", ret);
return -EAGAIN;
}
- if (ret != sizeof(id)) {
+ if (ret != sizeof(id.base)) {
dev_err(sfp->dev, "EEPROM short read: %d\n", ret);
return -EAGAIN;
}
@@ -1612,6 +1650,21 @@ static int sfp_sm_mod_probe(struct sfp *
}
}
+ /* Apply any early module-specific quirks */
+ sfp_quirks_base(sfp, &id.base);
+
+ ret = sfp_read(sfp, false, SFP_CC_BASE + 1, &id.ext, sizeof(id.ext));
+ if (ret < 0) {
+ if (report)
+ dev_err(sfp->dev, "failed to read EEPROM: %d\n", ret);
+ return -EAGAIN;
+ }
+
+ if (ret != sizeof(id.ext)) {
+ dev_err(sfp->dev, "EEPROM short read: %d\n", ret);
+ return -EAGAIN;
+ }
+
check = sfp_check(&id.ext, sizeof(id.ext) - 1);
if (check != id.ext.cc_ext) {
if (cotsworks) {

View File

@ -0,0 +1,211 @@
From 426c6cbc409cbda9ab1a9dbf15d3c2ef947eb8c1 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Pali=20Roh=C3=A1r?= <pali@kernel.org>
Date: Mon, 25 Jan 2021 16:02:27 +0100
Subject: [PATCH] net: sfp: add workaround for Realtek RTL8672 and RTL9601C
chips
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
The workaround for VSOL V2801F brand based GPON SFP modules added in commit
0d035bed2a4a ("net: sfp: VSOL V2801F / CarlitoxxPro CPGOS03-0490 v2.0
workaround") works only for IDs added explicitly to the list. Since there
are rebranded modules where OEM vendors put different strings into the
vendor name field, we cannot base workaround on IDs only.
Moreover the issue which the above mentioned commit tried to work around is
generic not only to VSOL based modules, but rather to all GPON modules
based on Realtek RTL8672 and RTL9601C chips.
These include at least the following GPON modules:
* V-SOL V2801F
* C-Data FD511GX-RM0
* OPTON GP801R
* BAUDCOM BD-1234-SFM
* CPGOS03-0490 v2.0
* Ubiquiti U-Fiber Instant
* EXOT EGS1
These Realtek chips have broken EEPROM emulator which for N-byte read
operation returns just the first byte of EEPROM data, followed by N-1
zeros.
Introduce a new function, sfp_id_needs_byte_io(), which detects SFP modules
with broken EEPROM emulator based on N-1 zeros and switch to 1 byte EEPROM
reading operation.
Function sfp_i2c_read() now always uses single byte reading when it is
required and when function sfp_hwmon_probe() detects single byte access,
it disables registration of hwmon device, because in this case we cannot
reliably and atomically read 2 bytes as is required by the standard for
retrieving values from diagnostic area.
(These Realtek chips are broken in a way that violates SFP standards for
diagnostic interface. Kernel in this case simply cannot do anything less
of skipping registration of the hwmon interface.)
This patch fixes reading of EEPROM content from SFP modules based on
Realtek RTL8672 and RTL9601C chips. Diagnostic interface of EEPROM stays
broken and cannot be fixed.
Fixes: 0d035bed2a4a ("net: sfp: VSOL V2801F / CarlitoxxPro CPGOS03-0490 v2.0 workaround")
Co-developed-by: Russell King <rmk+kernel@armlinux.org.uk>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
Signed-off-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
---
drivers/net/phy/sfp.c | 100 ++++++++++++++++++++++++++++--------------
1 file changed, 67 insertions(+), 33 deletions(-)
--- a/drivers/net/phy/sfp.c
+++ b/drivers/net/phy/sfp.c
@@ -306,19 +306,11 @@ static int sfp_i2c_read(struct sfp *sfp,
size_t len)
{
struct i2c_msg msgs[2];
- size_t block_size;
+ u8 bus_addr = a2 ? 0x51 : 0x50;
+ size_t block_size = sfp->i2c_block_size;
size_t this_len;
- u8 bus_addr;
int ret;
- if (a2) {
- block_size = 16;
- bus_addr = 0x51;
- } else {
- block_size = sfp->i2c_block_size;
- bus_addr = 0x50;
- }
-
msgs[0].addr = bus_addr;
msgs[0].flags = 0;
msgs[0].len = 1;
@@ -1245,6 +1237,20 @@ static void sfp_hwmon_probe(struct work_
struct sfp *sfp = container_of(work, struct sfp, hwmon_probe.work);
int err, i;
+ /* hwmon interface needs to access 16bit registers in atomic way to
+ * guarantee coherency of the diagnostic monitoring data. If it is not
+ * possible to guarantee coherency because EEPROM is broken in such way
+ * that does not support atomic 16bit read operation then we have to
+ * skip registration of hwmon device.
+ */
+ if (sfp->i2c_block_size < 2) {
+ dev_info(sfp->dev,
+ "skipping hwmon device registration due to broken EEPROM\n");
+ dev_info(sfp->dev,
+ "diagnostic EEPROM area cannot be read atomically to guarantee data coherency\n");
+ return;
+ }
+
err = sfp_read(sfp, true, 0, &sfp->diag, sizeof(sfp->diag));
if (err < 0) {
if (sfp->hwmon_tries--) {
@@ -1579,26 +1585,30 @@ static int sfp_sm_mod_hpower(struct sfp
return 0;
}
-/* Some modules (Nokia 3FE46541AA) lock up if byte 0x51 is read as a
- * single read. Switch back to reading 16 byte blocks unless we have
- * a CarlitoxxPro module (rebranded VSOL V2801F). Even more annoyingly,
- * some VSOL V2801F have the vendor name changed to OEM.
+/* GPON modules based on Realtek RTL8672 and RTL9601C chips (e.g. V-SOL
+ * V2801F, CarlitoxxPro CPGOS03-0490, Ubiquiti U-Fiber Instant, ...) do
+ * not support multibyte reads from the EEPROM. Each multi-byte read
+ * operation returns just one byte of EEPROM followed by zeros. There is
+ * no way to identify which modules are using Realtek RTL8672 and RTL9601C
+ * chips. Moreover every OEM of V-SOL V2801F module puts its own vendor
+ * name and vendor id into EEPROM, so there is even no way to detect if
+ * module is V-SOL V2801F. Therefore check for those zeros in the read
+ * data and then based on check switch to reading EEPROM to one byte
+ * at a time.
*/
-static int sfp_quirk_i2c_block_size(const struct sfp_eeprom_base *base)
+static bool sfp_id_needs_byte_io(struct sfp *sfp, void *buf, size_t len)
{
- if (!memcmp(base->vendor_name, "VSOL ", 16))
- return 1;
- if (!memcmp(base->vendor_name, "OEM ", 16) &&
- !memcmp(base->vendor_pn, "V2801F ", 16))
- return 1;
+ size_t i, block_size = sfp->i2c_block_size;
- /* Some modules can't cope with long reads */
- return 16;
-}
+ /* Already using byte IO */
+ if (block_size == 1)
+ return false;
-static void sfp_quirks_base(struct sfp *sfp, const struct sfp_eeprom_base *base)
-{
- sfp->i2c_block_size = sfp_quirk_i2c_block_size(base);
+ for (i = 1; i < len; i += block_size) {
+ if (memchr_inv(buf + i, '\0', min(block_size - 1, len - i)))
+ return false;
+ }
+ return true;
}
static int sfp_sm_mod_probe(struct sfp *sfp, bool report)
@@ -1609,11 +1619,11 @@ static int sfp_sm_mod_probe(struct sfp *
u8 check;
int ret;
- /* Some modules (CarlitoxxPro CPGOS03-0490) do not support multibyte
- * reads from the EEPROM, so start by reading the base identifying
- * information one byte at a time.
+ /* Some SFP modules and also some Linux I2C drivers do not like reads
+ * longer than 16 bytes, so read the EEPROM in chunks of 16 bytes at
+ * a time.
*/
- sfp->i2c_block_size = 1;
+ sfp->i2c_block_size = 16;
ret = sfp_read(sfp, false, 0, &id.base, sizeof(id.base));
if (ret < 0) {
@@ -1627,6 +1637,33 @@ static int sfp_sm_mod_probe(struct sfp *
return -EAGAIN;
}
+ /* Some SFP modules (e.g. Nokia 3FE46541AA) lock up if read from
+ * address 0x51 is just one byte at a time. Also SFF-8472 requires
+ * that EEPROM supports atomic 16bit read operation for diagnostic
+ * fields, so do not switch to one byte reading at a time unless it
+ * is really required and we have no other option.
+ */
+ if (sfp_id_needs_byte_io(sfp, &id.base, sizeof(id.base))) {
+ dev_info(sfp->dev,
+ "Detected broken RTL8672/RTL9601C emulated EEPROM\n");
+ dev_info(sfp->dev,
+ "Switching to reading EEPROM to one byte at a time\n");
+ sfp->i2c_block_size = 1;
+
+ ret = sfp_read(sfp, false, 0, &id.base, sizeof(id.base));
+ if (ret < 0) {
+ if (report)
+ dev_err(sfp->dev, "failed to read EEPROM: %d\n",
+ ret);
+ return -EAGAIN;
+ }
+
+ if (ret != sizeof(id.base)) {
+ dev_err(sfp->dev, "EEPROM short read: %d\n", ret);
+ return -EAGAIN;
+ }
+ }
+
/* Cotsworks do not seem to update the checksums when they
* do the final programming with the final module part number,
* serial number and date code.
@@ -1650,9 +1687,6 @@ static int sfp_sm_mod_probe(struct sfp *
}
}
- /* Apply any early module-specific quirks */
- sfp_quirks_base(sfp, &id.base);
-
ret = sfp_read(sfp, false, SFP_CC_BASE + 1, &id.ext, sizeof(id.ext));
if (ret < 0) {
if (report)

View File

@ -533,6 +533,7 @@ CONFIG_BASE_SMALL=0
# CONFIG_BATTERY_MAX17040 is not set
# CONFIG_BATTERY_MAX17042 is not set
# CONFIG_BATTERY_MAX1721X is not set
# CONFIG_BATTERY_RT5033 is not set
# CONFIG_BATTERY_SBS is not set
# CONFIG_BAYCOM_EPP is not set
# CONFIG_BAYCOM_PAR is not set
@ -1004,8 +1005,8 @@ CONFIG_CROSS_COMPILE=""
# CONFIG_CROSS_MEMORY_ATTACH is not set
CONFIG_CRYPTO=y
# CONFIG_CRYPTO_842 is not set
# CONFIG_CRYPTO_ADIANTUM is not set
CONFIG_CRYPTO_ACOMP2=y
# CONFIG_CRYPTO_ADIANTUM is not set
CONFIG_CRYPTO_AEAD=y
CONFIG_CRYPTO_AEAD2=y
# CONFIG_CRYPTO_AEGIS128 is not set
@ -1123,9 +1124,9 @@ CONFIG_CRYPTO_HASH2=y
# CONFIG_CRYPTO_HW is not set
# CONFIG_CRYPTO_JITTERENTROPY is not set
# CONFIG_CRYPTO_KEYWRAP is not set
# CONFIG_CRYPTO_KHAZAD is not set
CONFIG_CRYPTO_KPP=y
CONFIG_CRYPTO_KPP2=y
# CONFIG_CRYPTO_KHAZAD is not set
CONFIG_CRYPTO_LIB_AES=y
CONFIG_CRYPTO_LIB_ARC4=y
# CONFIG_CRYPTO_LIB_BLAKE2S is not set
@ -2120,6 +2121,7 @@ CONFIG_HARDENED_USERCOPY=y
# CONFIG_HARDENED_USERCOPY_PAGESPAN is not set
CONFIG_HARDEN_EL2_VECTORS=y
# CONFIG_HARDLOCKUP_DETECTOR is not set
# CONFIG_HAVE_ARM_ARCH_TIMER is not set
# CONFIG_HCALL_STATS is not set
# CONFIG_HDC100X is not set
# CONFIG_HDC2010 is not set
@ -3561,8 +3563,8 @@ CONFIG_MTD_NAND_IDS=y
# CONFIG_MTD_NAND_PLATFORM is not set
# CONFIG_MTD_NAND_PXA3xx is not set
# CONFIG_MTD_NAND_RB4XX is not set
# CONFIG_MTD_NAND_RB91X is not set
# CONFIG_MTD_NAND_RB750 is not set
# CONFIG_MTD_NAND_RB91X is not set
# CONFIG_MTD_NAND_RICOH is not set
# CONFIG_MTD_NAND_S3C2410 is not set
# CONFIG_MTD_NAND_SHARPSL is not set

View File

@ -500,6 +500,7 @@ CONFIG_BASE_SMALL=0
# CONFIG_BATTERY_MAX17040 is not set
# CONFIG_BATTERY_MAX17042 is not set
# CONFIG_BATTERY_MAX1721X is not set
# CONFIG_BATTERY_RT5033 is not set
# CONFIG_BATTERY_SBS is not set
# CONFIG_BAYCOM_EPP is not set
# CONFIG_BAYCOM_PAR is not set

View File

@ -32,6 +32,15 @@ Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
lib1funcs.o ashldi3.o bswapsdi2.o \
--- a/arch/arm/kernel/vmlinux.lds.S
+++ b/arch/arm/kernel/vmlinux.lds.S
@@ -75,7 +75,7 @@ SECTIONS
. = ALIGN(4);
__ex_table : AT(ADDR(__ex_table) - LOAD_OFFSET) {
__start___ex_table = .;
- ARM_MMU_KEEP(*(__ex_table))
+ KEEP(*(__ex_table))
__stop___ex_table = .;
}
@@ -100,24 +100,24 @@ SECTIONS
}
.init.arch.info : {
@ -63,14 +72,7 @@ Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
--- a/arch/arm/include/asm/vmlinux.lds.h
+++ b/arch/arm/include/asm/vmlinux.lds.h
@@ -23,19 +23,19 @@
#define ARM_MMU_DISCARD(x)
#else
#define ARM_MMU_KEEP(x)
-#define ARM_MMU_DISCARD(x) x
+#define ARM_MMU_DISCARD(x) KEEP(x)
#endif
@@ -29,13 +29,13 @@
#define PROC_INFO \
. = ALIGN(4); \
__proc_info_begin = .; \

View File

@ -219,7 +219,7 @@
--- a/block/partitions/msdos.c
+++ b/block/partitions/msdos.c
@@ -565,6 +565,15 @@ static void parse_minix(struct parsed_pa
@@ -563,6 +563,15 @@ static void parse_minix(struct parsed_pa
#endif /* CONFIG_MINIX_SUBPARTITION */
}
@ -235,7 +235,7 @@
static struct {
unsigned char id;
void (*parse)(struct parsed_partitions *, sector_t, sector_t, int);
@@ -576,6 +585,7 @@ static struct {
@@ -574,6 +583,7 @@ static struct {
{UNIXWARE_PARTITION, parse_unixware},
{SOLARIS_X86_PARTITION, parse_solaris_x86},
{NEW_SOLARIS_X86_PARTITION, parse_solaris_x86},

View File

@ -14,11 +14,9 @@ Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
drivers/net/ethernet/mediatek/mtk_eth_soc.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/net/ethernet/mediatek/mtk_eth_soc.c b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
index ed4eacef17ce..666803817540 100644
--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
@@ -3015,6 +3015,8 @@ static int mtk_add_mac(struct mtk_eth *eth, struct device_node *np)
@@ -3005,6 +3005,8 @@ static int mtk_add_mac(struct mtk_eth *e
eth->netdev[id]->dev.of_node = np;
eth->netdev[id]->max_mtu = MTK_MAX_RX_LENGTH - MTK_RX_ETH_HLEN;
@ -27,6 +25,3 @@ index ed4eacef17ce..666803817540 100644
return 0;
--
2.31.1

View File

@ -15,8 +15,6 @@ Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
net/dsa/dsa2.c | 2 +
1 file changed, 2 insertion(+)
diff --git a/net/dsa/dsa2.c b/net/dsa/dsa2.c
index b71e87909f0e..55bbc1a769ca 100644
--- a/net/dsa/dsa2.c
+++ b/net/dsa/dsa2.c
@@ -14,6 +14,7 @@
@ -27,7 +25,7 @@ index b71e87909f0e..55bbc1a769ca 100644
#include <net/devlink.h>
#include "dsa_priv.h"
@@ -392,6 +392,7 @@ static int dsa_port_setup(struct dsa_port *dp)
@@ -288,6 +289,7 @@ static int dsa_port_setup(struct dsa_por
break;
case DSA_PORT_TYPE_USER:
@ -35,6 +33,3 @@ index b71e87909f0e..55bbc1a769ca 100644
dp->mac = of_get_mac_address(dp->dn);
err = dsa_slave_create(dp);
if (err)
--
2.31.1

View File

@ -41,6 +41,15 @@ Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
# but it is being used too early to link to meaningful stack_chk logic.
--- a/arch/arm/kernel/vmlinux.lds.S
+++ b/arch/arm/kernel/vmlinux.lds.S
@@ -73,7 +73,7 @@ SECTIONS
. = ALIGN(4);
__ex_table : AT(ADDR(__ex_table) - LOAD_OFFSET) {
__start___ex_table = .;
- ARM_MMU_KEEP(*(__ex_table))
+ KEEP(*(__ex_table))
__stop___ex_table = .;
}
@@ -100,24 +100,24 @@ SECTIONS
}
.init.arch.info : {
@ -72,14 +81,7 @@ Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
--- a/arch/arm/kernel/vmlinux.lds.h
+++ b/arch/arm/kernel/vmlinux.lds.h
@@ -22,13 +22,13 @@
#define ARM_MMU_DISCARD(x)
#else
#define ARM_MMU_KEEP(x)
-#define ARM_MMU_DISCARD(x) x
+#define ARM_MMU_DISCARD(x) KEEP(x)
#endif
@@ -28,7 +28,7 @@
#define PROC_INFO \
. = ALIGN(4); \
__proc_info_begin = .; \

View File

@ -18,7 +18,7 @@ Signed-off-by: David Bauer <mail@david-bauer.net>
--- a/drivers/of/of_net.c
+++ b/drivers/of/of_net.c
@@ -61,6 +61,7 @@ static void *of_get_mac_addr_nvmem(struc
@@ -55,6 +55,7 @@ static void *of_get_mac_addr_nvmem(struc
void *mac;
u8 nvmem_mac[ETH_ALEN];
struct platform_device *pdev = of_find_device_by_node(np);
@ -26,7 +26,7 @@ Signed-off-by: David Bauer <mail@david-bauer.net>
if (!pdev) {
*err = -ENODEV;
@@ -78,10 +79,29 @@ static void *of_get_mac_addr_nvmem(struc
@@ -72,10 +73,29 @@ static void *of_get_mac_addr_nvmem(struc
put_device(&pdev->dev);
if (!mac) {
*err = -ENOMEM;

View File

@ -14,11 +14,9 @@ Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
drivers/net/ethernet/mediatek/mtk_eth_soc.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/net/ethernet/mediatek/mtk_eth_soc.c b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
index ed4eacef17ce..666803817540 100644
--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c
+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c
@@ -3015,6 +3015,8 @@ static int mtk_add_mac(struct mtk_eth *eth, struct device_node *np)
@@ -3034,6 +3034,8 @@ static int mtk_add_mac(struct mtk_eth *e
eth->netdev[id]->dev.of_node = np;
eth->netdev[id]->max_mtu = MTK_MAX_RX_LENGTH - MTK_RX_ETH_HLEN;
@ -27,6 +25,3 @@ index ed4eacef17ce..666803817540 100644
return 0;
--
2.31.1

View File

@ -15,8 +15,6 @@ Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
net/dsa/dsa2.c | 2 +
1 file changed, 2 insertion(+)
diff --git a/net/dsa/dsa2.c b/net/dsa/dsa2.c
index b71e87909f0e..55bbc1a769ca 100644
--- a/net/dsa/dsa2.c
+++ b/net/dsa/dsa2.c
@@ -14,6 +14,7 @@
@ -27,7 +25,7 @@ index b71e87909f0e..55bbc1a769ca 100644
#include <net/devlink.h>
#include "dsa_priv.h"
@@ -392,6 +392,7 @@ static int dsa_port_setup(struct dsa_port *dp)
@@ -318,6 +319,7 @@ static int dsa_port_setup(struct dsa_por
break;
devlink_port_registered = true;
@ -35,6 +33,3 @@ index b71e87909f0e..55bbc1a769ca 100644
dp->mac = of_get_mac_address(dp->dn);
err = dsa_slave_create(dp);
if (err)
--
2.31.1

View File

@ -0,0 +1,178 @@
From a07e31adf2753cad2fd9790db5bfc047c81e8152 Mon Sep 17 00:00:00 2001
From: Felix Matouschek <felix@matouschek.org>
Date: Fri, 2 Jul 2021 20:31:23 +0200
Subject: [PATCH] mtd: spinand: Add support for XTX XT26G0xA
Add support for XTX Technology XT26G01AXXXXX, XTX26G02AXXXXX and
XTX26G04AXXXXX SPI NAND.
These are 3V, 1G/2G/4Gbit serial SLC NAND flash devices with on-die ECC
(8bit strength per 512bytes).
Tested on Teltonika RUTX10 flashed with OpenWrt.
Datasheets available at
http://www.xtxtech.com/download/?AId=225
https://datasheet.lcsc.com/szlcsc/2005251034_XTX-XT26G01AWSEGA_C558841.pdf
Signed-off-by: Felix Matouschek <felix@matouschek.org>
---
drivers/mtd/nand/spi/Makefile | 2 +-
drivers/mtd/nand/spi/core.c | 1 +
drivers/mtd/nand/spi/xtx.c | 122 ++++++++++++++++++++++++++++++++++
include/linux/mtd/spinand.h | 1 +
4 files changed, 125 insertions(+), 1 deletion(-)
create mode 100644 drivers/mtd/nand/spi/xtx.c
--- a/drivers/mtd/nand/spi/Makefile
+++ b/drivers/mtd/nand/spi/Makefile
@@ -1,3 +1,3 @@
# SPDX-License-Identifier: GPL-2.0
-spinand-objs := core.o gigadevice.o macronix.o micron.o paragon.o toshiba.o winbond.o
+spinand-objs := core.o gigadevice.o macronix.o micron.o paragon.o toshiba.o winbond.o xtx.o
obj-$(CONFIG_MTD_SPI_NAND) += spinand.o
--- a/drivers/mtd/nand/spi/core.c
+++ b/drivers/mtd/nand/spi/core.c
@@ -760,6 +760,7 @@ static const struct spinand_manufacturer
&paragon_spinand_manufacturer,
&toshiba_spinand_manufacturer,
&winbond_spinand_manufacturer,
+ &xtx_spinand_manufacturer,
};
static int spinand_manufacturer_match(struct spinand_device *spinand,
--- /dev/null
+++ b/drivers/mtd/nand/spi/xtx.c
@@ -0,0 +1,122 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Author:
+ * Felix Matouschek <felix@matouschek.org>
+ */
+
+#include <linux/device.h>
+#include <linux/kernel.h>
+#include <linux/mtd/spinand.h>
+
+#define SPINAND_MFR_XTX 0x0B
+
+#define XT26G0XA_STATUS_ECC_MASK GENMASK(5, 2)
+#define XT26G0XA_STATUS_ECC_NO_DETECTED (0 << 2)
+#define XT26G0XA_STATUS_ECC_8_CORRECTED (3 << 4)
+#define XT26G0XA_STATUS_ECC_UNCOR_ERROR (2 << 4)
+
+static SPINAND_OP_VARIANTS(read_cache_variants,
+ SPINAND_PAGE_READ_FROM_CACHE_QUADIO_OP(0, 1, NULL, 0),
+ SPINAND_PAGE_READ_FROM_CACHE_X4_OP(0, 1, NULL, 0),
+ SPINAND_PAGE_READ_FROM_CACHE_DUALIO_OP(0, 1, NULL, 0),
+ SPINAND_PAGE_READ_FROM_CACHE_X2_OP(0, 1, NULL, 0),
+ SPINAND_PAGE_READ_FROM_CACHE_OP(true, 0, 1, NULL, 0),
+ SPINAND_PAGE_READ_FROM_CACHE_OP(false, 0, 1, NULL, 0));
+
+static SPINAND_OP_VARIANTS(write_cache_variants,
+ SPINAND_PROG_LOAD_X4(true, 0, NULL, 0),
+ SPINAND_PROG_LOAD(true, 0, NULL, 0));
+
+static SPINAND_OP_VARIANTS(update_cache_variants,
+ SPINAND_PROG_LOAD_X4(false, 0, NULL, 0),
+ SPINAND_PROG_LOAD(false, 0, NULL, 0));
+
+static int xt26g0xa_ooblayout_ecc(struct mtd_info *mtd, int section,
+ struct mtd_oob_region *region)
+{
+ if (section)
+ return -ERANGE;
+
+ region->offset = 8;
+ region->length = 40;
+
+ return 0;
+}
+
+static int xt26g0xa_ooblayout_free(struct mtd_info *mtd, int section,
+ struct mtd_oob_region *region)
+{
+ if (section)
+ return -ERANGE;
+
+ region->offset = 1;
+ region->length = 7;
+
+ return 0;
+}
+
+static const struct mtd_ooblayout_ops xt26g0xa_ooblayout = {
+ .ecc = xt26g0xa_ooblayout_ecc,
+ .free = xt26g0xa_ooblayout_free,
+};
+
+static int xt26g0xa_ecc_get_status(struct spinand_device *spinand,
+ u8 status)
+{
+ switch (status & XT26G0XA_STATUS_ECC_MASK) {
+ case XT26G0XA_STATUS_ECC_NO_DETECTED:
+ return 0;
+ case XT26G0XA_STATUS_ECC_8_CORRECTED:
+ return 8;
+ case XT26G0XA_STATUS_ECC_UNCOR_ERROR:
+ return -EBADMSG;
+ default: /* (1 << 2) through (7 << 2) are 1-7 corrected errors */
+ return (status & XT26G0XA_STATUS_ECC_MASK) >> 2;
+ }
+
+ return -EINVAL;
+}
+
+static const struct spinand_info xtx_spinand_table[] = {
+ SPINAND_INFO("XT26G01A",
+ SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xE1),
+ NAND_MEMORG(1, 2048, 64, 64, 1024, 20, 1, 1, 1),
+ NAND_ECCREQ(8, 512),
+ SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
+ &write_cache_variants,
+ &update_cache_variants),
+ SPINAND_HAS_QE_BIT,
+ SPINAND_ECCINFO(&xt26g0xa_ooblayout,
+ xt26g0xa_ecc_get_status)),
+ SPINAND_INFO("XT26G02A",
+ SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xE2),
+ NAND_MEMORG(1, 2048, 64, 64, 2048, 40, 1, 1, 1),
+ NAND_ECCREQ(8, 512),
+ SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
+ &write_cache_variants,
+ &update_cache_variants),
+ SPINAND_HAS_QE_BIT,
+ SPINAND_ECCINFO(&xt26g0xa_ooblayout,
+ xt26g0xa_ecc_get_status)),
+ SPINAND_INFO("XT26G04A",
+ SPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xE3),
+ NAND_MEMORG(1, 2048, 64, 128, 2048, 40, 1, 1, 1),
+ NAND_ECCREQ(8, 512),
+ SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
+ &write_cache_variants,
+ &update_cache_variants),
+ SPINAND_HAS_QE_BIT,
+ SPINAND_ECCINFO(&xt26g0xa_ooblayout,
+ xt26g0xa_ecc_get_status)),
+};
+
+static const struct spinand_manufacturer_ops xtx_spinand_manuf_ops = {
+};
+
+const struct spinand_manufacturer xtx_spinand_manufacturer = {
+ .id = SPINAND_MFR_XTX,
+ .name = "XTX",
+ .chips = xtx_spinand_table,
+ .nchips = ARRAY_SIZE(xtx_spinand_table),
+ .ops = &xtx_spinand_manuf_ops,
+};
--- a/include/linux/mtd/spinand.h
+++ b/include/linux/mtd/spinand.h
@@ -244,6 +244,7 @@ extern const struct spinand_manufacturer
extern const struct spinand_manufacturer paragon_spinand_manufacturer;
extern const struct spinand_manufacturer toshiba_spinand_manufacturer;
extern const struct spinand_manufacturer winbond_spinand_manufacturer;
+extern const struct spinand_manufacturer xtx_spinand_manufacturer;
/**
* struct spinand_op_variants - SPI NAND operation variants

View File

@ -0,0 +1,195 @@
From 8ffe91b6b429277bd7bd79267ba836edf951dce2 Mon Sep 17 00:00:00 2001
From: Felix Matouschek <felix@matouschek.org>
Date: Fri, 2 Jul 2021 20:31:23 +0200
Subject: [PATCH] mtd: spinand: Add support for XTX XT26G0xA
Add support for XTX Technology XT26G01AXXXXX, XTX26G02AXXXXX and
XTX26G04AXXXXX SPI NAND.
These are 3V, 1G/2G/4Gbit serial SLC NAND flash devices with on-die ECC
(8bit strength per 512bytes).
Tested on Teltonika RUTX10 flashed with OpenWrt.
Datasheets available at
http://www.xtxtech.com/download/?AId=225
https://datasheet.lcsc.com/szlcsc/2005251034_XTX-XT26G01AWSEGA_C558841.pdf
Signed-off-by: Felix Matouschek <felix@matouschek.org>
---
drivers/mtd/nand/spi/Makefile | 2 +-
drivers/mtd/nand/spi/core.c | 1 +
drivers/mtd/nand/spi/xtx.c | 139 ++++++++++++++++++++++++++++++++++
include/linux/mtd/spinand.h | 1 +
4 files changed, 142 insertions(+), 1 deletion(-)
create mode 100644 drivers/mtd/nand/spi/xtx.c
--- a/drivers/mtd/nand/spi/Makefile
+++ b/drivers/mtd/nand/spi/Makefile
@@ -1,3 +1,3 @@
# SPDX-License-Identifier: GPL-2.0
-spinand-objs := core.o gigadevice.o macronix.o micron.o paragon.o toshiba.o winbond.o
+spinand-objs := core.o gigadevice.o macronix.o micron.o paragon.o toshiba.o winbond.o xtx.o
obj-$(CONFIG_MTD_SPI_NAND) += spinand.o
--- a/drivers/mtd/nand/spi/core.c
+++ b/drivers/mtd/nand/spi/core.c
@@ -758,6 +758,7 @@ static const struct spinand_manufacturer
&paragon_spinand_manufacturer,
&toshiba_spinand_manufacturer,
&winbond_spinand_manufacturer,
+ &xtx_spinand_manufacturer,
};
static int spinand_manufacturer_detect(struct spinand_device *spinand)
--- /dev/null
+++ b/drivers/mtd/nand/spi/xtx.c
@@ -0,0 +1,139 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Author:
+ * Felix Matouschek <felix@matouschek.org>
+ */
+
+#include <linux/device.h>
+#include <linux/kernel.h>
+#include <linux/mtd/spinand.h>
+
+#define SPINAND_MFR_XTX 0x0B
+
+#define XT26G0XA_STATUS_ECC_MASK GENMASK(5, 2)
+#define XT26G0XA_STATUS_ECC_NO_DETECTED (0 << 2)
+#define XT26G0XA_STATUS_ECC_8_CORRECTED (3 << 4)
+#define XT26G0XA_STATUS_ECC_UNCOR_ERROR (2 << 4)
+
+static SPINAND_OP_VARIANTS(read_cache_variants,
+ SPINAND_PAGE_READ_FROM_CACHE_QUADIO_OP(0, 1, NULL, 0),
+ SPINAND_PAGE_READ_FROM_CACHE_X4_OP(0, 1, NULL, 0),
+ SPINAND_PAGE_READ_FROM_CACHE_DUALIO_OP(0, 1, NULL, 0),
+ SPINAND_PAGE_READ_FROM_CACHE_X2_OP(0, 1, NULL, 0),
+ SPINAND_PAGE_READ_FROM_CACHE_OP(true, 0, 1, NULL, 0),
+ SPINAND_PAGE_READ_FROM_CACHE_OP(false, 0, 1, NULL, 0));
+
+static SPINAND_OP_VARIANTS(write_cache_variants,
+ SPINAND_PROG_LOAD_X4(true, 0, NULL, 0),
+ SPINAND_PROG_LOAD(true, 0, NULL, 0));
+
+static SPINAND_OP_VARIANTS(update_cache_variants,
+ SPINAND_PROG_LOAD_X4(false, 0, NULL, 0),
+ SPINAND_PROG_LOAD(false, 0, NULL, 0));
+
+static int xt26g0xa_ooblayout_ecc(struct mtd_info *mtd, int section,
+ struct mtd_oob_region *region)
+{
+ if (section)
+ return -ERANGE;
+
+ region->offset = 8;
+ region->length = 40;
+
+ return 0;
+}
+
+static int xt26g0xa_ooblayout_free(struct mtd_info *mtd, int section,
+ struct mtd_oob_region *region)
+{
+ if (section)
+ return -ERANGE;
+
+ region->offset = 1;
+ region->length = 7;
+
+ return 0;
+}
+
+static const struct mtd_ooblayout_ops xt26g0xa_ooblayout = {
+ .ecc = xt26g0xa_ooblayout_ecc,
+ .free = xt26g0xa_ooblayout_free,
+};
+
+static int xt26g0xa_ecc_get_status(struct spinand_device *spinand,
+ u8 status)
+{
+ switch (status & XT26G0XA_STATUS_ECC_MASK) {
+ case XT26G0XA_STATUS_ECC_NO_DETECTED:
+ return 0;
+ case XT26G0XA_STATUS_ECC_8_CORRECTED:
+ return 8;
+ case XT26G0XA_STATUS_ECC_UNCOR_ERROR:
+ return -EBADMSG;
+ default: /* (1 << 2) through (7 << 2) are 1-7 corrected errors */
+ return (status & XT26G0XA_STATUS_ECC_MASK) >> 2;
+ }
+
+ return -EINVAL;
+}
+
+static const struct spinand_info xtx_spinand_table[] = {
+ SPINAND_INFO("XT26G01A", 0xE1,
+ NAND_MEMORG(1, 2048, 64, 64, 1024, 20, 1, 1, 1),
+ NAND_ECCREQ(8, 512),
+ SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
+ &write_cache_variants,
+ &update_cache_variants),
+ SPINAND_HAS_QE_BIT,
+ SPINAND_ECCINFO(&xt26g0xa_ooblayout,
+ xt26g0xa_ecc_get_status)),
+ SPINAND_INFO("XT26G02A", 0xE2,
+ NAND_MEMORG(1, 2048, 64, 64, 2048, 40, 1, 1, 1),
+ NAND_ECCREQ(8, 512),
+ SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
+ &write_cache_variants,
+ &update_cache_variants),
+ SPINAND_HAS_QE_BIT,
+ SPINAND_ECCINFO(&xt26g0xa_ooblayout,
+ xt26g0xa_ecc_get_status)),
+ SPINAND_INFO("XT26G04A", 0xE3,
+ NAND_MEMORG(1, 2048, 64, 128, 2048, 40, 1, 1, 1),
+ NAND_ECCREQ(8, 512),
+ SPINAND_INFO_OP_VARIANTS(&read_cache_variants,
+ &write_cache_variants,
+ &update_cache_variants),
+ SPINAND_HAS_QE_BIT,
+ SPINAND_ECCINFO(&xt26g0xa_ooblayout,
+ xt26g0xa_ecc_get_status)),
+};
+
+static int xtx_spinand_detect(struct spinand_device *spinand)
+{
+ u8 *id = spinand->id.data;
+ int ret;
+
+ /*
+ * XTX SPI NAND read ID needs a dummy byte, so the first byte in
+ * raw_id is garbage.
+ */
+ if (id[1] != SPINAND_MFR_XTX)
+ return 0;
+
+ ret = spinand_match_and_init(spinand, xtx_spinand_table,
+ ARRAY_SIZE(xtx_spinand_table),
+ id[2]);
+ if (ret)
+ return ret;
+
+ return 1;
+}
+
+static const struct spinand_manufacturer_ops xtx_spinand_manuf_ops = {
+ .detect = xtx_spinand_detect,
+};
+
+const struct spinand_manufacturer xtx_spinand_manufacturer = {
+ .id = SPINAND_MFR_XTX,
+ .name = "XTX",
+ .ops = &xtx_spinand_manuf_ops,
+};
--- a/include/linux/mtd/spinand.h
+++ b/include/linux/mtd/spinand.h
@@ -230,6 +230,7 @@ extern const struct spinand_manufacturer
extern const struct spinand_manufacturer paragon_spinand_manufacturer;
extern const struct spinand_manufacturer toshiba_spinand_manufacturer;
extern const struct spinand_manufacturer winbond_spinand_manufacturer;
+extern const struct spinand_manufacturer xtx_spinand_manufacturer;
/**
* struct spinand_op_variants - SPI NAND operation variants

View File

@ -42,7 +42,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
if (netif_elide_gro(skb->dev))
goto normal;
@@ -7284,6 +7287,48 @@ static void __netdev_adjacent_dev_unlink
@@ -7291,6 +7294,48 @@ static void __netdev_adjacent_dev_unlink
&upper_dev->adj_list.lower);
}
@ -91,7 +91,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
static int __netdev_upper_dev_link(struct net_device *dev,
struct net_device *upper_dev, bool master,
void *upper_priv, void *upper_info,
@@ -7334,6 +7379,7 @@ static int __netdev_upper_dev_link(struc
@@ -7341,6 +7386,7 @@ static int __netdev_upper_dev_link(struc
if (ret)
return ret;
@ -99,7 +99,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
ret = call_netdevice_notifiers_info(NETDEV_CHANGEUPPER,
&changeupper_info.info);
ret = notifier_to_errno(ret);
@@ -7427,6 +7473,7 @@ void netdev_upper_dev_unlink(struct net_
@@ -7434,6 +7480,7 @@ void netdev_upper_dev_unlink(struct net_
__netdev_adjacent_dev_unlink_neighbour(dev, upper_dev);
@ -107,7 +107,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
call_netdevice_notifiers_info(NETDEV_CHANGEUPPER,
&changeupper_info.info);
@@ -8157,6 +8204,7 @@ int dev_set_mac_address(struct net_devic
@@ -8164,6 +8211,7 @@ int dev_set_mac_address(struct net_devic
if (err)
return err;
dev->addr_assign_type = NET_ADDR_SET;

View File

@ -15,8 +15,6 @@ Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
drivers/of/of_net.c | 75 ++++++++++++++++++++++++++++++++++++++++++++-
1 file changed, 74 insertions(+), 1 deletion(-)
diff --git a/drivers/of/of_net.c b/drivers/of/of_net.c
index 6e411821583e..f072e2509cc9 100644
--- a/drivers/of/of_net.c
+++ b/drivers/of/of_net.c
@@ -11,6 +11,7 @@
@ -27,7 +25,7 @@ index 6e411821583e..f072e2509cc9 100644
/**
* of_get_phy_mode - Get phy mode for given device_node
@@ -45,7 +46,7 @@ int of_get_phy_mode(struct device_node *np, phy_interface_t *interface)
@@ -39,7 +40,7 @@ int of_get_phy_mode(struct device_node *
}
EXPORT_SYMBOL_GPL(of_get_phy_mode);
@ -36,7 +34,7 @@ index 6e411821583e..f072e2509cc9 100644
{
struct property *pp = of_find_property(np, name, NULL);
@@ -78,6 +79,70 @@ static const void *of_get_mac_addr_nvmem(struct device_node *np)
@@ -72,6 +73,70 @@ static const void *of_get_mac_addr_nvmem
return mac;
}
@ -107,7 +105,7 @@ index 6e411821583e..f072e2509cc9 100644
/**
* Search the device tree for the best MAC address to use. 'mac-address' is
* checked first, because that is supposed to contain to "most recent" MAC
@@ -98,6 +163,10 @@ static const void *of_get_mac_addr_nvmem(struct device_node *np)
@@ -92,6 +157,10 @@ static const void *of_get_mac_addr_nvmem
* this case, the real MAC is in 'local-mac-address', and 'mac-address' exists
* but is all zeros.
*
@ -118,7 +116,7 @@ index 6e411821583e..f072e2509cc9 100644
* Return: Will be a valid pointer on success and ERR_PTR in case of error.
*/
const void *of_get_mac_address(struct device_node *np)
@@ -116,6 +185,10 @@ const void *of_get_mac_address(struct device_node *np)
@@ -110,6 +179,10 @@ const void *of_get_mac_address(struct de
if (addr)
return addr;
@ -129,6 +127,3 @@ index 6e411821583e..f072e2509cc9 100644
return of_get_mac_addr_nvmem(np);
}
EXPORT_SYMBOL(of_get_mac_address);
--
2.30.2

View File

@ -18,11 +18,9 @@ Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
drivers/of/of_net.c | 59 ++++++++++++++++++++++++++++++++++-----------
1 file changed, 45 insertions(+), 14 deletions(-)
diff --git a/drivers/of/of_net.c b/drivers/of/of_net.c
index f072e2509cc9..0dbd1f7ef396 100644
--- a/drivers/of/of_net.c
+++ b/drivers/of/of_net.c
@@ -55,31 +55,36 @@ static void *of_get_mac_addr(struct device_node *np, const char *name)
@@ -49,31 +49,36 @@ static void *of_get_mac_addr(struct devi
return NULL;
}
@ -67,7 +65,7 @@ index f072e2509cc9..0dbd1f7ef396 100644
{
#ifdef CONFIG_MTD
struct device_node *mtd_np = NULL;
@@ -167,28 +172,54 @@ static const void *of_get_mac_address_mtd(struct device_node *np)
@@ -161,28 +166,54 @@ free:
* If a mtd-mac-address property exists, try to fetch the MAC address from the
* specified mtd device, and store it as a 'mac-address' property
*
@ -128,6 +126,3 @@ index f072e2509cc9..0dbd1f7ef396 100644
+ return addr;
}
EXPORT_SYMBOL(of_get_mac_address);
--
2.30.2

View File

@ -107,7 +107,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
local_irq_save(flags);
____napi_schedule(this_cpu_ptr(&softnet_data), n);
local_irq_restore(flags);
@@ -5978,6 +5984,11 @@ EXPORT_SYMBOL(napi_schedule_prep);
@@ -5982,6 +5988,10 @@ EXPORT_SYMBOL(napi_schedule_prep);
*/
void __napi_schedule_irqoff(struct napi_struct *n)
{
@ -115,11 +115,10 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
+ queue_work(napi_workq, &n->work);
+ return;
+ }
+
____napi_schedule(this_cpu_ptr(&softnet_data), n);
}
EXPORT_SYMBOL(__napi_schedule_irqoff);
@@ -6239,9 +6250,89 @@ static void init_gro_hash(struct napi_st
if (!IS_ENABLED(CONFIG_PREEMPT_RT))
____napi_schedule(this_cpu_ptr(&softnet_data), n);
else
@@ -6246,9 +6256,89 @@ static void init_gro_hash(struct napi_st
napi->gro_bitmask = 0;
}
@ -209,7 +208,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
INIT_LIST_HEAD(&napi->poll_list);
hrtimer_init(&napi->timer, CLOCK_MONOTONIC, HRTIMER_MODE_REL_PINNED);
napi->timer.function = napi_watchdog;
@@ -6258,6 +6349,7 @@ void netif_napi_add(struct net_device *d
@@ -6265,6 +6355,7 @@ void netif_napi_add(struct net_device *d
#ifdef CONFIG_NETPOLL
napi->poll_owner = -1;
#endif
@ -217,7 +216,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
set_bit(NAPI_STATE_SCHED, &napi->state);
set_bit(NAPI_STATE_NPSVC, &napi->state);
list_add_rcu(&napi->dev_list, &dev->napi_list);
@@ -6298,6 +6390,7 @@ static void flush_gro_hash(struct napi_s
@@ -6305,6 +6396,7 @@ static void flush_gro_hash(struct napi_s
void netif_napi_del(struct napi_struct *napi)
{
might_sleep();
@ -225,7 +224,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
if (napi_hash_del(napi))
synchronize_net();
list_del_init(&napi->dev_list);
@@ -6310,50 +6403,18 @@ EXPORT_SYMBOL(netif_napi_del);
@@ -6317,50 +6409,18 @@ EXPORT_SYMBOL(netif_napi_del);
static int napi_poll(struct napi_struct *n, struct list_head *repoll)
{
@ -239,8 +238,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
have = netpoll_poll_lock(n);
- weight = n->weight;
+ work = __napi_poll(n, &do_repoll);
-
- /* This NAPI_STATE_SCHED test is for avoiding a race
- * with netpoll's poll_napi(). Only the entity which
- * obtains the lock and sees NAPI_STATE_SCHED set will
@ -254,7 +252,8 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
- }
-
- WARN_ON_ONCE(work > weight);
-
+ work = __napi_poll(n, &do_repoll);
- if (likely(work < weight))
- goto out_unlock;
-
@ -280,7 +279,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
/* Some drivers may have called napi_schedule
* prior to exhausting their budget.
@@ -10333,6 +10394,10 @@ static int __init net_dev_init(void)
@@ -10340,6 +10400,10 @@ static int __init net_dev_init(void)
sd->backlog.weight = weight_p;
}

View File

@ -39,7 +39,7 @@ Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
/* SFP module presence detection is poor: the three MOD DEF signals are
* the same length on the PCB, which means it's possible for MOD DEF 0 to
@@ -218,6 +228,7 @@ struct sfp {
@@ -219,6 +229,7 @@ struct sfp {
struct sfp_eeprom_id id;
unsigned int module_power_mW;
@ -47,7 +47,7 @@ Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
#if IS_ENABLED(CONFIG_HWMON)
struct sfp_diag diag;
@@ -1655,6 +1666,12 @@ static int sfp_sm_mod_probe(struct sfp *
@@ -1742,6 +1753,12 @@ static int sfp_sm_mod_probe(struct sfp *
if (ret < 0)
return ret;
@ -60,7 +60,7 @@ Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
return 0;
}
@@ -1860,11 +1877,12 @@ static void sfp_sm_main(struct sfp *sfp,
@@ -1947,11 +1964,12 @@ static void sfp_sm_main(struct sfp *sfp,
break;
if (sfp->state & SFP_F_TX_FAULT) {
@ -77,7 +77,7 @@ Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
if (timeout > T_WAIT)
timeout -= T_WAIT;
else
@@ -1881,8 +1899,8 @@ static void sfp_sm_main(struct sfp *sfp,
@@ -1968,8 +1986,8 @@ static void sfp_sm_main(struct sfp *sfp,
case SFP_S_INIT:
if (event == SFP_E_TIMEOUT && sfp->state & SFP_F_TX_FAULT) {
@ -88,7 +88,7 @@ Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
*/
sfp_sm_fault(sfp, SFP_S_INIT_TX_FAULT,
sfp->sm_retries == 5);
@@ -1901,7 +1919,7 @@ static void sfp_sm_main(struct sfp *sfp,
@@ -1988,7 +2006,7 @@ static void sfp_sm_main(struct sfp *sfp,
case SFP_S_INIT_TX_FAULT:
if (event == SFP_E_TIMEOUT) {
sfp_module_tx_fault_reset(sfp);
@ -97,7 +97,7 @@ Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
}
break;
@@ -1925,7 +1943,7 @@ static void sfp_sm_main(struct sfp *sfp,
@@ -2012,7 +2030,7 @@ static void sfp_sm_main(struct sfp *sfp,
case SFP_S_TX_FAULT:
if (event == SFP_E_TIMEOUT) {
sfp_module_tx_fault_reset(sfp);

View File

@ -30,7 +30,7 @@ Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
if (phylink_test(link_modes, 1000baseX_Full))
--- a/drivers/net/phy/sfp.c
+++ b/drivers/net/phy/sfp.c
@@ -1489,18 +1489,7 @@ static void sfp_sm_fault(struct sfp *sfp
@@ -1505,18 +1505,7 @@ static void sfp_sm_fault(struct sfp *sfp
static void sfp_sm_probe_for_phy(struct sfp *sfp)
{

View File

@ -132,7 +132,7 @@ Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
if (phylink_test(link_modes, 2500baseX_Full))
--- a/drivers/net/phy/sfp.c
+++ b/drivers/net/phy/sfp.c
@@ -242,7 +242,7 @@ struct sfp {
@@ -243,7 +243,7 @@ struct sfp {
static bool sff_module_supported(const struct sfp_eeprom_id *id)
{
@ -141,7 +141,7 @@ Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
id->base.phys_ext_id == SFP_PHYS_EXT_ID_SFP;
}
@@ -253,7 +253,7 @@ static const struct sff_data sff_data =
@@ -254,7 +254,7 @@ static const struct sff_data sff_data =
static bool sfp_module_supported(const struct sfp_eeprom_id *id)
{

View File

@ -78,7 +78,7 @@ Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
[SFP_S_WAIT] = "wait",
[SFP_S_INIT] = "init",
[SFP_S_INIT_TX_FAULT] = "init_tx_fault",
@@ -1831,6 +1833,8 @@ static void sfp_sm_main(struct sfp *sfp,
@@ -1918,6 +1920,8 @@ static void sfp_sm_main(struct sfp *sfp,
if (sfp->sm_state == SFP_S_LINK_UP &&
sfp->sm_dev_state == SFP_DEV_UP)
sfp_sm_link_down(sfp);
@ -87,7 +87,7 @@ Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
if (sfp->mod_phy)
sfp_sm_phy_detach(sfp);
sfp_module_tx_disable(sfp);
@@ -1898,6 +1902,10 @@ static void sfp_sm_main(struct sfp *sfp,
@@ -1985,6 +1989,10 @@ static void sfp_sm_main(struct sfp *sfp,
* clear. Probe for the PHY and check the LOS state.
*/
sfp_sm_probe_for_phy(sfp);

View File

@ -54,7 +54,7 @@ Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
.connect_phy = phylink_sfp_connect_phy,
--- a/drivers/net/phy/sfp.c
+++ b/drivers/net/phy/sfp.c
@@ -1396,7 +1396,6 @@ static void sfp_sm_mod_next(struct sfp *
@@ -1412,7 +1412,6 @@ static void sfp_sm_mod_next(struct sfp *
static void sfp_sm_phy_detach(struct sfp *sfp)
{
@ -62,7 +62,7 @@ Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
sfp_remove_phy(sfp->sfp_bus);
phy_device_remove(sfp->mod_phy);
phy_device_free(sfp->mod_phy);
@@ -1427,7 +1426,6 @@ static void sfp_sm_probe_phy(struct sfp
@@ -1443,7 +1442,6 @@ static void sfp_sm_probe_phy(struct sfp
}
sfp->mod_phy = phy;

View File

@ -14,7 +14,7 @@ Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
--- a/drivers/net/phy/sfp.c
+++ b/drivers/net/phy/sfp.c
@@ -1402,12 +1402,12 @@ static void sfp_sm_phy_detach(struct sfp
@@ -1418,12 +1418,12 @@ static void sfp_sm_phy_detach(struct sfp
sfp->mod_phy = NULL;
}
@ -29,7 +29,7 @@ Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
if (phy == ERR_PTR(-ENODEV)) {
dev_info(sfp->dev, "no PHY detected\n");
return;
@@ -1417,6 +1417,13 @@ static void sfp_sm_probe_phy(struct sfp
@@ -1433,6 +1433,13 @@ static void sfp_sm_probe_phy(struct sfp
return;
}
@ -43,7 +43,7 @@ Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
err = sfp_add_phy(sfp->sfp_bus, phy);
if (err) {
phy_device_remove(phy);
@@ -1487,10 +1494,32 @@ static void sfp_sm_fault(struct sfp *sfp
@@ -1503,10 +1510,32 @@ static void sfp_sm_fault(struct sfp *sfp
}
}
@ -78,7 +78,7 @@ Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
}
static int sfp_module_parse_power(struct sfp *sfp)
@@ -1550,6 +1579,13 @@ static int sfp_sm_mod_hpower(struct sfp
@@ -1566,6 +1595,13 @@ static int sfp_sm_mod_hpower(struct sfp
return -EAGAIN;
}

View File

@ -15,7 +15,7 @@ Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
--- a/drivers/net/phy/sfp.c
+++ b/drivers/net/phy/sfp.c
@@ -2344,6 +2344,10 @@ static int sfp_remove(struct platform_de
@@ -2431,6 +2431,10 @@ static int sfp_remove(struct platform_de
sfp_unregister_socket(sfp->sfp_bus);

View File

@ -15,7 +15,7 @@ Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
--- a/drivers/net/phy/sfp.c
+++ b/drivers/net/phy/sfp.c
@@ -1796,6 +1796,10 @@ static void sfp_sm_module(struct sfp *sf
@@ -1883,6 +1883,10 @@ static void sfp_sm_module(struct sfp *sf
break;
}
@ -26,7 +26,7 @@ Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
sfp_sm_mod_next(sfp, SFP_MOD_WAITDEV, 0);
/* fall through */
case SFP_MOD_WAITDEV:
@@ -1845,15 +1849,6 @@ static void sfp_sm_module(struct sfp *sf
@@ -1932,15 +1936,6 @@ static void sfp_sm_module(struct sfp *sf
case SFP_MOD_ERROR:
break;
}

View File

@ -26,7 +26,7 @@ Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
/* SFP module presence detection is poor: the three MOD DEF signals are
* the same length on the PCB, which means it's possible for MOD DEF 0 to
* connect before the I2C bus on MOD DEF 1/2.
@@ -1885,7 +1893,7 @@ static void sfp_sm_main(struct sfp *sfp,
@@ -1972,7 +1980,7 @@ static void sfp_sm_main(struct sfp *sfp,
sfp_module_tx_enable(sfp);
/* Initialise the fault clearance retries */
@ -35,7 +35,7 @@ Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
/* We need to check the TX_FAULT state, which is not defined
* while TX_DISABLE is asserted. The earliest we want to do
@@ -1925,7 +1933,7 @@ static void sfp_sm_main(struct sfp *sfp,
@@ -2012,7 +2020,7 @@ static void sfp_sm_main(struct sfp *sfp,
* or t_start_up, so assume there is a fault.
*/
sfp_sm_fault(sfp, SFP_S_INIT_TX_FAULT,
@ -44,7 +44,7 @@ Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
} else if (event == SFP_E_TIMEOUT || event == SFP_E_TX_CLEAR) {
init_done: /* TX_FAULT deasserted or we timed out with TX_FAULT
* clear. Probe for the PHY and check the LOS state.
@@ -1938,7 +1946,7 @@ static void sfp_sm_main(struct sfp *sfp,
@@ -2025,7 +2033,7 @@ static void sfp_sm_main(struct sfp *sfp,
sfp_sm_link_check_los(sfp);
/* Reset the fault retry count */

View File

@ -13,7 +13,7 @@ Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
--- a/drivers/net/phy/sfp.c
+++ b/drivers/net/phy/sfp.c
@@ -234,7 +234,7 @@ struct sfp {
@@ -235,7 +235,7 @@ struct sfp {
unsigned char sm_mod_tries;
unsigned char sm_dev_state;
unsigned short sm_state;
@ -22,7 +22,7 @@ Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
struct sfp_eeprom_id id;
unsigned int module_power_mW;
@@ -1490,7 +1490,7 @@ static bool sfp_los_event_inactive(struc
@@ -1506,7 +1506,7 @@ static bool sfp_los_event_inactive(struc
static void sfp_sm_fault(struct sfp *sfp, unsigned int next_state, bool warn)
{
@ -31,7 +31,7 @@ Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
dev_err(sfp->dev,
"module persistently indicates fault, disabling\n");
sfp_sm_next(sfp, SFP_S_TX_DISABLE, 0);
@@ -1893,7 +1893,7 @@ static void sfp_sm_main(struct sfp *sfp,
@@ -1980,7 +1980,7 @@ static void sfp_sm_main(struct sfp *sfp,
sfp_module_tx_enable(sfp);
/* Initialise the fault clearance retries */
@ -40,7 +40,7 @@ Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
/* We need to check the TX_FAULT state, which is not defined
* while TX_DISABLE is asserted. The earliest we want to do
@@ -1933,7 +1933,7 @@ static void sfp_sm_main(struct sfp *sfp,
@@ -2020,7 +2020,7 @@ static void sfp_sm_main(struct sfp *sfp,
* or t_start_up, so assume there is a fault.
*/
sfp_sm_fault(sfp, SFP_S_INIT_TX_FAULT,
@ -49,7 +49,7 @@ Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
} else if (event == SFP_E_TIMEOUT || event == SFP_E_TX_CLEAR) {
init_done: /* TX_FAULT deasserted or we timed out with TX_FAULT
* clear. Probe for the PHY and check the LOS state.
@@ -1946,7 +1946,7 @@ static void sfp_sm_main(struct sfp *sfp,
@@ -2033,7 +2033,7 @@ static void sfp_sm_main(struct sfp *sfp,
sfp_sm_link_check_los(sfp);
/* Reset the fault retry count */

View File

@ -10,7 +10,7 @@ Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
--- a/drivers/net/phy/sfp.c
+++ b/drivers/net/phy/sfp.c
@@ -1410,7 +1410,7 @@ static void sfp_sm_phy_detach(struct sfp
@@ -1426,7 +1426,7 @@ static void sfp_sm_phy_detach(struct sfp
sfp->mod_phy = NULL;
}
@ -19,7 +19,7 @@ Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
{
struct phy_device *phy;
int err;
@@ -1418,18 +1418,18 @@ static void sfp_sm_probe_phy(struct sfp
@@ -1434,18 +1434,18 @@ static void sfp_sm_probe_phy(struct sfp
phy = get_phy_device(sfp->i2c_mii, SFP_PHY_ADDR, is_c45);
if (phy == ERR_PTR(-ENODEV)) {
dev_info(sfp->dev, "no PHY detected\n");
@ -41,7 +41,7 @@ Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
}
err = sfp_add_phy(sfp->sfp_bus, phy);
@@ -1437,10 +1437,12 @@ static void sfp_sm_probe_phy(struct sfp
@@ -1453,10 +1453,12 @@ static void sfp_sm_probe_phy(struct sfp
phy_device_remove(phy);
phy_device_free(phy);
dev_err(sfp->dev, "sfp_add_phy failed: %d\n", err);
@ -55,7 +55,7 @@ Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
}
static void sfp_sm_link_up(struct sfp *sfp)
@@ -1513,21 +1515,24 @@ static void sfp_sm_fault(struct sfp *sfp
@@ -1529,21 +1531,24 @@ static void sfp_sm_fault(struct sfp *sfp
* Clause 45 copper SFP+ modules (10G) appear to switch their interface
* mode according to the negotiated line speed.
*/
@ -83,7 +83,7 @@ Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
}
static int sfp_module_parse_power(struct sfp *sfp)
@@ -1938,7 +1943,10 @@ static void sfp_sm_main(struct sfp *sfp,
@@ -2025,7 +2030,10 @@ static void sfp_sm_main(struct sfp *sfp,
init_done: /* TX_FAULT deasserted or we timed out with TX_FAULT
* clear. Probe for the PHY and check the LOS state.
*/

View File

@ -48,7 +48,7 @@ Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
/* SFP module presence detection is poor: the three MOD DEF signals are
* the same length on the PCB, which means it's possible for MOD DEF 0 to
* connect before the I2C bus on MOD DEF 1/2.
@@ -235,6 +243,7 @@ struct sfp {
@@ -236,6 +244,7 @@ struct sfp {
unsigned char sm_dev_state;
unsigned short sm_state;
unsigned char sm_fault_retries;
@ -56,7 +56,7 @@ Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
struct sfp_eeprom_id id;
unsigned int module_power_mW;
@@ -1416,10 +1425,8 @@ static int sfp_sm_probe_phy(struct sfp *
@@ -1432,10 +1441,8 @@ static int sfp_sm_probe_phy(struct sfp *
int err;
phy = get_phy_device(sfp->i2c_mii, SFP_PHY_ADDR, is_c45);
@ -69,7 +69,7 @@ Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
if (IS_ERR(phy)) {
dev_err(sfp->dev, "mdiobus scan returned %ld\n", PTR_ERR(phy));
return PTR_ERR(phy);
@@ -1867,6 +1874,7 @@ static void sfp_sm_module(struct sfp *sf
@@ -1954,6 +1961,7 @@ static void sfp_sm_module(struct sfp *sf
static void sfp_sm_main(struct sfp *sfp, unsigned int event)
{
unsigned long timeout;
@ -77,7 +77,7 @@ Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
/* Some events are global */
if (sfp->sm_state != SFP_S_DOWN &&
@@ -1940,22 +1948,39 @@ static void sfp_sm_main(struct sfp *sfp,
@@ -2027,22 +2035,39 @@ static void sfp_sm_main(struct sfp *sfp,
sfp_sm_fault(sfp, SFP_S_INIT_TX_FAULT,
sfp->sm_fault_retries == N_FAULT_INIT);
} else if (event == SFP_E_TIMEOUT || event == SFP_E_TX_CLEAR) {

View File

@ -25,7 +25,7 @@ Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
--- a/drivers/pci/quirks.c
+++ b/drivers/pci/quirks.c
@@ -205,6 +205,7 @@ static void quirk_mmio_always_on(struct
@@ -206,6 +206,7 @@ static void quirk_mmio_always_on(struct
DECLARE_PCI_FIXUP_CLASS_EARLY(PCI_ANY_ID, PCI_ANY_ID,
PCI_CLASS_BRIDGE_HOST, 8, quirk_mmio_always_on);
@ -33,7 +33,7 @@ Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
/*
* The Mellanox Tavor device gives false positive parity errors. Mark this
* device with a broken_parity_status to allow PCI scanning code to "skip"
@@ -3320,6 +3321,8 @@ DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_I
@@ -3321,6 +3322,8 @@ DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_I
DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x65f9, quirk_intel_mc_errata);
DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x65fa, quirk_intel_mc_errata);
@ -42,7 +42,7 @@ Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
/*
* Ivytown NTB BAR sizes are misreported by the hardware due to an erratum.
* To work around this, query the size it should be configured to by the
@@ -3345,6 +3348,8 @@ static void quirk_intel_ntb(struct pci_d
@@ -3346,6 +3349,8 @@ static void quirk_intel_ntb(struct pci_d
DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x0e08, quirk_intel_ntb);
DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x0e0d, quirk_intel_ntb);
@ -51,7 +51,7 @@ Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
/*
* Some BIOS implementations leave the Intel GPU interrupts enabled, even
* though no one is handling them (e.g., if the i915 driver is never
@@ -3383,6 +3388,8 @@ DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_IN
@@ -3384,6 +3389,8 @@ DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_IN
DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x010a, disable_igfx_irq);
DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_INTEL, 0x0152, disable_igfx_irq);

View File

@ -502,6 +502,7 @@ CONFIG_MFD_CORE=y
CONFIG_MFD_SYSCON=y
# CONFIG_MFD_VEXPRESS_SYSREG is not set
CONFIG_MICREL_PHY=y
CONFIG_MICROSEMI_PHY=y
CONFIG_MIGRATION=y
CONFIG_MMC=y
CONFIG_MMC_BLOCK=y

View File

@ -11,6 +11,7 @@ move_config() {
fsl,ls1021a-iot-sdboot | \
fsl,ls1021a-twr-sdboot | \
fsl,ls1043a-rdb-sdboot | \
fsl,ls1046a-frwy-sdboot | \
fsl,ls1046a-rdb-sdboot | \
fsl,ls1088a-rdb-sdboot)
if [ -b $BOOTPART ]; then

View File

@ -19,7 +19,7 @@ Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
--- a/drivers/pci/quirks.c
+++ b/drivers/pci/quirks.c
@@ -2523,6 +2523,8 @@ DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_VI
@@ -2524,6 +2524,8 @@ DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_VI
DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_VT3364, quirk_disable_all_msi);
DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_8380_0, quirk_disable_all_msi);
DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_SI, 0x0761, quirk_disable_all_msi);

View File

@ -17,7 +17,7 @@ Signed-off-by: Shrikant Bobade <Shrikant_Bobade@mentor.com>
--- a/drivers/pci/quirks.c
+++ b/drivers/pci/quirks.c
@@ -1356,6 +1356,10 @@ DECLARE_PCI_FIXUP_CLASS_EARLY(PCI_VENDOR
@@ -1357,6 +1357,10 @@ DECLARE_PCI_FIXUP_CLASS_EARLY(PCI_VENDOR
occur when mode detecting */
DECLARE_PCI_FIXUP_CLASS_EARLY(PCI_VENDOR_ID_VIA, PCI_ANY_ID,
PCI_CLASS_STORAGE_IDE, 8, quirk_no_ata_d3);

View File

@ -14,7 +14,7 @@ Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
--- a/drivers/pci/quirks.c
+++ b/drivers/pci/quirks.c
@@ -2529,6 +2529,9 @@ DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_VI
@@ -2530,6 +2530,9 @@ DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_VI
DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_SI, 0x0761, quirk_disable_all_msi);
DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_BROADCOM, 0x43ec, quirk_disable_all_msi);
DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_BROADCOM, 0x43ef, quirk_disable_all_msi);

View File

@ -27,7 +27,7 @@ Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
#include <linux/serial_core.h>
#include <linux/slab.h>
#include <linux/tty_flip.h>
@@ -2391,6 +2393,54 @@ static struct uart_driver lpuart_reg = {
@@ -2394,6 +2396,54 @@ static struct uart_driver lpuart_reg = {
.cons = LPUART_CONSOLE,
};
@ -82,7 +82,7 @@ Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
static int lpuart_probe(struct platform_device *pdev)
{
const struct of_device_id *of_id = of_match_device(lpuart_dt_ids,
@@ -2428,6 +2478,10 @@ static int lpuart_probe(struct platform_
@@ -2431,6 +2481,10 @@ static int lpuart_probe(struct platform_
sport->port.rs485_config = lpuart_config_rs485;

View File

@ -17,7 +17,7 @@ Signed-off-by: Adriana Reus <adriana.reus@nxp.com>
--- a/drivers/tty/serial/fsl_lpuart.c
+++ b/drivers/tty/serial/fsl_lpuart.c
@@ -2476,7 +2476,7 @@ static int lpuart_probe(struct platform_
@@ -2479,7 +2479,7 @@ static int lpuart_probe(struct platform_
return PTR_ERR(sport->port.membase);
sport->port.membase += sdata->reg_off;

View File

@ -536,7 +536,7 @@ Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
lpuart_dma_rx_free(&sport->port);
}
@@ -2480,6 +2636,10 @@ static int lpuart_probe(struct platform_
@@ -2483,6 +2639,10 @@ static int lpuart_probe(struct platform_
sport->port.dev = &pdev->dev;
sport->port.type = PORT_LPUART;
sport->devtype = sdata->devtype;
@ -547,7 +547,7 @@ Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
ret = platform_get_irq(pdev, 0);
if (ret < 0)
return ret;
@@ -2642,7 +2802,7 @@ static int lpuart_suspend(struct device
@@ -2645,7 +2805,7 @@ static int lpuart_suspend(struct device
* Rx DMA path before suspend and start Rx DMA path on resume.
*/
if (irq_wake) {

View File

@ -105,7 +105,7 @@ Signed-off-by: Shrikant Bobade <Shrikant_Bobade@mentor.com>
static void lpuart_stop_tx(struct uart_port *port)
{
unsigned char temp;
@@ -2728,6 +2770,10 @@ static int lpuart_probe(struct platform_
@@ -2731,6 +2773,10 @@ static int lpuart_probe(struct platform_
if (ret)
goto failed_attach_port;
@ -116,7 +116,7 @@ Signed-off-by: Shrikant Bobade <Shrikant_Bobade@mentor.com>
uart_get_rs485_mode(&pdev->dev, &sport->port.rs485);
if (sport->port.rs485.flags & SER_RS485_RX_DURING_TX)
@@ -2751,6 +2797,8 @@ static int lpuart_probe(struct platform_
@@ -2754,6 +2800,8 @@ static int lpuart_probe(struct platform_
return 0;

View File

@ -59,7 +59,7 @@ Reviewed-by: Robin Gong <yibin.gong@nxp.com>
.set_termios = lpuart32_set_termios,
.type = lpuart_type,
.request_port = lpuart_request_port,
@@ -2766,6 +2783,11 @@ static int lpuart_probe(struct platform_
@@ -2769,6 +2786,11 @@ static int lpuart_probe(struct platform_
if (ret)
goto failed_irq_request;
@ -71,7 +71,7 @@ Reviewed-by: Robin Gong <yibin.gong@nxp.com>
ret = uart_add_one_port(&lpuart_reg, &sport->port);
if (ret)
goto failed_attach_port;
@@ -2800,6 +2822,9 @@ static int lpuart_probe(struct platform_
@@ -2803,6 +2825,9 @@ static int lpuart_probe(struct platform_
failed_reset:
uart_remove_one_port(&lpuart_reg, &sport->port);
failed_attach_port:
@ -81,7 +81,7 @@ Reviewed-by: Robin Gong <yibin.gong@nxp.com>
failed_irq_request:
lpuart_disable_clks(sport);
failed_clock_enable:
@@ -2826,15 +2851,41 @@ static int lpuart_remove(struct platform
@@ -2829,15 +2854,41 @@ static int lpuart_remove(struct platform
if (sport->dma_rx_chan)
dma_release_channel(sport->dma_rx_chan);
@ -123,7 +123,7 @@ Reviewed-by: Robin Gong <yibin.gong@nxp.com>
if (lpuart_is_32(sport)) {
/* disable Rx/Tx and interrupts */
@@ -2848,10 +2899,14 @@ static int lpuart_suspend(struct device
@@ -2851,10 +2902,14 @@ static int lpuart_suspend(struct device
writeb(temp, sport->port.membase + UARTCR2);
}
@ -138,7 +138,7 @@ Reviewed-by: Robin Gong <yibin.gong@nxp.com>
if (sport->lpuart_dma_rx_use) {
/*
@@ -2882,9 +2937,6 @@ static int lpuart_suspend(struct device
@@ -2885,9 +2940,6 @@ static int lpuart_suspend(struct device
dmaengine_terminate_all(sport->dma_tx_chan);
}
@ -148,7 +148,7 @@ Reviewed-by: Robin Gong <yibin.gong@nxp.com>
return 0;
}
@@ -2892,9 +2944,11 @@ static int lpuart_resume(struct device *
@@ -2895,9 +2947,11 @@ static int lpuart_resume(struct device *
{
struct lpuart_port *sport = dev_get_drvdata(dev);
bool irq_wake = irqd_is_wakeup_set(irq_get_irq_data(sport->port.irq));
@ -162,7 +162,7 @@ Reviewed-by: Robin Gong <yibin.gong@nxp.com>
if (lpuart_is_32(sport))
lpuart32_setup_watermark_enable(sport);
@@ -2915,13 +2969,23 @@ static int lpuart_resume(struct device *
@@ -2918,13 +2972,23 @@ static int lpuart_resume(struct device *
if (lpuart_is_32(sport))
lpuart32_configure(sport);
@ -188,7 +188,7 @@ Reviewed-by: Robin Gong <yibin.gong@nxp.com>
static struct platform_driver lpuart_driver = {
.probe = lpuart_probe,
@@ -2929,7 +2993,7 @@ static struct platform_driver lpuart_dri
@@ -2932,7 +2996,7 @@ static struct platform_driver lpuart_dri
.driver = {
.name = "fsl-lpuart",
.of_match_table = lpuart_dt_ids,

View File

@ -117,7 +117,7 @@ Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
return 0;
}
@@ -2876,108 +2890,205 @@ static int lpuart_runtime_resume(struct
@@ -2879,108 +2893,205 @@ static int lpuart_runtime_resume(struct
return lpuart_enable_clks(sport);
};

View File

@ -24,7 +24,7 @@ Signed-off-by: Peng Fan <peng.fan@nxp.com>
--- a/drivers/tty/serial/fsl_lpuart.c
+++ b/drivers/tty/serial/fsl_lpuart.c
@@ -2614,7 +2614,9 @@ static int __init lpuart32_early_console
@@ -2617,7 +2617,9 @@ static int __init lpuart32_early_console
if (!device->port.membase)
return -ENODEV;

View File

@ -0,0 +1,54 @@
From 3a70dd2d050331ee4cf5ad9d5c0a32d83ead9a43 Mon Sep 17 00:00:00 2001
From: Peter Hess <peter.hess@ph-home.de>
Date: Tue, 6 Jul 2021 14:16:09 +0200
Subject: spi: mediatek: fix fifo rx mode
In FIFO mode were two problems:
- RX mode was never handled and
- in this case the tx_buf pointer was NULL and caused an exception
fix this by handling RX mode in mtk_spi_fifo_transfer
Fixes: a568231f4632 ("spi: mediatek: Add spi bus for Mediatek MT8173")
Signed-off-by: Peter Hess <peter.hess@ph-home.de>
Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
Link: https://lore.kernel.org/r/20210706121609.680534-1-linux@fw-web.de
Signed-off-by: Mark Brown <broonie@kernel.org>
---
drivers/spi/spi-mt65xx.c | 16 +++++++++++++---
1 file changed, 13 insertions(+), 3 deletions(-)
diff --git a/drivers/spi/spi-mt65xx.c b/drivers/spi/spi-mt65xx.c
index 976f73b9e2998..8d5fa7f1e5069 100644
--- a/drivers/spi/spi-mt65xx.c
+++ b/drivers/spi/spi-mt65xx.c
@@ -427,13 +427,23 @@ static int mtk_spi_fifo_transfer(struct spi_master *master,
mtk_spi_setup_packet(master);
cnt = xfer->len / 4;
- iowrite32_rep(mdata->base + SPI_TX_DATA_REG, xfer->tx_buf, cnt);
+ if (xfer->tx_buf)
+ iowrite32_rep(mdata->base + SPI_TX_DATA_REG, xfer->tx_buf, cnt);
+
+ if (xfer->rx_buf)
+ ioread32_rep(mdata->base + SPI_RX_DATA_REG, xfer->rx_buf, cnt);
remainder = xfer->len % 4;
if (remainder > 0) {
reg_val = 0;
- memcpy(&reg_val, xfer->tx_buf + (cnt * 4), remainder);
- writel(reg_val, mdata->base + SPI_TX_DATA_REG);
+ if (xfer->tx_buf) {
+ memcpy(&reg_val, xfer->tx_buf + (cnt * 4), remainder);
+ writel(reg_val, mdata->base + SPI_TX_DATA_REG);
+ }
+ if (xfer->rx_buf) {
+ reg_val = readl(mdata->base + SPI_RX_DATA_REG);
+ memcpy(xfer->rx_buf + (cnt * 4), &reg_val, remainder);
+ }
}
mtk_spi_enable_transfer(master);
--
cgit 1.2.3-1.el7

View File

@ -18,8 +18,8 @@ Signed-off-by: Davide Fioravanti <pantanastyle@gmail.com>
+++ b/drivers/mtd/nand/spi/Makefile
@@ -1,3 +1,3 @@
# SPDX-License-Identifier: GPL-2.0
-spinand-objs := core.o gigadevice.o macronix.o micron.o paragon.o toshiba.o winbond.o
+spinand-objs := core.o fidelix.o gigadevice.o macronix.o micron.o paragon.o toshiba.o winbond.o
-spinand-objs := core.o gigadevice.o macronix.o micron.o paragon.o toshiba.o winbond.o xtx.o
+spinand-objs := core.o fidelix.o gigadevice.o macronix.o micron.o paragon.o toshiba.o winbond.o xtx.o
obj-$(CONFIG_MTD_SPI_NAND) += spinand.o
--- a/drivers/mtd/nand/spi/core.c
+++ b/drivers/mtd/nand/spi/core.c

View File

@ -9,10 +9,11 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
---
--- a/drivers/net/ethernet/marvell/mvneta.c
+++ b/drivers/net/ethernet/marvell/mvneta.c
@@ -4903,6 +4903,14 @@ static int mvneta_ethtool_set_eee(struct
@@ -4903,6 +4903,16 @@ static int mvneta_ethtool_set_eee(struct
return phylink_ethtool_set_eee(pp->phylink, eee);
}
+#ifndef CONFIG_ARM64
+static u16 mvneta_select_queue(struct net_device *dev, struct sk_buff *skb,
+ struct net_device *sb_dev)
+{
@ -20,15 +21,18 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
+ * use only one queue until it is fixed */
+ return 0;
+}
+#endif
+
static const struct net_device_ops mvneta_netdev_ops = {
.ndo_open = mvneta_open,
.ndo_stop = mvneta_stop,
@@ -4913,6 +4921,7 @@ static const struct net_device_ops mvnet
@@ -4913,6 +4923,9 @@ static const struct net_device_ops mvnet
.ndo_fix_features = mvneta_fix_features,
.ndo_get_stats64 = mvneta_get_stats64,
.ndo_do_ioctl = mvneta_ioctl,
+#ifndef CONFIG_ARM64
+ .ndo_select_queue = mvneta_select_queue,
+#endif
.ndo_bpf = mvneta_xdp,
.ndo_xdp_xmit = mvneta_xdp_xmit,
};

View File

@ -33,7 +33,7 @@ Acked-by: Thomas Petazzoni <thomas.petazzoni@bootlin.com>
--- a/drivers/pci/controller/pci-aardvark.c
+++ b/drivers/pci/controller/pci-aardvark.c
@@ -338,6 +338,14 @@ static void advk_pcie_setup_hw(struct ad
@@ -349,6 +349,14 @@ static void advk_pcie_setup_hw(struct ad
reg |= PIO_CTRL_ADDR_WIN_DISABLE;
advk_writel(pcie, reg, PIO_CTRL);

View File

@ -29,7 +29,7 @@ Acked-by: Thomas Petazzoni <thomas.petazzoni@bootlin.com>
--- a/drivers/pci/controller/pci-aardvark.c
+++ b/drivers/pci/controller/pci-aardvark.c
@@ -300,11 +300,6 @@ static void advk_pcie_setup_hw(struct ad
@@ -311,11 +311,6 @@ static void advk_pcie_setup_hw(struct ad
reg |= LANE_COUNT_1;
advk_writel(pcie, reg, PCIE_CORE_CTRL0_REG);
@ -41,7 +41,7 @@ Acked-by: Thomas Petazzoni <thomas.petazzoni@bootlin.com>
/* Enable MSI */
reg = advk_readl(pcie, PCIE_CORE_CTRL2_REG);
reg |= PCIE_CORE_CTRL2_MSI_ENABLE;
@@ -346,7 +341,15 @@ static void advk_pcie_setup_hw(struct ad
@@ -357,7 +352,15 @@ static void advk_pcie_setup_hw(struct ad
*/
msleep(PCI_PM_D3COLD_WAIT);

View File

@ -42,7 +42,7 @@ Acked-by: Thomas Petazzoni <thomas.petazzoni@bootlin.com>
#define PCIE_CORE_LINK_WIDTH_SHIFT 20
#define PCIE_CORE_ERR_CAPCTL_REG 0x118
#define PCIE_CORE_ERR_CAPCTL_ECRC_CHK_TX BIT(5)
@@ -201,6 +202,7 @@ struct advk_pcie {
@@ -202,6 +203,7 @@ struct advk_pcie {
struct mutex msi_used_lock;
u16 msi_msg;
int root_bus_nr;
@ -50,7 +50,7 @@ Acked-by: Thomas Petazzoni <thomas.petazzoni@bootlin.com>
struct pci_bridge_emul bridge;
};
@@ -225,20 +227,16 @@ static int advk_pcie_link_up(struct advk
@@ -226,20 +228,16 @@ static int advk_pcie_link_up(struct advk
static int advk_pcie_wait_for_link(struct advk_pcie *pcie)
{
@ -72,7 +72,7 @@ Acked-by: Thomas Petazzoni <thomas.petazzoni@bootlin.com>
return -ETIMEDOUT;
}
@@ -253,6 +251,85 @@ static void advk_pcie_wait_for_retrain(s
@@ -254,6 +252,85 @@ static void advk_pcie_wait_for_retrain(s
}
}
@ -158,7 +158,7 @@ Acked-by: Thomas Petazzoni <thomas.petazzoni@bootlin.com>
static void advk_pcie_setup_hw(struct advk_pcie *pcie)
{
u32 reg;
@@ -288,12 +365,6 @@ static void advk_pcie_setup_hw(struct ad
@@ -299,12 +376,6 @@ static void advk_pcie_setup_hw(struct ad
PCIE_CORE_CTRL2_TD_ENABLE;
advk_writel(pcie, reg, PCIE_CORE_CTRL2_REG);
@ -171,7 +171,7 @@ Acked-by: Thomas Petazzoni <thomas.petazzoni@bootlin.com>
/* Set lane X1 */
reg = advk_readl(pcie, PCIE_CORE_CTRL0_REG);
reg &= ~LANE_CNT_MSK;
@@ -341,20 +412,7 @@ static void advk_pcie_setup_hw(struct ad
@@ -352,20 +423,7 @@ static void advk_pcie_setup_hw(struct ad
*/
msleep(PCI_PM_D3COLD_WAIT);
@ -193,7 +193,7 @@ Acked-by: Thomas Petazzoni <thomas.petazzoni@bootlin.com>
reg = advk_readl(pcie, PCIE_CORE_CMD_STATUS_REG);
reg |= PCIE_CORE_CMD_MEM_ACCESS_EN |
@@ -1066,6 +1124,12 @@ static int advk_pcie_probe(struct platfo
@@ -1077,6 +1135,12 @@ static int advk_pcie_probe(struct platfo
return ret;
}

View File

@ -48,7 +48,7 @@ Acked-by: Thomas Petazzoni <thomas.petazzoni@bootlin.com>
#include <linux/of_pci.h>
#include "../pci.h"
@@ -204,6 +206,7 @@ struct advk_pcie {
@@ -205,6 +207,7 @@ struct advk_pcie {
int root_bus_nr;
int link_gen;
struct pci_bridge_emul bridge;
@ -56,7 +56,7 @@ Acked-by: Thomas Petazzoni <thomas.petazzoni@bootlin.com>
};
static inline void advk_writel(struct advk_pcie *pcie, u32 val, u64 reg)
@@ -330,10 +333,31 @@ err:
@@ -331,10 +334,31 @@ err:
dev_err(dev, "link never came up\n");
}
@ -88,7 +88,7 @@ Acked-by: Thomas Petazzoni <thomas.petazzoni@bootlin.com>
/* Set to Direct mode */
reg = advk_readl(pcie, CTRL_CONFIG_REG);
reg &= ~(CTRL_MODE_MASK << CTRL_MODE_SHIFT);
@@ -406,7 +430,8 @@ static void advk_pcie_setup_hw(struct ad
@@ -417,7 +441,8 @@ static void advk_pcie_setup_hw(struct ad
/*
* PERST# signal could have been asserted by pinctrl subsystem before
@ -98,7 +98,7 @@ Acked-by: Thomas Petazzoni <thomas.petazzoni@bootlin.com>
* fundamental reset. As required by PCI Express spec a delay for at
* least 100ms after such a reset before link training is needed.
*/
@@ -1124,6 +1149,22 @@ static int advk_pcie_probe(struct platfo
@@ -1135,6 +1160,22 @@ static int advk_pcie_probe(struct platfo
return ret;
}

View File

@ -56,7 +56,7 @@ Cc: Miquèl Raynal <miquel.raynal@bootlin.com>
#define PCIE_MSG_LOG_REG (CONTROL_BASE_ADDR + 0x30)
#define PCIE_ISR0_REG (CONTROL_BASE_ADDR + 0x40)
#define PCIE_MSG_PM_PME_MASK BIT(7)
@@ -207,6 +210,7 @@ struct advk_pcie {
@@ -208,6 +211,7 @@ struct advk_pcie {
int link_gen;
struct pci_bridge_emul bridge;
struct gpio_desc *reset_gpio;
@ -64,7 +64,7 @@ Cc: Miquèl Raynal <miquel.raynal@bootlin.com>
};
static inline void advk_writel(struct advk_pcie *pcie, u32 val, u64 reg)
@@ -358,6 +362,11 @@ static void advk_pcie_setup_hw(struct ad
@@ -359,6 +363,11 @@ static void advk_pcie_setup_hw(struct ad
advk_pcie_issue_perst(pcie);
@ -76,7 +76,7 @@ Cc: Miquèl Raynal <miquel.raynal@bootlin.com>
/* Set to Direct mode */
reg = advk_readl(pcie, CTRL_CONFIG_REG);
reg &= ~(CTRL_MODE_MASK << CTRL_MODE_SHIFT);
@@ -1114,6 +1123,62 @@ out_release_res:
@@ -1125,6 +1134,62 @@ out_release_res:
return err;
}
@ -139,7 +139,7 @@ Cc: Miquèl Raynal <miquel.raynal@bootlin.com>
static int advk_pcie_probe(struct platform_device *pdev)
{
struct device *dev = &pdev->dev;
@@ -1171,6 +1236,10 @@ static int advk_pcie_probe(struct platfo
@@ -1182,6 +1247,10 @@ static int advk_pcie_probe(struct platfo
else
pcie->link_gen = ret;

View File

@ -34,7 +34,7 @@ Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
--- a/drivers/pci/controller/pci-aardvark.c
+++ b/drivers/pci/controller/pci-aardvark.c
@@ -639,6 +639,13 @@ static bool advk_pcie_valid_device(struc
@@ -650,6 +650,13 @@ static bool advk_pcie_valid_device(struc
if ((bus->number == pcie->root_bus_nr) && PCI_SLOT(devfn) != 0)
return false;

View File

@ -31,7 +31,7 @@ Cc: <stable@vger.kernel.org> # 5.8+: ea17a0f153af: phy: marvell: comphy: Convert
--- a/drivers/pci/controller/pci-aardvark.c
+++ b/drivers/pci/controller/pci-aardvark.c
@@ -1154,7 +1154,9 @@ static int advk_pcie_enable_phy(struct a
@@ -1165,7 +1165,9 @@ static int advk_pcie_enable_phy(struct a
}
ret = phy_power_on(pcie->phy);

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@ -9,10 +9,11 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
---
--- a/drivers/net/ethernet/marvell/mvneta.c
+++ b/drivers/net/ethernet/marvell/mvneta.c
@@ -4691,6 +4691,14 @@ static int mvneta_ethtool_set_eee(struct
@@ -4691,6 +4691,16 @@ static int mvneta_ethtool_set_eee(struct
return phylink_ethtool_set_eee(pp->phylink, eee);
}
+#ifndef CONFIG_ARM64
+static u16 mvneta_select_queue(struct net_device *dev, struct sk_buff *skb,
+ struct net_device *sb_dev)
+{
@ -20,15 +21,18 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
+ * use only one queue until it is fixed */
+ return 0;
+}
+#endif
+
static const struct net_device_ops mvneta_netdev_ops = {
.ndo_open = mvneta_open,
.ndo_stop = mvneta_stop,
@@ -4701,6 +4709,7 @@ static const struct net_device_ops mvnet
@@ -4701,6 +4711,9 @@ static const struct net_device_ops mvnet
.ndo_fix_features = mvneta_fix_features,
.ndo_get_stats64 = mvneta_get_stats64,
.ndo_do_ioctl = mvneta_ioctl,
+#ifndef CONFIG_ARM64
+ .ndo_select_queue = mvneta_select_queue,
+#endif
.ndo_bpf = mvneta_xdp,
.ndo_xdp_xmit = mvneta_xdp_xmit,
};

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@ -21,8 +21,8 @@ Signed-off-by: Tim Harvey <tharvey@gateworks.com>
+#include <linux/of.h>
#include <linux/platform_data/x86/apple.h>
#include <linux/pm_runtime.h>
#include <linux/switchtec.h>
@@ -5714,3 +5715,34 @@ static void apex_pci_fixup_class(struct
#include <linux/suspend.h>
@@ -5725,3 +5726,34 @@ static void apex_pci_fixup_class(struct
}
DECLARE_PCI_FIXUP_CLASS_HEADER(0x1ac1, 0x089a,
PCI_CLASS_NOT_DEFINED, 8, apex_pci_fixup_class);

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@ -64,7 +64,7 @@ Signed-off-by: John Crispin <blogic@openwrt.org>
#include <media/v4l2-common.h>
@@ -1156,9 +1161,149 @@ static void uvc_video_decode_data(struct
@@ -1183,9 +1188,149 @@ static void uvc_video_decode_data(struct
uvc_urb->async_operations++;
}
@ -214,7 +214,7 @@ Signed-off-by: John Crispin <blogic@openwrt.org>
/* Mark the buffer as done if the EOF marker is set. */
if (data[1] & UVC_STREAM_EOF && buf->bytesused != 0) {
uvc_trace(UVC_TRACE_FRAME, "Frame complete (EOF found).\n");
@@ -1715,6 +1860,8 @@ static int uvc_init_video_isoc(struct uv
@@ -1742,6 +1887,8 @@ static int uvc_init_video_isoc(struct uv
if (npackets == 0)
return -ENOMEM;

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@ -1,13 +0,0 @@
set_preinit_iface() {
# Create a switch on lan1 to configure the VLAN 1.
# Without configuring VLAN ID 1 RTL8380 - RTL9300 will not
# forward packets.
ip link add name switch type bridge vlan_filtering 1
ip link set dev lan1 master switch
ip link set lan1 up
pi_ifname=switch
}
boot_hook_add preinit_main set_preinit_iface

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@ -1,6 +0,0 @@
remove_switch() {
# delete switch created in 05_set_preinit_iface_realtek again
ip link del name switch
}
boot_hook_add preinit_main remove_switch

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@ -134,6 +134,10 @@ static void rtl83xx_vlan_setup(struct rtl838x_switch_priv *priv)
for (i = 0; i < MAX_VLANS; i ++)
priv->r->vlan_set_tagged(i, &info);
// reset PVIDs; defaults to 1 on reset
for (i = 0; i <= priv->ds->num_ports; i++)
sw_w32(0, priv->r->vlan_port_pb + (i << 2));
// Set forwarding action based on inner VLAN tag
for (i = 0; i < priv->cpu_port; i++)
priv->r->vlan_fwd_on_inner(i, true);
@ -909,9 +913,6 @@ static void rtl83xx_vlan_add(struct dsa_switch *ds, int port,
}
for (v = vlan->vid_begin; v <= vlan->vid_end; v++) {
if (!v)
continue;
/* Get port memberships of this vlan */
priv->r->vlan_tables_read(v, &info);
@ -971,9 +972,7 @@ static int rtl83xx_vlan_del(struct dsa_switch *ds, int port,
/* remove port from both tables */
info.untagged_ports &= (~BIT_ULL(port));
/* always leave vid 1 */
if (v != 1)
info.tagged_ports &= (~BIT_ULL(port));
info.tagged_ports &= (~BIT_ULL(port));
priv->r->vlan_set_untagged(v, info.untagged_ports);
pr_debug("Untagged ports, VLAN %d: %llx\n", v, info.untagged_ports);

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@ -21,6 +21,10 @@ choice
config BINUTILS_USE_VERSION_2_36_1
bool "Binutils 2.36.1"
select BINUTILS_VERSION_2_36_1
config BINUTILS_USE_VERSION_2_37
bool "Binutils 2.37"
select BINUTILS_VERSION_2_37
endchoice
config EXTRA_BINUTILS_CONFIG_OPTIONS

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@ -11,9 +11,13 @@ config BINUTILS_VERSION_2_35_2
config BINUTILS_VERSION_2_36_1
bool
config BINUTILS_VERSION_2_37
bool
config BINUTILS_VERSION
string
default "2.32" if BINUTILS_VERSION_2_32
default "2.34" if BINUTILS_VERSION_2_34
default "2.35.2" if BINUTILS_VERSION_2_35_2
default "2.36.1" if BINUTILS_VERSION_2_36_1
default "2.37" if BINUTILS_VERSION_2_37

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@ -31,6 +31,10 @@ ifeq ($(PKG_VERSION),2.36.1)
PKG_HASH:=e81d9edf373f193af428a0f256674aea62a9d74dfe93f65192d4eae030b0f3b0
endif
ifeq ($(PKG_VERSION),2.37)
PKG_HASH:=820d9724f020a3e69cb337893a0b63c2db161dadcb0e06fc11dc29eb1e84a32c
endif
HOST_BUILD_PARALLEL:=1
PATCH_DIR:=./patches/$(PKG_VERSION)

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@ -0,0 +1,22 @@
--- a/ld/Makefile.am
+++ b/ld/Makefile.am
@@ -50,7 +50,7 @@ AM_CFLAGS = $(WARN_CFLAGS) $(ELF_CLFAGS)
# We put the scripts in the directory $(scriptdir)/ldscripts.
# We can't put the scripts in $(datadir) because the SEARCH_DIR
# directives need to be different for native and cross linkers.
-scriptdir = $(tooldir)/lib
+scriptdir = $(libdir)
EMUL = @EMUL@
EMULATION_OFILES = @EMULATION_OFILES@
--- a/ld/Makefile.in
+++ b/ld/Makefile.in
@@ -561,7 +561,7 @@ AM_CFLAGS = $(WARN_CFLAGS) $(ELF_CLFAGS)
# We put the scripts in the directory $(scriptdir)/ldscripts.
# We can't put the scripts in $(datadir) because the SEARCH_DIR
# directives need to be different for native and cross linkers.
-scriptdir = $(tooldir)/lib
+scriptdir = $(libdir)
BASEDIR = $(srcdir)/..
BFDDIR = $(BASEDIR)/bfd
INCDIR = $(BASEDIR)/include

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@ -0,0 +1,18 @@
--- a/bfd/elfxx-mips.c
+++ b/bfd/elfxx-mips.c
@@ -8057,6 +8057,7 @@ _bfd_mips_elf_create_dynamic_sections (b
name = SGI_COMPAT (abfd) ? "_DYNAMIC_LINK" : "_DYNAMIC_LINKING";
bh = NULL;
+ if (0) {
if (!(_bfd_generic_link_add_one_symbol
(info, abfd, name, BSF_GLOBAL, bfd_abs_section_ptr, 0,
NULL, false, get_elf_backend_data (abfd)->collect, &bh)))
@@ -8069,6 +8070,7 @@ _bfd_mips_elf_create_dynamic_sections (b
if (! bfd_elf_link_record_dynamic_symbol (info, h))
return false;
+ }
if (! mips_elf_hash_table (info)->use_rld_obj_head)
{

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@ -0,0 +1,38 @@
--- a/bfd/config.bfd
+++ b/bfd/config.bfd
@@ -891,12 +891,12 @@ case "${targ}" in
targ_selvecs="mips_elf32_le_vec mips_elf64_be_vec mips_elf64_le_vec mips_ecoff_be_vec mips_ecoff_le_vec"
;;
mips64*el-*-linux*)
- targ_defvec=mips_elf32_ntrad_le_vec
- targ_selvecs="mips_elf32_ntrad_be_vec mips_elf32_trad_le_vec mips_elf32_trad_be_vec mips_elf64_trad_le_vec mips_elf64_trad_be_vec"
+ targ_defvec=mips_elf64_trad_le_vec
+ targ_selvecs="mips_elf32_ntrad_le_vec mips_elf32_ntrad_be_vec mips_elf32_trad_le_vec mips_elf32_trad_be_vec mips_elf64_trad_be_vec"
;;
mips64*-*-linux*)
- targ_defvec=mips_elf32_ntrad_be_vec
- targ_selvecs="mips_elf32_ntrad_le_vec mips_elf32_trad_be_vec mips_elf32_trad_le_vec mips_elf64_trad_be_vec mips_elf64_trad_le_vec"
+ targ_defvec=mips_elf64_trad_be_vec
+ targ_selvecs="mips_elf32_ntrad_be_vec mips_elf32_ntrad_le_vec mips_elf32_trad_be_vec mips_elf32_trad_le_vec mips_elf64_trad_le_vec"
;;
mips*el-*-linux*)
targ_defvec=mips_elf32_trad_le_vec
--- a/ld/configure.tgt
+++ b/ld/configure.tgt
@@ -530,12 +530,12 @@ mips*-*-vxworks*) targ_emul=elf32ebmipvx
;;
mips*-*-windiss) targ_emul=elf32mipswindiss
;;
-mips64*el-*-linux-*) targ_emul=elf32ltsmipn32
- targ_extra_emuls="elf32btsmipn32 elf32ltsmip elf32btsmip elf64ltsmip elf64btsmip"
+mips64*el-*-linux-*) targ_emul=elf64ltsmip
+ targ_extra_emuls="elf32btsmipn32 elf32ltsmipn32 elf32ltsmip elf32btsmip elf64btsmip"
targ_extra_libpath=$targ_extra_emuls
;;
-mips64*-*-linux-*) targ_emul=elf32btsmipn32
- targ_extra_emuls="elf32ltsmipn32 elf32btsmip elf32ltsmip elf64btsmip elf64ltsmip"
+mips64*-*-linux-*) targ_emul=elf64btsmip
+ targ_extra_emuls="elf32btsmipn32 elf32ltsmipn32 elf32btsmip elf32ltsmip elf64ltsmip"
targ_extra_libpath=$targ_extra_emuls
;;
mips*el-*-linux-*) targ_emul=elf32ltsmip