fish/immortalwrt
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

Merge Official Source

Browse Source
This commit is contained in:
AmadeusGhost 2020-06-08 18:00:02 +08:00
commit edefc5885e
38 changed files with 8643 additions and 125 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

30
package/kernel/bcm27xx-gpu-fw/Makefile
View File

@ -2,8 +2,8 @@ include $(TOPDIR)/rules.mk
include $(INCLUDE_DIR)/kernel.mk
PKG_NAME:=bcm27xx-gpu-fw
PKG_VERSION:=2020-05-27
PKG_RELEASE:=62fc8c01165a80021054a430182b504f7b877c2d
PKG_VERSION:=2020-04-15
PKG_RELEASE:=9e3c23ce779e8cf44c33d6a25bba249319207f68
PKG_BUILD_DIR:=$(KERNEL_BUILD_DIR)/$(PKG_NAME)/rpi-firmware-$(PKG_RELEASE)
@ -26,7 +26,7 @@ define Download/bootcode_bin
FILE:=$(RPI_FIRMWARE_FILE)-bootcode.bin
URL:=$(RPI_FIRMWARE_URL)
URL_FILE:=bootcode.bin
HASH:=12c6b5fdd893ff60cddbad0fa8aea0ebd5328ed2a9cd39a2a09d7ac99621d5bf
HASH:=1e3582640b97f6a1ba77b66181fe698767d205f5d4c4315f56d03b398a7e55d1
endef
$(eval $(call Download,bootcode_bin))
@ -34,7 +34,7 @@ define Download/fixup_dat
FILE:=$(RPI_FIRMWARE_FILE)-fixup.dat
URL:=$(RPI_FIRMWARE_URL)
URL_FILE:=fixup.dat
HASH:=25d39e703af377ca6412c0ac68e6739d2ffb56634b9a7262140d26d8150fdf23
HASH:=ff5aa78aa6fb6202cb6b490d07dda7a844145d4cf82dc005ef8baf8fa936996e
endef
$(eval $(call Download,fixup_dat))
@ -42,7 +42,7 @@ define Download/fixup_cd_dat
FILE:=$(RPI_FIRMWARE_FILE)-fixup_cd.dat
URL:=$(RPI_FIRMWARE_URL)
URL_FILE:=fixup_cd.dat
HASH:=9639f81ad007561048bb3956e88da425a84cef37f307a16734cdcfcdcbd40b4c
HASH:=e21c05b05bb140dbe99cdb45af3e2e60e61772737b006b4c0b5cf8f609eab8e7
endef
$(eval $(call Download,fixup_cd_dat))
@ -50,7 +50,7 @@ define Download/fixup_x_dat
FILE:=$(RPI_FIRMWARE_FILE)-fixup_x.dat
URL:=$(RPI_FIRMWARE_URL)
URL_FILE:=fixup_x.dat
HASH:=538c4d514b55c09670bbc7bdc092e44ff1f572c4f124a47c5b514f120dff6263
HASH:=a9a5269358fd3e1f8cc6d5ac31902d449ba8c06be8c8ae211c92f8a170a552c9
endef
$(eval $(call Download,fixup_x_dat))
@ -58,7 +58,7 @@ define Download/fixup4_dat
FILE:=$(RPI_FIRMWARE_FILE)-fixup4.dat
URL:=$(RPI_FIRMWARE_URL)
URL_FILE:=fixup4.dat
HASH:=75312421da0e036f9d451facb848bd439247e4322ee2d36bbfe2f7acc9a6d681
HASH:=78137591cc1b0654fc389e83ba59bf1d2a5ce1f8ba971058d9469e20e3c4e4ea
endef
$(eval $(call Download,fixup4_dat))
@ -66,7 +66,7 @@ define Download/fixup4cd_dat
FILE:=$(RPI_FIRMWARE_FILE)-fixup4cd.dat
URL:=$(RPI_FIRMWARE_URL)
URL_FILE:=fixup4cd.dat
HASH:=9639f81ad007561048bb3956e88da425a84cef37f307a16734cdcfcdcbd40b4c
HASH:=bd29b478e6d9c31265e61cf8d663f8bcdf096b7e60423b487bb23f44ac11e6f6
endef
$(eval $(call Download,fixup4cd_dat))
@ -74,7 +74,7 @@ define Download/fixup4x_dat
FILE:=$(RPI_FIRMWARE_FILE)-fixup4x.dat
URL:=$(RPI_FIRMWARE_URL)
URL_FILE:=fixup4x.dat
HASH:=d3d1a044412a22a7c366d57e79433532e137e9b184ea9ea68b0eb7577e70e4f3
HASH:=608871001d2a849016af64d3d9197ed57f90d5f23a554cde3d739ac7b4f7b560
endef
$(eval $(call Download,fixup4x_dat))
@ -82,7 +82,7 @@ define Download/start_elf
FILE:=$(RPI_FIRMWARE_FILE)-start.elf
URL:=$(RPI_FIRMWARE_URL)
URL_FILE:=start.elf
HASH:=5980340e652491926f263ac89b7bc2ab513246bd3eb27103bba4780d6e8568f8
HASH:=d15334b643b34ba1e9fe8ea72d0aff59fb9886b70eee17f05ecfe74c2bcab7de
endef
$(eval $(call Download,start_elf))
@ -90,7 +90,7 @@ define Download/start_cd_elf
FILE:=$(RPI_FIRMWARE_FILE)-start_cd.elf
URL:=$(RPI_FIRMWARE_URL)
URL_FILE:=start_cd.elf
HASH:=389a44e371802207ed56fe82a3beaf675eb51176112bde7d77546039d7085572
HASH:=62054d5b4a1ba58533aa3cb63ec83e6635adfa9093283d462f3bea7eb3d17c80
endef
$(eval $(call Download,start_cd_elf))
@ -98,7 +98,7 @@ define Download/start_x_elf
FILE:=$(RPI_FIRMWARE_FILE)-start_x.elf
URL:=$(RPI_FIRMWARE_URL)
URL_FILE:=start_x.elf
HASH:=32016c544353b285394f0006d57a785239fee0262ed1b0ff80b8028c918f0ad9
HASH:=445f0cf6bdc82a9d8d4d92a4678b72436eba9c1e4155ca1c483aa15271dbc26f
endef
$(eval $(call Download,start_x_elf))
@ -106,7 +106,7 @@ define Download/start4_elf
FILE:=$(RPI_FIRMWARE_FILE)-start4.elf
URL:=$(RPI_FIRMWARE_URL)
URL_FILE:=start4.elf
HASH:=ec26d746ddf76527b1702fbf7e76c7b036545cc43da81361a2887c92e4965dcc
HASH:=e58a0a629a98998a225b6bf837c75256625d313130401c223f052f0a42b4f263
endef
$(eval $(call Download,start4_elf))
@ -114,7 +114,7 @@ define Download/start4cd_elf
FILE:=$(RPI_FIRMWARE_FILE)-start4cd.elf
URL:=$(RPI_FIRMWARE_URL)
URL_FILE:=start4cd.elf
HASH:=ee507a448911a9d82edf632decb160d5712ab43d8d32b1225f1c406d4eb87820
HASH:=e90d922916dc61d547eb03fae8f182e16edadf5cf10caad1027e95582bc01a0d
endef
$(eval $(call Download,start4cd_elf))
@ -122,7 +122,7 @@ define Download/start4x_elf
FILE:=$(RPI_FIRMWARE_FILE)-start4x.elf
URL:=$(RPI_FIRMWARE_URL)
URL_FILE:=start4x.elf
HASH:=9a32a06aadeb84649ee03a15f067fa9285791488ffe61b82f9788303a1355614
HASH:=dae73ce30d491dcf780f817131e215b6a34447fcf346acf11ee9080595304ae0
endef
$(eval $(call Download,start4x_elf))

18
package/kernel/kmod-sched-cake-oot/Makefile
View File

@ -29,14 +29,26 @@ define KernelPackage/sched-cake-oot
DEPENDS:=@LINUX_4_14 +kmod-sched-core +kmod-ipt-conntrack
endef
include $(INCLUDE_DIR)/kernel-defaults.mk
define KernelPackage/sched-cake/description
define KernelPackage/sched-cake-oot/description
O(ut) O(f) T(ree) Common Applications Kept Enhanced fq_codel/blue derived shaper
endef
define KernelPackage/sched-cake-virtual
SUBMENU:=Network Support
TITLE:=Virtual package for sched-cake
URL:=https://github.com/dtaht/sch_cake
DEPENDS:=+!LINUX_4_14:kmod-sched-cake +LINUX_4_14:kmod-sched-cake-oot
endef
define KernelPackage/sched-cake-virtual/description
Virtual package for resolving sch_cake dependencies
endef
include $(INCLUDE_DIR)/kernel-defaults.mk
define Build/Compile
$(KERNEL_MAKE) M="$(PKG_BUILD_DIR)" modules
endef
$(eval $(call KernelPackage,sched-cake-oot))
$(eval $(call KernelPackage,sched-cake-virtual))

6
package/network/config/netifd/Makefile
View File

@ -5,9 +5,9 @@ PKG_RELEASE:=1
PKG_SOURCE_PROTO:=git
PKG_SOURCE_URL=$(PROJECT_GIT)/project/netifd.git
PKG_SOURCE_DATE:=2020-06-04
PKG_SOURCE_VERSION:=db275e12bfc7849c220a173c68403ae41cb251b7
PKG_MIRROR_HASH:=959427b7b6eae52e788c15306d3f929ca6e445b745e60cbaf093db2733f27d8d
PKG_SOURCE_DATE:=2020-06-06
PKG_SOURCE_VERSION:=51e9fb8151e8f2c16ac1400bf4d64147ee7e8f5a
PKG_MIRROR_HASH:=d89b76cb28a4c15c044f1b11ae8bc3ef7087a49cafe3dfff191163c6641a74b5
PKG_MAINTAINER:=Felix Fietkau <nbd@nbd.name>
PKG_LICENSE:=GPL-2.0

4
package/network/services/hostapd/files/hostapd.sh
View File

@ -275,7 +275,7 @@ hostapd_set_vlan_file() {
hostapd_set_vlan() {
local ifname="$1"
rm /var/run/hostapd-${ifname}.vlan
rm -f /var/run/hostapd-${ifname}.vlan
for_each_vlan hostapd_set_vlan_file ${ifname}
}
@ -293,7 +293,7 @@ hostapd_set_psk_file() {
hostapd_set_psk() {
local ifname="$1"
rm /var/run/hostapd-${ifname}.psk
rm -f /var/run/hostapd-${ifname}.psk
for_each_station hostapd_set_psk_file ${ifname}
}

2
target/linux/bcm27xx/base-files/lib/upgrade/platform.sh
View File

@ -94,6 +94,6 @@ platform_copy_config() {
cp -af "$UPGRADE_BACKUP" "/boot/$BACKUP_FILE"
tar -C / -zxvf "$UPGRADE_BACKUP" boot/cmdline.txt boot/config.txt
sync
unmount /boot
umount /boot
fi
}

4
target/linux/bcm63xx/base-files/etc/board.d/01_leds
View File

@ -100,6 +100,10 @@ sercomm,ad1018)
sercomm,ad1018-nor)
ucidef_set_led_netdev "wlan0" "WLAN" "AD1018:green:wifi" "wlan0"
;;
sercomm,h500-s-lowi|\
sercomm,h500-s-vfes)
ucidef_set_led_netdev "wan" "WAN" "h500-s:green:internet" "eth0.2"
;;
telsey,cpva502plus)
ucidef_set_led_netdev "lan" "LAN" "CPVA502+:amber:link" "eth0"
;;

4
target/linux/bcm63xx/base-files/etc/board.d/02_network
View File

@ -142,6 +142,10 @@ sercomm,ad1018-nor)
ucidef_add_switch "switch0" \
"1:lan:3" "2:lan:2" "3:lan:1" "0:wan" "8t@eth0"
;;
sercomm,h500-s-lowi|\
sercomm,h500-s-vfes)
ucidef_add_switch "switch0" "4:lan" "3:wan" "8t@eth0"
;;
sfr,neufbox-6-sercomm-r0)
ucidef_add_switch "switch0" \
"1:lan" "2:lan" "3:lan" "4:lan" "0:wan" "9t@eth0"

8
target/linux/bcm63xx/base-files/lib/upgrade/platform.sh
View File

@ -9,7 +9,9 @@ platform_check_image() {
comtrend,vr-3032u|\
huawei,hg253s-v2|\
netgear,dgnd3700-v2|\
sercomm,ad1018)
sercomm,ad1018|\
sercomm,h500-s-lowi|\
sercomm,h500-s-vfes)
# NAND sysupgrade
return 0
;;
@ -69,7 +71,9 @@ platform_do_upgrade() {
comtrend,vr-3032u|\
huawei,hg253s-v2|\
netgear,dgnd3700-v2|\
sercomm,ad1018)
sercomm,ad1018|\
sercomm,h500-s-lowi|\
sercomm,h500-s-vfes)
REQUIRE_IMAGE_METADATA=1
cfe_jffs2_upgrade_tar "$1"
;;

15
target/linux/bcm63xx/dts/bcm63167-sercomm-h500-s-lowi.dts Normal file
View File

@ -0,0 +1,15 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Device Tree file for Sercomm H500-s lowi
*
* Copyright (C) 2020 Daniel González Cabanelas <dgcbueu@gmail.com>
*/
/dts-v1/;
#include "bcm63167-sercomm-h500-s.dtsi"
/ {
model = "Sercomm H500-s lowi";
compatible = "sercomm,h500-s-lowi", "brcm,bcm63167", "brcm,bcm63268";
};

15
target/linux/bcm63xx/dts/bcm63167-sercomm-h500-s-vfes.dts Normal file
View File

@ -0,0 +1,15 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Device Tree file for Sercomm H500-s vfes
*
* Copyright (C) 2020 Daniel González Cabanelas <dgcbueu@gmail.com>
*/
/dts-v1/;
#include "bcm63167-sercomm-h500-s.dtsi"
/ {
model = "Sercomm H500-s vfes";
compatible = "sercomm,h500-s-vfes", "brcm,bcm63167", "brcm,bcm63268";
};

194
target/linux/bcm63xx/dts/bcm63167-sercomm-h500-s.dtsi Normal file
View File

@ -0,0 +1,194 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Device Tree file for Sercomm H500-s
*
* Copyright (C) 2020 Daniel González Cabanelas <dgcbueu@gmail.com>
*/
#include "bcm63268.dtsi"
#include <dt-bindings/input/input.h>
/ {
aliases {
led-boot = &led_power_green;
led-failsafe = &led_power_red;
led-running = &led_power_green;
led-upgrade = &led_power_green;
};
chosen {
bootargs = "rootfstype=squashfs,ubifs noinitrd console=ttyS0,115200";
stdout-path = "serial0:115200n8";
};
keys {
compatible = "gpio-keys-polled";
#address-cells = <1>;
#size-cells = <0>;
poll-interval = <20>;
wps {
label = "wps";
gpios = <&pinctrl 34 1>;
linux,code = <KEY_WPS_BUTTON>;
debounce-interval = <60>;
};
reset {
label = "reset";
gpios = <&pinctrl 35 1>;
linux,code = <KEY_RESTART>;
debounce-interval = <60>;
};
};
};
&leds {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_leds>;
mobile_red {
reg = <0>;
label = "h500-s:red:mobile";
};
mobile_green {
reg = <1>;
label = "h500-s:green:mobile";
};
led_power_red: power_red {
reg = <8>;
label = "h500-s:red:power";
};
wifi_green {
reg = <9>;
label = "h500-s:green:wifi";
};
phone_red {
reg = <12>;
label = "h500-s:red:phone";
};
wifi_red {
reg = <13>;
label = "h500-s:red:wifi";
};
internet_red {
reg = <14>;
label = "h500-s:red:internet";
};
internet_green {
reg = <15>;
label = "h500-s:green:internet";
};
phone_green {
reg = <16>;
label = "h500-s:green:phone";
};
led_power_green: power_green {
reg = <17>;
label = "h500-s:green:power";
default-state = "on";
};
mobile_blue {
reg = <23>;
label = "h500-s:blue:mobile";
};
};
&nflash {
status = "okay";
nandcs@0 {
compatible = "brcm,nandcs";
#size-cells = <1>;
#address-cells = <1>;
reg = <0>;
nand-ecc-step-size = <512>;
nand-ecc-strength = <4>;
nand-on-flash-bbt;
brcm,nand-oob-sector-size = <64>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "cferom";
reg = <0x0000000 0x0020000>;
read-only;
};
partition@20000 {
label = "part_map";
reg = <0x0020000 0x00a0000>;
read-only;
};
partition@c0000 {
label = "cferam1";
reg = <0x00c0000 0x0140000>;
read-only;
};
partition@200000 {
label = "cferam2";
reg = <0x0200000 0x0140000>;
read-only;
};
partition@6920000 {
label = "bootflag1";
reg = <0x6920000 0x0140000>;
};
partition@6a60000 {
label = "bootflag2";
reg = <0x6a60000 0x0140000>;
};
partition@520000 {
compatible = "sercomm,wfi";
label = "wfi";
reg = <0x0520000 0x6400000>; /* 2 images, 97152 KiB */
};
partition@6ba0000 {
label = "xml_cfg";
reg = <0x6ba0000 0x0280000>;
read-only;
};
partition@6e20000 {
label = "app_data";
reg = <0x6e20000 0x0280000>;
read-only;
};
};
};
};
&pinctrl {
pinctrl_leds: leds {
function = "led";
pins = "gpio0", "gpio1", "gpio8", "gpio9",
"gpio12", "gpio13", "gpio14", "gpio15",
"gpio16", "gpio17", "gpio23";
};
};
&uart0 {
status = "okay";
};

2
target/linux/bcm63xx/dts/bcm63168-comtrend-vr-3032u.dts
View File

@ -8,7 +8,7 @@
/ {
model = "Comtrend VR-3032u";
compatible = "comtrend,vr-3032u", "brcm,bcm63268";
compatible = "comtrend,vr-3032u", "brcm,bcm63168", "brcm,bcm63268";
aliases {
led-boot = &led_power_green;

2
target/linux/bcm63xx/dts/bcm63169-comtrend-vg-8050.dts
View File

@ -8,7 +8,7 @@
/ {
model = "Comtrend VG-8050";
compatible = "comtrend,vg-8050", "brcm,bcm63268";
compatible = "comtrend,vg-8050", "brcm,bcm63169", "brcm,bcm63268";
aliases {
led-boot = &led_power_green;

34
target/linux/bcm63xx/image/Makefile
View File

@ -13,14 +13,6 @@ LOADER_ENTRY = 0x80a00000 # RAM start + 10M, for relocate
RAMSIZE = 0x02000000 # 32MB
LZMA_TEXT_START = 0x81800000 # 32MB - 8MB
LOADER_MAKEOPTS= \
KDIR=$(KDIR) \
LOADER_ADDR=$(LOADER_ENTRY) \
KERNEL_ADDR=$(KERNEL_LOADADDR) \
RAMSIZE=$(RAMSIZE) \
LZMA_TEXT_START=$(LZMA_TEXT_START) \
CHIP_ID=$(CHIP_ID)
RELOCATE_MAKEOPTS= \
CACHELINE_SIZE=16 \
KERNEL_ADDR=$(KERNEL_LOADADDR) \
@ -44,7 +36,12 @@ endef
define Build/loader-lzma
rm -rf $@.src
$(MAKE) -C lzma-loader \
$(LOADER_MAKEOPTS) \
KDIR=$(KDIR) \
LOADER_ADDR=$(if $(DEVICE_LOADADDR),$(DEVICE_LOADADDR),$(LOADER_ENTRY)) \
KERNEL_ADDR=$(KERNEL_LOADADDR) \
RAMSIZE=$(RAMSIZE) \
LZMA_TEXT_START=$(LZMA_TEXT_START) \
CHIP_ID=$(CHIP_ID) \
PKG_BUILD_DIR="$@.src" \
TARGET_DIR="$(dir $@)" \
LOADER_DATA="$@" \
@ -172,8 +169,8 @@ define Build/cfe-jffs2-kernel
$(TOPDIR)/scripts/cfe-bin-header.py \
--input-file $@ \
--output-file $@-kernel/vmlinux.lz \
--load-addr $(LOADER_ENTRY) \
--entry-addr $(LOADER_ENTRY)
--load-addr $(if $(DEVICE_LOADADDR),$(DEVICE_LOADADDR),$(LOADER_ENTRY)) \
--entry-addr $(if $(DEVICE_LOADADDR),$(DEVICE_LOADADDR),$(LOADER_ENTRY))
# The JFFS2 partition creation should result in the following
# layout:
@ -218,20 +215,8 @@ define Build/cfe-sercomm-part
--part-name rootfs_lib \
--part-version $(SERCOMM_VERSION)
rm -rf $@-bootloader
mkdir -p $@-bootloader
cp $(KDIR)/bcm63xx-cfe/$(CFE_RAM_FILE) $@-bootloader/$(CFE_RAM_JFFS2_NAME)
$(call Build/cfe-jffs2,$@-bootloader)
$(call Build/pad-to,$(BLOCKSIZE))
$(TOPDIR)/scripts/sercomm-partition-tag.py \
--input-file $@ \
--output-file $@.bootloader \
--part-name bootloader \
--part-version $(SERCOMM_VERSION)
mv $@.kernel_rootfs $@
dd if=$@.rootfs_lib >> $@
dd if=$@.bootloader >> $@
endef
define Build/cfe-sercomm-load
@ -322,8 +307,9 @@ define Device/Default
CHIP_ID :=
SOC = bcm$$(CHIP_ID)
DEVICE_DTS = $$(SOC)-$(subst _,-,$(1))
DEVICE_LOADADDR :=
endef
DEVICE_VARS += CHIP_ID
DEVICE_VARS += CHIP_ID DEVICE_LOADADDR
ATH5K_PACKAGES := kmod-ath5k wpad-basic
ATH9K_PACKAGES := kmod-ath9k wpad-basic

56
target/linux/bcm63xx/image/bcm63xx_nand.mk
View File

@ -39,7 +39,7 @@ endef
define Device/sercomm-nand
$(Device/bcm63xx-nand)
IMAGES = factory.img sysupgrade.bin
IMAGES := factory.img sysupgrade.bin
IMAGE/factory.img := append-kernel | pad-to $$$$(KERNEL_SIZE) | append-ubi | cfe-sercomm-part | gzip | cfe-sercomm-load | cfe-sercomm-crypto
SERCOM_PID :=
SERCOMM_VERSION :=
@ -149,3 +149,57 @@ define Device/sercomm_ad1018
SERCOMM_VERSION := 1001
endef
TARGET_DEVICES += sercomm_ad1018
define Device/sercomm_h500-s-lowi
$(Device/sercomm-nand)
DEVICE_VENDOR := Sercomm
DEVICE_MODEL := H500-s
DEVICE_VARIANT := lowi
DEVICE_LOADADDR := $(KERNEL_LOADADDR)
KERNEL := kernel-bin | append-dtb | lzma | cfe-jffs2-kernel
CHIP_ID := 63268
SOC := bcm63167
BLOCKSIZE := 128k
PAGESIZE := 2048
SUBPAGESIZE := 512
VID_HDR_OFFSET := 2048
DEVICE_PACKAGES += $(USB2_PACKAGES)
SERCOMM_PID := \
30 30 30 30 30 30 30 31 34 33 34 62 33 31 30 30 \
30 30 30 30 30 30 30 30 30 30 30 30 30 30 30 30 \
30 30 30 30 30 30 30 30 30 30 30 30 30 30 30 30 \
30 30 30 30 30 30 30 30 30 30 30 30 30 30 30 30 \
30 30 30 30 30 30 30 30 30 30 30 30 30 30 30 30 \
30 30 30 30 30 30 30 30 30 30 30 30 30 30 30 30 \
30 30 30 30 33 33 30 35 30 30 30 30 30 30 30 30 \
0D 0A 00 00 00 00 00 00 00 00 00 00 00 00 00 00
SERCOMM_VERSION := 1001
endef
TARGET_DEVICES += sercomm_h500-s-lowi
define Device/sercomm_h500-s-vfes
$(Device/sercomm-nand)
DEVICE_VENDOR := Sercomm
DEVICE_MODEL := H500-s
DEVICE_VARIANT := vfes
DEVICE_LOADADDR := $(KERNEL_LOADADDR)
KERNEL := kernel-bin | append-dtb | lzma | cfe-jffs2-kernel
CHIP_ID := 63268
SOC := bcm63167
BLOCKSIZE := 128k
PAGESIZE := 2048
SUBPAGESIZE := 512
VID_HDR_OFFSET := 2048
DEVICE_PACKAGES += $(USB2_PACKAGES)
SERCOMM_PID := \
30 30 30 30 30 30 30 31 34 32 35 38 34 62 30 30 \
30 30 30 30 30 30 30 30 30 30 30 30 30 30 30 30 \
30 30 30 30 30 30 30 30 30 30 30 30 30 30 30 30 \
30 30 30 30 30 30 30 30 30 30 30 30 30 30 30 30 \
30 30 30 30 30 30 30 30 30 30 30 30 30 30 30 30 \
30 30 30 30 30 30 30 30 30 30 30 30 30 30 30 30 \
30 30 30 30 33 34 31 37 30 30 30 30 30 30 30 30 \
0D 0A 00 00 00 00 00 00 00 00 00 00 00 00 00 00
SERCOMM_VERSION := 1001
endef
TARGET_DEVICES += sercomm_h500-s-vfes

30
target/linux/bcm63xx/patches-5.4/010-v5.8-MIPS-BCM63xx-fix-6328-boot-selection-bit.patch Normal file
View File

@ -0,0 +1,30 @@
From 2038e0416518b30bb40857fbafa3733a6bae93ca Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?=C3=81lvaro=20Fern=C3=A1ndez=20Rojas?= <noltari@gmail.com>
Date: Tue, 26 May 2020 13:03:24 +0200
Subject: [PATCH] MIPS: BCM63xx: fix 6328 boot selection bit
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
MISC_STRAP_BUS_BOOT_SEL_SHIFT is 18 according to Broadcom's GPL source code.
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
Acked-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
---
arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
@@ -1367,8 +1367,8 @@
#define MISC_STRAPBUS_6328_REG 0x240
#define STRAPBUS_6328_FCVO_SHIFT 7
#define STRAPBUS_6328_FCVO_MASK (0x1f << STRAPBUS_6328_FCVO_SHIFT)
-#define STRAPBUS_6328_BOOT_SEL_SERIAL (1 << 28)
-#define STRAPBUS_6328_BOOT_SEL_NAND (0 << 28)
+#define STRAPBUS_6328_BOOT_SEL_SERIAL (1 << 18)
+#define STRAPBUS_6328_BOOT_SEL_NAND (0 << 18)
/*************************************************************************
* _REG relative to RSET_PCIE

13
target/linux/bcm63xx/patches-5.4/150-mips-bcm63xx-bcm6328-fix-strapbus-boot-sel.patch
View File

@ -1,13 +0,0 @@
--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
@@ -1367,8 +1367,8 @@
#define MISC_STRAPBUS_6328_REG 0x240
#define STRAPBUS_6328_FCVO_SHIFT 7
#define STRAPBUS_6328_FCVO_MASK (0x1f << STRAPBUS_6328_FCVO_SHIFT)
-#define STRAPBUS_6328_BOOT_SEL_SERIAL (1 << 28)
-#define STRAPBUS_6328_BOOT_SEL_NAND (0 << 28)
+#define STRAPBUS_6328_BOOT_SEL_SERIAL (1 << 18)
+#define STRAPBUS_6328_BOOT_SEL_NAND (0 << 18)
/*************************************************************************
* _REG relative to RSET_PCIE

18
target/linux/bcm63xx/patches-5.4/339-MIPS-BCM63XX-add-support-for-BCM63268.patch
View File

@ -242,10 +242,11 @@ Signed-off-by: Jonas Gorski <jogo@openwrt.org>
switch (bcm63xx_cpu_id) {
case BCM3368_CPU_ID:
@@ -400,6 +442,15 @@ void __init bcm63xx_cpu_init(void)
@@ -400,6 +442,16 @@ void __init bcm63xx_cpu_init(void)
/* BCM6369 is a BCM6368 without xDSL, so treat it the same */
bcm63xx_cpu_id = BCM6368_CPU_ID;
break;
+ case BCM63167_CPU_ID:
+ case BCM63168_CPU_ID:
+ case BCM63169_CPU_ID:
+ case BCM63268_CPU_ID:
@ -353,10 +354,11 @@ Signed-off-by: Jonas Gorski <jogo@openwrt.org>
return 0;
--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
@@ -22,6 +22,10 @@
@@ -22,6 +22,11 @@
#define BCM6362_CPU_ID 0x6362
#define BCM6368_CPU_ID 0x6368
#define BCM6369_CPU_ID 0x6369
+#define BCM63167_CPU_ID 0x63167
+#define BCM63168_CPU_ID 0x63168
+#define BCM63169_CPU_ID 0x63169
+#define BCM63268_CPU_ID 0x63268
@ -364,7 +366,7 @@ Signed-off-by: Jonas Gorski <jogo@openwrt.org>
void __init bcm63xx_cpu_init(void);
u32 bcm63xx_get_cpu_variant(void);
@@ -62,6 +66,10 @@ static inline u32 __pure __bcm63xx_get_c
@@ -62,6 +67,10 @@ static inline u32 __pure __bcm63xx_get_c
#ifdef CONFIG_BCM63XX_CPU_6368
case BCM6368_CPU_ID:
#endif
@ -375,7 +377,7 @@ Signed-off-by: Jonas Gorski <jogo@openwrt.org>
break;
default:
unreachable();
@@ -87,6 +95,7 @@ static inline u32 __pure bcm63xx_get_cpu
@@ -87,6 +96,7 @@ static inline u32 __pure bcm63xx_get_cpu
#define BCMCPU_IS_6358() (bcm63xx_get_cpu_id() == BCM6358_CPU_ID)
#define BCMCPU_IS_6362() (bcm63xx_get_cpu_id() == BCM6362_CPU_ID)
#define BCMCPU_IS_6368() (bcm63xx_get_cpu_id() == BCM6368_CPU_ID)
@ -383,10 +385,12 @@ Signed-off-by: Jonas Gorski <jogo@openwrt.org>
#define BCMCPU_VARIANT_IS_3368() \
(bcm63xx_get_cpu_variant() == BCM3368_CPU_ID)
@@ -110,6 +119,14 @@ static inline u32 __pure bcm63xx_get_cpu
@@ -110,6 +120,16 @@ static inline u32 __pure bcm63xx_get_cpu
(bcm63xx_get_cpu_variant() == BCM6368_CPU_ID)
#define BCMCPU_VARIANT_IS_6369() \
(bcm63xx_get_cpu_variant() == BCM6369_CPU_ID)
+#define BCMCPU_VARIANT_IS_63167() \
+ (bcm63xx_get_cpu_variant() == BCM63167_CPU_ID)
+#define BCMCPU_VARIANT_IS_63168() \
+ (bcm63xx_get_cpu_variant() == BCM63168_CPU_ID)
+#define BCMCPU_VARIANT_IS_63169() \
@ -398,7 +402,7 @@ Signed-off-by: Jonas Gorski <jogo@openwrt.org>
/*
* While registers sets are (mostly) the same across 63xx CPU, base
@@ -574,6 +591,52 @@ enum bcm63xx_regs_set {
@@ -574,6 +594,52 @@ enum bcm63xx_regs_set {
#define BCM_6368_RNG_BASE (0xb0004180)
#define BCM_6368_MISC_BASE (0xdeadbeef)
@ -451,7 +455,7 @@ Signed-off-by: Jonas Gorski <jogo@openwrt.org>
extern const unsigned long *bcm63xx_regs_base;
@@ -1042,6 +1105,73 @@ enum bcm63xx_irq {
@@ -1042,6 +1108,73 @@ enum bcm63xx_irq {
#define BCM_6368_EXT_IRQ4 (IRQ_INTERNAL_BASE + 24)
#define BCM_6368_EXT_IRQ5 (IRQ_INTERNAL_BASE + 25)

10
target/linux/bcm63xx/patches-5.4/341-MIPS-BCM63XX-add-support-for-BCM6318.patch
View File

@ -327,7 +327,7 @@ Subject: [PATCH 51/53] MIPS: BCM63XX: add support for BCM6318
#define BCM6328_CPU_ID 0x6328
#define BCM63281_CPU_ID 0x63281
#define BCM63283_CPU_ID 0x63283
@@ -39,6 +40,10 @@ static inline u32 __pure __bcm63xx_get_c
@@ -40,6 +41,10 @@ static inline u32 __pure __bcm63xx_get_c
case BCM3368_CPU_ID:
#endif
@ -338,7 +338,7 @@ Subject: [PATCH 51/53] MIPS: BCM63XX: add support for BCM6318
#ifdef CONFIG_BCM63XX_CPU_6328
case BCM6328_CPU_ID:
#endif
@@ -88,6 +93,7 @@ static inline u32 __pure bcm63xx_get_cpu
@@ -89,6 +94,7 @@ static inline u32 __pure bcm63xx_get_cpu
}
#define BCMCPU_IS_3368() (bcm63xx_get_cpu_id() == BCM3368_CPU_ID)
@ -346,7 +346,7 @@ Subject: [PATCH 51/53] MIPS: BCM63XX: add support for BCM6318
#define BCMCPU_IS_6328() (bcm63xx_get_cpu_id() == BCM6328_CPU_ID)
#define BCMCPU_IS_6338() (bcm63xx_get_cpu_id() == BCM6338_CPU_ID)
#define BCMCPU_IS_6345() (bcm63xx_get_cpu_id() == BCM6345_CPU_ID)
@@ -99,6 +105,8 @@ static inline u32 __pure bcm63xx_get_cpu
@@ -100,6 +106,8 @@ static inline u32 __pure bcm63xx_get_cpu
#define BCMCPU_VARIANT_IS_3368() \
(bcm63xx_get_cpu_variant() == BCM3368_CPU_ID)
@ -355,7 +355,7 @@ Subject: [PATCH 51/53] MIPS: BCM63XX: add support for BCM6318
#define BCMCPU_VARIANT_IS_63281() \
(bcm63xx_get_cpu_variant() == BCM63281_CPU_ID)
#define BCMCPU_VARIANT_IS_63283() \
@@ -253,6 +261,56 @@ enum bcm63xx_regs_set {
@@ -256,6 +264,56 @@ enum bcm63xx_regs_set {
#define BCM_3368_MISC_BASE (0xdeadbeef)
/*
@ -412,7 +412,7 @@ Subject: [PATCH 51/53] MIPS: BCM63XX: add support for BCM6318
* 6328 register sets base address
*/
#define BCM_6328_DSL_LMEM_BASE (0xdeadbeef)
@@ -775,6 +833,55 @@ enum bcm63xx_irq {
@@ -778,6 +836,55 @@ enum bcm63xx_irq {
#define BCM_3368_EXT_IRQ2 (IRQ_INTERNAL_BASE + 27)
#define BCM_3368_EXT_IRQ3 (IRQ_INTERNAL_BASE + 28)

24
target/linux/bcm63xx/patches-5.4/431-MIPS-BCM63XX-add-nand-rset.patch
View File

@ -1,6 +1,6 @@
--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
@@ -181,7 +181,8 @@ enum bcm63xx_regs_set {
@@ -184,7 +184,8 @@ enum bcm63xx_regs_set {
RSET_PCMDMAC,
RSET_PCMDMAS,
RSET_RNG,
@ -10,7 +10,7 @@
};
#define RSET_DSL_LMEM_SIZE (64 * 1024 * 4)
@@ -259,6 +260,7 @@ enum bcm63xx_regs_set {
@@ -262,6 +263,7 @@ enum bcm63xx_regs_set {
#define BCM_3368_PCMDMAS_BASE (0xdeadbeef)
#define BCM_3368_RNG_BASE (0xdeadbeef)
#define BCM_3368_MISC_BASE (0xdeadbeef)
@ -18,7 +18,7 @@
/*
* 6318 register sets base address
@@ -306,6 +308,7 @@ enum bcm63xx_regs_set {
@@ -309,6 +311,7 @@ enum bcm63xx_regs_set {
#define BCM_6318_PCMDMAS_BASE (0xdeadbeef)
#define BCM_6318_RNG_BASE (0xdeadbeef)
#define BCM_6318_MISC_BASE (0xb0000280)
@ -26,7 +26,7 @@
#define BCM_6318_OTP_BASE (0xdeadbeef)
#define BCM_6318_STRAP_BASE (0xb0000900)
@@ -356,6 +359,7 @@ enum bcm63xx_regs_set {
@@ -359,6 +362,7 @@ enum bcm63xx_regs_set {
#define BCM_6328_PCMDMAS_BASE (0xdeadbeef)
#define BCM_6328_RNG_BASE (0xdeadbeef)
#define BCM_6328_MISC_BASE (0xb0001800)
@ -34,7 +34,7 @@
#define BCM_6328_OTP_BASE (0xb0000600)
/*
@@ -405,6 +409,7 @@ enum bcm63xx_regs_set {
@@ -408,6 +412,7 @@ enum bcm63xx_regs_set {
#define BCM_6338_PCMDMAS_BASE (0xdeadbeef)
#define BCM_6338_RNG_BASE (0xdeadbeef)
#define BCM_6338_MISC_BASE (0xdeadbeef)
@ -42,7 +42,7 @@
/*
* 6345 register sets base address
@@ -453,6 +458,7 @@ enum bcm63xx_regs_set {
@@ -456,6 +461,7 @@ enum bcm63xx_regs_set {
#define BCM_6345_PCMDMAS_BASE (0xdeadbeef)
#define BCM_6345_RNG_BASE (0xdeadbeef)
#define BCM_6345_MISC_BASE (0xdeadbeef)
@ -50,7 +50,7 @@
/*
* 6348 register sets base address
@@ -499,6 +505,7 @@ enum bcm63xx_regs_set {
@@ -502,6 +508,7 @@ enum bcm63xx_regs_set {
#define BCM_6348_PCMDMAS_BASE (0xdeadbeef)
#define BCM_6348_RNG_BASE (0xdeadbeef)
#define BCM_6348_MISC_BASE (0xdeadbeef)
@ -58,7 +58,7 @@
/*
* 6358 register sets base address
@@ -545,7 +552,7 @@ enum bcm63xx_regs_set {
@@ -548,7 +555,7 @@ enum bcm63xx_regs_set {
#define BCM_6358_PCMDMAS_BASE (0xfffe1a00)
#define BCM_6358_RNG_BASE (0xdeadbeef)
#define BCM_6358_MISC_BASE (0xdeadbeef)
@ -67,7 +67,7 @@
/*
* 6362 register sets base address
@@ -593,6 +600,7 @@ enum bcm63xx_regs_set {
@@ -596,6 +603,7 @@ enum bcm63xx_regs_set {
#define BCM_6362_PCMDMAS_BASE (0xdeadbeef)
#define BCM_6362_RNG_BASE (0xdeadbeef)
#define BCM_6362_MISC_BASE (0xb0001800)
@ -75,7 +75,7 @@
#define BCM_6362_NAND_REG_BASE (0xb0000200)
#define BCM_6362_NAND_CACHE_BASE (0xb0000600)
@@ -648,6 +656,7 @@ enum bcm63xx_regs_set {
@@ -651,6 +659,7 @@ enum bcm63xx_regs_set {
#define BCM_6368_PCMDMAS_BASE (0xb0005c00)
#define BCM_6368_RNG_BASE (0xb0004180)
#define BCM_6368_MISC_BASE (0xdeadbeef)
@ -83,7 +83,7 @@
/*
* 63268 register sets base address
@@ -695,6 +704,7 @@ enum bcm63xx_regs_set {
@@ -698,6 +707,7 @@ enum bcm63xx_regs_set {
#define BCM_63268_PCMDMAS_BASE (0xdeadbeef)
#define BCM_63268_RNG_BASE (0xdeadbeef)
#define BCM_63268_MISC_BASE (0xb0001800)
@ -91,7 +91,7 @@
extern const unsigned long *bcm63xx_regs_base;
@@ -740,6 +750,7 @@ extern const unsigned long *bcm63xx_regs
@@ -743,6 +753,7 @@ extern const unsigned long *bcm63xx_regs
[RSET_PCMDMAS] = BCM_## __cpu ##_PCMDMAS_BASE, \
[RSET_RNG] = BCM_## __cpu ##_RNG_BASE, \
[RSET_MISC] = BCM_## __cpu ##_MISC_BASE, \

57
target/linux/bcm63xx/patches-5.4/568-board-H500s.patch Normal file
View File

@ -0,0 +1,57 @@
--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
@@ -2869,6 +2869,37 @@ static struct board_info __initdata boar
},
},
};
+
+static struct board_info __initdata board_H500s = {
+ .name = "BXK00C-1.6",
+ .expected_cpu_id = 0x63268,
+
+ .has_ehci0 = 1,
+ .has_ohci0 = 1,
+ .num_usbh_ports = 1,
+
+ .has_enetsw = 1,
+ .enetsw = {
+ .used_ports = {
+ [3] = {
+ .used = 1,
+ .phy_id = 12,
+ .name = "WAN",
+ },
+
+ [4] = {
+ .used = 1,
+ .phy_id = 0,
+ .bypass_link = 1,
+ .force_speed = 1000,
+ .force_duplex_full = 1,
+ .mii_override = 1,
+ .timing_sel = 1,
+ .name = "RGMII",
+ },
+ },
+ },
+};
#endif /* CONFIG_BCM63XX_CPU_63268 */
/*
@@ -2983,6 +3014,7 @@ static const struct board_info __initcon
&board_VR3032u,
&board_vw6339gu,
&board_BSKYB_63168,
+ &board_H500s,
#endif
};
@@ -3101,6 +3133,8 @@ static struct of_device_id const bcm963x
{ .compatible = "comtrend,vg-8050", .data = &board_VG8050, },
{ .compatible = "comtrend,vr-3032u", .data = &board_VR3032u, },
{ .compatible = "inteno,vg50", .data = &board_vw6339gu, },
+ { .compatible = "sercomm,h500-s-lowi", .data = &board_H500s, },
+ { .compatible = "sercomm,h500-s-vfes", .data = &board_H500s, },
{ .compatible = "sky,sr102", .data = &board_BSKYB_63168, },
#endif
#endif /* CONFIG_OF */

595
target/linux/mediatek/files-5.4/arch/arm64/boot/dts/mediatek/mt7622-bananapi-bpi-r64-rootdisk.dts Normal file
View File

@ -0,0 +1,595 @@
/*
* Copyright (c) 2018 MediaTek Inc.
* Author: Ryder Lee <ryder.lee@mediatek.com>
*
* SPDX-License-Identifier: (GPL-2.0 OR MIT)
*/
/dts-v1/;
#include <dt-bindings/input/input.h>
#include <dt-bindings/gpio/gpio.h>
#include "mt7622.dtsi"
#include "mt6380.dtsi"
/ {
model = "Bananapi BPI-R64";
compatible = "bananapi,bpi-r64-rootdisk", "mediatek,mt7622";
aliases {
serial0 = &uart0;
};
chosen {
stdout-path = "serial0:115200n8";
bootargs = "earlycon=uart8250,mmio32,0x11002000 console=ttyS0,115200n1 swiotlb=512 root=/dev/mmcblk0p7 rootfstype=squashfs,f2fs";
};
cpus {
cpu@0 {
proc-supply = <&mt6380_vcpu_reg>;
sram-supply = <&mt6380_vm_reg>;
};
cpu@1 {
proc-supply = <&mt6380_vcpu_reg>;
sram-supply = <&mt6380_vm_reg>;
};
};
gpio-keys {
compatible = "gpio-keys";
factory {
label = "factory";
linux,code = <BTN_0>;
gpios = <&pio 0 GPIO_ACTIVE_HIGH>;
};
wps {
label = "wps";
linux,code = <KEY_WPS_BUTTON>;
gpios = <&pio 102 GPIO_ACTIVE_HIGH>;
};
};
leds {
compatible = "gpio-leds";
green {
label = "bpi-r64:pio:green";
gpios = <&pio 89 GPIO_ACTIVE_HIGH>;
default-state = "off";
};
red {
label = "bpi-r64:pio:red";
gpios = <&pio 88 GPIO_ACTIVE_HIGH>;
default-state = "off";
};
};
memory {
reg = <0 0x40000000 0 0x40000000>;
};
reg_1p8v: regulator-1p8v {
compatible = "regulator-fixed";
regulator-name = "fixed-1.8V";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-always-on;
};
reg_3p3v: regulator-3p3v {
compatible = "regulator-fixed";
regulator-name = "fixed-3.3V";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-boot-on;
regulator-always-on;
};
reg_5v: regulator-5v {
compatible = "regulator-fixed";
regulator-name = "fixed-5V";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
regulator-boot-on;
regulator-always-on;
};
};
&bch {
status = "disabled";
};
&btif {
status = "okay";
};
&cir {
pinctrl-names = "default";
pinctrl-0 = <&irrx_pins>;
status = "okay";
};
&eth {
status = "okay";
gmac0: mac@0 {
compatible = "mediatek,eth-mac";
reg = <0>;
phy-mode = "2500base-x";
fixed-link {
speed = <2500>;
full-duplex;
pause;
};
};
gmac1: mac@1 {
compatible = "mediatek,eth-mac";
reg = <1>;
phy-mode = "rgmii";
fixed-link {
speed = <1000>;
full-duplex;
pause;
};
};
mdio: mdio-bus {
#address-cells = <1>;
#size-cells = <0>;
switch@1f {
compatible = "mediatek,mt7531";
reg = <0x1f>;
reset-gpios = <&pio 54 0>;
ports {
#address-cells = <1>;
#size-cells = <0>;
wan: port@0 {
reg = <0>;
label = "wan";
};
port@1 {
reg = <1>;
label = "lan0";
};
port@2 {
reg = <2>;
label = "lan1";
};
port@3 {
reg = <3>;
label = "lan2";
};
port@4 {
reg = <4>;
label = "lan3";
};
port@6 {
reg = <6>;
label = "cpu";
ethernet = <&gmac0>;
phy-mode = "2500base-x";
fixed-link {
speed = <2500>;
full-duplex;
pause;
};
};
};
};
};
};
&i2c1 {
pinctrl-names = "default";
pinctrl-0 = <&i2c1_pins>;
status = "okay";
};
&i2c2 {
pinctrl-names = "default";
pinctrl-0 = <&i2c2_pins>;
status = "okay";
};
&mmc0 {
pinctrl-names = "default", "state_uhs";
pinctrl-0 = <&emmc_pins_default>;
pinctrl-1 = <&emmc_pins_uhs>;
status = "okay";
bus-width = <8>;
max-frequency = <50000000>;
cap-mmc-highspeed;
mmc-hs200-1_8v;
vmmc-supply = <&reg_3p3v>;
vqmmc-supply = <&reg_1p8v>;
assigned-clocks = <&topckgen CLK_TOP_MSDC30_0_SEL>;
assigned-clock-parents = <&topckgen CLK_TOP_UNIV48M>;
non-removable;
};
&mmc1 {
pinctrl-names = "default", "state_uhs";
pinctrl-0 = <&sd0_pins_default>;
pinctrl-1 = <&sd0_pins_uhs>;
status = "okay";
bus-width = <4>;
max-frequency = <50000000>;
cap-sd-highspeed;
r_smpl = <1>;
cd-gpios = <&pio 81 GPIO_ACTIVE_LOW>;
vmmc-supply = <&reg_3p3v>;
vqmmc-supply = <&reg_3p3v>;
assigned-clocks = <&topckgen CLK_TOP_MSDC30_1_SEL>;
assigned-clock-parents = <&topckgen CLK_TOP_UNIV48M>;
};
&nandc {
pinctrl-names = "default";
pinctrl-0 = <&parallel_nand_pins>;
status = "disabled";
};
&nor_flash {
pinctrl-names = "default";
pinctrl-0 = <&spi_nor_pins>;
status = "disabled";
flash@0 {
compatible = "jedec,spi-nor";
reg = <0>;
};
};
&pcie {
pinctrl-names = "default";
pinctrl-0 = <&pcie0_pins>, <&pcie1_pins>;
status = "okay";
pcie@0,0 {
status = "okay";
};
pcie@1,0 {
status = "okay";
};
};
&pio {
/* Attention: GPIO 90 is used to switch between PCIe@1,0 and
* SATA functions. i.e. output-high: PCIe, output-low: SATA
*/
asm_sel {
gpio-hog;
gpios = <90 GPIO_ACTIVE_HIGH>;
output-high;
};
/* eMMC is shared pin with parallel NAND */
emmc_pins_default: emmc-pins-default {
mux {
function = "emmc", "emmc_rst";
groups = "emmc";
};
/* "NDL0","NDL1","NDL2","NDL3","NDL4","NDL5","NDL6","NDL7",
* "NRB","NCLE" pins are used as DAT0,DAT1,DAT2,DAT3,DAT4,
* DAT5,DAT6,DAT7,CMD,CLK for eMMC respectively
*/
conf-cmd-dat {
pins = "NDL0", "NDL1", "NDL2",
"NDL3", "NDL4", "NDL5",
"NDL6", "NDL7", "NRB";
input-enable;
bias-pull-up;
};
conf-clk {
pins = "NCLE";
bias-pull-down;
};
};
emmc_pins_uhs: emmc-pins-uhs {
mux {
function = "emmc";
groups = "emmc";
};
conf-cmd-dat {
pins = "NDL0", "NDL1", "NDL2",
"NDL3", "NDL4", "NDL5",
"NDL6", "NDL7", "NRB";
input-enable;
drive-strength = <4>;
bias-pull-up;
};
conf-clk {
pins = "NCLE";
drive-strength = <4>;
bias-pull-down;
};
};
eth_pins: eth-pins {
mux {
function = "eth";
groups = "mdc_mdio", "rgmii_via_gmac2";
};
};
i2c1_pins: i2c1-pins {
mux {
function = "i2c";
groups = "i2c1_0";
};
};
i2c2_pins: i2c2-pins {
mux {
function = "i2c";
groups = "i2c2_0";
};
};
i2s1_pins: i2s1-pins {
mux {
function = "i2s";
groups = "i2s_out_mclk_bclk_ws",
"i2s1_in_data",
"i2s1_out_data";
};
conf {
pins = "I2S1_IN", "I2S1_OUT", "I2S_BCLK",
"I2S_WS", "I2S_MCLK";
drive-strength = <12>;
bias-pull-down;
};
};
irrx_pins: irrx-pins {
mux {
function = "ir";
groups = "ir_1_rx";
};
};
irtx_pins: irtx-pins {
mux {
function = "ir";
groups = "ir_1_tx";
};
};
/* Parallel nand is shared pin with eMMC */
parallel_nand_pins: parallel-nand-pins {
mux {
function = "flash";
groups = "par_nand";
};
};
pcie0_pins: pcie0-pins {
mux {
function = "pcie";
groups = "pcie0_pad_perst",
"pcie0_1_waken",
"pcie0_1_clkreq";
};
};
pcie1_pins: pcie1-pins {
mux {
function = "pcie";
groups = "pcie1_pad_perst",
"pcie1_0_waken",
"pcie1_0_clkreq";
};
};
pmic_bus_pins: pmic-bus-pins {
mux {
function = "pmic";
groups = "pmic_bus";
};
};
pwm7_pins: pwm1-2-pins {
mux {
function = "pwm";
groups = "pwm_ch7_2";
};
};
wled_pins: wled-pins {
mux {
function = "led";
groups = "wled";
};
};
sd0_pins_default: sd0-pins-default {
mux {
function = "sd";
groups = "sd_0";
};
/* "I2S2_OUT, "I2S4_IN"", "I2S3_IN", "I2S2_IN",
* "I2S4_OUT", "I2S3_OUT" are used as DAT0, DAT1,
* DAT2, DAT3, CMD, CLK for SD respectively.
*/
conf-cmd-data {
pins = "I2S2_OUT", "I2S4_IN", "I2S3_IN",
"I2S2_IN","I2S4_OUT";
input-enable;
drive-strength = <8>;
bias-pull-up;
};
conf-clk {
pins = "I2S3_OUT";
drive-strength = <12>;
bias-pull-down;
};
conf-cd {
pins = "TXD3";
bias-pull-up;
};
};
sd0_pins_uhs: sd0-pins-uhs {
mux {
function = "sd";
groups = "sd_0";
};
conf-cmd-data {
pins = "I2S2_OUT", "I2S4_IN", "I2S3_IN",
"I2S2_IN","I2S4_OUT";
input-enable;
bias-pull-up;
};
conf-clk {
pins = "I2S3_OUT";
bias-pull-down;
};
};
/* Serial NAND is shared pin with SPI-NOR */
serial_nand_pins: serial-nand-pins {
mux {
function = "flash";
groups = "snfi";
};
};
spic0_pins: spic0-pins {
mux {
function = "spi";
groups = "spic0_0";
};
};
spic1_pins: spic1-pins {
mux {
function = "spi";
groups = "spic1_0";
};
};
/* SPI-NOR is shared pin with serial NAND */
spi_nor_pins: spi-nor-pins {
mux {
function = "flash";
groups = "spi_nor";
};
};
/* serial NAND is shared pin with SPI-NOR */
serial_nand_pins: serial-nand-pins {
mux {
function = "flash";
groups = "snfi";
};
};
uart0_pins: uart0-pins {
mux {
function = "uart";
groups = "uart0_0_tx_rx" ;
};
};
uart2_pins: uart2-pins {
mux {
function = "uart";
groups = "uart2_1_tx_rx" ;
};
};
watchdog_pins: watchdog-pins {
mux {
function = "watchdog";
groups = "watchdog";
};
};
};
&pwm {
pinctrl-names = "default";
pinctrl-0 = <&pwm7_pins>;
status = "okay";
};
&pwrap {
pinctrl-names = "default";
pinctrl-0 = <&pmic_bus_pins>;
status = "okay";
};
&sata {
status = "disable";
};
&sata_phy {
status = "disable";
};
&spi0 {
pinctrl-names = "default";
pinctrl-0 = <&spic0_pins>;
status = "okay";
};
&spi1 {
pinctrl-names = "default";
pinctrl-0 = <&spic1_pins>;
status = "okay";
};
&ssusb {
vusb33-supply = <&reg_3p3v>;
vbus-supply = <&reg_5v>;
status = "okay";
};
&u3phy {
status = "okay";
};
&uart0 {
pinctrl-names = "default";
pinctrl-0 = <&uart0_pins>;
status = "okay";
};
&uart2 {
pinctrl-names = "default";
pinctrl-0 = <&uart2_pins>;
status = "okay";
};
&watchdog {
pinctrl-names = "default";
pinctrl-0 = <&watchdog_pins>;
status = "okay";
};

2
target/linux/mediatek/image/Makefile
View File

@ -12,7 +12,7 @@ define Build/sysupgrade-emmc
rm -f $@.recovery
mkfs.fat -C $@.recovery 3070
./gen_mt7623_emmc_img.sh $@ \
./gen_$(SUBTARGET)_emmc_img.sh $@ \
$(IMAGE_KERNEL) \
$@.recovery \
$(IMAGE_ROOTFS)

19
target/linux/mediatek/image/gen_mt7622_emmc_img.sh Executable file
View File

@ -0,0 +1,19 @@
#!/bin/sh
OUTPUT_FILE=$1
KERNEL_FILE=$2
RECOVERY_FILE=$3
ROOTFS_FILE=$4
BS=512
#RECOVERY_OFFSET= kernel size / BS = 20M / 512 (blocks)
RECOVERY_OFFSET=40960
#ROOTFS_OFFSET = RECOVERY_OFFSET + (RECOVERY_SIZE / BS)
# = 40960 + (10M / 512) (blocks)
ROOTFS_OFFSET=61440
dd bs="$BS" of="$OUTPUT_FILE" if="$KERNEL_FILE"
dd bs="$BS" of="$OUTPUT_FILE" if="$RECOVERY_FILE" seek="$RECOVERY_OFFSET"
dd bs="$BS" of="$OUTPUT_FILE" if="$ROOTFS_FILE" seek="$ROOTFS_OFFSET"
dd if=/dev/zero of="$OUTPUT_FILE" bs=128k count=1 oflag=append conv=notrunc

40
target/linux/mediatek/image/mt7622.mk
View File

@ -1,14 +1,5 @@
KERNEL_LOADADDR := 0x41080000
define Device/mediatek_mt7622-rfb1
DEVICE_VENDOR := MediaTek
DEVICE_MODEL := MTK7622 rfb1 AP
DEVICE_DTS := mt7622-rfb1
DEVICE_DTS_DIR := $(DTS_DIR)/mediatek
DEVICE_PACKAGES := kmod-usb-ohci kmod-usb2 kmod-usb3 kmod-ata-ahci-mtk
endef
TARGET_DEVICES += mediatek_mt7622-rfb1
define Device/bpi_bananapi-r64
DEVICE_VENDOR := Bpi
DEVICE_MODEL := Banana Pi R64
@ -19,14 +10,33 @@ define Device/bpi_bananapi-r64
endef
TARGET_DEVICES += bpi_bananapi-r64
define Device/elecom-wrc-2533gent
define Device/bpi_bananapi-r64-rootdisk
DEVICE_VENDOR := Bpi
DEVICE_MODEL := Banana Pi R64 (rootdisk)
DEVICE_DTS := mt7622-bananapi-bpi-r64-rootdisk
DEVICE_DTS_DIR := $(DTS_DIR)/mediatek
SUPPORTED_DEVICES := bananapi,bpi-r64
DEVICE_PACKAGES := kmod-usb-ohci kmod-usb2 kmod-usb3 kmod-ata-ahci-mtk
IMAGES := sysupgrade-emmc.bin.gz
IMAGE/sysupgrade-emmc.bin.gz := sysupgrade-emmc | gzip | append-metadata
endef
TARGET_DEVICES += bpi_bananapi-r64-rootdisk
define Device/elecom_wrc-2533gent
DEVICE_VENDOR := Elecom
DEVICE_MODEL := WRC-2533GENT
DEVICE_DTS := mt7622-elecom-wrc-2533gent
DEVICE_DTS_DIR := $(DTS_DIR)/mediatek
DEVICE_PACKAGES := kmod-usb-ohci kmod-usb2 kmod-usb3 \
kmod-mt7615e kmod-mt7615-firmware \
mt7622bt-firmware swconfig
SUPPORTED_DEVICES := elecom,wrc-2533gent
DEVICE_PACKAGES := kmod-usb-ohci kmod-usb2 kmod-usb3 kmod-mt7615e \
kmod-mt7615-firmware mt7622bt-firmware swconfig
endef
TARGET_DEVICES += elecom-wrc-2533gent
TARGET_DEVICES += elecom_wrc-2533gent
define Device/mediatek_mt7622-rfb1
DEVICE_VENDOR := MediaTek
DEVICE_MODEL := MTK7622 rfb1 AP
DEVICE_DTS := mt7622-rfb1
DEVICE_DTS_DIR := $(DTS_DIR)/mediatek
DEVICE_PACKAGES := kmod-usb-ohci kmod-usb2 kmod-usb3 kmod-ata-ahci-mtk
endef
TARGET_DEVICES += mediatek_mt7622-rfb1

23
target/linux/mediatek/image/mt7623.mk
View File

@ -1,16 +1,5 @@
KERNEL_LOADADDR := 0x80008000
define Device/unielec_u7623-02-emmc-512m
DEVICE_VENDOR := UniElec
DEVICE_MODEL := U7623-02
DEVICE_VARIANT := eMMC/512MB RAM
DEVICE_DTS := mt7623a-unielec-u7623-02-emmc-512m
DEVICE_PACKAGES := mkf2fs e2fsprogs kmod-fs-vfat kmod-nls-cp437 kmod-nls-iso8859-1 kmod-mmc
IMAGES := sysupgrade-emmc.bin.gz
IMAGE/sysupgrade-emmc.bin.gz := sysupgrade-emmc | gzip | append-metadata
endef
TARGET_DEVICES += unielec_u7623-02-emmc-512m
define Device/bpi_bananapi-r2
DEVICE_VENDOR := Bpi
DEVICE_MODEL := Banana Pi R2
@ -18,3 +7,15 @@ define Device/bpi_bananapi-r2
SUPPORTED_DEVICES := bananapi,bpi-r2
endef
TARGET_DEVICES += bpi_bananapi-r2
define Device/unielec_u7623-02-emmc-512m
DEVICE_VENDOR := UniElec
DEVICE_MODEL := U7623-02
DEVICE_VARIANT := eMMC/512MB RAM
DEVICE_DTS := mt7623a-unielec-u7623-02-emmc-512m
DEVICE_PACKAGES := kmod-fs-vfat kmod-nls-cp437 kmod-nls-iso8859-1 kmod-mmc \
mkf2fs e2fsprogs
IMAGES := sysupgrade-emmc.bin.gz
IMAGE/sysupgrade-emmc.bin.gz := sysupgrade-emmc | gzip | append-metadata
endef
TARGET_DEVICES += unielec_u7623-02-emmc-512m

6
target/linux/mediatek/mt7622/base-files/etc/board.d/02_network
View File

@ -9,7 +9,11 @@ mediatek_setup_interfaces()
local board="$1"
case $board in
'elecom,wrc-2533gent')
bananapi,bpi-r64-rootdisk|\
bananapi,bpi-r64)
ucidef_set_interfaces_lan_wan "lan0 lan1 lan2 lan3" wan
;;
*)
ucidef_add_switch "switch0" \
"0:lan" "1:lan" "2:lan" "3:lan" "4:wan" "6u@eth0" "5u@eth1"
;;

20
target/linux/mediatek/mt7622/base-files/lib/preinit/79_move_config Normal file
View File

@ -0,0 +1,20 @@
#!/bin/sh
. /lib/upgrade/common.sh
RECOVERY_PART=/dev/mmcblk0p6
move_config() {
if [ -b $RECOVERY_PART ]; then
insmod nls_cp437
insmod nls_iso8859-1
insmod fat
insmod vfat
mkdir -p /recovery
mount -o rw,noatime $RECOVERY_PART /recovery
[ -f "/recovery/$BACKUP_FILE" ] && mv -f "/recovery/$BACKUP_FILE" /
umount /recovery
fi
}
boot_hook_add preinit_mount_root move_config

28
target/linux/mediatek/mt7622/base-files/lib/upgrade/platform.sh
View File

@ -2,6 +2,11 @@ platform_do_upgrade() {
local board=$(board_name)
case "$board" in
bananapi,bpi-r64-rootdisk)
#2097152=0x200000 is the offset in bytes from the start
#of eMMC and to the location of the kernel
get_image "$1" | dd of=/dev/mmcblk0 bs=2097152 seek=1 conv=fsync
;;
*)
default_do_upgrade "$1"
;;
@ -17,19 +22,30 @@ platform_check_image() {
[ "$#" -gt 1 ] && return 1
case "$board" in
elecom,wrc-2533gent)
*)
[ "$magic" != "d00dfeed" ] && {
echo "Invalid image type."
return 1
}
return 0
;;
*)
echo "Sysupgrade is not supported on your board yet."
return 1
;;
esac
return 0
}
platform_copy_config_emmc() {
mkdir -p /recovery
mount -o rw,noatime /dev/mmcblk0p6 /recovery
cp -af "$UPGRADE_BACKUP" "/recovery/$BACKUP_FILE"
sync
umount /recovery
}
platform_copy_config() {
case "$(board_name)" in
bananapi,bpi-r64-rootdisk)
platform_copy_config_emmc
;;
esac
}

7
target/linux/mediatek/mt7622/config-5.4
View File

@ -393,7 +393,7 @@ CONFIG_MMC_MTK=y
# CONFIG_MMC_TIFM_SD is not set
CONFIG_MODULES_TREE_LOOKUP=y
CONFIG_MODULES_USE_ELF_RELA=y
CONFIG_MT753X_GSW=y
# CONFIG_MT753X_GSW is not set
CONFIG_MTD_NAND_CORE=y
CONFIG_MTD_NAND_ECC_SW_HAMMING=y
CONFIG_MTD_NAND_MTK=y
@ -415,8 +415,13 @@ CONFIG_MTK_TIMER=y
CONFIG_MUTEX_SPIN_ON_OWNER=y
CONFIG_NEED_DMA_MAP_STATE=y
CONFIG_NEED_SG_DMA_LENGTH=y
CONFIG_NET_DEVLINK=y
CONFIG_NET_DSA=y
CONFIG_NET_DSA_MT7530=y
CONFIG_NET_DSA_TAG_MTK=y
CONFIG_NET_FLOW_LIMIT=y
CONFIG_NET_MEDIATEK_SOC=y
CONFIG_NET_SWITCHDEV=y
CONFIG_NET_VENDOR_MEDIATEK=y
CONFIG_NLS=y
CONFIG_NO_HZ_COMMON=y

5464
target/linux/mediatek/patches-5.4/0500-v5.6-crypto-backport-inside-secure.patch Normal file
View File

File diff suppressed because it is too large Load Diff

27
target/linux/mediatek/patches-5.4/0501-crypto-add-eip97-inside-secure-support.patch Normal file
View File

@ -0,0 +1,27 @@
--- a/drivers/crypto/inside-secure/safexcel.c
+++ b/drivers/crypto/inside-secure/safexcel.c
@@ -595,6 +595,14 @@
val |= EIP197_MST_CTRL_TX_MAX_CMD(5);
writel(val, EIP197_HIA_AIC(priv) + EIP197_HIA_MST_CTRL);
}
+ /*
+ * Set maximum number of TX commands to 2^5 = 32 for EIP97 HW2.1
+ */
+ else {
+ val = 0;
+ val |= EIP97_MST_CTRL_TX_MAX_CMD(5);
+ writel(val, EIP197_HIA_AIC(priv) + EIP197_HIA_MST_CTRL);
+ }
/* Configure wr/rd cache values */
writel(EIP197_MST_CTRL_RD_CACHE(RD_CACHE_4BITS) |
--- a/drivers/crypto/inside-secure/safexcel.h
+++ b/drivers/crypto/inside-secure/safexcel.h
@@ -306,6 +306,7 @@
#define EIP197_MST_CTRL_RD_CACHE(n) (((n) & 0xf) << 0)
#define EIP197_MST_CTRL_WD_CACHE(n) (((n) & 0xf) << 4)
#define EIP197_MST_CTRL_TX_MAX_CMD(n) (((n) & 0xf) << 20)
+#define EIP97_MST_CTRL_TX_MAX_CMD(n) (((n) & 0xf) << 4)
#define EIP197_MST_CTRL_BYTE_SWAP BIT(24)
#define EIP197_MST_CTRL_NO_BYTE_SWAP BIT(25)
#define EIP197_MST_CTRL_BYTE_SWAP_BITS GENMASK(25, 24)

23
target/linux/mediatek/patches-5.4/0502-dts-mt7623-eip97-inside-secure-support.patch Normal file
View File

@ -0,0 +1,23 @@
--- a/arch/arm/boot/dts/mt7623.dtsi
+++ b/arch/arm/boot/dts/mt7623.dtsi
@@ -1047,17 +1047,14 @@
};
crypto: crypto@1b240000 {
- compatible = "mediatek,eip97-crypto";
+ compatible = "inside-secure,safexcel-eip97";
reg = <0 0x1b240000 0 0x20000>;
interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_LOW>,
<GIC_SPI 83 IRQ_TYPE_LEVEL_LOW>,
<GIC_SPI 84 IRQ_TYPE_LEVEL_LOW>,
- <GIC_SPI 91 IRQ_TYPE_LEVEL_LOW>,
- <GIC_SPI 97 IRQ_TYPE_LEVEL_LOW>;
+ <GIC_SPI 91 IRQ_TYPE_LEVEL_LOW>;
+ interrupt-names = "ring0", "ring1", "ring2", "ring3";
clocks = <&ethsys CLK_ETHSYS_CRYPTO>;
- clock-names = "cryp";
- power-domains = <&scpsys MT2701_POWER_DOMAIN_ETH>;
- status = "disabled";
};
bdpsys: syscon@1c000000 {

100
target/linux/mediatek/patches-5.4/0600-1-6-net-dsa-mt7530-Refine-message-in-Kconfig.patch Normal file
View File

@ -0,0 +1,100 @@
From patchwork Tue Dec 10 08:14:37 2019
Content-Type: text/plain; charset="utf-8"
MIME-Version: 1.0
Content-Transfer-Encoding: 7bit
X-Patchwork-Submitter: Landen Chao <landen.chao@mediatek.com>
X-Patchwork-Id: 1206962
X-Patchwork-Delegate: davem@davemloft.net
Return-Path: <netdev-owner@vger.kernel.org>
X-Original-To: patchwork-incoming-netdev@ozlabs.org
Delivered-To: patchwork-incoming-netdev@ozlabs.org
Authentication-Results: ozlabs.org; spf=none (no SPF record)
smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67;
helo=vger.kernel.org;
envelope-from=netdev-owner@vger.kernel.org;
receiver=<UNKNOWN>)
Authentication-Results: ozlabs.org; dmarc=pass (p=none dis=none)
header.from=mediatek.com
Authentication-Results: ozlabs.org; dkim=pass (1024-bit key;
unprotected) header.d=mediatek.com header.i=@mediatek.com
header.b="pTp2PPKi"; dkim-atps=neutral
Received: from vger.kernel.org (vger.kernel.org [209.132.180.67])
by ozlabs.org (Postfix) with ESMTP id 47XCY42hJqz9sRf
for <patchwork-incoming-netdev@ozlabs.org>;
Tue, 10 Dec 2019 19:15:20 +1100 (AEDT)
Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand
id S1727061AbfLJIO5 (ORCPT
<rfc822;patchwork-incoming-netdev@ozlabs.org>);
Tue, 10 Dec 2019 03:14:57 -0500
Received: from mailgw02.mediatek.com ([210.61.82.184]:45567 "EHLO
mailgw02.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by
vger.kernel.org with ESMTP id S1726932AbfLJIO4 (ORCPT
<rfc822;netdev@vger.kernel.org>); Tue, 10 Dec 2019 03:14:56 -0500
X-UUID: f5656f2ff80846ebb40e3da87d60fb90-20191210
DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed;
d=mediatek.com; s=dk;
h=Content-Transfer-Encoding:Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From;
bh=THbuVAlbiUyMgTyO0rwrKX/mskzsxNwDv9gxXp2O2c8=;
b=pTp2PPKiPwR8QPOOf5yohf9lFERpEDlo/g/t2ChREfzFb9c+wylx++/div4hAB337+Ja2KIzbSu4URgdj5XHXUly8yuxrD8OBvV+ox0jlNLiRIN2dkCgL4fyzPr7ZPSk9lObJW05Yx2LY6Jy6eJZZXSShLlqLd0lDKwy6FT+hSI=;
X-UUID: f5656f2ff80846ebb40e3da87d60fb90-20191210
Received: from mtkcas07.mediatek.inc [(172.21.101.84)] by
mailgw02.mediatek.com (envelope-from <landen.chao@mediatek.com>)
(Cellopoint E-mail Firewall v4.1.10 Build 0809 with TLS)
with ESMTP id 565263134; Tue, 10 Dec 2019 16:14:47 +0800
Received: from mtkcas08.mediatek.inc (172.21.101.126) by
mtkmbs07n1.mediatek.inc (172.21.101.16) with Microsoft SMTP Server
(TLS) id 15.0.1395.4; Tue, 10 Dec 2019 16:14:38 +0800
Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkcas08.mediatek.inc
(172.21.101.73) with Microsoft SMTP Server id 15.0.1395.4 via
Frontend Transport; Tue, 10 Dec 2019 16:14:26 +0800
From: Landen Chao <landen.chao@mediatek.com>
To: <andrew@lunn.ch>, <f.fainelli@gmail.com>,
<vivien.didelot@savoirfairelinux.com>, <matthias.bgg@gmail.com>,
<robh+dt@kernel.org>, <mark.rutland@arm.com>
CC: <devicetree@vger.kernel.org>, <netdev@vger.kernel.org>,
<linux-kernel@vger.kernel.org>,
<linux-mediatek@lists.infradead.org>, <davem@davemloft.net>,
<sean.wang@mediatek.com>, <opensource@vdorst.com>,
<frank-w@public-files.de>, Landen Chao <landen.chao@mediatek.com>
Subject: [PATCH net-next 1/6] net: dsa: mt7530: Refine message in Kconfig
Date: Tue, 10 Dec 2019 16:14:37 +0800
Message-ID: <6ecf6cbf38223f35854bc361c2eefa1d85c724d2.1575914275.git.landen.chao@mediatek.com>
X-Mailer: git-send-email 2.18.0
In-Reply-To: <cover.1575914275.git.landen.chao@mediatek.com>
References: <cover.1575914275.git.landen.chao@mediatek.com>
MIME-Version: 1.0
X-MTK: N
Sender: netdev-owner@vger.kernel.org
Precedence: bulk
List-ID: <netdev.vger.kernel.org>
X-Mailing-List: netdev@vger.kernel.org
Refine message in Kconfig with fixing typo and an explicit MT7621 support.
Signed-off-by: Landen Chao <landen.chao@mediatek.com>
Signed-off-by: Sean Wang <sean.wang@mediatek.com>
Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
---
drivers/net/dsa/Kconfig | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/net/dsa/Kconfig b/drivers/net/dsa/Kconfig
index c7667645f04a..467f80157acf 100644
--- a/drivers/net/dsa/Kconfig
+++ b/drivers/net/dsa/Kconfig
@@ -33,12 +33,12 @@ config NET_DSA_LANTIQ_GSWIP
the xrx200 / VR9 SoC.
config NET_DSA_MT7530
- tristate "Mediatek MT7530 Ethernet switch support"
+ tristate "MediaTek MT7530 and MT7621 Ethernet switch support"
depends on NET_DSA
select NET_DSA_TAG_MTK
---help---
- This enables support for the Mediatek MT7530 Ethernet switch
- chip.
+ This enables support for the MediaTek MT7530 and MT7621 Ethernet
+ switch chip.
config NET_DSA_MV88E6060
tristate "Marvell 88E6060 ethernet switch chip support"

445
target/linux/mediatek/patches-5.4/0600-2-6-net-dsa-mt7530-Extend-device-data-ready-for-adding-a-new-hardware.patch Normal file
View File

@ -0,0 +1,445 @@
From patchwork Tue Dec 10 08:14:38 2019
Content-Type: text/plain; charset="utf-8"
MIME-Version: 1.0
Content-Transfer-Encoding: 7bit
X-Patchwork-Submitter: Landen Chao <landen.chao@mediatek.com>
X-Patchwork-Id: 1206963
X-Patchwork-Delegate: davem@davemloft.net
Return-Path: <netdev-owner@vger.kernel.org>
X-Original-To: patchwork-incoming-netdev@ozlabs.org
Delivered-To: patchwork-incoming-netdev@ozlabs.org
Authentication-Results: ozlabs.org; spf=none (no SPF record)
smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67;
helo=vger.kernel.org;
envelope-from=netdev-owner@vger.kernel.org;
receiver=<UNKNOWN>)
Authentication-Results: ozlabs.org; dmarc=pass (p=none dis=none)
header.from=mediatek.com
Authentication-Results: ozlabs.org; dkim=pass (1024-bit key;
unprotected) header.d=mediatek.com header.i=@mediatek.com
header.b="UJ5NATux"; dkim-atps=neutral
Received: from vger.kernel.org (vger.kernel.org [209.132.180.67])
by ozlabs.org (Postfix) with ESMTP id 47XCY92tBkz9sR7
for <patchwork-incoming-netdev@ozlabs.org>;
Tue, 10 Dec 2019 19:15:25 +1100 (AEDT)
Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand
id S1727003AbfLJIO4 (ORCPT
<rfc822;patchwork-incoming-netdev@ozlabs.org>);
Tue, 10 Dec 2019 03:14:56 -0500
Received: from mailgw02.mediatek.com ([210.61.82.184]:45567 "EHLO
mailgw02.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by
vger.kernel.org with ESMTP id S1726071AbfLJIOy (ORCPT
<rfc822;netdev@vger.kernel.org>); Tue, 10 Dec 2019 03:14:54 -0500
X-UUID: a18674d7b33c423e9e67b7440f4771cf-20191210
DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed;
d=mediatek.com; s=dk;
h=Content-Transfer-Encoding:Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From;
bh=c2C/fEHYw/8uqadmiP2m2xa2hsUpAd52urXVJTPlYck=;
b=UJ5NATuxMtqHln5i6BTpWiLnxGKgWvp4DpRsKVO2xdnz2cJaT4XL8F/T5fK3CTF4nAai0EKPAcqp+rr8eCLq7uURJv5e5h+ZIzKLSAB4zgnchXesQLo0uFS8vs5w2yp49j6bez1z3v/uN+1+Lpq0uYid9awCqzvbnovrooEysu4=;
X-UUID: a18674d7b33c423e9e67b7440f4771cf-20191210
Received: from mtkcas09.mediatek.inc [(172.21.101.178)] by
mailgw02.mediatek.com (envelope-from <landen.chao@mediatek.com>)
(Cellopoint E-mail Firewall v4.1.10 Build 0809 with TLS)
with ESMTP id 1965641267; Tue, 10 Dec 2019 16:14:46 +0800
Received: from mtkcas08.mediatek.inc (172.21.101.126) by
mtkmbs07n2.mediatek.inc (172.21.101.141) with Microsoft SMTP Server
(TLS) id 15.0.1395.4; Tue, 10 Dec 2019 16:14:31 +0800
Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkcas08.mediatek.inc
(172.21.101.73) with Microsoft SMTP Server id 15.0.1395.4 via
Frontend Transport; Tue, 10 Dec 2019 16:14:26 +0800
From: Landen Chao <landen.chao@mediatek.com>
To: <andrew@lunn.ch>, <f.fainelli@gmail.com>,
<vivien.didelot@savoirfairelinux.com>, <matthias.bgg@gmail.com>,
<robh+dt@kernel.org>, <mark.rutland@arm.com>
CC: <devicetree@vger.kernel.org>, <netdev@vger.kernel.org>,
<linux-kernel@vger.kernel.org>,
<linux-mediatek@lists.infradead.org>, <davem@davemloft.net>,
<sean.wang@mediatek.com>, <opensource@vdorst.com>,
<frank-w@public-files.de>, Landen Chao <landen.chao@mediatek.com>
Subject: [PATCH net-next 2/6] net: dsa: mt7530: Extend device data ready for
adding a new hardware
Date: Tue, 10 Dec 2019 16:14:38 +0800
Message-ID: <2d546d6bb15ff8b4b75af2220e20db4e634f4145.1575914275.git.landen.chao@mediatek.com>
X-Mailer: git-send-email 2.18.0
In-Reply-To: <cover.1575914275.git.landen.chao@mediatek.com>
References: <cover.1575914275.git.landen.chao@mediatek.com>
MIME-Version: 1.0
X-MTK: N
Sender: netdev-owner@vger.kernel.org
Precedence: bulk
List-ID: <netdev.vger.kernel.org>
X-Mailing-List: netdev@vger.kernel.org
Add a structure holding required operations for each device such as device
initialization, PHY port read or write, a checker whether PHY interface is
supported on a certain port, MAC port setup for either bus pad or a
specific PHY interface.
The patch is done for ready adding a new hardware MT7531.
Signed-off-by: Landen Chao <landen.chao@mediatek.com>
Signed-off-by: Sean Wang <sean.wang@mediatek.com>
---
drivers/net/dsa/mt7530.c | 231 +++++++++++++++++++++++++++++----------
drivers/net/dsa/mt7530.h | 29 ++++-
2 files changed, 203 insertions(+), 57 deletions(-)
Index: linux-5.4.43/drivers/net/dsa/mt7530.c
===================================================================
--- linux-5.4.43.orig/drivers/net/dsa/mt7530.c
+++ linux-5.4.43/drivers/net/dsa/mt7530.c
@@ -373,7 +373,7 @@ mt7530_fdb_write(struct mt7530_priv *pri
}
static int
-mt7530_pad_clk_setup(struct dsa_switch *ds, int mode)
+mt7530_pad_clk_setup(struct dsa_switch *ds, phy_interface_t mode)
{
struct mt7530_priv *priv = ds->priv;
u32 ncpo1, ssc_delta, trgint, i, xtal;
@@ -1355,13 +1355,111 @@ mt7530_setup(struct dsa_switch *ds)
return 0;
}
-static void mt7530_phylink_mac_config(struct dsa_switch *ds, int port,
+static bool mt7530_phy_supported(struct dsa_switch *ds, int port,
+ const struct phylink_link_state *state)
+{
+ struct mt7530_priv *priv = ds->priv;
+
+ switch (port) {
+ case 0: /* Internal phy */
+ case 1:
+ case 2:
+ case 3:
+ case 4:
+ if (state->interface != PHY_INTERFACE_MODE_GMII)
+ goto unsupported;
+ break;
+ case 5: /* 2nd cpu port with phy of port 0 or 4 / external phy */
+ if (!phy_interface_mode_is_rgmii(state->interface) &&
+ state->interface != PHY_INTERFACE_MODE_MII &&
+ state->interface != PHY_INTERFACE_MODE_GMII)
+ goto unsupported;
+ break;
+ case 6: /* 1st cpu port */
+ if (state->interface != PHY_INTERFACE_MODE_RGMII &&
+ state->interface != PHY_INTERFACE_MODE_TRGMII)
+ goto unsupported;
+ break;
+ default:
+ dev_err(priv->dev, "%s: unsupported port: %i\n", __func__,
+ port);
+ goto unsupported;
+ }
+
+ return true;
+
+unsupported:
+ return false;
+}
+
+static bool mt753x_phy_supported(struct dsa_switch *ds, int port,
+ const struct phylink_link_state *state)
+{
+ struct mt7530_priv *priv = ds->priv;
+
+ return priv->info->phy_supported(ds, port, state);
+}
+
+static int
+mt7530_pad_setup(struct dsa_switch *ds, const struct phylink_link_state *state)
+{
+ struct mt7530_priv *priv = ds->priv;
+
+ /* Setup TX circuit incluing relevant PAD and driving */
+ mt7530_pad_clk_setup(ds, state->interface);
+
+ if (priv->id == ID_MT7530) {
+ /* Setup RX circuit, relevant PAD and driving on the
+ * host which must be placed after the setup on the
+ * device side is all finished.
+ */
+ mt7623_pad_clk_setup(ds);
+ }
+
+ return 0;
+}
+
+static int
+mt753x_pad_setup(struct dsa_switch *ds, const struct phylink_link_state *state)
+{
+ struct mt7530_priv *priv = ds->priv;
+
+ return priv->info->pad_setup(ds, state);
+}
+
+static int
+mt7530_mac_setup(struct dsa_switch *ds, int port, unsigned int mode,
+ const struct phylink_link_state *state)
+{
+ struct mt7530_priv *priv = ds->priv;
+
+ /* Only need to setup port5. */
+ if (port != 5)
+ return 0;
+
+ mt7530_setup_port5(priv->ds, state->interface);
+
+ return 0;
+}
+
+static int mt753x_mac_setup(struct dsa_switch *ds, int port, unsigned int mode,
+ const struct phylink_link_state *state)
+{
+ struct mt7530_priv *priv = ds->priv;
+
+ return priv->info->mac_setup(ds, port, mode, state);
+}
+
+static void mt753x_phylink_mac_config(struct dsa_switch *ds, int port,
unsigned int mode,
const struct phylink_link_state *state)
{
struct mt7530_priv *priv = ds->priv;
u32 mcr_cur, mcr_new;
+ if (!mt753x_phy_supported(ds, port, state))
+ return;
+
switch (port) {
case 0: /* Internal phy */
case 1:
@@ -1374,24 +1472,15 @@ static void mt7530_phylink_mac_config(st
case 5: /* 2nd cpu port with phy of port 0 or 4 / external phy */
if (priv->p5_interface == state->interface)
break;
- if (!phy_interface_mode_is_rgmii(state->interface) &&
- state->interface != PHY_INTERFACE_MODE_MII &&
- state->interface != PHY_INTERFACE_MODE_GMII)
- return;
-
- mt7530_setup_port5(ds, state->interface);
+ if (mt753x_mac_setup(ds, port, mode, state) < 0)
+ goto unsupported;
break;
case 6: /* 1st cpu port */
if (priv->p6_interface == state->interface)
break;
-
- if (state->interface != PHY_INTERFACE_MODE_RGMII &&
- state->interface != PHY_INTERFACE_MODE_TRGMII)
- return;
-
- /* Setup TX circuit incluing relevant PAD and driving */
- mt7530_pad_clk_setup(ds, state->interface);
-
+ mt753x_pad_setup(ds, state);
+ if (mt753x_mac_setup(ds, port, mode, state) < 0)
+ goto unsupported;
priv->p6_interface = state->interface;
break;
default:
@@ -1459,38 +1548,14 @@ static void mt7530_phylink_mac_link_up(s
mt7530_port_set_status(priv, port, 1);
}
-static void mt7530_phylink_validate(struct dsa_switch *ds, int port,
+static void mt753x_phylink_validate(struct dsa_switch *ds, int port,
unsigned long *supported,
struct phylink_link_state *state)
{
__ETHTOOL_DECLARE_LINK_MODE_MASK(mask) = { 0, };
- switch (port) {
- case 0: /* Internal phy */
- case 1:
- case 2:
- case 3:
- case 4:
- if (state->interface != PHY_INTERFACE_MODE_NA &&
- state->interface != PHY_INTERFACE_MODE_GMII)
- goto unsupported;
- break;
- case 5: /* 2nd cpu port with phy of port 0 or 4 / external phy */
- if (state->interface != PHY_INTERFACE_MODE_NA &&
- !phy_interface_mode_is_rgmii(state->interface) &&
- state->interface != PHY_INTERFACE_MODE_MII &&
- state->interface != PHY_INTERFACE_MODE_GMII)
- goto unsupported;
- break;
- case 6: /* 1st cpu port */
- if (state->interface != PHY_INTERFACE_MODE_NA &&
- state->interface != PHY_INTERFACE_MODE_RGMII &&
- state->interface != PHY_INTERFACE_MODE_TRGMII)
- goto unsupported;
- break;
- default:
- dev_err(ds->dev, "%s: unsupported port: %i\n", __func__, port);
-unsupported:
+ if (state->interface != PHY_INTERFACE_MODE_NA &&
+ !mt753x_phy_supported(ds, port, state)) {
linkmode_zero(supported);
return;
}
@@ -1609,12 +1674,36 @@ static int mt7530_set_mac_eee(struct dsa
return 0;
}
+static int
+mt753x_setup(struct dsa_switch *ds)
+{
+ struct mt7530_priv *priv = ds->priv;
+
+ return priv->info->setup(ds);
+}
+
+static int
+mt753x_phy_read(struct dsa_switch *ds, int port, int regnum)
+{
+ struct mt7530_priv *priv = ds->priv;
+
+ return priv->info->phy_read(ds, port, regnum);
+}
+
+static int
+mt753x_phy_write(struct dsa_switch *ds, int port, int regnum, u16 val)
+{
+ struct mt7530_priv *priv = ds->priv;
+
+ return priv->info->phy_write(ds, port, regnum, val);
+}
+
static const struct dsa_switch_ops mt7530_switch_ops = {
.get_tag_protocol = mtk_get_tag_protocol,
- .setup = mt7530_setup,
+ .setup = mt753x_setup,
.get_strings = mt7530_get_strings,
- .phy_read = mt7530_phy_read,
- .phy_write = mt7530_phy_write,
+ .phy_read = mt753x_phy_read,
+ .phy_write = mt753x_phy_write,
.get_ethtool_stats = mt7530_get_ethtool_stats,
.get_sset_count = mt7530_get_sset_count,
.port_enable = mt7530_port_enable,
@@ -1631,18 +1720,39 @@ static const struct dsa_switch_ops mt753
.port_vlan_del = mt7530_port_vlan_del,
.port_mirror_add = mt7530_port_mirror_add,
.port_mirror_del = mt7530_port_mirror_del,
- .phylink_validate = mt7530_phylink_validate,
+ .phylink_validate = mt753x_phylink_validate,
.phylink_mac_link_state = mt7530_phylink_mac_link_state,
- .phylink_mac_config = mt7530_phylink_mac_config,
+ .phylink_mac_config = mt753x_phylink_mac_config,
.phylink_mac_link_down = mt7530_phylink_mac_link_down,
.phylink_mac_link_up = mt7530_phylink_mac_link_up,
.get_mac_eee = mt7530_get_mac_eee,
.set_mac_eee = mt7530_set_mac_eee,
};
-static const struct of_device_id mt7530_of_match[] = {
- { .compatible = "mediatek,mt7621", .data = (void *)ID_MT7621, },
- { .compatible = "mediatek,mt7530", .data = (void *)ID_MT7530, },
+static const struct mt753x_info mt753x_table[] = {
+ [ID_MT7621] = {
+ .id = ID_MT7621,
+ .setup = mt7530_setup,
+ .phy_read = mt7530_phy_read,
+ .phy_write = mt7530_phy_write,
+ .phy_supported = mt7530_phy_supported,
+ .pad_setup = mt7530_pad_setup,
+ .mac_setup = mt7530_mac_setup,
+ },
+ [ID_MT7530] = {
+ .id = ID_MT7530,
+ .setup = mt7530_setup,
+ .phy_read = mt7530_phy_read,
+ .phy_write = mt7530_phy_write,
+ .phy_supported = mt7530_phy_supported,
+ .pad_setup = mt7530_pad_setup,
+ .mac_setup = mt7530_mac_setup,
+ },
+};
+
+ static const struct of_device_id mt7530_of_match[] = {
+ { .compatible = "mediatek,mt7621", .data = &mt753x_table[ID_MT7621], },
+ { .compatible = "mediatek,mt7530", .data = &mt753x_table[ID_MT7530], },
{ /* sentinel */ },
};
MODULE_DEVICE_TABLE(of, mt7530_of_match);
@@ -1680,8 +1790,19 @@ mt7530_probe(struct mdio_device *mdiodev
/* Get the hardware identifier from the devicetree node.
* We will need it for some of the clock and regulator setup.
*/
- priv->id = (unsigned int)(unsigned long)
- of_device_get_match_data(&mdiodev->dev);
+ priv->info = of_device_get_match_data(&mdiodev->dev);
+ if (!priv->info)
+ return -EINVAL;
+
+ /* Sanity check if these required device operstaions are filled
+ * properly.
+ */
+ if (!priv->info->setup || !priv->info->phy_read ||
+ !priv->info->phy_write || !priv->info->phy_supported ||
+ !priv->info->pad_setup || !priv->info->mac_setup)
+ return -EINVAL;
+
+ priv->id = priv->info->id;
if (priv->id == ID_MT7530) {
priv->core_pwr = devm_regulator_get(&mdiodev->dev, "core");
Index: linux-5.4.43/drivers/net/dsa/mt7530.h
===================================================================
--- linux-5.4.43.orig/drivers/net/dsa/mt7530.h
+++ linux-5.4.43/drivers/net/dsa/mt7530.h
@@ -11,7 +11,7 @@
#define MT7530_NUM_FDB_RECORDS 2048
#define MT7530_ALL_MEMBERS 0xff
-enum {
+enum mt753x_id {
ID_MT7530 = 0,
ID_MT7621 = 1,
};
@@ -447,6 +447,32 @@ static const char *p5_intf_modes(unsigne
}
}
+/* struct mt753x_info - This is the main data structure for holding the specific
+ * part for each supported device
+ * @setup: Holding the handler to a device initialization
+ * @phy_read: Holding the way reading PHY port
+ * @phy_write: Holding the way writing PHY port
+ * @phy_supported: Check if the PHY type is being supported on a certain
+ * port
+ * @pad_setup: Holding the way setting up the bus pad for a certain MAC
+ * port
+ * @mac_setup: Holding the way setting up the PHY attribute for a
+ * certain MAC port
+ */
+struct mt753x_info {
+ enum mt753x_id id;
+
+ int (*setup)(struct dsa_switch *ds);
+ int (*phy_read)(struct dsa_switch *ds, int port, int regnum);
+ int (*phy_write)(struct dsa_switch *ds, int port, int regnum, u16 val);
+ bool (*phy_supported)(struct dsa_switch *ds, int port,
+ const struct phylink_link_state *state);
+ int (*pad_setup)(struct dsa_switch *ds,
+ const struct phylink_link_state *state);
+ int (*mac_setup)(struct dsa_switch *ds, int port, unsigned int mode,
+ const struct phylink_link_state *state);
+};
+
/* struct mt7530_priv - This is the main data structure for holding the state
* of the driver
* @dev: The device pointer
@@ -472,6 +498,7 @@ struct mt7530_priv {
struct regulator *core_pwr;
struct regulator *io_pwr;
struct gpio_desc *reset;
+ const struct mt753x_info *info;
unsigned int id;
bool mcm;
phy_interface_t p6_interface;

181
target/linux/mediatek/patches-5.4/0600-3-6-dt-bindings-net-dsa-add-new-MT7531-binding-to-support-MT7531.patch Normal file
View File

@ -0,0 +1,181 @@
From patchwork Tue Dec 10 08:14:39 2019
Content-Type: text/plain; charset="utf-8"
MIME-Version: 1.0
Content-Transfer-Encoding: 7bit
X-Patchwork-Submitter: Landen Chao <landen.chao@mediatek.com>
X-Patchwork-Id: 1206955
X-Patchwork-Delegate: davem@davemloft.net
Return-Path: <netdev-owner@vger.kernel.org>
X-Original-To: patchwork-incoming-netdev@ozlabs.org
Delivered-To: patchwork-incoming-netdev@ozlabs.org
Authentication-Results: ozlabs.org; spf=none (no SPF record)
smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67;
helo=vger.kernel.org;
envelope-from=netdev-owner@vger.kernel.org;
receiver=<UNKNOWN>)
Authentication-Results: ozlabs.org; dmarc=pass (p=none dis=none)
header.from=mediatek.com
Authentication-Results: ozlabs.org; dkim=pass (1024-bit key;
unprotected) header.d=mediatek.com header.i=@mediatek.com
header.b="SuczJHZp"; dkim-atps=neutral
Received: from vger.kernel.org (vger.kernel.org [209.132.180.67])
by ozlabs.org (Postfix) with ESMTP id 47XCXj3BBNz9sPh
for <patchwork-incoming-netdev@ozlabs.org>;
Tue, 10 Dec 2019 19:15:01 +1100 (AEDT)
Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand
id S1727133AbfLJIPA (ORCPT
<rfc822;patchwork-incoming-netdev@ozlabs.org>);
Tue, 10 Dec 2019 03:15:00 -0500
Received: from mailgw02.mediatek.com ([210.61.82.184]:45567 "EHLO
mailgw02.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by
vger.kernel.org with ESMTP id S1727022AbfLJIO7 (ORCPT
<rfc822;netdev@vger.kernel.org>); Tue, 10 Dec 2019 03:14:59 -0500
X-UUID: a1d9a42928d44d63b201d5ad84c05baa-20191210
DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed;
d=mediatek.com; s=dk;
h=Content-Transfer-Encoding:Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From;
bh=KJqQ2m7z9H4vre+SZyxgKEGRWb9Edp5pJlYnepJNMyM=;
b=SuczJHZpeY7vF8UsCGorYUAcT2lEUX2E0ciiyQBS1rDLPzTYnufK8OXyAw5Uq8U1m72TGWYCaq1o0VWtI1meJpEmCL2TVK/d+Y+IaacHlO716BmX77+0MU0crczE8zx1Nz2pNh+GicsB6AoC9qbBU+p5egbKDMBhpRaGQNAeBww=;
X-UUID: a1d9a42928d44d63b201d5ad84c05baa-20191210
Received: from mtkcas07.mediatek.inc [(172.21.101.84)] by
mailgw02.mediatek.com (envelope-from <landen.chao@mediatek.com>)
(Cellopoint E-mail Firewall v4.1.10 Build 0809 with TLS)
with ESMTP id 297826603; Tue, 10 Dec 2019 16:14:47 +0800
Received: from mtkcas08.mediatek.inc (172.21.101.126) by
mtkmbs07n1.mediatek.inc (172.21.101.16) with Microsoft SMTP Server
(TLS) id 15.0.1395.4; Tue, 10 Dec 2019 16:14:38 +0800
Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkcas08.mediatek.inc
(172.21.101.73) with Microsoft SMTP Server id 15.0.1395.4 via
Frontend Transport; Tue, 10 Dec 2019 16:14:26 +0800
From: Landen Chao <landen.chao@mediatek.com>
To: <andrew@lunn.ch>, <f.fainelli@gmail.com>,
<vivien.didelot@savoirfairelinux.com>, <matthias.bgg@gmail.com>,
<robh+dt@kernel.org>, <mark.rutland@arm.com>
CC: <devicetree@vger.kernel.org>, <netdev@vger.kernel.org>,
<linux-kernel@vger.kernel.org>,
<linux-mediatek@lists.infradead.org>, <davem@davemloft.net>,
<sean.wang@mediatek.com>, <opensource@vdorst.com>,
<frank-w@public-files.de>, Landen Chao <landen.chao@mediatek.com>
Subject: [PATCH net-next 3/6] dt-bindings: net: dsa: add new MT7531 binding
to support MT7531
Date: Tue, 10 Dec 2019 16:14:39 +0800
Message-ID: <1c382fd916b66bfe3ce8ef18c12f954dbcbddbbc.1575914275.git.landen.chao@mediatek.com>
X-Mailer: git-send-email 2.18.0
In-Reply-To: <cover.1575914275.git.landen.chao@mediatek.com>
References: <cover.1575914275.git.landen.chao@mediatek.com>
MIME-Version: 1.0
X-MTK: N
Sender: netdev-owner@vger.kernel.org
Precedence: bulk
List-ID: <netdev.vger.kernel.org>
X-Mailing-List: netdev@vger.kernel.org
Add devicetree binding to support the compatible mt7531 switch as used
in the MediaTek MT7531 switch.
Signed-off-by: Sean Wang <sean.wang@mediatek.com>
Signed-off-by: Landen Chao <landen.chao@mediatek.com>
---
.../devicetree/bindings/net/dsa/mt7530.txt | 77 ++++++++++++++++++-
1 file changed, 74 insertions(+), 3 deletions(-)
diff --git a/Documentation/devicetree/bindings/net/dsa/mt7530.txt b/Documentation/devicetree/bindings/net/dsa/mt7530.txt
index c5ed5d25f642..dc226a4e402a 100644
--- a/Documentation/devicetree/bindings/net/dsa/mt7530.txt
+++ b/Documentation/devicetree/bindings/net/dsa/mt7530.txt
@@ -5,6 +5,7 @@ Required properties:
- compatible: may be compatible = "mediatek,mt7530"
or compatible = "mediatek,mt7621"
+ or compatible = "mediatek,mt7531"
- #address-cells: Must be 1.
- #size-cells: Must be 0.
- mediatek,mcm: Boolean; if defined, indicates that either MT7530 is the part
@@ -32,10 +33,13 @@ Required properties for the child nodes within ports container:
- reg: Port address described must be 6 for CPU port and from 0 to 5 for
user ports.
-- phy-mode: String, must be either "trgmii" or "rgmii" for port labeled
- "cpu".
+- phy-mode: String, the follow value would be acceptable for port labeled "cpu"
+ If compatible mediatek,mt7530 or mediatek,mt7621 is set,
+ must be either "trgmii" or "rgmii"
+ If compatible mediatek,mt7531 is set,
+ must be either "sgmii", "1000base-x" or "2500base-x"
-Port 5 of the switch is muxed between:
+Port 5 of mt7530 and mt7621 switch is muxed between:
1. GMAC5: GMAC5 can interface with another external MAC or PHY.
2. PHY of port 0 or port 4: PHY interfaces with an external MAC like 2nd GMAC
of the SOC. Used in many setups where port 0/4 becomes the WAN port.
@@ -308,3 +312,70 @@ Example 3: MT7621: Port 5 is connected to external PHY: Port 5 -> external PHY.
};
};
};
+
+Example 4:
+
+&eth {
+ gmac0: mac@0 {
+ compatible = "mediatek,eth-mac";
+ reg = <0>;
+ phy-mode = "2500base-x";
+
+ fixed-link {
+ speed = <1000>;
+ full-duplex;
+ pause;
+ };
+ };
+
+ &mdio0 {
+ switch@0 {
+ compatible = "mediatek,mt7531";
+ reg = <0>;
+ reset-gpios = <&pio 54 0>;
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0>;
+
+ port@0 {
+ reg = <0>;
+ label = "lan0";
+ };
+
+ port@1 {
+ reg = <1>;
+ label = "lan1";
+ };
+
+ port@2 {
+ reg = <2>;
+ label = "lan2";
+ };
+
+ port@3 {
+ reg = <3>;
+ label = "lan3";
+ };
+
+ port@4 {
+ reg = <4>;
+ label = "wan";
+ };
+
+ port@6 {
+ reg = <6>;
+ label = "cpu";
+ ethernet = <&gmac0>;
+ phy-mode = "2500base-x";
+
+ fixed-link {
+ speed = <1000>;
+ full-duplex;
+ pause;
+ };
+ };
+ };
+ };
+ };

1102
target/linux/mediatek/patches-5.4/0600-4-6-net-dsa-mt7530-Add-the-support-of-MT7531-switch.patch Normal file
View File

File diff suppressed because it is too large Load Diff

140
target/linux/mediatek/patches-5.4/0600-6-6-arm64-dts-mt7622-add-mt7531-dsa-to-bananapi-bpi-r64-board.patch Normal file
View File

@ -0,0 +1,140 @@
From patchwork Tue Dec 10 08:14:42 2019
Content-Type: text/plain; charset="utf-8"
MIME-Version: 1.0
Content-Transfer-Encoding: 7bit
X-Patchwork-Submitter: Landen Chao <landen.chao@mediatek.com>
X-Patchwork-Id: 1206964
X-Patchwork-Delegate: davem@davemloft.net
Return-Path: <netdev-owner@vger.kernel.org>
X-Original-To: patchwork-incoming-netdev@ozlabs.org
Delivered-To: patchwork-incoming-netdev@ozlabs.org
Authentication-Results: ozlabs.org; spf=none (no SPF record)
smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67;
helo=vger.kernel.org;
envelope-from=netdev-owner@vger.kernel.org;
receiver=<UNKNOWN>)
Authentication-Results: ozlabs.org; dmarc=pass (p=none dis=none)
header.from=mediatek.com
Authentication-Results: ozlabs.org; dkim=pass (1024-bit key;
unprotected) header.d=mediatek.com header.i=@mediatek.com
header.b="eagJVm76"; dkim-atps=neutral
Received: from vger.kernel.org (vger.kernel.org [209.132.180.67])
by ozlabs.org (Postfix) with ESMTP id 47XCYF2fNjz9sR7
for <patchwork-incoming-netdev@ozlabs.org>;
Tue, 10 Dec 2019 19:15:29 +1100 (AEDT)
Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand
id S1727295AbfLJIP0 (ORCPT
<rfc822;patchwork-incoming-netdev@ozlabs.org>);
Tue, 10 Dec 2019 03:15:26 -0500
Received: from mailgw01.mediatek.com ([210.61.82.183]:21469 "EHLO
mailgw01.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by
vger.kernel.org with ESMTP id S1726062AbfLJIO4 (ORCPT
<rfc822;netdev@vger.kernel.org>); Tue, 10 Dec 2019 03:14:56 -0500
X-UUID: f9b456136baf42daba0957485d388010-20191210
DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed;
d=mediatek.com; s=dk;
h=Content-Transfer-Encoding:Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From;
bh=BT+q/z4xoeKXCk+y25bvARvW/z0vRa1uB7kHqAjvpaw=;
b=eagJVm76XNgnVVvxDHR4QtcIyynPPYY4k7twyvlRAQeSnsJbABh1afLK+LlxnJ0TM069F+hNNzWXq7ZGru/I+gYhmqZcYCt/SkEYgxdTb0VNE+DIW0hmNAOoJ0i23gobJ3xa7JVRfIfeZcbjwRJSuqwzLBRZBLIFzqSs71VZx1Y=;
X-UUID: f9b456136baf42daba0957485d388010-20191210
Received: from mtkcas07.mediatek.inc [(172.21.101.84)] by
mailgw01.mediatek.com (envelope-from <landen.chao@mediatek.com>)
(Cellopoint E-mail Firewall v4.1.10 Build 0809 with TLS)
with ESMTP id 1831961689; Tue, 10 Dec 2019 16:14:48 +0800
Received: from mtkcas08.mediatek.inc (172.21.101.126) by
mtkmbs07n2.mediatek.inc (172.21.101.141) with Microsoft SMTP Server
(TLS) id 15.0.1395.4; Tue, 10 Dec 2019 16:14:32 +0800
Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkcas08.mediatek.inc
(172.21.101.73) with Microsoft SMTP Server id 15.0.1395.4 via
Frontend Transport; Tue, 10 Dec 2019 16:14:27 +0800
From: Landen Chao <landen.chao@mediatek.com>
To: <andrew@lunn.ch>, <f.fainelli@gmail.com>,
<vivien.didelot@savoirfairelinux.com>, <matthias.bgg@gmail.com>,
<robh+dt@kernel.org>, <mark.rutland@arm.com>
CC: <devicetree@vger.kernel.org>, <netdev@vger.kernel.org>,
<linux-kernel@vger.kernel.org>,
<linux-mediatek@lists.infradead.org>, <davem@davemloft.net>,
<sean.wang@mediatek.com>, <opensource@vdorst.com>,
<frank-w@public-files.de>, Landen Chao <landen.chao@mediatek.com>
Subject: [PATCH net-next 6/6] arm64: dts: mt7622: add mt7531 dsa to
bananapi-bpi-r64 board
Date: Tue, 10 Dec 2019 16:14:42 +0800
Message-ID: <62eef5503c117f48d4b41e94fd28d75e123590b4.1575914275.git.landen.chao@mediatek.com>
X-Mailer: git-send-email 2.18.0
In-Reply-To: <cover.1575914275.git.landen.chao@mediatek.com>
References: <cover.1575914275.git.landen.chao@mediatek.com>
MIME-Version: 1.0
X-MTK: N
Sender: netdev-owner@vger.kernel.org
Precedence: bulk
List-ID: <netdev.vger.kernel.org>
X-Mailing-List: netdev@vger.kernel.org
Add mt7531 dsa to bananapi-bpi-r64 board for 5 giga Ethernet ports support.
Signed-off-by: Landen Chao <landen.chao@mediatek.com>
---
.../dts/mediatek/mt7622-bananapi-bpi-r64.dts | 50 +++++++++++++++++++
1 file changed, 50 insertions(+)
diff --git a/arch/arm64/boot/dts/mediatek/mt7622-bananapi-bpi-r64.dts b/arch/arm64/boot/dts/mediatek/mt7622-bananapi-bpi-r64.dts
index 83e10591e0e5..ffacefee8e2a 100644
--- a/arch/arm64/boot/dts/mediatek/mt7622-bananapi-bpi-r64.dts
+++ b/arch/arm64/boot/dts/mediatek/mt7622-bananapi-bpi-r64.dts
@@ -143,6 +143,56 @@
mdio: mdio-bus {
#address-cells = <1>;
#size-cells = <0>;
+
+ switch@0 {
+ compatible = "mediatek,mt7531";
+ reg = <0>;
+ reset-gpios = <&pio 54 0>;
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+ label = "wan";
+ };
+
+ port@1 {
+ reg = <1>;
+ label = "lan0";
+ };
+
+ port@2 {
+ reg = <2>;
+ label = "lan1";
+ };
+
+ port@3 {
+ reg = <3>;
+ label = "lan2";
+ };
+
+ port@4 {
+ reg = <4>;
+ label = "lan3";
+ };
+
+ port@6 {
+ reg = <6>;
+ label = "cpu";
+ ethernet = <&gmac0>;
+ phy-mode = "2500base-x";
+
+ fixed-link {
+ speed = <2500>;
+ full-duplex;
+ pause;
+ };
+ };
+ };
+ };
+
};
};