fish/immortalwrt
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

rockchip: add Firefly ROC-RK3328-CC support

Browse Source 
Hardware
--------
RockChip RK3328 ARM64 (4 cores)
4GB DDR4 RAM
1x 1000 Base-T
2 LEDs (POWER / USER)
HDMI 2.0
3.5mm TRRS AV jack
Micro-SD slot
eMMC slot
1x USB 3.0 Port
2x USB 2.0 Port

Signed-off-by: Tianling Shen <cnsztl@immortalwrt.org>
This commit is contained in:
Tianling Shen 2023-04-04 01:51:27 +08:00
parent d9a1c7a99a
commit f05de85637
No known key found for this signature in database
GPG Key ID: 6850B6345C862176
5 changed files with 131 additions and 0 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

1
target/linux/rockchip/armv8/config-5.15
View File

@ -266,6 +266,7 @@ CONFIG_GPIO_DWAPB=y
CONFIG_GPIO_GENERIC=y
CONFIG_GPIO_GENERIC_PLATFORM=y
CONFIG_GPIO_ROCKCHIP=y
CONFIG_GPIO_SYSCON=y
CONFIG_HANDLE_DOMAIN_IRQ=y
# CONFIG_HARDENED_USERCOPY is not set
CONFIG_HARDIRQS_SW_RESEND=y

9
target/linux/rockchip/image/armv8.mk
View File

@ -5,6 +5,15 @@
# FIT will be loaded at 0x02080000. Leave 16M for that, align it to 2M and load the kernel after it.
KERNEL_LOADADDR := 0x03200000
define Device/firefly_roc-cc
DEVICE_VENDOR := Firefly
DEVICE_MODEL := ROC-RK3328-CC
SOC := rk3328
UBOOT_DEVICE_NAME := roc-cc-rk3328
IMAGE/sysupgrade.img.gz := boot-common | boot-script | pine64-bin | gzip | append-metadata
endef
TARGET_DEVICES += firefly_roc-cc
define Device/friendlyarm_nanopi-r2c
DEVICE_VENDOR := FriendlyARM
DEVICE_MODEL := NanoPi R2C

24
target/linux/rockchip/patches-5.15/100-rockchip-use-system-LED-for-OpenWrt.patch
View File

@ -90,6 +90,30 @@ Signed-off-by: David Bauer <mail@david-bauer.net>
};
};
--- a/arch/arm64/boot/dts/rockchip/rk3328-roc-cc.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3328-roc-cc.dts
@@ -13,6 +13,11 @@
aliases {
mmc0 = &sdmmc;
mmc1 = &emmc;
+
+ led-boot = &power_led;
+ led-failsafe = &power_led;
+ led-running = &power_led;
+ led-upgrade = &power_led;
};
chosen {
@@ -93,9 +98,7 @@
power_led: led-0 {
label = "firefly:blue:power";
- linux,default-trigger = "heartbeat";
gpios = <&rk805 1 GPIO_ACTIVE_LOW>;
- default-state = "on";
};
user_led: led-1 {
--- a/arch/arm64/boot/dts/rockchip/rk3399-nanopi-r4s.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3399-nanopi-r4s.dts
@@ -19,6 +19,13 @@

10
target/linux/rockchip/patches-5.15/105-nanopi-r4s-sd-signalling.patch
View File

@ -10,6 +10,16 @@ userspace or following a kernel panic is always working.
Signed-off-by: David Bauer <mail@david-bauer.net>
--- a/arch/arm64/boot/dts/rockchip/rk3328-roc-cc.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3328-roc-cc.dts
@@ -333,7 +333,6 @@
sd-uhs-sdr12;
sd-uhs-sdr25;
sd-uhs-sdr50;
- sd-uhs-sdr104;
vmmc-supply = <&vcc_sd>;
vqmmc-supply = <&vcc_sdio>;
status = "okay";
--- a/arch/arm64/boot/dts/rockchip/rk3399-nanopi-r4s.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3399-nanopi-r4s.dts
@@ -132,6 +132,11 @@

87
target/linux/rockchip/patches-5.15/806-arm64-dts-rockchip-enable-dmc-for-rk3328-boards.patch
View File

@ -114,3 +114,90 @@ Signed-off-by: hmz007 <hmz007@gmail.com>
&gmac2io {
phy-handle = <&yt8531c>;
tx_delay = <0x19>;
--- a/arch/arm64/boot/dts/rockchip/rk3328-roc-cc.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3328-roc-cc.dts
@@ -134,6 +134,68 @@
cpu-supply = <&vdd_arm>;
};
+&ddr_timing {
+ ddr3a1_ddr4a9_de-skew = <0>;
+ ddr3a0_ddr4a10_de-skew = <0>;
+ ddr3a3_ddr4a6_de-skew = <1>;
+ ddr3a2_ddr4a4_de-skew = <1>;
+ ddr3a5_ddr4a8_de-skew = <0>;
+ ddr3a4_ddr4a5_de-skew = <2>;
+ ddr3a7_ddr4a11_de-skew = <0>;
+ ddr3a6_ddr4a7_de-skew = <2>;
+ ddr3a9_ddr4a0_de-skew = <1>;
+ ddr3a8_ddr4a13_de-skew = <0>;
+ ddr3a11_ddr4a3_de-skew = <2>;
+ ddr3a10_ddr4cs0_de-skew = <0>;
+ ddr3a13_ddr4a2_de-skew = <1>;
+ ddr3a12_ddr4ba1_de-skew = <0>;
+ ddr3a15_ddr4odt0_de-skew = <0>;
+ ddr3a14_ddr4a1_de-skew = <1>;
+ ddr3ba1_ddr4a15_de-skew = <0>;
+ ddr3ba0_ddr4bg0_de-skew = <0>;
+ ddr3ras_ddr4cke_de-skew = <0>;
+ ddr3ba2_ddr4ba0_de-skew = <1>;
+ ddr3we_ddr4bg1_de-skew = <1>;
+ ddr3cas_ddr4a12_de-skew = <0>;
+ ddr3ckn_ddr4ckn_de-skew = <5>;
+ ddr3ckp_ddr4ckp_de-skew = <5>;
+ ddr3cke_ddr4a16_de-skew = <1>;
+ ddr3odt0_ddr4a14_de-skew = <0>;
+ ddr3cs0_ddr4act_de-skew = <1>;
+ ddr3reset_ddr4reset_de-skew = <0>;
+ ddr3cs1_ddr4cs1_de-skew = <0>;
+ ddr3odt1_ddr4odt1_de-skew = <0>;
+};
+
+&dfi {
+ status = "okay";
+};
+
+&dmc {
+ center-supply = <&vdd_logic>;
+ status = "okay";
+};
+
+&dmc_opp_table {
+ /delete-node/ opp-1056000000;
+
+ opp-798000000 {
+ opp-microvolt-L1 = <12000000>;
+ };
+ opp-840000000 {
+ opp-microvolt-L1 = <12000000>;
+ };
+ opp-924000000 {
+ opp-microvolt-L1 = <12000000>;
+ };
+ opp-1068000000 {
+ opp-hz = /bits/ 64 <1068000000>;
+ opp-microvolt = <1175000>;
+ opp-microvolt-L0 = <1175000>;
+ opp-microvolt-L1 = <12000000>;
+ };
+};
+
&emmc {
bus-width = <8>;
cap-mmc-highspeed;
@@ -206,6 +268,7 @@
regulators {
vdd_logic: DCDC_REG1 {
regulator-name = "vdd_logic";
+ regulator-init-microvolt = <1075000>;
regulator-min-microvolt = <712500>;
regulator-max-microvolt = <1450000>;
regulator-always-on;
@@ -218,6 +281,7 @@
vdd_arm: DCDC_REG2 {
regulator-name = "vdd_arm";
+ regulator-init-microvolt = <1225000>;
regulator-min-microvolt = <712500>;
regulator-max-microvolt = <1450000>;
regulator-always-on;