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rockchip: refresh upstreamed patches

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Fixes: #1080

Signed-off-by: Tianling Shen <cnsztl@immortalwrt.org>
This commit is contained in:
Tianling Shen 2023-10-07 16:56:13 +08:00
parent 962067df7c
commit f1346bf77b
No known key found for this signature in database
GPG Key ID: 6850B6345C862176
23 changed files with 259 additions and 212 deletions
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2
target/linux/rockchip/patches-6.1/039-01-v6.4-usb-typec-tcpm-try-to-get-role-switch-from-tcpc-fwnode.patch
View File

@ -43,7 +43,7 @@ Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
--- a/drivers/usb/typec/tcpm/tcpm.c
+++ b/drivers/usb/typec/tcpm/tcpm.c
@@ -6548,6 +6548,8 @@ struct tcpm_port *tcpm_register_port(str
@@ -6583,6 +6583,8 @@ struct tcpm_port *tcpm_register_port(str
port->port_type = port->typec_caps.type;
port->role_sw = usb_role_switch_get(port->dev);

22
target/linux/rockchip/patches-6.1/120-02-arm64-dts-rockchip-rk3588-add-PCIe2-support.patch → target/linux/rockchip/patches-6.1/050-21-v6.6-arm64-dts-rockchip-add-rk3588-PCIe2-support.patch
View File

@ -1,7 +1,7 @@
From 28ecb034639296ac27116d4d021ad0ece172cab1 Mon Sep 17 00:00:00 2001
From 8d81b77f4c49f8ee1432c20c22bf0f03c2937a88 Mon Sep 17 00:00:00 2001
From: Sebastian Reichel <sebastian.reichel@collabora.com>
Date: Mon, 17 Apr 2023 20:03:08 +0200
Subject: [PATCH] arm64: dts: rockchip: rk3588: add PCIe2 support
Date: Mon, 31 Jul 2023 18:57:23 +0200
Subject: [PATCH] arm64: dts: rockchip: add rk3588 PCIe2 support
Add all three PCIe2 IP blocks to the RK3588 DT. Note, that RK3588
also has two PCIe3 IP blocks, that will be handled separately.
@ -11,6 +11,8 @@ Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Tested-by: Jagan Teki <jagan@edgeble.ai> # edgeble-neu6a, 6b
Reviewed-by: Jagan Teki <jagan@edgeble.ai>
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Link: https://lore.kernel.org/r/20230731165723.53069-6-sebastian.reichel@collabora.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
---
arch/arm64/boot/dts/rockchip/rk3588.dtsi | 51 +++++++++++
arch/arm64/boot/dts/rockchip/rk3588s.dtsi | 102 ++++++++++++++++++++++
@ -24,8 +26,6 @@ Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
+ pcie2x1l0: pcie@fe170000 {
+ compatible = "rockchip,rk3588-pcie", "rockchip,rk3568-pcie";
+ #address-cells = <3>;
+ #size-cells = <2>;
+ bus-range = <0x20 0x2f>;
+ clocks = <&cru ACLK_PCIE_1L0_MSTR>, <&cru ACLK_PCIE_1L0_SLV>,
+ <&cru ACLK_PCIE_1L0_DBI>, <&cru PCLK_PCIE_1L0>,
@ -62,6 +62,8 @@ Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
+ reg-names = "dbi", "apb", "config";
+ resets = <&cru SRST_PCIE2_POWER_UP>, <&cru SRST_P_PCIE2>;
+ reset-names = "pwr", "pipe";
+ #address-cells = <3>;
+ #size-cells = <2>;
+ status = "disabled";
+
+ pcie2x1l0_intc: legacy-interrupt-controller {
@ -78,14 +80,12 @@ Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
reg = <0x0 0xfe1b0000 0x0 0x10000>;
--- a/arch/arm64/boot/dts/rockchip/rk3588s.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3588s.dtsi
@@ -1670,6 +1670,108 @@
@@ -1218,6 +1218,108 @@
reg = <0x0 0xfdf82200 0x0 0x20>;
};
+ pcie2x1l1: pcie@fe180000 {
+ compatible = "rockchip,rk3588-pcie", "rockchip,rk3568-pcie";
+ #address-cells = <3>;
+ #size-cells = <2>;
+ bus-range = <0x30 0x3f>;
+ clocks = <&cru ACLK_PCIE_1L1_MSTR>, <&cru ACLK_PCIE_1L1_SLV>,
+ <&cru ACLK_PCIE_1L1_DBI>, <&cru PCLK_PCIE_1L1>,
@ -122,6 +122,8 @@ Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
+ reg-names = "dbi", "apb", "config";
+ resets = <&cru SRST_PCIE3_POWER_UP>, <&cru SRST_P_PCIE3>;
+ reset-names = "pwr", "pipe";
+ #address-cells = <3>;
+ #size-cells = <2>;
+ status = "disabled";
+
+ pcie2x1l1_intc: legacy-interrupt-controller {
@ -135,8 +137,6 @@ Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
+
+ pcie2x1l2: pcie@fe190000 {
+ compatible = "rockchip,rk3588-pcie", "rockchip,rk3568-pcie";
+ #address-cells = <3>;
+ #size-cells = <2>;
+ bus-range = <0x40 0x4f>;
+ clocks = <&cru ACLK_PCIE_1L2_MSTR>, <&cru ACLK_PCIE_1L2_SLV>,
+ <&cru ACLK_PCIE_1L2_DBI>, <&cru PCLK_PCIE_1L2>,
@ -173,6 +173,8 @@ Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
+ reg-names = "dbi", "apb", "config";
+ resets = <&cru SRST_PCIE4_POWER_UP>, <&cru SRST_P_PCIE4>;
+ reset-names = "pwr", "pipe";
+ #address-cells = <3>;
+ #size-cells = <2>;
+ status = "disabled";
+
+ pcie2x1l2_intc: legacy-interrupt-controller {

54
target/linux/rockchip/patches-6.1/121-02-arm64-dts-rockchip-rk3588-evb1-add-PCIe2-network.patch → target/linux/rockchip/patches-6.1/051-05-v6.7-arm64-dts-rockchip-add-PCIe2-network-controller-to.patch
View File

@ -1,46 +1,49 @@
From ee48c5b7edb4ff3b8a23e7c32cbf33ae892e7cc1 Mon Sep 17 00:00:00 2001
From 86a2024d95e259c4309ced53242c0db6d993320b Mon Sep 17 00:00:00 2001
From: Sebastian Reichel <sebastian.reichel@collabora.com>
Date: Mon, 17 Apr 2023 21:13:03 +0200
Subject: [PATCH] arm64: dts: rockchip: rk3588-evb1: add PCIe2 network
controller
Date: Mon, 18 Sep 2023 16:13:26 +0200
Subject: [PATCH] arm64: dts: rockchip: add PCIe2 network controller to
rk3588-evb1
The RK3588 EVB1 has a second network card, which is connected
via PCIe2. This adds support for that.
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Link: https://lore.kernel.org/r/20230918141327.131108-2-sebastian.reichel@collabora.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
---
.../boot/dts/rockchip/rk3588-evb1-v10.dts | 37 +++++++++++++++++++
1 file changed, 37 insertions(+)
.../boot/dts/rockchip/rk3588-evb1-v10.dts | 43 +++++++++++++++++++
1 file changed, 43 insertions(+)
--- a/arch/arm64/boot/dts/rockchip/rk3588-evb1-v10.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3588-evb1-v10.dts
@@ -81,12 +81,36 @@
regulator-max-microvolt = <5000000>;
vin-supply = <&vcc5v0_usbdcin>;
@@ -29,6 +29,26 @@
pwms = <&pwm2 0 25000 0>;
};
+
+ pcie20_avdd0v85: pcie20-avdd0v85 {
+ pcie20_avdd0v85: pcie20-avdd0v85-regulator {
+ compatible = "regulator-fixed";
+ regulator-name = "pcie20_avdd0v85";
+ regulator-boot-on;
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <850000>;
+ regulator-max-microvolt = <850000>;
+ vin-supply = <&avdd_0v85_s0>;
+ };
+
+ pcie20_avdd1v8: pcie20-avdd1v8 {
+ pcie20_avdd1v8: pcie20-avdd1v8-regulator {
+ compatible = "regulator-fixed";
+ regulator-name = "pcie20_avdd1v8";
+ regulator-boot-on;
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ vin-supply = <&avcc_1v8_s0>;
+ };
};
&combphy0_ps {
+
vcc12v_dcin: vcc12v-dcin-regulator {
compatible = "regulator-fixed";
regulator-name = "vcc12v_dcin";
@@ -87,6 +107,10 @@
status = "okay";
};
@ -51,14 +54,14 @@ Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
&cpu_b0 {
cpu-supply = <&vdd_cpu_big0_s0>;
};
@@ -178,7 +202,20 @@
@@ -163,7 +187,20 @@
};
};
+&pcie2x1l1 {
+ reset-gpios = <&gpio4 RK_PA2 GPIO_ACTIVE_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&rtl8111_isolate>;
+ pinctrl-0 = <&pcie2_1_rst>, <&rtl8111_isolate>;
+ status = "okay";
+};
+
@ -72,3 +75,16 @@ Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
rtl8211f {
rtl8211f_rst: rtl8211f-rst {
rockchip,pins = <4 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>;
@@ -177,6 +214,12 @@
};
};
+ pcie2 {
+ pcie2_1_rst: pcie2-1-rst {
+ rockchip,pins = <4 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+
usb {
vcc5v0_host_en: vcc5v0-host-en {
rockchip,pins = <4 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;

22
target/linux/rockchip/patches-6.1/121-03-arm64-dts-rockchip-rk3588-evb1-add-PCIe3-bus.patch → target/linux/rockchip/patches-6.1/051-06-v6.7-arm64-dts-rockchip-add-PCIe3-bus-to-rk3588-evb1.patch
View File

@ -1,26 +1,28 @@
From e6253fdf8d3cdc70424fb8f53929b013a0cc60b3 Mon Sep 17 00:00:00 2001
From 46bb398ea1d81302e3735087ceb4b5763d5afc29 Mon Sep 17 00:00:00 2001
From: Sebastian Reichel <sebastian.reichel@collabora.com>
Date: Tue, 11 Jul 2023 17:20:47 +0200
Subject: [PATCH] arm64: dts: rockchip: rk3588-evb1: add PCIe3 bus
Date: Mon, 18 Sep 2023 16:13:27 +0200
Subject: [PATCH] arm64: dts: rockchip: add PCIe3 bus to rk3588-evb1
Enable PCIe3 support, which is exposed via a PCIe3 connector.
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Link: https://lore.kernel.org/r/20230918141327.131108-3-sebastian.reichel@collabora.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
---
.../boot/dts/rockchip/rk3588-evb1-v10.dts | 55 +++++++++++++++++++
1 file changed, 55 insertions(+)
--- a/arch/arm64/boot/dts/rockchip/rk3588-evb1-v10.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3588-evb1-v10.dts
@@ -29,6 +29,26 @@
pwms = <&pwm2 0 25000 0>;
@@ -49,6 +49,26 @@
vin-supply = <&avcc_1v8_s0>;
};
+ pcie30_avdd0v75: pcie30-avdd0v75-regulator {
+ compatible = "regulator-fixed";
+ regulator-name = "pcie30_avdd0v75";
+ regulator-boot-on;
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <750000>;
+ regulator-max-microvolt = <750000>;
+ vin-supply = <&avdd_0v75_s0>;
@ -29,8 +31,8 @@ Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
+ pcie30_avdd1v8: pcie30-avdd1v8-regulator {
+ compatible = "regulator-fixed";
+ regulator-name = "pcie30_avdd1v8";
+ regulator-boot-on;
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ vin-supply = <&avcc_1v8_s0>;
@ -39,7 +41,7 @@ Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
vcc12v_dcin: vcc12v-dcin-regulator {
compatible = "regulator-fixed";
regulator-name = "vcc12v_dcin";
@@ -38,6 +58,19 @@
@@ -58,6 +78,19 @@
regulator-max-microvolt = <12000000>;
};
@ -59,7 +61,7 @@ Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
vcc5v0_host: vcc5v0-host-regulator {
compatible = "regulator-fixed";
regulator-name = "vcc5v0_host";
@@ -209,6 +242,18 @@
@@ -194,6 +227,18 @@
status = "okay";
};
@ -78,7 +80,7 @@ Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
&pinctrl {
rtl8111 {
rtl8111_isolate: rtl8111-isolate {
@@ -229,6 +274,16 @@
@@ -220,6 +265,16 @@
};
};

20
target/linux/rockchip/patches-6.1/123-01-arm64-dts-rockchip-rock-5b-add-PCIe-network-controller.patch → target/linux/rockchip/patches-6.1/053-16-v6.7-arm64-dts-rockchip-add-PCIe-network-controller-to-rock-5b.patch
View File

@ -1,19 +1,21 @@
From 9d2a342309d3a880b9b6fe53bbb0b563f8aad671 Mon Sep 17 00:00:00 2001
From 42145b7a823530f57983fb6e6897f40c0be278d5 Mon Sep 17 00:00:00 2001
From: Sebastian Reichel <sebastian.reichel@collabora.com>
Date: Tue, 28 Feb 2023 14:40:59 +0000
Subject: [PATCH] arm64: dts: rockchip: rock-5b: add PCIe network controller
Date: Mon, 18 Sep 2023 16:14:49 +0200
Subject: [PATCH] arm64: dts: rockchip: add PCIe network controller to rock-5b
Enable the RTL8125 network controller, which is connected via
PCIe.
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Link: https://lore.kernel.org/r/20230918141451.131247-2-sebastian.reichel@collabora.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
---
.../boot/dts/rockchip/rk3588-rock-5b.dts | 27 +++++++++++++++++++
1 file changed, 27 insertions(+)
--- a/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts
@@ -51,6 +51,15 @@
@@ -44,6 +44,15 @@
#cooling-cells = <2>;
};
@ -29,7 +31,7 @@ Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
vcc5v0_host: vcc5v0-host-regulator {
compatible = "regulator-fixed";
regulator-name = "vcc5v0_host";
@@ -96,6 +105,10 @@
@@ -78,6 +87,10 @@
};
};
@ -40,22 +42,22 @@ Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
&cpu_b0 {
cpu-supply = <&vdd_cpu_big0_s0>;
};
@@ -222,6 +235,14 @@
@@ -204,6 +217,14 @@
};
};
+&pcie2x1l2 {
+ reset-gpios = <&gpio3 RK_PB0 GPIO_ACTIVE_HIGH>;
+ vpcie3v3-supply = <&vcc3v3_pcie2x1l2>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pcie2_2_rst>;
+ reset-gpios = <&gpio3 RK_PB0 GPIO_ACTIVE_HIGH>;
+ vpcie3v3-supply = <&vcc3v3_pcie2x1l2>;
+ status = "okay";
+};
+
&pinctrl {
hym8563 {
hym8563_int: hym8563-int {
@@ -241,6 +262,12 @@
@@ -217,6 +238,12 @@
};
};

26
target/linux/rockchip/patches-6.1/123-02-arm64-dts-rockchip-rock-5b-add-PCIe-for-M.2-M-key.patch → target/linux/rockchip/patches-6.1/053-17-v6.7-arm64-dts-rockchip-add-PCIe-for-M.2-M-key-to-rock-5b.patch
View File

@ -1,39 +1,41 @@
From 94b8daf5572058c8be8ea9445c91d5ea54a1fd2d Mon Sep 17 00:00:00 2001
From 199cbd5f195adbc0e70ad218cdba82f45750f11b Mon Sep 17 00:00:00 2001
From: Sebastian Reichel <sebastian.reichel@collabora.com>
Date: Fri, 14 Jul 2023 19:19:29 +0200
Subject: [PATCH] arm64: dts: rockchip: rock-5b: add PCIe for M.2 M-key
Date: Mon, 18 Sep 2023 16:14:50 +0200
Subject: [PATCH] arm64: dts: rockchip: add PCIe for M.2 M-key to rock-5b
The Radxa Rock 5B has PCIe 3x4 routed to its M.2 M-key connector
on the board's back.
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Link: https://lore.kernel.org/r/20230918141451.131247-3-sebastian.reichel@collabora.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
---
.../boot/dts/rockchip/rk3588-rock-5b.dts | 35 +++++++++++++++++++
1 file changed, 35 insertions(+)
--- a/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts
@@ -60,6 +60,19 @@
@@ -53,6 +53,19 @@
vin-supply = <&vcc_3v3_s3>;
};
+ vcc3v3_pcie30: vcc3v3-pcie30-regulator {
+ compatible = "regulator-fixed";
+ enable-active-high;
+ gpios = <&gpio1 RK_PA4 GPIO_ACTIVE_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pcie3_vcc3v3_en>;
+ regulator-name = "vcc3v3_pcie30";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ enable-active-high;
+ gpios = <&gpio1 RK_PA4 GPIO_ACTIVE_HIGH>;
+ startup-delay-us = <5000>;
+ vin-supply = <&vcc5v0_sys>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pcie3_vcc3v3_en>;
+ };
+
vcc5v0_host: vcc5v0-host-regulator {
compatible = "regulator-fixed";
regulator-name = "vcc5v0_host";
@@ -243,6 +256,18 @@
@@ -225,6 +238,18 @@
status = "okay";
};
@ -42,17 +44,17 @@ Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
+};
+
+&pcie3x4 {
+ reset-gpios = <&gpio4 RK_PB6 GPIO_ACTIVE_HIGH>;
+ vpcie3v3-supply = <&vcc3v3_pcie30>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pcie3_rst>;
+ reset-gpios = <&gpio4 RK_PB6 GPIO_ACTIVE_HIGH>;
+ vpcie3v3-supply = <&vcc3v3_pcie30>;
+ status = "okay";
+};
+
&pinctrl {
hym8563 {
hym8563_int: hym8563-int {
@@ -268,6 +293,16 @@
@@ -244,6 +269,16 @@
};
};

34
target/linux/rockchip/patches-6.1/123-03-arm64-dts-rockchip-rock-5b-add-PCIe-for-M.2-E-Key.patch → target/linux/rockchip/patches-6.1/053-18-v6.7-arm64-dts-rockchip-add-PCIe-for-M.2-E-Key-to-rock-5b.patch
View File

@ -1,33 +1,35 @@
From 93900c0c70cf280330fa5e7c6e727f77d0677065 Mon Sep 17 00:00:00 2001
From da447ec387800bdf2df1fb1d8c1522991d025952 Mon Sep 17 00:00:00 2001
From: Sebastian Reichel <sebastian.reichel@collabora.com>
Date: Fri, 21 Jul 2023 17:43:58 +0200
Subject: [PATCH] arm64: dts: rockchip: rock-5b: add PCIe for M.2 E-Key
Date: Mon, 18 Sep 2023 16:14:51 +0200
Subject: [PATCH] arm64: dts: rockchip: add PCIe for M.2 E-Key to rock-5b
Enable PCIe2_0 controller and its voltage supply, which is routed
to the M.2 E-Key on the upper side of the Radxa Rock 5B.
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Link: https://lore.kernel.org/r/20230918141451.131247-4-sebastian.reichel@collabora.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
---
.../boot/dts/rockchip/rk3588-rock-5b.dts | 35 +++++++++++++++++++
1 file changed, 35 insertions(+)
--- a/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts
@@ -51,6 +51,21 @@
@@ -44,6 +44,21 @@
#cooling-cells = <2>;
};
+ vcc3v3_pcie2x1l0: vcc3v3-pcie2x1l0-regulator {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc3v3_pcie2x1l0";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ enable-active-high;
+ regulator-boot-on;
+ regulator-always-on;
+ gpios = <&gpio1 RK_PD2 GPIO_ACTIVE_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pcie2_0_vcc3v3_en>;
+ regulator-name = "vcc3v3_pcie2x1l0";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ startup-delay-us = <50000>;
+ vin-supply = <&vcc5v0_sys>;
+ };
@ -35,7 +37,7 @@ Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
vcc3v3_pcie2x1l2: vcc3v3-pcie2x1l2-regulator {
compatible = "regulator-fixed";
regulator-name = "vcc3v3_pcie2x1l2";
@@ -122,6 +137,10 @@
@@ -104,6 +119,10 @@
status = "okay";
};
@ -46,22 +48,22 @@ Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
&cpu_b0 {
cpu-supply = <&vdd_cpu_big0_s0>;
};
@@ -248,6 +267,14 @@
@@ -230,6 +249,14 @@
};
};
+&pcie2x1l0 {
+ reset-gpios = <&gpio4 RK_PA5 GPIO_ACTIVE_HIGH>;
+ vpcie3v3-supply = <&vcc3v3_pcie2x1l0>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pcie2_0_rst>;
+ reset-gpios = <&gpio4 RK_PA5 GPIO_ACTIVE_HIGH>;
+ vpcie3v3-supply = <&vcc3v3_pcie2x1l0>;
+ status = "okay";
+};
+
&pcie2x1l2 {
reset-gpios = <&gpio3 RK_PB0 GPIO_ACTIVE_HIGH>;
vpcie3v3-supply = <&vcc3v3_pcie2x1l2>;
@@ -288,6 +315,14 @@
pinctrl-names = "default";
pinctrl-0 = <&pcie2_2_rst>;
@@ -264,6 +291,14 @@
};
pcie2 {

93
target/linux/rockchip/patches-6.1/053-19-v6.7-arm64-dts-rockchip-Add-sdio-node-to-rock-5b.patch Normal file
View File

@ -0,0 +1,93 @@
From 1c9a53ff7ece056eb995332f0d9523ca43fdcb5a Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Tam=C3=A1s=20Sz=C5=B1cs?= <tszucs@protonmail.ch>
Date: Sun, 24 Sep 2023 20:37:45 +0000
Subject: [PATCH] arm64: dts: rockchip: Add sdio node to rock-5b
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
Enable SDIO on Radxa ROCK 5 Model B M.2 Key E. Add sdio node and alias as mmc2.
Add regulator for the 3.3 V rail bringing it up during boot. Make sure EKEY_EN
is muxed as GPIO.
Signed-off-by: Tamás Szűcs <tszucs@protonmail.ch>
Reviewed-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Link: https://lore.kernel.org/r/20230924203740.65744-1-tszucs@protonmail.ch
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
---
.../boot/dts/rockchip/rk3588-rock-5b.dts | 43 +++++++++++++++++++
1 file changed, 43 insertions(+)
--- a/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts
@@ -12,6 +12,7 @@
aliases {
mmc0 = &sdhci;
mmc1 = &sdmmc;
+ mmc2 = &sdio;
serial2 = &uart2;
};
@@ -113,6 +114,21 @@
regulator-max-microvolt = <1100000>;
vin-supply = <&vcc5v0_sys>;
};
+
+ vcc3v3_wf: vcc3v3-wf-regulator {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc3v3_wf";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ enable-active-high;
+ gpios = <&gpio1 RK_PD2 GPIO_ACTIVE_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&vcc3v3_wf_en>;
+ startup-delay-us = <50000>;
+ vin-supply = <&vcc5v0_sys>;
+ };
};
&combphy0_ps {
@@ -319,6 +335,12 @@
rockchip,pins = <4 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
+
+ m2e {
+ vcc3v3_wf_en: vcc3v3-wf-en {
+ rockchip,pins = <1 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
};
&pwm1 {
@@ -356,6 +378,27 @@
status = "okay";
};
+&sdio {
+ max-frequency = <200000000>;
+ no-sd;
+ no-mmc;
+ non-removable;
+ bus-width = <4>;
+ cap-sdio-irq;
+ disable-wp;
+ keep-power-in-suspend;
+ wakeup-source;
+ sd-uhs-sdr12;
+ sd-uhs-sdr25;
+ sd-uhs-sdr50;
+ sd-uhs-sdr104;
+ vmmc-supply = <&vcc3v3_wf>;
+ vqmmc-supply = <&vcc_1v8_s3>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&sdiom0_pins>;
+ status = "okay";
+};
+
&spi2 {
status = "okay";
assigned-clocks = <&cru CLK_SPI2>;

8
target/linux/rockchip/patches-6.1/100-rockchip-use-system-LED-for-OpenWrt.patch
View File

@ -347,9 +347,9 @@ Signed-off-by: David Bauer <mail@david-bauer.net>
#include "rk3588.dtsi"
/ {
@@ -13,6 +15,11 @@
mmc0 = &sdhci;
@@ -14,6 +16,11 @@
mmc1 = &sdmmc;
mmc2 = &sdio;
serial2 = &uart2;
+
+ led-boot = &status_led;
@ -359,7 +359,7 @@ Signed-off-by: David Bauer <mail@david-bauer.net>
};
chosen {
@@ -58,6 +65,17 @@
@@ -96,6 +103,17 @@
vin-supply = <&vcc5v0_sys>;
};
@ -377,7 +377,7 @@ Signed-off-by: David Bauer <mail@david-bauer.net>
vcc5v0_sys: vcc5v0-sys-regulator {
compatible = "regulator-fixed";
regulator-name = "vcc5v0_sys";
@@ -211,6 +229,12 @@
@@ -300,6 +318,12 @@
};
};

27
target/linux/rockchip/patches-6.1/103-arm64-dts-rockchip-lower-mmc-speed.patch
View File

@ -36,7 +36,7 @@ Signed-off-by: David Bauer <mail@david-bauer.net>
};
--- a/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts
@@ -263,8 +263,7 @@
@@ -382,8 +382,7 @@
no-sd;
non-removable;
max-frequency = <200000000>;
@ -46,6 +46,17 @@ Signed-off-by: David Bauer <mail@david-bauer.net>
status = "okay";
};
@@ -394,9 +393,8 @@
bus-width = <4>;
cap-mmc-highspeed;
cap-sd-highspeed;
- cd-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_LOW>;
disable-wp;
- sd-uhs-sdr104;
+ sd-uhs-sdr50;
vmmc-supply = <&vcc_3v3_s3>;
vqmmc-supply = <&vccio_sd_s0>;
status = "okay";
--- a/arch/arm64/boot/dts/rockchip/rk3588s-rock-5a.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3588s-rock-5a.dts
@@ -357,8 +357,7 @@
@ -58,3 +69,17 @@ Signed-off-by: David Bauer <mail@david-bauer.net>
status = "okay";
};
@@ -366,12 +365,11 @@
bus-width = <4>;
cap-mmc-highspeed;
cap-sd-highspeed;
- cd-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_LOW>;
disable-wp;
max-frequency = <150000000>;
no-sdio;
no-mmc;
- sd-uhs-sdr104;
+ sd-uhs-sdr50;
vmmc-supply = <&vcc_3v3_s0>;
vqmmc-supply = <&vccio_sd_s0>;
status = "okay";

2
target/linux/rockchip/patches-6.1/113-02-usb-typec-tcpm-avoid-graph-warning.patch
View File

@ -28,7 +28,7 @@ Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
--- a/drivers/usb/typec/tcpm/tcpm.c
+++ b/drivers/usb/typec/tcpm/tcpm.c
@@ -6547,9 +6547,9 @@ struct tcpm_port *tcpm_register_port(str
@@ -6582,9 +6582,9 @@ struct tcpm_port *tcpm_register_port(str
port->partner_desc.identity = &port->partner_ident;
port->port_type = port->typec_caps.type;

4
target/linux/rockchip/patches-6.1/121-01-arm64-dts-rockchip-rk3588-evb1-add-cpu-regulator-info.patch
View File

@ -13,7 +13,7 @@ Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
--- a/arch/arm64/boot/dts/rockchip/rk3588-evb1-v10.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3588-evb1-v10.dts
@@ -119,6 +119,21 @@
@@ -176,6 +176,21 @@
cpu-supply = <&vdd_cpu_lit_s0>;
};
@ -35,7 +35,7 @@ Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
&gmac0 {
clock_in_out = "output";
phy-handle = <&rgmii_phy>;
@@ -826,6 +841,10 @@
@@ -924,6 +939,10 @@
status = "okay";
};

97
target/linux/rockchip/patches-6.1/121-04-arm64-dts-rockchip-rk3588-evb1-add-PCIe3-bus.patch
View File

@ -1,97 +0,0 @@
From a32960824f10bab122fa0f4cdadce8a2f6a6286c Mon Sep 17 00:00:00 2001
From: Sebastian Reichel <sebastian.reichel@collabora.com>
Date: Tue, 11 Jul 2023 17:20:47 +0200
Subject: [PATCH] arm64: dts: rockchip: rk3588-evb1: add PCIe3 bus
Enable PCIe3 support, which is exposed via a PCIe3 connector.
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
---
.../boot/dts/rockchip/rk3588-evb1-v10.dts | 55 +++++++++++++++++++
1 file changed, 55 insertions(+)
--- a/arch/arm64/boot/dts/rockchip/rk3588-evb1-v10.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3588-evb1-v10.dts
@@ -49,6 +49,26 @@
vin-supply = <&avcc_1v8_s0>;
};
+ pcie30_avdd0v75: pcie30-avdd0v75-regulator {
+ compatible = "regulator-fixed";
+ regulator-name = "pcie30_avdd0v75";
+ regulator-boot-on;
+ regulator-always-on;
+ regulator-min-microvolt = <750000>;
+ regulator-max-microvolt = <750000>;
+ vin-supply = <&avdd_0v75_s0>;
+ };
+
+ pcie30_avdd1v8: pcie30-avdd1v8-regulator {
+ compatible = "regulator-fixed";
+ regulator-name = "pcie30_avdd1v8";
+ regulator-boot-on;
+ regulator-always-on;
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ vin-supply = <&avcc_1v8_s0>;
+ };
+
vcc12v_dcin: vcc12v-dcin-regulator {
compatible = "regulator-fixed";
regulator-name = "vcc12v_dcin";
@@ -71,6 +91,19 @@
pinctrl-0 = <&vcc3v3_pcie30_en>;
};
+ vcc3v3_pcie30: vcc3v3-pcie30-regulator {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc3v3_pcie30";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ enable-active-high;
+ gpios = <&gpio3 RK_PC3 GPIO_ACTIVE_HIGH>;
+ startup-delay-us = <5000>;
+ vin-supply = <&vcc12v_dcin>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&vcc3v3_pcie30_en>;
+ };
+
vcc5v0_host: vcc5v0-host-regulator {
compatible = "regulator-fixed";
regulator-name = "vcc5v0_host";
@@ -254,6 +287,18 @@
status = "okay";
};
+&pcie30phy {
+ status = "okay";
+};
+
+&pcie3x4 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pcie3_reset>;
+ reset-gpios = <&gpio4 RK_PB6 GPIO_ACTIVE_HIGH>;
+ vpcie3v3-supply = <&vcc3v3_pcie30>;
+ status = "okay";
+};
+
&pinctrl {
rtl8111 {
rtl8111_isolate: rtl8111-isolate {
@@ -274,6 +319,16 @@
};
};
+ pcie3 {
+ pcie3_reset: pcie3-reset {
+ rockchip,pins = <4 RK_PB6 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+
+ vcc3v3_pcie30_en: vcc3v3-pcie30-en {
+ rockchip,pins = <3 RK_PC3 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+
pcie3 {
pcie3_reset: pcie3-reset {
rockchip,pins = <4 RK_PB6 RK_FUNC_GPIO &pcfg_pull_none>;

14
target/linux/rockchip/patches-6.1/121-05-arm64-dts-rockchip-rk3588-evb1-add-USB3.patch
View File

@ -21,9 +21,9 @@ Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
#include "rk3588.dtsi"
/ {
@@ -167,6 +168,18 @@
regulator-max-microvolt = <1800000>;
vin-supply = <&avcc_1v8_s0>;
@@ -134,6 +135,18 @@
regulator-max-microvolt = <5000000>;
vin-supply = <&vcc5v0_usbdcin>;
};
+
+ vbus5v0_typec: vbus5v0-typec {
@ -40,7 +40,7 @@ Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
};
&combphy0_ps {
@@ -242,6 +255,56 @@
@@ -209,6 +222,56 @@
&i2c2 {
status = "okay";
@ -97,7 +97,7 @@ Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
hym8563: rtc@51 {
compatible = "haoyu,hym8563";
reg = <0x51>;
@@ -344,6 +407,16 @@
@@ -295,6 +358,16 @@
rockchip,pins = <4 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;
};
};
@ -114,7 +114,7 @@ Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
};
&pwm2 {
@@ -970,6 +1043,22 @@
@@ -921,6 +994,22 @@
status = "okay";
};
@ -137,7 +137,7 @@ Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
&u2phy2 {
status = "okay";
};
@@ -1012,3 +1101,58 @@
@@ -963,3 +1052,58 @@
&usb_host1_ohci {
status = "okay";
};

2
target/linux/rockchip/patches-6.1/121-06-arm64-dts-rockchip-rk3588-evb1-add-ADC-buttons.patch
View File

@ -60,7 +60,7 @@ Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
backlight: backlight {
compatible = "pwm-backlight";
power-supply = <&vcc12v_dcin>;
@@ -423,6 +456,11 @@
@@ -374,6 +407,11 @@
status = "okay";
};

2
target/linux/rockchip/patches-6.1/122-01-arm64-dts-rockchip-rk3588s-rock5a-add-USB3-host.patch
View File

@ -27,7 +27,7 @@ Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
&cpu_b0 {
cpu-supply = <&vdd_cpu_big0_s0>;
};
@@ -737,3 +741,7 @@
@@ -736,3 +740,7 @@
&usb_host1_ohci {
status = "okay";
};

6
target/linux/rockchip/patches-6.1/122-03-arm64-dts-rockchip-rk3588s-rock5a-add-upper-USB3-port.patch
View File

@ -13,7 +13,7 @@ Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
--- a/arch/arm64/boot/dts/rockchip/rk3588s-rock-5a.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3588s-rock-5a.dts
@@ -709,6 +709,14 @@
@@ -708,6 +708,14 @@
};
};
@ -28,7 +28,7 @@ Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
&u2phy2 {
status = "okay";
};
@@ -732,6 +740,15 @@
@@ -731,6 +739,15 @@
status = "okay";
};
@ -44,7 +44,7 @@ Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
&usb_host0_ehci {
status = "okay";
pinctrl-names = "default";
@@ -742,6 +759,11 @@
@@ -741,6 +758,11 @@
status = "okay";
};

4
target/linux/rockchip/patches-6.1/123-04-arm64-dts-rockchip-rk3588-rock5b-add-USB3-host.patch
View File

@ -17,7 +17,7 @@ Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
--- a/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts
@@ -141,6 +141,10 @@
@@ -157,6 +157,10 @@
status = "okay";
};
@ -28,7 +28,7 @@ Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
&cpu_b0 {
cpu-supply = <&vdd_cpu_big0_s0>;
};
@@ -742,3 +746,7 @@
@@ -784,3 +788,7 @@
&usb_host1_ohci {
status = "okay";
};

2
target/linux/rockchip/patches-6.1/123-05-arm64-dts-rockchip-rock5b-add-cpu-mem-regulator-info.patch
View File

@ -13,7 +13,7 @@ Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
--- a/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts
@@ -147,34 +147,42 @@
@@ -163,34 +163,42 @@
&cpu_b0 {
cpu-supply = <&vdd_cpu_big0_s0>;

6
target/linux/rockchip/patches-6.1/123-06-arm64-dts-rockchip-rk3588-rock5b-add-lower-USB3-port.patch
View File

@ -13,7 +13,7 @@ Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
--- a/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts
@@ -720,6 +720,14 @@
@@ -762,6 +762,14 @@
status = "okay";
};
@ -28,7 +28,7 @@ Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
&u2phy2 {
status = "okay";
};
@@ -739,6 +747,14 @@
@@ -781,6 +789,14 @@
status = "okay";
};
@ -43,7 +43,7 @@ Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
&usb_host0_ehci {
status = "okay";
};
@@ -755,6 +771,10 @@
@@ -797,6 +813,10 @@
status = "okay";
};

18
target/linux/rockchip/patches-6.1/123-07-arm64-dts-rockchip-rk3588-rock5b-add-USB-C-support.patch
View File

@ -21,7 +21,7 @@ Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
#include "rk3588.dtsi"
/ {
@@ -51,6 +52,15 @@
@@ -52,6 +53,15 @@
#cooling-cells = <2>;
};
@ -36,8 +36,8 @@ Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
+
vcc3v3_pcie2x1l0: vcc3v3-pcie2x1l0-regulator {
compatible = "regulator-fixed";
regulator-name = "vcc3v3_pcie2x1l0";
@@ -120,6 +130,7 @@
enable-active-high;
@@ -121,6 +131,7 @@
regulator-boot-on;
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
@ -45,7 +45,7 @@ Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
};
vcc_1v1_nldo_s3: vcc-1v1-nldo-s3-regulator {
@@ -225,6 +236,61 @@
@@ -241,6 +252,61 @@
};
};
@ -107,7 +107,7 @@ Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
&i2c6 {
status = "okay";
@@ -354,6 +420,10 @@
@@ -370,6 +436,10 @@
vcc5v0_host_en: vcc5v0-host-en {
rockchip,pins = <4 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;
};
@ -116,9 +116,9 @@ Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
+ rockchip,pins = <3 RK_PB4 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
};
};
@@ -720,6 +790,14 @@
m2e {
@@ -762,6 +832,14 @@
status = "okay";
};
@ -133,7 +133,7 @@ Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
&u2phy1 {
status = "okay";
};
@@ -755,6 +833,33 @@
@@ -797,6 +875,33 @@
status = "okay";
};
@ -167,7 +167,7 @@ Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
&usb_host0_ehci {
status = "okay";
};
@@ -763,6 +868,20 @@
@@ -805,6 +910,20 @@
status = "okay";
};

4
target/linux/rockchip/patches-6.1/603-net-ethernet-stmmac-add-devname-configuration-from-OF.patch
View File

@ -1,6 +1,6 @@
--- a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
+++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
@@ -7083,6 +7083,7 @@ int stmmac_dvr_probe(struct device *devi
@@ -7085,6 +7085,7 @@ int stmmac_dvr_probe(struct device *devi
{
struct net_device *ndev = NULL;
struct stmmac_priv *priv;
@ -8,7 +8,7 @@
u32 rxq;
int i, ret = 0;
@@ -7091,6 +7092,9 @@ int stmmac_dvr_probe(struct device *devi
@@ -7093,6 +7094,9 @@ int stmmac_dvr_probe(struct device *devi
if (!ndev)
return -ENOMEM;

2
target/linux/rockchip/patches-6.1/801-07-arm64-dts-rockchip-enable-hwrng-for-rockchip-boards.patch
View File

@ -52,7 +52,7 @@
status = "okay";
--- a/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3588-rock-5b.dts
@@ -431,6 +431,10 @@
@@ -453,6 +453,10 @@
status = "okay";
};