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ipq806x: sync upstream source code

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This commit is contained in:
AmadeusGhost 2020-08-14 12:00:20 +08:00
parent 3c9eac25ce
commit fe141dc248
34 changed files with 1759 additions and 1863 deletions
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1
package/boot/uboot-envtools/files/ipq806x
View File

@ -31,6 +31,7 @@ ubootenv_mtdinfo () {
}
case "$board" in
linksys,ea7500-v1 |\
linksys,ea8500)
ubootenv_add_uci_config "/dev/mtd10" "0x0" "0x20000" "0x20000"
;;

9
target/linux/ipq806x/base-files/etc/board.d/02_network
View File

@ -27,10 +27,17 @@ qcom,ipq8064-ap161)
ucidef_add_switch "switch0" \
"0:lan" "1:lan" "2:lan" "3u@eth1" "6:wan" "4u@eth0"
;;
linksys,ea7500-v1)
hw_mac_addr=$(mtd_get_mac_ascii devinfo hw_mac_addr)
ucidef_add_switch "switch0" \
"2:lan:1" "3:lan:2" "4:lan:3" "5:lan:4" "6@eth1" "1:wan" "0@eth0"
ucidef_set_interface_macaddr "lan" "$hw_mac_addr"
ucidef_set_interface_macaddr "wan" "$hw_mac_addr"
;;
linksys,ea8500)
hw_mac_addr=$(mtd_get_mac_ascii devinfo hw_mac_addr)
ucidef_add_switch "switch0" \
"0@eth0" "1:lan" "2:lan" "3:lan" "4:lan" "5:wan"
"1:lan" "2:lan" "3:lan" "4:lan" "6@eth1" "5:wan" "0@eth0"
ucidef_set_interface_macaddr "lan" "$hw_mac_addr"
ucidef_set_interface_macaddr "wan" "$hw_mac_addr"
;;

2
target/linux/ipq806x/base-files/etc/hotplug.d/firmware/11-ath10k-caldata
View File

@ -99,6 +99,7 @@ case "$FIRMWARE" in
ath10kcal_extract "ART" 4096 12064
ath10kcal_patch_mac_crc $(mtd_get_mac_binary ART 30)
;;
linksys,ea7500-v1 |\
linksys,ea8500)
ath10kcal_extract "art" 4096 12064
ath10kcal_patch_mac_crc $(macaddr_add $(mtd_get_mac_ascii devinfo hw_mac_addr) +1)
@ -133,6 +134,7 @@ case "$FIRMWARE" in
ath10kcal_extract "ART" 20480 12064
ath10kcal_patch_mac_crc $(mtd_get_mac_binary ART 24)
;;
linksys,ea7500-v1 |\
linksys,ea8500)
ath10kcal_extract "art" 20480 12064
ath10kcal_patch_mac_crc $(macaddr_add $(mtd_get_mac_ascii devinfo hw_mac_addr) +2)

1
target/linux/ipq806x/base-files/etc/init.d/linksys_recovery
View File

@ -6,6 +6,7 @@ boot() {
. /lib/functions.sh
case $(board_name) in
linksys,ea7500-v1 |\
linksys,ea8500)
# make sure auto_recovery in uboot is always on
AUTO_RECOVERY_ENA="`fw_printenv -n auto_recovery`"

1
target/linux/ipq806x/base-files/lib/upgrade/platform.sh
View File

@ -26,6 +26,7 @@ platform_do_upgrade() {
zyxel,nbg6817)
nand_do_upgrade "$ARGV"
;;
linksys,ea7500-v1 |\
linksys,ea8500)
platform_do_upgrade_linksys "$ARGV"
;;

1
target/linux/ipq806x/files-4.14/arch/arm/boot/dts/qcom-ipq8064-ea8500.dts
View File

@ -304,6 +304,7 @@
0x00004 0x7600000 /* PAD0_MODE */
0x00008 0x1000000 /* PAD5_MODE */
0x0000c 0x80 /* PAD6_MODE */
0x00010 0x2613a0 /* PWS_REG */
0x000e4 0x6a545 /* MAC_POWER_SEL */
0x000e0 0xc74164de /* SGMII_CTRL */
0x0007c 0x4e /* PORT0_STATUS */

1
target/linux/ipq806x/files-4.19/arch/arm/boot/dts/qcom-ipq8064-ea8500.dts
View File

@ -292,6 +292,7 @@
0x00004 0x7600000 /* PAD0_MODE */
0x00008 0x1000000 /* PAD5_MODE */
0x0000c 0x80 /* PAD6_MODE */
0x00010 0x2613a0 /* PWS_REG */
0x000e4 0x6a545 /* MAC_POWER_SEL */
0x000e0 0xc74164de /* SGMII_CTRL */
0x0007c 0x4e /* PORT0_STATUS */

56
target/linux/ipq806x/files-5.4/arch/arm/boot/dts/qcom-ipq8064-ap148.dts
View File

@ -28,46 +28,16 @@
status = "okay";
};
&gsbi4 {
qcom,mode = <GSBI_PROT_I2C_UART>;
status = "okay";
/*
* The i2c device on gsbi4 should not be enabled.
* On ipq806x designs gsbi4 i2c is meant for exclusive
* RPM usage. Turning this on in kernel manifests as
* i2c failure for the RPM.
*/
serial@16340000 {
status = "okay";
};
/*
* The i2c device on gsbi4 should not be enabled.
* On ipq806x designs gsbi4 i2c is meant for exclusive
* RPM usage. Turning this on in kernel manifests as
* i2c failure for the RPM.
*/
};
&gsbi5 {
qcom,mode = <GSBI_PROT_SPI>;
status = "okay";
spi4: spi@1a280000 {
status = "okay";
spi-max-frequency = <50000000>;
pinctrl-0 = <&spi_pins>;
pinctrl-names = "default";
cs-gpios = <&qcom_pinmux 20 0>;
m25p80@0 {
compatible = "s25fl256s1";
#address-cells = <1>;
#size-cells = <1>;
spi-max-frequency = <50000000>;
reg = <0>;
partitions {
compatible = "qcom,smem";
};
};
&flash {
partitions {
compatible = "qcom,smem";
};
};
@ -156,11 +126,3 @@
full-duplex;
};
};
&sata_phy {
status = "okay";
};
&sata {
status = "okay";
};

57
target/linux/ipq806x/files-5.4/arch/arm/boot/dts/qcom-ipq8064-ap161.dts
View File

@ -36,54 +36,17 @@
};
};
&gsbi4 {
qcom,mode = <GSBI_PROT_I2C_UART>;
status = "okay";
serial@16340000 {
status = "okay";
/*
* The i2c device on gsbi4 should not be enabled.
* On ipq806x designs gsbi4 i2c is meant for exclusive
* RPM usage. Turning this on in kernel manifests as
* i2c failure for the RPM.
*/
&flash {
partitions {
compatible = "qcom,smem";
};
/*
* The i2c device on gsbi4 should not be enabled.
* On ipq806x designs gsbi4 i2c is meant for exclusive
* RPM usage. Turning this on in kernel manifests as
* i2c failure for the RPM.
*/
};
&gsbi5 {
qcom,mode = <GSBI_PROT_SPI>;
status = "okay";
spi4: spi@1a280000 {
status = "okay";
spi-max-frequency = <50000000>;
pinctrl-0 = <&spi_pins>;
pinctrl-names = "default";
cs-gpios = <&qcom_pinmux 20 0>;
m25p80@0 {
compatible = "s25fl256s1";
#address-cells = <1>;
#size-cells = <1>;
spi-max-frequency = <50000000>;
reg = <0>;
partitions {
compatible = "qcom,smem";
};
};
};
};
&sata_phy {
status = "okay";
};
&sata {
status = "okay";
};
&usb3_0 {

10
target/linux/ipq806x/files-5.4/arch/arm/boot/dts/qcom-ipq8064-c2600.dts
View File

@ -182,11 +182,11 @@
status = "okay";
};
/*
* The i2c device on gsbi4 should not be enabled.
* On ipq806x designs gsbi4 i2c is meant for exclusive
* RPM usage. Turning this on in kernel manifests as
* i2c failure for the RPM.
*/
* The i2c device on gsbi4 should not be enabled.
* On ipq806x designs gsbi4 i2c is meant for exclusive
* RPM usage. Turning this on in kernel manifests as
* i2c failure for the RPM.
*/
};
&gsbi5 {

10
target/linux/ipq806x/files-5.4/arch/arm/boot/dts/qcom-ipq8064-d7800.dts
View File

@ -159,11 +159,11 @@
status = "okay";
};
/*
* The i2c device on gsbi4 should not be enabled.
* On ipq806x designs gsbi4 i2c is meant for exclusive
* RPM usage. Turning this on in kernel manifests as
* i2c failure for the RPM.
*/
* The i2c device on gsbi4 should not be enabled.
* On ipq806x designs gsbi4 i2c is meant for exclusive
* RPM usage. Turning this on in kernel manifests as
* i2c failure for the RPM.
*/
};
&sata_phy {

79
target/linux/ipq806x/files-5.4/arch/arm/boot/dts/qcom-ipq8064-db149.dts
View File

@ -17,7 +17,6 @@
no-map;
};
};
};
&qcom_pinmux {
@ -39,61 +38,41 @@
};
};
&gsbi5 {
qcom,mode = <GSBI_PROT_SPI>;
status = "okay";
&gsbi4 {
status = "disabled";
};
spi4: spi@1a280000 {
status = "okay";
spi-max-frequency = <50000000>;
&gsbi4_serial {
status = "disabled";
};
pinctrl-0 = <&spi_pins>;
pinctrl-names = "default";
&flash {
m25p,fast-read;
cs-gpios = <&qcom_pinmux 20 0>;
m25p80@0 {
compatible = "s25fl256s1";
#address-cells = <1>;
#size-cells = <1>;
spi-max-frequency = <50000000>;
reg = <0>;
m25p,fast-read;
partition@0 {
label = "lowlevel_init";
reg = <0x0 0x1b0000>;
};
partition@1 {
label = "u-boot";
reg = <0x1b0000 0x80000>;
};
partition@2 {
label = "u-boot-env";
reg = <0x230000 0x40000>;
};
partition@3 {
label = "caldata";
reg = <0x270000 0x40000>;
};
partition@4 {
label = "firmware";
reg = <0x2b0000 0x1d50000>;
};
};
partition@0 {
label = "lowlevel_init";
reg = <0x0 0x1b0000>;
};
};
&sata_phy {
status = "okay";
};
partition@1 {
label = "u-boot";
reg = <0x1b0000 0x80000>;
};
&sata {
status = "okay";
partition@2 {
label = "u-boot-env";
reg = <0x230000 0x40000>;
};
partition@3 {
label = "caldata";
reg = <0x270000 0x40000>;
};
partition@4 {
label = "firmware";
reg = <0x2b0000 0x1d50000>;
};
};
&usb3_0 {

302
target/linux/ipq806x/files-5.4/arch/arm/boot/dts/qcom-ipq8064-ea7500-v1.dts Normal file
View File

@ -0,0 +1,302 @@
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
#include "qcom-ipq8064-v2.0.dtsi"
#include <dt-bindings/input/input.h>
/ {
model = "Linksys EA7500 V1 WiFi Router";
compatible = "linksys,ea7500-v1", "qcom,ipq8064";
memory@0 {
reg = <0x42000000 0xe000000>;
device_type = "memory";
};
reserved-memory {
#address-cells = <1>;
#size-cells = <1>;
ranges;
rsvd@41200000 {
reg = <0x41200000 0x300000>;
no-map;
};
};
aliases {
serial0 = &gsbi4_serial;
led-boot = &led_power;
led-failsafe = &led_power;
led-running = &led_power;
led-upgrade = &led_power;
};
chosen {
bootargs = "console=ttyMSM0,115200n8";
stdout-path = "serial0:115200n8";
append-rootblock = "ubi.mtd="; /* append to bootargs adding the root deviceblock nbr from bootloader */
find-rootblock = "ubi.mtd="; /* look for root deviceblock nbr in this bootarg */
};
keys {
compatible = "gpio-keys";
pinctrl-0 = <&button_pins>;
pinctrl-names = "default";
reset {
label = "reset";
gpios = <&qcom_pinmux 68 GPIO_ACTIVE_LOW>;
linux,code = <KEY_RESTART>;
};
wps {
label = "wps";
gpios = <&qcom_pinmux 65 GPIO_ACTIVE_LOW>;
linux,code = <KEY_WPS_BUTTON>;
};
};
leds {
compatible = "gpio-leds";
pinctrl-0 = <&led_pins>;
pinctrl-names = "default";
led_power: power {
label = "ea7500-v1:white:power";
gpios = <&qcom_pinmux 6 GPIO_ACTIVE_LOW>;
default-state = "keep";
};
};
};
&qcom_pinmux {
button_pins: button_pins {
mux {
pins = "gpio65", "gpio68";
function = "gpio";
drive-strength = <2>;
bias-pull-up;
};
};
led_pins: led_pins {
mux {
pins = "gpio6";
function = "gpio";
drive-strength = <2>;
bias-pull-up;
};
};
};
&gsbi4 {
qcom,mode = <GSBI_PROT_I2C_UART>;
status = "okay";
serial@16340000 {
status = "okay";
};
/*
* The i2c device on gsbi4 should not be enabled.
* On ipq806x designs gsbi4 i2c is meant for exclusive
* RPM usage. Turning this on in kernel manifests as
* i2c failure for the RPM.
*/
};
&usb3_0 {
status = "okay";
};
&usb3_1 {
status = "okay";
};
&pcie0 {
status = "okay";
force_gen1 = <1>;
};
&pcie1 {
status = "okay";
};
&pcie2 {
status = "okay";
};
&nand_controller {
status = "okay";
pinctrl-0 = <&nand_pins>;
pinctrl-names = "default";
nand@0 {
reg = <0>;
compatible = "qcom,nandcs";
nand-ecc-strength = <4>;
nand-bus-width = <8>;
nand-ecc-step-size = <512>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "SBL1";
reg = <0x0000000 0x0040000>;
read-only;
};
partition@40000 {
label = "MIBIB";
reg = <0x0040000 0x0140000>;
read-only;
};
partition@180000 {
label = "SBL2";
reg = <0x0180000 0x0140000>;
read-only;
};
partition@2c0000 {
label = "SBL3";
reg = <0x02c0000 0x0280000>;
read-only;
};
partition@540000 {
label = "DDRCONFIG";
reg = <0x0540000 0x0120000>;
read-only;
};
partition@660000 {
label = "SSD";
reg = <0x0660000 0x0120000>;
read-only;
};
partition@780000 {
label = "TZ";
reg = <0x0780000 0x0280000>;
read-only;
};
partition@a00000 {
label = "RPM";
reg = <0x0a00000 0x0280000>;
read-only;
};
art: partition@c80000 {
label = "art";
reg = <0x0c80000 0x0140000>;
read-only;
};
partition@dc0000 {
label = "APPSBL";
reg = <0x0dc0000 0x0100000>;
read-only;
};
partition@ec0000 {
label = "u_env";
reg = <0x0ec0000 0x0040000>;
};
partition@f00000 {
label = "s_env";
reg = <0x0f00000 0x0040000>;
};
partition@f40000 {
label = "devinfo";
reg = <0x0f40000 0x0040000>;
};
partition@f80000 {
label = "kernel1";
reg = <0x0f80000 0x2800000>; /* 3 MB spill to rootfs*/
};
partition@1280000 {
label = "rootfs1";
reg = <0x1280000 0x2500000>;
};
partition@3780000 {
label = "kernel2";
reg = <0x3780000 0x2800000>;
};
partition@3a80000 {
label = "rootfs2";
reg = <0x3a80000 0x2500000>;
};
partition@5f80000 {
label = "sysdiag";
reg = <0x5f80000 0x100000>;
};
partition@6080000 {
label = "syscfg";
reg = <0x6080000 0x1f80000>;
};
};
};
};
&mdio0 {
status = "okay";
pinctrl-0 = <&mdio0_pins>;
pinctrl-names = "default";
phy0: ethernet-phy@0 {
reg = <0>;
qca,ar8327-initvals = <
0x00004 0x7600000 /* PAD0_MODE */
0x00008 0x1000000 /* PAD5_MODE */
0x0000c 0x80 /* PAD6_MODE */
0x00010 0x2613a0 /* PWS_REG */
0x000e4 0x6a545 /* MAC_POWER_SEL */
0x000e0 0xc74164de /* SGMII_CTRL */
0x0007c 0x4e /* PORT0_STATUS */
0x00094 0x4e /* PORT6_STATUS */
>;
};
};
&gmac1 {
status = "okay";
phy-mode = "rgmii";
qcom,id = <1>;
pinctrl-0 = <&rgmii2_pins>;
pinctrl-names = "default";
fixed-link {
speed = <1000>;
full-duplex;
};
};
&gmac2 {
status = "okay";
phy-mode = "sgmii";
qcom,id = <2>;
fixed-link {
speed = <1000>;
full-duplex;
};
};
&adm_dma {
status = "okay";
};

11
target/linux/ipq806x/files-5.4/arch/arm/boot/dts/qcom-ipq8064-ea8500.dts
View File

@ -109,11 +109,11 @@
status = "okay";
};
/*
* The i2c device on gsbi4 should not be enabled.
* On ipq806x designs gsbi4 i2c is meant for exclusive
* RPM usage. Turning this on in kernel manifests as
* i2c failure for the RPM.
*/
* The i2c device on gsbi4 should not be enabled.
* On ipq806x designs gsbi4 i2c is meant for exclusive
* RPM usage. Turning this on in kernel manifests as
* i2c failure for the RPM.
*/
};
&sata_phy {
@ -279,6 +279,7 @@
0x00004 0x7600000 /* PAD0_MODE */
0x00008 0x1000000 /* PAD5_MODE */
0x0000c 0x80 /* PAD6_MODE */
0x00010 0x2613a0 /* PWS_REG */
0x000e4 0x6a545 /* MAC_POWER_SEL */
0x000e0 0xc74164de /* SGMII_CTRL */
0x0007c 0x4e /* PORT0_STATUS */

9
target/linux/ipq806x/files-5.4/arch/arm/boot/dts/qcom-ipq8064-mtfi-m520.dts
View File

@ -256,15 +256,6 @@
};
};
&sata_phy {
status = "okay";
};
&sata {
ports-implemented = <0x1>;
status = "okay";
};
&usb3_0 {
status = "okay";
};

31
target/linux/ipq806x/files-5.4/arch/arm/boot/dts/qcom-ipq8064-r7500.dts
View File

@ -133,26 +133,19 @@
};
};
&gsbi4 {
qcom,mode = <GSBI_PROT_I2C_UART>;
status = "okay";
serial@16340000 {
status = "okay";
/*
* The i2c device on gsbi4 should not be enabled.
* On ipq806x designs gsbi4 i2c is meant for exclusive
* RPM usage. Turning this on in kernel manifests as
* i2c failure for the RPM.
*/
&gsbi5 {
status = "disabled";
spi@1a280000 {
status = "disabled";
};
/*
* The i2c device on gsbi4 should not be enabled.
* On ipq806x designs gsbi4 i2c is meant for exclusive
* RPM usage. Turning this on in kernel manifests as
* i2c failure for the RPM.
*/
};
&sata_phy {
status = "okay";
};
&sata {
status = "okay";
};
&usb3_0 {

12
target/linux/ipq806x/files-5.4/arch/arm/boot/dts/qcom-ipq8064-r7500v2.dts
View File

@ -168,11 +168,11 @@
status = "okay";
};
/*
* The i2c device on gsbi4 should not be enabled.
* On ipq806x designs gsbi4 i2c is meant for exclusive
* RPM usage. Turning this on in kernel manifests as
* i2c failure for the RPM.
*/
* The i2c device on gsbi4 should not be enabled.
* On ipq806x designs gsbi4 i2c is meant for exclusive
* RPM usage. Turning this on in kernel manifests as
* i2c failure for the RPM.
*/
};
&sata_phy {
@ -331,4 +331,4 @@
speed = <1000>;
full-duplex;
};
};
};

27
target/linux/ipq806x/files-5.4/arch/arm/boot/dts/qcom-ipq8064-v1.0.dtsi
View File

@ -1,27 +0,0 @@
#include "qcom-ipq8064.dtsi"
/ {
aliases {
serial0 = &gsbi4_serial;
};
chosen {
stdout-path = "serial0:115200n8";
};
};
&CPU_SPC {
status = "okay";
};
&pcie0 {
phy-tx0-term-offset = <7>;
};
&pcie1 {
phy-tx0-term-offset = <7>;
};
&pcie2 {
phy-tx0-term-offset = <7>;
};

4
target/linux/ipq806x/files-5.4/arch/arm/boot/dts/qcom-ipq8064-v2.0.dtsi
View File

@ -26,6 +26,10 @@
phy-tx0-term-offset = <0>;
};
&sata {
ports-implemented = <0x1>;
};
&ss_phy_0 {
rx_eq = <2>;
tx_deamp_3_5db = <32>;

10
target/linux/ipq806x/files-5.4/arch/arm/boot/dts/qcom-ipq8064-vr2600v.dts
View File

@ -171,11 +171,11 @@
status = "okay";
};
/*
* The i2c device on gsbi4 should not be enabled.
* On ipq806x designs gsbi4 i2c is meant for exclusive
* RPM usage. Turning this on in kernel manifests as
* i2c failure for the RPM.
*/
* The i2c device on gsbi4 should not be enabled.
* On ipq806x designs gsbi4 i2c is meant for exclusive
* RPM usage. Turning this on in kernel manifests as
* i2c failure for the RPM.
*/
};
&gsbi5 {

34
target/linux/ipq806x/files-5.4/arch/arm/boot/dts/qcom-ipq8064-wpq864.dts
View File

@ -336,39 +336,21 @@
};
};
&gsbi4 {
status = "okay";
qcom,mode = <GSBI_PROT_I2C_UART>;
};
&gsbi4_serial {
status = "okay";
pinctrl-0 = <&uart0_pins>;
pinctrl-names = "default";
};
&gsbi5 {
status = "okay";
&flash {
compatible = "jedec,spi-nor";
};
qcom,mode = <GSBI_PROT_SPI>;
&sata_phy {
status = "disabled";
};
spi@1a280000 {
status = "okay";
pinctrl-0 = <&spi_pins>;
pinctrl-names = "default";
cs-gpios = <&qcom_pinmux 20 GPIO_ACTIVE_HIGH>;
s25fl256s1@0 {
compatible = "jedec,spi-nor";
#address-cells = <1>;
#size-cells = <1>;
reg = <0>;
spi-max-frequency = <50000000>;
};
};
&sata {
status = "disabled";
};
&ss_phy_0 { /* USB3 port 0 SS phy */

1578
target/linux/ipq806x/files-5.4/arch/arm/boot/dts/qcom-ipq8064.dtsi
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11
target/linux/ipq806x/files-5.4/arch/arm/boot/dts/qcom-ipq8065-nbg6817.dts
View File

@ -179,11 +179,11 @@
status = "okay";
};
/*
* The i2c device on gsbi4 should not be enabled.
* On ipq806x designs gsbi4 i2c is meant for exclusive
* RPM usage. Turning this on in kernel manifests as
* i2c failure for the RPM.
*/
* The i2c device on gsbi4 should not be enabled.
* On ipq806x designs gsbi4 i2c is meant for exclusive
* RPM usage. Turning this on in kernel manifests as
* i2c failure for the RPM.
*/
};
&gsbi5 {
@ -247,6 +247,7 @@
pinctrl-0 = <&mdio0_pins>;
pinctrl-names = "default";
phy0: ethernet-phy@0 {
reg = <0>;
qca,ar8327-initvals = <

10
target/linux/ipq806x/files-5.4/arch/arm/boot/dts/qcom-ipq8065-r7800.dts
View File

@ -243,11 +243,11 @@
};
/*
* The i2c device on gsbi4 should not be enabled.
* On ipq806x designs gsbi4 i2c is meant for exclusive
* RPM usage. Turning this on in kernel manifests as
* i2c failure for the RPM.
*/
* The i2c device on gsbi4 should not be enabled.
* On ipq806x designs gsbi4 i2c is meant for exclusive
* RPM usage. Turning this on in kernel manifests as
* i2c failure for the RPM.
*/
};
&nand_controller {

4
target/linux/ipq806x/files-5.4/arch/arm/boot/dts/qcom-ipq8065.dtsi
View File

@ -31,6 +31,10 @@
phy-tx0-term-offset = <0>;
};
&sata {
ports-implemented = <0x1>;
};
&smb208_s2a {
regulator-min-microvolt = <775000>;
regulator-max-microvolt = <1275000>;

17
target/linux/ipq806x/image/Makefile
View File

@ -107,6 +107,23 @@ define Device/compex_wpq864
endef
TARGET_DEVICES += compex_wpq864
define Device/linksys_ea7500-v1
$(call Device/LegacyImage)
DEVICE_VENDOR := Linksys
DEVICE_MODEL := EA7500
DEVICE_VARIANT := v1
DEVICE_DTS := qcom-ipq8064-ea7500-v1
PAGESIZE := 2048
BLOCKSIZE := 128k
KERNEL_SIZE := 3072k
KERNEL = kernel-bin | append-dtb | uImage none | append-uImage-fakehdr filesystem
UBINIZE_OPTS := -E 5
IMAGES := factory.bin sysupgrade.bin
IMAGE/factory.bin := append-kernel | pad-to $$$$(KERNEL_SIZE) | append-ubi | pad-to $$$$(PAGESIZE)
DEVICE_PACKAGES := ath10k-firmware-qca99x0-ct
endef
TARGET_DEVICES += linksys_ea7500-v1
define Device/linksys_ea8500
$(call Device/LegacyImage)
DEVICE_VENDOR := Linksys

63
target/linux/ipq806x/patches-5.4/0067-generic-Mangle-bootloader-s-kernel-arguments.patch
View File

@ -51,41 +51,62 @@ Signed-off-by: Adrian Panella <ianchi74@outlook.com>
#else
#define do_extend_cmdline 0
#endif
@@ -67,6 +69,59 @@ static uint32_t get_cell_size(const void
@@ -67,6 +69,80 @@ static uint32_t get_cell_size(const void
return cell_size;
}
+#if defined(CONFIG_ARM_ATAG_DTB_COMPAT_CMDLINE_MANGLE)
+/**
+ * taken from arch/x86/boot/string.c
+ * local_strstr - Find the first substring in a %NUL terminated string
+ * @s1: The string to be searched
+ * @s2: The string to search for
+ */
+static char *local_strstr(const char *s1, const char *s2)
+{
+ size_t l1, l2;
+
+ l2 = strlen(s2);
+ if (!l2)
+ return (char *)s1;
+ l1 = strlen(s1);
+ while (l1 >= l2) {
+ l1--;
+ if (!memcmp(s1, s2, l2))
+ return (char *)s1;
+ s1++;
+ }
+ return NULL;
+}
+
+static char *append_rootblock(char *dest, const char *str, int len, void *fdt)
+{
+ char *ptr, *end;
+ char *ptr, *end, *tmp;
+ char *root="root=";
+ char *find_rootblock;
+ int i, l;
+ const char *rootblock;
+
+ //ARM doesn't have __HAVE_ARCH_STRSTR, so search manually
+ ptr = str - 1;
+ find_rootblock = getprop(fdt, "/chosen", "find-rootblock", &l);
+ if(!find_rootblock)
+ find_rootblock = root;
+
+ do {
+ //first find an 'r' at the begining or after a space
+ do {
+ ptr++;
+ ptr = strchr(ptr, 'r');
+ if(!ptr) return dest;
+ //ARM doesn't have __HAVE_ARCH_STRSTR, so it was copied from x86
+ ptr = local_strstr(str, find_rootblock);
+
+ } while (ptr != str && *(ptr-1) != ' ');
+
+ //then check for the rest
+ for(i = 1; i <= 4; i++)
+ if(*(ptr+i) != *(root+i)) break;
+
+ } while (i != 5);
+ if(!ptr)
+ return dest;
+
+ end = strchr(ptr, ' ');
+ end = end ? (end - 1) : (strchr(ptr, 0) - 1);
+
+ //find partition number (assumes format root=/dev/mtdXX | /dev/mtdblockXX | yy:XX )
+ // Some boards ubi.mtd=XX,ZZZZ, so let's check for '," too.
+ tmp = strchr(ptr, ',');
+
+ if(tmp)
+ end = end < tmp ? end : tmp - 1;
+
+ //find partition number (assumes format root=/dev/mtdXX | /dev/mtdblockXX | yy:XX | ubi.mtd=XX,ZZZZ )
+ for( i = 0; end >= ptr && *end >= '0' && *end <= '9'; end--, i++);
+ ptr = end + 1;
+
@ -111,7 +132,7 @@ Signed-off-by: Adrian Panella <ianchi74@outlook.com>
static void merge_fdt_bootargs(void *fdt, const char *fdt_cmdline)
{
char cmdline[COMMAND_LINE_SIZE];
@@ -86,12 +141,21 @@ static void merge_fdt_bootargs(void *fdt
@@ -86,12 +162,21 @@ static void merge_fdt_bootargs(void *fdt
/* and append the ATAG_CMDLINE */
if (fdt_cmdline) {
@ -133,7 +154,7 @@ Signed-off-by: Adrian Panella <ianchi74@outlook.com>
}
*ptr = '\0';
@@ -166,7 +230,9 @@ int atags_to_fdt(void *atag_list, void *
@@ -166,7 +251,9 @@ int atags_to_fdt(void *atag_list, void *
else
setprop_string(fdt, "/chosen", "bootargs",
atag->u.cmdline.cmdline);
@ -144,7 +165,7 @@ Signed-off-by: Adrian Panella <ianchi74@outlook.com>
if (memcount >= sizeof(mem_reg_property)/4)
continue;
if (!atag->u.mem.size)
@@ -210,6 +276,10 @@ int atags_to_fdt(void *atag_list, void *
@@ -210,6 +297,10 @@ int atags_to_fdt(void *atag_list, void *
setprop(fdt, "/memory", "reg", mem_reg_property,
4 * memcount * memsize);
}

3
target/linux/ipq806x/patches-5.4/0069-arm-boot-add-dts-files.patch
View File

@ -10,7 +10,7 @@ Signed-off-by: John Crispin <john@phrozen.org>
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -843,6 +843,19 @@ dtb-$(CONFIG_ARCH_QCOM) += \
@@ -843,6 +843,20 @@ dtb-$(CONFIG_ARCH_QCOM) += \
qcom-ipq4019-ap.dk07.1-c1.dtb \
qcom-ipq4019-ap.dk07.1-c2.dtb \
qcom-ipq8064-ap148.dtb \
@ -18,6 +18,7 @@ Signed-off-by: John Crispin <john@phrozen.org>
+ qcom-ipq8064-c2600.dtb \
+ qcom-ipq8064-d7800.dtb \
+ qcom-ipq8064-db149.dtb \
+ qcom-ipq8064-ea7500-v1.dtb \
+ qcom-ipq8064-ea8500.dtb \
+ qcom-ipq8064-mtfi-m520.dtb \
+ qcom-ipq8064-r7500.dtb \

2
target/linux/ipq806x/patches-5.4/080-ARM-dts-qcom-add-gpio-ranges-property.patch → target/linux/ipq806x/patches-5.4/080-v5.7-ARM-dts-qcom-add-gpio-ranges-property.patch
View File

@ -60,7 +60,7 @@ will be executed twice with the same parameters for the same pinctrl.
--- a/arch/arm/boot/dts/qcom-ipq8064.dtsi
+++ b/arch/arm/boot/dts/qcom-ipq8064.dtsi
@@ -671,6 +671,7 @@
@@ -119,6 +119,7 @@
reg = <0x800000 0x4000>;
gpio-controller;

29
target/linux/ipq806x/patches-5.4/081-v5.8-ARM-dts-qcom-add-scm-definition-to-ipq806x.patch Normal file
View File

@ -0,0 +1,29 @@
From 51befb888f62b1a62434fb4b82328d698a30f9de Mon Sep 17 00:00:00 2001
From: Ansuel Smith <ansuelsmth@gmail.com>
Date: Thu, 19 Mar 2020 23:44:24 +0100
Subject: ARM: dts: qcom: add scm definition to ipq806x
Add missing scm definition for ipq806x soc
Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
Link: https://lore.kernel.org/r/20200319224424.18473-1-ansuelsmth@gmail.com
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
---
arch/arm/boot/dts/qcom-ipq8064.dtsi | 6 ++++++
1 file changed, 6 insertions(+)
--- a/arch/arm/boot/dts/qcom-ipq8064.dtsi
+++ b/arch/arm/boot/dts/qcom-ipq8064.dtsi
@@ -93,6 +93,12 @@
};
};
+ firmware {
+ scm {
+ compatible = "qcom,scm-ipq806x", "qcom,scm";
+ };
+ };
+
soc: soc {
#address-cells = <1>;
#size-cells = <1>;

130
target/linux/ipq806x/patches-5.4/082-ipq8064-dtsi-tweaks.patch Normal file
View File

@ -0,0 +1,130 @@
--- a/arch/arm/boot/dts/qcom-ipq8064.dtsi
+++ b/arch/arm/boot/dts/qcom-ipq8064.dtsi
@@ -20,7 +20,7 @@
#address-cells = <1>;
#size-cells = <0>;
- cpu@0 {
+ cpu0: cpu@0 {
compatible = "qcom,krait";
enable-method = "qcom,kpss-acc-v1";
device_type = "cpu";
@@ -30,7 +30,7 @@
qcom,saw = <&saw0>;
};
- cpu@1 {
+ cpu1: cpu@1 {
compatible = "qcom,krait";
enable-method = "qcom,kpss-acc-v1";
device_type = "cpu";
@@ -67,7 +67,7 @@
no-map;
};
- smem@41000000 {
+ smem: smem@41000000 {
reg = <0x41000000 0x200000>;
no-map;
};
@@ -155,6 +155,7 @@
function = "pcie3_rst";
drive-strength = <12>;
bias-disable;
+ output-low;
};
};
@@ -219,21 +220,23 @@
acc0: clock-controller@2088000 {
compatible = "qcom,kpss-acc-v1";
reg = <0x02088000 0x1000>, <0x02008000 0x1000>;
+ clock-output-names = "acpu0_aux";
};
acc1: clock-controller@2098000 {
compatible = "qcom,kpss-acc-v1";
reg = <0x02098000 0x1000>, <0x02008000 0x1000>;
+ clock-output-names = "acpu1_aux";
};
saw0: regulator@2089000 {
- compatible = "qcom,saw2";
+ compatible = "qcom,saw2", "qcom,apq8064-saw2-v1.1-cpu", "syscon";
reg = <0x02089000 0x1000>, <0x02009000 0x1000>;
regulator;
};
saw1: regulator@2099000 {
- compatible = "qcom,saw2";
+ compatible = "qcom,saw2", "qcom,apq8064-saw2-v1.1-cpu", "syscon";
reg = <0x02099000 0x1000>, <0x02009000 0x1000>;
regulator;
};
@@ -251,7 +254,7 @@
syscon-tcsr = <&tcsr>;
- serial@12490000 {
+ gsbi2_serial: serial@12490000 {
compatible = "qcom,msm-uartdm-v1.3", "qcom,msm-uartdm";
reg = <0x12490000 0x1000>,
<0x12480000 0x1000>;
@@ -326,7 +329,7 @@
syscon-tcsr = <&tcsr>;
- serial@1a240000 {
+ gsbi5_serial: serial@1a240000 {
compatible = "qcom,msm-uartdm-v1.3", "qcom,msm-uartdm";
reg = <0x1a240000 0x1000>,
<0x1a200000 0x1000>;
@@ -397,7 +400,7 @@
status = "disabled";
};
- sata@29000000 {
+ sata: sata@29000000 {
compatible = "qcom,ipq806x-ahci", "generic-ahci";
reg = <0x29000000 0x180>;
@@ -430,6 +433,7 @@
reg = <0x00900000 0x4000>;
#clock-cells = <1>;
#reset-cells = <1>;
+ #power-domain-cells = <1>;
};
tcsr: syscon@1a400000 {
@@ -625,13 +629,13 @@
qcom,ee = <0>;
};
- amba {
- compatible = "simple-bus";
+ amba: amba {
+ compatible = "arm,amba-bus";
#address-cells = <1>;
#size-cells = <1>;
ranges;
- sdcc@12400000 {
+ sdcc1: sdcc@12400000 {
status = "disabled";
compatible = "arm,pl18x", "arm,primecell";
arm,primecell-periphid = <0x00051180>;
@@ -645,13 +649,12 @@
non-removable;
cap-sd-highspeed;
cap-mmc-highspeed;
- mmc-ddr-1_8v;
vmmc-supply = <&vsdcc_fixed>;
dmas = <&sdcc1bam 2>, <&sdcc1bam 1>;
dma-names = "tx", "rx";
};
- sdcc@12180000 {
+ sdcc3: sdcc@12180000 {
compatible = "arm,pl18x", "arm,primecell";
arm,primecell-periphid = <0x00051180>;
status = "disabled";

992
target/linux/ipq806x/patches-5.4/083-ipq8064-dtsi-additions.patch Normal file
View File

@ -0,0 +1,992 @@
--- a/arch/arm/boot/dts/qcom-ipq8064.dtsi
+++ b/arch/arm/boot/dts/qcom-ipq8064.dtsi
@@ -8,6 +8,8 @@
#include <dt-bindings/reset/qcom,gcc-ipq806x.h>
#include <dt-bindings/soc/qcom,gsbi.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
+#include <dt-bindings/mfd/qcom-rpm.h>
+#include <dt-bindings/clock/qcom,rpmcc.h>
/ {
#address-cells = <1>;
@@ -28,6 +30,16 @@
next-level-cache = <&L2>;
qcom,acc = <&acc0>;
qcom,saw = <&saw0>;
+ clocks = <&kraitcc 0>, <&kraitcc 4>;
+ clock-names = "cpu", "l2";
+ clock-latency = <100000>;
+ cpu-supply = <&smb208_s2a>;
+ operating-points-v2 = <&opp_table0>;
+ voltage-tolerance = <5>;
+ cooling-min-state = <0>;
+ cooling-max-state = <10>;
+ #cooling-cells = <2>;
+ cpu-idle-states = <&CPU_SPC>;
};
cpu1: cpu@1 {
@@ -38,11 +50,458 @@
next-level-cache = <&L2>;
qcom,acc = <&acc1>;
qcom,saw = <&saw1>;
+ clocks = <&kraitcc 1>, <&kraitcc 4>;
+ clock-names = "cpu", "l2";
+ clock-latency = <100000>;
+ cpu-supply = <&smb208_s2b>;
+ operating-points-v2 = <&opp_table0>;
+ voltage-tolerance = <5>;
+ cooling-min-state = <0>;
+ cooling-max-state = <10>;
+ #cooling-cells = <2>;
+ cpu-idle-states = <&CPU_SPC>;
};
L2: l2-cache {
compatible = "cache";
cache-level = <2>;
+ qcom,saw = <&saw_l2>;
+ };
+
+ qcom,l2 {
+ qcom,l2-rates = <384000000 1000000000 1200000000>;
+ qcom,l2-cpufreq = <384000000 600000000 1200000000>;
+ qcom,l2-volt = <1100000 1100000 1150000>;
+ qcom,l2-supply = <&smb208_s1a>;
+ };
+
+ idle-states {
+ CPU_SPC: spc {
+ compatible = "qcom,idle-state-spc", "arm,idle-state";
+ status = "disabled";
+ entry-latency-us = <400>;
+ exit-latency-us = <900>;
+ min-residency-us = <3000>;
+ };
+ };
+ };
+
+ opp_table0: opp_table0 {
+ compatible = "operating-points-v2-qcom-cpu";
+ nvmem-cells = <&speedbin_efuse>;
+
+ opp-384000000 {
+ opp-hz = /bits/ 64 <384000000>;
+ opp-microvolt-speed0-pvs0-v0 = <1000000>;
+ opp-microvolt-speed0-pvs1-v0 = <925000>;
+ opp-microvolt-speed0-pvs2-v0 = <875000>;
+ opp-microvolt-speed0-pvs3-v0 = <800000>;
+ opp-supported-hw = <0x1>;
+ clock-latency-ns = <100000>;
+ };
+
+ opp-600000000 {
+ opp-hz = /bits/ 64 <600000000>;
+ opp-microvolt-speed0-pvs0-v0 = <1050000>;
+ opp-microvolt-speed0-pvs1-v0 = <975000>;
+ opp-microvolt-speed0-pvs2-v0 = <925000>;
+ opp-microvolt-speed0-pvs3-v0 = <850000>;
+ opp-supported-hw = <0x1>;
+ clock-latency-ns = <100000>;
+ };
+
+ opp-800000000 {
+ opp-hz = /bits/ 64 <800000000>;
+ opp-microvolt-speed0-pvs0-v0 = <1100000>;
+ opp-microvolt-speed0-pvs1-v0 = <1025000>;
+ opp-microvolt-speed0-pvs2-v0 = <995000>;
+ opp-microvolt-speed0-pvs3-v0 = <900000>;
+ opp-supported-hw = <0x1>;
+ clock-latency-ns = <100000>;
+ };
+
+ opp-1000000000 {
+ opp-hz = /bits/ 64 <1000000000>;
+ opp-microvolt-speed0-pvs0-v0 = <1150000>;
+ opp-microvolt-speed0-pvs1-v0 = <1075000>;
+ opp-microvolt-speed0-pvs2-v0 = <1025000>;
+ opp-microvolt-speed0-pvs3-v0 = <950000>;
+ opp-supported-hw = <0x1>;
+ clock-latency-ns = <100000>;
+ };
+
+ opp-1200000000 {
+ opp-hz = /bits/ 64 <1200000000>;
+ opp-microvolt-speed0-pvs0-v0 = <1200000>;
+ opp-microvolt-speed0-pvs1-v0 = <1125000>;
+ opp-microvolt-speed0-pvs2-v0 = <1075000>;
+ opp-microvolt-speed0-pvs3-v0 = <1000000>;
+ opp-supported-hw = <0x1>;
+ clock-latency-ns = <100000>;
+ };
+
+ opp-1400000000 {
+ opp-hz = /bits/ 64 <1400000000>;
+ opp-microvolt-speed0-pvs0-v0 = <1250000>;
+ opp-microvolt-speed0-pvs1-v0 = <1175000>;
+ opp-microvolt-speed0-pvs2-v0 = <1125000>;
+ opp-microvolt-speed0-pvs3-v0 = <1050000>;
+ opp-supported-hw = <0x1>;
+ clock-latency-ns = <100000>;
+ };
+ };
+
+ thermal-zones {
+ tsens_tz_sensor0 {
+ polling-delay-passive = <0>;
+ polling-delay = <0>;
+ thermal-sensors = <&tsens 0>;
+
+ trips {
+ cpu-critical-hi {
+ temperature = <125000>;
+ hysteresis = <2000>;
+ type = "critical_high";
+ };
+
+ cpu-config-hi {
+ temperature = <105000>;
+ hysteresis = <2000>;
+ type = "configurable_hi";
+ };
+
+ cpu-config-lo {
+ temperature = <95000>;
+ hysteresis = <2000>;
+ type = "configurable_lo";
+ };
+
+ cpu-critical-low {
+ temperature = <0>;
+ hysteresis = <2000>;
+ type = "critical_low";
+ };
+ };
+ };
+
+ tsens_tz_sensor1 {
+ polling-delay-passive = <0>;
+ polling-delay = <0>;
+ thermal-sensors = <&tsens 1>;
+
+ trips {
+ cpu-critical-hi {
+ temperature = <125000>;
+ hysteresis = <2000>;
+ type = "critical_high";
+ };
+
+ cpu-config-hi {
+ temperature = <105000>;
+ hysteresis = <2000>;
+ type = "configurable_hi";
+ };
+
+ cpu-config-lo {
+ temperature = <95000>;
+ hysteresis = <2000>;
+ type = "configurable_lo";
+ };
+
+ cpu-critical-low {
+ temperature = <0>;
+ hysteresis = <2000>;
+ type = "critical_low";
+ };
+ };
+ };
+
+ tsens_tz_sensor2 {
+ polling-delay-passive = <0>;
+ polling-delay = <0>;
+ thermal-sensors = <&tsens 2>;
+
+ trips {
+ cpu-critical-hi {
+ temperature = <125000>;
+ hysteresis = <2000>;
+ type = "critical_high";
+ };
+
+ cpu-config-hi {
+ temperature = <105000>;
+ hysteresis = <2000>;
+ type = "configurable_hi";
+ };
+
+ cpu-config-lo {
+ temperature = <95000>;
+ hysteresis = <2000>;
+ type = "configurable_lo";
+ };
+
+ cpu-critical-low {
+ temperature = <0>;
+ hysteresis = <2000>;
+ type = "critical_low";
+ };
+ };
+ };
+
+ tsens_tz_sensor3 {
+ polling-delay-passive = <0>;
+ polling-delay = <0>;
+ thermal-sensors = <&tsens 3>;
+
+ trips {
+ cpu-critical-hi {
+ temperature = <125000>;
+ hysteresis = <2000>;
+ type = "critical_high";
+ };
+
+ cpu-config-hi {
+ temperature = <105000>;
+ hysteresis = <2000>;
+ type = "configurable_hi";
+ };
+
+ cpu-config-lo {
+ temperature = <95000>;
+ hysteresis = <2000>;
+ type = "configurable_lo";
+ };
+
+ cpu-critical-low {
+ temperature = <0>;
+ hysteresis = <2000>;
+ type = "critical_low";
+ };
+ };
+ };
+
+ tsens_tz_sensor4 {
+ polling-delay-passive = <0>;
+ polling-delay = <0>;
+ thermal-sensors = <&tsens 4>;
+
+ trips {
+ cpu-critical-hi {
+ temperature = <125000>;
+ hysteresis = <2000>;
+ type = "critical_high";
+ };
+
+ cpu-config-hi {
+ temperature = <105000>;
+ hysteresis = <2000>;
+ type = "configurable_hi";
+ };
+
+ cpu-config-lo {
+ temperature = <95000>;
+ hysteresis = <2000>;
+ type = "configurable_lo";
+ };
+
+ cpu-critical-low {
+ temperature = <0>;
+ hysteresis = <2000>;
+ type = "critical_low";
+ };
+ };
+ };
+
+ tsens_tz_sensor5 {
+ polling-delay-passive = <0>;
+ polling-delay = <0>;
+ thermal-sensors = <&tsens 5>;
+
+ trips {
+ cpu-critical-hi {
+ temperature = <125000>;
+ hysteresis = <2000>;
+ type = "critical_high";
+ };
+
+ cpu-config-hi {
+ temperature = <105000>;
+ hysteresis = <2000>;
+ type = "configurable_hi";
+ };
+
+ cpu-config-lo {
+ temperature = <95000>;
+ hysteresis = <2000>;
+ type = "configurable_lo";
+ };
+
+ cpu-critical-low {
+ temperature = <0>;
+ hysteresis = <2000>;
+ type = "critical_low";
+ };
+ };
+ };
+
+ tsens_tz_sensor6 {
+ polling-delay-passive = <0>;
+ polling-delay = <0>;
+ thermal-sensors = <&tsens 6>;
+
+ trips {
+ cpu-critical-hi {
+ temperature = <125000>;
+ hysteresis = <2000>;
+ type = "critical_high";
+ };
+
+ cpu-config-hi {
+ temperature = <105000>;
+ hysteresis = <2000>;
+ type = "configurable_hi";
+ };
+
+ cpu-config-lo {
+ temperature = <95000>;
+ hysteresis = <2000>;
+ type = "configurable_lo";
+ };
+
+ cpu-critical-low {
+ temperature = <0>;
+ hysteresis = <2000>;
+ type = "critical_low";
+ };
+ };
+ };
+
+ tsens_tz_sensor7 {
+ polling-delay-passive = <0>;
+ polling-delay = <0>;
+ thermal-sensors = <&tsens 7>;
+
+ trips {
+ cpu-critical-hi {
+ temperature = <125000>;
+ hysteresis = <2000>;
+ type = "critical_high";
+ };
+
+ cpu-config-hi {
+ temperature = <105000>;
+ hysteresis = <2000>;
+ type = "configurable_hi";
+ };
+
+ cpu-config-lo {
+ temperature = <95000>;
+ hysteresis = <2000>;
+ type = "configurable_lo";
+ };
+
+ cpu-critical-low {
+ temperature = <0>;
+ hysteresis = <2000>;
+ type = "critical_low";
+ };
+ };
+ };
+
+ tsens_tz_sensor8 {
+ polling-delay-passive = <0>;
+ polling-delay = <0>;
+ thermal-sensors = <&tsens 8>;
+
+ trips {
+ cpu-critical-hi {
+ temperature = <125000>;
+ hysteresis = <2000>;
+ type = "critical_high";
+ };
+
+ cpu-config-hi {
+ temperature = <105000>;
+ hysteresis = <2000>;
+ type = "configurable_hi";
+ };
+
+ cpu-config-lo {
+ temperature = <95000>;
+ hysteresis = <2000>;
+ type = "configurable_lo";
+ };
+
+ cpu-critical-low {
+ temperature = <0>;
+ hysteresis = <2000>;
+ type = "critical_low";
+ };
+ };
+ };
+
+ tsens_tz_sensor9 {
+ polling-delay-passive = <0>;
+ polling-delay = <0>;
+ thermal-sensors = <&tsens 9>;
+
+ trips {
+ cpu-critical-hi {
+ temperature = <125000>;
+ hysteresis = <2000>;
+ type = "critical_high";
+ };
+
+ cpu-config-hi {
+ temperature = <105000>;
+ hysteresis = <2000>;
+ type = "configurable_hi";
+ };
+
+ cpu-config-lo {
+ temperature = <95000>;
+ hysteresis = <2000>;
+ type = "configurable_lo";
+ };
+
+ cpu-critical-low {
+ temperature = <0>;
+ hysteresis = <2000>;
+ type = "critical_low";
+ };
+ };
+ };
+
+ tsens_tz_sensor10 {
+ polling-delay-passive = <0>;
+ polling-delay = <0>;
+ thermal-sensors = <&tsens 10>;
+
+ trips {
+ cpu-critical-hi {
+ temperature = <125000>;
+ hysteresis = <2000>;
+ type = "critical_high";
+ };
+
+ cpu-config-hi {
+ temperature = <105000>;
+ hysteresis = <2000>;
+ type = "configurable_hi";
+ };
+
+ cpu-config-lo {
+ temperature = <95000>;
+ hysteresis = <2000>;
+ type = "configurable_lo";
+ };
+
+ cpu-critical-low {
+ temperature = <0>;
+ hysteresis = <2000>;
+ type = "critical_low";
+ };
+ };
};
};
@@ -93,6 +552,15 @@
};
};
+ fab-scaling {
+ compatible = "qcom,fab-scaling";
+ clocks = <&rpmcc RPM_APPS_FABRIC_A_CLK>, <&rpmcc RPM_EBI1_A_CLK>;
+ clock-names = "apps-fab-clk", "ddr-fab-clk";
+ fab_freq_high = <533000000>;
+ fab_freq_nominal = <400000000>;
+ cpu_freq_threshold = <1000000000>;
+ };
+
firmware {
scm {
compatible = "qcom,scm-ipq806x", "qcom,scm";
@@ -120,6 +588,84 @@
reg-names = "lpass-lpaif";
};
+ qfprom: qfprom@700000 {
+ compatible = "qcom,qfprom", "syscon";
+ reg = <0x700000 0x1000>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ status = "okay";
+ tsens_calib: calib@400 {
+ reg = <0x400 0xb>;
+ };
+ tsens_backup: backup@410 {
+ reg = <0x410 0xb>;
+ };
+ speedbin_efuse: speedbin@0c0 {
+ reg = <0x0c0 0x4>;
+ };
+ };
+
+ rpm: rpm@108000 {
+ compatible = "qcom,rpm-ipq8064";
+ reg = <0x108000 0x1000>;
+ qcom,ipc = <&l2cc 0x8 2>;
+
+ interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "ack", "err", "wakeup";
+
+ clocks = <&gcc RPM_MSG_RAM_H_CLK>;
+ clock-names = "ram";
+
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ rpmcc: clock-controller {
+ compatible = "qcom,rpmcc-ipq806x", "qcom,rpmcc";
+ #clock-cells = <1>;
+ };
+
+ regulators {
+ compatible = "qcom,rpm-smb208-regulators";
+
+ smb208_s1a: s1a {
+ regulator-min-microvolt = <1050000>;
+ regulator-max-microvolt = <1150000>;
+
+ qcom,switch-mode-frequency = <1200000>;
+ };
+
+ smb208_s1b: s1b {
+ regulator-min-microvolt = <1050000>;
+ regulator-max-microvolt = <1150000>;
+
+ qcom,switch-mode-frequency = <1200000>;
+ };
+
+ smb208_s2a: s2a {
+ regulator-min-microvolt = < 800000>;
+ regulator-max-microvolt = <1250000>;
+
+ qcom,switch-mode-frequency = <1200000>;
+ };
+
+ smb208_s2b: s2b {
+ regulator-min-microvolt = < 800000>;
+ regulator-max-microvolt = <1250000>;
+
+ qcom,switch-mode-frequency = <1200000>;
+ };
+ };
+ };
+
+ rng@1a500000 {
+ compatible = "qcom,prng";
+ reg = <0x1a500000 0x200>;
+ clocks = <&gcc PRNG_CLK>;
+ clock-names = "core";
+ };
+
qcom_pinmux: pinmux@800000 {
compatible = "qcom,ipq8064-pinctrl";
reg = <0x800000 0x4000>;
@@ -159,6 +705,15 @@
};
};
+ i2c4_pins: i2c4_pinmux {
+ mux {
+ pins = "gpio12", "gpio13";
+ function = "gsbi4";
+ drive-strength = <12>;
+ bias-disable;
+ };
+ };
+
spi_pins: spi_pins {
mux {
pins = "gpio18", "gpio19", "gpio21";
@@ -168,6 +723,53 @@
};
};
+ nand_pins: nand_pins {
+ disable {
+ pins = "gpio34", "gpio35", "gpio36",
+ "gpio37", "gpio38";
+ function = "nand";
+ drive-strength = <10>;
+ bias-disable;
+ };
+
+ pullups {
+ pins = "gpio39";
+ function = "nand";
+ drive-strength = <10>;
+ bias-pull-up;
+ };
+
+ hold {
+ pins = "gpio40", "gpio41", "gpio42",
+ "gpio43", "gpio44", "gpio45",
+ "gpio46", "gpio47";
+ function = "nand";
+ drive-strength = <10>;
+ bias-bus-hold;
+ };
+ };
+
+ mdio0_pins: mdio0_pins {
+ mux {
+ pins = "gpio0", "gpio1";
+ function = "mdio";
+ drive-strength = <8>;
+ bias-disable;
+ };
+ };
+
+ rgmii2_pins: rgmii2_pins {
+ mux {
+ pins = "gpio27", "gpio28", "gpio29",
+ "gpio30", "gpio31", "gpio32",
+ "gpio51", "gpio52", "gpio59",
+ "gpio60", "gpio61", "gpio62";
+ function = "rgmii2";
+ drive-strength = <8>;
+ bias-disable;
+ };
+ };
+
leds_pins: leds_pins {
mux {
pins = "gpio7", "gpio8", "gpio9",
@@ -229,6 +831,17 @@
clock-output-names = "acpu1_aux";
};
+ l2cc: clock-controller@2011000 {
+ compatible = "qcom,kpss-gcc", "syscon";
+ reg = <0x2011000 0x1000>;
+ clock-output-names = "acpu_l2_aux";
+ };
+
+ kraitcc: clock-controller {
+ compatible = "qcom,krait-cc-v1";
+ #clock-cells = <1>;
+ };
+
saw0: regulator@2089000 {
compatible = "qcom,saw2", "qcom,apq8064-saw2-v1.1-cpu", "syscon";
reg = <0x02089000 0x1000>, <0x02009000 0x1000>;
@@ -241,6 +854,17 @@
regulator;
};
+ saw_l2: regulator@02012000 {
+ compatible = "qcom,saw2", "syscon";
+ reg = <0x02012000 0x1000>;
+ regulator;
+ };
+
+ sic_non_secure: sic-non-secure@12100000 {
+ compatible = "syscon";
+ reg = <0x12100000 0x10000>;
+ };
+
gsbi2: gsbi@12480000 {
compatible = "qcom,gsbi-v1.0.0";
cell-index = <2>;
@@ -436,6 +1060,15 @@
#power-domain-cells = <1>;
};
+ tsens: thermal-sensor@900000 {
+ compatible = "qcom,ipq8064-tsens";
+ reg = <0x900000 0x3680>;
+ nvmem-cells = <&tsens_calib>, <&tsens_backup>;
+ nvmem-cell-names = "calib", "calib_backup";
+ interrupts = <GIC_SPI 178 IRQ_TYPE_LEVEL_HIGH>;
+ #thermal-sensor-cells = <1>;
+ };
+
tcsr: syscon@1a400000 {
compatible = "qcom,tcsr-ipq8064", "syscon";
reg = <0x1a400000 0x100>;
@@ -448,6 +1081,95 @@
#reset-cells = <1>;
};
+ sfpb_mutex_block: syscon@1200600 {
+ compatible = "syscon";
+ reg = <0x01200600 0x100>;
+ };
+
+ hs_phy_0: hs_phy_0 {
+ compatible = "qcom,dwc3-hs-usb-phy";
+ regmap = <&usb3_0>;
+ clocks = <&gcc USB30_0_UTMI_CLK>;
+ clock-names = "ref";
+ #phy-cells = <0>;
+ };
+
+ ss_phy_0: ss_phy_0 {
+ compatible = "qcom,dwc3-ss-usb-phy";
+ regmap = <&usb3_0>;
+ clocks = <&gcc USB30_0_MASTER_CLK>;
+ clock-names = "ref";
+ #phy-cells = <0>;
+ };
+
+ usb3_0: usb3@110f8800 {
+ compatible = "qcom,dwc3", "syscon";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ reg = <0x110f8800 0x8000>;
+ clocks = <&gcc USB30_0_MASTER_CLK>;
+ clock-names = "core";
+
+ ranges;
+
+ resets = <&gcc USB30_0_MASTER_RESET>;
+ reset-names = "master";
+
+ status = "disabled";
+
+ dwc3_0: dwc3@11000000 {
+ compatible = "snps,dwc3";
+ reg = <0x11000000 0xcd00>;
+ interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
+ phys = <&hs_phy_0>, <&ss_phy_0>;
+ phy-names = "usb2-phy", "usb3-phy";
+ dr_mode = "host";
+ snps,dis_u3_susphy_quirk;
+ };
+ };
+
+ hs_phy_1: hs_phy_1 {
+ compatible = "qcom,dwc3-hs-usb-phy";
+ regmap = <&usb3_1>;
+ clocks = <&gcc USB30_1_UTMI_CLK>;
+ clock-names = "ref";
+ #phy-cells = <0>;
+ };
+
+ ss_phy_1: ss_phy_1 {
+ compatible = "qcom,dwc3-ss-usb-phy";
+ regmap = <&usb3_1>;
+ clocks = <&gcc USB30_1_MASTER_CLK>;
+ clock-names = "ref";
+ #phy-cells = <0>;
+ };
+
+ usb3_1: usb3@100f8800 {
+ compatible = "qcom,dwc3", "syscon";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ reg = <0x100f8800 0x8000>;
+ clocks = <&gcc USB30_1_MASTER_CLK>;
+ clock-names = "core";
+
+ ranges;
+
+ resets = <&gcc USB30_1_MASTER_RESET>;
+ reset-names = "master";
+
+ status = "disabled";
+
+ dwc3_1: dwc3@10000000 {
+ compatible = "snps,dwc3";
+ reg = <0x10000000 0xcd00>;
+ interrupts = <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>;
+ phys = <&hs_phy_1>, <&ss_phy_1>;
+ phy-names = "usb2-phy", "usb3-phy";
+ dr_mode = "host";
+ snps,dis_u3_susphy_quirk;
+ };
+ };
+
pcie0: pci@1b500000 {
compatible = "qcom,pcie-ipq8064";
reg = <0x1b500000 0x1000
@@ -601,6 +1323,167 @@
perst-gpio = <&qcom_pinmux 63 GPIO_ACTIVE_LOW>;
};
+ adm_dma: dma@18300000 {
+ compatible = "qcom,adm";
+ reg = <0x18300000 0x100000>;
+ interrupts = <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH>;
+ #dma-cells = <1>;
+
+ clocks = <&gcc ADM0_CLK>, <&gcc ADM0_PBUS_CLK>;
+ clock-names = "core", "iface";
+
+ resets = <&gcc ADM0_RESET>,
+ <&gcc ADM0_PBUS_RESET>,
+ <&gcc ADM0_C0_RESET>,
+ <&gcc ADM0_C1_RESET>,
+ <&gcc ADM0_C2_RESET>;
+ reset-names = "clk", "pbus", "c0", "c1", "c2";
+ qcom,ee = <0>;
+
+ status = "disabled";
+ };
+
+ nand_controller: nand-controller@1ac00000 {
+ compatible = "qcom,ipq806x-nand";
+ reg = <0x1ac00000 0x800>;
+
+ clocks = <&gcc EBI2_CLK>,
+ <&gcc EBI2_AON_CLK>;
+ clock-names = "core", "aon";
+
+ dmas = <&adm_dma 3>;
+ dma-names = "rxtx";
+ qcom,cmd-crci = <15>;
+ qcom,data-crci = <3>;
+
+ status = "disabled";
+
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
+ nss_common: syscon@03000000 {
+ compatible = "syscon";
+ reg = <0x03000000 0x0000FFFF>;
+ };
+
+ qsgmii_csr: syscon@1bb00000 {
+ compatible = "syscon";
+ reg = <0x1bb00000 0x000001FF>;
+ };
+
+ stmmac_axi_setup: stmmac-axi-config {
+ snps,wr_osr_lmt = <7>;
+ snps,rd_osr_lmt = <7>;
+ snps,blen = <16 0 0 0 0 0 0>;
+ };
+
+ mdio0: mdio@37000000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ compatible = "qcom,ipq8064-mdio", "syscon";
+ reg = <0x37000000 0x200000>;
+ resets = <&gcc GMAC_CORE1_RESET>;
+ reset-names = "stmmaceth";
+ clocks = <&gcc GMAC_CORE1_CLK>;
+ clock-names = "stmmaceth";
+
+ status = "disabled";
+ };
+
+ gmac0: ethernet@37000000 {
+ device_type = "network";
+ compatible = "qcom,ipq806x-gmac";
+ reg = <0x37000000 0x200000>;
+ interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "macirq";
+
+ snps,axi-config = <&stmmac_axi_setup>;
+ snps,pbl = <32>;
+ snps,aal = <1>;
+
+ qcom,nss-common = <&nss_common>;
+ qcom,qsgmii-csr = <&qsgmii_csr>;
+
+ clocks = <&gcc GMAC_CORE1_CLK>;
+ clock-names = "stmmaceth";
+
+ resets = <&gcc GMAC_CORE1_RESET>;
+ reset-names = "stmmaceth";
+
+ status = "disabled";
+ };
+
+ gmac1: ethernet@37200000 {
+ device_type = "network";
+ compatible = "qcom,ipq806x-gmac";
+ reg = <0x37200000 0x200000>;
+ interrupts = <GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "macirq";
+
+ snps,axi-config = <&stmmac_axi_setup>;
+ snps,pbl = <32>;
+ snps,aal = <1>;
+
+ qcom,nss-common = <&nss_common>;
+ qcom,qsgmii-csr = <&qsgmii_csr>;
+
+ clocks = <&gcc GMAC_CORE2_CLK>;
+ clock-names = "stmmaceth";
+
+ resets = <&gcc GMAC_CORE2_RESET>;
+ reset-names = "stmmaceth";
+
+ status = "disabled";
+ };
+
+ gmac2: ethernet@37400000 {
+ device_type = "network";
+ compatible = "qcom,ipq806x-gmac", "snps,dwmac";
+ reg = <0x37400000 0x200000>;
+ interrupts = <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "macirq";
+
+ snps,axi-config = <&stmmac_axi_setup>;
+ snps,pbl = <32>;
+ snps,aal = <1>;
+
+ qcom,nss-common = <&nss_common>;
+ qcom,qsgmii-csr = <&qsgmii_csr>;
+
+ clocks = <&gcc GMAC_CORE3_CLK>;
+ clock-names = "stmmaceth";
+
+ resets = <&gcc GMAC_CORE3_RESET>;
+ reset-names = "stmmaceth";
+
+ status = "disabled";
+ };
+
+ gmac3: ethernet@37600000 {
+ device_type = "network";
+ compatible = "qcom,ipq806x-gmac", "snps,dwmac";
+ reg = <0x37600000 0x200000>;
+ interrupts = <GIC_SPI 229 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "macirq";
+
+ snps,axi-config = <&stmmac_axi_setup>;
+ snps,pbl = <32>;
+ snps,aal = <1>;
+
+ qcom,nss-common = <&nss_common>;
+ qcom,qsgmii-csr = <&qsgmii_csr>;
+
+ clocks = <&gcc GMAC_CORE4_CLK>;
+ clock-names = "stmmaceth";
+
+ resets = <&gcc GMAC_CORE4_RESET>;
+ reset-names = "stmmaceth";
+
+ status = "disabled";
+ };
+
vsdcc_fixed: vsdcc-regulator {
compatible = "regulator-fixed";
regulator-name = "SDCC Power";
@@ -676,4 +1559,17 @@
};
};
};
+
+ sfpb_mutex: sfpb-mutex {
+ compatible = "qcom,sfpb-mutex";
+ syscon = <&sfpb_mutex_block 4 4>;
+
+ #hwlock-cells = <1>;
+ };
+
+ smem {
+ compatible = "qcom,smem";
+ memory-region = <&smem>;
+ hwlocks = <&sfpb_mutex 3>;
+ };
};

89
target/linux/ipq806x/patches-5.4/084-ipq8064-v1.0-dtsi-cleanup.patch Normal file
View File

@ -0,0 +1,89 @@
This uses upstream qcom-ipq8064-v1.0.dtsi and modifies it by patches
instead of keeping a local version.
We drop partitions, LEDs and keys from the file as we will implement
them differently anyway.
--- a/arch/arm/boot/dts/qcom-ipq8064-v1.0.dtsi
+++ b/arch/arm/boot/dts/qcom-ipq8064-v1.0.dtsi
@@ -42,16 +42,6 @@
#size-cells = <1>;
spi-max-frequency = <50000000>;
reg = <0>;
-
- partition@0 {
- label = "rootfs";
- reg = <0x0 0x1000000>;
- };
-
- partition@1 {
- label = "scratch";
- reg = <0x1000000 0x1000000>;
- };
};
};
};
@@ -64,64 +54,5 @@
ports-implemented = <0x1>;
status = "ok";
};
-
- gpio_keys {
- compatible = "gpio-keys";
- pinctrl-0 = <&buttons_pins>;
- pinctrl-names = "default";
-
- button@1 {
- label = "reset";
- linux,code = <KEY_RESTART>;
- gpios = <&qcom_pinmux 54 GPIO_ACTIVE_LOW>;
- linux,input-type = <1>;
- debounce-interval = <60>;
- };
- button@2 {
- label = "wps";
- linux,code = <KEY_WPS_BUTTON>;
- gpios = <&qcom_pinmux 65 GPIO_ACTIVE_LOW>;
- linux,input-type = <1>;
- debounce-interval = <60>;
- };
- };
-
- leds {
- compatible = "gpio-leds";
- pinctrl-0 = <&leds_pins>;
- pinctrl-names = "default";
-
- led@7 {
- label = "led_usb1";
- gpios = <&qcom_pinmux 7 GPIO_ACTIVE_HIGH>;
- linux,default-trigger = "usbdev";
- default-state = "off";
- };
-
- led@8 {
- label = "led_usb3";
- gpios = <&qcom_pinmux 8 GPIO_ACTIVE_HIGH>;
- linux,default-trigger = "usbdev";
- default-state = "off";
- };
-
- led@9 {
- label = "status_led_fail";
- gpios = <&qcom_pinmux 9 GPIO_ACTIVE_HIGH>;
- default-state = "off";
- };
-
- led@26 {
- label = "sata_led";
- gpios = <&qcom_pinmux 26 GPIO_ACTIVE_HIGH>;
- default-state = "off";
- };
-
- led@53 {
- label = "status_led_pass";
- gpios = <&qcom_pinmux 53 GPIO_ACTIVE_HIGH>;
- default-state = "off";
- };
- };
};
};

26
target/linux/ipq806x/patches-5.4/085-ipq8064-v1.0-dtsi-additions.patch Normal file
View File

@ -0,0 +1,26 @@
This uses upstream qcom-ipq8064-v1.0.dtsi and modifies it by patches
instead of keeping a local version. This patch adds our local adjustments
for the (local) additional contents of qcom-ipq8064.dtsi
--- a/arch/arm/boot/dts/qcom-ipq8064-v1.0.dtsi
+++ b/arch/arm/boot/dts/qcom-ipq8064-v1.0.dtsi
@@ -56,3 +56,19 @@
};
};
};
+
+&CPU_SPC {
+ status = "okay";
+};
+
+&pcie0 {
+ phy-tx0-term-offset = <7>;
+};
+
+&pcie1 {
+ phy-tx0-term-offset = <7>;
+};
+
+&pcie2 {
+ phy-tx0-term-offset = <7>;
+};