diff --git a/include/kernel-version.mk b/include/kernel-version.mk index 08c4bc85d0..ae0d01e74d 100644 --- a/include/kernel-version.mk +++ b/include/kernel-version.mk @@ -7,10 +7,10 @@ ifdef CONFIG_TESTING_KERNEL endif LINUX_VERSION-5.4 = .167 -LINUX_VERSION-5.10 = .87 +LINUX_VERSION-5.10 = .88 LINUX_KERNEL_HASH-5.4.167 = b4e43116217ee02009aba7eab3081e64560b81ce42bc6096fcd81257f470a5a7 -LINUX_KERNEL_HASH-5.10.87 = 03128b70f3063433cfab4ff4c7da288d7c045fe1eafa2a59081df4032fece64b +LINUX_KERNEL_HASH-5.10.88 = 6f8631b6c382a2b0cfeff1e5f8805c8e1cfbe8d714b6e65f5bb79733c99068eb remove_uri_prefix=$(subst git://,,$(subst http://,,$(subst https://,,$(1)))) sanitize_uri=$(call qstrip,$(subst @,_,$(subst :,_,$(subst .,_,$(subst -,_,$(subst /,_,$(1))))))) diff --git a/package/base-files/files/lib/upgrade/common.sh b/package/base-files/files/lib/upgrade/common.sh index ec198b2375..24ff77a8b3 100644 --- a/package/base-files/files/lib/upgrade/common.sh +++ b/package/base-files/files/lib/upgrade/common.sh @@ -245,7 +245,7 @@ get_partitions() { # local type="$1" local lba="$(( $(hex_le32_to_cpu $4) * 0x100000000 + $(hex_le32_to_cpu $3) ))" local end="$(( $(hex_le32_to_cpu $6) * 0x100000000 + $(hex_le32_to_cpu $5) ))" - local num="$(( $end - $lba ))" + local num="$(( $end - $lba + 1 ))" [ "$type" = "00000000000000000000000000000000" ] && continue diff --git a/package/boot/arm-trusted-firmware-bcm63xx/Makefile b/package/boot/arm-trusted-firmware-bcm63xx/Makefile new file mode 100644 index 0000000000..12571e8d96 --- /dev/null +++ b/package/boot/arm-trusted-firmware-bcm63xx/Makefile @@ -0,0 +1,42 @@ +# SPDX-License-Identifier: GPL-2.0 + +include $(TOPDIR)/rules.mk + +PKG_VERSION:=2.2 +PKG_RELEASE:=$(AUTORELEASE) + +PKG_SOURCE_PROTO:=git +PKG_SOURCE_URL=$(PROJECT_GIT)/project/bcm63xx/atf.git +PKG_SOURCE_DATE:=2021-12-24 +PKG_SOURCE_VERSION:=e6d46baf3fae79f693f90bf34f7284c3dfc64aef +PKG_MIRROR_HASH:=9d5d04f572b1b6ddc6eb3064b9cb09f5fe982e82d350790041d35316349af124 + +PKG_MAINTAINER:=Rafał Miłecki + +include $(INCLUDE_DIR)/trusted-firmware-a.mk +include $(INCLUDE_DIR)/package.mk + +define Trusted-Firmware-A/Default + PLAT:=bcm + DEFAULT:=y +endef + +define Trusted-Firmware-A/bcm4908 + BUILD_TARGET:=bcm4908 + NAME:=BCM4908 + BRCM_CHIP=4908 + TFA_IMAGE:=bl31.bin +endef + +TFA_TARGETS:= \ + bcm4908 + +TFA_MAKE_FLAGS += \ + BRCM_CHIP=$(BRCM_CHIP) + +define Package/trusted-firmware-a/install + $(INSTALL_DIR) $(STAGING_DIR_IMAGE) + $(INSTALL_DATA) $(PKG_BUILD_DIR)/build/$(PLAT)/release/$(TFA_IMAGE) $(STAGING_DIR_IMAGE)/ +endef + +$(eval $(call BuildPackage/Trusted-Firmware-A)) diff --git a/package/firmware/amd64-microcode/Makefile b/package/firmware/amd64-microcode/Makefile deleted file mode 100644 index 4444883c74..0000000000 --- a/package/firmware/amd64-microcode/Makefile +++ /dev/null @@ -1,47 +0,0 @@ -# -# Copyright (C) 2018 OpenWrt.org -# -# This is free software, licensed under the GNU General Public License v2. -# See /LICENSE for more information. -# - -include $(TOPDIR)/rules.mk - -PKG_NAME:=amd64-microcode -PKG_VERSION:=20191218 -PKG_RELEASE:=1 - -PKG_SOURCE:=amd64-microcode_3.$(PKG_VERSION).$(PKG_RELEASE).tar.xz -PKG_SOURCE_URL:=@DEBIAN/pool/non-free/a/amd64-microcode/ -PKG_HASH:=f469b79348097c5f04641b67a39d0ee5a2a1916c9556281626c04f2275d4132d -PKG_BUILD_DIR:=$(BUILD_DIR)/$(PKG_NAME)-3.$(PKG_VERSION).$(PKG_RELEASE) - -PKG_LICENSE_FILE:=LICENSE.amd-ucode - -PKG_FLAGS:=nonshared - -include $(INCLUDE_DIR)/package.mk - -define Package/amd64-microcode - SECTION:=firmware - CATEGORY:=Firmware - URL:=$(PKG_SOURCE_URL) - DEPENDS:=@TARGET_x86 - TITLE:=AMD64 CPU microcode -endef - -define Build/Prepare - rm -rf $(PKG_BUILD_DIR) - mkdir -p $(PKG_BUILD_DIR) - $(TAR) -C $(BUILD_DIR) -xJf $(DL_DIR)/$(PKG_SOURCE) -endef - -define Build/Compile -endef - -define Package/amd64-microcode/install - $(INSTALL_DIR) $(1)/lib/firmware/amd-ucode - $(INSTALL_DATA) $(PKG_BUILD_DIR)/*.bin $(1)/lib/firmware/amd-ucode -endef - -$(eval $(call BuildPackage,amd64-microcode)) diff --git a/package/firmware/linux-firmware/Makefile b/package/firmware/linux-firmware/Makefile index 2ad213b82b..4786751e8c 100644 --- a/package/firmware/linux-firmware/Makefile +++ b/package/firmware/linux-firmware/Makefile @@ -8,12 +8,12 @@ include $(TOPDIR)/rules.mk PKG_NAME:=linux-firmware -PKG_VERSION:=20210511 +PKG_VERSION:=20211216 PKG_RELEASE:=1 PKG_SOURCE_URL:=@KERNEL/linux/kernel/firmware PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.xz -PKG_HASH:=2aa6ae8b9808408f9811ac38f00c188e53e984a2b3990254f6c9c02c1ab13417 +PKG_HASH:=eeddb4e6bef31fd1a3757f12ccc324929bbad97855c0b9ec5ed780f74de1837d PKG_MAINTAINER:=Felix Fietkau diff --git a/package/firmware/linux-firmware/amd.mk b/package/firmware/linux-firmware/amd.mk new file mode 100644 index 0000000000..68b305e862 --- /dev/null +++ b/package/firmware/linux-firmware/amd.mk @@ -0,0 +1,29 @@ +Package/amd64-microcode = $(call Package/firmware-default,AMD64 CPU microcode,@TARGET_x86) +define Package/amd64-microcode/install + $(INSTALL_DIR) $(1)/lib/firmware/amd-ucode + $(CP) \ + $(PKG_BUILD_DIR)/amd-ucode/*.bin \ + $(1)/lib/firmware/amd-ucode +endef + +$(eval $(call BuildPackage,amd64-microcode)) + +Package/amdgpu-firmware = $(call Package/firmware-default,AMDGPU Video Driver firmware) +define Package/amdgpu-firmware/install + $(INSTALL_DIR) $(1)/lib/firmware/amdgpu + $(CP) \ + $(PKG_BUILD_DIR)/amdgpu/*.bin \ + $(1)/lib/firmware/amdgpu +endef + +$(eval $(call BuildPackage,amdgpu-firmware)) + +Package/radeon-firmware = $(call Package/firmware-default,Radeon Video Driver firmware) +define Package/radeon-firmware/install + $(INSTALL_DIR) $(1)/lib/firmware/radeon + $(CP) \ + $(PKG_BUILD_DIR)/radeon/*.bin \ + $(1)/lib/firmware/radeon +endef + +$(eval $(call BuildPackage,radeon-firmware)) diff --git a/package/firmware/linux-firmware/amdgpu.mk b/package/firmware/linux-firmware/amdgpu.mk deleted file mode 100644 index 89f11e7c39..0000000000 --- a/package/firmware/linux-firmware/amdgpu.mk +++ /dev/null @@ -1,9 +0,0 @@ -Package/amdgpu-firmware = $(call Package/firmware-default,AMDGPU Video Driver firmware) -define Package/amdgpu-firmware/install - $(INSTALL_DIR) $(1)/lib/firmware/amdgpu - $(CP) \ - $(PKG_BUILD_DIR)/amdgpu/*.bin \ - $(1)/lib/firmware/amdgpu -endef - -$(eval $(call BuildPackage,amdgpu-firmware)) diff --git a/package/firmware/linux-firmware/radeon.mk b/package/firmware/linux-firmware/radeon.mk deleted file mode 100644 index b750efbfce..0000000000 --- a/package/firmware/linux-firmware/radeon.mk +++ /dev/null @@ -1,9 +0,0 @@ -Package/radeon-firmware = $(call Package/firmware-default,Radeon Video Driver firmware) -define Package/radeon-firmware/install - $(INSTALL_DIR) $(1)/lib/firmware/radeon - $(CP) \ - $(PKG_BUILD_DIR)/radeon/*.bin \ - $(1)/lib/firmware/radeon -endef - -$(eval $(call BuildPackage,radeon-firmware)) diff --git a/package/firmware/linux-firmware/realtek.mk b/package/firmware/linux-firmware/realtek.mk index 182a5ce4d1..c883e8ba59 100644 --- a/package/firmware/linux-firmware/realtek.mk +++ b/package/firmware/linux-firmware/realtek.mk @@ -89,16 +89,10 @@ Package/rtl8723bu-firmware = $(call Package/firmware-default,RealTek RTL8723BU f define Package/rtl8723bu-firmware/install $(INSTALL_DIR) $(1)/lib/firmware/rtlwifi $(INSTALL_DATA) $(PKG_BUILD_DIR)/rtlwifi/rtl8723bu_nic.bin $(1)/lib/firmware/rtlwifi + ln -s rtl8723bu_nic.bin $(1)/lib/firmware/rtlwifi/rtl8723bs_nic.bin endef $(eval $(call BuildPackage,rtl8723bu-firmware)) -Package/rtl8723bs-firmware = $(call Package/firmware-default,RealTek RTL8723BS firmware) -define Package/rtl8723bs-firmware/install - $(INSTALL_DIR) $(1)/lib/firmware/rtlwifi - $(INSTALL_DATA) $(PKG_BUILD_DIR)/rtlwifi/rtl8723bs*.bin $(1)/lib/firmware/rtlwifi -endef -$(eval $(call BuildPackage,rtl8723bs-firmware)) - Package/rtl8821ae-firmware = $(call Package/firmware-default,RealTek RTL8821AE firmware) define Package/rtl8821ae-firmware/install $(INSTALL_DIR) $(1)/lib/firmware/rtlwifi diff --git a/package/kernel/mac80211/Makefile b/package/kernel/mac80211/Makefile index 251f2f8f8b..2f9fd11f10 100644 --- a/package/kernel/mac80211/Makefile +++ b/package/kernel/mac80211/Makefile @@ -419,9 +419,15 @@ config-$(call config_package,rsi91x-sdio) += RSI_SDIO config-$(CONFIG_LEDS_TRIGGERS) += MAC80211_LEDS +C_DEFINES= + +ifeq ($(BUILD_VARIANT),smallbuffers) + C_DEFINES+= -DCONFIG_ATH10K_SMALLBUFFERS +endif + MAKE_OPTS:= -C "$(PKG_BUILD_DIR)" \ $(KERNEL_MAKE_FLAGS) \ - EXTRA_CFLAGS="-I$(PKG_BUILD_DIR)/include $(IREMAP_CFLAGS)" \ + EXTRA_CFLAGS="-I$(PKG_BUILD_DIR)/include $(IREMAP_CFLAGS) $(C_DEFINES)" \ KLIB_BUILD="$(LINUX_DIR)" \ MODPROBE=true \ KLIB=$(TARGET_MODULES_DIR) \ diff --git a/package/kernel/mac80211/ath.mk b/package/kernel/mac80211/ath.mk index 152f432b75..d93697d01b 100644 --- a/package/kernel/mac80211/ath.mk +++ b/package/kernel/mac80211/ath.mk @@ -1,5 +1,5 @@ PKG_DRIVERS += \ - ath ath5k ath6kl ath6kl-sdio ath6kl-usb ath9k ath9k-common ath9k-htc ath10k \ + ath ath5k ath6kl ath6kl-sdio ath6kl-usb ath9k ath9k-common ath9k-htc ath10k ath10k-smallbuffers \ carl9170 owl-loader ar5523 wil6210 PKG_CONFIG_DEPENDS += \ @@ -55,6 +55,7 @@ config-$(CONFIG_ATH10K_THERMAL) += ATH10K_THERMAL config-$(call config_package,ath9k-htc) += ATH9K_HTC config-$(call config_package,ath10k) += ATH10K ATH10K_PCI +config-$(call config_package,ath10k-smallbuffers) += ATH10K ATH10K_PCI ATH10K_SMALLBUFFERS config-$(call config_package,ath5k) += ATH5K ifdef CONFIG_TARGET_ath25 @@ -260,6 +261,7 @@ define KernelPackage/ath10k $(PKG_BUILD_DIR)/drivers/net/wireless/ath/ath10k/ath10k_core.ko \ $(PKG_BUILD_DIR)/drivers/net/wireless/ath/ath10k/ath10k_pci.ko AUTOLOAD:=$(call AutoProbe,ath10k_pci) + VARIANT:=regular endef define KernelPackage/ath10k/description @@ -273,15 +275,21 @@ define KernelPackage/ath10k/config config ATH10K_LEDS bool "Enable LED support" default y - depends on PACKAGE_kmod-ath10k + depends on PACKAGE_kmod-ath10k || PACKAGE_kmod-ath10k-smallbuffers config ATH10K_THERMAL bool "Enable thermal sensors and throttling support" default y - depends on PACKAGE_kmod-ath10k + depends on PACKAGE_kmod-ath10k || PACKAGE_kmod-ath10k-smallbuffers endef +define KernelPackage/ath10k-smallbuffers + $(call KernelPackage/ath10k) + TITLE+= (small buffers for low-RAM devices) + VARIANT:=smallbuffers +endef + define KernelPackage/carl9170 $(call KernelPackage/mac80211/Default) TITLE:=Driver for Atheros AR9170 USB sticks diff --git a/package/kernel/mac80211/patches/ath10k/990-ath10k-small-buffers.patch b/package/kernel/mac80211/patches/ath10k/990-ath10k-small-buffers.patch new file mode 100644 index 0000000000..2f560c70a0 --- /dev/null +++ b/package/kernel/mac80211/patches/ath10k/990-ath10k-small-buffers.patch @@ -0,0 +1,64 @@ +--- a/drivers/net/wireless/ath/ath10k/htt.h ++++ b/drivers/net/wireless/ath/ath10k/htt.h +@@ -235,7 +235,11 @@ enum htt_rx_ring_flags { + }; + + #define HTT_RX_RING_SIZE_MIN 128 ++#ifndef CONFIG_ATH10K_SMALLBUFFERS + #define HTT_RX_RING_SIZE_MAX 2048 ++#else ++#define HTT_RX_RING_SIZE_MAX 512 ++#endif + #define HTT_RX_RING_SIZE HTT_RX_RING_SIZE_MAX + #define HTT_RX_RING_FILL_LEVEL (((HTT_RX_RING_SIZE) / 2) - 1) + #define HTT_RX_RING_FILL_LEVEL_DUAL_MAC (HTT_RX_RING_SIZE - 1) +--- a/drivers/net/wireless/ath/ath10k/pci.c ++++ b/drivers/net/wireless/ath/ath10k/pci.c +@@ -131,7 +131,11 @@ static const struct ce_attr pci_host_ce_ + .flags = CE_ATTR_FLAGS, + .src_nentries = 0, + .src_sz_max = 2048, ++#ifndef CONFIG_ATH10K_SMALLBUFFERS + .dest_nentries = 512, ++#else ++ .dest_nentries = 128, ++#endif + .recv_cb = ath10k_pci_htt_htc_rx_cb, + }, + +@@ -140,7 +144,11 @@ static const struct ce_attr pci_host_ce_ + .flags = CE_ATTR_FLAGS, + .src_nentries = 0, + .src_sz_max = 2048, ++#ifndef CONFIG_ATH10K_SMALLBUFFERS + .dest_nentries = 128, ++#else ++ .dest_nentries = 64, ++#endif + .recv_cb = ath10k_pci_htc_rx_cb, + }, + +@@ -167,7 +175,11 @@ static const struct ce_attr pci_host_ce_ + .flags = CE_ATTR_FLAGS, + .src_nentries = 0, + .src_sz_max = 512, ++#ifndef CONFIG_ATH10K_SMALLBUFFERS + .dest_nentries = 512, ++#else ++ .dest_nentries = 128, ++#endif + .recv_cb = ath10k_pci_htt_rx_cb, + }, + +@@ -192,7 +204,11 @@ static const struct ce_attr pci_host_ce_ + .flags = CE_ATTR_FLAGS, + .src_nentries = 0, + .src_sz_max = 2048, ++#ifndef CONFIG_ATH10K_SMALLBUFFERS + .dest_nentries = 128, ++#else ++ .dest_nentries = 96, ++#endif + .recv_cb = ath10k_pci_pktlog_rx_cb, + }, + diff --git a/package/kernel/mac80211/patches/subsys/311-mac80211-use-coarse-boottime-for-airtime-fairness-co.patch b/package/kernel/mac80211/patches/subsys/311-mac80211-use-coarse-boottime-for-airtime-fairness-co.patch index d4472ac83d..c43cd3acb9 100644 --- a/package/kernel/mac80211/patches/subsys/311-mac80211-use-coarse-boottime-for-airtime-fairness-co.patch +++ b/package/kernel/mac80211/patches/subsys/311-mac80211-use-coarse-boottime-for-airtime-fairness-co.patch @@ -13,7 +13,7 @@ Signed-off-by: Felix Fietkau --- a/net/mac80211/tx.c +++ b/net/mac80211/tx.c -@@ -3827,7 +3827,7 @@ struct ieee80211_txq *ieee80211_next_txq +@@ -3820,7 +3820,7 @@ struct ieee80211_txq *ieee80211_next_txq { struct ieee80211_local *local = hw_to_local(hw); struct airtime_sched_info *air_sched; @@ -22,7 +22,7 @@ Signed-off-by: Felix Fietkau struct ieee80211_txq *ret = NULL; struct airtime_info *air_info; struct txq_info *txqi = NULL; -@@ -3954,7 +3954,7 @@ void ieee80211_update_airtime_weight(str +@@ -3947,7 +3947,7 @@ void ieee80211_update_airtime_weight(str u64 weight_sum = 0; if (unlikely(!now)) @@ -31,7 +31,7 @@ Signed-off-by: Felix Fietkau lockdep_assert_held(&air_sched->lock); -@@ -3980,7 +3980,7 @@ void ieee80211_schedule_txq(struct ieee8 +@@ -3973,7 +3973,7 @@ void ieee80211_schedule_txq(struct ieee8 struct ieee80211_local *local = hw_to_local(hw); struct txq_info *txqi = to_txq_info(txq); struct airtime_sched_info *air_sched; @@ -40,7 +40,7 @@ Signed-off-by: Felix Fietkau struct airtime_info *air_info; u8 ac = txq->ac; bool was_active; -@@ -4038,7 +4038,7 @@ static void __ieee80211_unschedule_txq(s +@@ -4031,7 +4031,7 @@ static void __ieee80211_unschedule_txq(s if (!purge) airtime_set_active(air_sched, air_info, @@ -49,7 +49,7 @@ Signed-off-by: Felix Fietkau rb_erase_cached(&txqi->schedule_order, &air_sched->active_txqs); -@@ -4126,7 +4126,7 @@ bool ieee80211_txq_may_transmit(struct i +@@ -4119,7 +4119,7 @@ bool ieee80211_txq_may_transmit(struct i if (RB_EMPTY_NODE(&txqi->schedule_order)) goto out; diff --git a/package/libs/libpcap/Makefile b/package/libs/libpcap/Makefile index d07c83ac6f..2e5fc07831 100644 --- a/package/libs/libpcap/Makefile +++ b/package/libs/libpcap/Makefile @@ -12,8 +12,7 @@ PKG_VERSION:=1.10.1 PKG_RELEASE:=$(AUTORELEASE) PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.gz -PKG_SOURCE_URL:=http://www.us.tcpdump.org/release/ \ - http://www.tcpdump.org/release/ +PKG_SOURCE_URL:=http://www.tcpdump.org/release/ PKG_HASH:=ed285f4accaf05344f90975757b3dbfe772ba41d1c401c2648b7fa45b711bdd4 PKG_MAINTAINER:=Felix Fietkau diff --git a/package/network/services/hostapd/files/wps-hotplug.sh b/package/network/services/hostapd/files/wps-hotplug.sh index d00939d769..073bdd1868 100644 --- a/package/network/services/hostapd/files/wps-hotplug.sh +++ b/package/network/services/hostapd/files/wps-hotplug.sh @@ -38,13 +38,20 @@ wps_catch_credentials() { done } -if [ "$ACTION" = "pressed" -a "$BUTTON" = "wps" ]; then - wps_done=0 - ubusobjs="$( ubus -S list hostapd.* )" - for ubusobj in $ubusobjs; do - ubus -S call $ubusobj wps_start && wps_done=1 - done - [ $wps_done = 0 ] || return 0 +if [ "$ACTION" = "released" ] && [ "$BUTTON" = "wps" ]; then + # If the button was pressed for 3 seconds or more, trigger WPS on + # wpa_supplicant only, no matter if hostapd is running or not. If + # was pressed for less than 3 seconds, try triggering on + # hostapd. If there is no hostapd instance to trigger it on or WPS + # is not enabled on them, trigger it on wpa_supplicant. + if [ "$SEEN" -lt 3 ] ; then + wps_done=0 + ubusobjs="$( ubus -S list hostapd.* )" + for ubusobj in $ubusobjs; do + ubus -S call $ubusobj wps_start && wps_done=1 + done + [ $wps_done = 0 ] || return 0 + fi wps_done=0 ubusobjs="$( ubus -S list wpa_supplicant.* )" for ubusobj in $ubusobjs; do diff --git a/package/network/services/hostapd/src/src/ap/ubus.h b/package/network/services/hostapd/src/src/ap/ubus.h index 899b001dd5..f1bc093e57 100644 --- a/package/network/services/hostapd/src/src/ap/ubus.h +++ b/package/network/services/hostapd/src/src/ap/ubus.h @@ -61,6 +61,9 @@ void hostapd_ubus_notify_bss_transition_response( const u8 *candidate_list, u16 candidate_list_len); void hostapd_ubus_add(struct hapd_interfaces *interfaces); void hostapd_ubus_free(struct hapd_interfaces *interfaces); +int hostapd_ubus_notify_bss_transition_query( + struct hostapd_data *hapd, const u8 *addr, u8 dialog_token, u8 reason, + const u8 *candidate_list, u16 candidate_list_len); #else @@ -125,6 +128,13 @@ static inline void hostapd_ubus_add(struct hapd_interfaces *interfaces) static inline void hostapd_ubus_free(struct hapd_interfaces *interfaces) { } + +static inline int hostapd_ubus_notify_bss_transition_query( + struct hostapd_data *hapd, const u8 *addr, u8 dialog_token, u8 reason, + const u8 *candidate_list, u16 candidate_list_len) +{ + return 0; +} #endif #endif diff --git a/package/network/utils/tcpdump/Makefile b/package/network/utils/tcpdump/Makefile index f333cf98d2..a14fb9a1b7 100644 --- a/package/network/utils/tcpdump/Makefile +++ b/package/network/utils/tcpdump/Makefile @@ -12,8 +12,7 @@ PKG_VERSION:=4.9.3 PKG_RELEASE:=3 PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.gz -PKG_SOURCE_URL:=http://www.us.tcpdump.org/release/ \ - http://www.tcpdump.org/release/ +PKG_SOURCE_URL:=http://www.tcpdump.org/release/ PKG_HASH:=2cd47cb3d460b6ff75f4a9940f594317ad456cfbf2bd2c8e5151e16559db6410 PKG_MAINTAINER:=Felix Fietkau diff --git a/package/network/utils/umbim/files/lib/netifd/proto/mbim.sh b/package/network/utils/umbim/files/lib/netifd/proto/mbim.sh index abbabd6625..3fa411c6c6 100755 --- a/package/network/utils/umbim/files/lib/netifd/proto/mbim.sh +++ b/package/network/utils/umbim/files/lib/netifd/proto/mbim.sh @@ -65,6 +65,8 @@ _proto_mbim_setup() { echo "mbim[$$]" "Reading capabilities" umbim $DBG -n -d $device caps || { echo "mbim[$$]" "Failed to read modem caps" + tid=$((tid + 1)) + umbim $DBG -t $tid -d "$device" disconnect proto_notify_error "$interface" PIN_FAILED return 1 } @@ -74,6 +76,8 @@ _proto_mbim_setup() { echo "mbim[$$]" "Sending pin" umbim $DBG -n -t $tid -d $device unlock "$pincode" || { echo "mbim[$$]" "Unable to verify PIN" + tid=$((tid + 1)) + umbim $DBG -t $tid -d "$device" disconnect proto_notify_error "$interface" PIN_FAILED proto_block_restart "$interface" return 1 @@ -82,8 +86,11 @@ _proto_mbim_setup() { tid=$((tid + 1)) echo "mbim[$$]" "Checking pin" - umbim $DBG -n -t $tid -d $device pinstate || { + umbim $DBG -n -t $tid -d $device pinstate + [ $? -eq 2 ] && { echo "mbim[$$]" "PIN required" + tid=$((tid + 1)) + umbim $DBG -t $tid -d "$device" disconnect proto_notify_error "$interface" PIN_FAILED proto_block_restart "$interface" return 1 @@ -93,6 +100,8 @@ _proto_mbim_setup() { echo "mbim[$$]" "Checking subscriber" umbim $DBG -n -t $tid -d $device subscriber || { echo "mbim[$$]" "Subscriber init failed" + tid=$((tid + 1)) + umbim $DBG -t $tid -d "$device" disconnect proto_notify_error "$interface" NO_SUBSCRIBER return 1 } @@ -101,6 +110,8 @@ _proto_mbim_setup() { echo "mbim[$$]" "Register with network" umbim $DBG -n -t $tid -d $device registration || { echo "mbim[$$]" "Subscriber registration failed" + tid=$((tid + 1)) + umbim $DBG -t $tid -d "$device" disconnect proto_notify_error "$interface" NO_REGISTRATION return 1 } @@ -109,6 +120,8 @@ _proto_mbim_setup() { echo "mbim[$$]" "Attach to network" umbim $DBG -n -t $tid -d $device attach || { echo "mbim[$$]" "Failed to attach to network" + tid=$((tid + 1)) + umbim $DBG -t $tid -d "$device" disconnect proto_notify_error "$interface" ATTACH_FAILED return 1 } @@ -141,6 +154,7 @@ _proto_mbim_setup() { json_add_string proto "dhcpv6" json_add_string extendprefix 1 proto_add_dynamic_defaults + json_close_object ubus call network add_dynamic "$(json_dump)" } @@ -169,7 +183,7 @@ proto_mbim_teardown() { echo "mbim[$$]" "Stopping network" [ -n "$tid" ] && { - umbim $DBG -t$tid -d "$device" disconnect + umbim $DBG -t $tid -d "$device" disconnect uci_revert_state network $interface tid } diff --git a/target/linux/apm821xx/config-5.4 b/target/linux/apm821xx/config-5.4 deleted file mode 100644 index e47186a444..0000000000 --- a/target/linux/apm821xx/config-5.4 +++ /dev/null @@ -1,343 +0,0 @@ -# CONFIG_40x is not set -CONFIG_44x=y -CONFIG_460EX=y -CONFIG_4xx=y -CONFIG_4xx_SOC=y -# CONFIG_ADVANCED_OPTIONS is not set -CONFIG_APM821xx=y -CONFIG_APOLLO3G=y -# CONFIG_ARCHES is not set -CONFIG_ARCH_32BIT_OFF_T=y -CONFIG_ARCH_DMA_ADDR_T_64BIT=y -CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y -CONFIG_ARCH_ENABLE_MEMORY_HOTREMOVE=y -CONFIG_ARCH_HAS_DEBUG_VIRTUAL=y -CONFIG_ARCH_HAS_DMA_COHERENT_TO_PFN=y -CONFIG_ARCH_HAS_DMA_PREP_COHERENT=y -CONFIG_ARCH_HAS_ELF_RANDOMIZE=y -CONFIG_ARCH_HAS_FORTIFY_SOURCE=y -CONFIG_ARCH_HAS_GCOV_PROFILE_ALL=y -CONFIG_ARCH_HAS_KCOV=y -CONFIG_ARCH_HAS_MEMBARRIER_CALLBACKS=y -CONFIG_ARCH_HAS_PHYS_TO_DMA=y -CONFIG_ARCH_HAS_PMEM_API=y -CONFIG_ARCH_HAS_PTE_SPECIAL=y -CONFIG_ARCH_HAS_STRICT_KERNEL_RWX=y -CONFIG_ARCH_HAS_SYNC_DMA_FOR_CPU=y -CONFIG_ARCH_HAS_SYNC_DMA_FOR_DEVICE=y -CONFIG_ARCH_HAS_UACCESS_FLUSHCACHE=y -CONFIG_ARCH_HAVE_NMI_SAFE_CMPXCHG=y -CONFIG_ARCH_HIBERNATION_POSSIBLE=y -CONFIG_ARCH_KEEP_MEMBLOCK=y -CONFIG_ARCH_MAY_HAVE_PC_FDC=y -CONFIG_ARCH_MIGHT_HAVE_PC_PARPORT=y -CONFIG_ARCH_MIGHT_HAVE_PC_SERIO=y -CONFIG_ARCH_MMAP_RND_BITS=11 -CONFIG_ARCH_MMAP_RND_BITS_MAX=17 -CONFIG_ARCH_MMAP_RND_BITS_MIN=11 -CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MAX=17 -CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MIN=11 -CONFIG_ARCH_OPTIONAL_KERNEL_RWX=y -CONFIG_ARCH_SUPPORTS_ATOMIC_RMW=y -CONFIG_ARCH_SUPPORTS_DEBUG_PAGEALLOC=y -CONFIG_ARCH_SUPPORTS_UPROBES=y -CONFIG_ARCH_SUSPEND_POSSIBLE=y -CONFIG_ARCH_USE_BUILTIN_BSWAP=y -CONFIG_ARCH_WANT_IPC_PARSE_VERSION=y -CONFIG_ARCH_WEAK_RELEASE_ACQUIRE=y -CONFIG_AUDIT_ARCH=y -# CONFIG_BAMBOO is not set -# CONFIG_BLK_DEV_INITRD is not set -CONFIG_BLK_MQ_PCI=y -CONFIG_BLK_PM=y -CONFIG_BLUESTONE=y -CONFIG_BOOKE=y -CONFIG_BOOKE_WDT=y -# CONFIG_CANYONLANDS is not set -CONFIG_CC_HAS_KASAN_GENERIC=y -CONFIG_CLONE_BACKWARDS=y -CONFIG_CMDLINE="rootfstype=squashfs noinitrd" -CONFIG_CMDLINE_BOOL=y -CONFIG_COMPAT_32BIT_TIME=y -CONFIG_CPU_BIG_ENDIAN=y -CONFIG_CRC16=y -# CONFIG_CRC32_SARWATE is not set -CONFIG_CRC32_SLICEBY8=y -CONFIG_CRYPTO_ACOMP2=y -CONFIG_CRYPTO_AEAD=y -CONFIG_CRYPTO_AEAD2=y -CONFIG_CRYPTO_AUTHENC=y -CONFIG_CRYPTO_CCM=y -CONFIG_CRYPTO_CFB=y -CONFIG_CRYPTO_CTR=y -CONFIG_CRYPTO_DEFLATE=y -CONFIG_CRYPTO_DEV_PPC4XX=y -CONFIG_CRYPTO_DRBG=y -CONFIG_CRYPTO_DRBG_HMAC=y -CONFIG_CRYPTO_DRBG_MENU=y -CONFIG_CRYPTO_ECB=y -CONFIG_CRYPTO_ESSIV=y -CONFIG_CRYPTO_GCM=y -CONFIG_CRYPTO_GF128MUL=y -CONFIG_CRYPTO_GHASH=y -CONFIG_CRYPTO_HASH=y -CONFIG_CRYPTO_HASH2=y -CONFIG_CRYPTO_HMAC=y -CONFIG_CRYPTO_HW=y -CONFIG_CRYPTO_JITTERENTROPY=y -CONFIG_CRYPTO_LIB_SHA256=y -CONFIG_CRYPTO_LZO=y -CONFIG_CRYPTO_MANAGER=y -CONFIG_CRYPTO_MANAGER2=y -CONFIG_CRYPTO_MD5_PPC=y -CONFIG_CRYPTO_NULL=y -CONFIG_CRYPTO_NULL2=y -CONFIG_CRYPTO_OFB=y -CONFIG_CRYPTO_RNG=y -CONFIG_CRYPTO_RNG2=y -CONFIG_CRYPTO_RNG_DEFAULT=y -CONFIG_CRYPTO_SEQIV=y -CONFIG_CRYPTO_SHA1_PPC=y -CONFIG_CRYPTO_SHA256=y -CONFIG_DATA_SHIFT=12 -CONFIG_DEBUG_MISC=y -CONFIG_DMA_DIRECT_REMAP=y -CONFIG_DMA_REMAP=y -CONFIG_DTC=y -# CONFIG_E200 is not set -CONFIG_EARLY_PRINTK=y -# CONFIG_EBONY is not set -CONFIG_EDAC_ATOMIC_SCRUB=y -CONFIG_EDAC_SUPPORT=y -# CONFIG_EIGER is not set -CONFIG_ETEXT_SHIFT=12 -CONFIG_EXTRA_TARGETS="uImage" -CONFIG_FIXED_PHY=y -CONFIG_FORCE_PCI=y -CONFIG_FREEZER=y -# CONFIG_FSL_LBC is not set -CONFIG_FW_LOADER_PAGED_BUF=y -CONFIG_GCC_PLUGINS=y -# CONFIG_GCC_PLUGIN_CYC_COMPLEXITY is not set -# CONFIG_GCC_PLUGIN_LATENT_ENTROPY is not set -# CONFIG_GCC_PLUGIN_RANDSTRUCT is not set -# CONFIG_GCC_PLUGIN_STRUCTLEAK_BYREF is not set -# CONFIG_GCC_PLUGIN_STRUCTLEAK_BYREF_ALL is not set -# CONFIG_GCC_PLUGIN_STRUCTLEAK_USER is not set -CONFIG_GENERIC_ALLOCATOR=y -CONFIG_GENERIC_ATOMIC64=y -CONFIG_GENERIC_BUG=y -CONFIG_GENERIC_CLOCKEVENTS=y -CONFIG_GENERIC_CMOS_UPDATE=y -CONFIG_GENERIC_CPU=y -CONFIG_GENERIC_CPU_AUTOPROBE=y -CONFIG_GENERIC_IRQ_SHOW=y -CONFIG_GENERIC_IRQ_SHOW_LEVEL=y -CONFIG_GENERIC_ISA_DMA=y -CONFIG_GENERIC_MSI_IRQ=y -CONFIG_GENERIC_PCI_IOMAP=y -CONFIG_GENERIC_SMP_IDLE_THREAD=y -CONFIG_GENERIC_STRNCPY_FROM_USER=y -CONFIG_GENERIC_STRNLEN_USER=y -CONFIG_GENERIC_TIME_VSYSCALL=y -# CONFIG_GEN_RTC is not set -# CONFIG_GLACIER is not set -CONFIG_GPIOLIB=y -CONFIG_GPIO_GENERIC=y -CONFIG_GPIO_GENERIC_PLATFORM=y -CONFIG_HAS_DMA=y -CONFIG_HAS_IOMEM=y -CONFIG_HAS_IOPORT_MAP=y -CONFIG_HAVE_ARCH_AUDITSYSCALL=y -CONFIG_HAVE_ARCH_JUMP_LABEL=y -CONFIG_HAVE_ARCH_KASAN=y -CONFIG_HAVE_ARCH_KGDB=y -CONFIG_HAVE_ARCH_NVRAM_OPS=y -CONFIG_HAVE_ARCH_SECCOMP_FILTER=y -CONFIG_HAVE_ARCH_TRACEHOOK=y -CONFIG_HAVE_ASM_MODVERSIONS=y -CONFIG_HAVE_CBPF_JIT=y -CONFIG_HAVE_COPY_THREAD_TLS=y -CONFIG_HAVE_C_RECORDMCOUNT=y -CONFIG_HAVE_DEBUG_KMEMLEAK=y -CONFIG_HAVE_DEBUG_STACKOVERFLOW=y -CONFIG_HAVE_DYNAMIC_FTRACE=y -CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS=y -CONFIG_HAVE_FAST_GUP=y -CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y -CONFIG_HAVE_FUNCTION_ERROR_INJECTION=y -CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y -CONFIG_HAVE_FUNCTION_TRACER=y -CONFIG_HAVE_IDE=y -CONFIG_HAVE_IOREMAP_PROT=y -CONFIG_HAVE_IRQ_EXIT_ON_IRQ_STACK=y -CONFIG_HAVE_IRQ_TIME_ACCOUNTING=y -CONFIG_HAVE_KPROBES_ON_FTRACE=y -CONFIG_HAVE_LD_DEAD_CODE_DATA_ELIMINATION=y -CONFIG_HAVE_MEMBLOCK_NODE_MAP=y -CONFIG_HAVE_MMU_GATHER_PAGE_SIZE=y -CONFIG_HAVE_MOD_ARCH_SPECIFIC=y -CONFIG_HAVE_NET_DSA=y -CONFIG_HAVE_OPROFILE=y -CONFIG_HAVE_PCI=y -CONFIG_HAVE_PERF_EVENTS=y -CONFIG_HAVE_PERF_REGS=y -CONFIG_HAVE_PERF_USER_STACK_DUMP=y -CONFIG_HAVE_REGS_AND_STACK_ACCESS_API=y -CONFIG_HAVE_RSEQ=y -CONFIG_HAVE_SYSCALL_TRACEPOINTS=y -CONFIG_HAVE_VIRT_CPU_ACCOUNTING=y -CONFIG_HW_RANDOM=y -CONFIG_HW_RANDOM_PPC4XX=y -CONFIG_I2C=y -CONFIG_I2C_BOARDINFO=y -CONFIG_I2C_CHARDEV=y -CONFIG_I2C_IBM_IIC=y -CONFIG_IBM_EMAC=y -CONFIG_IBM_EMAC_EMAC4=y -CONFIG_IBM_EMAC_POLL_WEIGHT=32 -CONFIG_IBM_EMAC_RGMII=y -CONFIG_IBM_EMAC_RXB=128 -CONFIG_IBM_EMAC_RX_COPY_THRESHOLD=256 -CONFIG_IBM_EMAC_TAH=y -CONFIG_IBM_EMAC_TXB=128 -# CONFIG_ICON is not set -CONFIG_ILLEGAL_POINTER_VALUE=0 -CONFIG_IRQCHIP=y -CONFIG_IRQ_DOMAIN=y -CONFIG_IRQ_FORCED_THREADING=y -CONFIG_IRQ_WORK=y -CONFIG_ISA_DMA_API=y -# CONFIG_JFFS2_FS is not set -# CONFIG_KATMAI is not set -CONFIG_KERNEL_START=0xc0000000 -CONFIG_LEDS_TRIGGER_MTD=y -CONFIG_LEDS_TRIGGER_PATTERN=y -CONFIG_LIBFDT=y -CONFIG_LOCK_DEBUGGING_SUPPORT=y -CONFIG_LOWMEM_SIZE=0x30000000 -CONFIG_LZO_COMPRESS=y -CONFIG_LZO_DECOMPRESS=y -# CONFIG_MATH_EMULATION is not set -CONFIG_MDIO_BUS=y -CONFIG_MDIO_DEVICE=y -CONFIG_MEMFD_CREATE=y -CONFIG_MIGRATION=y -CONFIG_MODULES_USE_ELF_RELA=y -CONFIG_MODULE_ALLOW_MISSING_NAMESPACE_IMPORTS=y -CONFIG_MTD_CFI_ADV_OPTIONS=y -# CONFIG_MTD_CFI_GEOMETRY is not set -# CONFIG_MTD_SPLIT_SQUASHFS_ROOT is not set -CONFIG_NEED_DMA_MAP_STATE=y -CONFIG_NEED_PER_CPU_KM=y -CONFIG_NEED_SG_DMA_LENGTH=y -CONFIG_NOT_COHERENT_CACHE=y -CONFIG_NO_HZ=y -CONFIG_NO_HZ_COMMON=y -CONFIG_NO_HZ_IDLE=y -CONFIG_NR_IRQS=512 -CONFIG_NVMEM=y -CONFIG_NVMEM_SYSFS=y -CONFIG_OF=y -CONFIG_OF_ADDRESS=y -CONFIG_OF_EARLY_FLATTREE=y -CONFIG_OF_FLATTREE=y -CONFIG_OF_GPIO=y -CONFIG_OF_IRQ=y -CONFIG_OF_KOBJ=y -CONFIG_OF_MDIO=y -CONFIG_OF_NET=y -CONFIG_OLD_SIGACTION=y -CONFIG_OLD_SIGSUSPEND=y -# CONFIG_OVERLAY_FS_XINO_AUTO is not set -CONFIG_PACKING=y -CONFIG_PAGE_OFFSET=0xc0000000 -CONFIG_PCI=y -CONFIG_PCIEAER=y -CONFIG_PCIEPORTBUS=y -CONFIG_PCIE_PME=y -CONFIG_PCI_DISABLE_COMMON_QUIRKS=y -CONFIG_PCI_DOMAINS=y -CONFIG_PCI_MSI=y -CONFIG_PGTABLE_LEVELS=2 -CONFIG_PHYLIB=y -CONFIG_PHYSICAL_START=0x00000000 -CONFIG_PHYS_64BIT=y -CONFIG_PHYS_ADDR_T_64BIT=y -CONFIG_PM=y -CONFIG_PM_AUTOSLEEP=y -CONFIG_PM_SLEEP=y -CONFIG_PM_WAKELOCKS=y -CONFIG_PM_WAKELOCKS_GC=y -CONFIG_PM_WAKELOCKS_LIMIT=100 -CONFIG_PPC=y -CONFIG_PPC32=y -CONFIG_PPC44x_SIMPLE=y -CONFIG_PPC4xx_CPM=y -CONFIG_PPC4xx_GPIO=y -CONFIG_PPC4xx_MSI=y -CONFIG_PPC4xx_PCI_EXPRESS=y -# CONFIG_PPC64 is not set -# CONFIG_PPC_47x is not set -# CONFIG_PPC_85xx is not set -# CONFIG_PPC_8xx is not set -CONFIG_PPC_ADV_DEBUG_DACS=2 -CONFIG_PPC_ADV_DEBUG_DAC_RANGE=y -CONFIG_PPC_ADV_DEBUG_DVCS=2 -CONFIG_PPC_ADV_DEBUG_IACS=4 -CONFIG_PPC_ADV_DEBUG_REGS=y -# CONFIG_PPC_BOOK3S_601 is not set -# CONFIG_PPC_BOOK3S_6xx is not set -CONFIG_PPC_DCR=y -CONFIG_PPC_DCR_NATIVE=y -# CONFIG_PPC_EARLY_DEBUG is not set -CONFIG_PPC_FPU=y -CONFIG_PPC_INDIRECT_PCI=y -# CONFIG_PPC_IRQ_SOFT_MASK_DEBUG is not set -CONFIG_PPC_MMU_NOHASH=y -CONFIG_PPC_MMU_NOHASH_32=y -CONFIG_PPC_MSI_BITMAP=y -CONFIG_PPC_PAGE_SHIFT=12 -# CONFIG_PPC_PTDUMP is not set -CONFIG_PPC_UDBG_16550=y -CONFIG_PPC_WERROR=y -CONFIG_PTE_64BIT=y -# CONFIG_RAINIER is not set -CONFIG_RAS=y -CONFIG_REGULATOR=y -CONFIG_RSEQ=y -# CONFIG_SAM440EP is not set -# CONFIG_SCOM_DEBUGFS is not set -# CONFIG_SEQUOIA is not set -CONFIG_SERIAL_8250_EXTENDED=y -CONFIG_SERIAL_8250_FSL=y -CONFIG_SERIAL_8250_SHARE_IRQ=y -CONFIG_SERIAL_MCTRL_GPIO=y -CONFIG_SERIAL_OF_PLATFORM=y -CONFIG_SGL_ALLOC=y -CONFIG_SIMPLE_GPIO=y -CONFIG_SPARSE_IRQ=y -CONFIG_SRCU=y -CONFIG_SUSPEND=y -CONFIG_SUSPEND_FREEZER=y -CONFIG_SWPHY=y -CONFIG_SYSCTL_EXCEPTION_TRACE=y -# CONFIG_TAISHAN is not set -CONFIG_TASK_SIZE=0xc0000000 -CONFIG_THREAD_INFO_IN_TASK=y -CONFIG_THREAD_SHIFT=13 -CONFIG_TICK_CPU_ACCOUNTING=y -CONFIG_TINY_SRCU=y -CONFIG_USB_SUPPORT=y -CONFIG_VDSO32=y -# CONFIG_VIRTIO_MENU is not set -# CONFIG_VIRT_CPU_ACCOUNTING_NATIVE is not set -# CONFIG_WARP is not set -CONFIG_WATCHDOG_CORE=y -# CONFIG_XILINX_SYSACE is not set -# CONFIG_XILINX_VIRTEX440_GENERIC_BOARD is not set -CONFIG_XZ_DEC_BCJ=y -CONFIG_XZ_DEC_POWERPC=y -# CONFIG_YOSEMITE is not set -CONFIG_ZLIB_DEFLATE=y -CONFIG_ZLIB_INFLATE=y diff --git a/target/linux/apm821xx/dts/apm82181.dtsi b/target/linux/apm821xx/dts/apm82181.dtsi index 6bab8c41fc..f7c4c65401 100644 --- a/target/linux/apm821xx/dts/apm82181.dtsi +++ b/target/linux/apm821xx/dts/apm82181.dtsi @@ -421,31 +421,6 @@ #size-cells = <0>; }; - MSI: ppc4xx-msi@c10000000 { - compatible = "amcc,ppc4xx-msi", "ppc4xx-msi"; - reg = <0xc 0x10000000 0x100 - 0xc 0x10000000 0x100>; - sdr-base = <0x36C>; - msi-data = <0x00004440>; - msi-mask = <0x0000ffe0>; - interrupts =<0 1 2 3 4 5 6 7>; - interrupt-parent = <&MSI>; - #interrupt-cells = <1>; - #address-cells = <0>; - #size-cells = <0>; - msi-available-ranges = <0x0 0x100>; - interrupt-map = - <0 &UIC3 0x18 IRQ_TYPE_EDGE_RISING>, - <1 &UIC3 0x19 IRQ_TYPE_EDGE_RISING>, - <2 &UIC3 0x1a IRQ_TYPE_EDGE_RISING>, - <3 &UIC3 0x1b IRQ_TYPE_EDGE_RISING>, - <4 &UIC3 0x1c IRQ_TYPE_EDGE_RISING>, - <5 &UIC3 0x1d IRQ_TYPE_EDGE_RISING>, - <6 &UIC3 0x1e IRQ_TYPE_EDGE_RISING>, - <7 &UIC3 0x1f IRQ_TYPE_EDGE_RISING>; - status = "disabled"; - }; - PCIE0: pciex@d00000000 { device_type = "pci"; /* see ppc4xx_pci_find_bridge */ #interrupt-cells = <1>; diff --git a/target/linux/apm821xx/dts/meraki-mr24.dts b/target/linux/apm821xx/dts/meraki-mr24.dts index e20d4f1fa9..a876e77511 100644 --- a/target/linux/apm821xx/dts/meraki-mr24.dts +++ b/target/linux/apm821xx/dts/meraki-mr24.dts @@ -244,7 +244,3 @@ }; }; }; - -&MSI { - status = "okay"; -}; diff --git a/target/linux/apm821xx/dts/meraki-mx60.dts b/target/linux/apm821xx/dts/meraki-mx60.dts index 06dfa07965..05274e9d42 100644 --- a/target/linux/apm821xx/dts/meraki-mx60.dts +++ b/target/linux/apm821xx/dts/meraki-mx60.dts @@ -205,7 +205,3 @@ }; }; }; - -&MSI { - status = "okay"; -}; diff --git a/target/linux/apm821xx/dts/netgear-wndap6x0.dtsi b/target/linux/apm821xx/dts/netgear-wndap6x0.dtsi index 910817e5ed..c18c73d956 100644 --- a/target/linux/apm821xx/dts/netgear-wndap6x0.dtsi +++ b/target/linux/apm821xx/dts/netgear-wndap6x0.dtsi @@ -207,10 +207,6 @@ status = "okay"; }; -&MSI { - status = "okay"; -}; - &IIC0 { status = "okay"; diff --git a/target/linux/apm821xx/dts/netgear-wndr4700.dts b/target/linux/apm821xx/dts/netgear-wndr4700.dts index 286eba203b..2e98a53292 100644 --- a/target/linux/apm821xx/dts/netgear-wndr4700.dts +++ b/target/linux/apm821xx/dts/netgear-wndr4700.dts @@ -177,24 +177,13 @@ nand { nand-is-boot-medium; - partition0,0@0 { - label = "NAND 128MiB 3,3V 8-bit"; - reg = <0x00000000 0x08000000>; - read-only; - }; - - partition0,1@0 { + partition@0 { label = "uboot"; reg = <0x00000000 0x00180000>; read-only; }; - partition0,2@180000 { - label = "device-tree"; - reg = <0x00180000 0x00020000>; - }; - - partition0,3@180000 { + partition@180000 { label = "kernel"; reg = <0x00180000 0x00380000>; /* @@ -208,52 +197,54 @@ */ }; - partition0,4@500000 { + partition@500000 { label = "ubi"; reg = <0x00500000 0x014e0000>; }; - partition0,5@19e0000 { + + /* + * Netgear's u-boot in the fw_recovery mode (can be + * triggered by holding the reset button, or if + * "bootm" fails) will not flash past this point + * (= 0x19E0000). + */ + + partition@19e0000 { label = "config"; reg = <0x019e0000 0x00080000>; read-only; }; - partition0,6@1a60000 { + partition@1a60000 { label = "pot"; reg = <0x01a60000 0x00080000>; read-only; }; - partition0,7@1ae0000 { + partition@1ae0000 { label = "traffic_meter"; reg = <0x01ae0000 0x00300000>; read-only; }; - partition0,8@1de0000 { + partition@1de0000 { label = "language"; reg = <0x01de0000 0x001c0000>; read-only; }; - partition0,9@1fa0000 { + partition@1fa0000 { label = "ecos"; reg = <0x01fa0000 0x06020000>; read-only; }; - partition0,10@7fc0000 { + partition@7fc0000 { label = "wifi_data"; reg = <0x07fc0000 0x00040000>; read-only; }; - - partition0,11@180000 { - label = "firmware"; - reg = <0x00180000 0x01860000>; - read-only; - }; }; }; }; @@ -523,7 +514,3 @@ }; }; }; - -&MSI { - status = "okay"; -}; diff --git a/target/linux/apm821xx/dts/wd-mybooklive.dts b/target/linux/apm821xx/dts/wd-mybooklive.dts index c96e7f75e9..2cc4dd8b79 100644 --- a/target/linux/apm821xx/dts/wd-mybooklive.dts +++ b/target/linux/apm821xx/dts/wd-mybooklive.dts @@ -123,9 +123,11 @@ usbpwr: usb-regulator { compatible = "regulator-fixed"; regulator-name = "Power USB Core"; - gpios = <&GPIO1 2 GPIO_ACTIVE_LOW>; + gpios = <&GPIO1 2 GPIO_ACTIVE_HIGH>; regulator-min-microvolt = <5000000>; regulator-max-microvolt = <5000000>; + regulator-boot-on; /* uboot sets this */ + enable-active-high; }; sata1pwr: sata1-regulator { diff --git a/target/linux/apm821xx/patches-5.10/100-dwc2-disable-powerdown.patch b/target/linux/apm821xx/patches-5.10/100-dwc2-disable-powerdown.patch new file mode 100644 index 0000000000..ede7d732ff --- /dev/null +++ b/target/linux/apm821xx/patches-5.10/100-dwc2-disable-powerdown.patch @@ -0,0 +1,29 @@ +From 88ca61467a0897c79b1fbf8f5c30691b43b52613 Mon Sep 17 00:00:00 2001 +From: Christian Lamparter +Date: Sun, 26 Dec 2021 22:36:29 +0200 +Subject: [PATCH] dwc2: temporary force to be powered up all times + +the APM821xx's onchip dwc2 misbehaves with 5.4 and 5.10 +when a USB device gets connected. Instead of announcing +and setting up the USB devices it crashes and burns with: + +[ 22.023476] dwc2 4bff80000.usbotg: dwc2_restore_global_registers: no global registers to restore +[ 22.032245] dwc2 4bff80000.usbotg: dwc2_exit_partial_power_down: failed to restore registers +[ 22.040647] dwc2 4bff80000.usbotg: exit partial_power_down failed +[ 22.058765] dwc2 4bff80000.usbotg: HC died; cleaning up + +This is all seemingly fixed with dwc2 from a 5.16-rc6. + +Signed-off-by: Christian Lamparter +--- + +--- a/drivers/usb/dwc2/params.c ++++ b/drivers/usb/dwc2/params.c +@@ -137,6 +137,7 @@ static void dwc2_set_amcc_params(struct + struct dwc2_core_params *p = &hsotg->params; + + p->ahbcfg = GAHBCFG_HBSTLEN_INCR16 << GAHBCFG_HBSTLEN_SHIFT; ++ p->power_down = DWC2_POWER_DOWN_PARAM_NONE; + } + + static void dwc2_set_stm32f4x9_fsotg_params(struct dwc2_hsotg *hsotg) diff --git a/target/linux/apm821xx/patches-5.10/802-usb-xhci-force-msi-renesas-xhci.patch b/target/linux/apm821xx/patches-5.10/802-usb-xhci-force-msi-renesas-xhci.patch index 1d7fe48489..daaf46bc5f 100644 --- a/target/linux/apm821xx/patches-5.10/802-usb-xhci-force-msi-renesas-xhci.patch +++ b/target/linux/apm821xx/patches-5.10/802-usb-xhci-force-msi-renesas-xhci.patch @@ -13,7 +13,7 @@ produce a noisy warning. --- a/drivers/usb/host/xhci-pci.c +++ b/drivers/usb/host/xhci-pci.c -@@ -274,6 +274,7 @@ static void xhci_pci_quirks(struct devic +@@ -276,6 +276,7 @@ static void xhci_pci_quirks(struct devic pdev->device == 0x0015) { xhci->quirks |= XHCI_RESET_ON_RESUME; xhci->quirks |= XHCI_ZERO_64B_REGS; diff --git a/target/linux/apm821xx/patches-5.4/111-crypto-crypto4xx-reduce-memory-fragmentation.patch b/target/linux/apm821xx/patches-5.4/111-crypto-crypto4xx-reduce-memory-fragmentation.patch deleted file mode 100644 index 4d23b8816a..0000000000 --- a/target/linux/apm821xx/patches-5.4/111-crypto-crypto4xx-reduce-memory-fragmentation.patch +++ /dev/null @@ -1,99 +0,0 @@ -From 3913dbe4b3256ead342572f7aba726a60ab5fd43 Mon Sep 17 00:00:00 2001 -Message-Id: <3913dbe4b3256ead342572f7aba726a60ab5fd43.1577917078.git.chunkeey@gmail.com> -From: Christian Lamparter -Date: Wed, 1 Jan 2020 22:28:28 +0100 -Subject: [PATCH 1/2] crypto: crypto4xx - reduce memory fragmentation -To: linux-crypto@vger.kernel.org -Cc: Herbert Xu - -With recent kernels (>5.2), the driver fails to probe, as the -allocation of the driver's scatter buffer fails with -ENOMEM. - -This happens in crypto4xx_build_sdr(). Where the driver tries -to get 512KiB (=PPC4XX_SD_BUFFER_SIZE * PPC4XX_NUM_SD) of -continuous memory. This big chunk is by design, since the driver -uses this circumstance in the crypto4xx_copy_pkt_to_dst() to -its advantage: -"all scatter-buffers are all neatly organized in one big -continuous ringbuffer; So scatterwalk_map_and_copy() can be -instructed to copy a range of buffers in one go." - -The PowerPC arch does not have support for DMA_CMA. Hence, -this patch reorganizes the order in which the memory -allocations are done. Since the driver itself is responsible -for some of the issues. - -Signed-off-by: Christian Lamparter ---- - drivers/crypto/amcc/crypto4xx_core.c | 27 +++++++++++++-------------- - 1 file changed, 13 insertions(+), 14 deletions(-) - ---- a/drivers/crypto/amcc/crypto4xx_core.c -+++ b/drivers/crypto/amcc/crypto4xx_core.c -@@ -286,7 +286,8 @@ static u32 crypto4xx_build_gdr(struct cr - - static inline void crypto4xx_destroy_gdr(struct crypto4xx_device *dev) - { -- dma_free_coherent(dev->core_dev->device, -+ if (dev->gdr) -+ dma_free_coherent(dev->core_dev->device, - sizeof(struct ce_gd) * PPC4XX_NUM_GD, - dev->gdr, dev->gdr_pa); - } -@@ -354,13 +355,6 @@ static u32 crypto4xx_build_sdr(struct cr - { - int i; - -- /* alloc memory for scatter descriptor ring */ -- dev->sdr = dma_alloc_coherent(dev->core_dev->device, -- sizeof(struct ce_sd) * PPC4XX_NUM_SD, -- &dev->sdr_pa, GFP_ATOMIC); -- if (!dev->sdr) -- return -ENOMEM; -- - dev->scatter_buffer_va = - dma_alloc_coherent(dev->core_dev->device, - PPC4XX_SD_BUFFER_SIZE * PPC4XX_NUM_SD, -@@ -368,6 +362,13 @@ static u32 crypto4xx_build_sdr(struct cr - if (!dev->scatter_buffer_va) - return -ENOMEM; - -+ /* alloc memory for scatter descriptor ring */ -+ dev->sdr = dma_alloc_coherent(dev->core_dev->device, -+ sizeof(struct ce_sd) * PPC4XX_NUM_SD, -+ &dev->sdr_pa, GFP_ATOMIC); -+ if (!dev->sdr) -+ return -ENOMEM; -+ - for (i = 0; i < PPC4XX_NUM_SD; i++) { - dev->sdr[i].ptr = dev->scatter_buffer_pa + - PPC4XX_SD_BUFFER_SIZE * i; -@@ -1439,16 +1440,15 @@ static int crypto4xx_probe(struct platfo - spin_lock_init(&core_dev->lock); - INIT_LIST_HEAD(&core_dev->dev->alg_list); - ratelimit_default_init(&core_dev->dev->aead_ratelimit); -+ rc = crypto4xx_build_sdr(core_dev->dev); -+ if (rc) -+ goto err_build_sdr; - rc = crypto4xx_build_pdr(core_dev->dev); - if (rc) -- goto err_build_pdr; -+ goto err_build_sdr; - - rc = crypto4xx_build_gdr(core_dev->dev); - if (rc) -- goto err_build_pdr; -- -- rc = crypto4xx_build_sdr(core_dev->dev); -- if (rc) - goto err_build_sdr; - - /* Init tasklet for bottom half processing */ -@@ -1493,7 +1493,6 @@ err_iomap: - err_build_sdr: - crypto4xx_destroy_sdr(core_dev->dev); - crypto4xx_destroy_gdr(core_dev->dev); --err_build_pdr: - crypto4xx_destroy_pdr(core_dev->dev); - kfree(core_dev->dev); - err_alloc_dev: diff --git a/target/linux/apm821xx/patches-5.4/112-crypto-crypto4xx-use-GFP_KERNEL-for-big-allocations.patch b/target/linux/apm821xx/patches-5.4/112-crypto-crypto4xx-use-GFP_KERNEL-for-big-allocations.patch deleted file mode 100644 index 6668c3a91d..0000000000 --- a/target/linux/apm821xx/patches-5.4/112-crypto-crypto4xx-use-GFP_KERNEL-for-big-allocations.patch +++ /dev/null @@ -1,72 +0,0 @@ -From 5bacaaea8a228bc46f402595b1694ef9128f3599 Mon Sep 17 00:00:00 2001 -Message-Id: <5bacaaea8a228bc46f402595b1694ef9128f3599.1577917078.git.chunkeey@gmail.com> -In-Reply-To: <3913dbe4b3256ead342572f7aba726a60ab5fd43.1577917078.git.chunkeey@gmail.com> -References: <3913dbe4b3256ead342572f7aba726a60ab5fd43.1577917078.git.chunkeey@gmail.com> -From: Christian Lamparter -Date: Wed, 1 Jan 2020 22:54:54 +0100 -Subject: [PATCH 2/2] crypto: crypto4xx - use GFP_KERNEL for big allocations -To: linux-crypto@vger.kernel.org -Cc: Herbert Xu - -The driver should use GFP_KERNEL for the bigger allocation -during the driver's crypto4xx_probe() and not GFP_ATOMIC in -my opinion. - -Signed-off-by: Christian Lamparter ---- - drivers/crypto/amcc/crypto4xx_core.c | 12 ++++++------ - 1 file changed, 6 insertions(+), 6 deletions(-) - ---- a/drivers/crypto/amcc/crypto4xx_core.c -+++ b/drivers/crypto/amcc/crypto4xx_core.c -@@ -169,7 +169,7 @@ static u32 crypto4xx_build_pdr(struct cr - int i; - dev->pdr = dma_alloc_coherent(dev->core_dev->device, - sizeof(struct ce_pd) * PPC4XX_NUM_PD, -- &dev->pdr_pa, GFP_ATOMIC); -+ &dev->pdr_pa, GFP_KERNEL); - if (!dev->pdr) - return -ENOMEM; - -@@ -185,13 +185,13 @@ static u32 crypto4xx_build_pdr(struct cr - dev->shadow_sa_pool = dma_alloc_coherent(dev->core_dev->device, - sizeof(union shadow_sa_buf) * PPC4XX_NUM_PD, - &dev->shadow_sa_pool_pa, -- GFP_ATOMIC); -+ GFP_KERNEL); - if (!dev->shadow_sa_pool) - return -ENOMEM; - - dev->shadow_sr_pool = dma_alloc_coherent(dev->core_dev->device, - sizeof(struct sa_state_record) * PPC4XX_NUM_PD, -- &dev->shadow_sr_pool_pa, GFP_ATOMIC); -+ &dev->shadow_sr_pool_pa, GFP_KERNEL); - if (!dev->shadow_sr_pool) - return -ENOMEM; - for (i = 0; i < PPC4XX_NUM_PD; i++) { -@@ -277,7 +277,7 @@ static u32 crypto4xx_build_gdr(struct cr - { - dev->gdr = dma_alloc_coherent(dev->core_dev->device, - sizeof(struct ce_gd) * PPC4XX_NUM_GD, -- &dev->gdr_pa, GFP_ATOMIC); -+ &dev->gdr_pa, GFP_KERNEL); - if (!dev->gdr) - return -ENOMEM; - -@@ -358,14 +358,14 @@ static u32 crypto4xx_build_sdr(struct cr - dev->scatter_buffer_va = - dma_alloc_coherent(dev->core_dev->device, - PPC4XX_SD_BUFFER_SIZE * PPC4XX_NUM_SD, -- &dev->scatter_buffer_pa, GFP_ATOMIC); -+ &dev->scatter_buffer_pa, GFP_KERNEL); - if (!dev->scatter_buffer_va) - return -ENOMEM; - - /* alloc memory for scatter descriptor ring */ - dev->sdr = dma_alloc_coherent(dev->core_dev->device, - sizeof(struct ce_sd) * PPC4XX_NUM_SD, -- &dev->sdr_pa, GFP_ATOMIC); -+ &dev->sdr_pa, GFP_KERNEL); - if (!dev->sdr) - return -ENOMEM; - diff --git a/target/linux/apm821xx/patches-5.4/201-add-amcc-apollo3g-support.patch b/target/linux/apm821xx/patches-5.4/201-add-amcc-apollo3g-support.patch deleted file mode 100644 index e188954094..0000000000 --- a/target/linux/apm821xx/patches-5.4/201-add-amcc-apollo3g-support.patch +++ /dev/null @@ -1,30 +0,0 @@ ---- a/arch/powerpc/platforms/44x/Kconfig -+++ b/arch/powerpc/platforms/44x/Kconfig -@@ -121,6 +121,17 @@ config CANYONLANDS - help - This option enables support for the AMCC PPC460EX evaluation board. - -+config APOLLO3G -+ bool "Apollo3G" -+ depends on 44x -+ default n -+ select PPC44x_SIMPLE -+ select APM821xx -+ select IBM_EMAC_RGMII -+ select 460EX -+ help -+ This option enables support for the AMCC Apollo 3G board. -+ - config GLACIER - bool "Glacier" - depends on 44x ---- a/arch/powerpc/platforms/44x/ppc44x_simple.c -+++ b/arch/powerpc/platforms/44x/ppc44x_simple.c -@@ -47,6 +47,7 @@ machine_device_initcall(ppc44x_simple, p - * board.c file for it rather than adding it to this list. - */ - static char *board[] __initdata = { -+ "amcc,apollo3g", - "amcc,arches", - "amcc,bamboo", - "apm,bluestone", diff --git a/target/linux/apm821xx/patches-5.4/300-fix-atheros-nics-on-apm82181.patch b/target/linux/apm821xx/patches-5.4/300-fix-atheros-nics-on-apm82181.patch deleted file mode 100644 index 110726d258..0000000000 --- a/target/linux/apm821xx/patches-5.4/300-fix-atheros-nics-on-apm82181.patch +++ /dev/null @@ -1,51 +0,0 @@ ---- a/arch/powerpc/platforms/4xx/pci.c -+++ b/arch/powerpc/platforms/4xx/pci.c -@@ -1060,15 +1060,24 @@ static int __init apm821xx_pciex_init_po - u32 val; - - /* -- * Do a software reset on PCIe ports. -- * This code is to fix the issue that pci drivers doesn't re-assign -- * bus number for PCIE devices after Uboot -- * scanned and configured all the buses (eg. PCIE NIC IntelPro/1000 -- * PT quad port, SAS LSI 1064E) -+ * Only reset the PHY when no link is currently established. -+ * This is for the Atheros PCIe board which has problems to establish -+ * the link (again) after this PHY reset. All other currently tested -+ * PCIe boards don't show this problem. - */ -- -- mtdcri(SDR0, PESDR0_460EX_PHY_CTL_RST, 0x0); -- mdelay(10); -+ val = mfdcri(SDR0, port->sdr_base + PESDRn_LOOP); -+ if (!(val & 0x00001000)) { -+ /* -+ * Do a software reset on PCIe ports. -+ * This code is to fix the issue that pci drivers doesn't re-assign -+ * bus number for PCIE devices after Uboot -+ * scanned and configured all the buses (eg. PCIE NIC IntelPro/1000 -+ * PT quad port, SAS LSI 1064E) -+ */ -+ -+ mtdcri(SDR0, PESDR0_460EX_PHY_CTL_RST, 0x0); -+ mdelay(10); -+ } - - if (port->endpoint) - val = PTYPE_LEGACY_ENDPOINT << 20; -@@ -1085,9 +1094,12 @@ static int __init apm821xx_pciex_init_po - mtdcri(SDR0, PESDR0_460EX_L0DRV, 0x00000130); - mtdcri(SDR0, PESDR0_460EX_L0CLK, 0x00000006); - -- mtdcri(SDR0, PESDR0_460EX_PHY_CTL_RST, 0x10000000); -- mdelay(50); -- mtdcri(SDR0, PESDR0_460EX_PHY_CTL_RST, 0x30000000); -+ val = mfdcri(SDR0, port->sdr_base + PESDRn_LOOP); -+ if (!(val & 0x00001000)) { -+ mtdcri(SDR0, PESDR0_460EX_PHY_CTL_RST, 0x10000000); -+ mdelay(50); -+ mtdcri(SDR0, PESDR0_460EX_PHY_CTL_RST, 0x30000000); -+ } - - mtdcri(SDR0, port->sdr_base + PESDRn_RCSSET, - mfdcri(SDR0, port->sdr_base + PESDRn_RCSSET) | diff --git a/target/linux/apm821xx/patches-5.4/301-fix-memory-map-wndr4700.patch b/target/linux/apm821xx/patches-5.4/301-fix-memory-map-wndr4700.patch deleted file mode 100644 index 452d97e85a..0000000000 --- a/target/linux/apm821xx/patches-5.4/301-fix-memory-map-wndr4700.patch +++ /dev/null @@ -1,14 +0,0 @@ ---- a/arch/powerpc/platforms/4xx/pci.c -+++ b/arch/powerpc/platforms/4xx/pci.c -@@ -1902,9 +1902,9 @@ static void __init ppc4xx_configure_pcie - * if it works - */ - out_le32(mbase + PECFG_PIM0LAL, 0x00000000); -- out_le32(mbase + PECFG_PIM0LAH, 0x00000000); -+ out_le32(mbase + PECFG_PIM0LAH, 0x00000008); - out_le32(mbase + PECFG_PIM1LAL, 0x00000000); -- out_le32(mbase + PECFG_PIM1LAH, 0x00000000); -+ out_le32(mbase + PECFG_PIM1LAH, 0x0000000c); - out_le32(mbase + PECFG_PIM01SAH, 0xffff0000); - out_le32(mbase + PECFG_PIM01SAL, 0x00000000); - diff --git a/target/linux/apm821xx/patches-5.4/801-usb-xhci-add-firmware-loader-for-uPD720201-and-uPD72.patch b/target/linux/apm821xx/patches-5.4/801-usb-xhci-add-firmware-loader-for-uPD720201-and-uPD72.patch deleted file mode 100644 index b85f62e680..0000000000 --- a/target/linux/apm821xx/patches-5.4/801-usb-xhci-add-firmware-loader-for-uPD720201-and-uPD72.patch +++ /dev/null @@ -1,1026 +0,0 @@ -Subject: [PATCH v2 1/5] usb: xhci: add firmware loader for uPD720201 and uPD720202 w/o ROM -Date: Fri, 21 Jun 2019 14:29:09 +0530 -Message-Id: <20190621085913.8722-2-vkoul@kernel.org> -From: Christian Lamparter - -This patch adds a firmware loader for the uPD720201K8-711-BAC-A -and uPD720202K8-711-BAA-A variant. Both of these chips are listed -in Renesas' R19UH0078EJ0500 Rev.5.00 "User's Manual: Hardware" as -devices which need the firmware loader on page 2 in order to -work as they "do not support the External ROM". - -The "Firmware Download Sequence" is describe in chapter -"7.1 FW Download Interface" R19UH0078EJ0500 Rev.5.00 page 131. - -The firmware "K2013080.mem" is available from a USB3.0 Host to -PCIe Adapter (PP2U-E card) "Firmware download" archive. An -alternative version can be sourced from Netgear's WNDR4700 GPL -archives. - -The release notes of the PP2U-E's "Firmware Download" ver 2.0.1.3 -(2012-06-15) state that the firmware is for the following devices: - - uPD720201 ES 2.0 sample whose revision ID is 2. - - uPD720201 ES 2.1 sample & CS sample & Mass product, ID is 3. - - uPD720202 ES 2.0 sample & CS sample & Mass product, ID is 2. - -Cc: Yoshihiro Shimoda -Signed-off-by: Christian Lamparter -Signed-off-by: Bjorn Andersson -[vkoul: fixed comments: - used macros for timeout count and delay - removed renesas_fw_alive_check - cleaned renesas_fw_callback - removed recurion for renesas_fw_download - added MODULE_FIRMWARE] -Signed-off-by: Vinod Koul ---- - drivers/usb/host/xhci-pci.c | 458 ++++++++++++++++++++++++++++++++++++ - 1 file changed, 458 insertions(+) - ---- a/drivers/usb/host/xhci-pci.c -+++ b/drivers/usb/host/xhci-pci.c -@@ -12,6 +12,8 @@ - #include - #include - #include -+#include -+#include - - #include "xhci.h" - #include "xhci-trace.h" -@@ -72,6 +74,44 @@ - #define PCI_DEVICE_ID_ASMEDIA_2142_XHCI 0x2142 - #define PCI_DEVICE_ID_ASMEDIA_3242_XHCI 0x3242 - -+#define RENESAS_FW_VERSION 0x6C -+#define RENESAS_ROM_CONFIG 0xF0 -+#define RENESAS_FW_STATUS 0xF4 -+#define RENESAS_FW_STATUS_MSB 0xF5 -+#define RENESAS_ROM_STATUS 0xF6 -+#define RENESAS_ROM_STATUS_MSB 0xF7 -+#define RENESAS_DATA0 0xF8 -+#define RENESAS_DATA1 0xFC -+ -+#define RENESAS_FW_VERSION_FIELD GENMASK(23, 7) -+#define RENESAS_FW_VERSION_OFFSET 8 -+ -+#define RENESAS_FW_STATUS_DOWNLOAD_ENABLE BIT(0) -+#define RENESAS_FW_STATUS_LOCK BIT(1) -+#define RENESAS_FW_STATUS_RESULT GENMASK(6, 4) -+ #define RENESAS_FW_STATUS_INVALID 0 -+ #define RENESAS_FW_STATUS_SUCCESS BIT(4) -+ #define RENESAS_FW_STATUS_ERROR BIT(5) -+#define RENESAS_FW_STATUS_SET_DATA0 BIT(8) -+#define RENESAS_FW_STATUS_SET_DATA1 BIT(9) -+ -+#define RENESAS_ROM_STATUS_ACCESS BIT(0) -+#define RENESAS_ROM_STATUS_ERASE BIT(1) -+#define RENESAS_ROM_STATUS_RELOAD BIT(2) -+#define RENESAS_ROM_STATUS_RESULT GENMASK(6, 4) -+ #define RENESAS_ROM_STATUS_INVALID 0 -+ #define RENESAS_ROM_STATUS_SUCCESS BIT(4) -+ #define RENESAS_ROM_STATUS_ERROR BIT(5) -+#define RENESAS_ROM_STATUS_SET_DATA0 BIT(8) -+#define RENESAS_ROM_STATUS_SET_DATA1 BIT(9) -+#define RENESAS_ROM_STATUS_ROM_EXISTS BIT(15) -+ -+#define RENESAS_ROM_ERASE_MAGIC 0x5A65726F -+#define RENESAS_ROM_WRITE_MAGIC 0x53524F4D -+ -+#define RENESAS_RETRY 1000 -+#define RENESAS_DELAY 10 -+ - static const char hcd_name[] = "xhci_hcd"; - - static struct hc_driver __read_mostly xhci_pci_hc_driver; -@@ -327,6 +367,873 @@ static void xhci_pme_acpi_rtd3_enable(st - static void xhci_pme_acpi_rtd3_enable(struct pci_dev *dev) { } - #endif /* CONFIG_ACPI */ - -+static const struct renesas_fw_entry { -+ const char *firmware_name; -+ u16 device; -+ u8 revision; -+ u16 expected_version; -+} renesas_fw_table[] = { -+ /* -+ * Only the uPD720201K8-711-BAC-A or uPD720202K8-711-BAA-A -+ * are listed in R19UH0078EJ0500 Rev.5.00 as devices which -+ * need the software loader. -+ * -+ * PP2U/ReleaseNote_USB3-201-202-FW.txt: -+ * -+ * Note: This firmware is for the following devices. -+ * - uPD720201 ES 2.0 sample whose revision ID is 2. -+ * - uPD720201 ES 2.1 sample & CS sample & Mass product, ID is 3. -+ * - uPD720202 ES 2.0 sample & CS sample & Mass product, ID is 2. -+ * -+ * Entry expected_version should be kept in increasing order for a -+ * chip, so that driver will pick first version and if that fails -+ * then next one will be picked -+ */ -+ { "K2013080.mem", 0x0014, 0x02, 0x2013 }, -+ { "K2013080.mem", 0x0014, 0x03, 0x2013 }, -+ { "K2026090.mem", 0x0014, 0x03, 0x2026 }, -+ { "K2013080.mem", 0x0015, 0x02, 0x2013 }, -+ { "K2026090.mem", 0x0015, 0x02, 0x2026 }, -+}; -+ -+MODULE_FIRMWARE("K2013080.mem"); -+MODULE_FIRMWARE("K2026090.mem"); -+ -+static const struct renesas_fw_entry *renesas_needs_fw_dl(struct pci_dev *dev) -+{ -+ const struct renesas_fw_entry *entry; -+ size_t i; -+ -+ /* This loader will only work with a RENESAS device. */ -+ if (!(dev->vendor == PCI_VENDOR_ID_RENESAS)) -+ return NULL; -+ -+ for (i = 0; i < ARRAY_SIZE(renesas_fw_table); i++) { -+ entry = &renesas_fw_table[i]; -+ if (entry->device == dev->device && -+ entry->revision == dev->revision) -+ return entry; -+ } -+ -+ return NULL; -+} -+ -+static const struct -+renesas_fw_entry *renesas_get_next_entry(struct pci_dev *dev, -+ const struct renesas_fw_entry *entry) -+{ -+ const struct renesas_fw_entry *next_entry; -+ size_t i; -+ -+ for (i = 0; i < ARRAY_SIZE(renesas_fw_table); i++) { -+ next_entry = &renesas_fw_table[i]; -+ if (next_entry->device == dev->device && -+ next_entry->revision == dev->revision && -+ next_entry->expected_version > entry->expected_version) -+ return next_entry; -+ } -+ -+ return NULL; -+} -+ -+static int renesas_fw_download_image(struct pci_dev *dev, -+ const u32 *fw, -+ size_t step) -+{ -+ size_t i; -+ int err; -+ u8 fw_status; -+ bool data0_or_data1; -+ -+ /* -+ * The hardware does alternate between two 32-bit pages. -+ * (This is because each row of the firmware is 8 bytes). -+ * -+ * for even steps we use DATA0, for odd steps DATA1. -+ */ -+ data0_or_data1 = (step & 1) == 1; -+ -+ /* step+1. Read "Set DATAX" and confirm it is cleared. */ -+ for (i = 0; i < RENESAS_RETRY; i++) { -+ err = pci_read_config_byte(dev, RENESAS_FW_STATUS_MSB, -+ &fw_status); -+ if (err) -+ return pcibios_err_to_errno(err); -+ if (!(fw_status & BIT(data0_or_data1))) -+ break; -+ -+ udelay(RENESAS_DELAY); -+ } -+ if (i == RENESAS_RETRY) -+ return -ETIMEDOUT; -+ -+ /* -+ * step+2. Write FW data to "DATAX". -+ * "LSB is left" => force little endian -+ */ -+ err = pci_write_config_dword(dev, data0_or_data1 ? -+ RENESAS_DATA1 : RENESAS_DATA0, -+ (__force u32)cpu_to_le32(fw[step])); -+ if (err) -+ return pcibios_err_to_errno(err); -+ -+ udelay(100); -+ -+ /* step+3. Set "Set DATAX". */ -+ err = pci_write_config_byte(dev, RENESAS_FW_STATUS_MSB, -+ BIT(data0_or_data1)); -+ if (err) -+ return pcibios_err_to_errno(err); -+ -+ return 0; -+} -+ -+static int renesas_fw_verify(struct pci_dev *dev, -+ const void *fw_data, -+ size_t length) -+{ -+ const struct renesas_fw_entry *entry = renesas_needs_fw_dl(dev); -+ u16 fw_version_pointer; -+ u16 fw_version; -+ -+ if (!entry) -+ return -EINVAL; -+ -+ /* -+ * The Firmware's Data Format is describe in -+ * "6.3 Data Format" R19UH0078EJ0500 Rev.5.00 page 124 -+ */ -+ -+ /* "Each row is 8 bytes". => firmware size must be a multiple of 8. */ -+ if (length % 8 != 0) -+ dev_warn(&dev->dev, "firmware size is not a multiple of 8."); -+ -+ /* -+ * The bootrom chips of the big brother have sizes up to 64k, let's -+ * assume that's the biggest the firmware can get. -+ */ -+ if (length < 0x1000 || length >= 0x10000) { -+ dev_err(&dev->dev, "firmware is size %zd is not (4k - 64k).", -+ length); -+ return -EINVAL; -+ } -+ -+ /* The First 2 bytes are fixed value (55aa). "LSB on Left" */ -+ if (get_unaligned_le16(fw_data) != 0x55aa) { -+ dev_err(&dev->dev, "no valid firmware header found."); -+ return -EINVAL; -+ } -+ -+ /* verify the firmware version position and print it. */ -+ fw_version_pointer = get_unaligned_le16(fw_data + 4); -+ if (fw_version_pointer + 2 >= length) { -+ dev_err(&dev->dev, -+ "firmware version pointer is outside of the firmware image."); -+ return -EINVAL; -+ } -+ -+ fw_version = get_unaligned_le16(fw_data + fw_version_pointer); -+ dev_dbg(&dev->dev, "got firmware version: %02x.", fw_version); -+ -+ if (fw_version != entry->expected_version) { -+ dev_err(&dev->dev, -+ "firmware version mismatch, expected version: %02x.", -+ entry->expected_version); -+ return -EINVAL; -+ } -+ -+ return 0; -+} -+ -+static int renesas_check_rom_state(struct pci_dev *pdev) -+{ -+ const struct renesas_fw_entry *entry; -+ u16 rom_state; -+ u32 version; -+ bool valid_version = false; -+ int err, i; -+ -+ /* check FW version */ -+ err = pci_read_config_dword(pdev, RENESAS_FW_VERSION, &version); -+ if (err) -+ return pcibios_err_to_errno(err); -+ -+ version &= RENESAS_FW_VERSION_FIELD; -+ version = version >> RENESAS_FW_VERSION_OFFSET; -+ dev_dbg(&pdev->dev, "Found FW version loaded is %x\n", version); -+ -+ /* treat version in renesas_fw_table as correct ones */ -+ for (i = 0; i < ARRAY_SIZE(renesas_fw_table); i++) { -+ entry = &renesas_fw_table[i]; -+ if (version == entry->expected_version) { -+ dev_dbg(&pdev->dev, "Detected valid ROM version..\n"); -+ valid_version = true; -+ } -+ } -+ -+ /* -+ * Test if ROM is present and loaded, if so we can skip everything -+ */ -+ err = pci_read_config_word(pdev, RENESAS_ROM_STATUS, &rom_state); -+ if (err) -+ return pcibios_err_to_errno(err); -+ -+ if (rom_state & BIT(15)) { -+ /* ROM exists */ -+ dev_dbg(&pdev->dev, "ROM exists\n"); -+ -+ /* Check the "Result Code" Bits (6:4) and act accordingly */ -+ switch (rom_state & RENESAS_ROM_STATUS_RESULT) { -+ case RENESAS_ROM_STATUS_SUCCESS: -+ dev_dbg(&pdev->dev, "Success ROM load..."); -+ /* we have valid version and status so success */ -+ if (valid_version) -+ return 0; -+ break; -+ -+ case RENESAS_ROM_STATUS_INVALID: /* No result yet */ -+ dev_dbg(&pdev->dev, "No result as it is ROM..."); -+ /* we have valid version and status so success */ -+ if (valid_version) -+ return 0; -+ break; -+ -+ case RENESAS_ROM_STATUS_ERROR: /* Error State */ -+ default: /* All other states are marked as "Reserved states" */ -+ dev_err(&pdev->dev, "Invalid ROM.."); -+ break; -+ } -+ } -+ -+ return -EIO; -+} -+ -+static int renesas_fw_check_running(struct pci_dev *pdev) -+{ -+ int err; -+ u8 fw_state; -+ -+ /* Check if device has ROM and loaded, if so skip everything */ -+ err = renesas_check_rom_state(pdev); -+ if (!err) -+ return err; -+ -+ /* -+ * Test if the device is actually needing the firmware. As most -+ * BIOSes will initialize the device for us. If the device is -+ * initialized. -+ */ -+ err = pci_read_config_byte(pdev, RENESAS_FW_STATUS, &fw_state); -+ if (err) -+ return pcibios_err_to_errno(err); -+ -+ /* -+ * Check if "FW Download Lock" is locked. If it is and the FW is -+ * ready we can simply continue. If the FW is not ready, we have -+ * to give up. -+ */ -+ if (fw_state & RENESAS_FW_STATUS_LOCK) { -+ dev_dbg(&pdev->dev, "FW Download Lock is engaged."); -+ -+ if (fw_state & RENESAS_FW_STATUS_SUCCESS) -+ return 0; -+ -+ dev_err(&pdev->dev, -+ "FW Download Lock is set and FW is not ready. Giving Up."); -+ return -EIO; -+ } -+ -+ /* -+ * Check if "FW Download Enable" is set. If someone (us?) tampered -+ * with it and it can't be resetted, we have to give up too... and -+ * ask for a forgiveness and a reboot. -+ */ -+ if (fw_state & RENESAS_FW_STATUS_DOWNLOAD_ENABLE) { -+ dev_err(&pdev->dev, -+ "FW Download Enable is stale. Giving Up (poweroff/reboot needed)."); -+ return -EIO; -+ } -+ -+ /* Otherwise, Check the "Result Code" Bits (6:4) and act accordingly */ -+ switch (fw_state & RENESAS_FW_STATUS_RESULT) { -+ case 0: /* No result yet */ -+ dev_dbg(&pdev->dev, "FW is not ready/loaded yet."); -+ -+ /* tell the caller, that this device needs the firmware. */ -+ return 1; -+ -+ case RENESAS_FW_STATUS_SUCCESS: /* Success, device should be working. */ -+ dev_dbg(&pdev->dev, "FW is ready."); -+ return 0; -+ -+ case RENESAS_FW_STATUS_ERROR: /* Error State */ -+ dev_err(&pdev->dev, -+ "hardware is in an error state. Giving up (poweroff/reboot needed)."); -+ return -ENODEV; -+ -+ default: /* All other states are marked as "Reserved states" */ -+ dev_err(&pdev->dev, -+ "hardware is in an invalid state %lx. Giving up (poweroff/reboot needed).", -+ (fw_state & RENESAS_FW_STATUS_RESULT) >> 4); -+ return -EINVAL; -+ } -+} -+ -+static int renesas_fw_download(struct pci_dev *pdev, -+ const struct firmware *fw) -+{ -+ const u32 *fw_data = (const u32 *)fw->data; -+ size_t i; -+ int err; -+ u8 fw_status; -+ -+ /* -+ * For more information and the big picture: please look at the -+ * "Firmware Download Sequence" in "7.1 FW Download Interface" -+ * of R19UH0078EJ0500 Rev.5.00 page 131 -+ */ -+ -+ /* -+ * 0. Set "FW Download Enable" bit in the -+ * "FW Download Control & Status Register" at 0xF4 -+ */ -+ err = pci_write_config_byte(pdev, RENESAS_FW_STATUS, -+ RENESAS_FW_STATUS_DOWNLOAD_ENABLE); -+ if (err) -+ return pcibios_err_to_errno(err); -+ -+ /* 1 - 10 follow one step after the other. */ -+ for (i = 0; i < fw->size / 4; i++) { -+ err = renesas_fw_download_image(pdev, fw_data, i); -+ if (err) { -+ dev_err(&pdev->dev, -+ "Firmware Download Step %zd failed at position %zd bytes with (%d).", -+ i, i * 4, err); -+ return err; -+ } -+ } -+ -+ /* -+ * This sequence continues until the last data is written to -+ * "DATA0" or "DATA1". Naturally, we wait until "SET DATA0/1" -+ * is cleared by the hardware beforehand. -+ */ -+ for (i = 0; i < RENESAS_RETRY; i++) { -+ err = pci_read_config_byte(pdev, RENESAS_FW_STATUS_MSB, -+ &fw_status); -+ if (err) -+ return pcibios_err_to_errno(err); -+ if (!(fw_status & (BIT(0) | BIT(1)))) -+ break; -+ -+ udelay(RENESAS_DELAY); -+ } -+ if (i == RENESAS_RETRY) -+ dev_warn(&pdev->dev, "Final Firmware Download step timed out."); -+ -+ /* -+ * 11. After finishing writing the last data of FW, the -+ * System Software must clear "FW Download Enable" -+ */ -+ err = pci_write_config_byte(pdev, RENESAS_FW_STATUS, 0); -+ if (err) -+ return pcibios_err_to_errno(err); -+ -+ /* 12. Read "Result Code" and confirm it is good. */ -+ for (i = 0; i < RENESAS_RETRY; i++) { -+ err = pci_read_config_byte(pdev, RENESAS_FW_STATUS, &fw_status); -+ if (err) -+ return pcibios_err_to_errno(err); -+ if (fw_status & RENESAS_FW_STATUS_SUCCESS) -+ break; -+ -+ udelay(RENESAS_DELAY); -+ } -+ if (i == RENESAS_RETRY) { -+ /* Timed out / Error - let's see if we can fix this */ -+ err = renesas_fw_check_running(pdev); -+ switch (err) { -+ case 0: /* -+ * we shouldn't end up here. -+ * maybe it took a little bit longer. -+ * But all should be well? -+ */ -+ break; -+ -+ case 1: /* (No result yet! */ -+ return -ETIMEDOUT; -+ -+ default: -+ return err; -+ } -+ } -+ /* -+ * Optional last step: Engage Firmware Lock -+ * -+ * err = pci_write_config_byte(pdev, 0xF4, BIT(2)); -+ * if (err) -+ * return pcibios_err_to_errno(err); -+ */ -+ -+ return 0; -+} -+ -+struct renesas_fw_ctx { -+ struct pci_dev *pdev; -+ const struct pci_device_id *id; -+ bool resume; -+ const struct renesas_fw_entry *entry; -+}; -+ -+static int xhci_pci_probe(struct pci_dev *pdev, -+ const struct pci_device_id *id); -+ -+static bool renesas_check_rom(struct pci_dev *pdev) -+{ -+ u16 rom_status; -+ int retval; -+ -+ /* 1. Check if external ROM exists */ -+ retval = pci_read_config_word(pdev, RENESAS_ROM_STATUS, &rom_status); -+ if (retval) -+ return false; -+ -+ rom_status &= RENESAS_ROM_STATUS_ROM_EXISTS; -+ if (rom_status) { -+ dev_dbg(&pdev->dev, "External ROM exists\n"); -+ return true; /* External ROM exists */ -+ } -+ -+ return false; -+} -+ -+static void renesas_rom_erase(struct pci_dev *pdev) -+{ -+ int retval, i; -+ u8 status; -+ -+ dev_dbg(&pdev->dev, "Performing ROM Erase...\n"); -+ retval = pci_write_config_dword(pdev, RENESAS_DATA0, -+ RENESAS_ROM_ERASE_MAGIC); -+ if (retval) { -+ dev_err(&pdev->dev, "ROM erase, magic word write failed: %d\n", -+ pcibios_err_to_errno(retval)); -+ return; -+ } -+ -+ retval = pci_read_config_byte(pdev, RENESAS_ROM_STATUS, &status); -+ if (retval) { -+ dev_err(&pdev->dev, "ROM status read failed: %d\n", -+ pcibios_err_to_errno(retval)); -+ return; -+ } -+ status |= RENESAS_ROM_STATUS_ERASE; -+ retval = pci_write_config_byte(pdev, RENESAS_ROM_STATUS, status); -+ if (retval) { -+ dev_err(&pdev->dev, "ROM erase set word write failed\n"); -+ return; -+ } -+ -+ /* sleep a bit while ROM is erased */ -+ msleep(20); -+ -+ for (i = 0; i < RENESAS_RETRY; i++) { -+ retval = pci_read_config_byte(pdev, RENESAS_ROM_STATUS, -+ &status); -+ status &= RENESAS_ROM_STATUS_ERASE; -+ if (!status) -+ break; -+ -+ mdelay(RENESAS_DELAY); -+ } -+ -+ if (i == RENESAS_RETRY) -+ dev_dbg(&pdev->dev, "Chip erase timedout: %x\n", status); -+ -+ dev_dbg(&pdev->dev, "ROM Erase... Done success\n"); -+} -+ -+static bool renesas_download_rom(struct pci_dev *pdev, -+ const u32 *fw, size_t step) -+{ -+ bool data0_or_data1; -+ u8 fw_status; -+ size_t i; -+ int err; -+ -+ /* -+ * The hardware does alternate between two 32-bit pages. -+ * (This is because each row of the firmware is 8 bytes). -+ * -+ * for even steps we use DATA0, for odd steps DATA1. -+ */ -+ data0_or_data1 = (step & 1) == 1; -+ -+ /* Read "Set DATAX" and confirm it is cleared. */ -+ for (i = 0; i < RENESAS_RETRY; i++) { -+ err = pci_read_config_byte(pdev, RENESAS_ROM_STATUS_MSB, -+ &fw_status); -+ if (err) { -+ dev_err(&pdev->dev, "Read ROM Status failed: %d\n", -+ pcibios_err_to_errno(err)); -+ return false; -+ } -+ if (!(fw_status & BIT(data0_or_data1))) -+ break; -+ -+ udelay(RENESAS_DELAY); -+ } -+ if (i == RENESAS_RETRY) { -+ dev_err(&pdev->dev, "Timeout for Set DATAX step: %zd\n", step); -+ return false; -+ } -+ -+ /* -+ * Write FW data to "DATAX". -+ * "LSB is left" => force little endian -+ */ -+ err = pci_write_config_dword(pdev, data0_or_data1 ? -+ RENESAS_DATA1 : RENESAS_DATA0, -+ (__force u32)cpu_to_le32(fw[step])); -+ if (err) { -+ dev_err(&pdev->dev, "Write to DATAX failed: %d\n", -+ pcibios_err_to_errno(err)); -+ return false; -+ } -+ -+ udelay(100); -+ -+ /* Set "Set DATAX". */ -+ err = pci_write_config_byte(pdev, RENESAS_ROM_STATUS_MSB, -+ BIT(data0_or_data1)); -+ if (err) { -+ dev_err(&pdev->dev, "Write config for DATAX failed: %d\n", -+ pcibios_err_to_errno(err)); -+ return false; -+ } -+ -+ return true; -+} -+ -+static bool renesas_setup_rom(struct pci_dev *pdev, const struct firmware *fw) -+{ -+ const u32 *fw_data = (const u32 *)fw->data; -+ int err, i; -+ u8 status; -+ -+ /* 2. Write magic word to Data0 */ -+ err = pci_write_config_dword(pdev, RENESAS_DATA0, -+ RENESAS_ROM_WRITE_MAGIC); -+ if (err) -+ return false; -+ -+ /* 3. Set External ROM access */ -+ err = pci_write_config_byte(pdev, RENESAS_ROM_STATUS, -+ RENESAS_ROM_STATUS_ACCESS); -+ if (err) -+ goto remove_bypass; -+ -+ /* 4. Check the result */ -+ err = pci_read_config_byte(pdev, RENESAS_ROM_STATUS, &status); -+ if (err) -+ goto remove_bypass; -+ status &= GENMASK(6, 4); -+ if (status) { -+ dev_err(&pdev->dev, -+ "setting external rom failed: %x\n", status); -+ goto remove_bypass; -+ } -+ -+ /* 5 to 16 Write FW to DATA0/1 while checking SetData0/1 */ -+ for (i = 0; i < fw->size / 4; i++) { -+ err = renesas_download_rom(pdev, fw_data, i); -+ if (!err) { -+ dev_err(&pdev->dev, -+ "ROM Download Step %d failed at position %d bytes\n", -+ i, i * 4); -+ goto remove_bypass; -+ } -+ } -+ -+ /* -+ * wait till DATA0/1 is cleared -+ */ -+ for (i = 0; i < RENESAS_RETRY; i++) { -+ err = pci_read_config_byte(pdev, RENESAS_ROM_STATUS_MSB, -+ &status); -+ if (err) -+ goto remove_bypass; -+ if (!(status & (BIT(0) | BIT(1)))) -+ break; -+ -+ udelay(RENESAS_DELAY); -+ } -+ if (i == RENESAS_RETRY) { -+ dev_err(&pdev->dev, "Final Firmware ROM Download step timed out\n"); -+ goto remove_bypass; -+ } -+ -+ /* 17. Remove bypass */ -+ err = pci_write_config_byte(pdev, RENESAS_ROM_STATUS, 0); -+ if (err) -+ return false; -+ -+ udelay(10); -+ -+ /* 18. check result */ -+ for (i = 0; i < RENESAS_RETRY; i++) { -+ err = pci_read_config_byte(pdev, RENESAS_ROM_STATUS, &status); -+ if (err) { -+ dev_err(&pdev->dev, "Read ROM status failed:%d\n", -+ pcibios_err_to_errno(err)); -+ return false; -+ } -+ status &= RENESAS_ROM_STATUS_RESULT; -+ if (status == RENESAS_ROM_STATUS_SUCCESS) { -+ dev_dbg(&pdev->dev, "Download ROM success\n"); -+ break; -+ } -+ udelay(RENESAS_DELAY); -+ } -+ if (i == RENESAS_RETRY) { /* Timed out */ -+ dev_err(&pdev->dev, -+ "Download to external ROM TO: %x\n", status); -+ return false; -+ } -+ -+ dev_dbg(&pdev->dev, "Download to external ROM scuceeded\n"); -+ -+ /* Last step set Reload */ -+ err = pci_write_config_byte(pdev, RENESAS_ROM_STATUS, -+ RENESAS_ROM_STATUS_RELOAD); -+ if (err) { -+ dev_err(&pdev->dev, "Set ROM execute failed: %d\n", -+ pcibios_err_to_errno(err)); -+ return false; -+ } -+ -+ /* -+ * wait till Reload is cleared -+ */ -+ for (i = 0; i < RENESAS_RETRY; i++) { -+ err = pci_read_config_byte(pdev, RENESAS_ROM_STATUS, &status); -+ if (err) -+ return false; -+ if (!(status & RENESAS_ROM_STATUS_RELOAD)) -+ break; -+ -+ udelay(RENESAS_DELAY); -+ } -+ if (i == RENESAS_RETRY) { -+ dev_err(&pdev->dev, "ROM Exec timed out: %x\n", status); -+ return false; -+ } -+ -+ return true; -+ -+remove_bypass: -+ pci_write_config_byte(pdev, RENESAS_ROM_STATUS, 0); -+ return false; -+} -+ -+static void renesas_fw_callback(const struct firmware *fw, -+ void *context) -+{ -+ struct renesas_fw_ctx *ctx = context; -+ struct pci_dev *pdev = ctx->pdev; -+ struct device *parent = pdev->dev.parent; -+ const struct renesas_fw_entry *next_entry; -+ bool rom; -+ int err; -+ -+ if (!fw) { -+ dev_err(&pdev->dev, "firmware failed to load\n"); -+ /* -+ * we didn't find firmware, check if we have another -+ * entry for this device -+ */ -+ next_entry = renesas_get_next_entry(ctx->pdev, ctx->entry); -+ if (next_entry) { -+ ctx->entry = next_entry; -+ dev_dbg(&pdev->dev, "Found next entry, requesting: %s\n", -+ next_entry->firmware_name); -+ request_firmware_nowait(THIS_MODULE, 1, -+ next_entry->firmware_name, -+ &pdev->dev, GFP_KERNEL, -+ ctx, renesas_fw_callback); -+ return; -+ } else { -+ goto cleanup; -+ } -+ } -+ -+ err = renesas_fw_verify(pdev, fw->data, fw->size); -+ if (err) -+ goto cleanup; -+ -+ /* Check if the device has external ROM */ -+ rom = renesas_check_rom(pdev); -+ if (rom) { -+ /* perfrom chip erase first */ -+ renesas_rom_erase(pdev); -+ -+ /* lets try loading fw on ROM first */ -+ rom = renesas_setup_rom(pdev, fw); -+ if (!rom) { -+ dev_err(&pdev->dev, -+ "ROM load failed, falling back on FW load\n"); -+ } else { -+ dev_dbg(&pdev->dev, "ROM load done..\n"); -+ -+ release_firmware(fw); -+ goto do_probe; -+ } -+ } -+ -+ err = renesas_fw_download(pdev, fw); -+ release_firmware(fw); -+ if (err) { -+ dev_err(&pdev->dev, "firmware failed to download (%d).", err); -+ goto cleanup; -+ } -+ -+do_probe: -+ if (ctx->resume) -+ return; -+ -+ err = xhci_pci_probe(pdev, ctx->id); -+ if (!err) { -+ /* everything worked */ -+ devm_kfree(&pdev->dev, ctx); -+ return; -+ } -+ -+cleanup: -+ /* in case of an error - fall through */ -+ dev_info(&pdev->dev, "Unloading driver"); -+ -+ if (parent) -+ device_lock(parent); -+ -+ device_release_driver(&pdev->dev); -+ -+ if (parent) -+ device_unlock(parent); -+ -+ pci_dev_put(pdev); -+} -+ -+static int renesas_fw_alive_check(struct pci_dev *pdev) -+{ -+ const struct renesas_fw_entry *entry; -+ -+ /* check if we have a eligible RENESAS' uPD720201/2 w/o FW. */ -+ entry = renesas_needs_fw_dl(pdev); -+ if (!entry) -+ return 0; -+ -+ return renesas_fw_check_running(pdev); -+} -+ -+static int renesas_fw_download_to_hw(struct pci_dev *pdev, -+ const struct pci_device_id *id, -+ bool do_resume) -+{ -+ const struct renesas_fw_entry *entry; -+ struct renesas_fw_ctx *ctx; -+ int err; -+ -+ /* check if we have a eligible RENESAS' uPD720201/2 w/o FW. */ -+ entry = renesas_needs_fw_dl(pdev); -+ if (!entry) -+ return 0; -+ -+ err = renesas_fw_check_running(pdev); -+ /* Continue ahead, if the firmware is already running. */ -+ if (err == 0) -+ return 0; -+ -+ if (err != 1) -+ return err; -+ -+ ctx = devm_kzalloc(&pdev->dev, sizeof(*ctx), GFP_KERNEL); -+ if (!ctx) -+ return -ENOMEM; -+ ctx->pdev = pdev; -+ ctx->resume = do_resume; -+ ctx->id = id; -+ ctx->entry = entry; -+ -+ pci_dev_get(pdev); -+ err = request_firmware_nowait(THIS_MODULE, 1, entry->firmware_name, -+ &pdev->dev, GFP_KERNEL, -+ ctx, renesas_fw_callback); -+ if (err) { -+ pci_dev_put(pdev); -+ return err; -+ } -+ -+ /* -+ * The renesas_fw_callback() callback will continue the probe -+ * process, once it aquires the firmware. -+ */ -+ return 1; -+} -+ -+static int renesas_check_if_fw_dl_is_needed(struct pci_dev *pdev) -+{ -+ int err; -+ u8 fw_state; -+ -+ /* -+ * Only the uPD720201K8-711-BAC-A or uPD720202K8-711-BAA-A -+ * are listed in R19UH0078EJ0500 Rev.5.00 as devices which -+ * need a firmware in order to work. -+ * -+ * - uPD720202 ES 2.0 sample & CS sample & Mass product, ID is 2. -+ * - uPD720201 ES 2.0 sample whose revision ID is 2. -+ * - uPD720201 ES 2.1 sample & CS sample & Mass product, ID is 3. -+ */ -+ if (!((pdev->vendor == PCI_VENDOR_ID_RENESAS) && -+ ((pdev->device == 0x0015 && pdev->revision == 0x02) || -+ (pdev->device == 0x0014 && -+ (pdev->revision == 0x02 || pdev->revision == 0x03))))) -+ return 0; -+ -+ /* Check if device has ROM and loaded, if so skip everything */ -+ err = renesas_check_rom_state(pdev); -+ if (!err) -+ return err; -+ -+ /* -+ * Test if the firmware was uploaded and is running. -+ * As most BIOSes will initialize the device for us. -+ */ -+ err = pci_read_config_byte(pdev, RENESAS_FW_STATUS, &fw_state); -+ if (err) -+ return pcibios_err_to_errno(err); -+ -+ /* Check the "Result Code" Bits (6:4) and act accordingly */ -+ switch (fw_state & RENESAS_FW_STATUS_RESULT) { -+ case 0: /* No result yet */ -+ dev_err(&pdev->dev, "FW is not ready/loaded yet."); -+ return -ENODEV; -+ -+ case RENESAS_FW_STATUS_SUCCESS: -+ dev_dbg(&pdev->dev, "FW is ready."); -+ return 0; -+ -+ case RENESAS_FW_STATUS_ERROR: -+ dev_err(&pdev->dev, "HW is in an error state."); -+ return -ENODEV; -+ -+ default: /* All other states are marked as "Reserved states" */ -+ dev_err(&pdev->dev, "HW is in an invalid state (%x).", -+ (fw_state & 0x70) >> 4); -+ return -EINVAL; -+ } -+} -+ - /* called during probe() after chip reset completes */ - static int xhci_pci_setup(struct usb_hcd *hcd) - { -@@ -368,6 +1275,27 @@ static int xhci_pci_probe(struct pci_dev - struct hc_driver *driver; - struct usb_hcd *hcd; - -+ /* -+ * Check if this device is a RENESAS uPD720201/2 device. -+ * Otherwise, we can continue with xhci_pci_probe as usual. -+ */ -+ retval = renesas_fw_download_to_hw(dev, id, false); -+ switch (retval) { -+ case 0: -+ break; -+ -+ case 1: /* let it load the firmware and recontinue the probe. */ -+ return 0; -+ -+ default: -+ return retval; -+ }; -+ -+ /* Check if this device is a RENESAS uPD720201/2 device. */ -+ retval = renesas_check_if_fw_dl_is_needed(dev); -+ if (retval) -+ return retval; -+ - driver = (struct hc_driver *)id->driver_data; - - /* Prevent runtime suspending between USB-2 and USB-3 initialization */ -@@ -429,6 +1357,16 @@ static void xhci_pci_remove(struct pci_d - { - struct xhci_hcd *xhci; - -+ if (renesas_fw_alive_check(dev)) { -+ /* -+ * bail out early, if this was a renesas device w/o FW. -+ * Else we might hit the NMI watchdog in xhci_handsake -+ * during xhci_reset as part of the driver's unloading. -+ * which we forced in the renesas_fw_callback(). -+ */ -+ return; -+ } -+ - xhci = hcd_to_xhci(pci_get_drvdata(dev)); - xhci->xhc_state |= XHCI_STATE_REMOVING; - -@@ -568,6 +1506,11 @@ static int xhci_pci_resume(struct usb_hc - if (pdev->vendor == PCI_VENDOR_ID_INTEL) - usb_enable_intel_xhci_ports(pdev); - -+ /* Check if this device is a RENESAS uPD720201/2 device. */ -+ retval = renesas_check_if_fw_dl_is_needed(pdev); -+ if (retval) -+ return retval; -+ - if (xhci->quirks & XHCI_SSIC_PORT_UNUSED) - xhci_ssic_port_unused_quirk(hcd, false); - diff --git a/target/linux/apm821xx/patches-5.4/802-usb-xhci-force-msi-renesas-xhci.patch b/target/linux/apm821xx/patches-5.4/802-usb-xhci-force-msi-renesas-xhci.patch deleted file mode 100644 index 1fe38dc60a..0000000000 --- a/target/linux/apm821xx/patches-5.4/802-usb-xhci-force-msi-renesas-xhci.patch +++ /dev/null @@ -1,53 +0,0 @@ -From a0dc613140bab907a3d5787a7ae7b0638bf674d0 Mon Sep 17 00:00:00 2001 -From: Christian Lamparter -Date: Thu, 23 Jun 2016 20:28:20 +0200 -Subject: [PATCH] usb: xhci: force MSI for uPD720201 and - uPD720202 - -The APM82181 does not support MSI-X. When probed, it will -produce a noisy warning. - ---- - drivers/usb/host/pci-quirks.c | 362 ++++++++++++++++++++++++++++++++++++++++++ - 1 file changed, 362 insertions(+) - ---- a/drivers/usb/host/xhci-pci.c -+++ b/drivers/usb/host/xhci-pci.c -@@ -297,6 +297,7 @@ static void xhci_pci_quirks(struct devic - pdev->device == 0x0015) { - xhci->quirks |= XHCI_RESET_ON_RESUME; - xhci->quirks |= XHCI_ZERO_64B_REGS; -+ xhci->quirks |= XHCI_FORCE_MSI; - } - if (pdev->vendor == PCI_VENDOR_ID_VIA) - xhci->quirks |= XHCI_RESET_ON_RESUME; ---- a/drivers/usb/host/xhci.c -+++ b/drivers/usb/host/xhci.c -@@ -427,10 +427,14 @@ static int xhci_try_enable_msi(struct us - free_irq(hcd->irq, hcd); - hcd->irq = 0; - -- ret = xhci_setup_msix(xhci); -- if (ret) -- /* fall back to msi*/ -+ if (xhci->quirks & XHCI_FORCE_MSI) { - ret = xhci_setup_msi(xhci); -+ } else { -+ ret = xhci_setup_msix(xhci); -+ if (ret) -+ /* fall back to msi*/ -+ ret = xhci_setup_msi(xhci); -+ } - - if (!ret) { - hcd->msi_enabled = 1; ---- a/drivers/usb/host/xhci.h -+++ b/drivers/usb/host/xhci.h -@@ -1887,6 +1887,7 @@ struct xhci_hcd { - struct xhci_hub usb2_rhub; - struct xhci_hub usb3_rhub; - /* support xHCI 1.0 spec USB2 hardware LPM */ -+#define XHCI_FORCE_MSI (1 << 24) - unsigned hw_lpm_support:1; - /* Broken Suspend flag for SNPS Suspend resume issue */ - unsigned broken_suspend:1; diff --git a/target/linux/apm821xx/patches-5.4/803-hwmon-tc654-add-detection-routine.patch b/target/linux/apm821xx/patches-5.4/803-hwmon-tc654-add-detection-routine.patch deleted file mode 100644 index f0ed5a7cff..0000000000 --- a/target/linux/apm821xx/patches-5.4/803-hwmon-tc654-add-detection-routine.patch +++ /dev/null @@ -1,65 +0,0 @@ -From 694f9bfb8efaef8a33e8992015ff9d0866faf4a2 Mon Sep 17 00:00:00 2001 -From: Christian Lamparter -Date: Sun, 17 Dec 2017 17:27:15 +0100 -Subject: [PATCH 1/2] hwmon: tc654 add detection routine - -This patch adds a detection routine for the TC654/TC655 -chips. Both IDs are listed in the Datasheet. - -Signed-off-by: Christian Lamparter ---- - drivers/hwmon/tc654.c | 29 +++++++++++++++++++++++++++++ - 1 file changed, 29 insertions(+) - ---- a/drivers/hwmon/tc654.c -+++ b/drivers/hwmon/tc654.c -@@ -55,6 +55,11 @@ enum tc654_regs { - /* Register data is read (and cached) at most once per second. */ - #define TC654_UPDATE_INTERVAL HZ - -+/* Manufacturer and Version Identification Register Values */ -+#define TC654_MFR_ID_MICROCHIP 0x84 -+#define TC654_VER_ID 0x00 -+#define TC655_VER_ID 0x01 -+ - struct tc654_data { - struct i2c_client *client; - -@@ -482,6 +487,29 @@ static const struct i2c_device_id tc654_ - {} - }; - -+static int -+tc654_detect(struct i2c_client *new_client, struct i2c_board_info *info) -+{ -+ struct i2c_adapter *adapter = new_client->adapter; -+ int manufacturer, product; -+ -+ if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA)) -+ return -ENODEV; -+ -+ manufacturer = i2c_smbus_read_byte_data(new_client, TC654_REG_MFR_ID); -+ if (manufacturer != TC654_MFR_ID_MICROCHIP) -+ return -ENODEV; -+ -+ product = i2c_smbus_read_byte_data(new_client, TC654_REG_VER_ID); -+ if (!((product == TC654_VER_ID) || (product == TC655_VER_ID))) -+ return -ENODEV; -+ -+ strlcpy(info->type, product == TC654_VER_ID ? "tc654" : "tc655", -+ I2C_NAME_SIZE); -+ return 0; -+} -+ -+ - MODULE_DEVICE_TABLE(i2c, tc654_id); - - static struct i2c_driver tc654_driver = { -@@ -490,6 +518,7 @@ static struct i2c_driver tc654_driver = - }, - .probe = tc654_probe, - .id_table = tc654_id, -+ .detect = tc654_detect, - }; - - module_i2c_driver(tc654_driver); diff --git a/target/linux/apm821xx/patches-5.4/804-hwmon-tc654-add-thermal_cooling-device.patch b/target/linux/apm821xx/patches-5.4/804-hwmon-tc654-add-thermal_cooling-device.patch deleted file mode 100644 index a7b0a58f7c..0000000000 --- a/target/linux/apm821xx/patches-5.4/804-hwmon-tc654-add-thermal_cooling-device.patch +++ /dev/null @@ -1,174 +0,0 @@ -From 9cb27801b5cbad2e1aaf45aac428cb2fac5e1372 Mon Sep 17 00:00:00 2001 -From: Christian Lamparter -Date: Sun, 17 Dec 2017 17:29:13 +0100 -Subject: [PATCH] hwmon: tc654: add thermal_cooling device - -This patch adds a thermaL_cooling device to the tc654 driver. -This allows the chip to be used for DT-based cooling. - -Signed-off-by: Christian Lamparter ---- - drivers/hwmon/tc654.c | 103 +++++++++++++++++++++++++++++++++++------- - 1 file changed, 86 insertions(+), 17 deletions(-) - ---- a/drivers/hwmon/tc654.c -+++ b/drivers/hwmon/tc654.c -@@ -15,6 +15,7 @@ - #include - #include - #include -+#include - #include - - enum tc654_regs { -@@ -132,6 +133,9 @@ struct tc654_data { - * writable register used to control the duty - * cycle of the V OUT output. - */ -+ -+ /* optional cooling device */ -+ struct thermal_cooling_device *cdev; - }; - - /* helper to grab and cache data, at most one time per second */ -@@ -367,36 +371,30 @@ static ssize_t pwm_mode_store(struct dev - static const int tc654_pwm_map[16] = { 77, 88, 102, 112, 124, 136, 148, 160, - 172, 184, 196, 207, 219, 231, 243, 255}; - -+static int get_pwm(struct tc654_data *data) -+{ -+ if (data->config & TC654_REG_CONFIG_SDM) -+ return 0; -+ else -+ return tc654_pwm_map[data->duty_cycle]; -+} -+ - static ssize_t pwm_show(struct device *dev, struct device_attribute *da, - char *buf) - { - struct tc654_data *data = tc654_update_client(dev); -- int pwm; - - if (IS_ERR(data)) - return PTR_ERR(data); - -- if (data->config & TC654_REG_CONFIG_SDM) -- pwm = 0; -- else -- pwm = tc654_pwm_map[data->duty_cycle]; -- -- return sprintf(buf, "%d\n", pwm); -+ return sprintf(buf, "%d\n", get_pwm(data)); - } - --static ssize_t pwm_store(struct device *dev, struct device_attribute *da, -- const char *buf, size_t count) -+static int _set_pwm(struct tc654_data *data, unsigned long val) - { -- struct tc654_data *data = dev_get_drvdata(dev); - struct i2c_client *client = data->client; -- unsigned long val; - int ret; - -- if (kstrtoul(buf, 10, &val)) -- return -EINVAL; -- if (val > 255) -- return -EINVAL; -- - mutex_lock(&data->update_lock); - - if (val == 0) -@@ -416,6 +414,22 @@ static ssize_t pwm_store(struct device * - - out: - mutex_unlock(&data->update_lock); -+ return ret; -+} -+ -+static ssize_t pwm_store(struct device *dev, struct device_attribute *da, -+ const char *buf, size_t count) -+{ -+ struct tc654_data *data = dev_get_drvdata(dev); -+ unsigned long val; -+ int ret; -+ -+ if (kstrtoul(buf, 10, &val)) -+ return -EINVAL; -+ if (val > 255) -+ return -EINVAL; -+ -+ ret = _set_pwm(data, val); - return ret < 0 ? ret : count; - } - -@@ -447,6 +461,47 @@ static struct attribute *tc654_attrs[] = - - ATTRIBUTE_GROUPS(tc654); - -+/* cooling device */ -+ -+static int tc654_get_max_state(struct thermal_cooling_device *cdev, -+ unsigned long *state) -+{ -+ *state = 255; -+ return 0; -+} -+ -+static int tc654_get_cur_state(struct thermal_cooling_device *cdev, -+ unsigned long *state) -+{ -+ struct tc654_data *data = tc654_update_client(cdev->devdata); -+ -+ if (IS_ERR(data)) -+ return PTR_ERR(data); -+ -+ *state = get_pwm(data); -+ return 0; -+} -+ -+static int tc654_set_cur_state(struct thermal_cooling_device *cdev, -+ unsigned long state) -+{ -+ struct tc654_data *data = tc654_update_client(cdev->devdata); -+ -+ if (IS_ERR(data)) -+ return PTR_ERR(data); -+ -+ if (state > 255) -+ return -EINVAL; -+ -+ return _set_pwm(data, state); -+} -+ -+static const struct thermal_cooling_device_ops tc654_fan_cool_ops = { -+ .get_max_state = tc654_get_max_state, -+ .get_cur_state = tc654_get_cur_state, -+ .set_cur_state = tc654_set_cur_state, -+}; -+ - /* - * device probe and removal - */ -@@ -478,7 +533,21 @@ static int tc654_probe(struct i2c_client - hwmon_dev = - devm_hwmon_device_register_with_groups(dev, client->name, data, - tc654_groups); -- return PTR_ERR_OR_ZERO(hwmon_dev); -+ if (IS_ERR(hwmon_dev)) -+ return PTR_ERR(hwmon_dev); -+ -+#if IS_ENABLED(CONFIG_OF) -+ /* Optional cooling device register for Device tree platforms */ -+ data->cdev = thermal_of_cooling_device_register(client->dev.of_node, -+ "tc654", hwmon_dev, -+ &tc654_fan_cool_ops); -+#else /* CONFIG_OF */ -+ /* Optional cooling device register for non Device tree platforms */ -+ data->cdev = thermal_cooling_device_register("tc654", hwmon_dev, -+ &tc654_fan_cool_ops); -+#endif /* CONFIG_OF */ -+ -+ return PTR_ERR_OR_ZERO(data->cdev); - } - - static const struct i2c_device_id tc654_id[] = { diff --git a/target/linux/apm821xx/patches-5.4/900-powerpc-bootwrapper-force-gzip-as-mkimage-s-compress.patch b/target/linux/apm821xx/patches-5.4/900-powerpc-bootwrapper-force-gzip-as-mkimage-s-compress.patch deleted file mode 100644 index c2cc632693..0000000000 --- a/target/linux/apm821xx/patches-5.4/900-powerpc-bootwrapper-force-gzip-as-mkimage-s-compress.patch +++ /dev/null @@ -1,29 +0,0 @@ -From c9395ad54e2cabb87d408becc37566f3d8248933 Mon Sep 17 00:00:00 2001 -From: Christian Lamparter -Date: Sun, 1 Dec 2019 02:08:23 +0100 -Subject: [PATCH] powerpc: bootwrapper: force gzip as mkimage's compression - method - -Due to CONFIG_KERNEL_XZ symbol, the bootwrapper code tries to -instruct the mkimage to use the xz compression, which isn't -supported. This patch forces the gzip compression, which is -supported and doesn't matter because the generated uImage for -the apm821xx target gets ignored as the OpenWrt toolchain will -do separate U-Boot kernel images for each device individually. - -Signed-off-by: Christian Lamparter ---- - arch/powerpc/boot/Makefile | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - ---- a/arch/powerpc/boot/Makefile -+++ b/arch/powerpc/boot/Makefile -@@ -254,7 +254,7 @@ compressor-$(CONFIG_KERNEL_LZO) := lzo - - # args (to if_changed): 1 = (this rule), 2 = platform, 3 = dts 4=dtb 5=initrd - quiet_cmd_wrap = WRAP $@ -- cmd_wrap =$(CONFIG_SHELL) $(wrapper) -Z $(compressor-y) -c -o $@ -p $2 \ -+ cmd_wrap =$(CONFIG_SHELL) $(wrapper) -Z gzip -c -o $@ -p $2 \ - $(CROSSWRAP) $(if $3, -s $3)$(if $4, -d $4)$(if $5, -i $5) \ - vmlinux - diff --git a/target/linux/ath25/Makefile b/target/linux/ath25/Makefile index 1d8bee507b..c714edeaaa 100644 --- a/target/linux/ath25/Makefile +++ b/target/linux/ath25/Makefile @@ -10,6 +10,7 @@ BOARDNAME:=Atheros AR231x/AR5312 FEATURES:=squashfs low_mem small_flash KERNEL_PATCHVER:=5.4 +KERNEL_TESTING_PATCHVER:=5.10 define Target/Description Build firmware images for Atheros SoC boards diff --git a/target/linux/ath25/config-5.10 b/target/linux/ath25/config-5.10 new file mode 100644 index 0000000000..5c983ad82b --- /dev/null +++ b/target/linux/ath25/config-5.10 @@ -0,0 +1,127 @@ +CONFIG_ADM6996_PHY=y +CONFIG_AR2315_WDT=y +CONFIG_AR8216_PHY=y +CONFIG_ARCH_32BIT_OFF_T=y +CONFIG_ARCH_HIBERNATION_POSSIBLE=y +CONFIG_ARCH_MMAP_RND_BITS_MAX=15 +CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MAX=15 +CONFIG_ARCH_SUSPEND_POSSIBLE=y +CONFIG_ATH25=y +CONFIG_BLK_MQ_PCI=y +CONFIG_CEVT_R4K=y +CONFIG_CLONE_BACKWARDS=y +CONFIG_CMDLINE="console=ttyS0,9600 rootfstype=squashfs,jffs2" +CONFIG_CMDLINE_BOOL=y +# CONFIG_CMDLINE_OVERRIDE is not set +# CONFIG_COMMON_CLK is not set +CONFIG_COMPAT_32BIT_TIME=y +CONFIG_CPU_BIG_ENDIAN=y +CONFIG_CPU_GENERIC_DUMP_TLB=y +CONFIG_CPU_HAS_PREFETCH=y +CONFIG_CPU_HAS_SYNC=y +CONFIG_CPU_MIPS32=y +CONFIG_CPU_MIPS32_R1=y +CONFIG_CPU_MIPSR1=y +CONFIG_CPU_NEEDS_NO_SMARTMIPS_OR_MICROMIPS=y +CONFIG_CPU_R4K_CACHE_TLB=y +CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y +CONFIG_CPU_SUPPORTS_HIGHMEM=y +CONFIG_CRYPTO_LIB_POLY1305_RSIZE=2 +CONFIG_CRYPTO_RNG2=y +CONFIG_CSRC_R4K=y +CONFIG_DMA_NONCOHERENT=y +CONFIG_EARLY_PRINTK=y +CONFIG_ETHERNET_PACKET_MANGLE=y +CONFIG_FORCE_PCI=y +CONFIG_FW_LOADER_PAGED_BUF=y +CONFIG_GENERIC_ATOMIC64=y +CONFIG_GENERIC_CLOCKEVENTS=y +CONFIG_GENERIC_CMOS_UPDATE=y +CONFIG_GENERIC_CPU_AUTOPROBE=y +CONFIG_GENERIC_GETTIMEOFDAY=y +CONFIG_GENERIC_IOMAP=y +CONFIG_GENERIC_IRQ_CHIP=y +CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK=y +CONFIG_GENERIC_IRQ_SHOW=y +CONFIG_GENERIC_LIB_ASHLDI3=y +CONFIG_GENERIC_LIB_ASHRDI3=y +CONFIG_GENERIC_LIB_CMPDI2=y +CONFIG_GENERIC_LIB_LSHRDI3=y +CONFIG_GENERIC_LIB_UCMPDI2=y +CONFIG_GENERIC_PCI_IOMAP=y +CONFIG_GENERIC_SCHED_CLOCK=y +CONFIG_GENERIC_SMP_IDLE_THREAD=y +CONFIG_GENERIC_TIME_VSYSCALL=y +CONFIG_GPIOLIB=y +CONFIG_GPIO_AR2315=y +CONFIG_GPIO_AR5312=y +CONFIG_HANDLE_DOMAIN_IRQ=y +CONFIG_HARDWARE_WATCHPOINTS=y +CONFIG_HAS_DMA=y +CONFIG_HAS_IOMEM=y +CONFIG_HAS_IOPORT_MAP=y +CONFIG_HW_RANDOM=y +CONFIG_HZ_PERIODIC=y +CONFIG_INITRAMFS_SOURCE="" +CONFIG_IP17XX_PHY=y +CONFIG_IRQ_DOMAIN=y +CONFIG_IRQ_FORCED_THREADING=y +CONFIG_IRQ_MIPS_CPU=y +CONFIG_IRQ_WORK=y +CONFIG_LEDS_GPIO=y +CONFIG_LOCK_DEBUGGING_SUPPORT=y +CONFIG_MDIO_BUS=y +CONFIG_MDIO_DEVICE=y +CONFIG_MDIO_DEVRES=y +CONFIG_MEMFD_CREATE=y +CONFIG_MIGRATION=y +CONFIG_MIPS=y +CONFIG_MIPS_ASID_BITS=8 +CONFIG_MIPS_ASID_SHIFT=0 +CONFIG_MIPS_CLOCK_VSYSCALL=y +# CONFIG_MIPS_CMDLINE_BUILTIN_EXTEND is not set +CONFIG_MIPS_CMDLINE_FROM_BOOTLOADER=y +CONFIG_MIPS_EBPF_JIT=y +CONFIG_MIPS_L1_CACHE_SHIFT=5 +CONFIG_MIPS_LD_CAN_LINK_VDSO=y +CONFIG_MODULES_USE_ELF_REL=y +CONFIG_MTD_AR2315=y +CONFIG_MTD_CFI_ADV_OPTIONS=y +# CONFIG_MTD_CFI_GEOMETRY is not set +# CONFIG_MTD_CFI_INTELEXT is not set +CONFIG_MTD_MYLOADER_PARTS=y +CONFIG_MTD_PHYSMAP=y +CONFIG_MTD_REDBOOT_DIRECTORY_BLOCK=-3 +CONFIG_MTD_REDBOOT_PARTS=y +CONFIG_MVSWITCH_PHY=y +CONFIG_NEED_DMA_MAP_STATE=y +CONFIG_NEED_PER_CPU_KM=y +CONFIG_NET_AR231X=y +CONFIG_NO_GENERIC_PCI_IOPORT_MAP=y +# CONFIG_OF is not set +CONFIG_PCI=y +CONFIG_PCI_AR2315=y +CONFIG_PCI_DISABLE_COMMON_QUIRKS=y +CONFIG_PCI_DOMAINS=y +CONFIG_PCI_DRIVERS_LEGACY=y +CONFIG_PERF_USE_VMALLOC=y +CONFIG_PGTABLE_LEVELS=2 +CONFIG_PHYLIB=y +CONFIG_SERIAL_8250_NR_UARTS=1 +CONFIG_SERIAL_8250_RUNTIME_UARTS=1 +CONFIG_SERIAL_MCTRL_GPIO=y +CONFIG_SOC_AR2315=y +CONFIG_SOC_AR5312=y +CONFIG_SRCU=y +# CONFIG_SWAP is not set +CONFIG_SWCONFIG=y +CONFIG_SYSCTL_EXCEPTION_TRACE=y +CONFIG_SYS_HAS_CPU_MIPS32_R1=y +CONFIG_SYS_HAS_EARLY_PRINTK=y +CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y +CONFIG_SYS_SUPPORTS_ARBIT_HZ=y +CONFIG_SYS_SUPPORTS_BIG_ENDIAN=y +CONFIG_TARGET_ISA_REV=1 +CONFIG_TICK_CPU_ACCOUNTING=y +CONFIG_TINY_SRCU=y +CONFIG_USB_SUPPORT=y diff --git a/target/linux/ath25/config-5.4 b/target/linux/ath25/config-5.4 index 4b47470699..10b81f0e03 100644 --- a/target/linux/ath25/config-5.4 +++ b/target/linux/ath25/config-5.4 @@ -3,25 +3,10 @@ CONFIG_AR2315_WDT=y CONFIG_AR8216_PHY=y CONFIG_ARCH_32BIT_OFF_T=y CONFIG_ARCH_CLOCKSOURCE_DATA=y -CONFIG_ARCH_HAS_DMA_COHERENT_TO_PFN=y -CONFIG_ARCH_HAS_DMA_PREP_COHERENT=y -CONFIG_ARCH_HAS_DMA_WRITE_COMBINE=y -CONFIG_ARCH_HAS_ELF_RANDOMIZE=y -CONFIG_ARCH_HAS_PHYS_TO_DMA=y -CONFIG_ARCH_HAS_PTE_SPECIAL=y -CONFIG_ARCH_HAS_SYNC_DMA_FOR_DEVICE=y -CONFIG_ARCH_HAS_UNCACHED_SEGMENT=y CONFIG_ARCH_HIBERNATION_POSSIBLE=y CONFIG_ARCH_MMAP_RND_BITS_MAX=15 CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MAX=15 -CONFIG_ARCH_SUPPORTS_UPROBES=y CONFIG_ARCH_SUSPEND_POSSIBLE=y -CONFIG_ARCH_USE_BUILTIN_BSWAP=y -CONFIG_ARCH_USE_MEMREMAP_PROT=y -CONFIG_ARCH_USE_QUEUED_RWLOCKS=y -CONFIG_ARCH_USE_QUEUED_SPINLOCKS=y -CONFIG_ARCH_WANT_DEFAULT_TOPDOWN_MMAP_LAYOUT=y -CONFIG_ARCH_WANT_IPC_PARSE_VERSION=y CONFIG_ATH25=y CONFIG_BLK_MQ_PCI=y CONFIG_CEVT_R4K=y @@ -42,16 +27,13 @@ CONFIG_CPU_NEEDS_NO_SMARTMIPS_OR_MICROMIPS=y CONFIG_CPU_R4K_CACHE_TLB=y CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y CONFIG_CPU_SUPPORTS_HIGHMEM=y +CONFIG_CRYPTO_LIB_POLY1305_RSIZE=2 CONFIG_CRYPTO_RNG2=y CONFIG_CSRC_R4K=y CONFIG_DMA_NONCOHERENT=y CONFIG_DMA_NONCOHERENT_CACHE_SYNC=y CONFIG_EARLY_PRINTK=y -CONFIG_EFI_EARLYCON=y CONFIG_ETHERNET_PACKET_MANGLE=y -CONFIG_FONT_8x16=y -CONFIG_FONT_AUTOSELECT=y -CONFIG_FONT_SUPPORT=y CONFIG_FORCE_PCI=y CONFIG_FW_LOADER_PAGED_BUF=y CONFIG_GENERIC_ATOMIC64=y @@ -80,40 +62,6 @@ CONFIG_HARDWARE_WATCHPOINTS=y CONFIG_HAS_DMA=y CONFIG_HAS_IOMEM=y CONFIG_HAS_IOPORT_MAP=y -CONFIG_HAVE_ARCH_COMPILER_H=y -CONFIG_HAVE_ARCH_JUMP_LABEL=y -CONFIG_HAVE_ARCH_KGDB=y -CONFIG_HAVE_ARCH_SECCOMP_FILTER=y -CONFIG_HAVE_ARCH_TRACEHOOK=y -CONFIG_HAVE_ASM_MODVERSIONS=y -CONFIG_HAVE_CBPF_JIT=y -CONFIG_HAVE_CONTEXT_TRACKING=y -CONFIG_HAVE_COPY_THREAD_TLS=y -CONFIG_HAVE_C_RECORDMCOUNT=y -CONFIG_HAVE_DEBUG_KMEMLEAK=y -CONFIG_HAVE_DEBUG_STACKOVERFLOW=y -CONFIG_HAVE_DMA_CONTIGUOUS=y -CONFIG_HAVE_DYNAMIC_FTRACE=y -CONFIG_HAVE_FAST_GUP=y -CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y -CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y -CONFIG_HAVE_FUNCTION_TRACER=y -CONFIG_HAVE_GENERIC_VDSO=y -CONFIG_HAVE_IDE=y -CONFIG_HAVE_IOREMAP_PROT=y -CONFIG_HAVE_IRQ_EXIT_ON_IRQ_STACK=y -CONFIG_HAVE_IRQ_TIME_ACCOUNTING=y -CONFIG_HAVE_LD_DEAD_CODE_DATA_ELIMINATION=y -CONFIG_HAVE_MEMBLOCK_NODE_MAP=y -CONFIG_HAVE_MOD_ARCH_SPECIFIC=y -CONFIG_HAVE_NET_DSA=y -CONFIG_HAVE_OPROFILE=y -CONFIG_HAVE_PCI=y -CONFIG_HAVE_PERF_EVENTS=y -CONFIG_HAVE_REGS_AND_STACK_ACCESS_API=y -CONFIG_HAVE_RSEQ=y -CONFIG_HAVE_SYSCALL_TRACEPOINTS=y -CONFIG_HAVE_VIRT_CPU_ACCOUNTING_GEN=y CONFIG_HW_RANDOM=y CONFIG_HZ_PERIODIC=y CONFIG_INITRAMFS_SOURCE="" @@ -131,10 +79,10 @@ CONFIG_MIGRATION=y CONFIG_MIPS=y CONFIG_MIPS_ASID_BITS=8 CONFIG_MIPS_ASID_SHIFT=0 -CONFIG_MIPS_CBPF_JIT=y CONFIG_MIPS_CLOCK_VSYSCALL=y # CONFIG_MIPS_CMDLINE_BUILTIN_EXTEND is not set CONFIG_MIPS_CMDLINE_FROM_BOOTLOADER=y +CONFIG_MIPS_EBPF_JIT=y CONFIG_MIPS_L1_CACHE_SHIFT=5 CONFIG_MODULES_USE_ELF_REL=y CONFIG_MTD_AR2315=y diff --git a/target/linux/generic/files/drivers/net/phy/mvswitch.c b/target/linux/ath25/files/drivers/net/phy/mvswitch.c similarity index 100% rename from target/linux/generic/files/drivers/net/phy/mvswitch.c rename to target/linux/ath25/files/drivers/net/phy/mvswitch.c diff --git a/target/linux/generic/files/drivers/net/phy/mvswitch.h b/target/linux/ath25/files/drivers/net/phy/mvswitch.h similarity index 100% rename from target/linux/generic/files/drivers/net/phy/mvswitch.h rename to target/linux/ath25/files/drivers/net/phy/mvswitch.h diff --git a/target/linux/ath25/patches-5.10/107-ar5312_gpio.patch b/target/linux/ath25/patches-5.10/107-ar5312_gpio.patch new file mode 100644 index 0000000000..a1efdbeeae --- /dev/null +++ b/target/linux/ath25/patches-5.10/107-ar5312_gpio.patch @@ -0,0 +1,212 @@ +--- a/arch/mips/ath25/Kconfig ++++ b/arch/mips/ath25/Kconfig +@@ -2,6 +2,7 @@ + config SOC_AR5312 + bool "Atheros AR5312/AR2312+ SoC support" + depends on ATH25 ++ select GPIO_AR5312 + default y + + config SOC_AR2315 +--- a/arch/mips/ath25/ar5312.c ++++ b/arch/mips/ath25/ar5312.c +@@ -23,6 +23,7 @@ + #include + #include + #include ++#include + #include + #include + #include +@@ -178,6 +179,22 @@ static struct platform_device ar5312_phy + .num_resources = 1, + }; + ++static struct resource ar5312_gpio_res[] = { ++ { ++ .name = "ar5312-gpio", ++ .flags = IORESOURCE_MEM, ++ .start = AR5312_GPIO_BASE, ++ .end = AR5312_GPIO_BASE + AR5312_GPIO_SIZE - 1, ++ }, ++}; ++ ++static struct platform_device ar5312_gpio = { ++ .name = "ar5312-gpio", ++ .id = -1, ++ .resource = ar5312_gpio_res, ++ .num_resources = ARRAY_SIZE(ar5312_gpio_res), ++}; ++ + static void __init ar5312_flash_init(void) + { + void __iomem *flashctl_base; +@@ -245,6 +262,8 @@ void __init ar5312_init_devices(void) + + platform_device_register(&ar5312_physmap_flash); + ++ platform_device_register(&ar5312_gpio); ++ + switch (ath25_soc) { + case ATH25_SOC_AR5312: + if (!ath25_board.radio) +--- a/drivers/gpio/Kconfig ++++ b/drivers/gpio/Kconfig +@@ -142,6 +142,13 @@ config GPIO_AMDPT + driver for GPIO functionality on Promontory IOHub + Require ACPI ASL code to enumerate as a platform device. + ++config GPIO_AR5312 ++ bool "AR5312 SoC GPIO support" ++ default y if SOC_AR5312 ++ depends on SOC_AR5312 ++ help ++ Say yes here to enable GPIO support for Atheros AR5312/AR2312+ SoCs. ++ + config GPIO_ASPEED + tristate "Aspeed GPIO support" + depends on (ARCH_ASPEED || COMPILE_TEST) && OF_GPIO +--- a/drivers/gpio/Makefile ++++ b/drivers/gpio/Makefile +@@ -32,6 +32,7 @@ obj-$(CONFIG_GPIO_ALTERA) += gpio-alt + obj-$(CONFIG_GPIO_AMD8111) += gpio-amd8111.o + obj-$(CONFIG_GPIO_AMD_FCH) += gpio-amd-fch.o + obj-$(CONFIG_GPIO_AMDPT) += gpio-amdpt.o ++obj-$(CONFIG_GPIO_AR5312) += gpio-ar5312.o + obj-$(CONFIG_GPIO_ARIZONA) += gpio-arizona.o + obj-$(CONFIG_GPIO_ASPEED) += gpio-aspeed.o + obj-$(CONFIG_GPIO_ASPEED_SGPIO) += gpio-aspeed-sgpio.o +--- /dev/null ++++ b/drivers/gpio/gpio-ar5312.c +@@ -0,0 +1,121 @@ ++/* ++ * This file is subject to the terms and conditions of the GNU General Public ++ * License. See the file "COPYING" in the main directory of this archive ++ * for more details. ++ * ++ * Copyright (C) 2003 Atheros Communications, Inc., All Rights Reserved. ++ * Copyright (C) 2006 FON Technology, SL. ++ * Copyright (C) 2006 Imre Kaloz ++ * Copyright (C) 2006-2009 Felix Fietkau ++ * Copyright (C) 2012 Alexandros C. Couloumbis ++ */ ++ ++#include ++#include ++#include ++#include ++ ++#define DRIVER_NAME "ar5312-gpio" ++ ++#define AR5312_GPIO_DO 0x00 /* output register */ ++#define AR5312_GPIO_DI 0x04 /* intput register */ ++#define AR5312_GPIO_CR 0x08 /* control register */ ++ ++#define AR5312_GPIO_CR_M(x) (1 << (x)) /* mask for i/o */ ++#define AR5312_GPIO_CR_O(x) (0 << (x)) /* mask for output */ ++#define AR5312_GPIO_CR_I(x) (1 << (x)) /* mask for input */ ++#define AR5312_GPIO_CR_INT(x) (1 << ((x)+8)) /* mask for interrupt */ ++#define AR5312_GPIO_CR_UART(x) (1 << ((x)+16)) /* uart multiplex */ ++ ++#define AR5312_GPIO_NUM 8 ++ ++static void __iomem *ar5312_mem; ++ ++static inline u32 ar5312_gpio_reg_read(unsigned reg) ++{ ++ return __raw_readl(ar5312_mem + reg); ++} ++ ++static inline void ar5312_gpio_reg_write(unsigned reg, u32 val) ++{ ++ __raw_writel(val, ar5312_mem + reg); ++} ++ ++static inline void ar5312_gpio_reg_mask(unsigned reg, u32 mask, u32 val) ++{ ++ ar5312_gpio_reg_write(reg, (ar5312_gpio_reg_read(reg) & ~mask) | val); ++} ++ ++static int ar5312_gpio_get_val(struct gpio_chip *chip, unsigned gpio) ++{ ++ return (ar5312_gpio_reg_read(AR5312_GPIO_DI) >> gpio) & 1; ++} ++ ++static void ar5312_gpio_set_val(struct gpio_chip *chip, unsigned gpio, int val) ++{ ++ u32 reg = ar5312_gpio_reg_read(AR5312_GPIO_DO); ++ ++ reg = val ? reg | (1 << gpio) : reg & ~(1 << gpio); ++ ar5312_gpio_reg_write(AR5312_GPIO_DO, reg); ++} ++ ++static int ar5312_gpio_dir_in(struct gpio_chip *chip, unsigned gpio) ++{ ++ ar5312_gpio_reg_mask(AR5312_GPIO_CR, 0, 1 << gpio); ++ return 0; ++} ++ ++static int ar5312_gpio_dir_out(struct gpio_chip *chip, unsigned gpio, int val) ++{ ++ ar5312_gpio_reg_mask(AR5312_GPIO_CR, 1 << gpio, 0); ++ ar5312_gpio_set_val(chip, gpio, val); ++ return 0; ++} ++ ++static struct gpio_chip ar5312_gpio_chip = { ++ .label = DRIVER_NAME, ++ .direction_input = ar5312_gpio_dir_in, ++ .direction_output = ar5312_gpio_dir_out, ++ .set = ar5312_gpio_set_val, ++ .get = ar5312_gpio_get_val, ++ .base = 0, ++ .ngpio = AR5312_GPIO_NUM, ++}; ++ ++static int ar5312_gpio_probe(struct platform_device *pdev) ++{ ++ struct device *dev = &pdev->dev; ++ struct resource *res; ++ int ret; ++ ++ if (ar5312_mem) ++ return -EBUSY; ++ ++ res = platform_get_resource(pdev, IORESOURCE_MEM, 0); ++ ar5312_mem = devm_ioremap_resource(dev, res); ++ if (IS_ERR(ar5312_mem)) ++ return PTR_ERR(ar5312_mem); ++ ++ ar5312_gpio_chip.parent = dev; ++ ret = gpiochip_add(&ar5312_gpio_chip); ++ if (ret) { ++ dev_err(dev, "failed to add gpiochip\n"); ++ return ret; ++ } ++ ++ return 0; ++} ++ ++static struct platform_driver ar5312_gpio_driver = { ++ .probe = ar5312_gpio_probe, ++ .driver = { ++ .name = DRIVER_NAME, ++ .owner = THIS_MODULE, ++ } ++}; ++ ++static int __init ar5312_gpio_init(void) ++{ ++ return platform_driver_register(&ar5312_gpio_driver); ++} ++subsys_initcall(ar5312_gpio_init); +--- a/arch/mips/Kconfig ++++ b/arch/mips/Kconfig +@@ -219,6 +219,7 @@ config ATH25 + select CEVT_R4K + select CSRC_R4K + select DMA_NONCOHERENT ++ select GPIOLIB + select IRQ_MIPS_CPU + select IRQ_DOMAIN + select SYS_HAS_CPU_MIPS32_R1 diff --git a/target/linux/ath25/patches-5.10/108-ar2315_gpio.patch b/target/linux/ath25/patches-5.10/108-ar2315_gpio.patch new file mode 100644 index 0000000000..10289086e8 --- /dev/null +++ b/target/linux/ath25/patches-5.10/108-ar2315_gpio.patch @@ -0,0 +1,363 @@ +--- a/arch/mips/ath25/Kconfig ++++ b/arch/mips/ath25/Kconfig +@@ -8,6 +8,7 @@ config SOC_AR5312 + config SOC_AR2315 + bool "Atheros AR2315+ SoC support" + depends on ATH25 ++ select GPIO_AR2315 + default y + + config PCI_AR2315 +--- a/arch/mips/ath25/ar2315.c ++++ b/arch/mips/ath25/ar2315.c +@@ -22,6 +22,8 @@ + #include + #include + #include ++#include ++#include + #include + #include + #include +@@ -165,11 +167,42 @@ void __init ar2315_arch_init_irq(void) + ar2315_misc_irq_domain = domain; + } + ++static struct resource ar2315_gpio_res[] = { ++ { ++ .name = "ar2315-gpio", ++ .flags = IORESOURCE_MEM, ++ .start = AR2315_RST_BASE + AR2315_GPIO, ++ .end = AR2315_RST_BASE + AR2315_GPIO + 0x10 - 1, ++ }, ++ { ++ .name = "ar2315-gpio", ++ .flags = IORESOURCE_IRQ, ++ }, ++ { ++ .name = "ar2315-gpio-irq-base", ++ .flags = IORESOURCE_IRQ, ++ .start = AR231X_GPIO_IRQ_BASE, ++ .end = AR231X_GPIO_IRQ_BASE, ++ } ++}; ++ ++static struct platform_device ar2315_gpio = { ++ .id = -1, ++ .name = "ar2315-gpio", ++ .resource = ar2315_gpio_res, ++ .num_resources = ARRAY_SIZE(ar2315_gpio_res) ++}; ++ + void __init ar2315_init_devices(void) + { + /* Find board configuration */ + ath25_find_config(AR2315_SPI_READ_BASE, AR2315_SPI_READ_SIZE); + ++ ar2315_gpio_res[1].start = irq_create_mapping(ar2315_misc_irq_domain, ++ AR2315_MISC_IRQ_GPIO); ++ ar2315_gpio_res[1].end = ar2315_gpio_res[1].start; ++ platform_device_register(&ar2315_gpio); ++ + ath25_add_wmac(0, AR2315_WLAN0_BASE, AR2315_IRQ_WLAN0); + } + +@@ -185,8 +218,8 @@ static void ar2315_restart(char *command + /* Cold reset does not work on the AR2315/6, use the GPIO reset bits + * a workaround. Give it some time to attempt a gpio based hardware + * reset (atheros reference design workaround) */ +- +- /* TODO: implement the GPIO reset workaround */ ++ gpio_request_one(AR2315_RESET_GPIO, GPIOF_OUT_INIT_LOW, "Reset"); ++ mdelay(100); + + /* Some boards (e.g. Senao EOC-2610) don't implement the reset logic + * workaround. Attempt to jump to the mips reset location - +--- a/drivers/gpio/Kconfig ++++ b/drivers/gpio/Kconfig +@@ -142,6 +142,13 @@ config GPIO_AMDPT + driver for GPIO functionality on Promontory IOHub + Require ACPI ASL code to enumerate as a platform device. + ++config GPIO_AR2315 ++ bool "AR2315 SoC GPIO support" ++ default y if SOC_AR2315 ++ depends on SOC_AR2315 ++ help ++ Say yes here to enable GPIO support for Atheros AR2315+ SoCs. ++ + config GPIO_AR5312 + bool "AR5312 SoC GPIO support" + default y if SOC_AR5312 +--- a/drivers/gpio/Makefile ++++ b/drivers/gpio/Makefile +@@ -32,6 +32,7 @@ obj-$(CONFIG_GPIO_ALTERA) += gpio-alt + obj-$(CONFIG_GPIO_AMD8111) += gpio-amd8111.o + obj-$(CONFIG_GPIO_AMD_FCH) += gpio-amd-fch.o + obj-$(CONFIG_GPIO_AMDPT) += gpio-amdpt.o ++obj-$(CONFIG_GPIO_AR2315) += gpio-ar2315.o + obj-$(CONFIG_GPIO_AR5312) += gpio-ar5312.o + obj-$(CONFIG_GPIO_ARIZONA) += gpio-arizona.o + obj-$(CONFIG_GPIO_ASPEED) += gpio-aspeed.o +--- /dev/null ++++ b/drivers/gpio/gpio-ar2315.c +@@ -0,0 +1,233 @@ ++/* ++ * This file is subject to the terms and conditions of the GNU General Public ++ * License. See the file "COPYING" in the main directory of this archive ++ * for more details. ++ * ++ * Copyright (C) 2003 Atheros Communications, Inc., All Rights Reserved. ++ * Copyright (C) 2006 FON Technology, SL. ++ * Copyright (C) 2006 Imre Kaloz ++ * Copyright (C) 2006 Felix Fietkau ++ * Copyright (C) 2012 Alexandros C. Couloumbis ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++ ++#define DRIVER_NAME "ar2315-gpio" ++ ++#define AR2315_GPIO_DI 0x0000 ++#define AR2315_GPIO_DO 0x0008 ++#define AR2315_GPIO_DIR 0x0010 ++#define AR2315_GPIO_INT 0x0018 ++ ++#define AR2315_GPIO_DIR_M(x) (1 << (x)) /* mask for i/o */ ++#define AR2315_GPIO_DIR_O(x) (1 << (x)) /* output */ ++#define AR2315_GPIO_DIR_I(x) (0) /* input */ ++ ++#define AR2315_GPIO_INT_NUM_M 0x3F /* mask for GPIO num */ ++#define AR2315_GPIO_INT_TRIG(x) ((x) << 6) /* interrupt trigger */ ++#define AR2315_GPIO_INT_TRIG_M (0x3 << 6) /* mask for int trig */ ++ ++#define AR2315_GPIO_INT_TRIG_OFF 0 /* Triggerring off */ ++#define AR2315_GPIO_INT_TRIG_LOW 1 /* Low Level Triggered */ ++#define AR2315_GPIO_INT_TRIG_HIGH 2 /* High Level Triggered */ ++#define AR2315_GPIO_INT_TRIG_EDGE 3 /* Edge Triggered */ ++ ++#define AR2315_GPIO_NUM 22 ++ ++static u32 ar2315_gpio_intmask; ++static u32 ar2315_gpio_intval; ++static unsigned ar2315_gpio_irq_base; ++static void __iomem *ar2315_mem; ++ ++static inline u32 ar2315_gpio_reg_read(unsigned reg) ++{ ++ return __raw_readl(ar2315_mem + reg); ++} ++ ++static inline void ar2315_gpio_reg_write(unsigned reg, u32 val) ++{ ++ __raw_writel(val, ar2315_mem + reg); ++} ++ ++static inline void ar2315_gpio_reg_mask(unsigned reg, u32 mask, u32 val) ++{ ++ ar2315_gpio_reg_write(reg, (ar2315_gpio_reg_read(reg) & ~mask) | val); ++} ++ ++static void ar2315_gpio_irq_handler(struct irq_desc *desc) ++{ ++ u32 pend; ++ int bit = -1; ++ ++ /* only do one gpio interrupt at a time */ ++ pend = ar2315_gpio_reg_read(AR2315_GPIO_DI); ++ pend ^= ar2315_gpio_intval; ++ pend &= ar2315_gpio_intmask; ++ ++ if (pend) { ++ bit = fls(pend) - 1; ++ pend &= ~(1 << bit); ++ ar2315_gpio_intval ^= (1 << bit); ++ } ++ ++ /* Enable interrupt with edge detection */ ++ if ((ar2315_gpio_reg_read(AR2315_GPIO_DIR) & AR2315_GPIO_DIR_M(bit)) != ++ AR2315_GPIO_DIR_I(bit)) ++ return; ++ ++ if (bit >= 0) ++ generic_handle_irq(ar2315_gpio_irq_base + bit); ++} ++ ++static void ar2315_gpio_int_setup(unsigned gpio, int trig) ++{ ++ u32 reg = ar2315_gpio_reg_read(AR2315_GPIO_INT); ++ ++ reg &= ~(AR2315_GPIO_INT_NUM_M | AR2315_GPIO_INT_TRIG_M); ++ reg |= gpio | AR2315_GPIO_INT_TRIG(trig); ++ ar2315_gpio_reg_write(AR2315_GPIO_INT, reg); ++} ++ ++static void ar2315_gpio_irq_unmask(struct irq_data *d) ++{ ++ unsigned gpio = d->irq - ar2315_gpio_irq_base; ++ u32 dir = ar2315_gpio_reg_read(AR2315_GPIO_DIR); ++ ++ /* Enable interrupt with edge detection */ ++ if ((dir & AR2315_GPIO_DIR_M(gpio)) != AR2315_GPIO_DIR_I(gpio)) ++ return; ++ ++ ar2315_gpio_intmask |= (1 << gpio); ++ ar2315_gpio_int_setup(gpio, AR2315_GPIO_INT_TRIG_EDGE); ++} ++ ++static void ar2315_gpio_irq_mask(struct irq_data *d) ++{ ++ unsigned gpio = d->irq - ar2315_gpio_irq_base; ++ ++ /* Disable interrupt */ ++ ar2315_gpio_intmask &= ~(1 << gpio); ++ ar2315_gpio_int_setup(gpio, AR2315_GPIO_INT_TRIG_OFF); ++} ++ ++static struct irq_chip ar2315_gpio_irq_chip = { ++ .name = DRIVER_NAME, ++ .irq_unmask = ar2315_gpio_irq_unmask, ++ .irq_mask = ar2315_gpio_irq_mask, ++}; ++ ++static void ar2315_gpio_irq_init(unsigned irq) ++{ ++ unsigned i; ++ ++ ar2315_gpio_intval = ar2315_gpio_reg_read(AR2315_GPIO_DI); ++ for (i = 0; i < AR2315_GPIO_NUM; i++) { ++ unsigned _irq = ar2315_gpio_irq_base + i; ++ ++ irq_set_chip_and_handler(_irq, &ar2315_gpio_irq_chip, ++ handle_level_irq); ++ } ++ irq_set_chained_handler(irq, ar2315_gpio_irq_handler); ++} ++ ++static int ar2315_gpio_get_val(struct gpio_chip *chip, unsigned gpio) ++{ ++ return (ar2315_gpio_reg_read(AR2315_GPIO_DI) >> gpio) & 1; ++} ++ ++static void ar2315_gpio_set_val(struct gpio_chip *chip, unsigned gpio, int val) ++{ ++ u32 reg = ar2315_gpio_reg_read(AR2315_GPIO_DO); ++ ++ reg = val ? reg | (1 << gpio) : reg & ~(1 << gpio); ++ ar2315_gpio_reg_write(AR2315_GPIO_DO, reg); ++} ++ ++static int ar2315_gpio_dir_in(struct gpio_chip *chip, unsigned gpio) ++{ ++ ar2315_gpio_reg_mask(AR2315_GPIO_DIR, 1 << gpio, 0); ++ return 0; ++} ++ ++static int ar2315_gpio_dir_out(struct gpio_chip *chip, unsigned gpio, int val) ++{ ++ ar2315_gpio_reg_mask(AR2315_GPIO_DIR, 0, 1 << gpio); ++ ar2315_gpio_set_val(chip, gpio, val); ++ return 0; ++} ++ ++static int ar2315_gpio_to_irq(struct gpio_chip *chip, unsigned gpio) ++{ ++ return ar2315_gpio_irq_base + gpio; ++} ++ ++static struct gpio_chip ar2315_gpio_chip = { ++ .label = DRIVER_NAME, ++ .direction_input = ar2315_gpio_dir_in, ++ .direction_output = ar2315_gpio_dir_out, ++ .set = ar2315_gpio_set_val, ++ .get = ar2315_gpio_get_val, ++ .to_irq = ar2315_gpio_to_irq, ++ .base = 0, ++ .ngpio = AR2315_GPIO_NUM, ++}; ++ ++static int ar2315_gpio_probe(struct platform_device *pdev) ++{ ++ struct device *dev = &pdev->dev; ++ struct resource *res; ++ unsigned irq; ++ int ret; ++ ++ if (ar2315_mem) ++ return -EBUSY; ++ ++ res = platform_get_resource_byname(pdev, IORESOURCE_IRQ, ++ "ar2315-gpio-irq-base"); ++ if (!res) { ++ dev_err(dev, "not found GPIO IRQ base\n"); ++ return -ENXIO; ++ } ++ ar2315_gpio_irq_base = res->start; ++ ++ res = platform_get_resource_byname(pdev, IORESOURCE_IRQ, DRIVER_NAME); ++ if (!res) { ++ dev_err(dev, "not found IRQ number\n"); ++ return -ENXIO; ++ } ++ irq = res->start; ++ ++ res = platform_get_resource_byname(pdev, IORESOURCE_MEM, DRIVER_NAME); ++ ar2315_mem = devm_ioremap_resource(dev, res); ++ if (IS_ERR(ar2315_mem)) ++ return PTR_ERR(ar2315_mem); ++ ++ ar2315_gpio_chip.parent = dev; ++ ret = gpiochip_add(&ar2315_gpio_chip); ++ if (ret) { ++ dev_err(dev, "failed to add gpiochip\n"); ++ return ret; ++ } ++ ++ ar2315_gpio_irq_init(irq); ++ ++ return 0; ++} ++ ++static struct platform_driver ar2315_gpio_driver = { ++ .probe = ar2315_gpio_probe, ++ .driver = { ++ .name = DRIVER_NAME, ++ .owner = THIS_MODULE, ++ } ++}; ++ ++static int __init ar2315_gpio_init(void) ++{ ++ return platform_driver_register(&ar2315_gpio_driver); ++} ++subsys_initcall(ar2315_gpio_init); +--- a/arch/mips/ath25/devices.h ++++ b/arch/mips/ath25/devices.h +@@ -4,6 +4,11 @@ + + #include + ++#define AR231X_GPIO_IRQ_BASE 0x30 ++ ++/* GPIO number for AR2315/16 reset issue workaround */ ++#define AR2315_RESET_GPIO 5 ++ + #define ATH25_REG_MS(_val, _field) (((_val) & _field##_M) >> _field##_S) + + #define ATH25_IRQ_CPU_CLOCK (MIPS_CPU_IRQ_BASE + 7) /* C0_CAUSE: 0x8000 */ +--- a/arch/mips/ath25/ar2315_regs.h ++++ b/arch/mips/ath25/ar2315_regs.h +@@ -315,6 +315,9 @@ + #define AR2315_MEM_CFG_BANKADDR_BITS_M 0x00000018 + #define AR2315_MEM_CFG_BANKADDR_BITS_S 3 + ++/* GPIO MMR base address */ ++#define AR2315_GPIO 0x0088 ++ + /* + * Local Bus Interface Registers + */ diff --git a/target/linux/ath25/patches-5.10/110-ar2313_ethernet.patch b/target/linux/ath25/patches-5.10/110-ar2313_ethernet.patch new file mode 100644 index 0000000000..72b8660baa --- /dev/null +++ b/target/linux/ath25/patches-5.10/110-ar2313_ethernet.patch @@ -0,0 +1,1735 @@ +--- a/drivers/net/ethernet/atheros/Makefile ++++ b/drivers/net/ethernet/atheros/Makefile +@@ -9,3 +9,4 @@ obj-$(CONFIG_ATL2) += atlx/ + obj-$(CONFIG_ATL1E) += atl1e/ + obj-$(CONFIG_ATL1C) += atl1c/ + obj-$(CONFIG_ALX) += alx/ ++obj-$(CONFIG_NET_AR231X) += ar231x/ +--- a/drivers/net/ethernet/atheros/Kconfig ++++ b/drivers/net/ethernet/atheros/Kconfig +@@ -6,7 +6,7 @@ + config NET_VENDOR_ATHEROS + bool "Atheros devices" + default y +- depends on (PCI || ATH79) ++ depends on (PCI || ATH25 || ATH79) + help + If you have a network (Ethernet) card belonging to this class, say Y. + +@@ -87,4 +87,10 @@ config ALX + To compile this driver as a module, choose M here. The module + will be called alx. + ++config NET_AR231X ++ tristate "Atheros AR231X built-in Ethernet support" ++ depends on ATH25 ++ help ++ Support for the AR231x/531x ethernet controller ++ + endif # NET_VENDOR_ATHEROS +--- /dev/null ++++ b/drivers/net/ethernet/atheros/ar231x/Makefile +@@ -0,0 +1 @@ ++obj-$(CONFIG_NET_AR231X) += ar231x.o +--- /dev/null ++++ b/drivers/net/ethernet/atheros/ar231x/ar231x.c +@@ -0,0 +1,1119 @@ ++/* ++ * ar231x.c: Linux driver for the Atheros AR231x Ethernet device. ++ * ++ * Copyright (C) 2004 by Sameer Dekate ++ * Copyright (C) 2006 Imre Kaloz ++ * Copyright (C) 2006-2009 Felix Fietkau ++ * ++ * Thanks to Atheros for providing hardware and documentation ++ * enabling me to write this driver. ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; either version 2 of the License, or ++ * (at your option) any later version. ++ * ++ * Additional credits: ++ * This code is taken from John Taylor's Sibyte driver and then ++ * modified for the AR2313. ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#define AR2313_MTU 1692 ++#define AR2313_PRIOS 1 ++#define AR2313_QUEUES (2*AR2313_PRIOS) ++#define AR2313_DESCR_ENTRIES 64 ++ ++#ifndef min ++#define min(a, b) (((a) < (b)) ? (a) : (b)) ++#endif ++ ++#ifndef SMP_CACHE_BYTES ++#define SMP_CACHE_BYTES L1_CACHE_BYTES ++#endif ++ ++#define AR2313_MBOX_SET_BIT 0x8 ++ ++#include "ar231x.h" ++ ++/** ++ * New interrupt handler strategy: ++ * ++ * An old interrupt handler worked using the traditional method of ++ * replacing an skbuff with a new one when a packet arrives. However ++ * the rx rings do not need to contain a static number of buffer ++ * descriptors, thus it makes sense to move the memory allocation out ++ * of the main interrupt handler and do it in a bottom half handler ++ * and only allocate new buffers when the number of buffers in the ++ * ring is below a certain threshold. In order to avoid starving the ++ * NIC under heavy load it is however necessary to force allocation ++ * when hitting a minimum threshold. The strategy for alloction is as ++ * follows: ++ * ++ * RX_LOW_BUF_THRES - allocate buffers in the bottom half ++ * RX_PANIC_LOW_THRES - we are very low on buffers, allocate ++ * the buffers in the interrupt handler ++ * RX_RING_THRES - maximum number of buffers in the rx ring ++ * ++ * One advantagous side effect of this allocation approach is that the ++ * entire rx processing can be done without holding any spin lock ++ * since the rx rings and registers are totally independent of the tx ++ * ring and its registers. This of course includes the kmalloc's of ++ * new skb's. Thus start_xmit can run in parallel with rx processing ++ * and the memory allocation on SMP systems. ++ * ++ * Note that running the skb reallocation in a bottom half opens up ++ * another can of races which needs to be handled properly. In ++ * particular it can happen that the interrupt handler tries to run ++ * the reallocation while the bottom half is either running on another ++ * CPU or was interrupted on the same CPU. To get around this the ++ * driver uses bitops to prevent the reallocation routines from being ++ * reentered. ++ * ++ * TX handling can also be done without holding any spin lock, wheee ++ * this is fun! since tx_csm is only written to by the interrupt ++ * handler. ++ */ ++ ++/** ++ * Threshold values for RX buffer allocation - the low water marks for ++ * when to start refilling the rings are set to 75% of the ring ++ * sizes. It seems to make sense to refill the rings entirely from the ++ * intrrupt handler once it gets below the panic threshold, that way ++ * we don't risk that the refilling is moved to another CPU when the ++ * one running the interrupt handler just got the slab code hot in its ++ * cache. ++ */ ++#define RX_RING_SIZE AR2313_DESCR_ENTRIES ++#define RX_PANIC_THRES (RX_RING_SIZE/4) ++#define RX_LOW_THRES ((3*RX_RING_SIZE)/4) ++#define CRC_LEN 4 ++#define RX_OFFSET 2 ++ ++#if defined(CONFIG_VLAN_8021Q) || defined(CONFIG_VLAN_8021Q_MODULE) ++#define VLAN_HDR 4 ++#else ++#define VLAN_HDR 0 ++#endif ++ ++#define AR2313_BUFSIZE (AR2313_MTU + VLAN_HDR + ETH_HLEN + CRC_LEN + \ ++ RX_OFFSET) ++ ++#ifdef MODULE ++MODULE_LICENSE("GPL"); ++MODULE_AUTHOR("Sameer Dekate , Imre Kaloz , Felix Fietkau "); ++MODULE_DESCRIPTION("AR231x Ethernet driver"); ++#endif ++ ++#define virt_to_phys(x) ((u32)(x) & 0x1fffffff) ++ ++/* prototypes */ ++static void ar231x_halt(struct net_device *dev); ++static void rx_tasklet_func(unsigned long data); ++static void rx_tasklet_cleanup(struct net_device *dev); ++static void ar231x_multicast_list(struct net_device *dev); ++static void ar231x_tx_timeout(struct net_device *dev, unsigned int txqueue); ++ ++static int ar231x_mdiobus_read(struct mii_bus *bus, int phy_addr, int regnum); ++static int ar231x_mdiobus_write(struct mii_bus *bus, int phy_addr, int regnum, ++ u16 value); ++static int ar231x_mdiobus_reset(struct mii_bus *bus); ++static int ar231x_mdiobus_probe(struct net_device *dev); ++static void ar231x_adjust_link(struct net_device *dev); ++ ++#ifndef ERR ++#define ERR(fmt, args...) printk("%s: " fmt, __func__, ##args) ++#endif ++ ++#ifdef CONFIG_NET_POLL_CONTROLLER ++static void ++ar231x_netpoll(struct net_device *dev) ++{ ++ unsigned long flags; ++ ++ local_irq_save(flags); ++ ar231x_interrupt(dev->irq, dev); ++ local_irq_restore(flags); ++} ++#endif ++ ++static const struct net_device_ops ar231x_ops = { ++ .ndo_open = ar231x_open, ++ .ndo_stop = ar231x_close, ++ .ndo_start_xmit = ar231x_start_xmit, ++ .ndo_set_rx_mode = ar231x_multicast_list, ++ .ndo_do_ioctl = ar231x_ioctl, ++ .ndo_validate_addr = eth_validate_addr, ++ .ndo_set_mac_address = eth_mac_addr, ++ .ndo_tx_timeout = ar231x_tx_timeout, ++#ifdef CONFIG_NET_POLL_CONTROLLER ++ .ndo_poll_controller = ar231x_netpoll, ++#endif ++}; ++ ++static int ar231x_probe(struct platform_device *pdev) ++{ ++ struct net_device *dev; ++ struct ar231x_private *sp; ++ struct resource *res; ++ unsigned long ar_eth_base; ++ char buf[64]; ++ ++ dev = alloc_etherdev(sizeof(struct ar231x_private)); ++ ++ if (dev == NULL) { ++ printk(KERN_ERR ++ "ar231x: Unable to allocate net_device structure!\n"); ++ return -ENOMEM; ++ } ++ ++ platform_set_drvdata(pdev, dev); ++ ++ SET_NETDEV_DEV(dev, &pdev->dev); ++ ++ sp = netdev_priv(dev); ++ sp->dev = dev; ++ sp->pdev = pdev; ++ sp->cfg = pdev->dev.platform_data; ++ ++ sprintf(buf, "eth%d_membase", pdev->id); ++ res = platform_get_resource_byname(pdev, IORESOURCE_MEM, buf); ++ if (!res) ++ return -ENODEV; ++ ++ sp->link = 0; ++ ar_eth_base = res->start; ++ ++ sprintf(buf, "eth%d_irq", pdev->id); ++ dev->irq = platform_get_irq_byname(pdev, buf); ++ ++ spin_lock_init(&sp->lock); ++ ++ dev->features |= NETIF_F_HIGHDMA; ++ dev->netdev_ops = &ar231x_ops; ++ ++ tasklet_init(&sp->rx_tasklet, rx_tasklet_func, (unsigned long)dev); ++ tasklet_disable(&sp->rx_tasklet); ++ ++ sp->eth_regs = ioremap(ar_eth_base, sizeof(*sp->eth_regs)); ++ if (!sp->eth_regs) { ++ printk("Can't remap eth registers\n"); ++ return -ENXIO; ++ } ++ ++ /** ++ * When there's only one MAC, PHY regs are typically on ENET0, ++ * even though the MAC might be on ENET1. ++ * So remap PHY regs separately. ++ */ ++ res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "eth0_mii"); ++ if (!res) { ++ res = platform_get_resource_byname(pdev, IORESOURCE_MEM, ++ "eth1_mii"); ++ if (!res) ++ return -ENODEV; ++ } ++ sp->phy_regs = ioremap(res->start, resource_size(res)); ++ if (!sp->phy_regs) { ++ printk("Can't remap phy registers\n"); ++ return -ENXIO; ++ } ++ ++ sp->dma_regs = ioremap(ar_eth_base + 0x1000, ++ sizeof(*sp->dma_regs)); ++ if (!sp->dma_regs) { ++ printk("Can't remap DMA registers\n"); ++ return -ENXIO; ++ } ++ dev->base_addr = ar_eth_base + 0x1000; ++ ++ strncpy(sp->name, "Atheros AR231x", sizeof(sp->name) - 1); ++ sp->name[sizeof(sp->name) - 1] = '\0'; ++ memcpy(dev->dev_addr, sp->cfg->macaddr, 6); ++ ++ if (ar231x_init(dev)) { ++ /* ar231x_init() calls ar231x_init_cleanup() on error */ ++ kfree(dev); ++ return -ENODEV; ++ } ++ ++ if (register_netdev(dev)) { ++ printk("%s: register_netdev failed\n", __func__); ++ return -1; ++ } ++ ++ printk("%s: %s: %pM, irq %d\n", dev->name, sp->name, dev->dev_addr, ++ dev->irq); ++ ++ sp->mii_bus = mdiobus_alloc(); ++ if (sp->mii_bus == NULL) ++ return -1; ++ ++ sp->mii_bus->priv = dev; ++ sp->mii_bus->read = ar231x_mdiobus_read; ++ sp->mii_bus->write = ar231x_mdiobus_write; ++ sp->mii_bus->reset = ar231x_mdiobus_reset; ++ sp->mii_bus->name = "ar231x_eth_mii"; ++ snprintf(sp->mii_bus->id, MII_BUS_ID_SIZE, "%d", pdev->id); ++ ++ mdiobus_register(sp->mii_bus); ++ ++ if (ar231x_mdiobus_probe(dev) != 0) { ++ printk(KERN_ERR "%s: mdiobus_probe failed\n", dev->name); ++ rx_tasklet_cleanup(dev); ++ ar231x_init_cleanup(dev); ++ unregister_netdev(dev); ++ kfree(dev); ++ return -ENODEV; ++ } ++ ++ return 0; ++} ++ ++static void ar231x_multicast_list(struct net_device *dev) ++{ ++ struct ar231x_private *sp = netdev_priv(dev); ++ unsigned int filter; ++ ++ filter = sp->eth_regs->mac_control; ++ ++ if (dev->flags & IFF_PROMISC) ++ filter |= MAC_CONTROL_PR; ++ else ++ filter &= ~MAC_CONTROL_PR; ++ if ((dev->flags & IFF_ALLMULTI) || (netdev_mc_count(dev) > 0)) ++ filter |= MAC_CONTROL_PM; ++ else ++ filter &= ~MAC_CONTROL_PM; ++ ++ sp->eth_regs->mac_control = filter; ++} ++ ++static void rx_tasklet_cleanup(struct net_device *dev) ++{ ++ struct ar231x_private *sp = netdev_priv(dev); ++ ++ /** ++ * Tasklet may be scheduled. Need to get it removed from the list ++ * since we're about to free the struct. ++ */ ++ ++ sp->unloading = 1; ++ tasklet_enable(&sp->rx_tasklet); ++ tasklet_kill(&sp->rx_tasklet); ++} ++ ++static int ar231x_remove(struct platform_device *pdev) ++{ ++ struct net_device *dev = platform_get_drvdata(pdev); ++ struct ar231x_private *sp = netdev_priv(dev); ++ ++ rx_tasklet_cleanup(dev); ++ ar231x_init_cleanup(dev); ++ unregister_netdev(dev); ++ mdiobus_unregister(sp->mii_bus); ++ mdiobus_free(sp->mii_bus); ++ kfree(dev); ++ return 0; ++} ++ ++/** ++ * Restart the AR2313 ethernet controller. ++ */ ++static int ar231x_restart(struct net_device *dev) ++{ ++ /* disable interrupts */ ++ disable_irq(dev->irq); ++ ++ /* stop mac */ ++ ar231x_halt(dev); ++ ++ /* initialize */ ++ ar231x_init(dev); ++ ++ /* enable interrupts */ ++ enable_irq(dev->irq); ++ ++ return 0; ++} ++ ++static struct platform_driver ar231x_driver = { ++ .driver.name = "ar231x-eth", ++ .probe = ar231x_probe, ++ .remove = ar231x_remove, ++}; ++ ++module_platform_driver(ar231x_driver); ++ ++static void ar231x_free_descriptors(struct net_device *dev) ++{ ++ struct ar231x_private *sp = netdev_priv(dev); ++ ++ if (sp->rx_ring != NULL) { ++ kfree((void *)KSEG0ADDR(sp->rx_ring)); ++ sp->rx_ring = NULL; ++ sp->tx_ring = NULL; ++ } ++} ++ ++static int ar231x_allocate_descriptors(struct net_device *dev) ++{ ++ struct ar231x_private *sp = netdev_priv(dev); ++ int size; ++ int j; ++ ar231x_descr_t *space; ++ ++ if (sp->rx_ring != NULL) { ++ printk("%s: already done.\n", __func__); ++ return 0; ++ } ++ ++ size = sizeof(ar231x_descr_t) * (AR2313_DESCR_ENTRIES * AR2313_QUEUES); ++ space = kmalloc(size, GFP_KERNEL); ++ if (space == NULL) ++ return 1; ++ ++ /* invalidate caches */ ++ dma_cache_inv((unsigned int)space, size); ++ ++ /* now convert pointer to KSEG1 */ ++ space = (ar231x_descr_t *)KSEG1ADDR(space); ++ ++ memset((void *)space, 0, size); ++ ++ sp->rx_ring = space; ++ space += AR2313_DESCR_ENTRIES; ++ ++ sp->tx_ring = space; ++ space += AR2313_DESCR_ENTRIES; ++ ++ /* Initialize the transmit Descriptors */ ++ for (j = 0; j < AR2313_DESCR_ENTRIES; j++) { ++ ar231x_descr_t *td = &sp->tx_ring[j]; ++ ++ td->status = 0; ++ td->devcs = DMA_TX1_CHAINED; ++ td->addr = 0; ++ td->descr = virt_to_phys(&sp->tx_ring[DSC_NEXT(j)]); ++ } ++ ++ return 0; ++} ++ ++/** ++ * Generic cleanup handling data allocated during init. Used when the ++ * module is unloaded or if an error occurs during initialization ++ */ ++static void ar231x_init_cleanup(struct net_device *dev) ++{ ++ struct ar231x_private *sp = netdev_priv(dev); ++ struct sk_buff *skb; ++ int j; ++ ++ ar231x_free_descriptors(dev); ++ ++ if (sp->eth_regs) ++ iounmap((void *)sp->eth_regs); ++ if (sp->dma_regs) ++ iounmap((void *)sp->dma_regs); ++ if (sp->phy_regs) ++ iounmap((void *)sp->phy_regs); ++ ++ if (sp->rx_skb) { ++ for (j = 0; j < AR2313_DESCR_ENTRIES; j++) { ++ skb = sp->rx_skb[j]; ++ if (skb) { ++ sp->rx_skb[j] = NULL; ++ dev_kfree_skb(skb); ++ } ++ } ++ kfree(sp->rx_skb); ++ sp->rx_skb = NULL; ++ } ++ ++ if (sp->tx_skb) { ++ for (j = 0; j < AR2313_DESCR_ENTRIES; j++) { ++ skb = sp->tx_skb[j]; ++ if (skb) { ++ sp->tx_skb[j] = NULL; ++ dev_kfree_skb(skb); ++ } ++ } ++ kfree(sp->tx_skb); ++ sp->tx_skb = NULL; ++ } ++} ++ ++static int ar231x_reset_reg(struct net_device *dev) ++{ ++ struct ar231x_private *sp = netdev_priv(dev); ++ unsigned int ethsal, ethsah; ++ unsigned int flags; ++ ++ sp->cfg->reset_set(sp->cfg->reset_mac); ++ mdelay(10); ++ sp->cfg->reset_clear(sp->cfg->reset_mac); ++ mdelay(10); ++ sp->cfg->reset_set(sp->cfg->reset_phy); ++ mdelay(10); ++ sp->cfg->reset_clear(sp->cfg->reset_phy); ++ mdelay(10); ++ ++ sp->dma_regs->bus_mode = (DMA_BUS_MODE_SWR); ++ mdelay(10); ++ sp->dma_regs->bus_mode = ++ ((32 << DMA_BUS_MODE_PBL_SHIFT) | DMA_BUS_MODE_BLE); ++ ++ /* enable interrupts */ ++ sp->dma_regs->intr_ena = DMA_STATUS_AIS | DMA_STATUS_NIS | ++ DMA_STATUS_RI | DMA_STATUS_TI | ++ DMA_STATUS_FBE; ++ sp->dma_regs->xmt_base = virt_to_phys(sp->tx_ring); ++ sp->dma_regs->rcv_base = virt_to_phys(sp->rx_ring); ++ sp->dma_regs->control = ++ (DMA_CONTROL_SR | DMA_CONTROL_ST | DMA_CONTROL_SF); ++ ++ sp->eth_regs->flow_control = (FLOW_CONTROL_FCE); ++ sp->eth_regs->vlan_tag = (0x8100); ++ ++ /* Enable Ethernet Interface */ ++ flags = (MAC_CONTROL_TE | /* transmit enable */ ++ MAC_CONTROL_PM | /* pass mcast */ ++ MAC_CONTROL_F | /* full duplex */ ++ MAC_CONTROL_HBD); /* heart beat disabled */ ++ ++ if (dev->flags & IFF_PROMISC) { /* set promiscuous mode */ ++ flags |= MAC_CONTROL_PR; ++ } ++ sp->eth_regs->mac_control = flags; ++ ++ /* Set all Ethernet station address registers to their initial values */ ++ ethsah = (((u_int) (dev->dev_addr[5]) << 8) & (u_int) 0x0000FF00) | ++ (((u_int) (dev->dev_addr[4]) << 0) & (u_int) 0x000000FF); ++ ++ ethsal = (((u_int) (dev->dev_addr[3]) << 24) & (u_int) 0xFF000000) | ++ (((u_int) (dev->dev_addr[2]) << 16) & (u_int) 0x00FF0000) | ++ (((u_int) (dev->dev_addr[1]) << 8) & (u_int) 0x0000FF00) | ++ (((u_int) (dev->dev_addr[0]) << 0) & (u_int) 0x000000FF); ++ ++ sp->eth_regs->mac_addr[0] = ethsah; ++ sp->eth_regs->mac_addr[1] = ethsal; ++ ++ mdelay(10); ++ ++ return 0; ++} ++ ++static int ar231x_init(struct net_device *dev) ++{ ++ struct ar231x_private *sp = netdev_priv(dev); ++ int ecode = 0; ++ ++ /* Allocate descriptors */ ++ if (ar231x_allocate_descriptors(dev)) { ++ printk("%s: %s: ar231x_allocate_descriptors failed\n", ++ dev->name, __func__); ++ ecode = -EAGAIN; ++ goto init_error; ++ } ++ ++ /* Get the memory for the skb rings */ ++ if (sp->rx_skb == NULL) { ++ sp->rx_skb = ++ kmalloc(sizeof(struct sk_buff *) * AR2313_DESCR_ENTRIES, ++ GFP_KERNEL); ++ if (!(sp->rx_skb)) { ++ printk("%s: %s: rx_skb kmalloc failed\n", ++ dev->name, __func__); ++ ecode = -EAGAIN; ++ goto init_error; ++ } ++ } ++ memset(sp->rx_skb, 0, sizeof(struct sk_buff *) * AR2313_DESCR_ENTRIES); ++ ++ if (sp->tx_skb == NULL) { ++ sp->tx_skb = ++ kmalloc(sizeof(struct sk_buff *) * AR2313_DESCR_ENTRIES, ++ GFP_KERNEL); ++ if (!(sp->tx_skb)) { ++ printk("%s: %s: tx_skb kmalloc failed\n", ++ dev->name, __func__); ++ ecode = -EAGAIN; ++ goto init_error; ++ } ++ } ++ memset(sp->tx_skb, 0, sizeof(struct sk_buff *) * AR2313_DESCR_ENTRIES); ++ ++ /** ++ * Set tx_csm before we start receiving interrupts, otherwise ++ * the interrupt handler might think it is supposed to process ++ * tx ints before we are up and running, which may cause a null ++ * pointer access in the int handler. ++ */ ++ sp->rx_skbprd = 0; ++ sp->cur_rx = 0; ++ sp->tx_prd = 0; ++ sp->tx_csm = 0; ++ ++ /* Zero the stats before starting the interface */ ++ memset(&dev->stats, 0, sizeof(dev->stats)); ++ ++ /** ++ * We load the ring here as there seem to be no way to tell the ++ * firmware to wipe the ring without re-initializing it. ++ */ ++ ar231x_load_rx_ring(dev, RX_RING_SIZE); ++ ++ /* Init hardware */ ++ ar231x_reset_reg(dev); ++ ++ /* Get the IRQ */ ++ ecode = request_irq(dev->irq, &ar231x_interrupt, 0, ++ dev->name, dev); ++ if (ecode) { ++ printk(KERN_WARNING "%s: %s: Requested IRQ %d is busy\n", ++ dev->name, __func__, dev->irq); ++ goto init_error; ++ } ++ ++ tasklet_enable(&sp->rx_tasklet); ++ ++ return 0; ++ ++init_error: ++ ar231x_init_cleanup(dev); ++ return ecode; ++} ++ ++/** ++ * Load the rx ring. ++ * ++ * Loading rings is safe without holding the spin lock since this is ++ * done only before the device is enabled, thus no interrupts are ++ * generated and by the interrupt handler/tasklet handler. ++ */ ++static void ar231x_load_rx_ring(struct net_device *dev, int nr_bufs) ++{ ++ struct ar231x_private *sp = netdev_priv(dev); ++ short i, idx; ++ ++ idx = sp->rx_skbprd; ++ ++ for (i = 0; i < nr_bufs; i++) { ++ struct sk_buff *skb; ++ ar231x_descr_t *rd; ++ ++ if (sp->rx_skb[idx]) ++ break; ++ ++ skb = netdev_alloc_skb_ip_align(dev, AR2313_BUFSIZE); ++ if (!skb) { ++ printk("\n\n\n\n %s: No memory in system\n\n\n\n", ++ __func__); ++ break; ++ } ++ ++ /* Make sure IP header starts on a fresh cache line */ ++ skb->dev = dev; ++ sp->rx_skb[idx] = skb; ++ ++ rd = (ar231x_descr_t *)&sp->rx_ring[idx]; ++ ++ /* initialize dma descriptor */ ++ rd->devcs = ((AR2313_BUFSIZE << DMA_RX1_BSIZE_SHIFT) | ++ DMA_RX1_CHAINED); ++ rd->addr = virt_to_phys(skb->data); ++ rd->descr = virt_to_phys(&sp->rx_ring[DSC_NEXT(idx)]); ++ rd->status = DMA_RX_OWN; ++ ++ idx = DSC_NEXT(idx); ++ } ++ ++ if (i) ++ sp->rx_skbprd = idx; ++} ++ ++#define AR2313_MAX_PKTS_PER_CALL 64 ++ ++static int ar231x_rx_int(struct net_device *dev) ++{ ++ struct ar231x_private *sp = netdev_priv(dev); ++ struct sk_buff *skb, *skb_new; ++ ar231x_descr_t *rxdesc; ++ unsigned int status; ++ u32 idx; ++ int pkts = 0; ++ int rval; ++ ++ idx = sp->cur_rx; ++ ++ /* process at most the entire ring and then wait for another int */ ++ while (1) { ++ rxdesc = &sp->rx_ring[idx]; ++ status = rxdesc->status; ++ ++ if (status & DMA_RX_OWN) { ++ /* SiByte owns descriptor or descr not yet filled in */ ++ rval = 0; ++ break; ++ } ++ ++ if (++pkts > AR2313_MAX_PKTS_PER_CALL) { ++ rval = 1; ++ break; ++ } ++ ++ if ((status & DMA_RX_ERROR) && !(status & DMA_RX_LONG)) { ++ dev->stats.rx_errors++; ++ dev->stats.rx_dropped++; ++ ++ /* add statistics counters */ ++ if (status & DMA_RX_ERR_CRC) ++ dev->stats.rx_crc_errors++; ++ if (status & DMA_RX_ERR_COL) ++ dev->stats.rx_over_errors++; ++ if (status & DMA_RX_ERR_LENGTH) ++ dev->stats.rx_length_errors++; ++ if (status & DMA_RX_ERR_RUNT) ++ dev->stats.rx_over_errors++; ++ if (status & DMA_RX_ERR_DESC) ++ dev->stats.rx_over_errors++; ++ ++ } else { ++ /* alloc new buffer. */ ++ skb_new = netdev_alloc_skb_ip_align(dev, ++ AR2313_BUFSIZE); ++ if (skb_new != NULL) { ++ skb = sp->rx_skb[idx]; ++ /* set skb */ ++ skb_put(skb, ((status >> DMA_RX_LEN_SHIFT) & ++ 0x3fff) - CRC_LEN); ++ ++ dev->stats.rx_bytes += skb->len; ++ skb->protocol = eth_type_trans(skb, dev); ++ /* pass the packet to upper layers */ ++ netif_rx(skb); ++ ++ skb_new->dev = dev; ++ /* reset descriptor's curr_addr */ ++ rxdesc->addr = virt_to_phys(skb_new->data); ++ ++ dev->stats.rx_packets++; ++ sp->rx_skb[idx] = skb_new; ++ } else { ++ dev->stats.rx_dropped++; ++ } ++ } ++ ++ rxdesc->devcs = ((AR2313_BUFSIZE << DMA_RX1_BSIZE_SHIFT) | ++ DMA_RX1_CHAINED); ++ rxdesc->status = DMA_RX_OWN; ++ ++ idx = DSC_NEXT(idx); ++ } ++ ++ sp->cur_rx = idx; ++ ++ return rval; ++} ++ ++static void ar231x_tx_int(struct net_device *dev) ++{ ++ struct ar231x_private *sp = netdev_priv(dev); ++ u32 idx; ++ struct sk_buff *skb; ++ ar231x_descr_t *txdesc; ++ unsigned int status = 0; ++ ++ idx = sp->tx_csm; ++ ++ while (idx != sp->tx_prd) { ++ txdesc = &sp->tx_ring[idx]; ++ status = txdesc->status; ++ ++ if (status & DMA_TX_OWN) { ++ /* ar231x dma still owns descr */ ++ break; ++ } ++ /* done with this descriptor */ ++ dma_unmap_single(&sp->pdev->dev, txdesc->addr, ++ txdesc->devcs & DMA_TX1_BSIZE_MASK, ++ DMA_TO_DEVICE); ++ txdesc->status = 0; ++ ++ if (status & DMA_TX_ERROR) { ++ dev->stats.tx_errors++; ++ dev->stats.tx_dropped++; ++ if (status & DMA_TX_ERR_UNDER) ++ dev->stats.tx_fifo_errors++; ++ if (status & DMA_TX_ERR_HB) ++ dev->stats.tx_heartbeat_errors++; ++ if (status & (DMA_TX_ERR_LOSS | DMA_TX_ERR_LINK)) ++ dev->stats.tx_carrier_errors++; ++ if (status & (DMA_TX_ERR_LATE | DMA_TX_ERR_COL | ++ DMA_TX_ERR_JABBER | DMA_TX_ERR_DEFER)) ++ dev->stats.tx_aborted_errors++; ++ } else { ++ /* transmit OK */ ++ dev->stats.tx_packets++; ++ } ++ ++ skb = sp->tx_skb[idx]; ++ sp->tx_skb[idx] = NULL; ++ idx = DSC_NEXT(idx); ++ dev->stats.tx_bytes += skb->len; ++ dev_kfree_skb_irq(skb); ++ } ++ ++ sp->tx_csm = idx; ++} ++ ++static void rx_tasklet_func(unsigned long data) ++{ ++ struct net_device *dev = (struct net_device *)data; ++ struct ar231x_private *sp = netdev_priv(dev); ++ ++ if (sp->unloading) ++ return; ++ ++ if (ar231x_rx_int(dev)) { ++ tasklet_hi_schedule(&sp->rx_tasklet); ++ } else { ++ unsigned long flags; ++ ++ spin_lock_irqsave(&sp->lock, flags); ++ sp->dma_regs->intr_ena |= DMA_STATUS_RI; ++ spin_unlock_irqrestore(&sp->lock, flags); ++ } ++} ++ ++static void rx_schedule(struct net_device *dev) ++{ ++ struct ar231x_private *sp = netdev_priv(dev); ++ ++ sp->dma_regs->intr_ena &= ~DMA_STATUS_RI; ++ ++ tasklet_hi_schedule(&sp->rx_tasklet); ++} ++ ++static irqreturn_t ar231x_interrupt(int irq, void *dev_id) ++{ ++ struct net_device *dev = (struct net_device *)dev_id; ++ struct ar231x_private *sp = netdev_priv(dev); ++ unsigned int status, enabled; ++ ++ /* clear interrupt */ ++ /* Don't clear RI bit if currently disabled */ ++ status = sp->dma_regs->status; ++ enabled = sp->dma_regs->intr_ena; ++ sp->dma_regs->status = status & enabled; ++ ++ if (status & DMA_STATUS_NIS) { ++ /* normal status */ ++ /** ++ * Don't schedule rx processing if interrupt ++ * is already disabled. ++ */ ++ if (status & enabled & DMA_STATUS_RI) { ++ /* receive interrupt */ ++ rx_schedule(dev); ++ } ++ if (status & DMA_STATUS_TI) { ++ /* transmit interrupt */ ++ ar231x_tx_int(dev); ++ } ++ } ++ ++ /* abnormal status */ ++ if (status & (DMA_STATUS_FBE | DMA_STATUS_TPS)) ++ ar231x_restart(dev); ++ ++ return IRQ_HANDLED; ++} ++ ++static int ar231x_open(struct net_device *dev) ++{ ++ struct ar231x_private *sp = netdev_priv(dev); ++ unsigned int ethsal, ethsah; ++ ++ /* reset the hardware, in case the MAC address changed */ ++ ethsah = (((u_int) (dev->dev_addr[5]) << 8) & (u_int) 0x0000FF00) | ++ (((u_int) (dev->dev_addr[4]) << 0) & (u_int) 0x000000FF); ++ ++ ethsal = (((u_int) (dev->dev_addr[3]) << 24) & (u_int) 0xFF000000) | ++ (((u_int) (dev->dev_addr[2]) << 16) & (u_int) 0x00FF0000) | ++ (((u_int) (dev->dev_addr[1]) << 8) & (u_int) 0x0000FF00) | ++ (((u_int) (dev->dev_addr[0]) << 0) & (u_int) 0x000000FF); ++ ++ sp->eth_regs->mac_addr[0] = ethsah; ++ sp->eth_regs->mac_addr[1] = ethsal; ++ ++ mdelay(10); ++ ++ dev->mtu = 1500; ++ netif_start_queue(dev); ++ ++ sp->eth_regs->mac_control |= MAC_CONTROL_RE; ++ ++ phy_start(sp->phy_dev); ++ ++ return 0; ++} ++ ++static void ar231x_tx_timeout(struct net_device *dev, unsigned int txqueue) ++{ ++ struct ar231x_private *sp = netdev_priv(dev); ++ unsigned long flags; ++ ++ spin_lock_irqsave(&sp->lock, flags); ++ ar231x_restart(dev); ++ spin_unlock_irqrestore(&sp->lock, flags); ++} ++ ++static void ar231x_halt(struct net_device *dev) ++{ ++ struct ar231x_private *sp = netdev_priv(dev); ++ int j; ++ ++ tasklet_disable(&sp->rx_tasklet); ++ ++ /* kill the MAC */ ++ sp->eth_regs->mac_control &= ~(MAC_CONTROL_RE | /* disable Receives */ ++ MAC_CONTROL_TE); /* disable Transmits */ ++ /* stop dma */ ++ sp->dma_regs->control = 0; ++ sp->dma_regs->bus_mode = DMA_BUS_MODE_SWR; ++ ++ /* place phy and MAC in reset */ ++ sp->cfg->reset_set(sp->cfg->reset_mac); ++ sp->cfg->reset_set(sp->cfg->reset_phy); ++ ++ /* free buffers on tx ring */ ++ for (j = 0; j < AR2313_DESCR_ENTRIES; j++) { ++ struct sk_buff *skb; ++ ar231x_descr_t *txdesc; ++ ++ txdesc = &sp->tx_ring[j]; ++ txdesc->descr = 0; ++ ++ skb = sp->tx_skb[j]; ++ if (skb) { ++ dev_kfree_skb(skb); ++ sp->tx_skb[j] = NULL; ++ } ++ } ++} ++ ++/** ++ * close should do nothing. Here's why. It's called when ++ * 'ifconfig bond0 down' is run. If it calls free_irq then ++ * the irq is gone forever ! When bond0 is made 'up' again, ++ * the ar231x_open () does not call request_irq (). Worse, ++ * the call to ar231x_halt() generates a WDOG reset due to ++ * the write to reset register and the box reboots. ++ * Commenting this out is good since it allows the ++ * system to resume when bond0 is made up again. ++ */ ++static int ar231x_close(struct net_device *dev) ++{ ++ struct ar231x_private *sp = netdev_priv(dev); ++#if 0 ++ /* Disable interrupts */ ++ disable_irq(dev->irq); ++ ++ /** ++ * Without (or before) releasing irq and stopping hardware, this ++ * is an absolute non-sense, by the way. It will be reset instantly ++ * by the first irq. ++ */ ++ netif_stop_queue(dev); ++ ++ /* stop the MAC and DMA engines */ ++ ar231x_halt(dev); ++ ++ /* release the interrupt */ ++ free_irq(dev->irq, dev); ++ ++#endif ++ ++ phy_stop(sp->phy_dev); ++ ++ return 0; ++} ++ ++static int ar231x_start_xmit(struct sk_buff *skb, struct net_device *dev) ++{ ++ struct ar231x_private *sp = netdev_priv(dev); ++ ar231x_descr_t *td; ++ u32 idx; ++ ++ idx = sp->tx_prd; ++ td = &sp->tx_ring[idx]; ++ ++ if (td->status & DMA_TX_OWN) { ++ /* free skbuf and lie to the caller that we sent it out */ ++ dev->stats.tx_dropped++; ++ dev_kfree_skb(skb); ++ ++ /* restart transmitter in case locked */ ++ sp->dma_regs->xmt_poll = 0; ++ return 0; ++ } ++ ++ /* Setup the transmit descriptor. */ ++ td->devcs = ((skb->len << DMA_TX1_BSIZE_SHIFT) | ++ (DMA_TX1_LS | DMA_TX1_IC | DMA_TX1_CHAINED)); ++ td->addr = dma_map_single(&sp->pdev->dev, skb->data, skb->len, DMA_TO_DEVICE); ++ td->status = DMA_TX_OWN; ++ ++ /* kick transmitter last */ ++ sp->dma_regs->xmt_poll = 0; ++ ++ sp->tx_skb[idx] = skb; ++ idx = DSC_NEXT(idx); ++ sp->tx_prd = idx; ++ ++ return 0; ++} ++ ++static int ar231x_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd) ++{ ++ struct ar231x_private *sp = netdev_priv(dev); ++ ++ switch (cmd) { ++ case SIOCGMIIPHY: ++ case SIOCGMIIREG: ++ case SIOCSMIIREG: ++ return phy_mii_ioctl(sp->phy_dev, ifr, cmd); ++ ++ default: ++ break; ++ } ++ ++ return -EOPNOTSUPP; ++} ++ ++static void ar231x_adjust_link(struct net_device *dev) ++{ ++ struct ar231x_private *sp = netdev_priv(dev); ++ struct phy_device *phydev = sp->phy_dev; ++ u32 mc; ++ ++ if (!phydev->link) { ++ if (sp->link) { ++ pr_info("%s: link down\n", dev->name); ++ sp->link = 0; ++ } ++ return; ++ } ++ sp->link = 1; ++ ++ pr_info("%s: link up (%uMbps/%s duplex)\n", dev->name, ++ phydev->speed, phydev->duplex ? "full" : "half"); ++ ++ mc = sp->eth_regs->mac_control; ++ if (phydev->duplex) ++ mc = (mc | MAC_CONTROL_F) & ~MAC_CONTROL_DRO; ++ else ++ mc = (mc | MAC_CONTROL_DRO) & ~MAC_CONTROL_F; ++ sp->eth_regs->mac_control = mc; ++ sp->duplex = phydev->duplex; ++} ++ ++#define MII_ADDR(phy, reg) \ ++ ((reg << MII_ADDR_REG_SHIFT) | (phy << MII_ADDR_PHY_SHIFT)) ++ ++static int ++ar231x_mdiobus_read(struct mii_bus *bus, int phy_addr, int regnum) ++{ ++ struct net_device *const dev = bus->priv; ++ struct ar231x_private *sp = netdev_priv(dev); ++ volatile MII *ethernet = sp->phy_regs; ++ ++ ethernet->mii_addr = MII_ADDR(phy_addr, regnum); ++ while (ethernet->mii_addr & MII_ADDR_BUSY) ++ ; ++ return ethernet->mii_data >> MII_DATA_SHIFT; ++} ++ ++static int ++ar231x_mdiobus_write(struct mii_bus *bus, int phy_addr, int regnum, u16 value) ++{ ++ struct net_device *const dev = bus->priv; ++ struct ar231x_private *sp = netdev_priv(dev); ++ volatile MII *ethernet = sp->phy_regs; ++ ++ while (ethernet->mii_addr & MII_ADDR_BUSY) ++ ; ++ ethernet->mii_data = value << MII_DATA_SHIFT; ++ ethernet->mii_addr = MII_ADDR(phy_addr, regnum) | MII_ADDR_WRITE; ++ ++ return 0; ++} ++ ++static int ar231x_mdiobus_reset(struct mii_bus *bus) ++{ ++ struct net_device *const dev = bus->priv; ++ ++ ar231x_reset_reg(dev); ++ ++ return 0; ++} ++ ++static int ar231x_mdiobus_probe(struct net_device *dev) ++{ ++ __ETHTOOL_DECLARE_LINK_MODE_MASK(mask) = { 0, }; ++ struct ar231x_private *const sp = netdev_priv(dev); ++ struct phy_device *phydev = NULL; ++ ++ /* find the first (lowest address) PHY on the current MAC's MII bus */ ++ phydev = phy_find_first(sp->mii_bus); ++ if (!phydev) { ++ printk(KERN_ERR "ar231x: %s: no PHY found\n", dev->name); ++ return -1; ++ } ++ ++ /* now we are supposed to have a proper phydev, to attach to... */ ++ BUG_ON(phydev->attached_dev); ++ ++ phydev = phy_connect(dev, phydev_name(phydev), &ar231x_adjust_link, ++ PHY_INTERFACE_MODE_MII); ++ if (IS_ERR(phydev)) { ++ printk(KERN_ERR "%s: Could not attach to PHY\n", dev->name); ++ return PTR_ERR(phydev); ++ } ++ ++ /* mask with MAC supported features */ ++ linkmode_set_bit_array(phy_10_100_features_array, ++ ARRAY_SIZE(phy_10_100_features_array), ++ mask); ++ linkmode_set_bit(ETHTOOL_LINK_MODE_Autoneg_BIT, mask); ++ linkmode_set_bit(ETHTOOL_LINK_MODE_MII_BIT, mask); ++ linkmode_set_bit(ETHTOOL_LINK_MODE_TP_BIT, mask); ++ ++ linkmode_and(phydev->supported, phydev->supported, mask); ++ linkmode_copy(phydev->advertising, phydev->supported); ++ ++ sp->phy_dev = phydev; ++ ++ printk(KERN_INFO "%s: attached PHY driver [%s] (mii_bus:phy_addr=%s)\n", ++ dev->name, phydev->drv->name, phydev_name(phydev)); ++ ++ return 0; ++} ++ +--- /dev/null ++++ b/drivers/net/ethernet/atheros/ar231x/ar231x.h +@@ -0,0 +1,282 @@ ++/* ++ * ar231x.h: Linux driver for the Atheros AR231x Ethernet device. ++ * ++ * Copyright (C) 2004 by Sameer Dekate ++ * Copyright (C) 2006 Imre Kaloz ++ * Copyright (C) 2006-2009 Felix Fietkau ++ * ++ * Thanks to Atheros for providing hardware and documentation ++ * enabling me to write this driver. ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; either version 2 of the License, or ++ * (at your option) any later version. ++ */ ++ ++#ifndef _AR2313_H_ ++#define _AR2313_H_ ++ ++#include ++#include ++#include ++#include ++ ++/* probe link timer - 5 secs */ ++#define LINK_TIMER (5*HZ) ++ ++#define IS_DMA_TX_INT(X) (((X) & (DMA_STATUS_TI)) != 0) ++#define IS_DMA_RX_INT(X) (((X) & (DMA_STATUS_RI)) != 0) ++#define IS_DRIVER_OWNED(X) (((X) & (DMA_TX_OWN)) == 0) ++ ++#define AR2313_TX_TIMEOUT (HZ/4) ++ ++/* Rings */ ++#define DSC_RING_ENTRIES_SIZE (AR2313_DESCR_ENTRIES * sizeof(struct desc)) ++#define DSC_NEXT(idx) ((idx + 1) & (AR2313_DESCR_ENTRIES - 1)) ++ ++#define AR2313_MBGET 2 ++#define AR2313_MBSET 3 ++#define AR2313_PCI_RECONFIG 4 ++#define AR2313_PCI_DUMP 5 ++#define AR2313_TEST_PANIC 6 ++#define AR2313_TEST_NULLPTR 7 ++#define AR2313_READ_DATA 8 ++#define AR2313_WRITE_DATA 9 ++#define AR2313_GET_VERSION 10 ++#define AR2313_TEST_HANG 11 ++#define AR2313_SYNC 12 ++ ++#define DMA_RX_ERR_CRC BIT(1) ++#define DMA_RX_ERR_DRIB BIT(2) ++#define DMA_RX_ERR_MII BIT(3) ++#define DMA_RX_EV2 BIT(5) ++#define DMA_RX_ERR_COL BIT(6) ++#define DMA_RX_LONG BIT(7) ++#define DMA_RX_LS BIT(8) /* last descriptor */ ++#define DMA_RX_FS BIT(9) /* first descriptor */ ++#define DMA_RX_MF BIT(10) /* multicast frame */ ++#define DMA_RX_ERR_RUNT BIT(11) /* runt frame */ ++#define DMA_RX_ERR_LENGTH BIT(12) /* length error */ ++#define DMA_RX_ERR_DESC BIT(14) /* descriptor error */ ++#define DMA_RX_ERROR BIT(15) /* error summary */ ++#define DMA_RX_LEN_MASK 0x3fff0000 ++#define DMA_RX_LEN_SHIFT 16 ++#define DMA_RX_FILT BIT(30) ++#define DMA_RX_OWN BIT(31) /* desc owned by DMA controller */ ++ ++#define DMA_RX1_BSIZE_MASK 0x000007ff ++#define DMA_RX1_BSIZE_SHIFT 0 ++#define DMA_RX1_CHAINED BIT(24) ++#define DMA_RX1_RER BIT(25) ++ ++#define DMA_TX_ERR_UNDER BIT(1) /* underflow error */ ++#define DMA_TX_ERR_DEFER BIT(2) /* excessive deferral */ ++#define DMA_TX_COL_MASK 0x78 ++#define DMA_TX_COL_SHIFT 3 ++#define DMA_TX_ERR_HB BIT(7) /* hearbeat failure */ ++#define DMA_TX_ERR_COL BIT(8) /* excessive collisions */ ++#define DMA_TX_ERR_LATE BIT(9) /* late collision */ ++#define DMA_TX_ERR_LINK BIT(10) /* no carrier */ ++#define DMA_TX_ERR_LOSS BIT(11) /* loss of carrier */ ++#define DMA_TX_ERR_JABBER BIT(14) /* transmit jabber timeout */ ++#define DMA_TX_ERROR BIT(15) /* frame aborted */ ++#define DMA_TX_OWN BIT(31) /* descr owned by DMA controller */ ++ ++#define DMA_TX1_BSIZE_MASK 0x000007ff ++#define DMA_TX1_BSIZE_SHIFT 0 ++#define DMA_TX1_CHAINED BIT(24) /* chained descriptors */ ++#define DMA_TX1_TER BIT(25) /* transmit end of ring */ ++#define DMA_TX1_FS BIT(29) /* first segment */ ++#define DMA_TX1_LS BIT(30) /* last segment */ ++#define DMA_TX1_IC BIT(31) /* interrupt on completion */ ++ ++#define RCVPKT_LENGTH(X) (X >> 16) /* Received pkt Length */ ++ ++#define MAC_CONTROL_RE BIT(2) /* receive enable */ ++#define MAC_CONTROL_TE BIT(3) /* transmit enable */ ++#define MAC_CONTROL_DC BIT(5) /* Deferral check */ ++#define MAC_CONTROL_ASTP BIT(8) /* Auto pad strip */ ++#define MAC_CONTROL_DRTY BIT(10) /* Disable retry */ ++#define MAC_CONTROL_DBF BIT(11) /* Disable bcast frames */ ++#define MAC_CONTROL_LCC BIT(12) /* late collision ctrl */ ++#define MAC_CONTROL_HP BIT(13) /* Hash Perfect filtering */ ++#define MAC_CONTROL_HASH BIT(14) /* Unicast hash filtering */ ++#define MAC_CONTROL_HO BIT(15) /* Hash only filtering */ ++#define MAC_CONTROL_PB BIT(16) /* Pass Bad frames */ ++#define MAC_CONTROL_IF BIT(17) /* Inverse filtering */ ++#define MAC_CONTROL_PR BIT(18) /* promis mode (valid frames only) */ ++#define MAC_CONTROL_PM BIT(19) /* pass multicast */ ++#define MAC_CONTROL_F BIT(20) /* full-duplex */ ++#define MAC_CONTROL_DRO BIT(23) /* Disable Receive Own */ ++#define MAC_CONTROL_HBD BIT(28) /* heart-beat disabled (MUST BE SET) */ ++#define MAC_CONTROL_BLE BIT(30) /* big endian mode */ ++#define MAC_CONTROL_RA BIT(31) /* rcv all (valid and invalid frames) */ ++ ++#define MII_ADDR_BUSY BIT(0) ++#define MII_ADDR_WRITE BIT(1) ++#define MII_ADDR_REG_SHIFT 6 ++#define MII_ADDR_PHY_SHIFT 11 ++#define MII_DATA_SHIFT 0 ++ ++#define FLOW_CONTROL_FCE BIT(1) ++ ++#define DMA_BUS_MODE_SWR BIT(0) /* software reset */ ++#define DMA_BUS_MODE_BLE BIT(7) /* big endian mode */ ++#define DMA_BUS_MODE_PBL_SHIFT 8 /* programmable burst length 32 */ ++#define DMA_BUS_MODE_DBO BIT(20) /* big-endian descriptors */ ++ ++#define DMA_STATUS_TI BIT(0) /* transmit interrupt */ ++#define DMA_STATUS_TPS BIT(1) /* transmit process stopped */ ++#define DMA_STATUS_TU BIT(2) /* transmit buffer unavailable */ ++#define DMA_STATUS_TJT BIT(3) /* transmit buffer timeout */ ++#define DMA_STATUS_UNF BIT(5) /* transmit underflow */ ++#define DMA_STATUS_RI BIT(6) /* receive interrupt */ ++#define DMA_STATUS_RU BIT(7) /* receive buffer unavailable */ ++#define DMA_STATUS_RPS BIT(8) /* receive process stopped */ ++#define DMA_STATUS_ETI BIT(10) /* early transmit interrupt */ ++#define DMA_STATUS_FBE BIT(13) /* fatal bus interrupt */ ++#define DMA_STATUS_ERI BIT(14) /* early receive interrupt */ ++#define DMA_STATUS_AIS BIT(15) /* abnormal interrupt summary */ ++#define DMA_STATUS_NIS BIT(16) /* normal interrupt summary */ ++#define DMA_STATUS_RS_SHIFT 17 /* receive process state */ ++#define DMA_STATUS_TS_SHIFT 20 /* transmit process state */ ++#define DMA_STATUS_EB_SHIFT 23 /* error bits */ ++ ++#define DMA_CONTROL_SR BIT(1) /* start receive */ ++#define DMA_CONTROL_ST BIT(13) /* start transmit */ ++#define DMA_CONTROL_SF BIT(21) /* store and forward */ ++ ++typedef struct { ++ volatile unsigned int status; /* OWN, Device control and status. */ ++ volatile unsigned int devcs; /* pkt Control bits + Length */ ++ volatile unsigned int addr; /* Current Address. */ ++ volatile unsigned int descr; /* Next descriptor in chain. */ ++} ar231x_descr_t; ++ ++/** ++ * New Combo structure for Both Eth0 AND eth1 ++ * ++ * Don't directly access MII related regs since phy chip could be actually ++ * connected to another ethernet block. ++ */ ++typedef struct { ++ volatile unsigned int mac_control; /* 0x00 */ ++ volatile unsigned int mac_addr[2]; /* 0x04 - 0x08 */ ++ volatile unsigned int mcast_table[2]; /* 0x0c - 0x10 */ ++ volatile unsigned int __mii_addr; /* 0x14 */ ++ volatile unsigned int __mii_data; /* 0x18 */ ++ volatile unsigned int flow_control; /* 0x1c */ ++ volatile unsigned int vlan_tag; /* 0x20 */ ++ volatile unsigned int pad[7]; /* 0x24 - 0x3c */ ++ volatile unsigned int ucast_table[8]; /* 0x40-0x5c */ ++} ETHERNET_STRUCT; ++ ++typedef struct { ++ volatile unsigned int mii_addr; ++ volatile unsigned int mii_data; ++} MII; ++ ++/******************************************************************** ++ * Interrupt controller ++ ********************************************************************/ ++ ++typedef struct { ++ volatile unsigned int wdog_control; /* 0x08 */ ++ volatile unsigned int wdog_timer; /* 0x0c */ ++ volatile unsigned int misc_status; /* 0x10 */ ++ volatile unsigned int misc_mask; /* 0x14 */ ++ volatile unsigned int global_status; /* 0x18 */ ++ volatile unsigned int reserved; /* 0x1c */ ++ volatile unsigned int reset_control; /* 0x20 */ ++} INTERRUPT; ++ ++/******************************************************************** ++ * DMA controller ++ ********************************************************************/ ++typedef struct { ++ volatile unsigned int bus_mode; /* 0x00 (CSR0) */ ++ volatile unsigned int xmt_poll; /* 0x04 (CSR1) */ ++ volatile unsigned int rcv_poll; /* 0x08 (CSR2) */ ++ volatile unsigned int rcv_base; /* 0x0c (CSR3) */ ++ volatile unsigned int xmt_base; /* 0x10 (CSR4) */ ++ volatile unsigned int status; /* 0x14 (CSR5) */ ++ volatile unsigned int control; /* 0x18 (CSR6) */ ++ volatile unsigned int intr_ena; /* 0x1c (CSR7) */ ++ volatile unsigned int rcv_missed; /* 0x20 (CSR8) */ ++ volatile unsigned int reserved[11]; /* 0x24-0x4c (CSR9-19) */ ++ volatile unsigned int cur_tx_buf_addr; /* 0x50 (CSR20) */ ++ volatile unsigned int cur_rx_buf_addr; /* 0x50 (CSR21) */ ++} DMA; ++ ++/** ++ * Struct private for the Sibyte. ++ * ++ * Elements are grouped so variables used by the tx handling goes ++ * together, and will go into the same cache lines etc. in order to ++ * avoid cache line contention between the rx and tx handling on SMP. ++ * ++ * Frequently accessed variables are put at the beginning of the ++ * struct to help the compiler generate better/shorter code. ++ */ ++struct ar231x_private { ++ struct net_device *dev; ++ struct platform_device *pdev; ++ int version; ++ u32 mb[2]; ++ ++ volatile MII *phy_regs; ++ volatile ETHERNET_STRUCT *eth_regs; ++ volatile DMA *dma_regs; ++ struct ar231x_eth *cfg; ++ ++ spinlock_t lock; /* Serialise access to device */ ++ ++ /* RX and TX descriptors, must be adjacent */ ++ ar231x_descr_t *rx_ring; ++ ar231x_descr_t *tx_ring; ++ ++ struct sk_buff **rx_skb; ++ struct sk_buff **tx_skb; ++ ++ /* RX elements */ ++ u32 rx_skbprd; ++ u32 cur_rx; ++ ++ /* TX elements */ ++ u32 tx_prd; ++ u32 tx_csm; ++ ++ /* Misc elements */ ++ char name[48]; ++ struct { ++ u32 address; ++ u32 length; ++ char *mapping; ++ } desc; ++ ++ unsigned short link; /* 0 - link down, 1 - link up */ ++ unsigned short duplex; /* 0 - half, 1 - full */ ++ ++ struct tasklet_struct rx_tasklet; ++ int unloading; ++ ++ struct phy_device *phy_dev; ++ struct mii_bus *mii_bus; ++}; ++ ++/* Prototypes */ ++static int ar231x_init(struct net_device *dev); ++#ifdef TX_TIMEOUT ++static void ar231x_tx_timeout(struct net_device *dev); ++#endif ++static int ar231x_restart(struct net_device *dev); ++static void ar231x_load_rx_ring(struct net_device *dev, int bufs); ++static irqreturn_t ar231x_interrupt(int irq, void *dev_id); ++static int ar231x_open(struct net_device *dev); ++static int ar231x_start_xmit(struct sk_buff *skb, struct net_device *dev); ++static int ar231x_close(struct net_device *dev); ++static int ar231x_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd); ++static void ar231x_init_cleanup(struct net_device *dev); ++ ++#endif /* _AR2313_H_ */ +--- a/arch/mips/ath25/ar2315_regs.h ++++ b/arch/mips/ath25/ar2315_regs.h +@@ -57,6 +57,9 @@ + #define AR2315_PCI_EXT_BASE 0x80000000 /* PCI external */ + #define AR2315_PCI_EXT_SIZE 0x40000000 + ++/* MII registers offset inside Ethernet MMR region */ ++#define AR2315_ENET0_MII_BASE (AR2315_ENET0_BASE + 0x14) ++ + /* + * Configuration registers + */ +--- a/arch/mips/ath25/ar5312_regs.h ++++ b/arch/mips/ath25/ar5312_regs.h +@@ -64,6 +64,10 @@ + #define AR5312_AR5312_REV7 0x0057 /* AR5312 WMAC (AP30-040) */ + #define AR5312_AR2313_REV8 0x0058 /* AR2313 WMAC (AP43-030) */ + ++/* MII registers offset inside Ethernet MMR region */ ++#define AR5312_ENET0_MII_BASE (AR5312_ENET0_BASE + 0x14) ++#define AR5312_ENET1_MII_BASE (AR5312_ENET1_BASE + 0x14) ++ + /* Reset/Timer Block Address Map */ + #define AR5312_TIMER 0x0000 /* countdown timer */ + #define AR5312_RELOAD 0x0004 /* timer reload value */ +--- a/arch/mips/ath25/ar2315.c ++++ b/arch/mips/ath25/ar2315.c +@@ -132,6 +132,8 @@ static void ar2315_irq_dispatch(void) + + if (pending & CAUSEF_IP3) + do_IRQ(AR2315_IRQ_WLAN0); ++ else if (pending & CAUSEF_IP4) ++ do_IRQ(AR2315_IRQ_ENET0); + #ifdef CONFIG_PCI_AR2315 + else if (pending & CAUSEF_IP5) + do_IRQ(AR2315_IRQ_LCBUS_PCI); +@@ -167,6 +169,29 @@ void __init ar2315_arch_init_irq(void) + ar2315_misc_irq_domain = domain; + } + ++static void ar2315_device_reset_set(u32 mask) ++{ ++ u32 val; ++ ++ val = ar2315_rst_reg_read(AR2315_RESET); ++ ar2315_rst_reg_write(AR2315_RESET, val | mask); ++} ++ ++static void ar2315_device_reset_clear(u32 mask) ++{ ++ u32 val; ++ ++ val = ar2315_rst_reg_read(AR2315_RESET); ++ ar2315_rst_reg_write(AR2315_RESET, val & ~mask); ++} ++ ++static struct ar231x_eth ar2315_eth_data = { ++ .reset_set = ar2315_device_reset_set, ++ .reset_clear = ar2315_device_reset_clear, ++ .reset_mac = AR2315_RESET_ENET0, ++ .reset_phy = AR2315_RESET_EPHY0, ++}; ++ + static struct resource ar2315_gpio_res[] = { + { + .name = "ar2315-gpio", +@@ -203,6 +228,11 @@ void __init ar2315_init_devices(void) + ar2315_gpio_res[1].end = ar2315_gpio_res[1].start; + platform_device_register(&ar2315_gpio); + ++ ar2315_eth_data.macaddr = ath25_board.config->enet0_mac; ++ ath25_add_ethernet(0, AR2315_ENET0_BASE, "eth0_mii", ++ AR2315_ENET0_MII_BASE, AR2315_IRQ_ENET0, ++ &ar2315_eth_data); ++ + ath25_add_wmac(0, AR2315_WLAN0_BASE, AR2315_IRQ_WLAN0); + } + +--- a/arch/mips/ath25/ar5312.c ++++ b/arch/mips/ath25/ar5312.c +@@ -128,6 +128,10 @@ static void ar5312_irq_dispatch(void) + + if (pending & CAUSEF_IP2) + do_IRQ(AR5312_IRQ_WLAN0); ++ else if (pending & CAUSEF_IP3) ++ do_IRQ(AR5312_IRQ_ENET0); ++ else if (pending & CAUSEF_IP4) ++ do_IRQ(AR5312_IRQ_ENET1); + else if (pending & CAUSEF_IP5) + do_IRQ(AR5312_IRQ_WLAN1); + else if (pending & CAUSEF_IP6) +@@ -161,6 +165,36 @@ void __init ar5312_arch_init_irq(void) + ar5312_misc_irq_domain = domain; + } + ++static void ar5312_device_reset_set(u32 mask) ++{ ++ u32 val; ++ ++ val = ar5312_rst_reg_read(AR5312_RESET); ++ ar5312_rst_reg_write(AR5312_RESET, val | mask); ++} ++ ++static void ar5312_device_reset_clear(u32 mask) ++{ ++ u32 val; ++ ++ val = ar5312_rst_reg_read(AR5312_RESET); ++ ar5312_rst_reg_write(AR5312_RESET, val & ~mask); ++} ++ ++static struct ar231x_eth ar5312_eth0_data = { ++ .reset_set = ar5312_device_reset_set, ++ .reset_clear = ar5312_device_reset_clear, ++ .reset_mac = AR5312_RESET_ENET0, ++ .reset_phy = AR5312_RESET_EPHY0, ++}; ++ ++static struct ar231x_eth ar5312_eth1_data = { ++ .reset_set = ar5312_device_reset_set, ++ .reset_clear = ar5312_device_reset_clear, ++ .reset_mac = AR5312_RESET_ENET1, ++ .reset_phy = AR5312_RESET_EPHY1, ++}; ++ + static struct physmap_flash_data ar5312_flash_data = { + .width = 2, + }; +@@ -241,6 +275,7 @@ static void __init ar5312_flash_init(voi + void __init ar5312_init_devices(void) + { + struct ath25_boarddata *config; ++ u8 *c; + + ar5312_flash_init(); + +@@ -264,8 +299,30 @@ void __init ar5312_init_devices(void) + + platform_device_register(&ar5312_gpio); + ++ /* Fix up MAC addresses if necessary */ ++ if (is_broadcast_ether_addr(config->enet0_mac)) ++ ether_addr_copy(config->enet0_mac, config->enet1_mac); ++ ++ /* If ENET0 and ENET1 have the same mac address, ++ * increment the one from ENET1 */ ++ if (ether_addr_equal(config->enet0_mac, config->enet1_mac)) { ++ c = config->enet1_mac + 5; ++ while ((c >= config->enet1_mac) && !(++(*c))) ++ c--; ++ } ++ + switch (ath25_soc) { + case ATH25_SOC_AR5312: ++ ar5312_eth0_data.macaddr = config->enet0_mac; ++ ath25_add_ethernet(0, AR5312_ENET0_BASE, "eth0_mii", ++ AR5312_ENET0_MII_BASE, AR5312_IRQ_ENET0, ++ &ar5312_eth0_data); ++ ++ ar5312_eth1_data.macaddr = config->enet1_mac; ++ ath25_add_ethernet(1, AR5312_ENET1_BASE, "eth1_mii", ++ AR5312_ENET1_MII_BASE, AR5312_IRQ_ENET1, ++ &ar5312_eth1_data); ++ + if (!ath25_board.radio) + return; + +@@ -274,8 +331,18 @@ void __init ar5312_init_devices(void) + + ath25_add_wmac(0, AR5312_WLAN0_BASE, AR5312_IRQ_WLAN0); + break; ++ /* ++ * AR2312/3 ethernet uses the PHY of ENET0, but the MAC ++ * of ENET1. Atheros calls it 'twisted' for a reason :) ++ */ + case ATH25_SOC_AR2312: + case ATH25_SOC_AR2313: ++ ar5312_eth1_data.reset_phy = ar5312_eth0_data.reset_phy; ++ ar5312_eth1_data.macaddr = config->enet0_mac; ++ ath25_add_ethernet(1, AR5312_ENET1_BASE, "eth0_mii", ++ AR5312_ENET0_MII_BASE, AR5312_IRQ_ENET1, ++ &ar5312_eth1_data); ++ + if (!ath25_board.radio) + return; + break; +--- a/arch/mips/ath25/devices.h ++++ b/arch/mips/ath25/devices.h +@@ -33,6 +33,8 @@ extern struct ar231x_board_config ath25_ + extern void (*ath25_irq_dispatch)(void); + + int ath25_find_config(phys_addr_t offset, unsigned long size); ++int ath25_add_ethernet(int nr, u32 base, const char *mii_name, u32 mii_base, ++ int irq, void *pdata); + void ath25_serial_setup(u32 mapbase, int irq, unsigned int uartclk); + int ath25_add_wmac(int nr, u32 base, int irq); + +--- a/arch/mips/ath25/devices.c ++++ b/arch/mips/ath25/devices.c +@@ -13,6 +13,51 @@ + struct ar231x_board_config ath25_board; + enum ath25_soc_type ath25_soc = ATH25_SOC_UNKNOWN; + ++static struct resource ath25_eth0_res[] = { ++ { ++ .name = "eth0_membase", ++ .flags = IORESOURCE_MEM, ++ }, ++ { ++ .name = "eth0_mii", ++ .flags = IORESOURCE_MEM, ++ }, ++ { ++ .name = "eth0_irq", ++ .flags = IORESOURCE_IRQ, ++ } ++}; ++ ++static struct resource ath25_eth1_res[] = { ++ { ++ .name = "eth1_membase", ++ .flags = IORESOURCE_MEM, ++ }, ++ { ++ .name = "eth1_mii", ++ .flags = IORESOURCE_MEM, ++ }, ++ { ++ .name = "eth1_irq", ++ .flags = IORESOURCE_IRQ, ++ } ++}; ++ ++static struct platform_device ath25_eth[] = { ++ { ++ .id = 0, ++ .name = "ar231x-eth", ++ .resource = ath25_eth0_res, ++ .num_resources = ARRAY_SIZE(ath25_eth0_res) ++ }, ++ { ++ .id = 1, ++ .name = "ar231x-eth", ++ .resource = ath25_eth1_res, ++ .num_resources = ARRAY_SIZE(ath25_eth1_res) ++ } ++}; ++ + static struct resource ath25_wmac0_res[] = { + { + .name = "wmac0_membase", +@@ -71,6 +116,25 @@ const char *get_system_type(void) + return soc_type_strings[ath25_soc]; + } + ++int __init ath25_add_ethernet(int nr, u32 base, const char *mii_name, ++ u32 mii_base, int irq, void *pdata) ++{ ++ struct resource *res; ++ ++ ath25_eth[nr].dev.platform_data = pdata; ++ res = &ath25_eth[nr].resource[0]; ++ res->start = base; ++ res->end = base + 0x2000 - 1; ++ res++; ++ res->name = mii_name; ++ res->start = mii_base; ++ res->end = mii_base + 8 - 1; ++ res++; ++ res->start = irq; ++ res->end = irq; ++ return platform_device_register(&ath25_eth[nr]); ++} ++ + void __init ath25_serial_setup(u32 mapbase, int irq, unsigned int uartclk) + { + #ifdef CONFIG_SERIAL_8250_CONSOLE +--- a/arch/mips/include/asm/mach-ath25/ath25_platform.h ++++ b/arch/mips/include/asm/mach-ath25/ath25_platform.h +@@ -71,4 +71,15 @@ struct ar231x_board_config { + const char *radio; + }; + ++/* ++ * Platform device information for the Ethernet MAC ++ */ ++struct ar231x_eth { ++ void (*reset_set)(u32); ++ void (*reset_clear)(u32); ++ u32 reset_mac; ++ u32 reset_phy; ++ char *macaddr; ++}; ++ + #endif /* __ASM_MACH_ATH25_PLATFORM_H */ diff --git a/target/linux/ath25/patches-5.10/120-spiflash.patch b/target/linux/ath25/patches-5.10/120-spiflash.patch new file mode 100644 index 0000000000..6b869d9fcd --- /dev/null +++ b/target/linux/ath25/patches-5.10/120-spiflash.patch @@ -0,0 +1,631 @@ +--- a/drivers/mtd/devices/Kconfig ++++ b/drivers/mtd/devices/Kconfig +@@ -114,6 +114,10 @@ config MTD_BCM47XXSFLASH + registered by bcma as platform devices. This enables driver for + serial flash memories. + ++config MTD_AR2315 ++ tristate "Atheros AR2315+ SPI Flash support" ++ depends on SOC_AR2315 ++ + config MTD_SLRAM + tristate "Uncached system RAM" + help +--- a/drivers/mtd/devices/Makefile ++++ b/drivers/mtd/devices/Makefile +@@ -15,6 +15,7 @@ obj-$(CONFIG_MTD_DATAFLASH) += mtd_dataf + obj-$(CONFIG_MTD_MCHP23K256) += mchp23k256.o + obj-$(CONFIG_MTD_SPEAR_SMI) += spear_smi.o + obj-$(CONFIG_MTD_SST25L) += sst25l.o ++obj-$(CONFIG_MTD_AR2315) += ar2315.o + obj-$(CONFIG_MTD_BCM47XXSFLASH) += bcm47xxsflash.o + obj-$(CONFIG_MTD_ST_SPI_FSM) += st_spi_fsm.o + obj-$(CONFIG_MTD_POWERNV_FLASH) += powernv_flash.o +--- /dev/null ++++ b/drivers/mtd/devices/ar2315.c +@@ -0,0 +1,456 @@ ++ ++/* ++ * MTD driver for the SPI Flash Memory support on Atheros AR2315 ++ * ++ * Copyright (c) 2005-2006 Atheros Communications Inc. ++ * Copyright (C) 2006-2007 FON Technology, SL. ++ * Copyright (C) 2006-2007 Imre Kaloz ++ * Copyright (C) 2006-2009 Felix Fietkau ++ * Copyright (C) 2012 Alexandros C. Couloumbis ++ * ++ * This code is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation. ++ * ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include "ar2315_spiflash.h" ++ ++#define DRIVER_NAME "ar2315-spiflash" ++ ++#define busy_wait(_priv, _condition, _wait) do { \ ++ while (_condition) { \ ++ if (_wait > 1) \ ++ msleep(_wait); \ ++ else if ((_wait == 1) && need_resched()) \ ++ schedule(); \ ++ else \ ++ udelay(1); \ ++ } \ ++} while (0) ++ ++enum { ++ FLASH_NONE, ++ FLASH_1MB, ++ FLASH_2MB, ++ FLASH_4MB, ++ FLASH_8MB, ++ FLASH_16MB, ++}; ++ ++/* Flash configuration table */ ++struct flashconfig { ++ u32 byte_cnt; ++ u32 sector_cnt; ++ u32 sector_size; ++}; ++ ++static const struct flashconfig flashconfig_tbl[] = { ++ [FLASH_NONE] = { 0, 0, 0}, ++ [FLASH_1MB] = { STM_1MB_BYTE_COUNT, STM_1MB_SECTOR_COUNT, ++ STM_1MB_SECTOR_SIZE}, ++ [FLASH_2MB] = { STM_2MB_BYTE_COUNT, STM_2MB_SECTOR_COUNT, ++ STM_2MB_SECTOR_SIZE}, ++ [FLASH_4MB] = { STM_4MB_BYTE_COUNT, STM_4MB_SECTOR_COUNT, ++ STM_4MB_SECTOR_SIZE}, ++ [FLASH_8MB] = { STM_8MB_BYTE_COUNT, STM_8MB_SECTOR_COUNT, ++ STM_8MB_SECTOR_SIZE}, ++ [FLASH_16MB] = { STM_16MB_BYTE_COUNT, STM_16MB_SECTOR_COUNT, ++ STM_16MB_SECTOR_SIZE} ++}; ++ ++/* Mapping of generic opcodes to STM serial flash opcodes */ ++enum { ++ SPI_WRITE_ENABLE, ++ SPI_WRITE_DISABLE, ++ SPI_RD_STATUS, ++ SPI_WR_STATUS, ++ SPI_RD_DATA, ++ SPI_FAST_RD_DATA, ++ SPI_PAGE_PROGRAM, ++ SPI_SECTOR_ERASE, ++ SPI_BULK_ERASE, ++ SPI_DEEP_PWRDOWN, ++ SPI_RD_SIG, ++}; ++ ++struct opcodes { ++ __u16 code; ++ __s8 tx_cnt; ++ __s8 rx_cnt; ++}; ++ ++static const struct opcodes stm_opcodes[] = { ++ [SPI_WRITE_ENABLE] = {STM_OP_WR_ENABLE, 1, 0}, ++ [SPI_WRITE_DISABLE] = {STM_OP_WR_DISABLE, 1, 0}, ++ [SPI_RD_STATUS] = {STM_OP_RD_STATUS, 1, 1}, ++ [SPI_WR_STATUS] = {STM_OP_WR_STATUS, 1, 0}, ++ [SPI_RD_DATA] = {STM_OP_RD_DATA, 4, 4}, ++ [SPI_FAST_RD_DATA] = {STM_OP_FAST_RD_DATA, 5, 0}, ++ [SPI_PAGE_PROGRAM] = {STM_OP_PAGE_PGRM, 8, 0}, ++ [SPI_SECTOR_ERASE] = {STM_OP_SECTOR_ERASE, 4, 0}, ++ [SPI_BULK_ERASE] = {STM_OP_BULK_ERASE, 1, 0}, ++ [SPI_DEEP_PWRDOWN] = {STM_OP_DEEP_PWRDOWN, 1, 0}, ++ [SPI_RD_SIG] = {STM_OP_RD_SIG, 4, 1}, ++}; ++ ++/* Driver private data structure */ ++struct spiflash_priv { ++ struct mtd_info mtd; ++ void __iomem *readaddr; /* memory mapped data for read */ ++ void __iomem *mmraddr; /* memory mapped register space */ ++ struct mutex lock; /* serialize registers access */ ++}; ++ ++#define to_spiflash(_mtd) container_of(_mtd, struct spiflash_priv, mtd) ++ ++enum { ++ FL_READY, ++ FL_READING, ++ FL_ERASING, ++ FL_WRITING ++}; ++ ++/*****************************************************************************/ ++ ++static u32 ++spiflash_read_reg(struct spiflash_priv *priv, int reg) ++{ ++ return ioread32(priv->mmraddr + reg); ++} ++ ++static void ++spiflash_write_reg(struct spiflash_priv *priv, int reg, u32 data) ++{ ++ iowrite32(data, priv->mmraddr + reg); ++} ++ ++static u32 ++spiflash_wait_busy(struct spiflash_priv *priv) ++{ ++ u32 reg; ++ ++ busy_wait(priv, (reg = spiflash_read_reg(priv, SPI_FLASH_CTL)) & ++ SPI_CTL_BUSY, 0); ++ return reg; ++} ++ ++static u32 ++spiflash_sendcmd(struct spiflash_priv *priv, int opcode, u32 addr) ++{ ++ const struct opcodes *op; ++ u32 reg, mask; ++ ++ op = &stm_opcodes[opcode]; ++ reg = spiflash_wait_busy(priv); ++ spiflash_write_reg(priv, SPI_FLASH_OPCODE, ++ ((u32)op->code) | (addr << 8)); ++ ++ reg &= ~SPI_CTL_TX_RX_CNT_MASK; ++ reg |= SPI_CTL_START | op->tx_cnt | (op->rx_cnt << 4); ++ ++ spiflash_write_reg(priv, SPI_FLASH_CTL, reg); ++ spiflash_wait_busy(priv); ++ ++ if (!op->rx_cnt) ++ return 0; ++ ++ reg = spiflash_read_reg(priv, SPI_FLASH_DATA); ++ ++ switch (op->rx_cnt) { ++ case 1: ++ mask = 0x000000ff; ++ break; ++ case 2: ++ mask = 0x0000ffff; ++ break; ++ case 3: ++ mask = 0x00ffffff; ++ break; ++ default: ++ mask = 0xffffffff; ++ break; ++ } ++ reg &= mask; ++ ++ return reg; ++} ++ ++/* ++ * Probe SPI flash device ++ * Function returns 0 for failure. ++ * and flashconfig_tbl array index for success. ++ */ ++static int ++spiflash_probe_chip(struct platform_device *pdev, struct spiflash_priv *priv) ++{ ++ u32 sig = spiflash_sendcmd(priv, SPI_RD_SIG, 0); ++ int flash_size; ++ ++ switch (sig) { ++ case STM_8MBIT_SIGNATURE: ++ flash_size = FLASH_1MB; ++ break; ++ case STM_16MBIT_SIGNATURE: ++ flash_size = FLASH_2MB; ++ break; ++ case STM_32MBIT_SIGNATURE: ++ flash_size = FLASH_4MB; ++ break; ++ case STM_64MBIT_SIGNATURE: ++ flash_size = FLASH_8MB; ++ break; ++ case STM_128MBIT_SIGNATURE: ++ flash_size = FLASH_16MB; ++ break; ++ default: ++ dev_warn(&pdev->dev, "read of flash device signature failed!\n"); ++ return 0; ++ } ++ ++ return flash_size; ++} ++ ++static void ++spiflash_wait_complete(struct spiflash_priv *priv, unsigned int timeout) ++{ ++ busy_wait(priv, spiflash_sendcmd(priv, SPI_RD_STATUS, 0) & ++ SPI_STATUS_WIP, timeout); ++} ++ ++static int ++spiflash_erase(struct mtd_info *mtd, struct erase_info *instr) ++{ ++ struct spiflash_priv *priv = to_spiflash(mtd); ++ const struct opcodes *op; ++ u32 temp, reg; ++ ++ if (instr->addr + instr->len > mtd->size) ++ return -EINVAL; ++ ++ mutex_lock(&priv->lock); ++ ++ spiflash_sendcmd(priv, SPI_WRITE_ENABLE, 0); ++ reg = spiflash_wait_busy(priv); ++ ++ op = &stm_opcodes[SPI_SECTOR_ERASE]; ++ temp = ((u32)instr->addr << 8) | (u32)(op->code); ++ spiflash_write_reg(priv, SPI_FLASH_OPCODE, temp); ++ ++ reg &= ~SPI_CTL_TX_RX_CNT_MASK; ++ reg |= op->tx_cnt | SPI_CTL_START; ++ spiflash_write_reg(priv, SPI_FLASH_CTL, reg); ++ ++ spiflash_wait_complete(priv, 20); ++ ++ mutex_unlock(&priv->lock); ++ ++ return 0; ++} ++ ++static int ++spiflash_read(struct mtd_info *mtd, loff_t from, size_t len, size_t *retlen, ++ u_char *buf) ++{ ++ struct spiflash_priv *priv = to_spiflash(mtd); ++ ++ if (!len) ++ return 0; ++ ++ if (from + len > mtd->size) ++ return -EINVAL; ++ ++ *retlen = len; ++ ++ mutex_lock(&priv->lock); ++ ++ memcpy_fromio(buf, priv->readaddr + from, len); ++ ++ mutex_unlock(&priv->lock); ++ ++ return 0; ++} ++ ++static int ++spiflash_write(struct mtd_info *mtd, loff_t to, size_t len, size_t *retlen, ++ const u8 *buf) ++{ ++ struct spiflash_priv *priv = to_spiflash(mtd); ++ u32 opcode, bytes_left; ++ ++ *retlen = 0; ++ ++ if (!len) ++ return 0; ++ ++ if (to + len > mtd->size) ++ return -EINVAL; ++ ++ bytes_left = len; ++ ++ do { ++ u32 read_len, reg, page_offset, spi_data = 0; ++ ++ read_len = min(bytes_left, sizeof(u32)); ++ ++ /* 32-bit writes cannot span across a page boundary ++ * (256 bytes). This types of writes require two page ++ * program operations to handle it correctly. The STM part ++ * will write the overflow data to the beginning of the ++ * current page as opposed to the subsequent page. ++ */ ++ page_offset = (to & (STM_PAGE_SIZE - 1)) + read_len; ++ ++ if (page_offset > STM_PAGE_SIZE) ++ read_len -= (page_offset - STM_PAGE_SIZE); ++ ++ mutex_lock(&priv->lock); ++ ++ spiflash_sendcmd(priv, SPI_WRITE_ENABLE, 0); ++ spi_data = 0; ++ switch (read_len) { ++ case 4: ++ spi_data |= buf[3] << 24; ++ /* fall through */ ++ case 3: ++ spi_data |= buf[2] << 16; ++ /* fall through */ ++ case 2: ++ spi_data |= buf[1] << 8; ++ /* fall through */ ++ case 1: ++ spi_data |= buf[0] & 0xff; ++ break; ++ default: ++ break; ++ } ++ ++ spiflash_write_reg(priv, SPI_FLASH_DATA, spi_data); ++ opcode = stm_opcodes[SPI_PAGE_PROGRAM].code | ++ (to & 0x00ffffff) << 8; ++ spiflash_write_reg(priv, SPI_FLASH_OPCODE, opcode); ++ ++ reg = spiflash_read_reg(priv, SPI_FLASH_CTL); ++ reg &= ~SPI_CTL_TX_RX_CNT_MASK; ++ reg |= (read_len + 4) | SPI_CTL_START; ++ spiflash_write_reg(priv, SPI_FLASH_CTL, reg); ++ ++ spiflash_wait_complete(priv, 1); ++ ++ mutex_unlock(&priv->lock); ++ ++ bytes_left -= read_len; ++ to += read_len; ++ buf += read_len; ++ ++ *retlen += read_len; ++ } while (bytes_left != 0); ++ ++ return 0; ++} ++ ++#if defined CONFIG_MTD_REDBOOT_PARTS || CONFIG_MTD_MYLOADER_PARTS ++static const char * const part_probe_types[] = { ++ "cmdlinepart", "RedBoot", "MyLoader", NULL ++}; ++#endif ++ ++static int ++spiflash_probe(struct platform_device *pdev) ++{ ++ struct spiflash_priv *priv; ++ struct mtd_info *mtd; ++ struct resource *res; ++ int index; ++ int result = 0; ++ ++ priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL); ++ if (!priv) ++ return -ENOMEM; ++ ++ mutex_init(&priv->lock); ++ mtd = &priv->mtd; ++ ++ res = platform_get_resource(pdev, IORESOURCE_MEM, 1); ++ priv->mmraddr = devm_ioremap_resource(&pdev->dev, res); ++ if (IS_ERR(priv->mmraddr)) { ++ dev_warn(&pdev->dev, "failed to map flash MMR\n"); ++ return PTR_ERR(priv->mmraddr); ++ } ++ ++ index = spiflash_probe_chip(pdev, priv); ++ if (!index) { ++ dev_warn(&pdev->dev, "found no flash device\n"); ++ return -ENODEV; ++ } ++ ++ res = platform_get_resource(pdev, IORESOURCE_MEM, 0); ++ priv->readaddr = devm_ioremap_resource(&pdev->dev, res); ++ if (IS_ERR(priv->readaddr)) { ++ dev_warn(&pdev->dev, "failed to map flash read mem\n"); ++ return PTR_ERR(priv->readaddr); ++ } ++ ++ platform_set_drvdata(pdev, priv); ++ mtd->name = "spiflash"; ++ mtd->type = MTD_NORFLASH; ++ mtd->flags = (MTD_CAP_NORFLASH|MTD_WRITEABLE); ++ mtd->size = flashconfig_tbl[index].byte_cnt; ++ mtd->erasesize = flashconfig_tbl[index].sector_size; ++ mtd->writesize = 1; ++ mtd->numeraseregions = 0; ++ mtd->eraseregions = NULL; ++ mtd->_erase = spiflash_erase; ++ mtd->_read = spiflash_read; ++ mtd->_write = spiflash_write; ++ mtd->owner = THIS_MODULE; ++ ++ dev_info(&pdev->dev, "%lld Kbytes flash detected\n", mtd->size >> 10); ++ ++#if defined CONFIG_MTD_REDBOOT_PARTS || CONFIG_MTD_MYLOADER_PARTS ++ /* parse redboot partitions */ ++ ++ result = mtd_device_parse_register(mtd, part_probe_types, ++ NULL, NULL, 0); ++#endif ++ ++ return result; ++} ++ ++static int ++spiflash_remove(struct platform_device *pdev) ++{ ++ struct spiflash_priv *priv = platform_get_drvdata(pdev); ++ ++ mtd_device_unregister(&priv->mtd); ++ ++ return 0; ++} ++ ++static struct platform_driver spiflash_driver = { ++ .driver.name = DRIVER_NAME, ++ .probe = spiflash_probe, ++ .remove = spiflash_remove, ++}; ++ ++module_platform_driver(spiflash_driver); ++ ++MODULE_LICENSE("GPL"); ++MODULE_AUTHOR("OpenWrt.org"); ++MODULE_AUTHOR("Atheros Communications Inc"); ++MODULE_DESCRIPTION("MTD driver for SPI Flash on Atheros AR2315+ SOC"); ++MODULE_ALIAS("platform:" DRIVER_NAME); ++ +--- /dev/null ++++ b/drivers/mtd/devices/ar2315_spiflash.h +@@ -0,0 +1,106 @@ ++/* ++ * Atheros AR2315 SPI Flash Memory support header file. ++ * ++ * Copyright (c) 2005, Atheros Communications Inc. ++ * Copyright (C) 2006 FON Technology, SL. ++ * Copyright (C) 2006 Imre Kaloz ++ * Copyright (C) 2006-2009 Felix Fietkau ++ * ++ * This code is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation. ++ * ++ */ ++#ifndef __AR2315_SPIFLASH_H ++#define __AR2315_SPIFLASH_H ++ ++#define STM_PAGE_SIZE 256 ++ ++#define SFI_WRITE_BUFFER_SIZE 4 ++#define SFI_FLASH_ADDR_MASK 0x00ffffff ++ ++#define STM_8MBIT_SIGNATURE 0x13 ++#define STM_M25P80_BYTE_COUNT 1048576 ++#define STM_M25P80_SECTOR_COUNT 16 ++#define STM_M25P80_SECTOR_SIZE 0x10000 ++ ++#define STM_16MBIT_SIGNATURE 0x14 ++#define STM_M25P16_BYTE_COUNT 2097152 ++#define STM_M25P16_SECTOR_COUNT 32 ++#define STM_M25P16_SECTOR_SIZE 0x10000 ++ ++#define STM_32MBIT_SIGNATURE 0x15 ++#define STM_M25P32_BYTE_COUNT 4194304 ++#define STM_M25P32_SECTOR_COUNT 64 ++#define STM_M25P32_SECTOR_SIZE 0x10000 ++ ++#define STM_64MBIT_SIGNATURE 0x16 ++#define STM_M25P64_BYTE_COUNT 8388608 ++#define STM_M25P64_SECTOR_COUNT 128 ++#define STM_M25P64_SECTOR_SIZE 0x10000 ++ ++#define STM_128MBIT_SIGNATURE 0x17 ++#define STM_M25P128_BYTE_COUNT 16777216 ++#define STM_M25P128_SECTOR_COUNT 256 ++#define STM_M25P128_SECTOR_SIZE 0x10000 ++ ++#define STM_1MB_BYTE_COUNT STM_M25P80_BYTE_COUNT ++#define STM_1MB_SECTOR_COUNT STM_M25P80_SECTOR_COUNT ++#define STM_1MB_SECTOR_SIZE STM_M25P80_SECTOR_SIZE ++#define STM_2MB_BYTE_COUNT STM_M25P16_BYTE_COUNT ++#define STM_2MB_SECTOR_COUNT STM_M25P16_SECTOR_COUNT ++#define STM_2MB_SECTOR_SIZE STM_M25P16_SECTOR_SIZE ++#define STM_4MB_BYTE_COUNT STM_M25P32_BYTE_COUNT ++#define STM_4MB_SECTOR_COUNT STM_M25P32_SECTOR_COUNT ++#define STM_4MB_SECTOR_SIZE STM_M25P32_SECTOR_SIZE ++#define STM_8MB_BYTE_COUNT STM_M25P64_BYTE_COUNT ++#define STM_8MB_SECTOR_COUNT STM_M25P64_SECTOR_COUNT ++#define STM_8MB_SECTOR_SIZE STM_M25P64_SECTOR_SIZE ++#define STM_16MB_BYTE_COUNT STM_M25P128_BYTE_COUNT ++#define STM_16MB_SECTOR_COUNT STM_M25P128_SECTOR_COUNT ++#define STM_16MB_SECTOR_SIZE STM_M25P128_SECTOR_SIZE ++ ++/* ++ * ST Microelectronics Opcodes for Serial Flash ++ */ ++ ++#define STM_OP_WR_ENABLE 0x06 /* Write Enable */ ++#define STM_OP_WR_DISABLE 0x04 /* Write Disable */ ++#define STM_OP_RD_STATUS 0x05 /* Read Status */ ++#define STM_OP_WR_STATUS 0x01 /* Write Status */ ++#define STM_OP_RD_DATA 0x03 /* Read Data */ ++#define STM_OP_FAST_RD_DATA 0x0b /* Fast Read Data */ ++#define STM_OP_PAGE_PGRM 0x02 /* Page Program */ ++#define STM_OP_SECTOR_ERASE 0xd8 /* Sector Erase */ ++#define STM_OP_BULK_ERASE 0xc7 /* Bulk Erase */ ++#define STM_OP_DEEP_PWRDOWN 0xb9 /* Deep Power-Down Mode */ ++#define STM_OP_RD_SIG 0xab /* Read Electronic Signature */ ++ ++#define STM_STATUS_WIP 0x01 /* Write-In-Progress */ ++#define STM_STATUS_WEL 0x02 /* Write Enable Latch */ ++#define STM_STATUS_BP0 0x04 /* Block Protect 0 */ ++#define STM_STATUS_BP1 0x08 /* Block Protect 1 */ ++#define STM_STATUS_BP2 0x10 /* Block Protect 2 */ ++#define STM_STATUS_SRWD 0x80 /* Status Register Write Disable */ ++ ++/* ++ * SPI Flash Interface Registers ++ */ ++ ++#define SPI_FLASH_CTL 0x00 ++#define SPI_FLASH_OPCODE 0x04 ++#define SPI_FLASH_DATA 0x08 ++ ++#define SPI_CTL_START 0x00000100 ++#define SPI_CTL_BUSY 0x00010000 ++#define SPI_CTL_TXCNT_MASK 0x0000000f ++#define SPI_CTL_RXCNT_MASK 0x000000f0 ++#define SPI_CTL_TX_RX_CNT_MASK 0x000000ff ++#define SPI_CTL_SIZE_MASK 0x00060000 ++ ++#define SPI_CTL_CLK_SEL_MASK 0x03000000 ++#define SPI_OPCODE_MASK 0x000000ff ++ ++#define SPI_STATUS_WIP STM_STATUS_WIP ++ ++#endif +--- a/arch/mips/ath25/ar2315.c ++++ b/arch/mips/ath25/ar2315.c +@@ -218,6 +218,28 @@ static struct platform_device ar2315_gpi + .num_resources = ARRAY_SIZE(ar2315_gpio_res) + }; + ++static struct resource ar2315_spiflash_res[] = { ++ { ++ .name = "spiflash_read", ++ .flags = IORESOURCE_MEM, ++ .start = AR2315_SPI_READ_BASE, ++ .end = AR2315_SPI_READ_BASE + AR2315_SPI_READ_SIZE - 1, ++ }, ++ { ++ .name = "spiflash_mmr", ++ .flags = IORESOURCE_MEM, ++ .start = AR2315_SPI_MMR_BASE, ++ .end = AR2315_SPI_MMR_BASE + AR2315_SPI_MMR_SIZE - 1, ++ }, ++}; ++ ++static struct platform_device ar2315_spiflash = { ++ .id = 0, ++ .name = "ar2315-spiflash", ++ .resource = ar2315_spiflash_res, ++ .num_resources = ARRAY_SIZE(ar2315_spiflash_res) ++}; ++ + void __init ar2315_init_devices(void) + { + /* Find board configuration */ +@@ -228,6 +250,8 @@ void __init ar2315_init_devices(void) + ar2315_gpio_res[1].end = ar2315_gpio_res[1].start; + platform_device_register(&ar2315_gpio); + ++ platform_device_register(&ar2315_spiflash); ++ + ar2315_eth_data.macaddr = ath25_board.config->enet0_mac; + ath25_add_ethernet(0, AR2315_ENET0_BASE, "eth0_mii", + AR2315_ENET0_MII_BASE, AR2315_IRQ_ENET0, diff --git a/target/linux/ath25/patches-5.10/130-watchdog.patch b/target/linux/ath25/patches-5.10/130-watchdog.patch new file mode 100644 index 0000000000..1c8c9a9677 --- /dev/null +++ b/target/linux/ath25/patches-5.10/130-watchdog.patch @@ -0,0 +1,277 @@ +--- /dev/null ++++ b/drivers/watchdog/ar2315-wtd.c +@@ -0,0 +1,209 @@ ++/* ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; either version 2 of the License, or ++ * (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program; if not, see . ++ * ++ * Copyright (C) 2008 John Crispin ++ * Based on EP93xx and ifxmips wdt driver ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#define DRIVER_NAME "ar2315-wdt" ++ ++#define CLOCK_RATE 40000000 ++#define HEARTBEAT(x) (x < 1 || x > 90 ? 20 : x) ++ ++#define WDT_REG_TIMER 0x00 ++#define WDT_REG_CTRL 0x04 ++ ++#define WDT_CTRL_ACT_NONE 0x00000000 /* No action */ ++#define WDT_CTRL_ACT_NMI 0x00000001 /* NMI on watchdog */ ++#define WDT_CTRL_ACT_RESET 0x00000002 /* reset on watchdog */ ++ ++static int wdt_timeout = 20; ++static int started; ++static int in_use; ++static void __iomem *wdt_base; ++ ++static inline void ar2315_wdt_wr(unsigned reg, u32 val) ++{ ++ iowrite32(val, wdt_base + reg); ++} ++ ++static void ++ar2315_wdt_enable(void) ++{ ++ ar2315_wdt_wr(WDT_REG_TIMER, wdt_timeout * CLOCK_RATE); ++} ++ ++static ssize_t ++ar2315_wdt_write(struct file *file, const char __user *data, size_t len, ++ loff_t *ppos) ++{ ++ if (len) ++ ar2315_wdt_enable(); ++ return len; ++} ++ ++static int ++ar2315_wdt_open(struct inode *inode, struct file *file) ++{ ++ if (in_use) ++ return -EBUSY; ++ ar2315_wdt_enable(); ++ in_use = 1; ++ started = 1; ++ return nonseekable_open(inode, file); ++} ++ ++static int ++ar2315_wdt_release(struct inode *inode, struct file *file) ++{ ++ in_use = 0; ++ return 0; ++} ++ ++static irqreturn_t ++ar2315_wdt_interrupt(int irq, void *dev) ++{ ++ struct platform_device *pdev = (struct platform_device *)dev; ++ ++ if (started) { ++ dev_crit(&pdev->dev, "watchdog expired, rebooting system\n"); ++ emergency_restart(); ++ } else { ++ ar2315_wdt_wr(WDT_REG_CTRL, 0); ++ ar2315_wdt_wr(WDT_REG_TIMER, 0); ++ } ++ return IRQ_HANDLED; ++} ++ ++static struct watchdog_info ident = { ++ .options = WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING, ++ .identity = "ar2315 Watchdog", ++}; ++ ++static long ++ar2315_wdt_ioctl(struct file *file, unsigned int cmd, unsigned long arg) ++{ ++ int new_wdt_timeout; ++ int ret = -ENOIOCTLCMD; ++ ++ switch (cmd) { ++ case WDIOC_GETSUPPORT: ++ ret = copy_to_user((void __user *)arg, &ident, sizeof(ident)) ? ++ -EFAULT : 0; ++ break; ++ case WDIOC_KEEPALIVE: ++ ar2315_wdt_enable(); ++ ret = 0; ++ break; ++ case WDIOC_SETTIMEOUT: ++ ret = get_user(new_wdt_timeout, (int __user *)arg); ++ if (ret) ++ break; ++ wdt_timeout = HEARTBEAT(new_wdt_timeout); ++ ar2315_wdt_enable(); ++ break; ++ case WDIOC_GETTIMEOUT: ++ ret = put_user(wdt_timeout, (int __user *)arg); ++ break; ++ } ++ return ret; ++} ++ ++static const struct file_operations ar2315_wdt_fops = { ++ .owner = THIS_MODULE, ++ .llseek = no_llseek, ++ .write = ar2315_wdt_write, ++ .unlocked_ioctl = ar2315_wdt_ioctl, ++ .open = ar2315_wdt_open, ++ .release = ar2315_wdt_release, ++}; ++ ++static struct miscdevice ar2315_wdt_miscdev = { ++ .minor = WATCHDOG_MINOR, ++ .name = "watchdog", ++ .fops = &ar2315_wdt_fops, ++}; ++ ++static int ++ar2315_wdt_probe(struct platform_device *dev) ++{ ++ struct resource *mem_res, *irq_res; ++ int ret = 0; ++ ++ if (wdt_base) ++ return -EBUSY; ++ ++ irq_res = platform_get_resource(dev, IORESOURCE_IRQ, 0); ++ if (!irq_res) { ++ dev_err(&dev->dev, "no IRQ resource\n"); ++ return -ENOENT; ++ } ++ ++ mem_res = platform_get_resource(dev, IORESOURCE_MEM, 0); ++ wdt_base = devm_ioremap_resource(&dev->dev, mem_res); ++ if (IS_ERR(wdt_base)) ++ return PTR_ERR(wdt_base); ++ ++ ret = devm_request_irq(&dev->dev, irq_res->start, ar2315_wdt_interrupt, ++ 0, DRIVER_NAME, dev); ++ if (ret) { ++ dev_err(&dev->dev, "failed to register inetrrupt\n"); ++ goto out; ++ } ++ ++ ret = misc_register(&ar2315_wdt_miscdev); ++ if (ret) ++ dev_err(&dev->dev, "failed to register miscdev\n"); ++ ++out: ++ return ret; ++} ++ ++static int ++ar2315_wdt_remove(struct platform_device *dev) ++{ ++ misc_deregister(&ar2315_wdt_miscdev); ++ return 0; ++} ++ ++static struct platform_driver ar2315_wdt_driver = { ++ .probe = ar2315_wdt_probe, ++ .remove = ar2315_wdt_remove, ++ .driver = { ++ .name = DRIVER_NAME, ++ .owner = THIS_MODULE, ++ }, ++}; ++ ++module_platform_driver(ar2315_wdt_driver); ++ ++MODULE_DESCRIPTION("Atheros AR2315 hardware watchdog driver"); ++MODULE_AUTHOR("John Crispin "); ++MODULE_LICENSE("GPL"); ++MODULE_ALIAS("platform:" DRIVER_NAME); +--- a/drivers/watchdog/Kconfig ++++ b/drivers/watchdog/Kconfig +@@ -1873,6 +1873,13 @@ config PIC32_DMT + To compile this driver as a loadable module, choose M here. + The module will be called pic32-dmt. + ++config AR2315_WDT ++ tristate "Atheros AR2315+ WiSoCs Watchdog Timer" ++ depends on ATH25 ++ help ++ Hardware driver for the built-in watchdog timer on the Atheros ++ AR2315/AR2316 WiSoCs. ++ + # PARISC Architecture + + # POWERPC Architecture +--- a/drivers/watchdog/Makefile ++++ b/drivers/watchdog/Makefile +@@ -164,6 +164,7 @@ obj-$(CONFIG_WDT_MTX1) += mtx-1_wdt.o + obj-$(CONFIG_PNX833X_WDT) += pnx833x_wdt.o + obj-$(CONFIG_SIBYTE_WDOG) += sb_wdog.o + obj-$(CONFIG_AR7_WDT) += ar7_wdt.o ++obj-$(CONFIG_AR2315_WDT) += ar2315-wtd.o + obj-$(CONFIG_TXX9_WDT) += txx9wdt.o + obj-$(CONFIG_OCTEON_WDT) += octeon-wdt.o + octeon-wdt-y := octeon-wdt-main.o octeon-wdt-nmi.o +--- a/arch/mips/ath25/ar2315.c ++++ b/arch/mips/ath25/ar2315.c +@@ -218,6 +218,24 @@ static struct platform_device ar2315_gpi + .num_resources = ARRAY_SIZE(ar2315_gpio_res) + }; + ++static struct resource ar2315_wdt_res[] = { ++ { ++ .flags = IORESOURCE_MEM, ++ .start = AR2315_RST_BASE + AR2315_WDT_TIMER, ++ .end = AR2315_RST_BASE + AR2315_WDT_TIMER + 8 - 1, ++ }, ++ { ++ .flags = IORESOURCE_IRQ, ++ } ++}; ++ ++static struct platform_device ar2315_wdt = { ++ .id = 0, ++ .name = "ar2315-wdt", ++ .resource = ar2315_wdt_res, ++ .num_resources = ARRAY_SIZE(ar2315_wdt_res) ++}; ++ + static struct resource ar2315_spiflash_res[] = { + { + .name = "spiflash_read", +@@ -250,6 +268,11 @@ void __init ar2315_init_devices(void) + ar2315_gpio_res[1].end = ar2315_gpio_res[1].start; + platform_device_register(&ar2315_gpio); + ++ ar2315_wdt_res[1].start = irq_create_mapping(ar2315_misc_irq_domain, ++ AR2315_MISC_IRQ_WATCHDOG); ++ ar2315_wdt_res[1].end = ar2315_wdt_res[1].start; ++ platform_device_register(&ar2315_wdt); ++ + platform_device_register(&ar2315_spiflash); + + ar2315_eth_data.macaddr = ath25_board.config->enet0_mac; diff --git a/target/linux/ath25/patches-5.10/140-redboot_boardconfig.patch b/target/linux/ath25/patches-5.10/140-redboot_boardconfig.patch new file mode 100644 index 0000000000..81b23e863e --- /dev/null +++ b/target/linux/ath25/patches-5.10/140-redboot_boardconfig.patch @@ -0,0 +1,60 @@ +--- a/drivers/mtd/parsers/redboot.c ++++ b/drivers/mtd/parsers/redboot.c +@@ -16,6 +16,8 @@ + #include + #include + ++#define BOARD_CONFIG_PART "boardconfig" ++ + struct fis_image_desc { + unsigned char name[16]; // Null terminated name + uint32_t flash_base; // Address within FLASH of image +@@ -72,6 +74,7 @@ static int parse_redboot_partitions(stru + const struct mtd_partition **pparts, + struct mtd_part_parser_data *data) + { ++ unsigned long max_offset = 0; + int nrparts = 0; + struct fis_image_desc *buf; + struct mtd_partition *parts; +@@ -239,14 +242,15 @@ static int parse_redboot_partitions(stru + } + } + #endif +- parts = kzalloc(sizeof(*parts)*nrparts + nulllen + namelen, GFP_KERNEL); ++ parts = kzalloc(sizeof(*parts) * (nrparts + 1) + nulllen + namelen + ++ sizeof(BOARD_CONFIG_PART), GFP_KERNEL); + + if (!parts) { + ret = -ENOMEM; + goto out; + } + +- nullname = (char *)&parts[nrparts]; ++ nullname = (char *)&parts[nrparts + 1]; + #ifdef CONFIG_MTD_REDBOOT_PARTS_UNALLOCATED + if (nulllen > 0) { + strcpy(nullname, nullstring); +@@ -265,6 +269,8 @@ static int parse_redboot_partitions(stru + } + #endif + for ( ; iimg->size; + parts[i].offset = fl->img->flash_base; + parts[i].name = names; +@@ -298,6 +304,13 @@ static int parse_redboot_partitions(stru + fl = fl->next; + kfree(tmp_fl); + } ++ if (master->size - max_offset >= master->erasesize) { ++ parts[nrparts].size = master->size - max_offset; ++ parts[nrparts].offset = max_offset; ++ parts[nrparts].name = names; ++ strcpy(names, BOARD_CONFIG_PART); ++ nrparts++; ++ } + ret = nrparts; + *pparts = parts; + out: diff --git a/target/linux/ath79/patches-5.4/408-mtd-redboot_partition_scan.patch b/target/linux/ath25/patches-5.10/141-redboot_partition_scan.patch similarity index 79% rename from target/linux/ath79/patches-5.4/408-mtd-redboot_partition_scan.patch rename to target/linux/ath25/patches-5.10/141-redboot_partition_scan.patch index e5b06e14a5..343eedc075 100644 --- a/target/linux/ath79/patches-5.4/408-mtd-redboot_partition_scan.patch +++ b/target/linux/ath25/patches-5.10/141-redboot_partition_scan.patch @@ -1,6 +1,6 @@ --- a/drivers/mtd/parsers/redboot.c +++ b/drivers/mtd/parsers/redboot.c -@@ -90,12 +90,18 @@ static int parse_redboot_partitions(stru +@@ -93,12 +93,18 @@ static int parse_redboot_partitions(stru parse_redboot_of(master); @@ -19,7 +19,7 @@ return -EIO; } offset -= master->erasesize; -@@ -108,10 +114,6 @@ static int parse_redboot_partitions(stru +@@ -111,10 +117,6 @@ static int parse_redboot_partitions(stru goto nogood; } } @@ -30,12 +30,12 @@ printk(KERN_NOTICE "Searching for RedBoot partition table in %s at offset 0x%lx\n", master->name, offset); -@@ -184,6 +186,11 @@ static int parse_redboot_partitions(stru +@@ -187,6 +189,11 @@ static int parse_redboot_partitions(stru } if (i == numslots) { /* Didn't find it */ + if (offset + master->erasesize < master->size) { -+ /* not at the end of the flash yet, maybe next block :) */ ++ /* not at the end of the flash yet, maybe next block */ + directory++; + goto restart; + } diff --git a/target/linux/ath25/patches-5.10/142-redboot_various_erase_size_fix.patch b/target/linux/ath25/patches-5.10/142-redboot_various_erase_size_fix.patch new file mode 100644 index 0000000000..55cf84eeff --- /dev/null +++ b/target/linux/ath25/patches-5.10/142-redboot_various_erase_size_fix.patch @@ -0,0 +1,72 @@ +--- a/drivers/mtd/parsers/redboot.c ++++ b/drivers/mtd/parsers/redboot.c +@@ -70,6 +70,22 @@ static void parse_redboot_of(struct mtd_ + directory = dirblock; + } + ++static uint32_t mtd_get_offset_erasesize(struct mtd_info *mtd, uint64_t offset) ++{ ++ struct mtd_erase_region_info *regions = mtd->eraseregions; ++ int i; ++ ++ for (i = 0; i < mtd->numeraseregions; i++) { ++ if (regions[i].offset + ++ regions[i].numblocks * regions[i].erasesize <= offset) ++ continue; ++ ++ return regions[i].erasesize; ++ } ++ ++ return mtd->erasesize; ++} ++ + static int parse_redboot_partitions(struct mtd_info *master, + const struct mtd_partition **pparts, + struct mtd_part_parser_data *data) +@@ -86,6 +102,7 @@ static int parse_redboot_partitions(stru + int namelen = 0; + int nulllen = 0; + int numslots; ++ int first_slot; + unsigned long offset; + #ifdef CONFIG_MTD_REDBOOT_PARTS_UNALLOCATED + static char nullstring[] = "unallocated"; +@@ -200,7 +217,10 @@ static int parse_redboot_partitions(stru + goto out; + } + +- for (i = 0; i < numslots; i++) { ++ first_slot = (buf[i].flash_base & (master->erasesize - 1)) / ++ sizeof(struct fis_image_desc); ++ ++ for (i = first_slot; i < first_slot + numslots; i++) { + struct fis_list *new_fl, **prev; + + if (buf[i].name[0] == 0xff) { +@@ -276,12 +296,13 @@ static int parse_redboot_partitions(stru + } + #endif + for ( ; iimg->size; + parts[i].offset = fl->img->flash_base; + parts[i].name = names; + ++ if (max_offset < parts[i].offset + parts[i].size) ++ max_offset = parts[i].offset + parts[i].size; ++ + strcpy(names, fl->img->name); + #ifdef CONFIG_MTD_REDBOOT_PARTS_READONLY + if (!memcmp(names, "RedBoot", 8) || +@@ -311,7 +332,9 @@ static int parse_redboot_partitions(stru + fl = fl->next; + kfree(tmp_fl); + } +- if (master->size - max_offset >= master->erasesize) { ++ ++ if (master->size - max_offset >= ++ mtd_get_offset_erasesize(master, max_offset)) { + parts[nrparts].size = master->size - max_offset; + parts[nrparts].offset = max_offset; + parts[nrparts].name = names; diff --git a/target/linux/ath25/patches-5.10/210-reset_button.patch b/target/linux/ath25/patches-5.10/210-reset_button.patch new file mode 100644 index 0000000000..b3f7a14cda --- /dev/null +++ b/target/linux/ath25/patches-5.10/210-reset_button.patch @@ -0,0 +1,71 @@ +--- a/arch/mips/ath25/Makefile ++++ b/arch/mips/ath25/Makefile +@@ -8,7 +8,7 @@ + # Copyright (C) 2006-2009 Felix Fietkau + # + +-obj-y += board.o prom.o devices.o ++obj-y += board.o prom.o devices.o reset.o + + obj-$(CONFIG_EARLY_PRINTK) += early_printk.o + +--- /dev/null ++++ b/arch/mips/ath25/reset.c +@@ -0,0 +1,57 @@ ++#include ++#include ++#include ++#include ++#include ++#include ++#include "devices.h" ++ ++static int __init ++ar231x_init_reset(void) ++{ ++ struct platform_device *pdev; ++ struct gpio_keys_platform_data pdata; ++ struct gpio_keys_button *p; ++ int err; ++ ++ if (ath25_board.config->reset_config_gpio == 0xffff) ++ return -ENODEV; ++ ++ p = kzalloc(sizeof(*p), GFP_KERNEL); ++ if (!p) ++ goto err; ++ ++ p->desc = "reset"; ++ p->type = EV_KEY; ++ p->code = KEY_RESTART; ++ p->debounce_interval = 60; ++ p->gpio = ath25_board.config->reset_config_gpio; ++ ++ memset(&pdata, 0, sizeof(pdata)); ++ pdata.poll_interval = 20; ++ pdata.buttons = p; ++ pdata.nbuttons = 1; ++ ++ pdev = platform_device_alloc("gpio-keys-polled", 0); ++ if (!pdev) ++ goto err_free; ++ ++ err = platform_device_add_data(pdev, &pdata, sizeof(pdata)); ++ if (err) ++ goto err_put_pdev; ++ ++ err = platform_device_add(pdev); ++ if (err) ++ goto err_put_pdev; ++ ++ return 0; ++ ++err_put_pdev: ++ platform_device_put(pdev); ++err_free: ++ kfree(p); ++err: ++ return -ENOMEM; ++} ++ ++device_initcall(ar231x_init_reset); diff --git a/target/linux/ath25/patches-5.10/220-enet_micrel_workaround.patch b/target/linux/ath25/patches-5.10/220-enet_micrel_workaround.patch new file mode 100644 index 0000000000..2bd0815631 --- /dev/null +++ b/target/linux/ath25/patches-5.10/220-enet_micrel_workaround.patch @@ -0,0 +1,111 @@ +--- a/drivers/net/ethernet/atheros/ar231x/ar231x.c ++++ b/drivers/net/ethernet/atheros/ar231x/ar231x.c +@@ -135,6 +135,7 @@ static int ar231x_mdiobus_write(struct m + static int ar231x_mdiobus_reset(struct mii_bus *bus); + static int ar231x_mdiobus_probe(struct net_device *dev); + static void ar231x_adjust_link(struct net_device *dev); ++static bool no_phy; + + #ifndef ERR + #define ERR(fmt, args...) printk("%s: " fmt, __func__, ##args) +@@ -166,6 +167,32 @@ static const struct net_device_ops ar231 + #endif + }; + ++static int get_phy_id(struct mii_bus *bus, int addr, u32 *phy_id) ++{ ++ int phy_reg; ++ ++ /** ++ * Grab the bits from PHYIR1, and put them ++ * in the upper half. ++ */ ++ phy_reg = mdiobus_read(bus, addr, MII_PHYSID1); ++ ++ if (phy_reg < 0) ++ return -EIO; ++ ++ *phy_id = (phy_reg & 0xffff) << 16; ++ ++ /* Grab the bits from PHYIR2, and put them in the lower half */ ++ phy_reg = mdiobus_read(bus, addr, MII_PHYSID2); ++ ++ if (phy_reg < 0) ++ return -EIO; ++ ++ *phy_id |= (phy_reg & 0xffff); ++ ++ return 0; ++} ++ + static int ar231x_probe(struct platform_device *pdev) + { + struct net_device *dev; +@@ -273,6 +300,24 @@ static int ar231x_probe(struct platform_ + + mdiobus_register(sp->mii_bus); + ++ /** ++ * Workaround for Micrel switch, which is only available on ++ * one PHY and cannot be configured through MDIO. ++ */ ++ if (!no_phy) { ++ u32 phy_id = 0; ++ ++ get_phy_id(sp->mii_bus, 1, &phy_id); ++ if (phy_id == 0x00221450) ++ no_phy = true; ++ } ++ if (no_phy) { ++ sp->link = 1; ++ netif_carrier_on(dev); ++ return 0; ++ } ++ no_phy = true; ++ + if (ar231x_mdiobus_probe(dev) != 0) { + printk(KERN_ERR "%s: mdiobus_probe failed\n", dev->name); + rx_tasklet_cleanup(dev); +@@ -326,8 +371,10 @@ static int ar231x_remove(struct platform + rx_tasklet_cleanup(dev); + ar231x_init_cleanup(dev); + unregister_netdev(dev); +- mdiobus_unregister(sp->mii_bus); +- mdiobus_free(sp->mii_bus); ++ if (sp->mii_bus) { ++ mdiobus_unregister(sp->mii_bus); ++ mdiobus_free(sp->mii_bus); ++ } + kfree(dev); + return 0; + } +@@ -870,7 +917,8 @@ static int ar231x_open(struct net_device + + sp->eth_regs->mac_control |= MAC_CONTROL_RE; + +- phy_start(sp->phy_dev); ++ if (sp->phy_dev) ++ phy_start(sp->phy_dev); + + return 0; + } +@@ -951,7 +999,8 @@ static int ar231x_close(struct net_devic + + #endif + +- phy_stop(sp->phy_dev); ++ if (sp->phy_dev) ++ phy_stop(sp->phy_dev); + + return 0; + } +@@ -995,6 +1044,9 @@ static int ar231x_ioctl(struct net_devic + { + struct ar231x_private *sp = netdev_priv(dev); + ++ if (!sp->phy_dev) ++ return -ENODEV; ++ + switch (cmd) { + case SIOCGMIIPHY: + case SIOCGMIIREG: diff --git a/target/linux/ath25/patches-5.10/330-board_leds.patch b/target/linux/ath25/patches-5.10/330-board_leds.patch new file mode 100644 index 0000000000..a683d01111 --- /dev/null +++ b/target/linux/ath25/patches-5.10/330-board_leds.patch @@ -0,0 +1,116 @@ +--- a/arch/mips/ath25/ar2315.c ++++ b/arch/mips/ath25/ar2315.c +@@ -24,6 +24,7 @@ + #include + #include + #include ++#include + #include + #include + #include +@@ -258,6 +259,50 @@ static struct platform_device ar2315_spi + .num_resources = ARRAY_SIZE(ar2315_spiflash_res) + }; + ++#ifdef CONFIG_LEDS_GPIO ++static struct gpio_led ar2315_leds[6]; ++static struct gpio_led_platform_data ar2315_led_data = { ++ .leds = (void *)ar2315_leds, ++}; ++ ++static struct platform_device ar2315_gpio_leds = { ++ .name = "leds-gpio", ++ .id = -1, ++ .dev = { ++ .platform_data = (void *)&ar2315_led_data, ++ } ++}; ++ ++static void __init ar2315_init_gpio_leds(void) ++{ ++ static char led_names[6][6]; ++ int i, led = 0; ++ ++ ar2315_led_data.num_leds = 0; ++ for (i = 1; i < 8; i++) { ++ if ((i == AR2315_RESET_GPIO) || ++ (i == ath25_board.config->reset_config_gpio)) ++ continue; ++ ++ if (i == ath25_board.config->sys_led_gpio) ++ strcpy(led_names[led], "wlan"); ++ else ++ sprintf(led_names[led], "gpio%d", i); ++ ++ ar2315_leds[led].name = led_names[led]; ++ ar2315_leds[led].gpio = i; ++ ar2315_leds[led].active_low = 0; ++ led++; ++ } ++ ar2315_led_data.num_leds = led; ++ platform_device_register(&ar2315_gpio_leds); ++} ++#else ++static inline void ar2315_init_gpio_leds(void) ++{ ++} ++#endif ++ + void __init ar2315_init_devices(void) + { + /* Find board configuration */ +@@ -268,6 +313,8 @@ void __init ar2315_init_devices(void) + ar2315_gpio_res[1].end = ar2315_gpio_res[1].start; + platform_device_register(&ar2315_gpio); + ++ ar2315_init_gpio_leds(); ++ + ar2315_wdt_res[1].start = irq_create_mapping(ar2315_misc_irq_domain, + AR2315_MISC_IRQ_WATCHDOG); + ar2315_wdt_res[1].end = ar2315_wdt_res[1].start; +--- a/arch/mips/ath25/ar5312.c ++++ b/arch/mips/ath25/ar5312.c +@@ -24,6 +24,7 @@ + #include + #include + #include ++#include + #include + #include + #include +@@ -229,6 +230,23 @@ static struct platform_device ar5312_gpi + .num_resources = ARRAY_SIZE(ar5312_gpio_res), + }; + ++#ifdef CONFIG_LEDS_GPIO ++static struct gpio_led ar5312_leds[] = { ++ { .name = "wlan", .gpio = 0, .active_low = 1, }, ++}; ++ ++static const struct gpio_led_platform_data ar5312_led_data = { ++ .num_leds = ARRAY_SIZE(ar5312_leds), ++ .leds = (void *)ar5312_leds, ++}; ++ ++static struct platform_device ar5312_gpio_leds = { ++ .name = "leds-gpio", ++ .id = -1, ++ .dev.platform_data = (void *)&ar5312_led_data, ++}; ++#endif ++ + static void __init ar5312_flash_init(void) + { + void __iomem *flashctl_base; +@@ -299,6 +317,11 @@ void __init ar5312_init_devices(void) + + platform_device_register(&ar5312_gpio); + ++#ifdef CONFIG_LEDS_GPIO ++ ar5312_leds[0].gpio = config->sys_led_gpio; ++ platform_device_register(&ar5312_gpio_leds); ++#endif ++ + /* Fix up MAC addresses if necessary */ + if (is_broadcast_ether_addr(config->enet0_mac)) + ether_addr_copy(config->enet0_mac, config->enet1_mac); diff --git a/target/linux/ath25/patches-5.10/700-swconfig_mvswitch.patch b/target/linux/ath25/patches-5.10/700-swconfig_mvswitch.patch new file mode 100644 index 0000000000..32f332189b --- /dev/null +++ b/target/linux/ath25/patches-5.10/700-swconfig_mvswitch.patch @@ -0,0 +1,23 @@ +--- a/drivers/net/phy/Kconfig ++++ b/drivers/net/phy/Kconfig +@@ -95,6 +95,10 @@ config IP17XX_PHY + tristate "Driver for IC+ IP17xx switches" + select SWCONFIG + ++config MVSWITCH_PHY ++ tristate "Driver for Marvell 88E6060 switches" ++ select ETHERNET_PACKET_MANGLE ++ + config PSB6970_PHY + tristate "Lantiq XWAY Tantos (PSB6970) Ethernet switch" + select SWCONFIG +--- a/drivers/net/phy/Makefile ++++ b/drivers/net/phy/Makefile +@@ -29,6 +29,7 @@ obj-$(CONFIG_ADM6996_PHY) += adm6996.o + obj-$(CONFIG_AR8216_PHY) += ar8216.o ar8327.o + obj-$(CONFIG_SWCONFIG_B53) += b53/ + obj-$(CONFIG_IP17XX_PHY) += ip17xx.o ++obj-$(CONFIG_MVSWITCH_PHY) += mvswitch.o + obj-$(CONFIG_PSB6970_PHY) += psb6970.o + obj-$(CONFIG_RTL8306_PHY) += rtl8306.o + obj-$(CONFIG_RTL8366_SMI) += rtl8366_smi.o diff --git a/target/linux/ath25/patches-5.4/700-swconfig_mvswitch.patch b/target/linux/ath25/patches-5.4/700-swconfig_mvswitch.patch new file mode 100644 index 0000000000..7f2c082432 --- /dev/null +++ b/target/linux/ath25/patches-5.4/700-swconfig_mvswitch.patch @@ -0,0 +1,23 @@ +--- a/drivers/net/phy/Kconfig ++++ b/drivers/net/phy/Kconfig +@@ -284,6 +284,10 @@ config IP17XX_PHY + tristate "Driver for IC+ IP17xx switches" + select SWCONFIG + ++config MVSWITCH_PHY ++ tristate "Driver for Marvell 88E6060 switches" ++ select ETHERNET_PACKET_MANGLE ++ + config PSB6970_PHY + tristate "Lantiq XWAY Tantos (PSB6970) Ethernet switch" + select SWCONFIG +--- a/drivers/net/phy/Makefile ++++ b/drivers/net/phy/Makefile +@@ -27,6 +27,7 @@ obj-$(CONFIG_ADM6996_PHY) += adm6996.o + obj-$(CONFIG_AR8216_PHY) += ar8216.o ar8327.o + obj-$(CONFIG_SWCONFIG_B53) += b53/ + obj-$(CONFIG_IP17XX_PHY) += ip17xx.o ++obj-$(CONFIG_MVSWITCH_PHY) += mvswitch.o + obj-$(CONFIG_PSB6970_PHY) += psb6970.o + obj-$(CONFIG_RTL8306_PHY) += rtl8306.o + obj-$(CONFIG_RTL8366_SMI) += rtl8366_smi.o diff --git a/target/linux/ath79/config-5.4 b/target/linux/ath79/config-5.4 deleted file mode 100644 index e37b728554..0000000000 --- a/target/linux/ath79/config-5.4 +++ /dev/null @@ -1,251 +0,0 @@ -CONFIG_AG71XX=y -# CONFIG_AG71XX_DEBUG is not set -CONFIG_AG71XX_DEBUG_FS=y -CONFIG_AR8216_PHY=y -CONFIG_AR8216_PHY_LEDS=y -CONFIG_ARCH_32BIT_OFF_T=y -CONFIG_ARCH_CLOCKSOURCE_DATA=y -CONFIG_ARCH_HAS_DMA_COHERENT_TO_PFN=y -CONFIG_ARCH_HAS_DMA_PREP_COHERENT=y -CONFIG_ARCH_HAS_DMA_WRITE_COMBINE=y -CONFIG_ARCH_HAS_ELF_RANDOMIZE=y -CONFIG_ARCH_HAS_RESET_CONTROLLER=y -CONFIG_ARCH_HAS_SYNC_DMA_FOR_DEVICE=y -CONFIG_ARCH_HAS_UNCACHED_SEGMENT=y -CONFIG_ARCH_HIBERNATION_POSSIBLE=y -CONFIG_ARCH_MMAP_RND_BITS_MAX=15 -CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MAX=15 -CONFIG_ARCH_SUPPORTS_UPROBES=y -CONFIG_ARCH_SUSPEND_POSSIBLE=y -CONFIG_ARCH_USE_BUILTIN_BSWAP=y -CONFIG_ARCH_USE_MEMREMAP_PROT=y -CONFIG_ARCH_USE_QUEUED_RWLOCKS=y -CONFIG_ARCH_USE_QUEUED_SPINLOCKS=y -CONFIG_ARCH_WANT_DEFAULT_TOPDOWN_MMAP_LAYOUT=y -CONFIG_ARCH_WANT_IPC_PARSE_VERSION=y -CONFIG_AT803X_PHY=y -CONFIG_ATH79=y -CONFIG_ATH79_WDT=y -CONFIG_BLK_MQ_PCI=y -CONFIG_CEVT_R4K=y -CONFIG_CLKDEV_LOOKUP=y -CONFIG_CLONE_BACKWARDS=y -CONFIG_CMDLINE="rootfstype=squashfs,jffs2" -CONFIG_CMDLINE_BOOL=y -# CONFIG_CMDLINE_OVERRIDE is not set -CONFIG_COMMON_CLK=y -# CONFIG_COMMON_CLK_BOSTON is not set -CONFIG_COMPAT_32BIT_TIME=y -CONFIG_CPU_BIG_ENDIAN=y -CONFIG_CPU_GENERIC_DUMP_TLB=y -CONFIG_CPU_HAS_LOAD_STORE_LR=y -CONFIG_CPU_HAS_PREFETCH=y -CONFIG_CPU_HAS_RIXI=y -CONFIG_CPU_HAS_SYNC=y -CONFIG_CPU_MIPS32=y -CONFIG_CPU_MIPS32_R2=y -CONFIG_CPU_MIPSR2=y -CONFIG_CPU_NEEDS_NO_SMARTMIPS_OR_MICROMIPS=y -CONFIG_CPU_R4K_CACHE_TLB=y -CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y -CONFIG_CPU_SUPPORTS_HIGHMEM=y -CONFIG_CPU_SUPPORTS_MSA=y -CONFIG_CRYPTO_RNG2=y -CONFIG_CSRC_R4K=y -CONFIG_DMA_NONCOHERENT=y -CONFIG_DMA_NONCOHERENT_CACHE_SYNC=y -CONFIG_DTC=y -CONFIG_EARLY_PRINTK=y -CONFIG_EFI_EARLYCON=y -CONFIG_ETHERNET_PACKET_MANGLE=y -CONFIG_FIXED_PHY=y -CONFIG_FONT_8x16=y -CONFIG_FONT_AUTOSELECT=y -CONFIG_FONT_SUPPORT=y -CONFIG_FW_LOADER_PAGED_BUF=y -CONFIG_GENERIC_ATOMIC64=y -CONFIG_GENERIC_CLOCKEVENTS=y -CONFIG_GENERIC_CMOS_UPDATE=y -CONFIG_GENERIC_CPU_AUTOPROBE=y -CONFIG_GENERIC_GETTIMEOFDAY=y -CONFIG_GENERIC_IOMAP=y -CONFIG_GENERIC_IRQ_CHIP=y -CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK=y -CONFIG_GENERIC_IRQ_SHOW=y -CONFIG_GENERIC_LIB_ASHLDI3=y -CONFIG_GENERIC_LIB_ASHRDI3=y -CONFIG_GENERIC_LIB_CMPDI2=y -CONFIG_GENERIC_LIB_LSHRDI3=y -CONFIG_GENERIC_LIB_UCMPDI2=y -CONFIG_GENERIC_PCI_IOMAP=y -CONFIG_GENERIC_PHY=y -CONFIG_GENERIC_PINCONF=y -CONFIG_GENERIC_PINCTRL_GROUPS=y -CONFIG_GENERIC_PINMUX_FUNCTIONS=y -CONFIG_GENERIC_SCHED_CLOCK=y -CONFIG_GENERIC_SMP_IDLE_THREAD=y -CONFIG_GENERIC_TIME_VSYSCALL=y -CONFIG_GPIOLIB=y -CONFIG_GPIOLIB_IRQCHIP=y -CONFIG_GPIO_74X164=y -CONFIG_GPIO_ATH79=y -CONFIG_GPIO_GENERIC=y -# CONFIG_GPIO_LATCH is not set -CONFIG_HANDLE_DOMAIN_IRQ=y -CONFIG_HARDWARE_WATCHPOINTS=y -CONFIG_HAS_DMA=y -CONFIG_HAS_IOMEM=y -CONFIG_HAS_IOPORT_MAP=y -CONFIG_HAVE_ARCH_COMPILER_H=y -CONFIG_HAVE_ARCH_JUMP_LABEL=y -CONFIG_HAVE_ARCH_KGDB=y -CONFIG_HAVE_ARCH_SECCOMP_FILTER=y -CONFIG_HAVE_ARCH_TRACEHOOK=y -CONFIG_HAVE_ASM_MODVERSIONS=y -CONFIG_HAVE_CLK=y -CONFIG_HAVE_CLK_PREPARE=y -CONFIG_HAVE_CONTEXT_TRACKING=y -CONFIG_HAVE_COPY_THREAD_TLS=y -CONFIG_HAVE_C_RECORDMCOUNT=y -CONFIG_HAVE_DEBUG_KMEMLEAK=y -CONFIG_HAVE_DEBUG_STACKOVERFLOW=y -CONFIG_HAVE_DMA_CONTIGUOUS=y -CONFIG_HAVE_DYNAMIC_FTRACE=y -CONFIG_HAVE_FAST_GUP=y -CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y -CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y -CONFIG_HAVE_FUNCTION_TRACER=y -CONFIG_HAVE_GENERIC_VDSO=y -CONFIG_HAVE_IDE=y -CONFIG_HAVE_IOREMAP_PROT=y -CONFIG_HAVE_IRQ_EXIT_ON_IRQ_STACK=y -CONFIG_HAVE_IRQ_TIME_ACCOUNTING=y -CONFIG_HAVE_KVM=y -CONFIG_HAVE_LD_DEAD_CODE_DATA_ELIMINATION=y -CONFIG_HAVE_MEMBLOCK_NODE_MAP=y -CONFIG_HAVE_MOD_ARCH_SPECIFIC=y -CONFIG_HAVE_NET_DSA=y -CONFIG_HAVE_OPROFILE=y -CONFIG_HAVE_PCI=y -CONFIG_HAVE_PERF_EVENTS=y -CONFIG_HAVE_REGS_AND_STACK_ACCESS_API=y -CONFIG_HAVE_RSEQ=y -CONFIG_HAVE_SYSCALL_TRACEPOINTS=y -CONFIG_HAVE_VIRT_CPU_ACCOUNTING_GEN=y -CONFIG_HZ_PERIODIC=y -CONFIG_IMAGE_CMDLINE_HACK=y -CONFIG_INITRAMFS_SOURCE="" -CONFIG_IRQCHIP=y -CONFIG_IRQ_DOMAIN=y -CONFIG_IRQ_FORCED_THREADING=y -CONFIG_IRQ_MIPS_CPU=y -CONFIG_IRQ_WORK=y -CONFIG_LEDS_GPIO=y -# CONFIG_LEDS_RESET is not set -CONFIG_LIBFDT=y -CONFIG_LOCK_DEBUGGING_SUPPORT=y -CONFIG_MDIO_BITBANG=y -CONFIG_MDIO_BUS=y -CONFIG_MDIO_DEVICE=y -CONFIG_MDIO_GPIO=y -CONFIG_MEMFD_CREATE=y -# CONFIG_MFD_RB4XX_CPLD is not set -CONFIG_MFD_SYSCON=y -CONFIG_MIGRATION=y -CONFIG_MIPS=y -CONFIG_MIPS_ASID_BITS=8 -CONFIG_MIPS_ASID_SHIFT=0 -CONFIG_MIPS_CLOCK_VSYSCALL=y -# CONFIG_MIPS_CMDLINE_BUILTIN_EXTEND is not set -# CONFIG_MIPS_CMDLINE_DTB_EXTEND is not set -# CONFIG_MIPS_CMDLINE_FROM_BOOTLOADER is not set -CONFIG_MIPS_CMDLINE_FROM_DTB=y -# CONFIG_MIPS_ELF_APPENDED_DTB is not set -CONFIG_MIPS_L1_CACHE_SHIFT=5 -# CONFIG_MIPS_NO_APPENDED_DTB is not set -CONFIG_MIPS_RAW_APPENDED_DTB=y -CONFIG_MIPS_SPRAM=y -CONFIG_MODULES_USE_ELF_REL=y -CONFIG_MTD_CFI_ADV_OPTIONS=y -CONFIG_MTD_CFI_GEOMETRY=y -# CONFIG_MTD_CFI_I2 is not set -# CONFIG_MTD_CFI_INTELEXT is not set -CONFIG_MTD_CMDLINE_PARTS=y -# CONFIG_MTD_MAP_BANK_WIDTH_1 is not set -# CONFIG_MTD_MAP_BANK_WIDTH_4 is not set -# CONFIG_MTD_NAND_RB91X is not set -CONFIG_MTD_PARSER_CYBERTAN=y -CONFIG_MTD_PHYSMAP=y -CONFIG_MTD_SPI_NOR=y -CONFIG_MTD_SPLIT_ELF_FW=y -CONFIG_MTD_SPLIT_LZMA_FW=y -CONFIG_MTD_SPLIT_SEAMA_FW=y -CONFIG_MTD_SPLIT_TPLINK_FW=y -CONFIG_MTD_SPLIT_UIMAGE_FW=y -CONFIG_MTD_SPLIT_WRGG_FW=y -CONFIG_MTD_VIRT_CONCAT=y -CONFIG_NEED_DMA_MAP_STATE=y -CONFIG_NEED_PER_CPU_KM=y -CONFIG_NO_GENERIC_PCI_IOPORT_MAP=y -CONFIG_NVMEM=y -CONFIG_OF=y -CONFIG_OF_ADDRESS=y -CONFIG_OF_EARLY_FLATTREE=y -CONFIG_OF_FLATTREE=y -CONFIG_OF_GPIO=y -CONFIG_OF_IRQ=y -CONFIG_OF_KOBJ=y -CONFIG_OF_MDIO=y -CONFIG_OF_NET=y -CONFIG_PCI=y -CONFIG_PCI_AR71XX=y -CONFIG_PCI_AR724X=y -CONFIG_PCI_DISABLE_COMMON_QUIRKS=y -CONFIG_PCI_DOMAINS=y -CONFIG_PCI_DRIVERS_LEGACY=y -CONFIG_PERF_USE_VMALLOC=y -CONFIG_PGTABLE_LEVELS=2 -CONFIG_PHYLIB=y -# CONFIG_PHY_AR7100_USB is not set -# CONFIG_PHY_AR7200_USB is not set -# CONFIG_PHY_ATH79_USB is not set -CONFIG_PINCTRL=y -CONFIG_RATIONAL=y -CONFIG_REGMAP=y -CONFIG_REGMAP_MMIO=y -CONFIG_REGULATOR=y -CONFIG_RESET_ATH79=y -CONFIG_RESET_CONTROLLER=y -CONFIG_SERIAL_8250_NR_UARTS=1 -CONFIG_SERIAL_8250_RUNTIME_UARTS=1 -CONFIG_SERIAL_AR933X=y -CONFIG_SERIAL_AR933X_CONSOLE=y -CONFIG_SERIAL_AR933X_NR_UARTS=2 -CONFIG_SERIAL_MCTRL_GPIO=y -CONFIG_SERIAL_OF_PLATFORM=y -CONFIG_SPI=y -CONFIG_SPI_AR934X=y -CONFIG_SPI_ATH79=y -CONFIG_SPI_BITBANG=y -CONFIG_SPI_GPIO=y -CONFIG_SPI_MASTER=y -CONFIG_SPI_MEM=y -# CONFIG_SPI_RB4XX is not set -CONFIG_SRCU=y -CONFIG_SWCONFIG=y -CONFIG_SWCONFIG_LEDS=y -CONFIG_SWPHY=y -CONFIG_SYSCTL_EXCEPTION_TRACE=y -CONFIG_SYS_HAS_CPU_MIPS32_R2=y -CONFIG_SYS_HAS_EARLY_PRINTK=y -CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y -CONFIG_SYS_SUPPORTS_ARBIT_HZ=y -CONFIG_SYS_SUPPORTS_BIG_ENDIAN=y -CONFIG_SYS_SUPPORTS_MIPS16=y -CONFIG_SYS_SUPPORTS_ZBOOT=y -CONFIG_SYS_SUPPORTS_ZBOOT_UART_PROM=y -CONFIG_TARGET_ISA_REV=2 -CONFIG_TICK_CPU_ACCOUNTING=y -CONFIG_TINY_SRCU=y -CONFIG_USB_SUPPORT=y -CONFIG_USE_OF=y diff --git a/target/linux/ath79/image/generic-ubnt.mk b/target/linux/ath79/image/generic-ubnt.mk index 3888e1652b..bb5eaa5458 100644 --- a/target/linux/ath79/image/generic-ubnt.mk +++ b/target/linux/ath79/image/generic-ubnt.mk @@ -103,6 +103,7 @@ define Device/ubnt-xm IMAGE_SIZE := 7448k UBNT_BOARD := XM UBNT_CHIP := ar7240 + UBNT_REVISION := 42.$(UBNT_REVISION) UBNT_TYPE := XM UBNT_VERSION := 6.0.0 KERNEL := kernel-bin | append-dtb | relocate-kernel | lzma | uImage lzma diff --git a/target/linux/ath79/patches-5.4/0001-MIPS-cmdline-Clean-up-boot_command_line-initializati.patch b/target/linux/ath79/patches-5.4/0001-MIPS-cmdline-Clean-up-boot_command_line-initializati.patch deleted file mode 100644 index eedc7498be..0000000000 --- a/target/linux/ath79/patches-5.4/0001-MIPS-cmdline-Clean-up-boot_command_line-initializati.patch +++ /dev/null @@ -1,192 +0,0 @@ -From: Paul Burton -Date: Wed, 9 Oct 2019 23:09:45 +0000 -Subject: MIPS: cmdline: Clean up boot_command_line initialization - -Our current code to initialize boot_command_line is a mess. Some of this -is due to the addition of too many options over the years, and some of -this is due to workarounds for early_init_dt_scan_chosen() performing -actions specific to options from other architectures that probably -shouldn't be in generic code. - -Clean this up by introducing a new bootcmdline_init() function that -simplifies the initialization somewhat. The major changes are: - -- Because bootcmdline_init() is a function it can return early in the - CONFIG_CMDLINE_OVERRIDE case. - -- We clear boot_command_line rather than inheriting whatever - early_init_dt_scan_chosen() may have left us. This means we no longer - need to set boot_command_line to a space character in an attempt to - prevent early_init_dt_scan_chosen() from copying CONFIG_CMDLINE into - boot_command_line without us knowing about it. - -- Indirection via USE_PROM_CMDLINE, USE_DTB_CMDLINE, EXTEND_WITH_PROM & - BUILTIN_EXTEND_WITH_PROM macros is removed; they seemingly served only - to obfuscate the code. - -- The logic is cleaner, clearer & commented. - -Two minor drawbacks of this approach are: - -1) We call of_scan_flat_dt(), which means we scan through the DT again. - The overhead is fairly minimal & shouldn't be noticeable. - -2) cmdline_scan_chosen() duplicates a small amount of the logic from - early_init_dt_scan_chosen(). Alternatives might be to allow the - generic FDT code to keep & expose a copy of the arguments taken from - the /chosen node's bootargs property, or to introduce a function like - early_init_dt_scan_chosen() that retrieves them without modification - to handle CONFIG_CMDLINE. Neither of these sounds particularly - cleaner though, and this way we at least keep the extra work in - arch/mips. - -Origin: upstream, https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=7784cac697351f0cc0a4bb619594c0c99348c5aa -Signed-off-by: Paul Burton -Cc: linux-mips@vger.kernel.org - ---- a/arch/mips/kernel/setup.c -+++ b/arch/mips/kernel/setup.c -@@ -538,11 +538,88 @@ static void __init check_kernel_sections - } - } - --#define USE_PROM_CMDLINE IS_ENABLED(CONFIG_MIPS_CMDLINE_FROM_BOOTLOADER) --#define USE_DTB_CMDLINE IS_ENABLED(CONFIG_MIPS_CMDLINE_FROM_DTB) --#define EXTEND_WITH_PROM IS_ENABLED(CONFIG_MIPS_CMDLINE_DTB_EXTEND) --#define BUILTIN_EXTEND_WITH_PROM \ -- IS_ENABLED(CONFIG_MIPS_CMDLINE_BUILTIN_EXTEND) -+static void __init bootcmdline_append(const char *s, size_t max) -+{ -+ if (!s[0] || !max) -+ return; -+ -+ if (boot_command_line[0]) -+ strlcat(boot_command_line, " ", COMMAND_LINE_SIZE); -+ -+ strlcat(boot_command_line, s, max); -+} -+ -+static int __init bootcmdline_scan_chosen(unsigned long node, const char *uname, -+ int depth, void *data) -+{ -+ bool *dt_bootargs = data; -+ const char *p; -+ int l; -+ -+ if (depth != 1 || !data || -+ (strcmp(uname, "chosen") != 0 && strcmp(uname, "chosen@0") != 0)) -+ return 0; -+ -+ p = of_get_flat_dt_prop(node, "bootargs", &l); -+ if (p != NULL && l > 0) { -+ bootcmdline_append(p, min(l, COMMAND_LINE_SIZE)); -+ *dt_bootargs = true; -+ } -+ -+ return 1; -+} -+ -+static void __init bootcmdline_init(char **cmdline_p) -+{ -+ bool dt_bootargs = false; -+ -+ /* -+ * If CMDLINE_OVERRIDE is enabled then initializing the command line is -+ * trivial - we simply use the built-in command line unconditionally & -+ * unmodified. -+ */ -+ if (IS_ENABLED(CONFIG_CMDLINE_OVERRIDE)) { -+ strlcpy(boot_command_line, builtin_cmdline, COMMAND_LINE_SIZE); -+ return; -+ } -+ -+ /* -+ * If the user specified a built-in command line & -+ * MIPS_CMDLINE_BUILTIN_EXTEND, then the built-in command line is -+ * prepended to arguments from the bootloader or DT so we'll copy them -+ * to the start of boot_command_line here. Otherwise, empty -+ * boot_command_line to undo anything early_init_dt_scan_chosen() did. -+ */ -+ if (IS_ENABLED(CONFIG_MIPS_CMDLINE_BUILTIN_EXTEND)) -+ strlcpy(boot_command_line, builtin_cmdline, COMMAND_LINE_SIZE); -+ else -+ boot_command_line[0] = 0; -+ -+ /* -+ * If we're configured to take boot arguments from DT, look for those -+ * now. -+ */ -+ if (IS_ENABLED(CONFIG_MIPS_CMDLINE_FROM_DTB)) -+ of_scan_flat_dt(bootcmdline_scan_chosen, &dt_bootargs); -+ -+ /* -+ * If we didn't get any arguments from DT (regardless of whether that's -+ * because we weren't configured to look for them, or because we looked -+ * & found none) then we'll take arguments from the bootloader. -+ * plat_mem_setup() should have filled arcs_cmdline with arguments from -+ * the bootloader. -+ */ -+ if (IS_ENABLED(CONFIG_MIPS_CMDLINE_DTB_EXTEND) || !dt_bootargs) -+ bootcmdline_append(arcs_cmdline, COMMAND_LINE_SIZE); -+ -+ /* -+ * If the user specified a built-in command line & we didn't already -+ * prepend it, we append it to boot_command_line here. -+ */ -+ if (IS_ENABLED(CONFIG_CMDLINE_BOOL) && -+ !IS_ENABLED(CONFIG_MIPS_CMDLINE_BUILTIN_EXTEND)) -+ bootcmdline_append(builtin_cmdline, COMMAND_LINE_SIZE); -+} - - /* - * arch_mem_init - initialize memory management subsystem -@@ -570,48 +647,12 @@ static void __init arch_mem_init(char ** - { - extern void plat_mem_setup(void); - -- /* -- * Initialize boot_command_line to an innocuous but non-empty string in -- * order to prevent early_init_dt_scan_chosen() from copying -- * CONFIG_CMDLINE into it without our knowledge. We handle -- * CONFIG_CMDLINE ourselves below & don't want to duplicate its -- * content because repeating arguments can be problematic. -- */ -- strlcpy(boot_command_line, " ", COMMAND_LINE_SIZE); -- - /* call board setup routine */ - plat_mem_setup(); - memblock_set_bottom_up(true); - --#if defined(CONFIG_CMDLINE_BOOL) && defined(CONFIG_CMDLINE_OVERRIDE) -- strlcpy(boot_command_line, builtin_cmdline, COMMAND_LINE_SIZE); --#else -- if ((USE_PROM_CMDLINE && arcs_cmdline[0]) || -- (USE_DTB_CMDLINE && !boot_command_line[0])) -- strlcpy(boot_command_line, arcs_cmdline, COMMAND_LINE_SIZE); -- -- if (EXTEND_WITH_PROM && arcs_cmdline[0]) { -- if (boot_command_line[0]) -- strlcat(boot_command_line, " ", COMMAND_LINE_SIZE); -- strlcat(boot_command_line, arcs_cmdline, COMMAND_LINE_SIZE); -- } -- --#if defined(CONFIG_CMDLINE_BOOL) -- if (builtin_cmdline[0]) { -- if (boot_command_line[0]) -- strlcat(boot_command_line, " ", COMMAND_LINE_SIZE); -- strlcat(boot_command_line, builtin_cmdline, COMMAND_LINE_SIZE); -- } -- -- if (BUILTIN_EXTEND_WITH_PROM && arcs_cmdline[0]) { -- if (boot_command_line[0]) -- strlcat(boot_command_line, " ", COMMAND_LINE_SIZE); -- strlcat(boot_command_line, arcs_cmdline, COMMAND_LINE_SIZE); -- } --#endif --#endif -+ bootcmdline_init(cmdline_p); - strlcpy(command_line, boot_command_line, COMMAND_LINE_SIZE); -- - *cmdline_p = command_line; - - parse_early_param(); diff --git a/target/linux/ath79/patches-5.4/0002-watchdog-ath79-fix-maximum-timeout.patch b/target/linux/ath79/patches-5.4/0002-watchdog-ath79-fix-maximum-timeout.patch deleted file mode 100644 index 495721f609..0000000000 --- a/target/linux/ath79/patches-5.4/0002-watchdog-ath79-fix-maximum-timeout.patch +++ /dev/null @@ -1,32 +0,0 @@ -From 5f5c9858af167f842ee8df053920b98387a71af1 Mon Sep 17 00:00:00 2001 -From: John Crispin -Date: Mon, 5 Mar 2018 11:41:25 +0100 -Subject: [PATCH 02/27] watchdog: ath79: fix maximum timeout - -If the userland tries to set a timeout higher than the max_timeout, -then we should fallback to max_timeout. - -Signed-off-by: John Crispin ---- - drivers/watchdog/ath79_wdt.c | 8 ++++++-- - 1 file changed, 6 insertions(+), 2 deletions(-) - ---- a/drivers/watchdog/ath79_wdt.c -+++ b/drivers/watchdog/ath79_wdt.c -@@ -111,10 +111,14 @@ static inline void ath79_wdt_disable(voi - - static int ath79_wdt_set_timeout(int val) - { -- if (val < 1 || val > max_timeout) -+ if (val < 1) - return -EINVAL; - -- timeout = val; -+ if (val > max_timeout) -+ timeout = max_timeout; -+ else -+ timeout = val; -+ - ath79_wdt_keepalive(); - - return 0; diff --git a/target/linux/ath79/patches-5.4/0003-leds-add-reset-controller-based-driver.patch b/target/linux/ath79/patches-5.4/0003-leds-add-reset-controller-based-driver.patch deleted file mode 100644 index 32a122fabe..0000000000 --- a/target/linux/ath79/patches-5.4/0003-leds-add-reset-controller-based-driver.patch +++ /dev/null @@ -1,186 +0,0 @@ -From ecbd9c87f073f097d9fe56390353e64e963e866a Mon Sep 17 00:00:00 2001 -From: John Crispin -Date: Tue, 6 Mar 2018 10:03:03 +0100 -Subject: [PATCH 03/27] leds: add reset-controller based driver - -Signed-off-by: John Crispin ---- - drivers/leds/Kconfig | 11 ++++ - drivers/leds/Makefile | 1 + - drivers/leds/leds-reset.c | 137 ++++++++++++++++++++++++++++++++++++++++++++++ - 3 files changed, 149 insertions(+) - create mode 100644 drivers/leds/leds-reset.c - ---- a/drivers/leds/Kconfig -+++ b/drivers/leds/Kconfig -@@ -824,6 +824,17 @@ config LEDS_LM36274 - Say Y to enable the LM36274 LED driver for TI LMU devices. - This supports the LED device LM36274. - -+config LEDS_RESET -+ tristate "LED support for reset-controller API" -+ depends on LEDS_CLASS -+ depends on RESET_CONTROLLER -+ help -+ This option enables support for LEDs connected to pins driven by reset -+ controllers. Yes, DNI actual built HW like that. -+ -+ To compile this driver as a module, choose M here: the module -+ will be called leds-reset. -+ - comment "LED Triggers" - source "drivers/leds/trigger/Kconfig" - ---- /dev/null -+++ b/drivers/leds/leds-reset.c -@@ -0,0 +1,140 @@ -+/* -+ * Copyright (C) 2018 John Crispin -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 as -+ * published by the Free Software Foundation. -+ * -+ */ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+ -+struct reset_led_data { -+ struct led_classdev cdev; -+ struct reset_control *rst; -+}; -+ -+static inline struct reset_led_data * -+ cdev_to_reset_led_data(struct led_classdev *led_cdev) -+{ -+ return container_of(led_cdev, struct reset_led_data, cdev); -+} -+ -+static void reset_led_set(struct led_classdev *led_cdev, -+ enum led_brightness value) -+{ -+ struct reset_led_data *led_dat = cdev_to_reset_led_data(led_cdev); -+ -+ if (value == LED_OFF) -+ reset_control_assert(led_dat->rst); -+ else -+ reset_control_deassert(led_dat->rst); -+} -+ -+struct reset_leds_priv { -+ int num_leds; -+ struct reset_led_data leds[]; -+}; -+ -+static inline int sizeof_reset_leds_priv(int num_leds) -+{ -+ return sizeof(struct reset_leds_priv) + -+ (sizeof(struct reset_led_data) * num_leds); -+} -+ -+static struct reset_leds_priv *reset_leds_create(struct platform_device *pdev) -+{ -+ struct device *dev = &pdev->dev; -+ struct fwnode_handle *child; -+ struct reset_leds_priv *priv; -+ int count, ret; -+ -+ count = device_get_child_node_count(dev); -+ if (!count) -+ return ERR_PTR(-ENODEV); -+ -+ priv = devm_kzalloc(dev, sizeof_reset_leds_priv(count), GFP_KERNEL); -+ if (!priv) -+ return ERR_PTR(-ENOMEM); -+ -+ device_for_each_child_node(dev, child) { -+ struct reset_led_data *led = &priv->leds[priv->num_leds]; -+ struct device_node *np = to_of_node(child); -+ -+ ret = fwnode_property_read_string(child, "label", &led->cdev.name); -+ if (!led->cdev.name) { -+ fwnode_handle_put(child); -+ return ERR_PTR(-EINVAL); -+ } -+ led->rst = __of_reset_control_get(np, NULL, 0, 0, 0, true); -+ if (IS_ERR(led->rst)) -+ return ERR_PTR(-EINVAL); -+ -+ fwnode_property_read_string(child, "linux,default-trigger", -+ &led->cdev.default_trigger); -+ -+ led->cdev.brightness_set = reset_led_set; -+ ret = devm_led_classdev_register(&pdev->dev, &led->cdev); -+ if (ret < 0) -+ return ERR_PTR(ret); -+ led->cdev.dev->of_node = np; -+ priv->num_leds++; -+ } -+ -+ return priv; -+} -+ -+static const struct of_device_id of_reset_leds_match[] = { -+ { .compatible = "reset-leds", }, -+ {}, -+}; -+ -+MODULE_DEVICE_TABLE(of, of_reset_leds_match); -+ -+static int reset_led_probe(struct platform_device *pdev) -+{ -+ struct reset_leds_priv *priv; -+ -+ priv = reset_leds_create(pdev); -+ if (IS_ERR(priv)) -+ return PTR_ERR(priv); -+ -+ platform_set_drvdata(pdev, priv); -+ -+ return 0; -+} -+ -+static void reset_led_shutdown(struct platform_device *pdev) -+{ -+ struct reset_leds_priv *priv = platform_get_drvdata(pdev); -+ int i; -+ -+ for (i = 0; i < priv->num_leds; i++) { -+ struct reset_led_data *led = &priv->leds[i]; -+ -+ if (!(led->cdev.flags & LED_RETAIN_AT_SHUTDOWN)) -+ reset_led_set(&led->cdev, LED_OFF); -+ } -+} -+ -+static struct platform_driver reset_led_driver = { -+ .probe = reset_led_probe, -+ .shutdown = reset_led_shutdown, -+ .driver = { -+ .name = "leds-reset", -+ .of_match_table = of_reset_leds_match, -+ }, -+}; -+ -+module_platform_driver(reset_led_driver); -+ -+MODULE_AUTHOR("John Crispin "); -+MODULE_DESCRIPTION("reset controller LED driver"); -+MODULE_LICENSE("GPL"); -+MODULE_ALIAS("platform:leds-reset"); ---- a/drivers/leds/Makefile -+++ b/drivers/leds/Makefile -@@ -85,6 +85,7 @@ obj-$(CONFIG_LEDS_LM3601X) += leds-lm36 - obj-$(CONFIG_LEDS_TI_LMU_COMMON) += leds-ti-lmu-common.o - obj-$(CONFIG_LEDS_LM3697) += leds-lm3697.o - obj-$(CONFIG_LEDS_LM36274) += leds-lm36274.o -+obj-$(CONFIG_LEDS_RESET) += leds-reset.o - - # LED SPI Drivers - obj-$(CONFIG_LEDS_CR0014114) += leds-cr0014114.o diff --git a/target/linux/ath79/patches-5.4/0004-phy-add-ath79-usb-phys.patch b/target/linux/ath79/patches-5.4/0004-phy-add-ath79-usb-phys.patch deleted file mode 100644 index 56c3d61887..0000000000 --- a/target/linux/ath79/patches-5.4/0004-phy-add-ath79-usb-phys.patch +++ /dev/null @@ -1,333 +0,0 @@ -From 08c9d6ceef01893678a5d2e8a15517c745417f21 Mon Sep 17 00:00:00 2001 -From: John Crispin -Date: Tue, 6 Mar 2018 10:04:05 +0100 -Subject: [PATCH 04/27] phy: add ath79 usb phys - -Signed-off-by: John Crispin ---- - drivers/phy/Kconfig | 16 ++++++ - drivers/phy/Makefile | 2 + - drivers/phy/phy-ar7100-usb.c | 124 +++++++++++++++++++++++++++++++++++++++++++ - drivers/phy/phy-ar7200-usb.c | 108 +++++++++++++++++++++++++++++++++++++ - 4 files changed, 250 insertions(+) - create mode 100644 drivers/phy/phy-ar7100-usb.c - create mode 100644 drivers/phy/phy-ar7200-usb.c - ---- a/drivers/phy/Kconfig -+++ b/drivers/phy/Kconfig -@@ -24,6 +24,22 @@ config GENERIC_PHY_MIPI_DPHY - Provides a number of helpers a core functions for MIPI D-PHY - drivers to us. - -+config PHY_AR7100_USB -+ tristate "Atheros AR7100 USB PHY driver" -+ depends on ATH79 || COMPILE_TEST -+ default y if USB_EHCI_HCD_PLATFORM -+ select GENERIC_PHY -+ help -+ Enable this to support the USB PHY on Atheros AR7100 SoCs. -+ -+config PHY_AR7200_USB -+ tristate "Atheros AR7200 USB PHY driver" -+ depends on ATH79 || COMPILE_TEST -+ default y if USB_EHCI_HCD_PLATFORM -+ select GENERIC_PHY -+ help -+ Enable this to support the USB PHY on Atheros AR7200 SoCs. -+ - config PHY_LPC18XX_USB_OTG - tristate "NXP LPC18xx/43xx SoC USB OTG PHY driver" - depends on OF && (ARCH_LPC18XX || COMPILE_TEST) ---- a/drivers/phy/Makefile -+++ b/drivers/phy/Makefile -@@ -4,6 +4,8 @@ - # - - obj-$(CONFIG_GENERIC_PHY) += phy-core.o -+obj-$(CONFIG_PHY_AR7100_USB) += phy-ar7100-usb.o -+obj-$(CONFIG_PHY_AR7200_USB) += phy-ar7200-usb.o - obj-$(CONFIG_GENERIC_PHY_MIPI_DPHY) += phy-core-mipi-dphy.o - obj-$(CONFIG_PHY_LPC18XX_USB_OTG) += phy-lpc18xx-usb-otg.o - obj-$(CONFIG_PHY_XGENE) += phy-xgene.o ---- /dev/null -+++ b/drivers/phy/phy-ar7100-usb.c -@@ -0,0 +1,140 @@ -+/* -+ * Copyright (C) 2018 John Crispin -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License as published by -+ * the Free Software Foundation; either version 2 of the License, or -+ * (at your option) any later version. -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+#include -+ -+#include -+#include -+ -+struct ar7100_usb_phy { -+ struct reset_control *rst_phy; -+ struct reset_control *rst_host; -+ struct reset_control *rst_ohci_dll; -+ void __iomem *io_base; -+ struct phy *phy; -+ int gpio; -+}; -+ -+static int ar7100_usb_phy_power_off(struct phy *phy) -+{ -+ struct ar7100_usb_phy *priv = phy_get_drvdata(phy); -+ int err = 0; -+ -+ err |= reset_control_assert(priv->rst_host); -+ err |= reset_control_assert(priv->rst_phy); -+ err |= reset_control_assert(priv->rst_ohci_dll); -+ -+ return err; -+} -+ -+static int ar7100_usb_phy_power_on(struct phy *phy) -+{ -+ struct ar7100_usb_phy *priv = phy_get_drvdata(phy); -+ int err = 0; -+ -+ err |= ar7100_usb_phy_power_off(phy); -+ mdelay(100); -+ err |= reset_control_deassert(priv->rst_ohci_dll); -+ err |= reset_control_deassert(priv->rst_phy); -+ err |= reset_control_deassert(priv->rst_host); -+ mdelay(500); -+ iowrite32(0xf0000, priv->io_base + AR71XX_USB_CTRL_REG_CONFIG); -+ iowrite32(0x20c00, priv->io_base + AR71XX_USB_CTRL_REG_FLADJ); -+ -+ return err; -+} -+ -+static const struct phy_ops ar7100_usb_phy_ops = { -+ .power_on = ar7100_usb_phy_power_on, -+ .power_off = ar7100_usb_phy_power_off, -+ .owner = THIS_MODULE, -+}; -+ -+static int ar7100_usb_phy_probe(struct platform_device *pdev) -+{ -+ struct phy_provider *phy_provider; -+ struct resource *res; -+ struct ar7100_usb_phy *priv; -+ -+ priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL); -+ if (!priv) -+ return -ENOMEM; -+ -+ res = platform_get_resource(pdev, IORESOURCE_MEM, 0); -+ priv->io_base = devm_ioremap_resource(&pdev->dev, res); -+ if (IS_ERR(priv->io_base)) -+ return PTR_ERR(priv->io_base); -+ -+ priv->rst_phy = devm_reset_control_get(&pdev->dev, "usb-phy"); -+ if (IS_ERR(priv->rst_phy)) { -+ dev_err(&pdev->dev, "phy reset is missing\n"); -+ return PTR_ERR(priv->rst_phy); -+ } -+ -+ priv->rst_host = devm_reset_control_get(&pdev->dev, "usb-host"); -+ if (IS_ERR(priv->rst_host)) { -+ dev_err(&pdev->dev, "host reset is missing\n"); -+ return PTR_ERR(priv->rst_host); -+ } -+ -+ priv->rst_ohci_dll = devm_reset_control_get(&pdev->dev, "usb-ohci-dll"); -+ if (IS_ERR(priv->rst_ohci_dll)) { -+ dev_err(&pdev->dev, "ohci-dll reset is missing\n"); -+ return PTR_ERR(priv->rst_host); -+ } -+ -+ priv->phy = devm_phy_create(&pdev->dev, NULL, &ar7100_usb_phy_ops); -+ if (IS_ERR(priv->phy)) { -+ dev_err(&pdev->dev, "failed to create PHY\n"); -+ return PTR_ERR(priv->phy); -+ } -+ -+ priv->gpio = of_get_gpio(pdev->dev.of_node, 0); -+ if (priv->gpio >= 0) { -+ int ret = devm_gpio_request(&pdev->dev, priv->gpio, dev_name(&pdev->dev)); -+ -+ if (ret) { -+ dev_err(&pdev->dev, "failed to request gpio\n"); -+ return ret; -+ } -+ gpio_export_with_name(priv->gpio, 0, dev_name(&pdev->dev)); -+ gpio_set_value(priv->gpio, 1); -+ } -+ -+ phy_set_drvdata(priv->phy, priv); -+ -+ phy_provider = devm_of_phy_provider_register(&pdev->dev, of_phy_simple_xlate); -+ -+ -+ return PTR_ERR_OR_ZERO(phy_provider); -+} -+ -+static const struct of_device_id ar7100_usb_phy_of_match[] = { -+ { .compatible = "qca,ar7100-usb-phy" }, -+ {} -+}; -+MODULE_DEVICE_TABLE(of, ar7100_usb_phy_of_match); -+ -+static struct platform_driver ar7100_usb_phy_driver = { -+ .probe = ar7100_usb_phy_probe, -+ .driver = { -+ .of_match_table = ar7100_usb_phy_of_match, -+ .name = "ar7100-usb-phy", -+ } -+}; -+module_platform_driver(ar7100_usb_phy_driver); -+ -+MODULE_DESCRIPTION("ATH79 USB PHY driver"); -+MODULE_AUTHOR("Alban Bedel "); -+MODULE_LICENSE("GPL"); ---- /dev/null -+++ b/drivers/phy/phy-ar7200-usb.c -@@ -0,0 +1,136 @@ -+/* -+ * Copyright (C) 2015 Alban Bedel -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License as published by -+ * the Free Software Foundation; either version 2 of the License, or -+ * (at your option) any later version. -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+ -+struct ar7200_usb_phy { -+ struct reset_control *rst_phy; -+ struct reset_control *rst_phy_analog; -+ struct reset_control *suspend_override; -+ struct phy *phy; -+ int gpio; -+}; -+ -+static int ar7200_usb_phy_power_on(struct phy *phy) -+{ -+ struct ar7200_usb_phy *priv = phy_get_drvdata(phy); -+ int err = 0; -+ -+ if (priv->suspend_override) -+ err = reset_control_assert(priv->suspend_override); -+ if (priv->rst_phy) -+ err |= reset_control_deassert(priv->rst_phy); -+ if (priv->rst_phy_analog) -+ err |= reset_control_deassert(priv->rst_phy_analog); -+ -+ return err; -+} -+ -+static int ar7200_usb_phy_power_off(struct phy *phy) -+{ -+ struct ar7200_usb_phy *priv = phy_get_drvdata(phy); -+ int err = 0; -+ -+ if (priv->suspend_override) -+ err = reset_control_deassert(priv->suspend_override); -+ if (priv->rst_phy) -+ err |= reset_control_assert(priv->rst_phy); -+ if (priv->rst_phy_analog) -+ err |= reset_control_assert(priv->rst_phy_analog); -+ -+ return err; -+} -+ -+static const struct phy_ops ar7200_usb_phy_ops = { -+ .power_on = ar7200_usb_phy_power_on, -+ .power_off = ar7200_usb_phy_power_off, -+ .owner = THIS_MODULE, -+}; -+ -+static int ar7200_usb_phy_probe(struct platform_device *pdev) -+{ -+ struct phy_provider *phy_provider; -+ struct ar7200_usb_phy *priv; -+ -+ priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL); -+ if (!priv) -+ return -ENOMEM; -+ -+ priv->rst_phy = devm_reset_control_get(&pdev->dev, "usb-phy"); -+ if (IS_ERR(priv->rst_phy)) { -+ if (PTR_ERR(priv->rst_phy) != -EPROBE_DEFER) -+ dev_err(&pdev->dev, "phy reset is missing\n"); -+ return PTR_ERR(priv->rst_phy); -+ } -+ -+ priv->rst_phy_analog = devm_reset_control_get_optional( -+ &pdev->dev, "usb-phy-analog"); -+ if (IS_ERR(priv->rst_phy_analog)) { -+ if (PTR_ERR(priv->rst_phy_analog) == -ENOENT) -+ priv->rst_phy_analog = NULL; -+ else -+ return PTR_ERR(priv->rst_phy_analog); -+ } -+ -+ priv->suspend_override = devm_reset_control_get_optional( -+ &pdev->dev, "usb-suspend-override"); -+ if (IS_ERR(priv->suspend_override)) { -+ if (PTR_ERR(priv->suspend_override) == -ENOENT) -+ priv->suspend_override = NULL; -+ else -+ return PTR_ERR(priv->suspend_override); -+ } -+ -+ priv->phy = devm_phy_create(&pdev->dev, NULL, &ar7200_usb_phy_ops); -+ if (IS_ERR(priv->phy)) { -+ dev_err(&pdev->dev, "failed to create PHY\n"); -+ return PTR_ERR(priv->phy); -+ } -+ -+ priv->gpio = of_get_gpio(pdev->dev.of_node, 0); -+ if (priv->gpio >= 0) { -+ int ret = devm_gpio_request(&pdev->dev, priv->gpio, dev_name(&pdev->dev)); -+ -+ if (ret) { -+ dev_err(&pdev->dev, "failed to request gpio\n"); -+ return ret; -+ } -+ gpio_export_with_name(priv->gpio, 0, dev_name(&pdev->dev)); -+ gpio_set_value(priv->gpio, 1); -+ } -+ -+ phy_set_drvdata(priv->phy, priv); -+ -+ phy_provider = devm_of_phy_provider_register(&pdev->dev, of_phy_simple_xlate); -+ -+ return PTR_ERR_OR_ZERO(phy_provider); -+} -+ -+static const struct of_device_id ar7200_usb_phy_of_match[] = { -+ { .compatible = "qca,ar7200-usb-phy" }, -+ {} -+}; -+MODULE_DEVICE_TABLE(of, ar7200_usb_phy_of_match); -+ -+static struct platform_driver ar7200_usb_phy_driver = { -+ .probe = ar7200_usb_phy_probe, -+ .driver = { -+ .of_match_table = ar7200_usb_phy_of_match, -+ .name = "ar7200-usb-phy", -+ } -+}; -+module_platform_driver(ar7200_usb_phy_driver); -+ -+MODULE_DESCRIPTION("ATH79 USB PHY driver"); -+MODULE_AUTHOR("Alban Bedel "); -+MODULE_LICENSE("GPL"); diff --git a/target/linux/ath79/patches-5.4/0005-usb-add-more-OF-quirk-properties.patch b/target/linux/ath79/patches-5.4/0005-usb-add-more-OF-quirk-properties.patch deleted file mode 100644 index 3c8740311d..0000000000 --- a/target/linux/ath79/patches-5.4/0005-usb-add-more-OF-quirk-properties.patch +++ /dev/null @@ -1,24 +0,0 @@ -From 2201818e5bd33f389beceb3943fdfcf5a698fc5b Mon Sep 17 00:00:00 2001 -From: John Crispin -Date: Tue, 6 Mar 2018 10:01:43 +0100 -Subject: [PATCH 05/27] usb: add more OF/quirk properties - -Signed-off-by: John Crispin ---- - drivers/usb/host/ehci-platform.c | 5 +++++ - 1 file changed, 5 insertions(+) - ---- a/drivers/usb/host/ehci-platform.c -+++ b/drivers/usb/host/ehci-platform.c -@@ -269,6 +269,11 @@ static int ehci_platform_probe(struct pl - ehci = hcd_to_ehci(hcd); - - if (pdata == &ehci_platform_defaults && dev->dev.of_node) { -+ of_property_read_u32(dev->dev.of_node, "caps-offset", &pdata->caps_offset); -+ -+ if (of_property_read_bool(dev->dev.of_node, "has-synopsys-hc-bug")) -+ pdata->has_synopsys_hc_bug = 1; -+ - if (of_property_read_bool(dev->dev.of_node, "big-endian-regs")) - ehci->big_endian_mmio = 1; - diff --git a/target/linux/ath79/patches-5.4/0007-irqchip-irq-ath79-intc-add-irq-cascade-driver-for-QC.patch b/target/linux/ath79/patches-5.4/0007-irqchip-irq-ath79-intc-add-irq-cascade-driver-for-QC.patch deleted file mode 100644 index ceda511c21..0000000000 --- a/target/linux/ath79/patches-5.4/0007-irqchip-irq-ath79-intc-add-irq-cascade-driver-for-QC.patch +++ /dev/null @@ -1,168 +0,0 @@ -From f3eacff2310a60348a755c50a8da6fc251fc8587 Mon Sep 17 00:00:00 2001 -From: John Crispin -Date: Tue, 6 Mar 2018 09:55:13 +0100 -Subject: [PATCH 07/33] irqchip/irq-ath79-intc: add irq cascade driver for - QCA9556 SoCs - -Signed-off-by: John Crispin ---- - drivers/irqchip/Makefile | 1 + - drivers/irqchip/irq-ath79-intc.c | 142 +++++++++++++++++++++++++++++++++++++++ - 2 files changed, 143 insertions(+) - create mode 100644 drivers/irqchip/irq-ath79-intc.c - ---- a/drivers/irqchip/Makefile -+++ b/drivers/irqchip/Makefile -@@ -4,6 +4,7 @@ obj-$(CONFIG_IRQCHIP) += irqchip.o - obj-$(CONFIG_AL_FIC) += irq-al-fic.o - obj-$(CONFIG_ALPINE_MSI) += irq-alpine-msi.o - obj-$(CONFIG_ATH79) += irq-ath79-cpu.o -+obj-$(CONFIG_ATH79) += irq-ath79-intc.o - obj-$(CONFIG_ATH79) += irq-ath79-misc.o - obj-$(CONFIG_ARCH_BCM2835) += irq-bcm2835.o - obj-$(CONFIG_ARCH_BCM2835) += irq-bcm2836.o ---- /dev/null -+++ b/drivers/irqchip/irq-ath79-intc.c -@@ -0,0 +1,142 @@ -+/* -+ * Atheros AR71xx/AR724x/AR913x specific interrupt handling -+ * -+ * Copyright (C) 2018 John Crispin -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 as published -+ * by the Free Software Foundation. -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+ -+#include -+#include -+#include -+ -+#define ATH79_MAX_INTC_CASCADE 3 -+ -+struct ath79_intc { -+ struct irq_chip chip; -+ u32 irq; -+ u32 pending_mask; -+ u32 int_status; -+ u32 irq_mask[ATH79_MAX_INTC_CASCADE]; -+ u32 irq_wb_chan[ATH79_MAX_INTC_CASCADE]; -+}; -+ -+static void ath79_intc_irq_handler(struct irq_desc *desc) -+{ -+ struct irq_domain *domain = irq_desc_get_handler_data(desc); -+ struct ath79_intc *intc = domain->host_data; -+ u32 pending; -+ -+ pending = ath79_reset_rr(intc->int_status); -+ pending &= intc->pending_mask; -+ -+ if (pending) { -+ int i; -+ -+ for (i = 0; i < domain->hwirq_max; i++) -+ if (pending & intc->irq_mask[i]) { -+ if (intc->irq_wb_chan[i] != 0xffffffff) -+ ath79_ddr_wb_flush(intc->irq_wb_chan[i]); -+ generic_handle_irq(irq_find_mapping(domain, i)); -+ } -+ } else { -+ spurious_interrupt(); -+ } -+} -+ -+static void ath79_intc_irq_enable(struct irq_data *d) -+{ -+ struct ath79_intc *intc = d->domain->host_data; -+ enable_irq(intc->irq); -+} -+ -+static void ath79_intc_irq_disable(struct irq_data *d) -+{ -+ struct ath79_intc *intc = d->domain->host_data; -+ disable_irq(intc->irq); -+} -+ -+static int ath79_intc_map(struct irq_domain *d, unsigned int irq, irq_hw_number_t hw) -+{ -+ struct ath79_intc *intc = d->host_data; -+ -+ irq_set_chip_and_handler(irq, &intc->chip, handle_level_irq); -+ -+ return 0; -+} -+ -+static const struct irq_domain_ops ath79_irq_domain_ops = { -+ .xlate = irq_domain_xlate_onecell, -+ .map = ath79_intc_map, -+}; -+ -+static int __init ath79_intc_of_init( -+ struct device_node *node, struct device_node *parent) -+{ -+ struct irq_domain *domain; -+ struct ath79_intc *intc; -+ int cnt, cntwb, i, err; -+ -+ cnt = of_property_count_u32_elems(node, "qca,pending-bits"); -+ if (cnt > ATH79_MAX_INTC_CASCADE) -+ panic("Too many INTC pending bits\n"); -+ -+ intc = kzalloc(sizeof(*intc), GFP_KERNEL); -+ if (!intc) -+ panic("Failed to allocate INTC memory\n"); -+ intc->chip = dummy_irq_chip; -+ intc->chip.name = "INTC"; -+ intc->chip.irq_disable = ath79_intc_irq_disable; -+ intc->chip.irq_enable = ath79_intc_irq_enable; -+ -+ if (of_property_read_u32(node, "qca,int-status-addr", &intc->int_status) < 0) { -+ panic("Missing address of interrupt status register\n"); -+ } -+ -+ of_property_read_u32_array(node, "qca,pending-bits", intc->irq_mask, cnt); -+ for (i = 0; i < cnt; i++) { -+ intc->pending_mask |= intc->irq_mask[i]; -+ intc->irq_wb_chan[i] = 0xffffffff; -+ } -+ -+ cntwb = of_count_phandle_with_args( -+ node, "qca,ddr-wb-channels", "#qca,ddr-wb-channel-cells"); -+ -+ for (i = 0; i < cntwb; i++) { -+ struct of_phandle_args args; -+ u32 irq = i; -+ -+ of_property_read_u32_index( -+ node, "qca,ddr-wb-channel-interrupts", i, &irq); -+ if (irq >= ATH79_MAX_INTC_CASCADE) -+ continue; -+ -+ err = of_parse_phandle_with_args( -+ node, "qca,ddr-wb-channels", -+ "#qca,ddr-wb-channel-cells", -+ i, &args); -+ if (err) -+ return err; -+ -+ intc->irq_wb_chan[irq] = args.args[0]; -+ } -+ -+ intc->irq = irq_of_parse_and_map(node, 0); -+ if (!intc->irq) -+ panic("Failed to get INTC IRQ"); -+ -+ domain = irq_domain_add_linear(node, cnt, &ath79_irq_domain_ops, intc); -+ irq_set_chained_handler_and_data(intc->irq, ath79_intc_irq_handler, domain); -+ -+ return 0; -+} -+IRQCHIP_DECLARE(ath79_intc, "qca,ar9340-intc", -+ ath79_intc_of_init); diff --git a/target/linux/ath79/patches-5.4/0008-irqchip-irq-ath79-cpu-drop-OF-init-helper.patch b/target/linux/ath79/patches-5.4/0008-irqchip-irq-ath79-cpu-drop-OF-init-helper.patch deleted file mode 100644 index 13117d9a8e..0000000000 --- a/target/linux/ath79/patches-5.4/0008-irqchip-irq-ath79-cpu-drop-OF-init-helper.patch +++ /dev/null @@ -1,23 +0,0 @@ -From e029f998594f151008ecbfa024e2957edd2a5189 Mon Sep 17 00:00:00 2001 -From: John Crispin -Date: Tue, 6 Mar 2018 09:58:19 +0100 -Subject: [PATCH 08/33] irqchip/irq-ath79-cpu: drop !OF init helper - -Signed-off-by: John Crispin ---- - drivers/irqchip/irq-ath79-cpu.c | 7 ------- - 1 file changed, 7 deletions(-) - ---- a/drivers/irqchip/irq-ath79-cpu.c -+++ b/drivers/irqchip/irq-ath79-cpu.c -@@ -85,10 +85,3 @@ static int __init ar79_cpu_intc_of_init( - } - IRQCHIP_DECLARE(ar79_cpu_intc, "qca,ar7100-cpu-intc", - ar79_cpu_intc_of_init); -- --void __init ath79_cpu_irq_init(unsigned irq_wb_chan2, unsigned irq_wb_chan3) --{ -- irq_wb_chan[2] = irq_wb_chan2; -- irq_wb_chan[3] = irq_wb_chan3; -- mips_cpu_irq_init(); --} diff --git a/target/linux/ath79/patches-5.4/0017-dt-bindings-PCI-qcom-ar7100-adds-binding-doc.patch b/target/linux/ath79/patches-5.4/0017-dt-bindings-PCI-qcom-ar7100-adds-binding-doc.patch deleted file mode 100644 index bf7eb691a5..0000000000 --- a/target/linux/ath79/patches-5.4/0017-dt-bindings-PCI-qcom-ar7100-adds-binding-doc.patch +++ /dev/null @@ -1,57 +0,0 @@ -From 4a4f869ec58ed8910b9b2e68d0eee50957e9bb20 Mon Sep 17 00:00:00 2001 -From: John Crispin -Date: Mon, 25 Jun 2018 15:52:10 +0200 -Subject: [PATCH 17/33] dt-bindings: PCI: qcom,ar7100: adds binding doc - -With the driver being converted from platform_data to pure OF, we need to -also add some docs. - -Cc: Rob Herring -Cc: devicetree@vger.kernel.org -Signed-off-by: John Crispin ---- - .../devicetree/bindings/pci/qcom,ar7100-pci.txt | 38 ++++++++++++++++++++++ - 1 file changed, 38 insertions(+) - create mode 100644 Documentation/devicetree/bindings/pci/qcom,ar7100-pci.txt - ---- /dev/null -+++ b/Documentation/devicetree/bindings/pci/qcom,ar7100-pci.txt -@@ -0,0 +1,38 @@ -+* Qualcomm Atheros AR7100 PCI express root complex -+ -+Required properties: -+- compatible: should contain "qcom,ar7100-pci" to identify the core. -+- reg: Should contain the register ranges as listed in the reg-names property. -+- reg-names: Definition: Must include the following entries -+ - "cfg_base" IO Memory -+- #address-cells: set to <3> -+- #size-cells: set to <2> -+- ranges: ranges for the PCI memory and I/O regions -+- interrupt-map-mask and interrupt-map: standard PCI -+ properties to define the mapping of the PCIe interface to interrupt -+ numbers. -+- #interrupt-cells: set to <1> -+- interrupt-controller: define to enable the builtin IRQ cascade. -+ -+Optional properties: -+- interrupt-parent: phandle to the MIPS IRQ controller -+ -+* Example for ar7100 -+ pcie-controller@180c0000 { -+ compatible = "qca,ar7100-pci"; -+ #address-cells = <3>; -+ #size-cells = <2>; -+ bus-range = <0x0 0x0>; -+ reg = <0x17010000 0x100>; -+ reg-names = "cfg_base"; -+ ranges = <0x2000000 0 0x10000000 0x10000000 0 0x07000000 -+ 0x1000000 0 0x00000000 0x00000000 0 0x00000001>; -+ interrupt-parent = <&cpuintc>; -+ interrupts = <2>; -+ -+ interrupt-controller; -+ #interrupt-cells = <1>; -+ -+ interrupt-map-mask = <0 0 0 1>; -+ interrupt-map = <0 0 0 0 &pcie0 0>; -+ }; diff --git a/target/linux/ath79/patches-5.4/0018-MIPS-pci-ar71xx-convert-to-OF.patch b/target/linux/ath79/patches-5.4/0018-MIPS-pci-ar71xx-convert-to-OF.patch deleted file mode 100644 index e600a4f0d9..0000000000 --- a/target/linux/ath79/patches-5.4/0018-MIPS-pci-ar71xx-convert-to-OF.patch +++ /dev/null @@ -1,202 +0,0 @@ -From 1855ab6b1d27f5b38a648baf57ff6a534afec26d Mon Sep 17 00:00:00 2001 -From: John Crispin -Date: Sat, 23 Jun 2018 15:07:23 +0200 -Subject: [PATCH 18/33] MIPS: pci-ar71xx: convert to OF - -With the ath79 target getting converted to pure OF, we can drop all the -platform data code and add the missing OF bits to the driver. We also add -a irq domain for the PCI/e controllers cascade, thus making it usable from -dts files. - -Signed-off-by: John Crispin ---- - arch/mips/pci/pci-ar71xx.c | 82 +++++++++++++++++++++++----------------------- - 1 file changed, 41 insertions(+), 41 deletions(-) - ---- a/arch/mips/pci/pci-ar71xx.c -+++ b/arch/mips/pci/pci-ar71xx.c -@@ -15,8 +15,11 @@ - #include - #include - #include -+#include - #include - #include -+#include -+#include - - #include - #include -@@ -46,12 +49,13 @@ - #define AR71XX_PCI_IRQ_COUNT 5 - - struct ar71xx_pci_controller { -+ struct device_node *np; - void __iomem *cfg_base; - int irq; -- int irq_base; - struct pci_controller pci_ctrl; - struct resource io_res; - struct resource mem_res; -+ struct irq_domain *domain; - }; - - /* Byte lane enable bits */ -@@ -225,29 +229,30 @@ static struct pci_ops ar71xx_pci_ops = { - - static void ar71xx_pci_irq_handler(struct irq_desc *desc) - { -- struct ar71xx_pci_controller *apc; - void __iomem *base = ath79_reset_base; -+ struct irq_chip *chip = irq_desc_get_chip(desc); -+ struct ar71xx_pci_controller *apc = irq_desc_get_handler_data(desc); - u32 pending; - -- apc = irq_desc_get_handler_data(desc); -- -+ chained_irq_enter(chip, desc); - pending = __raw_readl(base + AR71XX_RESET_REG_PCI_INT_STATUS) & - __raw_readl(base + AR71XX_RESET_REG_PCI_INT_ENABLE); - - if (pending & AR71XX_PCI_INT_DEV0) -- generic_handle_irq(apc->irq_base + 0); -+ generic_handle_irq(irq_linear_revmap(apc->domain, 1)); - - else if (pending & AR71XX_PCI_INT_DEV1) -- generic_handle_irq(apc->irq_base + 1); -+ generic_handle_irq(irq_linear_revmap(apc->domain, 2)); - - else if (pending & AR71XX_PCI_INT_DEV2) -- generic_handle_irq(apc->irq_base + 2); -+ generic_handle_irq(irq_linear_revmap(apc->domain, 3)); - - else if (pending & AR71XX_PCI_INT_CORE) -- generic_handle_irq(apc->irq_base + 4); -+ generic_handle_irq(irq_linear_revmap(apc->domain, 4)); - - else - spurious_interrupt(); -+ chained_irq_exit(chip, desc); - } - - static void ar71xx_pci_irq_unmask(struct irq_data *d) -@@ -258,7 +263,7 @@ static void ar71xx_pci_irq_unmask(struct - u32 t; - - apc = irq_data_get_irq_chip_data(d); -- irq = d->irq - apc->irq_base; -+ irq = irq_linear_revmap(apc->domain, d->irq); - - t = __raw_readl(base + AR71XX_RESET_REG_PCI_INT_ENABLE); - __raw_writel(t | (1 << irq), base + AR71XX_RESET_REG_PCI_INT_ENABLE); -@@ -275,7 +280,7 @@ static void ar71xx_pci_irq_mask(struct i - u32 t; - - apc = irq_data_get_irq_chip_data(d); -- irq = d->irq - apc->irq_base; -+ irq = irq_linear_revmap(apc->domain, d->irq); - - t = __raw_readl(base + AR71XX_RESET_REG_PCI_INT_ENABLE); - __raw_writel(t & ~(1 << irq), base + AR71XX_RESET_REG_PCI_INT_ENABLE); -@@ -291,24 +296,31 @@ static struct irq_chip ar71xx_pci_irq_ch - .irq_mask_ack = ar71xx_pci_irq_mask, - }; - -+static int ar71xx_pci_irq_map(struct irq_domain *d, -+ unsigned int irq, irq_hw_number_t hw) -+{ -+ struct ar71xx_pci_controller *apc = d->host_data; -+ -+ irq_set_chip_and_handler(irq, &ar71xx_pci_irq_chip, handle_level_irq); -+ irq_set_chip_data(irq, apc); -+ -+ return 0; -+} -+ -+static const struct irq_domain_ops ar71xx_pci_domain_ops = { -+ .xlate = irq_domain_xlate_onecell, -+ .map = ar71xx_pci_irq_map, -+}; -+ - static void ar71xx_pci_irq_init(struct ar71xx_pci_controller *apc) - { - void __iomem *base = ath79_reset_base; -- int i; - - __raw_writel(0, base + AR71XX_RESET_REG_PCI_INT_ENABLE); - __raw_writel(0, base + AR71XX_RESET_REG_PCI_INT_STATUS); - -- BUILD_BUG_ON(ATH79_PCI_IRQ_COUNT < AR71XX_PCI_IRQ_COUNT); -- -- apc->irq_base = ATH79_PCI_IRQ_BASE; -- for (i = apc->irq_base; -- i < apc->irq_base + AR71XX_PCI_IRQ_COUNT; i++) { -- irq_set_chip_and_handler(i, &ar71xx_pci_irq_chip, -- handle_level_irq); -- irq_set_chip_data(i, apc); -- } -- -+ apc->domain = irq_domain_add_linear(apc->np, AR71XX_PCI_IRQ_COUNT, -+ &ar71xx_pci_domain_ops, apc); - irq_set_chained_handler_and_data(apc->irq, ar71xx_pci_irq_handler, - apc); - } -@@ -325,6 +337,11 @@ static void ar71xx_pci_reset(void) - mdelay(100); - } - -+static const struct of_device_id ar71xx_pci_ids[] = { -+ { .compatible = "qca,ar7100-pci" }, -+ {}, -+}; -+ - static int ar71xx_pci_probe(struct platform_device *pdev) - { - struct ar71xx_pci_controller *apc; -@@ -345,26 +362,6 @@ static int ar71xx_pci_probe(struct platf - if (apc->irq < 0) - return -EINVAL; - -- res = platform_get_resource_byname(pdev, IORESOURCE_IO, "io_base"); -- if (!res) -- return -EINVAL; -- -- apc->io_res.parent = res; -- apc->io_res.name = "PCI IO space"; -- apc->io_res.start = res->start; -- apc->io_res.end = res->end; -- apc->io_res.flags = IORESOURCE_IO; -- -- res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "mem_base"); -- if (!res) -- return -EINVAL; -- -- apc->mem_res.parent = res; -- apc->mem_res.name = "PCI memory space"; -- apc->mem_res.start = res->start; -- apc->mem_res.end = res->end; -- apc->mem_res.flags = IORESOURCE_MEM; -- - ar71xx_pci_reset(); - - /* setup COMMAND register */ -@@ -377,9 +374,11 @@ static int ar71xx_pci_probe(struct platf - - ar71xx_pci_irq_init(apc); - -+ apc->np = pdev->dev.of_node; - apc->pci_ctrl.pci_ops = &ar71xx_pci_ops; - apc->pci_ctrl.mem_resource = &apc->mem_res; - apc->pci_ctrl.io_resource = &apc->io_res; -+ pci_load_of_ranges(&apc->pci_ctrl, pdev->dev.of_node); - - register_pci_controller(&apc->pci_ctrl); - -@@ -390,6 +389,7 @@ static struct platform_driver ar71xx_pci - .probe = ar71xx_pci_probe, - .driver = { - .name = "ar71xx-pci", -+ .of_match_table = of_match_ptr(ar71xx_pci_ids), - }, - }; - diff --git a/target/linux/ath79/patches-5.4/0019-dt-bindings-PCI-qcom-ar7240-adds-binding-doc.patch b/target/linux/ath79/patches-5.4/0019-dt-bindings-PCI-qcom-ar7240-adds-binding-doc.patch deleted file mode 100644 index a0af79cb4d..0000000000 --- a/target/linux/ath79/patches-5.4/0019-dt-bindings-PCI-qcom-ar7240-adds-binding-doc.patch +++ /dev/null @@ -1,61 +0,0 @@ -From ea27764bc3ef2a05decf3ae05edffc289cd0d93c Mon Sep 17 00:00:00 2001 -From: John Crispin -Date: Mon, 25 Jun 2018 15:52:02 +0200 -Subject: [PATCH 19/33] dt-bindings: PCI: qcom,ar7240: adds binding doc - -With the driver being converted from platform_data to pure OF, we need to -also add some docs. - -Cc: Rob Herring -Cc: devicetree@vger.kernel.org -Signed-off-by: John Crispin ---- - .../devicetree/bindings/pci/qcom,ar7240-pci.txt | 42 ++++++++++++++++++++++ - 1 file changed, 42 insertions(+) - create mode 100644 Documentation/devicetree/bindings/pci/qcom,ar7240-pci.txt - ---- /dev/null -+++ b/Documentation/devicetree/bindings/pci/qcom,ar7240-pci.txt -@@ -0,0 +1,42 @@ -+* Qualcomm Atheros AR724X PCI express root complex -+ -+Required properties: -+- compatible: should contain "qcom,ar7240-pci" to identify the core. -+- reg: Should contain the register ranges as listed in the reg-names property. -+- reg-names: Definition: Must include the following entries -+ - "crp_base" Configuration registers -+ - "ctrl_base" Control registers -+ - "cfg_base" IO Memory -+- #address-cells: set to <3> -+- #size-cells: set to <2> -+- ranges: ranges for the PCI memory and I/O regions -+- interrupt-map-mask and interrupt-map: standard PCI -+ properties to define the mapping of the PCIe interface to interrupt -+ numbers. -+- #interrupt-cells: set to <1> -+- interrupt-parent: phandle to the MIPS IRQ controller -+ -+Optional properties: -+- interrupt-controller: define to enable the builtin IRQ cascade. -+ -+* Example for qca9557 -+ pcie-controller@180c0000 { -+ compatible = "qcom,ar7240-pci"; -+ #address-cells = <3>; -+ #size-cells = <2>; -+ bus-range = <0x0 0x0>; -+ reg = <0x180c0000 0x1000>, -+ <0x180f0000 0x100>, -+ <0x14000000 0x1000>; -+ reg-names = "crp_base", "ctrl_base", "cfg_base"; -+ ranges = <0x2000000 0 0x10000000 0x10000000 0 0x04000000 -+ 0x1000000 0 0x00000000 0x00000000 0 0x00000001>; -+ interrupt-parent = <&intc2>; -+ interrupts = <1>; -+ -+ interrupt-controller; -+ #interrupt-cells = <1>; -+ -+ interrupt-map-mask = <0 0 0 1>; -+ interrupt-map = <0 0 0 0 &pcie0 0>; -+ }; diff --git a/target/linux/ath79/patches-5.4/0020-MIPS-pci-ar724x-convert-to-OF.patch b/target/linux/ath79/patches-5.4/0020-MIPS-pci-ar724x-convert-to-OF.patch deleted file mode 100644 index b8a877c63d..0000000000 --- a/target/linux/ath79/patches-5.4/0020-MIPS-pci-ar724x-convert-to-OF.patch +++ /dev/null @@ -1,205 +0,0 @@ -From a522ee0199d5d3ea114ca2e211f6ac398d3e8e0b Mon Sep 17 00:00:00 2001 -From: John Crispin -Date: Sat, 23 Jun 2018 15:07:37 +0200 -Subject: [PATCH 20/33] MIPS: pci-ar724x: convert to OF - -With the ath79 target getting converted to pure OF, we can drop all the -platform data code and add the missing OF bits to the driver. We also add -a irq domain for the PCI/e controllers cascade, thus making it usable from -dts files. - -Signed-off-by: John Crispin ---- - arch/mips/pci/pci-ar724x.c | 88 ++++++++++++++++++++++------------------------ - 1 file changed, 42 insertions(+), 46 deletions(-) - ---- a/arch/mips/pci/pci-ar724x.c -+++ b/arch/mips/pci/pci-ar724x.c -@@ -11,8 +11,11 @@ - #include - #include - #include -+#include - #include - #include -+#include -+#include - - #define AR724X_PCI_REG_APP 0x00 - #define AR724X_PCI_REG_RESET 0x18 -@@ -42,17 +45,20 @@ struct ar724x_pci_controller { - void __iomem *crp_base; - - int irq; -- int irq_base; - - bool link_up; - bool bar0_is_cached; - u32 bar0_value; - -+ struct device_node *np; - struct pci_controller pci_controller; -+ struct irq_domain *domain; - struct resource io_res; - struct resource mem_res; - }; - -+static struct irq_chip ar724x_pci_irq_chip; -+ - static inline bool ar724x_pci_check_link(struct ar724x_pci_controller *apc) - { - u32 reset; -@@ -228,35 +234,31 @@ static struct pci_ops ar724x_pci_ops = { - - static void ar724x_pci_irq_handler(struct irq_desc *desc) - { -- struct ar724x_pci_controller *apc; -- void __iomem *base; -+ struct irq_chip *chip = irq_desc_get_chip(desc); -+ struct ar724x_pci_controller *apc = irq_desc_get_handler_data(desc); - u32 pending; - -- apc = irq_desc_get_handler_data(desc); -- base = apc->ctrl_base; -- -- pending = __raw_readl(base + AR724X_PCI_REG_INT_STATUS) & -- __raw_readl(base + AR724X_PCI_REG_INT_MASK); -+ chained_irq_enter(chip, desc); -+ pending = __raw_readl(apc->ctrl_base + AR724X_PCI_REG_INT_STATUS) & -+ __raw_readl(apc->ctrl_base + AR724X_PCI_REG_INT_MASK); - - if (pending & AR724X_PCI_INT_DEV0) -- generic_handle_irq(apc->irq_base + 0); -- -+ generic_handle_irq(irq_linear_revmap(apc->domain, 1)); - else - spurious_interrupt(); -+ chained_irq_exit(chip, desc); - } - - static void ar724x_pci_irq_unmask(struct irq_data *d) - { - struct ar724x_pci_controller *apc; - void __iomem *base; -- int offset; - u32 t; - - apc = irq_data_get_irq_chip_data(d); - base = apc->ctrl_base; -- offset = apc->irq_base - d->irq; - -- switch (offset) { -+ switch (irq_linear_revmap(apc->domain, d->irq)) { - case 0: - t = __raw_readl(base + AR724X_PCI_REG_INT_MASK); - __raw_writel(t | AR724X_PCI_INT_DEV0, -@@ -270,14 +272,12 @@ static void ar724x_pci_irq_mask(struct i - { - struct ar724x_pci_controller *apc; - void __iomem *base; -- int offset; - u32 t; - - apc = irq_data_get_irq_chip_data(d); - base = apc->ctrl_base; -- offset = apc->irq_base - d->irq; - -- switch (offset) { -+ switch (irq_linear_revmap(apc->domain, d->irq)) { - case 0: - t = __raw_readl(base + AR724X_PCI_REG_INT_MASK); - __raw_writel(t & ~AR724X_PCI_INT_DEV0, -@@ -302,26 +302,34 @@ static struct irq_chip ar724x_pci_irq_ch - .irq_mask_ack = ar724x_pci_irq_mask, - }; - -+static int ar724x_pci_irq_map(struct irq_domain *d, -+ unsigned int irq, irq_hw_number_t hw) -+{ -+ struct ar724x_pci_controller *apc = d->host_data; -+ -+ irq_set_chip_and_handler(irq, &ar724x_pci_irq_chip, handle_level_irq); -+ irq_set_chip_data(irq, apc); -+ -+ return 0; -+} -+ -+static const struct irq_domain_ops ar724x_pci_domain_ops = { -+ .xlate = irq_domain_xlate_onecell, -+ .map = ar724x_pci_irq_map, -+}; -+ - static void ar724x_pci_irq_init(struct ar724x_pci_controller *apc, - int id) - { - void __iomem *base; -- int i; - - base = apc->ctrl_base; - - __raw_writel(0, base + AR724X_PCI_REG_INT_MASK); - __raw_writel(0, base + AR724X_PCI_REG_INT_STATUS); - -- apc->irq_base = ATH79_PCI_IRQ_BASE + (id * AR724X_PCI_IRQ_COUNT); -- -- for (i = apc->irq_base; -- i < apc->irq_base + AR724X_PCI_IRQ_COUNT; i++) { -- irq_set_chip_and_handler(i, &ar724x_pci_irq_chip, -- handle_level_irq); -- irq_set_chip_data(i, apc); -- } -- -+ apc->domain = irq_domain_add_linear(apc->np, 2, -+ &ar724x_pci_domain_ops, apc); - irq_set_chained_handler_and_data(apc->irq, ar724x_pci_irq_handler, - apc); - } -@@ -391,29 +399,11 @@ static int ar724x_pci_probe(struct platf - if (apc->irq < 0) - return -EINVAL; - -- res = platform_get_resource_byname(pdev, IORESOURCE_IO, "io_base"); -- if (!res) -- return -EINVAL; -- -- apc->io_res.parent = res; -- apc->io_res.name = "PCI IO space"; -- apc->io_res.start = res->start; -- apc->io_res.end = res->end; -- apc->io_res.flags = IORESOURCE_IO; -- -- res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "mem_base"); -- if (!res) -- return -EINVAL; -- -- apc->mem_res.parent = res; -- apc->mem_res.name = "PCI memory space"; -- apc->mem_res.start = res->start; -- apc->mem_res.end = res->end; -- apc->mem_res.flags = IORESOURCE_MEM; -- -+ apc->np = pdev->dev.of_node; - apc->pci_controller.pci_ops = &ar724x_pci_ops; - apc->pci_controller.io_resource = &apc->io_res; - apc->pci_controller.mem_resource = &apc->mem_res; -+ pci_load_of_ranges(&apc->pci_controller, pdev->dev.of_node); - - /* - * Do the full PCIE Root Complex Initialization Sequence if the PCIe -@@ -435,10 +425,16 @@ static int ar724x_pci_probe(struct platf - return 0; - } - -+static const struct of_device_id ar724x_pci_ids[] = { -+ { .compatible = "qcom,ar7240-pci" }, -+ {}, -+}; -+ - static struct platform_driver ar724x_pci_driver = { - .probe = ar724x_pci_probe, - .driver = { - .name = "ar724x-pci", -+ .of_match_table = of_match_ptr(ar724x_pci_ids), - }, - }; - diff --git a/target/linux/ath79/patches-5.4/0032-MIPS-ath79-sanitize-symbols.patch b/target/linux/ath79/patches-5.4/0032-MIPS-ath79-sanitize-symbols.patch deleted file mode 100644 index 3d79121e94..0000000000 --- a/target/linux/ath79/patches-5.4/0032-MIPS-ath79-sanitize-symbols.patch +++ /dev/null @@ -1,93 +0,0 @@ -From 3fc8585cf76022dba7496627074d42af88c30718 Mon Sep 17 00:00:00 2001 -From: John Crispin -Date: Sat, 23 Jun 2018 15:16:55 +0200 -Subject: [PATCH 32/33] MIPS: ath79: sanitize symbols - -We no longer need to select which SoCs are supported as the whole arch -code is always built. So lets drop all the SoC symbols - -Signed-off-by: John Crispin ---- - arch/mips/Kconfig | 2 ++ - arch/mips/ath79/Kconfig | 44 +++++--------------------------------------- - arch/mips/pci/Makefile | 2 +- - 3 files changed, 8 insertions(+), 40 deletions(-) - ---- a/arch/mips/Kconfig -+++ b/arch/mips/Kconfig -@@ -220,6 +220,8 @@ config ATH79 - select SYS_SUPPORTS_BIG_ENDIAN - select SYS_SUPPORTS_MIPS16 - select SYS_SUPPORTS_ZBOOT_UART_PROM -+ select HAVE_PCI -+ select USB_ARCH_HAS_EHCI - select USE_OF - select USB_EHCI_ROOT_HUB_TT if USB_EHCI_HCD_PLATFORM - help ---- a/arch/mips/ath79/Kconfig -+++ b/arch/mips/ath79/Kconfig -@@ -1,48 +1,14 @@ - # SPDX-License-Identifier: GPL-2.0 - if ATH79 - --config SOC_AR71XX -- select HAVE_PCI -- def_bool n -- --config SOC_AR724X -- select HAVE_PCI -- select PCI_AR724X if PCI -- def_bool n -- --config SOC_AR913X -- def_bool n -- --config SOC_AR933X -- def_bool n -- --config SOC_AR934X -- select HAVE_PCI -- select PCI_AR724X if PCI -- def_bool n -- --config SOC_QCA955X -- select HAVE_PCI -- select PCI_AR724X if PCI -+config PCI_AR71XX -+ bool "PCI support for AR7100 type SoCs" -+ depends on PCI - def_bool n - - config PCI_AR724X -- def_bool n -- --config ATH79_DEV_GPIO_BUTTONS -- def_bool n -- --config ATH79_DEV_LEDS_GPIO -- def_bool n -- --config ATH79_DEV_SPI -- def_bool n -- --config ATH79_DEV_USB -- def_bool n -- --config ATH79_DEV_WMAC -- depends on (SOC_AR913X || SOC_AR933X || SOC_AR934X || SOC_QCA955X) -+ bool "PCI support for AR724x type SoCs" -+ depends on PCI - def_bool n - - endif ---- a/arch/mips/pci/Makefile -+++ b/arch/mips/pci/Makefile -@@ -23,7 +23,7 @@ obj-$(CONFIG_BCM63XX) += pci-bcm63xx.o - ops-bcm63xx.o - obj-$(CONFIG_MIPS_ALCHEMY) += pci-alchemy.o - obj-$(CONFIG_PCI_AR2315) += pci-ar2315.o --obj-$(CONFIG_SOC_AR71XX) += pci-ar71xx.o -+obj-$(CONFIG_PCI_AR71XX) += pci-ar71xx.o - obj-$(CONFIG_PCI_AR724X) += pci-ar724x.o - obj-$(CONFIG_MIPS_PCI_VIRTIO) += pci-virtio-guest.o - obj-$(CONFIG_PCI_XTALK_BRIDGE) += pci-xtalk-bridge.o diff --git a/target/linux/ath79/patches-5.4/0033-spi-ath79-drop-pdata-support.patch b/target/linux/ath79/patches-5.4/0033-spi-ath79-drop-pdata-support.patch deleted file mode 100644 index 162a82bda3..0000000000 --- a/target/linux/ath79/patches-5.4/0033-spi-ath79-drop-pdata-support.patch +++ /dev/null @@ -1,70 +0,0 @@ -From c4e197bbcecc7233aa9e553e7047fa50e4e1fe77 Mon Sep 17 00:00:00 2001 -From: John Crispin -Date: Mon, 25 Jun 2018 15:52:34 +0200 -Subject: [PATCH 33/33] spi: ath79: drop pdata support - -The target is being converted to pure OF. We can therefore drop all of the -platform data code from the driver. - -Cc: linux-spi@vger.kernel.org -Acked-by: Mark Brown -Signed-off-by: John Crispin ---- - include/linux/platform_data/spi-ath79.h | 16 ------------------- - drivers/spi/spi-ath79.c | 8 -------- - 2 files changed, 27 deletions(-) - delete mode 100644 arch/mips/include/asm/mach-ath79/ath79_spi_platform.h - ---- a/include/linux/platform_data/spi-ath79.h -+++ /dev/null -@@ -1,16 +0,0 @@ --/* SPDX-License-Identifier: GPL-2.0-only */ --/* -- * Platform data definition for Atheros AR71XX/AR724X/AR913X SPI controller -- * -- * Copyright (C) 2008-2010 Gabor Juhos -- */ -- --#ifndef _ATH79_SPI_PLATFORM_H --#define _ATH79_SPI_PLATFORM_H -- --struct ath79_spi_platform_data { -- unsigned bus_num; -- unsigned num_chipselect; --}; -- --#endif /* _ATH79_SPI_PLATFORM_H */ ---- a/drivers/spi/spi-ath79.c -+++ b/drivers/spi/spi-ath79.c -@@ -19,7 +19,6 @@ - #include - #include - #include --#include - - #define DRV_NAME "ath79-spi" - -@@ -138,7 +137,6 @@ static int ath79_spi_probe(struct platfo - { - struct spi_master *master; - struct ath79_spi *sp; -- struct ath79_spi_platform_data *pdata; - unsigned long rate; - int ret; - -@@ -152,15 +150,9 @@ static int ath79_spi_probe(struct platfo - master->dev.of_node = pdev->dev.of_node; - platform_set_drvdata(pdev, sp); - -- pdata = dev_get_platdata(&pdev->dev); -- - master->use_gpio_descriptors = true; - master->bits_per_word_mask = SPI_BPW_RANGE_MASK(1, 32); - master->flags = SPI_MASTER_GPIO_SS; -- if (pdata) { -- master->bus_num = pdata->bus_num; -- master->num_chipselect = pdata->num_chipselect; -- } - - sp->bitbang.master = master; - sp->bitbang.chipselect = ath79_spi_chipselect; diff --git a/target/linux/ath79/patches-5.4/0034-MIPS-ath79-ath9k-exports.patch b/target/linux/ath79/patches-5.4/0034-MIPS-ath79-ath9k-exports.patch deleted file mode 100644 index 71acc22210..0000000000 --- a/target/linux/ath79/patches-5.4/0034-MIPS-ath79-ath9k-exports.patch +++ /dev/null @@ -1,27 +0,0 @@ ---- a/arch/mips/ath79/common.c -+++ b/arch/mips/ath79/common.c -@@ -31,11 +31,13 @@ EXPORT_SYMBOL_GPL(ath79_ddr_freq); - - enum ath79_soc_type ath79_soc; - unsigned int ath79_soc_rev; -+EXPORT_SYMBOL_GPL(ath79_soc_rev); - - void __iomem *ath79_pll_base; - void __iomem *ath79_reset_base; - EXPORT_SYMBOL_GPL(ath79_reset_base); --static void __iomem *ath79_ddr_base; -+void __iomem *ath79_ddr_base; -+EXPORT_SYMBOL_GPL(ath79_ddr_base); - static void __iomem *ath79_ddr_wb_flush_base; - static void __iomem *ath79_ddr_pci_win_base; - ---- a/arch/mips/include/asm/mach-ath79/ath79.h -+++ b/arch/mips/include/asm/mach-ath79/ath79.h -@@ -149,6 +149,7 @@ void ath79_ddr_wb_flush(unsigned int reg - void ath79_ddr_set_pci_windows(void); - - extern void __iomem *ath79_pll_base; -+extern void __iomem *ath79_ddr_base; - extern void __iomem *ath79_reset_base; - - static inline void ath79_pll_wr(unsigned reg, u32 val) diff --git a/target/linux/ath79/patches-5.4/0036-GPIO-add-named-gpio-exports.patch b/target/linux/ath79/patches-5.4/0036-GPIO-add-named-gpio-exports.patch deleted file mode 100644 index 805836fcca..0000000000 --- a/target/linux/ath79/patches-5.4/0036-GPIO-add-named-gpio-exports.patch +++ /dev/null @@ -1,165 +0,0 @@ -From 4267880319bc1a2270d352e0ded6d6386242a7ef Mon Sep 17 00:00:00 2001 -From: John Crispin -Date: Tue, 12 Aug 2014 20:49:27 +0200 -Subject: [PATCH 24/53] GPIO: add named gpio exports - -Signed-off-by: John Crispin ---- - drivers/gpio/gpiolib-of.c | 68 +++++++++++++++++++++++++++++++++++++++++ - drivers/gpio/gpiolib-sysfs.c | 10 +++++- - include/asm-generic/gpio.h | 6 ++++ - include/linux/gpio/consumer.h | 8 +++++ - 4 files changed, 91 insertions(+), 1 deletion(-) - ---- a/drivers/gpio/gpiolib-of.c -+++ b/drivers/gpio/gpiolib-of.c -@@ -19,6 +19,8 @@ - #include - #include - #include -+#include -+#include - - #include "gpiolib.h" - #include "gpiolib-of.h" -@@ -915,3 +917,68 @@ void of_gpiochip_remove(struct gpio_chip - { - of_node_put(chip->of_node); - } -+ -+static struct of_device_id gpio_export_ids[] = { -+ { .compatible = "gpio-export" }, -+ { /* sentinel */ } -+}; -+ -+static int of_gpio_export_probe(struct platform_device *pdev) -+{ -+ struct device_node *np = pdev->dev.of_node; -+ struct device_node *cnp; -+ u32 val; -+ int nb = 0; -+ -+ for_each_child_of_node(np, cnp) { -+ const char *name = NULL; -+ int gpio; -+ bool dmc; -+ int max_gpio = 1; -+ int i; -+ -+ of_property_read_string(cnp, "gpio-export,name", &name); -+ -+ if (!name) -+ max_gpio = of_gpio_count(cnp); -+ -+ for (i = 0; i < max_gpio; i++) { -+ unsigned flags = 0; -+ enum of_gpio_flags of_flags; -+ -+ gpio = of_get_gpio_flags(cnp, i, &of_flags); -+ if (!gpio_is_valid(gpio)) -+ return gpio; -+ -+ if (of_flags == OF_GPIO_ACTIVE_LOW) -+ flags |= GPIOF_ACTIVE_LOW; -+ -+ if (!of_property_read_u32(cnp, "gpio-export,output", &val)) -+ flags |= val ? GPIOF_OUT_INIT_HIGH : GPIOF_OUT_INIT_LOW; -+ else -+ flags |= GPIOF_IN; -+ -+ if (devm_gpio_request_one(&pdev->dev, gpio, flags, name ? name : of_node_full_name(np))) -+ continue; -+ -+ dmc = of_property_read_bool(cnp, "gpio-export,direction_may_change"); -+ gpio_export_with_name(gpio, dmc, name); -+ nb++; -+ } -+ } -+ -+ dev_info(&pdev->dev, "%d gpio(s) exported\n", nb); -+ -+ return 0; -+} -+ -+static struct platform_driver gpio_export_driver = { -+ .driver = { -+ .name = "gpio-export", -+ .owner = THIS_MODULE, -+ .of_match_table = of_match_ptr(gpio_export_ids), -+ }, -+ .probe = of_gpio_export_probe, -+}; -+ -+module_platform_driver(gpio_export_driver); ---- a/drivers/gpio/gpiolib-sysfs.c -+++ b/drivers/gpio/gpiolib-sysfs.c -@@ -571,7 +571,7 @@ static struct class gpio_class = { - * - * Returns zero on success, else an error. - */ --int gpiod_export(struct gpio_desc *desc, bool direction_may_change) -+int __gpiod_export(struct gpio_desc *desc, bool direction_may_change, const char *name) - { - struct gpio_chip *chip; - struct gpio_device *gdev; -@@ -633,6 +633,8 @@ int gpiod_export(struct gpio_desc *desc, - offset = gpio_chip_hwgpio(desc); - if (chip->names && chip->names[offset]) - ioname = chip->names[offset]; -+ if (name) -+ ioname = name; - - dev = device_create_with_groups(&gpio_class, &gdev->dev, - MKDEV(0, 0), data, gpio_groups, -@@ -654,6 +656,12 @@ err_unlock: - gpiod_dbg(desc, "%s: status %d\n", __func__, status); - return status; - } -+EXPORT_SYMBOL_GPL(__gpiod_export); -+ -+int gpiod_export(struct gpio_desc *desc, bool direction_may_change) -+{ -+ return __gpiod_export(desc, direction_may_change, NULL); -+} - EXPORT_SYMBOL_GPL(gpiod_export); - - static int match_export(struct device *dev, const void *desc) ---- a/include/asm-generic/gpio.h -+++ b/include/asm-generic/gpio.h -@@ -127,6 +127,12 @@ static inline int gpio_export(unsigned g - return gpiod_export(gpio_to_desc(gpio), direction_may_change); - } - -+int __gpiod_export(struct gpio_desc *desc, bool direction_may_change, const char *name); -+static inline int gpio_export_with_name(unsigned gpio, bool direction_may_change, const char *name) -+{ -+ return __gpiod_export(gpio_to_desc(gpio), direction_may_change, name); -+} -+ - static inline int gpio_export_link(struct device *dev, const char *name, - unsigned gpio) - { ---- a/include/linux/gpio/consumer.h -+++ b/include/linux/gpio/consumer.h -@@ -668,6 +668,7 @@ static inline void devm_acpi_dev_remove_ - - #if IS_ENABLED(CONFIG_GPIOLIB) && IS_ENABLED(CONFIG_GPIO_SYSFS) - -+int _gpiod_export(struct gpio_desc *desc, bool direction_may_change, const char *name); - int gpiod_export(struct gpio_desc *desc, bool direction_may_change); - int gpiod_export_link(struct device *dev, const char *name, - struct gpio_desc *desc); -@@ -675,6 +676,13 @@ void gpiod_unexport(struct gpio_desc *de - - #else /* CONFIG_GPIOLIB && CONFIG_GPIO_SYSFS */ - -+static inline int _gpiod_export(struct gpio_desc *desc, -+ bool direction_may_change, -+ const char *name) -+{ -+ return -ENOSYS; -+} -+ - static inline int gpiod_export(struct gpio_desc *desc, - bool direction_may_change) - { diff --git a/target/linux/ath79/patches-5.4/0036-MIPS-ath79-remove-irq-code-from-pci.patch b/target/linux/ath79/patches-5.4/0036-MIPS-ath79-remove-irq-code-from-pci.patch deleted file mode 100644 index 80fcd0a7f5..0000000000 --- a/target/linux/ath79/patches-5.4/0036-MIPS-ath79-remove-irq-code-from-pci.patch +++ /dev/null @@ -1,139 +0,0 @@ ---- a/arch/mips/pci/pci-ar71xx.c -+++ b/arch/mips/pci/pci-ar71xx.c -@@ -51,11 +51,9 @@ - struct ar71xx_pci_controller { - struct device_node *np; - void __iomem *cfg_base; -- int irq; - struct pci_controller pci_ctrl; - struct resource io_res; - struct resource mem_res; -- struct irq_domain *domain; - }; - - /* Byte lane enable bits */ -@@ -227,104 +225,6 @@ static struct pci_ops ar71xx_pci_ops = { - .write = ar71xx_pci_write_config, - }; - --static void ar71xx_pci_irq_handler(struct irq_desc *desc) --{ -- void __iomem *base = ath79_reset_base; -- struct irq_chip *chip = irq_desc_get_chip(desc); -- struct ar71xx_pci_controller *apc = irq_desc_get_handler_data(desc); -- u32 pending; -- -- chained_irq_enter(chip, desc); -- pending = __raw_readl(base + AR71XX_RESET_REG_PCI_INT_STATUS) & -- __raw_readl(base + AR71XX_RESET_REG_PCI_INT_ENABLE); -- -- if (pending & AR71XX_PCI_INT_DEV0) -- generic_handle_irq(irq_linear_revmap(apc->domain, 1)); -- -- else if (pending & AR71XX_PCI_INT_DEV1) -- generic_handle_irq(irq_linear_revmap(apc->domain, 2)); -- -- else if (pending & AR71XX_PCI_INT_DEV2) -- generic_handle_irq(irq_linear_revmap(apc->domain, 3)); -- -- else if (pending & AR71XX_PCI_INT_CORE) -- generic_handle_irq(irq_linear_revmap(apc->domain, 4)); -- -- else -- spurious_interrupt(); -- chained_irq_exit(chip, desc); --} -- --static void ar71xx_pci_irq_unmask(struct irq_data *d) --{ -- struct ar71xx_pci_controller *apc; -- unsigned int irq; -- void __iomem *base = ath79_reset_base; -- u32 t; -- -- apc = irq_data_get_irq_chip_data(d); -- irq = irq_linear_revmap(apc->domain, d->irq); -- -- t = __raw_readl(base + AR71XX_RESET_REG_PCI_INT_ENABLE); -- __raw_writel(t | (1 << irq), base + AR71XX_RESET_REG_PCI_INT_ENABLE); -- -- /* flush write */ -- __raw_readl(base + AR71XX_RESET_REG_PCI_INT_ENABLE); --} -- --static void ar71xx_pci_irq_mask(struct irq_data *d) --{ -- struct ar71xx_pci_controller *apc; -- unsigned int irq; -- void __iomem *base = ath79_reset_base; -- u32 t; -- -- apc = irq_data_get_irq_chip_data(d); -- irq = irq_linear_revmap(apc->domain, d->irq); -- -- t = __raw_readl(base + AR71XX_RESET_REG_PCI_INT_ENABLE); -- __raw_writel(t & ~(1 << irq), base + AR71XX_RESET_REG_PCI_INT_ENABLE); -- -- /* flush write */ -- __raw_readl(base + AR71XX_RESET_REG_PCI_INT_ENABLE); --} -- --static struct irq_chip ar71xx_pci_irq_chip = { -- .name = "AR71XX PCI", -- .irq_mask = ar71xx_pci_irq_mask, -- .irq_unmask = ar71xx_pci_irq_unmask, -- .irq_mask_ack = ar71xx_pci_irq_mask, --}; -- --static int ar71xx_pci_irq_map(struct irq_domain *d, -- unsigned int irq, irq_hw_number_t hw) --{ -- struct ar71xx_pci_controller *apc = d->host_data; -- -- irq_set_chip_and_handler(irq, &ar71xx_pci_irq_chip, handle_level_irq); -- irq_set_chip_data(irq, apc); -- -- return 0; --} -- --static const struct irq_domain_ops ar71xx_pci_domain_ops = { -- .xlate = irq_domain_xlate_onecell, -- .map = ar71xx_pci_irq_map, --}; -- --static void ar71xx_pci_irq_init(struct ar71xx_pci_controller *apc) --{ -- void __iomem *base = ath79_reset_base; -- -- __raw_writel(0, base + AR71XX_RESET_REG_PCI_INT_ENABLE); -- __raw_writel(0, base + AR71XX_RESET_REG_PCI_INT_STATUS); -- -- apc->domain = irq_domain_add_linear(apc->np, AR71XX_PCI_IRQ_COUNT, -- &ar71xx_pci_domain_ops, apc); -- irq_set_chained_handler_and_data(apc->irq, ar71xx_pci_irq_handler, -- apc); --} -- - static void ar71xx_pci_reset(void) - { - ath79_device_reset_set(AR71XX_RESET_PCI_BUS | AR71XX_RESET_PCI_CORE); -@@ -358,10 +258,6 @@ static int ar71xx_pci_probe(struct platf - if (IS_ERR(apc->cfg_base)) - return PTR_ERR(apc->cfg_base); - -- apc->irq = platform_get_irq(pdev, 0); -- if (apc->irq < 0) -- return -EINVAL; -- - ar71xx_pci_reset(); - - /* setup COMMAND register */ -@@ -372,8 +268,6 @@ static int ar71xx_pci_probe(struct platf - /* clear bus errors */ - ar71xx_pci_check_error(apc, 1); - -- ar71xx_pci_irq_init(apc); -- - apc->np = pdev->dev.of_node; - apc->pci_ctrl.pci_ops = &ar71xx_pci_ops; - apc->pci_ctrl.mem_resource = &apc->mem_res; diff --git a/target/linux/ath79/patches-5.4/0037-missing-registers.patch b/target/linux/ath79/patches-5.4/0037-missing-registers.patch deleted file mode 100644 index 9067e4ca7b..0000000000 --- a/target/linux/ath79/patches-5.4/0037-missing-registers.patch +++ /dev/null @@ -1,21 +0,0 @@ -commit f3ffac90bc7266b7d917616f3233f58e8c08a196 -Author: Christian Lamparter -Date: Fri Aug 10 23:24:47 2018 +0200 - - ath79: gmac: add parsers for rxd(v)- and tx(d|en)-delay for AR9344 - - Signed-off-by: Christian Lamparter - ---- a/arch/mips/include/asm/mach-ath79/ar71xx_regs.h -+++ b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h -@@ -1226,6 +1226,10 @@ - #define AR934X_ETH_CFG_RDV_DELAY BIT(16) - #define AR934X_ETH_CFG_RDV_DELAY_MASK 0x3 - #define AR934X_ETH_CFG_RDV_DELAY_SHIFT 16 -+#define AR934X_ETH_CFG_TXD_DELAY_MASK 0x3 -+#define AR934X_ETH_CFG_TXD_DELAY_SHIFT 18 -+#define AR934X_ETH_CFG_TXE_DELAY_MASK 0x3 -+#define AR934X_ETH_CFG_TXE_DELAY_SHIFT 20 - - /* - * QCA953X GMAC Interface diff --git a/target/linux/ath79/patches-5.4/0038-MIPS-ath79-add-missing-QCA955x-GMAC-registers.patch b/target/linux/ath79/patches-5.4/0038-MIPS-ath79-add-missing-QCA955x-GMAC-registers.patch deleted file mode 100644 index bc09062dc5..0000000000 --- a/target/linux/ath79/patches-5.4/0038-MIPS-ath79-add-missing-QCA955x-GMAC-registers.patch +++ /dev/null @@ -1,90 +0,0 @@ -From 60efe35257b063ce584968f9f80b437030ce6ba6 Mon Sep 17 00:00:00 2001 -From: David Bauer -Date: Mon, 18 Mar 2019 00:54:06 +0100 -Subject: [PATCH] MIPS: ath79: add missing QCA955x GMAC registers - -This adds missing GMAC register definitions for the Qualcomm Atheros -QCA955X series MIPS SoCs. - -They originate from the platforms U-Boot code and the AVM FRITZ!WLAN -Repeater 450E's GPL tarball. - -Signed-off-by: David Bauer ---- - .../mips/include/asm/mach-ath79/ar71xx_regs.h | 54 +++++++++++++++++++ - 1 file changed, 54 insertions(+) - ---- a/arch/mips/include/asm/mach-ath79/ar71xx_regs.h -+++ b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h -@@ -1246,7 +1246,12 @@ - */ - - #define QCA955X_GMAC_REG_ETH_CFG 0x00 -+#define QCA955X_GMAC_REG_SGMII_RESET 0x14 - #define QCA955X_GMAC_REG_SGMII_SERDES 0x18 -+#define QCA955X_GMAC_REG_MR_AN_CONTROL 0x1c -+#define QCA955X_GMAC_REG_MR_AN_STATUS 0x20 -+#define QCA955X_GMAC_REG_SGMII_CONFIG 0x34 -+#define QCA955X_GMAC_REG_SGMII_DEBUG 0x58 - - #define QCA955X_ETH_CFG_RGMII_EN BIT(0) - #define QCA955X_ETH_CFG_MII_GE0 BIT(1) -@@ -1268,9 +1273,58 @@ - #define QCA955X_ETH_CFG_TXE_DELAY_MASK 0x3 - #define QCA955X_ETH_CFG_TXE_DELAY_SHIFT 20 - -+#define QCA955X_SGMII_RESET_RX_CLK_N_RESET 0 -+#define QCA955X_SGMII_RESET_RX_CLK_N BIT(0) -+#define QCA955X_SGMII_RESET_TX_CLK_N BIT(1) -+#define QCA955X_SGMII_RESET_RX_125M_N BIT(2) -+#define QCA955X_SGMII_RESET_TX_125M_N BIT(3) -+#define QCA955X_SGMII_RESET_HW_RX_125M_N BIT(4) -+ - #define QCA955X_SGMII_SERDES_LOCK_DETECT_STATUS BIT(15) - #define QCA955X_SGMII_SERDES_RES_CALIBRATION_SHIFT 23 - #define QCA955X_SGMII_SERDES_RES_CALIBRATION_MASK 0xf -+ -+#define QCA955X_MR_AN_CONTROL_SPEED_SEL1 BIT(6) -+#define QCA955X_MR_AN_CONTROL_DUPLEX_MODE BIT(8) -+#define QCA955X_MR_AN_CONTROL_RESTART_AN BIT(9) -+#define QCA955X_MR_AN_CONTROL_POWER_DOWN BIT(11) -+#define QCA955X_MR_AN_CONTROL_AN_ENABLE BIT(12) -+#define QCA955X_MR_AN_CONTROL_SPEED_SEL0 BIT(13) -+#define QCA955X_MR_AN_CONTROL_LOOPBACK BIT(14) -+#define QCA955X_MR_AN_CONTROL_PHY_RESET BIT(15) -+ -+#define QCA955X_MR_AN_STATUS_EXT_CAP BIT(0) -+#define QCA955X_MR_AN_STATUS_LINK_UP BIT(2) -+#define QCA955X_MR_AN_STATUS_AN_ABILITY BIT(3) -+#define QCA955X_MR_AN_STATUS_REMOTE_FAULT BIT(4) -+#define QCA955X_MR_AN_STATUS_AN_COMPLETE BIT(5) -+#define QCA955X_MR_AN_STATUS_NO_PREAMBLE BIT(6) -+#define QCA955X_MR_AN_STATUS_BASE_PAGE BIT(7) -+ -+#define QCA955X_SGMII_CONFIG_MODE_CTRL_SHIFT 0 -+#define QCA955X_SGMII_CONFIG_MODE_CTRL_MASK 0x7 -+#define QCA955X_SGMII_CONFIG_ENABLE_SGMII_TX_PAUSE BIT(3) -+#define QCA955X_SGMII_CONFIG_MR_REG4_CHANGED BIT(4) -+#define QCA955X_SGMII_CONFIG_FORCE_SPEED BIT(5) -+#define QCA955X_SGMII_CONFIG_SPEED_SHIFT 6 -+#define QCA955X_SGMII_CONFIG_SPEED_MASK 0xc0 -+#define QCA955X_SGMII_CONFIG_REMOTE_PHY_LOOPBACK BIT(8) -+#define QCA955X_SGMII_CONFIG_NEXT_PAGE_LOADED BIT(9) -+#define QCA955X_SGMII_CONFIG_MDIO_ENABLE BIT(10) -+#define QCA955X_SGMII_CONFIG_MDIO_PULSE BIT(11) -+#define QCA955X_SGMII_CONFIG_MDIO_COMPLETE BIT(12) -+#define QCA955X_SGMII_CONFIG_PRBS_ENABLE BIT(13) -+#define QCA955X_SGMII_CONFIG_BERT_ENABLE BIT(14) -+ -+#define QCA955X_SGMII_DEBUG_TX_STATE_MASK 0xff -+#define QCA955X_SGMII_DEBUG_TX_STATE_SHIFT 0 -+#define QCA955X_SGMII_DEBUG_RX_STATE_MASK 0xff00 -+#define QCA955X_SGMII_DEBUG_RX_STATE_SHIFT 8 -+#define QCA955X_SGMII_DEBUG_RX_SYNC_STATE_MASK 0xff0000 -+#define QCA955X_SGMII_DEBUG_RX_SYNC_STATE_SHIFT 16 -+#define QCA955X_SGMII_DEBUG_ARB_STATE_MASK 0xf000000 -+#define QCA955X_SGMII_DEBUG_ARB_STATE_SHIFT 24 -+ - /* - * QCA956X GMAC Interface - */ diff --git a/target/linux/ath79/patches-5.4/0039-MIPS-ath79-export-UART1-reference-clock.patch b/target/linux/ath79/patches-5.4/0039-MIPS-ath79-export-UART1-reference-clock.patch deleted file mode 100644 index edf888c7e7..0000000000 --- a/target/linux/ath79/patches-5.4/0039-MIPS-ath79-export-UART1-reference-clock.patch +++ /dev/null @@ -1,52 +0,0 @@ ---- a/arch/mips/ath79/clock.c -+++ b/arch/mips/ath79/clock.c -@@ -40,6 +40,7 @@ static const char * const clk_names[ATH7 - [ATH79_CLK_AHB] = "ahb", - [ATH79_CLK_REF] = "ref", - [ATH79_CLK_MDIO] = "mdio", -+ [ATH79_CLK_UART1] = "uart1", - }; - - static const char * __init ath79_clk_name(int type) -@@ -344,6 +345,9 @@ static void __init ar934x_clocks_init(vo - if (clk_ctrl & AR934X_PLL_SWITCH_CLOCK_CONTROL_MDIO_CLK_SEL) - ath79_set_clk(ATH79_CLK_MDIO, 100 * 1000 * 1000); - -+ if (clk_ctrl & AR934X_PLL_SWITCH_CLOCK_CONTROL_UART1_CLK_SEL) -+ ath79_set_clk(ATH79_CLK_UART1, 100 * 1000 * 1000); -+ - iounmap(dpll_base); - } - -@@ -649,6 +653,9 @@ static void __init ath79_clocks_init_dt( - if (!clks[ATH79_CLK_MDIO]) - clks[ATH79_CLK_MDIO] = clks[ATH79_CLK_REF]; - -+ if (!clks[ATH79_CLK_UART1]) -+ clks[ATH79_CLK_UART1] = clks[ATH79_CLK_REF]; -+ - if (of_clk_add_provider(np, of_clk_src_onecell_get, &clk_data)) { - pr_err("%pOF: could not register clk provider\n", np); - goto err_iounmap; ---- a/arch/mips/include/asm/mach-ath79/ar71xx_regs.h -+++ b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h -@@ -348,6 +348,7 @@ - #define AR934X_PLL_CPU_DDR_CLK_CTRL_AHBCLK_FROM_DDRPLL BIT(24) - - #define AR934X_PLL_SWITCH_CLOCK_CONTROL_MDIO_CLK_SEL BIT(6) -+#define AR934X_PLL_SWITCH_CLOCK_CONTROL_UART1_CLK_SEL BIT(7) - - #define QCA953X_PLL_CPU_CONFIG_REG 0x00 - #define QCA953X_PLL_DDR_CONFIG_REG 0x04 ---- a/include/dt-bindings/clock/ath79-clk.h -+++ b/include/dt-bindings/clock/ath79-clk.h -@@ -11,7 +11,8 @@ - #define ATH79_CLK_AHB 2 - #define ATH79_CLK_REF 3 - #define ATH79_CLK_MDIO 4 -+#define ATH79_CLK_UART1 5 - --#define ATH79_CLK_END 5 -+#define ATH79_CLK_END 6 - - #endif /* __DT_BINDINGS_ATH79_CLK_H */ diff --git a/target/linux/ath79/patches-5.4/004-register_gpio_driver_earlier.patch b/target/linux/ath79/patches-5.4/004-register_gpio_driver_earlier.patch deleted file mode 100644 index fa4b05f724..0000000000 --- a/target/linux/ath79/patches-5.4/004-register_gpio_driver_earlier.patch +++ /dev/null @@ -1,18 +0,0 @@ -HACK: register the GPIO driver earlier to ensure that gpio_request calls -from mach files succeed. - ---- a/drivers/gpio/gpio-ath79.c -+++ b/drivers/gpio/gpio-ath79.c -@@ -310,7 +310,11 @@ static struct platform_driver ath79_gpio - .probe = ath79_gpio_probe, - }; - --module_platform_driver(ath79_gpio_driver); -+static int __init ath79_gpio_init(void) -+{ -+ return platform_driver_register(&ath79_gpio_driver); -+} -+postcore_initcall(ath79_gpio_init); - - MODULE_DESCRIPTION("Atheros AR71XX/AR724X/AR913X GPIO API support"); - MODULE_LICENSE("GPL v2"); diff --git a/target/linux/ath79/patches-5.4/0040-ath79-sgmii-config.patch b/target/linux/ath79/patches-5.4/0040-ath79-sgmii-config.patch deleted file mode 100644 index bf7cbf2716..0000000000 --- a/target/linux/ath79/patches-5.4/0040-ath79-sgmii-config.patch +++ /dev/null @@ -1,9 +0,0 @@ ---- a/arch/mips/include/asm/mach-ath79/ar71xx_regs.h -+++ b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h -@@ -1376,5 +1376,6 @@ - - #define QCA956X_SGMII_CONFIG_MODE_CTRL_SHIFT 0 - #define QCA956X_SGMII_CONFIG_MODE_CTRL_MASK 0x7 -+#define QCA956X_SGMII_CONFIG_MODE_CTRL_SGMII_MAC 0x2 - - #endif /* __ASM_MACH_AR71XX_REGS_H */ diff --git a/target/linux/ath79/patches-5.4/0051-spi-add-driver-for-ar934x-spi-controller.patch b/target/linux/ath79/patches-5.4/0051-spi-add-driver-for-ar934x-spi-controller.patch deleted file mode 100644 index e314fa2cd3..0000000000 --- a/target/linux/ath79/patches-5.4/0051-spi-add-driver-for-ar934x-spi-controller.patch +++ /dev/null @@ -1,283 +0,0 @@ -From 7e161c423a232ef7ddf6c11b09ebe471dd5a23cf Mon Sep 17 00:00:00 2001 -From: Chuanhong Guo -Date: Wed, 5 Feb 2020 18:25:37 +0800 -Subject: [PATCH v4 1/2] spi: add driver for ar934x spi controller - -This patch adds driver for SPI controller found in Qualcomm Atheros -AR934x/QCA95xx SoCs. -This controller is a superset of the already supported qca,ar7100-spi. -Besides the bit-bang mode in spi-ath79.c, this new controller added -a new "shift register" mode, allowing faster spi operations. - -Signed-off-by: Chuanhong Guo ---- - drivers/spi/Kconfig | 7 ++ - drivers/spi/Makefile | 1 + - drivers/spi/spi-ar934x.c | 235 +++++++++++++++++++++++++++++++++++++++ - 3 files changed, 243 insertions(+) - create mode 100644 drivers/spi/spi-ar934x.c - ---- a/drivers/spi/Kconfig -+++ b/drivers/spi/Kconfig -@@ -62,6 +62,13 @@ config SPI_ALTERA - help - This is the driver for the Altera SPI Controller. - -+config SPI_AR934X -+ tristate "Qualcomm Atheros AR934X/QCA95XX SPI controller driver" -+ depends on ATH79 || COMPILE_TEST -+ help -+ This enables support for the SPI controller present on the -+ Qualcomm Atheros AR934X/QCA95XX SoCs. -+ - config SPI_ATH79 - tristate "Atheros AR71XX/AR724X/AR913X SPI controller driver" - depends on ATH79 || COMPILE_TEST ---- a/drivers/spi/Makefile -+++ b/drivers/spi/Makefile -@@ -14,6 +14,7 @@ obj-$(CONFIG_SPI_LOOPBACK_TEST) += spi- - - # SPI master controller drivers (bus) - obj-$(CONFIG_SPI_ALTERA) += spi-altera.o -+obj-$(CONFIG_SPI_AR934X) += spi-ar934x.o - obj-$(CONFIG_SPI_ARMADA_3700) += spi-armada-3700.o - obj-$(CONFIG_SPI_ATMEL) += spi-atmel.o - obj-$(CONFIG_SPI_ATMEL_QUADSPI) += atmel-quadspi.o ---- /dev/null -+++ b/drivers/spi/spi-ar934x.c -@@ -0,0 +1,235 @@ -+// SPDX-License-Identifier: GPL-2.0 -+// -+// SPI controller driver for Qualcomm Atheros AR934x/QCA95xx SoCs -+// -+// Copyright (C) 2020 Chuanhong Guo -+// -+// Based on spi-mt7621.c: -+// Copyright (C) 2011 Sergiy -+// Copyright (C) 2011-2013 Gabor Juhos -+// Copyright (C) 2014-2015 Felix Fietkau -+ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+ -+#define DRIVER_NAME "spi-ar934x" -+ -+#define AR934X_SPI_REG_FS 0x00 -+#define AR934X_SPI_ENABLE BIT(0) -+ -+#define AR934X_SPI_REG_IOC 0x08 -+#define AR934X_SPI_IOC_INITVAL 0x70000 -+ -+#define AR934X_SPI_REG_CTRL 0x04 -+#define AR934X_SPI_CLK_MASK GENMASK(5, 0) -+ -+#define AR934X_SPI_DATAOUT 0x10 -+ -+#define AR934X_SPI_REG_SHIFT_CTRL 0x14 -+#define AR934X_SPI_SHIFT_EN BIT(31) -+#define AR934X_SPI_SHIFT_CS(n) BIT(28 + (n)) -+#define AR934X_SPI_SHIFT_TERM 26 -+#define AR934X_SPI_SHIFT_VAL(cs, term, count) \ -+ (AR934X_SPI_SHIFT_EN | AR934X_SPI_SHIFT_CS(cs) | \ -+ (term) << AR934X_SPI_SHIFT_TERM | (count)) -+ -+#define AR934X_SPI_DATAIN 0x18 -+ -+struct ar934x_spi { -+ struct spi_controller *ctlr; -+ void __iomem *base; -+ struct clk *clk; -+ unsigned int clk_freq; -+}; -+ -+static inline int ar934x_spi_clk_div(struct ar934x_spi *sp, unsigned int freq) -+{ -+ int div = DIV_ROUND_UP(sp->clk_freq, freq * 2) - 1; -+ -+ if (div < 0) -+ return 0; -+ else if (div > AR934X_SPI_CLK_MASK) -+ return -EINVAL; -+ else -+ return div; -+} -+ -+static int ar934x_spi_setup(struct spi_device *spi) -+{ -+ struct ar934x_spi *sp = spi_controller_get_devdata(spi->master); -+ -+ if ((spi->max_speed_hz == 0) || -+ (spi->max_speed_hz > (sp->clk_freq / 2))) { -+ spi->max_speed_hz = sp->clk_freq / 2; -+ } else if (spi->max_speed_hz < (sp->clk_freq / 128)) { -+ dev_err(&spi->dev, "spi clock is too low\n"); -+ return -EINVAL; -+ } -+ -+ return 0; -+} -+ -+static int ar934x_spi_transfer_one_message(struct spi_controller *master, -+ struct spi_message *m) -+{ -+ struct ar934x_spi *sp = spi_controller_get_devdata(master); -+ struct spi_transfer *t = NULL; -+ struct spi_device *spi = m->spi; -+ unsigned long trx_done, trx_cur; -+ int stat = 0; -+ u8 term = 0; -+ int div, i; -+ u32 reg; -+ const u8 *tx_buf; -+ u8 *buf; -+ -+ m->actual_length = 0; -+ list_for_each_entry(t, &m->transfers, transfer_list) { -+ if (t->speed_hz) -+ div = ar934x_spi_clk_div(sp, t->speed_hz); -+ else -+ div = ar934x_spi_clk_div(sp, spi->max_speed_hz); -+ if (div < 0) { -+ stat = -EIO; -+ goto msg_done; -+ } -+ -+ reg = ioread32(sp->base + AR934X_SPI_REG_CTRL); -+ reg &= ~AR934X_SPI_CLK_MASK; -+ reg |= div; -+ iowrite32(reg, sp->base + AR934X_SPI_REG_CTRL); -+ iowrite32(0, sp->base + AR934X_SPI_DATAOUT); -+ -+ for (trx_done = 0; trx_done < t->len; trx_done += 4) { -+ trx_cur = t->len - trx_done; -+ if (trx_cur > 4) -+ trx_cur = 4; -+ else if (list_is_last(&t->transfer_list, &m->transfers)) -+ term = 1; -+ -+ if (t->tx_buf) { -+ tx_buf = t->tx_buf + trx_done; -+ reg = tx_buf[0]; -+ for (i = 1; i < trx_cur; i++) -+ reg = reg << 8 | tx_buf[i]; -+ iowrite32(reg, sp->base + AR934X_SPI_DATAOUT); -+ } -+ -+ reg = AR934X_SPI_SHIFT_VAL(spi->chip_select, term, -+ trx_cur * 8); -+ iowrite32(reg, sp->base + AR934X_SPI_REG_SHIFT_CTRL); -+ stat = readl_poll_timeout( -+ sp->base + AR934X_SPI_REG_SHIFT_CTRL, reg, -+ !(reg & AR934X_SPI_SHIFT_EN), 0, 5); -+ if (stat < 0) -+ goto msg_done; -+ -+ if (t->rx_buf) { -+ reg = ioread32(sp->base + AR934X_SPI_DATAIN); -+ buf = t->rx_buf + trx_done; -+ for (i = 0; i < trx_cur; i++) { -+ buf[trx_cur - i - 1] = reg & 0xff; -+ reg >>= 8; -+ } -+ } -+ } -+ m->actual_length += t->len; -+ } -+ -+msg_done: -+ m->status = stat; -+ spi_finalize_current_message(master); -+ -+ return 0; -+} -+ -+static const struct of_device_id ar934x_spi_match[] = { -+ { .compatible = "qca,ar934x-spi" }, -+ {}, -+}; -+MODULE_DEVICE_TABLE(of, ar934x_spi_match); -+ -+static int ar934x_spi_probe(struct platform_device *pdev) -+{ -+ struct spi_controller *ctlr; -+ struct ar934x_spi *sp; -+ void __iomem *base; -+ struct clk *clk; -+ int ret; -+ -+ base = devm_platform_ioremap_resource(pdev, 0); -+ if (IS_ERR(base)) -+ return PTR_ERR(base); -+ -+ clk = devm_clk_get(&pdev->dev, NULL); -+ if (IS_ERR(clk)) { -+ dev_err(&pdev->dev, "failed to get clock\n"); -+ return PTR_ERR(clk); -+ } -+ -+ ret = clk_prepare_enable(clk); -+ if (ret) -+ return ret; -+ -+ ctlr = spi_alloc_master(&pdev->dev, sizeof(*sp)); -+ if (!ctlr) { -+ dev_info(&pdev->dev, "failed to allocate spi controller\n"); -+ return -ENOMEM; -+ } -+ -+ /* disable flash mapping and expose spi controller registers */ -+ iowrite32(AR934X_SPI_ENABLE, base + AR934X_SPI_REG_FS); -+ /* restore pins to default state: CSn=1 DO=CLK=0 */ -+ iowrite32(AR934X_SPI_IOC_INITVAL, base + AR934X_SPI_REG_IOC); -+ -+ ctlr->mode_bits = SPI_LSB_FIRST; -+ ctlr->setup = ar934x_spi_setup; -+ ctlr->transfer_one_message = ar934x_spi_transfer_one_message; -+ ctlr->bits_per_word_mask = SPI_BPW_MASK(8); -+ ctlr->dev.of_node = pdev->dev.of_node; -+ ctlr->num_chipselect = 3; -+ -+ dev_set_drvdata(&pdev->dev, ctlr); -+ -+ sp = spi_controller_get_devdata(ctlr); -+ sp->base = base; -+ sp->clk = clk; -+ sp->clk_freq = clk_get_rate(clk); -+ sp->ctlr = ctlr; -+ -+ return devm_spi_register_controller(&pdev->dev, ctlr); -+} -+ -+static int ar934x_spi_remove(struct platform_device *pdev) -+{ -+ struct spi_controller *ctlr; -+ struct ar934x_spi *sp; -+ -+ ctlr = dev_get_drvdata(&pdev->dev); -+ sp = spi_controller_get_devdata(ctlr); -+ -+ clk_disable_unprepare(sp->clk); -+ -+ return 0; -+} -+ -+static struct platform_driver ar934x_spi_driver = { -+ .driver = { -+ .name = DRIVER_NAME, -+ .of_match_table = ar934x_spi_match, -+ }, -+ .probe = ar934x_spi_probe, -+ .remove = ar934x_spi_remove, -+}; -+ -+module_platform_driver(ar934x_spi_driver); -+ -+MODULE_DESCRIPTION("SPI controller driver for Qualcomm Atheros AR934x/QCA95xx"); -+MODULE_AUTHOR("Chuanhong Guo "); -+MODULE_LICENSE("GPL v2"); -+MODULE_ALIAS("platform:" DRIVER_NAME); diff --git a/target/linux/ath79/patches-5.4/0061-tty-serial-ar933x-uart-rs485-gpio.patch b/target/linux/ath79/patches-5.4/0061-tty-serial-ar933x-uart-rs485-gpio.patch deleted file mode 100644 index 59c46d507a..0000000000 --- a/target/linux/ath79/patches-5.4/0061-tty-serial-ar933x-uart-rs485-gpio.patch +++ /dev/null @@ -1,267 +0,0 @@ -From patchwork Fri Feb 21 21:23:31 2020 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -X-Patchwork-Submitter: Daniel Golle -X-Patchwork-Id: 1198835 -Date: Fri, 21 Feb 2020 22:23:31 +0100 -From: Daniel Golle -To: linux-serial@vger.kernel.org, linux-kernel@vger.kernel.org -Cc: Greg Kroah-Hartman , - Jiri Slaby , Petr =?utf-8?q?=C5=A0tetiar?= , - Chuanhong Guo , Piotr Dymacz -Subject: [PATCH v2] serial: ar933x_uart: add RS485 support -Message-ID: <20200221212331.GA21467@makrotopia.org> -MIME-Version: 1.0 -Content-Disposition: inline -Sender: linux-kernel-owner@vger.kernel.org -Precedence: bulk -List-ID: -X-Mailing-List: linux-kernel@vger.kernel.org - -Emulate half-duplex operation and use mctrl_gpio to add support for -RS485 tranceiver with transmit/receive switch hooked to RTS GPIO line. -This is needed to make use of the RS485 port found on Teltonika RUT955. - -Signed-off-by: Daniel Golle ---- -v2: use bool to indicate ongoing half-duplex send, use it afterwards - to decide whether we've just been in a send operation. - - drivers/tty/serial/Kconfig | 1 + - drivers/tty/serial/ar933x_uart.c | 113 +++++++++++++++++++++++++++++-- - 2 files changed, 108 insertions(+), 6 deletions(-) - ---- a/drivers/tty/serial/Kconfig -+++ b/drivers/tty/serial/Kconfig -@@ -1280,6 +1280,7 @@ config SERIAL_AR933X - tristate "AR933X serial port support" - depends on HAVE_CLK && ATH79 - select SERIAL_CORE -+ select SERIAL_MCTRL_GPIO if GPIOLIB - help - If you have an Atheros AR933X SOC based board and want to use the - built-in UART of the SoC, say Y to this option. ---- a/drivers/tty/serial/ar933x_uart.c -+++ b/drivers/tty/serial/ar933x_uart.c -@@ -13,6 +13,7 @@ - #include - #include - #include -+#include - #include - #include - #include -@@ -29,6 +30,8 @@ - - #include - -+#include "serial_mctrl_gpio.h" -+ - #define DRIVER_NAME "ar933x-uart" - - #define AR933X_UART_MAX_SCALE 0xff -@@ -47,6 +50,8 @@ struct ar933x_uart_port { - unsigned int min_baud; - unsigned int max_baud; - struct clk *clk; -+ struct mctrl_gpios *gpios; -+ struct gpio_desc *rts_gpiod; - }; - - static inline unsigned int ar933x_uart_read(struct ar933x_uart_port *up, -@@ -100,6 +105,18 @@ static inline void ar933x_uart_stop_tx_i - ar933x_uart_write(up, AR933X_UART_INT_EN_REG, up->ier); - } - -+static inline void ar933x_uart_start_rx_interrupt(struct ar933x_uart_port *up) -+{ -+ up->ier |= AR933X_UART_INT_RX_VALID; -+ ar933x_uart_write(up, AR933X_UART_INT_EN_REG, up->ier); -+} -+ -+static inline void ar933x_uart_stop_rx_interrupt(struct ar933x_uart_port *up) -+{ -+ up->ier &= ~AR933X_UART_INT_RX_VALID; -+ ar933x_uart_write(up, AR933X_UART_INT_EN_REG, up->ier); -+} -+ - static inline void ar933x_uart_putc(struct ar933x_uart_port *up, int ch) - { - unsigned int rdata; -@@ -125,11 +142,21 @@ static unsigned int ar933x_uart_tx_empty - - static unsigned int ar933x_uart_get_mctrl(struct uart_port *port) - { -- return TIOCM_CAR; -+ struct ar933x_uart_port *up = -+ container_of(port, struct ar933x_uart_port, port); -+ int ret = TIOCM_CTS | TIOCM_DSR | TIOCM_CAR; -+ -+ mctrl_gpio_get(up->gpios, &ret); -+ -+ return ret; - } - - static void ar933x_uart_set_mctrl(struct uart_port *port, unsigned int mctrl) - { -+ struct ar933x_uart_port *up = -+ container_of(port, struct ar933x_uart_port, port); -+ -+ mctrl_gpio_set(up->gpios, mctrl); - } - - static void ar933x_uart_start_tx(struct uart_port *port) -@@ -140,6 +167,37 @@ static void ar933x_uart_start_tx(struct - ar933x_uart_start_tx_interrupt(up); - } - -+static void ar933x_uart_wait_tx_complete(struct ar933x_uart_port *up) -+{ -+ unsigned int status; -+ unsigned int timeout = 60000; -+ -+ /* Wait up to 60ms for the character(s) to be sent. */ -+ do { -+ status = ar933x_uart_read(up, AR933X_UART_CS_REG); -+ if (--timeout == 0) -+ break; -+ udelay(1); -+ } while (status & AR933X_UART_CS_TX_BUSY); -+ -+ if (timeout == 0) -+ dev_err(up->port.dev, "waiting for TX timed out\n"); -+} -+ -+static void ar933x_uart_rx_flush(struct ar933x_uart_port *up) -+{ -+ unsigned int status; -+ -+ /* clear RX_VALID interrupt */ -+ ar933x_uart_write(up, AR933X_UART_INT_REG, AR933X_UART_INT_RX_VALID); -+ -+ /* remove characters from the RX FIFO */ -+ do { -+ ar933x_uart_write(up, AR933X_UART_DATA_REG, AR933X_UART_DATA_RX_CSR); -+ status = ar933x_uart_read(up, AR933X_UART_DATA_REG); -+ } while (status & AR933X_UART_DATA_RX_CSR); -+} -+ - static void ar933x_uart_stop_tx(struct uart_port *port) - { - struct ar933x_uart_port *up = -@@ -153,8 +211,7 @@ static void ar933x_uart_stop_rx(struct u - struct ar933x_uart_port *up = - container_of(port, struct ar933x_uart_port, port); - -- up->ier &= ~AR933X_UART_INT_RX_VALID; -- ar933x_uart_write(up, AR933X_UART_INT_EN_REG, up->ier); -+ ar933x_uart_stop_rx_interrupt(up); - } - - static void ar933x_uart_break_ctl(struct uart_port *port, int break_state) -@@ -336,11 +393,20 @@ static void ar933x_uart_rx_chars(struct - static void ar933x_uart_tx_chars(struct ar933x_uart_port *up) - { - struct circ_buf *xmit = &up->port.state->xmit; -+ struct serial_rs485 *rs485conf = &up->port.rs485; - int count; -+ bool half_duplex_send = false; - - if (uart_tx_stopped(&up->port)) - return; - -+ if ((rs485conf->flags & SER_RS485_ENABLED) && -+ (up->port.x_char || !uart_circ_empty(xmit))) { -+ ar933x_uart_stop_rx_interrupt(up); -+ gpiod_set_value(up->rts_gpiod, !!(rs485conf->flags & SER_RS485_RTS_ON_SEND)); -+ half_duplex_send = true; -+ } -+ - count = up->port.fifosize; - do { - unsigned int rdata; -@@ -368,8 +434,14 @@ static void ar933x_uart_tx_chars(struct - if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS) - uart_write_wakeup(&up->port); - -- if (!uart_circ_empty(xmit)) -+ if (!uart_circ_empty(xmit)) { - ar933x_uart_start_tx_interrupt(up); -+ } else if (half_duplex_send) { -+ ar933x_uart_wait_tx_complete(up); -+ ar933x_uart_rx_flush(up); -+ ar933x_uart_start_rx_interrupt(up); -+ gpiod_set_value(up->rts_gpiod, !!(rs485conf->flags & SER_RS485_RTS_AFTER_SEND)); -+ } - } - - static irqreturn_t ar933x_uart_interrupt(int irq, void *dev_id) -@@ -427,8 +499,7 @@ static int ar933x_uart_startup(struct ua - AR933X_UART_CS_TX_READY_ORIDE | AR933X_UART_CS_RX_READY_ORIDE); - - /* Enable RX interrupts */ -- up->ier = AR933X_UART_INT_RX_VALID; -- ar933x_uart_write(up, AR933X_UART_INT_EN_REG, up->ier); -+ ar933x_uart_start_rx_interrupt(up); - - spin_unlock_irqrestore(&up->port.lock, flags); - -@@ -511,6 +582,21 @@ static const struct uart_ops ar933x_uart - .verify_port = ar933x_uart_verify_port, - }; - -+static int ar933x_config_rs485(struct uart_port *port, -+ struct serial_rs485 *rs485conf) -+{ -+ struct ar933x_uart_port *up = -+ container_of(port, struct ar933x_uart_port, port); -+ -+ if ((rs485conf->flags & SER_RS485_ENABLED) && -+ !up->rts_gpiod) { -+ dev_err(port->dev, "RS485 needs rts-gpio\n"); -+ return 1; -+ } -+ port->rs485 = *rs485conf; -+ return 0; -+} -+ - #ifdef CONFIG_SERIAL_AR933X_CONSOLE - static struct ar933x_uart_port * - ar933x_console_ports[CONFIG_SERIAL_AR933X_NR_UARTS]; -@@ -680,6 +766,8 @@ static int ar933x_uart_probe(struct plat - goto err_disable_clk; - } - -+ uart_get_rs485_mode(&pdev->dev, &port->rs485); -+ - port->mapbase = mem_res->start; - port->line = id; - port->irq = irq_res->start; -@@ -690,6 +778,7 @@ static int ar933x_uart_probe(struct plat - port->regshift = 2; - port->fifosize = AR933X_UART_FIFO_SIZE; - port->ops = &ar933x_uart_ops; -+ port->rs485_config = ar933x_config_rs485; - - baud = ar933x_uart_get_baud(port->uartclk, AR933X_UART_MAX_SCALE, 1); - up->min_baud = max_t(unsigned int, baud, AR933X_UART_MIN_BAUD); -@@ -697,6 +786,18 @@ static int ar933x_uart_probe(struct plat - baud = ar933x_uart_get_baud(port->uartclk, 0, AR933X_UART_MAX_STEP); - up->max_baud = min_t(unsigned int, baud, AR933X_UART_MAX_BAUD); - -+ up->gpios = mctrl_gpio_init(port, 0); -+ if (IS_ERR(up->gpios) && PTR_ERR(up->gpios) != -ENOSYS) -+ return PTR_ERR(up->gpios); -+ -+ up->rts_gpiod = mctrl_gpio_to_gpiod(up->gpios, UART_GPIO_RTS); -+ -+ if ((port->rs485.flags & SER_RS485_ENABLED) && -+ !up->rts_gpiod) { -+ dev_err(&pdev->dev, "lacking rts-gpio, disabling RS485\n"); -+ port->rs485.flags &= ~SER_RS485_ENABLED; -+ } -+ - #ifdef CONFIG_SERIAL_AR933X_CONSOLE - ar933x_console_ports[up->port.line] = up; - #endif diff --git a/target/linux/ath79/patches-5.4/0062-MIPS-pci-ar724x-add-QCA9550-reset-sequence.patch b/target/linux/ath79/patches-5.4/0062-MIPS-pci-ar724x-add-QCA9550-reset-sequence.patch deleted file mode 100644 index 13955c62a2..0000000000 --- a/target/linux/ath79/patches-5.4/0062-MIPS-pci-ar724x-add-QCA9550-reset-sequence.patch +++ /dev/null @@ -1,130 +0,0 @@ -From: David Bauer -Date: Sat, 11 Apr 2020 14:03:12 +0200 -Subject: MIPS: pci-ar724x: add QCA9550 reset sequence - -The QCA9550 family of SoCs have a slightly different reset -sequence compared to older chips. - -Normally the bootloader performs this sequence, however -some bootloader implementation expect the operating system -to clear the reset. - -Also get the resets from OF to support handling of the second -PCIe root-complex on the QCA9558. - -Signed-off-by: David Bauer - ---- a/arch/mips/include/asm/mach-ath79/ar71xx_regs.h -+++ b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h -@@ -391,6 +391,7 @@ - #define QCA955X_PLL_CPU_CONFIG_REG 0x00 - #define QCA955X_PLL_DDR_CONFIG_REG 0x04 - #define QCA955X_PLL_CLK_CTRL_REG 0x08 -+#define QCA955X_PLL_PCIE_CONFIG_REG 0x0c - #define QCA955X_PLL_ETH_XMII_CONTROL_REG 0x28 - #define QCA955X_PLL_ETH_SGMII_CONTROL_REG 0x48 - #define QCA955X_PLL_ETH_SGMII_SERDES_REG 0x4c -@@ -476,6 +477,9 @@ - #define QCA956X_PLL_CLK_CTRL_CPU_DDRCLK_FROM_CPUPLL BIT(21) - #define QCA956X_PLL_CLK_CTRL_AHBCLK_FROM_DDRPLL BIT(24) - -+#define QCA955X_PLL_PCIE_CONFIG_PLL_PWD BIT(30) -+#define QCA955X_PLL_PCIE_CONFIG_PLL_BYPASS BIT(16) -+ - #define QCA956X_PLL_SWITCH_CLOCK_SPARE_I2C_CLK_SELB BIT(5) - #define QCA956X_PLL_SWITCH_CLOCK_SPARE_MDIO_CLK_SEL0_1 BIT(6) - #define QCA956X_PLL_SWITCH_CLOCK_SPARE_UART1_CLK_SEL BIT(7) ---- a/arch/mips/pci/pci-ar724x.c -+++ b/arch/mips/pci/pci-ar724x.c -@@ -8,6 +8,7 @@ - - #include - #include -+#include - #include - #include - #include -@@ -55,6 +56,9 @@ struct ar724x_pci_controller { - struct irq_domain *domain; - struct resource io_res; - struct resource mem_res; -+ -+ struct reset_control *hc_reset; -+ struct reset_control *phy_reset; - }; - - static struct irq_chip ar724x_pci_irq_chip; -@@ -340,18 +344,30 @@ static void ar724x_pci_hw_init(struct ar - int wait = 0; - - /* deassert PCIe host controller and PCIe PHY reset */ -- ath79_device_reset_clear(AR724X_RESET_PCIE); -- ath79_device_reset_clear(AR724X_RESET_PCIE_PHY); -+ reset_control_deassert(apc->hc_reset); -+ reset_control_deassert(apc->phy_reset); - -- /* remove the reset of the PCIE PLL */ -- ppl = ath79_pll_rr(AR724X_PLL_REG_PCIE_CONFIG); -- ppl &= ~AR724X_PLL_REG_PCIE_CONFIG_PPL_RESET; -- ath79_pll_wr(AR724X_PLL_REG_PCIE_CONFIG, ppl); -- -- /* deassert bypass for the PCIE PLL */ -- ppl = ath79_pll_rr(AR724X_PLL_REG_PCIE_CONFIG); -- ppl &= ~AR724X_PLL_REG_PCIE_CONFIG_PPL_BYPASS; -- ath79_pll_wr(AR724X_PLL_REG_PCIE_CONFIG, ppl); -+ if (of_device_is_compatible(apc->np, "qcom,qca9550-pci")) { -+ /* remove the reset of the PCIE PLL */ -+ ppl = ath79_pll_rr(QCA955X_PLL_PCIE_CONFIG_REG); -+ ppl &= ~QCA955X_PLL_PCIE_CONFIG_PLL_PWD; -+ ath79_pll_wr(QCA955X_PLL_PCIE_CONFIG_REG, ppl); -+ -+ /* deassert bypass for the PCIE PLL */ -+ ppl = ath79_pll_rr(QCA955X_PLL_PCIE_CONFIG_REG); -+ ppl &= ~QCA955X_PLL_PCIE_CONFIG_PLL_BYPASS; -+ ath79_pll_wr(QCA955X_PLL_PCIE_CONFIG_REG, ppl); -+ } else { -+ /* remove the reset of the PCIE PLL */ -+ ppl = ath79_pll_rr(AR724X_PLL_REG_PCIE_CONFIG); -+ ppl &= ~AR724X_PLL_REG_PCIE_CONFIG_PPL_RESET; -+ ath79_pll_wr(AR724X_PLL_REG_PCIE_CONFIG, ppl); -+ -+ /* deassert bypass for the PCIE PLL */ -+ ppl = ath79_pll_rr(AR724X_PLL_REG_PCIE_CONFIG); -+ ppl &= ~AR724X_PLL_REG_PCIE_CONFIG_PPL_BYPASS; -+ ath79_pll_wr(AR724X_PLL_REG_PCIE_CONFIG, ppl); -+ } - - /* set PCIE Application Control to ready */ - app = __raw_readl(apc->ctrl_base + AR724X_PCI_REG_APP); -@@ -399,6 +415,14 @@ static int ar724x_pci_probe(struct platf - if (apc->irq < 0) - return -EINVAL; - -+ apc->hc_reset = devm_reset_control_get_exclusive(&pdev->dev, "hc"); -+ if (IS_ERR(apc->hc_reset)) -+ return PTR_ERR(apc->hc_reset); -+ -+ apc->phy_reset = devm_reset_control_get_exclusive(&pdev->dev, "phy"); -+ if (IS_ERR(apc->phy_reset)) -+ return PTR_ERR(apc->phy_reset); -+ - apc->np = pdev->dev.of_node; - apc->pci_controller.pci_ops = &ar724x_pci_ops; - apc->pci_controller.io_resource = &apc->io_res; -@@ -409,7 +433,7 @@ static int ar724x_pci_probe(struct platf - * Do the full PCIE Root Complex Initialization Sequence if the PCIe - * host controller is in reset. - */ -- if (ath79_reset_rr(AR724X_RESET_REG_RESET_MODULE) & AR724X_RESET_PCIE) -+ if (reset_control_status(apc->hc_reset)) - ar724x_pci_hw_init(apc); - - apc->link_up = ar724x_pci_check_link(apc); -@@ -427,6 +451,7 @@ static int ar724x_pci_probe(struct platf - - static const struct of_device_id ar724x_pci_ids[] = { - { .compatible = "qcom,ar7240-pci" }, -+ { .compatible = "qcom,qca9550-pci" }, - {}, - }; - diff --git a/target/linux/ath79/patches-5.4/404-mtd-cybertan-trx-parser.patch b/target/linux/ath79/patches-5.4/404-mtd-cybertan-trx-parser.patch deleted file mode 100644 index 923589661e..0000000000 --- a/target/linux/ath79/patches-5.4/404-mtd-cybertan-trx-parser.patch +++ /dev/null @@ -1,27 +0,0 @@ ---- a/drivers/mtd/parsers/Makefile -+++ b/drivers/mtd/parsers/Makefile -@@ -8,6 +8,7 @@ obj-$(CONFIG_MTD_OF_PARTS) += ofpart.o - ofpart-y += ofpart_core.o - ofpart-$(CONFIG_MTD_OF_PARTS_BCM4908) += ofpart_bcm4908.o - ofpart-$(CONFIG_MTD_OF_PARTS_LINKSYS_NS)+= ofpart_linksys_ns.o -+obj-$(CONFIG_MTD_PARSER_CYBERTAN) += parser_cybertan.o - obj-$(CONFIG_MTD_PARSER_IMAGETAG) += parser_imagetag.o - obj-$(CONFIG_MTD_AFS_PARTS) += afs.o - obj-$(CONFIG_MTD_PARSER_TRX) += parser_trx.o ---- a/drivers/mtd/parsers/Kconfig -+++ b/drivers/mtd/parsers/Kconfig -@@ -102,6 +102,14 @@ config MTD_OF_PARTS_LINKSYS_NS - two "firmware" partitions. Currently used firmware has to be detected - using CFE environment variable. - -+config MTD_PARSER_CYBERTAN -+ tristate "Parser for Cybertan format partitions" -+ depends on MTD && (ATH79 || COMPILE_TEST) -+ help -+ Cybertan has a proprietory header than encompasses a Broadcom trx -+ header. This driver will parse the header and take care of the -+ special offsets that result in the extra headers. -+ - config MTD_PARSER_IMAGETAG - tristate "Parser for BCM963XX Image Tag format partitions" - depends on BCM63XX || BMIPS_GENERIC || COMPILE_TEST diff --git a/target/linux/ath79/patches-5.4/410-spi-ath79-Implement-the-spi_mem-interface.patch b/target/linux/ath79/patches-5.4/410-spi-ath79-Implement-the-spi_mem-interface.patch deleted file mode 100644 index 51a71c6ef2..0000000000 --- a/target/linux/ath79/patches-5.4/410-spi-ath79-Implement-the-spi_mem-interface.patch +++ /dev/null @@ -1,68 +0,0 @@ -From 8d8cdb4a6ccee5b62cc0dc64651c3946364514dc Mon Sep 17 00:00:00 2001 -From: Luiz Angelo Daros de Luca -Date: Mon, 10 Feb 2020 16:11:27 -0300 -Subject: [PATCH] spi: ath79: Implement the spi_mem interface - -Signed-off-by: Luiz Angelo Daros de Luca ---- - drivers/spi/spi-ath79.c | 35 +++++++++++++++++++++++++++++++++++ - 1 file changed, 35 insertions(+) - ---- a/drivers/spi/spi-ath79.c -+++ b/drivers/spi/spi-ath79.c -@@ -15,6 +15,7 @@ - #include - #include - #include -+#include - #include - #include - #include -@@ -133,6 +134,39 @@ static u32 ath79_spi_txrx_mode0(struct s - return ath79_spi_rr(sp, AR71XX_SPI_REG_RDS); - } - -+static int ath79_exec_mem_op(struct spi_mem *mem, -+ const struct spi_mem_op *op) -+{ -+ struct ath79_spi *sp = ath79_spidev_to_sp(mem->spi); -+ -+ /* Ensures that reading is performed on device connected -+ to hardware cs0 */ -+ if (mem->spi->chip_select || mem->spi->cs_gpiod) -+ return -ENOTSUPP; -+ -+ /* Only use for fast-read op. */ -+ if (op->cmd.opcode != 0x0b || op->data.dir != SPI_MEM_DATA_IN || -+ op->addr.nbytes != 3 || op->dummy.nbytes != 1) -+ return -ENOTSUPP; -+ -+ /* disable GPIO mode */ -+ ath79_spi_wr(sp, AR71XX_SPI_REG_FS, 0); -+ -+ memcpy_fromio(op->data.buf.in, sp->base + op->addr.val, op->data.nbytes); -+ -+ /* enable GPIO mode */ -+ ath79_spi_wr(sp, AR71XX_SPI_REG_FS, AR71XX_SPI_FS_GPIO); -+ -+ /* restore IOC register */ -+ ath79_spi_wr(sp, AR71XX_SPI_REG_IOC, sp->ioc_base); -+ -+ return 0; -+} -+ -+static const struct spi_controller_mem_ops ath79_mem_ops = { -+ .exec_op = ath79_exec_mem_op, -+}; -+ - static int ath79_spi_probe(struct platform_device *pdev) - { - struct spi_master *master; -@@ -164,6 +198,7 @@ static int ath79_spi_probe(struct platfo - ret = PTR_ERR(sp->base); - goto err_put_master; - } -+ master->mem_ops = &ath79_mem_ops; - - sp->clk = devm_clk_get(&pdev->dev, "ahb"); - if (IS_ERR(sp->clk)) { diff --git a/target/linux/ath79/patches-5.4/412-spi-ath79-set-number-of-chipselect-lines.patch b/target/linux/ath79/patches-5.4/412-spi-ath79-set-number-of-chipselect-lines.patch deleted file mode 100644 index 614bcbcded..0000000000 --- a/target/linux/ath79/patches-5.4/412-spi-ath79-set-number-of-chipselect-lines.patch +++ /dev/null @@ -1,26 +0,0 @@ -From e2e9f6d9f9bd7449ff113c157b639ce1a24b9d3f Mon Sep 17 00:00:00 2001 -From: David Bauer -Date: Sat, 24 Apr 2021 16:14:48 +0200 -Subject: [PATCH 2/2] spi: ath79: set number of chipselect lines - -All chipsets from AR7100 up to QCA9563 have three dedicated chipselect -lines for the integrated SPI controller. Remove the number of -chipselects from the platform data, as there is no need to manually set -this to a different value. - -Signed-off-by: David Bauer ---- - drivers/spi/spi-ath79.c | 2 +- - include/linux/platform_data/spi-ath79.h | 1 - - 2 files changed, 1 insertion(+), 2 deletions(-) - ---- a/drivers/spi/spi-ath79.c -+++ b/drivers/spi/spi-ath79.c -@@ -187,6 +187,7 @@ static int ath79_spi_probe(struct platfo - master->use_gpio_descriptors = true; - master->bits_per_word_mask = SPI_BPW_RANGE_MASK(1, 32); - master->flags = SPI_MASTER_GPIO_SS; -+ master->num_chipselect = 3; - - sp->bitbang.master = master; - sp->bitbang.chipselect = ath79_spi_chipselect; diff --git a/target/linux/ath79/patches-5.4/420-net-use-downstream-ag71xx.patch b/target/linux/ath79/patches-5.4/420-net-use-downstream-ag71xx.patch deleted file mode 100644 index 17cf3ea957..0000000000 --- a/target/linux/ath79/patches-5.4/420-net-use-downstream-ag71xx.patch +++ /dev/null @@ -1,28 +0,0 @@ ---- a/drivers/net/ethernet/atheros/Kconfig -+++ b/drivers/net/ethernet/atheros/Kconfig -@@ -17,13 +17,7 @@ config NET_VENDOR_ATHEROS - - if NET_VENDOR_ATHEROS - --config AG71XX -- tristate "Atheros AR7XXX/AR9XXX built-in ethernet mac support" -- depends on ATH79 -- select PHYLIB -- help -- If you wish to compile a kernel for AR7XXX/91XXX and enable -- ethernet support, then you should always answer Y to this. -+source "drivers/net/ethernet/atheros/ag71xx/Kconfig" - - config ATL2 - tristate "Atheros L2 Fast Ethernet support" ---- a/drivers/net/ethernet/atheros/Makefile -+++ b/drivers/net/ethernet/atheros/Makefile -@@ -3,7 +3,7 @@ - # Makefile for the Atheros network device drivers. - # - --obj-$(CONFIG_AG71XX) += ag71xx.o -+obj-$(CONFIG_AG71XX) += ag71xx/ - obj-$(CONFIG_ATL1) += atlx/ - obj-$(CONFIG_ATL2) += atlx/ - obj-$(CONFIG_ATL1E) += atl1e/ diff --git a/target/linux/ath79/patches-5.4/425-at803x-allow-sgmii-aneg-override.patch b/target/linux/ath79/patches-5.4/425-at803x-allow-sgmii-aneg-override.patch deleted file mode 100644 index a3016d1b30..0000000000 --- a/target/linux/ath79/patches-5.4/425-at803x-allow-sgmii-aneg-override.patch +++ /dev/null @@ -1,16 +0,0 @@ ---- a/drivers/net/phy/at803x.c -+++ b/drivers/net/phy/at803x.c -@@ -404,6 +404,13 @@ static int at803x_aneg_done(struct phy_d - if (!(phy_read(phydev, AT803X_PSSR) & AT803X_PSSR_MR_AN_COMPLETE)) { - phydev_warn(phydev, "803x_aneg_done: SGMII link is not ok\n"); - aneg_done = 0; -+#ifdef CONFIG_OF_MDIO -+ if (phydev->mdio.dev.of_node && -+ of_property_read_bool(phydev->mdio.dev.of_node, -+ "at803x-override-sgmii-link-check")) { -+ aneg_done = 1; -+ } -+#endif - } - /* switch back to copper page */ - phy_write(phydev, AT803X_REG_CHIP_CONFIG, ccr | AT803X_BT_BX_REG_SEL); diff --git a/target/linux/ath79/patches-5.4/430-drivers-link-spi-before-mtd.patch b/target/linux/ath79/patches-5.4/430-drivers-link-spi-before-mtd.patch deleted file mode 100644 index 4c6558db90..0000000000 --- a/target/linux/ath79/patches-5.4/430-drivers-link-spi-before-mtd.patch +++ /dev/null @@ -1,12 +0,0 @@ ---- a/drivers/Makefile -+++ b/drivers/Makefile -@@ -80,8 +80,8 @@ obj-y += scsi/ - obj-y += nvme/ - obj-$(CONFIG_ATA) += ata/ - obj-$(CONFIG_TARGET_CORE) += target/ --obj-$(CONFIG_MTD) += mtd/ - obj-$(CONFIG_SPI) += spi/ -+obj-$(CONFIG_MTD) += mtd/ - obj-$(CONFIG_SPMI) += spmi/ - obj-$(CONFIG_HSI) += hsi/ - obj-$(CONFIG_SLIMBUS) += slimbus/ diff --git a/target/linux/ath79/patches-5.4/440-mtd-ar934x-nand-driver.patch b/target/linux/ath79/patches-5.4/440-mtd-ar934x-nand-driver.patch deleted file mode 100644 index 8cb47ff703..0000000000 --- a/target/linux/ath79/patches-5.4/440-mtd-ar934x-nand-driver.patch +++ /dev/null @@ -1,25 +0,0 @@ ---- a/drivers/mtd/nand/raw/Kconfig -+++ b/drivers/mtd/nand/raw/Kconfig -@@ -544,4 +544,12 @@ config MTD_NAND_DISKONCHIP_BBTWRITE - load time (assuming you build diskonchip as a module) with the module - parameter "inftl_bbt_write=1". - -+config MTD_NAND_AR934X -+ tristate "Support for NAND controller on Qualcomm Atheros AR934x/QCA955x SoCs" -+ depends on ATH79 || COMPILE_TEST -+ depends on HAS_IOMEM -+ help -+ Enables support for NAND controller on Qualcomm Atheros SoCs. -+ This controller is found on AR934x and QCA955x SoCs. -+ - endif # MTD_RAW_NAND ---- a/drivers/mtd/nand/raw/Makefile -+++ b/drivers/mtd/nand/raw/Makefile -@@ -57,6 +57,7 @@ obj-$(CONFIG_MTD_NAND_MXIC) += mxic_nan - obj-$(CONFIG_MTD_NAND_TEGRA) += tegra_nand.o - obj-$(CONFIG_MTD_NAND_STM32_FMC2) += stm32_fmc2_nand.o - obj-$(CONFIG_MTD_NAND_MESON) += meson_nand.o -+obj-$(CONFIG_MTD_NAND_AR934X) += ar934x_nand.o - - nand-objs := nand_base.o nand_legacy.o nand_bbt.o nand_timings.o nand_ids.o - nand-objs += nand_onfi.o diff --git a/target/linux/ath79/patches-5.4/450-fix-block-protection-clearing.patch b/target/linux/ath79/patches-5.4/450-fix-block-protection-clearing.patch deleted file mode 100644 index 863f9ddd70..0000000000 --- a/target/linux/ath79/patches-5.4/450-fix-block-protection-clearing.patch +++ /dev/null @@ -1,28 +0,0 @@ -From: Nick Hainke -Date: Sun, 25 Oct 2020 00:52:47 +0200 -Subject: [PATCH] ath79: fix block protection clearing - -The block protection bits of macronix do not match the implementation. -The chip has 3 BP bits. Bit 5 is actually the third BP but here the -5th bit is SR_TB. Therefore the patch adds SR_TB to the mask. In the -4.19er kernel the whole register was simply set to 0. - -The wrong implementation did not remove the block protection. This led -to jffs2 errors in the form of: -"jffs2: Newly-erased block contained word 0x19852003 at offset 0x..." -This caused inconsistent memory and other errors. - -Suggested-by: David Bauer -Signed-off-by: Nick Hainke - ---- a/drivers/mtd/spi-nor/spi-nor.c -+++ b/drivers/mtd/spi-nor/spi-nor.c -@@ -1987,7 +1987,7 @@ static int sr2_bit7_quad_enable(struct s - static int spi_nor_clear_sr_bp(struct spi_nor *nor) - { - int ret; -- u8 mask = SR_BP2 | SR_BP1 | SR_BP0; -+ u8 mask = SR_TB | SR_BP2 | SR_BP1 | SR_BP0; - - if (nor->flags & SNOR_F_HAS_4BIT_BP) - mask |= SR_BP3; diff --git a/target/linux/ath79/patches-5.4/470-MIPS-ath79-swizzle-pci-address-for-ar71xx.patch b/target/linux/ath79/patches-5.4/470-MIPS-ath79-swizzle-pci-address-for-ar71xx.patch deleted file mode 100644 index 924faec509..0000000000 --- a/target/linux/ath79/patches-5.4/470-MIPS-ath79-swizzle-pci-address-for-ar71xx.patch +++ /dev/null @@ -1,98 +0,0 @@ ---- /dev/null -+++ b/arch/mips/include/asm/mach-ath79/mangle-port.h -@@ -0,0 +1,37 @@ -+/* -+ * Copyright (C) 2012 Gabor Juhos -+ * -+ * This file was derived from: inlude/asm-mips/mach-generic/mangle-port.h -+ * Copyright (C) 2003, 2004 Ralf Baechle -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 as published -+ * by the Free Software Foundation. -+ */ -+ -+#ifndef __ASM_MACH_ATH79_MANGLE_PORT_H -+#define __ASM_MACH_ATH79_MANGLE_PORT_H -+ -+#ifdef CONFIG_PCI_AR71XX -+extern unsigned long (ath79_pci_swizzle_b)(unsigned long port); -+extern unsigned long (ath79_pci_swizzle_w)(unsigned long port); -+#else -+#define ath79_pci_swizzle_b(port) (port) -+#define ath79_pci_swizzle_w(port) (port) -+#endif -+ -+#define __swizzle_addr_b(port) ath79_pci_swizzle_b(port) -+#define __swizzle_addr_w(port) ath79_pci_swizzle_w(port) -+#define __swizzle_addr_l(port) (port) -+#define __swizzle_addr_q(port) (port) -+ -+# define ioswabb(a, x) (x) -+# define __mem_ioswabb(a, x) (x) -+# define ioswabw(a, x) (x) -+# define __mem_ioswabw(a, x) cpu_to_le16(x) -+# define ioswabl(a, x) (x) -+# define __mem_ioswabl(a, x) cpu_to_le32(x) -+# define ioswabq(a, x) (x) -+# define __mem_ioswabq(a, x) cpu_to_le64(x) -+ -+#endif /* __ASM_MACH_ATH79_MANGLE_PORT_H */ ---- a/arch/mips/pci/pci-ar71xx.c -+++ b/arch/mips/pci/pci-ar71xx.c -@@ -68,6 +68,45 @@ static const u32 ar71xx_pci_read_mask[8] - 0, 0xff, 0xffff, 0, 0xffffffff, 0, 0, 0 - }; - -+static unsigned long (*__ath79_pci_swizzle_b)(unsigned long port); -+static unsigned long (*__ath79_pci_swizzle_w)(unsigned long port); -+ -+static inline bool ar71xx_is_pci_addr(unsigned long port) -+{ -+ unsigned long phys = CPHYSADDR(port); -+ -+ return (phys >= AR71XX_PCI_MEM_BASE && -+ phys < AR71XX_PCI_MEM_BASE + AR71XX_PCI_MEM_SIZE); -+} -+ -+static unsigned long ar71xx_pci_swizzle_b(unsigned long port) -+{ -+ return ar71xx_is_pci_addr(port) ? port ^ 3 : port; -+} -+ -+static unsigned long ar71xx_pci_swizzle_w(unsigned long port) -+{ -+ return ar71xx_is_pci_addr(port) ? port ^ 2 : port; -+} -+ -+unsigned long ath79_pci_swizzle_b(unsigned long port) -+{ -+ if (__ath79_pci_swizzle_b) -+ return __ath79_pci_swizzle_b(port); -+ -+ return port; -+} -+EXPORT_SYMBOL(ath79_pci_swizzle_b); -+ -+unsigned long ath79_pci_swizzle_w(unsigned long port) -+{ -+ if (__ath79_pci_swizzle_w) -+ return __ath79_pci_swizzle_w(port); -+ -+ return port; -+} -+EXPORT_SYMBOL(ath79_pci_swizzle_w); -+ - static inline u32 ar71xx_pci_get_ble(int where, int size, int local) - { - u32 t; -@@ -276,6 +315,9 @@ static int ar71xx_pci_probe(struct platf - - register_pci_controller(&apc->pci_ctrl); - -+ __ath79_pci_swizzle_b = ar71xx_pci_swizzle_b; -+ __ath79_pci_swizzle_w = ar71xx_pci_swizzle_w; -+ - return 0; - } - diff --git a/target/linux/ath79/patches-5.4/900-mdio_bitbang_ignore_ta_value.patch b/target/linux/ath79/patches-5.4/900-mdio_bitbang_ignore_ta_value.patch deleted file mode 100644 index 148d843518..0000000000 --- a/target/linux/ath79/patches-5.4/900-mdio_bitbang_ignore_ta_value.patch +++ /dev/null @@ -1,32 +0,0 @@ ---- a/drivers/net/phy/mdio-bitbang.c -+++ b/drivers/net/phy/mdio-bitbang.c -@@ -152,7 +152,7 @@ static int mdiobb_cmd_addr(struct mdiobb - static int mdiobb_read(struct mii_bus *bus, int phy, int reg) - { - struct mdiobb_ctrl *ctrl = bus->priv; -- int ret, i; -+ int ret; - - if (reg & MII_ADDR_C45) { - reg = mdiobb_cmd_addr(ctrl, phy, reg); -@@ -162,19 +162,7 @@ static int mdiobb_read(struct mii_bus *b - - ctrl->ops->set_mdio_dir(ctrl, 0); - -- /* check the turnaround bit: the PHY should be driving it to zero, if this -- * PHY is listed in phy_ignore_ta_mask as having broken TA, skip that -- */ -- if (mdiobb_get_bit(ctrl) != 0 && -- !(bus->phy_ignore_ta_mask & (1 << phy))) { -- /* PHY didn't drive TA low -- flush any bits it -- * may be trying to send. -- */ -- for (i = 0; i < 32; i++) -- mdiobb_get_bit(ctrl); -- -- return 0xffff; -- } -+ mdiobb_get_bit(ctrl); - - ret = mdiobb_get_num(ctrl, 16); - mdiobb_get_bit(ctrl); diff --git a/target/linux/ath79/patches-5.4/901-phy-mdio-bitbang-prevent-rescheduling-during-command.patch b/target/linux/ath79/patches-5.4/901-phy-mdio-bitbang-prevent-rescheduling-during-command.patch deleted file mode 100644 index 8c71e5b5ca..0000000000 --- a/target/linux/ath79/patches-5.4/901-phy-mdio-bitbang-prevent-rescheduling-during-command.patch +++ /dev/null @@ -1,61 +0,0 @@ -From 66e584435ac0de6e0abeb6d7166fe4fe25d6bb73 Mon Sep 17 00:00:00 2001 -From: Jonas Gorski -Date: Tue, 16 Jun 2015 13:15:08 +0200 -Subject: [PATCH] phy/mdio-bitbang: prevent rescheduling during command - -It seems some phys have some maximum timings for accessing the MDIO line, -resulting in bit errors under cpu stress. Prevent this from happening by -disabling interrupts when sending commands. - -Signed-off-by: Jonas Gorski ---- - drivers/net/phy/mdio-bitbang.c | 9 +++++++++ - 1 file changed, 9 insertions(+) - ---- a/drivers/net/phy/mdio-bitbang.c -+++ b/drivers/net/phy/mdio-bitbang.c -@@ -14,6 +14,7 @@ - * Vitaly Bordug - */ - -+#include - #include - #include - #include -@@ -153,7 +154,9 @@ static int mdiobb_read(struct mii_bus *b - { - struct mdiobb_ctrl *ctrl = bus->priv; - int ret; -+ unsigned long flags; - -+ local_irq_save(flags); - if (reg & MII_ADDR_C45) { - reg = mdiobb_cmd_addr(ctrl, phy, reg); - mdiobb_cmd(ctrl, MDIO_C45_READ, phy, reg); -@@ -166,13 +169,17 @@ static int mdiobb_read(struct mii_bus *b - - ret = mdiobb_get_num(ctrl, 16); - mdiobb_get_bit(ctrl); -+ local_irq_restore(flags); -+ - return ret; - } - - static int mdiobb_write(struct mii_bus *bus, int phy, int reg, u16 val) - { - struct mdiobb_ctrl *ctrl = bus->priv; -+ unsigned long flags; - -+ local_irq_save(flags); - if (reg & MII_ADDR_C45) { - reg = mdiobb_cmd_addr(ctrl, phy, reg); - mdiobb_cmd(ctrl, MDIO_C45_WRITE, phy, reg); -@@ -187,6 +194,8 @@ static int mdiobb_write(struct mii_bus * - - ctrl->ops->set_mdio_dir(ctrl, 0); - mdiobb_get_bit(ctrl); -+ local_irq_restore(flags); -+ - return 0; - } - diff --git a/target/linux/ath79/patches-5.4/910-unaligned_access_hacks.patch b/target/linux/ath79/patches-5.4/910-unaligned_access_hacks.patch deleted file mode 100644 index 26c4a7b213..0000000000 --- a/target/linux/ath79/patches-5.4/910-unaligned_access_hacks.patch +++ /dev/null @@ -1,869 +0,0 @@ ---- a/arch/mips/include/asm/checksum.h -+++ b/arch/mips/include/asm/checksum.h -@@ -134,26 +134,30 @@ static inline __sum16 ip_fast_csum(const - const unsigned int *stop = word + ihl; - unsigned int csum; - int carry; -+ unsigned int w; - -- csum = word[0]; -- csum += word[1]; -- carry = (csum < word[1]); -+ csum = net_hdr_word(word++); -+ -+ w = net_hdr_word(word++); -+ csum += w; -+ carry = (csum < w); - csum += carry; - -- csum += word[2]; -- carry = (csum < word[2]); -+ w = net_hdr_word(word++); -+ csum += w; -+ carry = (csum < w); - csum += carry; - -- csum += word[3]; -- carry = (csum < word[3]); -+ w = net_hdr_word(word++); -+ csum += w; -+ carry = (csum < w); - csum += carry; - -- word += 4; - do { -- csum += *word; -- carry = (csum < *word); -+ w = net_hdr_word(word++); -+ csum += w; -+ carry = (csum < w); - csum += carry; -- word++; - } while (word != stop); - - return csum_fold(csum); -@@ -214,73 +218,6 @@ static inline __sum16 ip_compute_csum(co - return csum_fold(csum_partial(buff, len, 0)); - } - --#define _HAVE_ARCH_IPV6_CSUM --static __inline__ __sum16 csum_ipv6_magic(const struct in6_addr *saddr, -- const struct in6_addr *daddr, -- __u32 len, __u8 proto, -- __wsum sum) --{ -- __wsum tmp; -- -- __asm__( -- " .set push # csum_ipv6_magic\n" -- " .set noreorder \n" -- " .set noat \n" -- " addu %0, %5 # proto (long in network byte order)\n" -- " sltu $1, %0, %5 \n" -- " addu %0, $1 \n" -- -- " addu %0, %6 # csum\n" -- " sltu $1, %0, %6 \n" -- " lw %1, 0(%2) # four words source address\n" -- " addu %0, $1 \n" -- " addu %0, %1 \n" -- " sltu $1, %0, %1 \n" -- -- " lw %1, 4(%2) \n" -- " addu %0, $1 \n" -- " addu %0, %1 \n" -- " sltu $1, %0, %1 \n" -- -- " lw %1, 8(%2) \n" -- " addu %0, $1 \n" -- " addu %0, %1 \n" -- " sltu $1, %0, %1 \n" -- -- " lw %1, 12(%2) \n" -- " addu %0, $1 \n" -- " addu %0, %1 \n" -- " sltu $1, %0, %1 \n" -- -- " lw %1, 0(%3) \n" -- " addu %0, $1 \n" -- " addu %0, %1 \n" -- " sltu $1, %0, %1 \n" -- -- " lw %1, 4(%3) \n" -- " addu %0, $1 \n" -- " addu %0, %1 \n" -- " sltu $1, %0, %1 \n" -- -- " lw %1, 8(%3) \n" -- " addu %0, $1 \n" -- " addu %0, %1 \n" -- " sltu $1, %0, %1 \n" -- -- " lw %1, 12(%3) \n" -- " addu %0, $1 \n" -- " addu %0, %1 \n" -- " sltu $1, %0, %1 \n" -- -- " addu %0, $1 # Add final carry\n" -- " .set pop" -- : "=&r" (sum), "=&r" (tmp) -- : "r" (saddr), "r" (daddr), -- "0" (htonl(len)), "r" (htonl(proto)), "r" (sum)); -- -- return csum_fold(sum); --} -- - #include - #endif /* CONFIG_GENERIC_CSUM */ - ---- a/include/uapi/linux/ip.h -+++ b/include/uapi/linux/ip.h -@@ -103,7 +103,7 @@ struct iphdr { - __be32 saddr; - __be32 daddr; - /*The options start here. */ --}; -+} __attribute__((packed, aligned(2))); - - - struct ip_auth_hdr { ---- a/include/uapi/linux/ipv6.h -+++ b/include/uapi/linux/ipv6.h -@@ -131,7 +131,7 @@ struct ipv6hdr { - - struct in6_addr saddr; - struct in6_addr daddr; --}; -+} __attribute__((packed, aligned(2))); - - - /* index values for the variables in ipv6_devconf */ ---- a/include/uapi/linux/tcp.h -+++ b/include/uapi/linux/tcp.h -@@ -55,7 +55,7 @@ struct tcphdr { - __be16 window; - __sum16 check; - __be16 urg_ptr; --}; -+} __attribute__((packed, aligned(2))); - - /* - * The union cast uses a gcc extension to avoid aliasing problems -@@ -65,7 +65,7 @@ struct tcphdr { - union tcp_word_hdr { - struct tcphdr hdr; - __be32 words[5]; --}; -+} __attribute__((packed, aligned(2))); - - #define tcp_flag_word(tp) ( ((union tcp_word_hdr *)(tp))->words [3]) - ---- a/include/uapi/linux/udp.h -+++ b/include/uapi/linux/udp.h -@@ -25,7 +25,7 @@ struct udphdr { - __be16 dest; - __be16 len; - __sum16 check; --}; -+} __attribute__((packed, aligned(2))); - - /* UDP socket options */ - #define UDP_CORK 1 /* Never send partially complete segments */ ---- a/net/netfilter/nf_conntrack_core.c -+++ b/net/netfilter/nf_conntrack_core.c -@@ -266,8 +266,8 @@ nf_ct_get_tuple(const struct sk_buff *sk - - switch (l3num) { - case NFPROTO_IPV4: -- tuple->src.u3.ip = ap[0]; -- tuple->dst.u3.ip = ap[1]; -+ tuple->src.u3.ip = net_hdr_word(ap++); -+ tuple->dst.u3.ip = net_hdr_word(ap); - break; - case NFPROTO_IPV6: - memcpy(tuple->src.u3.ip6, ap, sizeof(tuple->src.u3.ip6)); ---- a/include/uapi/linux/icmp.h -+++ b/include/uapi/linux/icmp.h -@@ -82,7 +82,7 @@ struct icmphdr { - } frag; - __u8 reserved[4]; - } un; --}; -+} __attribute__((packed, aligned(2))); - - - /* ---- a/include/uapi/linux/in6.h -+++ b/include/uapi/linux/in6.h -@@ -43,7 +43,7 @@ struct in6_addr { - #define s6_addr16 in6_u.u6_addr16 - #define s6_addr32 in6_u.u6_addr32 - #endif --}; -+} __attribute__((packed, aligned(2))); - #endif /* __UAPI_DEF_IN6_ADDR */ - - #if __UAPI_DEF_SOCKADDR_IN6 ---- a/net/ipv6/tcp_ipv6.c -+++ b/net/ipv6/tcp_ipv6.c -@@ -35,6 +35,7 @@ - #include - #include - #include -+#include - #include - #include - #include -@@ -864,10 +865,10 @@ static void tcp_v6_send_response(const s - topt = (__be32 *)(t1 + 1); - - if (tsecr) { -- *topt++ = htonl((TCPOPT_NOP << 24) | (TCPOPT_NOP << 16) | -- (TCPOPT_TIMESTAMP << 8) | TCPOLEN_TIMESTAMP); -- *topt++ = htonl(tsval); -- *topt++ = htonl(tsecr); -+ put_unaligned_be32((TCPOPT_NOP << 24) | (TCPOPT_NOP << 16) | -+ (TCPOPT_TIMESTAMP << 8) | TCPOLEN_TIMESTAMP, topt++); -+ put_unaligned_be32(tsval, topt++); -+ put_unaligned_be32(tsecr, topt++); - } - - #ifdef CONFIG_TCP_MD5SIG ---- a/include/linux/ipv6.h -+++ b/include/linux/ipv6.h -@@ -6,6 +6,7 @@ - - #define ipv6_optlen(p) (((p)->hdrlen+1) << 3) - #define ipv6_authlen(p) (((p)->hdrlen+2) << 2) -+ - /* - * This structure contains configuration options per IPv6 link. - */ ---- a/net/ipv6/datagram.c -+++ b/net/ipv6/datagram.c -@@ -476,7 +476,7 @@ int ipv6_recv_error(struct sock *sk, str - ipv6_iface_scope_id(&sin->sin6_addr, - IP6CB(skb)->iif); - } else { -- ipv6_addr_set_v4mapped(*(__be32 *)(nh + serr->addr_offset), -+ ipv6_addr_set_v4mapped(net_hdr_word(nh + serr->addr_offset), - &sin->sin6_addr); - sin->sin6_scope_id = 0; - } -@@ -830,12 +830,12 @@ int ip6_datagram_send_ctl(struct net *ne - } - - if (fl6->flowlabel&IPV6_FLOWINFO_MASK) { -- if ((fl6->flowlabel^*(__be32 *)CMSG_DATA(cmsg))&~IPV6_FLOWINFO_MASK) { -+ if ((fl6->flowlabel^net_hdr_word(CMSG_DATA(cmsg)))&~IPV6_FLOWINFO_MASK) { - err = -EINVAL; - goto exit_f; - } - } -- fl6->flowlabel = IPV6_FLOWINFO_MASK & *(__be32 *)CMSG_DATA(cmsg); -+ fl6->flowlabel = IPV6_FLOWINFO_MASK & net_hdr_word(CMSG_DATA(cmsg)); - break; - - case IPV6_2292HOPOPTS: ---- a/net/ipv6/exthdrs.c -+++ b/net/ipv6/exthdrs.c -@@ -751,7 +751,7 @@ static bool ipv6_hop_jumbo(struct sk_buf - goto drop; - } - -- pkt_len = ntohl(*(__be32 *)(nh + optoff + 2)); -+ pkt_len = ntohl(net_hdr_word(nh + optoff + 2)); - if (pkt_len <= IPV6_MAXPLEN) { - __IP6_INC_STATS(net, idev, IPSTATS_MIB_INHDRERRORS); - icmpv6_param_prob(skb, ICMPV6_HDR_FIELD, optoff+2); ---- a/include/linux/types.h -+++ b/include/linux/types.h -@@ -225,5 +225,11 @@ struct callback_head { - typedef void (*rcu_callback_t)(struct rcu_head *head); - typedef void (*call_rcu_func_t)(struct rcu_head *head, rcu_callback_t func); - -+struct net_hdr_word { -+ u32 words[1]; -+} __attribute__((packed, aligned(2))); -+ -+#define net_hdr_word(_p) (((struct net_hdr_word *) (_p))->words[0]) -+ - #endif /* __ASSEMBLY__ */ - #endif /* _LINUX_TYPES_H */ ---- a/net/ipv4/af_inet.c -+++ b/net/ipv4/af_inet.c -@@ -1441,8 +1441,8 @@ struct sk_buff *inet_gro_receive(struct - if (unlikely(ip_fast_csum((u8 *)iph, 5))) - goto out_unlock; - -- id = ntohl(*(__be32 *)&iph->id); -- flush = (u16)((ntohl(*(__be32 *)iph) ^ skb_gro_len(skb)) | (id & ~IP_DF)); -+ id = ntohl(net_hdr_word(&iph->id)); -+ flush = (u16)((ntohl(net_hdr_word(iph)) ^ skb_gro_len(skb)) | (id & ~IP_DF)); - id >>= 16; - - list_for_each_entry(p, head, list) { ---- a/net/ipv4/tcp_output.c -+++ b/net/ipv4/tcp_output.c -@@ -460,48 +460,53 @@ static void tcp_options_write(__be32 *pt - u16 options = opts->options; /* mungable copy */ - - if (unlikely(OPTION_MD5 & options)) { -- *ptr++ = htonl((TCPOPT_NOP << 24) | (TCPOPT_NOP << 16) | -- (TCPOPT_MD5SIG << 8) | TCPOLEN_MD5SIG); -+ net_hdr_word(ptr++) = -+ htonl((TCPOPT_NOP << 24) | (TCPOPT_NOP << 16) | -+ (TCPOPT_MD5SIG << 8) | TCPOLEN_MD5SIG); - /* overload cookie hash location */ - opts->hash_location = (__u8 *)ptr; - ptr += 4; - } - - if (unlikely(opts->mss)) { -- *ptr++ = htonl((TCPOPT_MSS << 24) | -- (TCPOLEN_MSS << 16) | -- opts->mss); -+ net_hdr_word(ptr++) = -+ htonl((TCPOPT_MSS << 24) | (TCPOLEN_MSS << 16) | -+ opts->mss); - } - - if (likely(OPTION_TS & options)) { - if (unlikely(OPTION_SACK_ADVERTISE & options)) { -- *ptr++ = htonl((TCPOPT_SACK_PERM << 24) | -- (TCPOLEN_SACK_PERM << 16) | -- (TCPOPT_TIMESTAMP << 8) | -- TCPOLEN_TIMESTAMP); -+ net_hdr_word(ptr++) = -+ htonl((TCPOPT_SACK_PERM << 24) | -+ (TCPOLEN_SACK_PERM << 16) | -+ (TCPOPT_TIMESTAMP << 8) | -+ TCPOLEN_TIMESTAMP); - options &= ~OPTION_SACK_ADVERTISE; - } else { -- *ptr++ = htonl((TCPOPT_NOP << 24) | -- (TCPOPT_NOP << 16) | -- (TCPOPT_TIMESTAMP << 8) | -- TCPOLEN_TIMESTAMP); -+ net_hdr_word(ptr++) = -+ htonl((TCPOPT_NOP << 24) | -+ (TCPOPT_NOP << 16) | -+ (TCPOPT_TIMESTAMP << 8) | -+ TCPOLEN_TIMESTAMP); - } -- *ptr++ = htonl(opts->tsval); -- *ptr++ = htonl(opts->tsecr); -+ net_hdr_word(ptr++) = htonl(opts->tsval); -+ net_hdr_word(ptr++) = htonl(opts->tsecr); - } - - if (unlikely(OPTION_SACK_ADVERTISE & options)) { -- *ptr++ = htonl((TCPOPT_NOP << 24) | -- (TCPOPT_NOP << 16) | -- (TCPOPT_SACK_PERM << 8) | -- TCPOLEN_SACK_PERM); -+ net_hdr_word(ptr++) = -+ htonl((TCPOPT_NOP << 24) | -+ (TCPOPT_NOP << 16) | -+ (TCPOPT_SACK_PERM << 8) | -+ TCPOLEN_SACK_PERM); - } - - if (unlikely(OPTION_WSCALE & options)) { -- *ptr++ = htonl((TCPOPT_NOP << 24) | -- (TCPOPT_WINDOW << 16) | -- (TCPOLEN_WINDOW << 8) | -- opts->ws); -+ net_hdr_word(ptr++) = -+ htonl((TCPOPT_NOP << 24) | -+ (TCPOPT_WINDOW << 16) | -+ (TCPOLEN_WINDOW << 8) | -+ opts->ws); - } - - if (unlikely(opts->num_sack_blocks)) { -@@ -509,16 +514,17 @@ static void tcp_options_write(__be32 *pt - tp->duplicate_sack : tp->selective_acks; - int this_sack; - -- *ptr++ = htonl((TCPOPT_NOP << 24) | -- (TCPOPT_NOP << 16) | -- (TCPOPT_SACK << 8) | -- (TCPOLEN_SACK_BASE + (opts->num_sack_blocks * -+ net_hdr_word(ptr++) = -+ htonl((TCPOPT_NOP << 24) | -+ (TCPOPT_NOP << 16) | -+ (TCPOPT_SACK << 8) | -+ (TCPOLEN_SACK_BASE + (opts->num_sack_blocks * - TCPOLEN_SACK_PERBLOCK))); - - for (this_sack = 0; this_sack < opts->num_sack_blocks; - ++this_sack) { -- *ptr++ = htonl(sp[this_sack].start_seq); -- *ptr++ = htonl(sp[this_sack].end_seq); -+ net_hdr_word(ptr++) = htonl(sp[this_sack].start_seq); -+ net_hdr_word(ptr++) = htonl(sp[this_sack].end_seq); - } - - tp->rx_opt.dsack = 0; -@@ -531,13 +537,14 @@ static void tcp_options_write(__be32 *pt - - if (foc->exp) { - len = TCPOLEN_EXP_FASTOPEN_BASE + foc->len; -- *ptr = htonl((TCPOPT_EXP << 24) | (len << 16) | -+ net_hdr_word(ptr) = -+ htonl((TCPOPT_EXP << 24) | (len << 16) | - TCPOPT_FASTOPEN_MAGIC); - p += TCPOLEN_EXP_FASTOPEN_BASE; - } else { - len = TCPOLEN_FASTOPEN_BASE + foc->len; -- *p++ = TCPOPT_FASTOPEN; -- *p++ = len; -+ net_hdr_word(p++) = TCPOPT_FASTOPEN; -+ net_hdr_word(p++) = len; - } - - memcpy(p, foc->val, foc->len); ---- a/include/uapi/linux/igmp.h -+++ b/include/uapi/linux/igmp.h -@@ -33,7 +33,7 @@ struct igmphdr { - __u8 code; /* For newer IGMP */ - __sum16 csum; - __be32 group; --}; -+} __attribute__((packed, aligned(2))); - - /* V3 group record types [grec_type] */ - #define IGMPV3_MODE_IS_INCLUDE 1 -@@ -49,7 +49,7 @@ struct igmpv3_grec { - __be16 grec_nsrcs; - __be32 grec_mca; - __be32 grec_src[0]; --}; -+} __attribute__((packed, aligned(2))); - - struct igmpv3_report { - __u8 type; -@@ -58,7 +58,7 @@ struct igmpv3_report { - __be16 resv2; - __be16 ngrec; - struct igmpv3_grec grec[0]; --}; -+} __attribute__((packed, aligned(2))); - - struct igmpv3_query { - __u8 type; -@@ -79,7 +79,7 @@ struct igmpv3_query { - __u8 qqic; - __be16 nsrcs; - __be32 srcs[0]; --}; -+} __attribute__((packed, aligned(2))); - - #define IGMP_HOST_MEMBERSHIP_QUERY 0x11 /* From RFC1112 */ - #define IGMP_HOST_MEMBERSHIP_REPORT 0x12 /* Ditto */ ---- a/net/core/flow_dissector.c -+++ b/net/core/flow_dissector.c -@@ -212,7 +212,7 @@ __be32 __skb_flow_get_ports(const struct - ports = __skb_header_pointer(skb, thoff + poff, - sizeof(_ports), data, hlen, &_ports); - if (ports) -- return *ports; -+ return (__be32)net_hdr_word(ports); - } - - return 0; ---- a/include/uapi/linux/icmpv6.h -+++ b/include/uapi/linux/icmpv6.h -@@ -77,7 +77,7 @@ struct icmp6hdr { - #define icmp6_addrconf_other icmp6_dataun.u_nd_ra.other - #define icmp6_rt_lifetime icmp6_dataun.u_nd_ra.rt_lifetime - #define icmp6_router_pref icmp6_dataun.u_nd_ra.router_pref --}; -+} __attribute__((packed, aligned(2))); - - - #define ICMPV6_ROUTER_PREF_LOW 0x3 ---- a/include/net/ndisc.h -+++ b/include/net/ndisc.h -@@ -92,7 +92,7 @@ struct ra_msg { - struct icmp6hdr icmph; - __be32 reachable_time; - __be32 retrans_timer; --}; -+} __attribute__((packed, aligned(2))); - - struct rd_msg { - struct icmp6hdr icmph; -@@ -371,10 +371,10 @@ static inline u32 ndisc_hashfn(const voi - { - const u32 *p32 = pkey; - -- return (((p32[0] ^ hash32_ptr(dev)) * hash_rnd[0]) + -- (p32[1] * hash_rnd[1]) + -- (p32[2] * hash_rnd[2]) + -- (p32[3] * hash_rnd[3])); -+ return (((net_hdr_word(&p32[0]) ^ hash32_ptr(dev)) * hash_rnd[0]) + -+ (net_hdr_word(&p32[1]) * hash_rnd[1]) + -+ (net_hdr_word(&p32[2]) * hash_rnd[2]) + -+ (net_hdr_word(&p32[3]) * hash_rnd[3])); - } - - static inline struct neighbour *__ipv6_neigh_lookup_noref(struct net_device *dev, const void *pkey) ---- a/net/sched/cls_u32.c -+++ b/net/sched/cls_u32.c -@@ -155,7 +155,7 @@ next_knode: - data = skb_header_pointer(skb, toff, 4, &hdata); - if (!data) - goto out; -- if ((*data ^ key->val) & key->mask) { -+ if ((net_hdr_word(data) ^ key->val) & key->mask) { - n = rcu_dereference_bh(n->next); - goto next_knode; - } -@@ -206,8 +206,8 @@ check_terminal: - &hdata); - if (!data) - goto out; -- sel = ht->divisor & u32_hash_fold(*data, &n->sel, -- n->fshift); -+ sel = ht->divisor & u32_hash_fold(net_hdr_word(data), -+ &n->sel, n->fshift); - } - if (!(n->sel.flags & (TC_U32_VAROFFSET | TC_U32_OFFSET | TC_U32_EAT))) - goto next_ht; ---- a/net/ipv6/ip6_offload.c -+++ b/net/ipv6/ip6_offload.c -@@ -240,7 +240,7 @@ INDIRECT_CALLABLE_SCOPE struct sk_buff * - continue; - - iph2 = (struct ipv6hdr *)(p->data + off); -- first_word = *(__be32 *)iph ^ *(__be32 *)iph2; -+ first_word = net_hdr_word(iph) ^ net_hdr_word(iph2); - - /* All fields must match except length and Traffic Class. - * XXX skbs on the gro_list have all been parsed and pulled ---- a/include/net/addrconf.h -+++ b/include/net/addrconf.h -@@ -47,7 +47,7 @@ struct prefix_info { - __be32 reserved2; - - struct in6_addr prefix; --}; -+} __attribute__((packed, aligned(2))); - - #include - #include ---- a/include/net/inet_ecn.h -+++ b/include/net/inet_ecn.h -@@ -140,9 +140,9 @@ static inline int IP6_ECN_set_ce(struct - if (INET_ECN_is_not_ect(ipv6_get_dsfield(iph))) - return 0; - -- from = *(__be32 *)iph; -+ from = net_hdr_word(iph); - to = from | htonl(INET_ECN_CE << 20); -- *(__be32 *)iph = to; -+ net_hdr_word(iph) = to; - if (skb->ip_summed == CHECKSUM_COMPLETE) - skb->csum = csum_add(csum_sub(skb->csum, (__force __wsum)from), - (__force __wsum)to); ---- a/include/net/ipv6.h -+++ b/include/net/ipv6.h -@@ -146,7 +146,7 @@ struct frag_hdr { - __u8 reserved; - __be16 frag_off; - __be32 identification; --}; -+} __attribute__((packed, aligned(2))); - - #define IP6_MF 0x0001 - #define IP6_OFFSET 0xFFF8 -@@ -557,8 +557,8 @@ static inline void __ipv6_addr_set_half( - } - #endif - #endif -- addr[0] = wh; -- addr[1] = wl; -+ net_hdr_word(&addr[0]) = wh; -+ net_hdr_word(&addr[1]) = wl; - } - - static inline void ipv6_addr_set(struct in6_addr *addr, -@@ -617,6 +617,8 @@ static inline bool ipv6_prefix_equal(con - const __be32 *a1 = addr1->s6_addr32; - const __be32 *a2 = addr2->s6_addr32; - unsigned int pdw, pbi; -+ /* Used for last <32-bit fraction of prefix */ -+ u32 pbia1, pbia2; - - /* check complete u32 in prefix */ - pdw = prefixlen >> 5; -@@ -625,7 +627,9 @@ static inline bool ipv6_prefix_equal(con - - /* check incomplete u32 in prefix */ - pbi = prefixlen & 0x1f; -- if (pbi && ((a1[pdw] ^ a2[pdw]) & htonl((0xffffffff) << (32 - pbi)))) -+ pbia1 = net_hdr_word(&a1[pdw]); -+ pbia2 = net_hdr_word(&a2[pdw]); -+ if (pbi && ((pbia1 ^ pbia2) & htonl((0xffffffff) << (32 - pbi)))) - return false; - - return true; -@@ -741,13 +745,13 @@ static inline void ipv6_addr_set_v4mappe - */ - static inline int __ipv6_addr_diff32(const void *token1, const void *token2, int addrlen) - { -- const __be32 *a1 = token1, *a2 = token2; -+ const struct in6_addr *a1 = token1, *a2 = token2; - int i; - - addrlen >>= 2; - - for (i = 0; i < addrlen; i++) { -- __be32 xb = a1[i] ^ a2[i]; -+ __be32 xb = a1->s6_addr32[i] ^ a2->s6_addr32[i]; - if (xb) - return i * 32 + 31 - __fls(ntohl(xb)); - } -@@ -934,17 +938,18 @@ static inline int ip6_multipath_hash_pol - static inline void ip6_flow_hdr(struct ipv6hdr *hdr, unsigned int tclass, - __be32 flowlabel) - { -- *(__be32 *)hdr = htonl(0x60000000 | (tclass << 20)) | flowlabel; -+ net_hdr_word((__be32 *)hdr) = -+ htonl(0x60000000 | (tclass << 20)) | flowlabel; - } - - static inline __be32 ip6_flowinfo(const struct ipv6hdr *hdr) - { -- return *(__be32 *)hdr & IPV6_FLOWINFO_MASK; -+ return net_hdr_word((__be32 *)hdr) & IPV6_FLOWINFO_MASK; - } - - static inline __be32 ip6_flowlabel(const struct ipv6hdr *hdr) - { -- return *(__be32 *)hdr & IPV6_FLOWLABEL_MASK; -+ return net_hdr_word((__be32 *)hdr) & IPV6_FLOWLABEL_MASK; - } - - static inline u8 ip6_tclass(__be32 flowinfo) ---- a/include/net/secure_seq.h -+++ b/include/net/secure_seq.h -@@ -3,6 +3,7 @@ - #define _NET_SECURE_SEQ - - #include -+#include - - u32 secure_ipv4_port_ephemeral(__be32 saddr, __be32 daddr, __be16 dport); - u32 secure_ipv6_port_ephemeral(const __be32 *saddr, const __be32 *daddr, ---- a/include/uapi/linux/in.h -+++ b/include/uapi/linux/in.h -@@ -84,7 +84,7 @@ enum { - /* Internet address. */ - struct in_addr { - __be32 s_addr; --}; -+} __attribute__((packed, aligned(2))); - #endif - - #define IP_TOS 1 ---- a/net/ipv6/ip6_fib.c -+++ b/net/ipv6/ip6_fib.c -@@ -140,7 +140,7 @@ static __be32 addr_bit_set(const void *t - * See include/asm-generic/bitops/le.h. - */ - return (__force __be32)(1 << ((~fn_bit ^ BITOP_BE32_SWIZZLE) & 0x1f)) & -- addr[fn_bit >> 5]; -+ net_hdr_word(&addr[fn_bit >> 5]); - } - - struct fib6_info *fib6_info_alloc(gfp_t gfp_flags, bool with_fib6_nh) ---- a/net/netfilter/nf_conntrack_proto_tcp.c -+++ b/net/netfilter/nf_conntrack_proto_tcp.c -@@ -415,7 +415,7 @@ static void tcp_sack(const struct sk_buf - - /* Fast path for timestamp-only option */ - if (length == TCPOLEN_TSTAMP_ALIGNED -- && *(__be32 *)ptr == htonl((TCPOPT_NOP << 24) -+ && net_hdr_word(ptr) == htonl((TCPOPT_NOP << 24) - | (TCPOPT_NOP << 16) - | (TCPOPT_TIMESTAMP << 8) - | TCPOLEN_TIMESTAMP)) ---- a/net/xfrm/xfrm_input.c -+++ b/net/xfrm/xfrm_input.c -@@ -162,8 +162,8 @@ int xfrm_parse_spi(struct sk_buff *skb, - if (!pskb_may_pull(skb, hlen)) - return -EINVAL; - -- *spi = *(__be32 *)(skb_transport_header(skb) + offset); -- *seq = *(__be32 *)(skb_transport_header(skb) + offset_seq); -+ *spi = net_hdr_word(skb_transport_header(skb) + offset); -+ *seq = net_hdr_word(skb_transport_header(skb) + offset_seq); - return 0; - } - EXPORT_SYMBOL(xfrm_parse_spi); ---- a/net/ipv4/tcp_input.c -+++ b/net/ipv4/tcp_input.c -@@ -3976,14 +3976,16 @@ static bool tcp_parse_aligned_timestamp( - { - const __be32 *ptr = (const __be32 *)(th + 1); - -- if (*ptr == htonl((TCPOPT_NOP << 24) | (TCPOPT_NOP << 16) -- | (TCPOPT_TIMESTAMP << 8) | TCPOLEN_TIMESTAMP)) { -+ if (net_hdr_word(ptr) == -+ htonl((TCPOPT_NOP << 24) | (TCPOPT_NOP << 16) | -+ (TCPOPT_TIMESTAMP << 8) | TCPOLEN_TIMESTAMP)) { - tp->rx_opt.saw_tstamp = 1; - ++ptr; -- tp->rx_opt.rcv_tsval = ntohl(*ptr); -+ tp->rx_opt.rcv_tsval = get_unaligned_be32(ptr); - ++ptr; -- if (*ptr) -- tp->rx_opt.rcv_tsecr = ntohl(*ptr) - tp->tsoffset; -+ if (net_hdr_word(ptr)) -+ tp->rx_opt.rcv_tsecr = get_unaligned_be32(ptr) - -+ tp->tsoffset; - else - tp->rx_opt.rcv_tsecr = 0; - return true; ---- a/include/uapi/linux/if_pppox.h -+++ b/include/uapi/linux/if_pppox.h -@@ -51,6 +51,7 @@ struct pppoe_addr { - */ - struct pptp_addr { - __u16 call_id; -+ __u16 pad; - struct in_addr sin_addr; - }; - ---- a/net/ipv6/netfilter/nf_log_ipv6.c -+++ b/net/ipv6/netfilter/nf_log_ipv6.c -@@ -63,9 +63,9 @@ static void dump_ipv6_packet(struct net - /* Max length: 44 "LEN=65535 TC=255 HOPLIMIT=255 FLOWLBL=FFFFF " */ - nf_log_buf_add(m, "LEN=%zu TC=%u HOPLIMIT=%u FLOWLBL=%u ", - ntohs(ih->payload_len) + sizeof(struct ipv6hdr), -- (ntohl(*(__be32 *)ih) & 0x0ff00000) >> 20, -+ (ntohl(net_hdr_word(ih)) & 0x0ff00000) >> 20, - ih->hop_limit, -- (ntohl(*(__be32 *)ih) & 0x000fffff)); -+ (ntohl(net_hdr_word(ih)) & 0x000fffff)); - - fragment = 0; - ptr = ip6hoff + sizeof(struct ipv6hdr); ---- a/include/net/neighbour.h -+++ b/include/net/neighbour.h -@@ -275,8 +275,10 @@ static inline bool neigh_key_eq128(const - const u32 *n32 = (const u32 *)n->primary_key; - const u32 *p32 = pkey; - -- return ((n32[0] ^ p32[0]) | (n32[1] ^ p32[1]) | -- (n32[2] ^ p32[2]) | (n32[3] ^ p32[3])) == 0; -+ return ((n32[0] ^ net_hdr_word(&p32[0])) | -+ (n32[1] ^ net_hdr_word(&p32[1])) | -+ (n32[2] ^ net_hdr_word(&p32[2])) | -+ (n32[3] ^ net_hdr_word(&p32[3]))) == 0; - } - - static inline struct neighbour *___neigh_lookup_noref( ---- a/include/uapi/linux/netfilter_arp/arp_tables.h -+++ b/include/uapi/linux/netfilter_arp/arp_tables.h -@@ -70,7 +70,7 @@ struct arpt_arp { - __u8 flags; - /* Inverse flags */ - __u16 invflags; --}; -+} __attribute__((aligned(4))); - - /* Values for "flag" field in struct arpt_ip (general arp structure). - * No flags defined yet. ---- a/net/core/utils.c -+++ b/net/core/utils.c -@@ -460,8 +460,14 @@ void inet_proto_csum_replace16(__sum16 * - bool pseudohdr) - { - __be32 diff[] = { -- ~from[0], ~from[1], ~from[2], ~from[3], -- to[0], to[1], to[2], to[3], -+ ~net_hdr_word(&from[0]), -+ ~net_hdr_word(&from[1]), -+ ~net_hdr_word(&from[2]), -+ ~net_hdr_word(&from[3]), -+ net_hdr_word(&to[0]), -+ net_hdr_word(&to[1]), -+ net_hdr_word(&to[2]), -+ net_hdr_word(&to[3]), - }; - if (skb->ip_summed != CHECKSUM_PARTIAL) { - *sum = csum_fold(csum_partial(diff, sizeof(diff), ---- a/include/linux/etherdevice.h -+++ b/include/linux/etherdevice.h -@@ -489,7 +489,7 @@ static inline bool is_etherdev_addr(cons - * @b: Pointer to Ethernet header - * - * Compare two Ethernet headers, returns 0 if equal. -- * This assumes that the network header (i.e., IP header) is 4-byte -+ * This assumes that the network header (i.e., IP header) is 2-byte - * aligned OR the platform can handle unaligned access. This is the - * case for all packets coming into netif_receive_skb or similar - * entry points. -@@ -512,11 +512,12 @@ static inline unsigned long compare_ethe - fold |= *(unsigned long *)(a + 6) ^ *(unsigned long *)(b + 6); - return fold; - #else -- u32 *a32 = (u32 *)((u8 *)a + 2); -- u32 *b32 = (u32 *)((u8 *)b + 2); -+ const u16 *a16 = a; -+ const u16 *b16 = b; - -- return (*(u16 *)a ^ *(u16 *)b) | (a32[0] ^ b32[0]) | -- (a32[1] ^ b32[1]) | (a32[2] ^ b32[2]); -+ return (a16[0] ^ b16[0]) | (a16[1] ^ b16[1]) | (a16[2] ^ b16[2]) | -+ (a16[3] ^ b16[3]) | (a16[4] ^ b16[4]) | (a16[5] ^ b16[5]) | -+ (a16[6] ^ b16[6]); - #endif - } - ---- a/net/ipv4/tcp_offload.c -+++ b/net/ipv4/tcp_offload.c -@@ -223,7 +223,7 @@ struct sk_buff *tcp_gro_receive(struct l - - th2 = tcp_hdr(p); - -- if (*(u32 *)&th->source ^ *(u32 *)&th2->source) { -+ if (net_hdr_word(&th->source) ^ net_hdr_word(&th2->source)) { - NAPI_GRO_CB(p)->same_flow = 0; - continue; - } -@@ -241,8 +241,8 @@ found: - ~(TCP_FLAG_CWR | TCP_FLAG_FIN | TCP_FLAG_PSH)); - flush |= (__force int)(th->ack_seq ^ th2->ack_seq); - for (i = sizeof(*th); i < thlen; i += 4) -- flush |= *(u32 *)((u8 *)th + i) ^ -- *(u32 *)((u8 *)th2 + i); -+ flush |= net_hdr_word((u8 *)th + i) ^ -+ net_hdr_word((u8 *)th2 + i); - - /* When we receive our second frame we can made a decision on if we - * continue this flow as an atomic flow with a fixed ID or if we use ---- a/net/ipv6/netfilter/ip6table_mangle.c -+++ b/net/ipv6/netfilter/ip6table_mangle.c -@@ -47,7 +47,7 @@ ip6t_mangle_out(struct sk_buff *skb, con - hop_limit = ipv6_hdr(skb)->hop_limit; - - /* flowlabel and prio (includes version, which shouldn't change either */ -- flowlabel = *((u_int32_t *)ipv6_hdr(skb)); -+ flowlabel = net_hdr_word(ipv6_hdr(skb)); - - ret = ip6t_do_table(skb, state, state->net->ipv6.ip6table_mangle); - -@@ -56,7 +56,7 @@ ip6t_mangle_out(struct sk_buff *skb, con - !ipv6_addr_equal(&ipv6_hdr(skb)->daddr, &daddr) || - skb->mark != mark || - ipv6_hdr(skb)->hop_limit != hop_limit || -- flowlabel != *((u_int32_t *)ipv6_hdr(skb)))) { -+ flowlabel != net_hdr_word(ipv6_hdr(skb)))) { - err = ip6_route_me_harder(state->net, state->sk, skb); - if (err < 0) - ret = NF_DROP_ERR(err); diff --git a/target/linux/ath79/patches-5.4/920-mikrotik-rb4xx.patch b/target/linux/ath79/patches-5.4/920-mikrotik-rb4xx.patch deleted file mode 100644 index 7f424bbfc6..0000000000 --- a/target/linux/ath79/patches-5.4/920-mikrotik-rb4xx.patch +++ /dev/null @@ -1,72 +0,0 @@ ---- a/drivers/mfd/Kconfig -+++ b/drivers/mfd/Kconfig -@@ -2012,5 +2012,13 @@ config RAVE_SP_CORE - Select this to get support for the Supervisory Processor - device found on several devices in RAVE line of hardware. - -+config MFD_RB4XX_CPLD -+ tristate "CPLD driver for Mikrotik RB4xx series boards" -+ select MFD_CORE -+ depends on ATH79 || COMPILE_TEST -+ help -+ Enables support for the CPLD chip (NAND & GPIO) on Mikrotik -+ Routerboard RB4xx series. -+ - endmenu - endif ---- a/drivers/mfd/Makefile -+++ b/drivers/mfd/Makefile -@@ -256,3 +256,4 @@ obj-$(CONFIG_MFD_ROHM_BD70528) += rohm-b - obj-$(CONFIG_MFD_ROHM_BD718XX) += rohm-bd718x7.o - obj-$(CONFIG_MFD_STMFX) += stmfx.o - -+obj-$(CONFIG_MFD_RB4XX_CPLD) += rb4xx-cpld.o ---- a/drivers/gpio/Kconfig -+++ b/drivers/gpio/Kconfig -@@ -1408,6 +1408,12 @@ config GPIO_SODAVILLE - help - Say Y here to support Intel Sodaville GPIO. - -+config GPIO_RB4XX -+ tristate "GPIO expander for Mikrotik RB4xx series boards" -+ depends on MFD_RB4XX_CPLD -+ help -+ GPIO driver for Mikrotik Routerboard RB4xx series. -+ - endmenu - - menu "SPI GPIO expanders" ---- a/drivers/gpio/Makefile -+++ b/drivers/gpio/Makefile -@@ -113,6 +113,7 @@ obj-$(CONFIG_GPIO_PL061) += gpio-pl061. - obj-$(CONFIG_GPIO_PMIC_EIC_SPRD) += gpio-pmic-eic-sprd.o - obj-$(CONFIG_GPIO_PXA) += gpio-pxa.o - obj-$(CONFIG_GPIO_RASPBERRYPI_EXP) += gpio-raspberrypi-exp.o -+obj-$(CONFIG_GPIO_RB4XX) += gpio-rb4xx.o - obj-$(CONFIG_GPIO_RC5T583) += gpio-rc5t583.o - obj-$(CONFIG_GPIO_RCAR) += gpio-rcar.o - obj-$(CONFIG_GPIO_RDC321X) += gpio-rdc321x.o ---- a/drivers/mtd/nand/raw/Kconfig -+++ b/drivers/mtd/nand/raw/Kconfig -@@ -552,4 +552,11 @@ config MTD_NAND_AR934X - Enables support for NAND controller on Qualcomm Atheros SoCs. - This controller is found on AR934x and QCA955x SoCs. - -+config MTD_NAND_RB4XX -+ tristate "Support for NAND driver for Mikrotik RB4xx series boards" -+ depends on MFD_RB4XX_CPLD -+ help -+ Enables support for the NAND flash chip on Mikrotik Routerboard -+ RB4xx series. -+ - endif # MTD_RAW_NAND ---- a/drivers/mtd/nand/raw/Makefile -+++ b/drivers/mtd/nand/raw/Makefile -@@ -58,6 +58,7 @@ obj-$(CONFIG_MTD_NAND_TEGRA) += tegra_n - obj-$(CONFIG_MTD_NAND_STM32_FMC2) += stm32_fmc2_nand.o - obj-$(CONFIG_MTD_NAND_MESON) += meson_nand.o - obj-$(CONFIG_MTD_NAND_AR934X) += ar934x_nand.o -+obj-$(CONFIG_MTD_NAND_RB4XX) += nand_rb4xx.o - - nand-objs := nand_base.o nand_legacy.o nand_bbt.o nand_timings.o nand_ids.o - nand-objs += nand_onfi.o diff --git a/target/linux/ath79/patches-5.4/930-ar8216-make-reg-access-atomic.patch b/target/linux/ath79/patches-5.4/930-ar8216-make-reg-access-atomic.patch deleted file mode 100644 index 02f763534e..0000000000 --- a/target/linux/ath79/patches-5.4/930-ar8216-make-reg-access-atomic.patch +++ /dev/null @@ -1,59 +0,0 @@ -From b3797d1a92afe97c173b00fdb7824cedba24eef0 Mon Sep 17 00:00:00 2001 -From: Chuanhong Guo -Date: Sun, 20 Sep 2020 01:00:45 +0800 -Subject: [PATCH] ath79: ar8216: make switch register access atomic - -due to some unknown reason these register accesses sometimes fail -on the integrated switch without this patch. - -THIS ONLY WORKS ON ATH79 AND MAY BREAK THE DRIVER ON OTHER PLATFORMS! -The mdio bus on ath79 works in polling mode and doesn't rely on -any interrupt. This patch breaks the driver on any mdio master -with interrupts used. - ---- ---- a/drivers/net/phy/ar8216.c -+++ b/drivers/net/phy/ar8216.c -@@ -252,6 +252,7 @@ ar8xxx_mii_write32(struct ar8xxx_priv *p - u32 - ar8xxx_read(struct ar8xxx_priv *priv, int reg) - { -+ unsigned long flags; - struct mii_bus *bus = priv->mii_bus; - u16 r1, r2, page; - u32 val; -@@ -259,11 +260,13 @@ ar8xxx_read(struct ar8xxx_priv *priv, in - split_addr((u32) reg, &r1, &r2, &page); - - mutex_lock(&bus->mdio_lock); -+ local_irq_save(flags); - - bus->write(bus, 0x18, 0, page); - wait_for_page_switch(); - val = ar8xxx_mii_read32(priv, 0x10 | r2, r1); - -+ local_irq_restore(flags); - mutex_unlock(&bus->mdio_lock); - - return val; -@@ -272,17 +275,20 @@ ar8xxx_read(struct ar8xxx_priv *priv, in - void - ar8xxx_write(struct ar8xxx_priv *priv, int reg, u32 val) - { -+ unsigned long flags; - struct mii_bus *bus = priv->mii_bus; - u16 r1, r2, page; - - split_addr((u32) reg, &r1, &r2, &page); - - mutex_lock(&bus->mdio_lock); -+ local_irq_save(flags); - - bus->write(bus, 0x18, 0, page); - wait_for_page_switch(); - ar8xxx_mii_write32(priv, 0x10 | r2, r1, val); - -+ local_irq_restore(flags); - mutex_unlock(&bus->mdio_lock); - } - diff --git a/target/linux/ath79/patches-5.4/939-mikrotik-rb91x.patch b/target/linux/ath79/patches-5.4/939-mikrotik-rb91x.patch deleted file mode 100644 index 6d84443945..0000000000 --- a/target/linux/ath79/patches-5.4/939-mikrotik-rb91x.patch +++ /dev/null @@ -1,44 +0,0 @@ ---- a/drivers/mtd/nand/raw/Kconfig -+++ b/drivers/mtd/nand/raw/Kconfig -@@ -559,4 +559,8 @@ config MTD_NAND_RB4XX - Enables support for the NAND flash chip on Mikrotik Routerboard - RB4xx series. - -+config MTD_NAND_RB91X -+ tristate "MikroTik RB91x NAND driver support" -+ depends on ATH79 && MTD_RAW_NAND -+ - endif # MTD_RAW_NAND ---- a/drivers/mtd/nand/raw/Makefile -+++ b/drivers/mtd/nand/raw/Makefile -@@ -59,6 +59,7 @@ obj-$(CONFIG_MTD_NAND_STM32_FMC2) += stm - obj-$(CONFIG_MTD_NAND_MESON) += meson_nand.o - obj-$(CONFIG_MTD_NAND_AR934X) += ar934x_nand.o - obj-$(CONFIG_MTD_NAND_RB4XX) += nand_rb4xx.o -+obj-$(CONFIG_MTD_NAND_RB91X) += rb91x_nand.o - - nand-objs := nand_base.o nand_legacy.o nand_bbt.o nand_timings.o nand_ids.o - nand-objs += nand_onfi.o ---- a/drivers/gpio/Kconfig -+++ b/drivers/gpio/Kconfig -@@ -130,6 +130,10 @@ config GPIO_ATH79 - Select this option to enable GPIO driver for - Atheros AR71XX/AR724X/AR913X SoC devices. - -+config GPIO_LATCH -+ tristate "MikroTik RouterBOARD GPIO latch support" -+ depends on ATH79 -+ - config GPIO_RASPBERRYPI_EXP - tristate "Raspberry Pi 3 GPIO Expander" - default RASPBERRYPI_FIRMWARE ---- a/drivers/gpio/Makefile -+++ b/drivers/gpio/Makefile -@@ -67,6 +67,7 @@ obj-$(CONFIG_GPIO_IT87) += gpio-it87.o - obj-$(CONFIG_GPIO_IXP4XX) += gpio-ixp4xx.o - obj-$(CONFIG_GPIO_JANZ_TTL) += gpio-janz-ttl.o - obj-$(CONFIG_GPIO_KEMPLD) += gpio-kempld.o -+obj-$(CONFIG_GPIO_LATCH) += gpio-latch.o - obj-$(CONFIG_GPIO_LOONGSON1) += gpio-loongson1.o - obj-$(CONFIG_GPIO_LOONGSON) += gpio-loongson.o - obj-$(CONFIG_GPIO_LP3943) += gpio-lp3943.o diff --git a/target/linux/bcm27xx/patches-5.10/950-0355-xhci-quirks-add-link-TRB-quirk-for-VL805.patch b/target/linux/bcm27xx/patches-5.10/950-0355-xhci-quirks-add-link-TRB-quirk-for-VL805.patch index ec889df411..92a35bec92 100644 --- a/target/linux/bcm27xx/patches-5.10/950-0355-xhci-quirks-add-link-TRB-quirk-for-VL805.patch +++ b/target/linux/bcm27xx/patches-5.10/950-0355-xhci-quirks-add-link-TRB-quirk-for-VL805.patch @@ -22,7 +22,7 @@ Signed-off-by: Jonathan Bell --- a/drivers/usb/host/xhci-pci.c +++ b/drivers/usb/host/xhci-pci.c -@@ -286,6 +286,7 @@ static void xhci_pci_quirks(struct devic +@@ -288,6 +288,7 @@ static void xhci_pci_quirks(struct devic if (pdev->vendor == PCI_VENDOR_ID_VIA && pdev->device == 0x3483) { xhci->quirks |= XHCI_LPM_SUPPORT; xhci->quirks |= XHCI_EP_CTX_BROKEN_DCS; diff --git a/target/linux/bcm27xx/patches-5.10/950-0537-clk-Introduce-a-clock-request-API.patch b/target/linux/bcm27xx/patches-5.10/950-0537-clk-Introduce-a-clock-request-API.patch index ba14120aa9..a73c9ca823 100644 --- a/target/linux/bcm27xx/patches-5.10/950-0537-clk-Introduce-a-clock-request-API.patch +++ b/target/linux/bcm27xx/patches-5.10/950-0537-clk-Introduce-a-clock-request-API.patch @@ -254,7 +254,7 @@ Signed-off-by: Maxime Ripard * clk_get_parent - return the parent of a clk * @clk: the clk whose parent gets returned * -@@ -3811,6 +3931,7 @@ __clk_register(struct device *dev, struc +@@ -3820,6 +3940,7 @@ __clk_register(struct device *dev, struc goto fail_parents; INIT_HLIST_HEAD(&core->clks); diff --git a/target/linux/bcm27xx/patches-5.10/950-0689-drm-automatic-legacy-gamma-support.patch b/target/linux/bcm27xx/patches-5.10/950-0689-drm-automatic-legacy-gamma-support.patch index d7e598691d..50c0f71318 100644 --- a/target/linux/bcm27xx/patches-5.10/950-0689-drm-automatic-legacy-gamma-support.patch +++ b/target/linux/bcm27xx/patches-5.10/950-0689-drm-automatic-legacy-gamma-support.patch @@ -82,7 +82,7 @@ Link: https://patchwork.freedesktop.org/patch/msgid/20201211114237.213288-2-tomi .atomic_duplicate_state = drm_atomic_helper_crtc_duplicate_state, --- a/drivers/gpu/drm/ast/ast_mode.c +++ b/drivers/gpu/drm/ast/ast_mode.c -@@ -898,7 +898,6 @@ static void ast_crtc_atomic_destroy_stat +@@ -901,7 +901,6 @@ static void ast_crtc_atomic_destroy_stat static const struct drm_crtc_funcs ast_crtc_funcs = { .reset = ast_crtc_reset, diff --git a/target/linux/bcm4908/image/Makefile b/target/linux/bcm4908/image/Makefile index 17b5ba960d..91b48291bc 100644 --- a/target/linux/bcm4908/image/Makefile +++ b/target/linux/bcm4908/image/Makefile @@ -9,6 +9,7 @@ DEVICE_VARS += PKGTB_ITS define Image/Prepare cp bootfs-generic.its $(KDIR)/ + sed -i "s=\$$$${images_dir}=$(STAGING_DIR_IMAGE)=" $(KDIR)/bootfs-generic.its sed -i "s=\$$$${dts_dir}=$(DTS_DIR)=" $(KDIR)/bootfs-generic.its endef diff --git a/target/linux/bcm4908/image/bootfs-generic.its b/target/linux/bcm4908/image/bootfs-generic.its index 6d8b3394ae..3cde532d72 100644 --- a/target/linux/bcm4908/image/bootfs-generic.its +++ b/target/linux/bcm4908/image/bootfs-generic.its @@ -7,6 +7,21 @@ #address-cells = <1>; images { + atf { + description = "ATF"; + data = /incbin/("${images_dir}/bl31.bin"); + type = "firmware"; + arch = "arm64"; + os = "arm-trusted-firmware"; + compression = "none"; + load = <0x4000>; + entry = <0x4000>; + + hash-1 { + algo = "sha256"; + }; + }; + kernel { description = "Linux kernel"; data = /incbin/("${kernel}"); diff --git a/target/linux/generic/backport-5.10/732-net-next-1-of-net-pass-the-dst-buffer-to-of_get_mac_address.patch b/target/linux/generic/backport-5.10/732-net-next-1-of-net-pass-the-dst-buffer-to-of_get_mac_address.patch index 794d87dc6e..fff6b25ac5 100644 --- a/target/linux/generic/backport-5.10/732-net-next-1-of-net-pass-the-dst-buffer-to-of_get_mac_address.patch +++ b/target/linux/generic/backport-5.10/732-net-next-1-of-net-pass-the-dst-buffer-to-of_get_mac_address.patch @@ -334,7 +334,7 @@ Signed-off-by: David S. Miller } --- a/drivers/net/ethernet/broadcom/bcmsysport.c +++ b/drivers/net/ethernet/broadcom/bcmsysport.c -@@ -2465,7 +2465,6 @@ static int bcm_sysport_probe(struct plat +@@ -2468,7 +2468,6 @@ static int bcm_sysport_probe(struct plat struct bcm_sysport_priv *priv; struct device_node *dn; struct net_device *dev; @@ -342,7 +342,7 @@ Signed-off-by: David S. Miller u32 txq, rxq; int ret; -@@ -2560,12 +2559,10 @@ static int bcm_sysport_probe(struct plat +@@ -2563,12 +2562,10 @@ static int bcm_sysport_probe(struct plat } /* Initialize netdevice members */ diff --git a/target/linux/generic/config-5.10 b/target/linux/generic/config-5.10 index 151d3e13d9..cfcf6ec657 100644 --- a/target/linux/generic/config-5.10 +++ b/target/linux/generic/config-5.10 @@ -3695,7 +3695,6 @@ CONFIG_MULTIUSER=y # CONFIG_MVMDIO is not set # CONFIG_MVNETA_BM is not set # CONFIG_MVSW61XX_PHY is not set -# CONFIG_MVSWITCH_PHY is not set # CONFIG_MV_XOR_V2 is not set # CONFIG_MWAVE is not set # CONFIG_MWL8K is not set diff --git a/target/linux/generic/config-5.4 b/target/linux/generic/config-5.4 index 965533be90..545f170c39 100644 --- a/target/linux/generic/config-5.4 +++ b/target/linux/generic/config-5.4 @@ -3362,7 +3362,6 @@ CONFIG_MULTIUSER=y # CONFIG_MV643XX_ETH is not set # CONFIG_MVMDIO is not set # CONFIG_MVNETA_BM is not set -# CONFIG_MVSWITCH_PHY is not set # CONFIG_MV_XOR_V2 is not set # CONFIG_MWAVE is not set # CONFIG_MWL8K is not set diff --git a/target/linux/generic/hack-5.10/421-drivers-mtd-parsers-add-nvmem-support-to-cmdlinepart.patch b/target/linux/generic/hack-5.10/421-drivers-mtd-parsers-add-nvmem-support-to-cmdlinepart.patch new file mode 100644 index 0000000000..965a331a19 --- /dev/null +++ b/target/linux/generic/hack-5.10/421-drivers-mtd-parsers-add-nvmem-support-to-cmdlinepart.patch @@ -0,0 +1,120 @@ +From 6fa9e3678eb002246df1280322b6a024853950a5 Mon Sep 17 00:00:00 2001 +From: Ansuel Smith +Date: Mon, 11 Oct 2021 00:53:14 +0200 +Subject: [PATCH] drivers: mtd: parsers: add nvmem support to cmdlinepart + +Assuming cmdlinepart is only one level deep partition scheme and that +static partition are also defined in DTS, we can assign an of_node for +partition declared from bootargs. cmdlinepart have priority than +fiexed-partition parser so in this specific case the parser doesn't +assign an of_node. Fix this by searching a defined of_node using a +similar fixed_partition parser and if a partition is found with the same +label, check that it has the same offset and size and return the DT +of_node to correctly use NVMEM cells. + +Signed-off-by: Ansuel Smith +--- + drivers/mtd/parsers/cmdlinepart.c | 71 +++++++++++++++++++++++++++++++ + 1 file changed, 71 insertions(+) + +--- a/drivers/mtd/parsers/cmdlinepart.c ++++ b/drivers/mtd/parsers/cmdlinepart.c +@@ -43,6 +43,7 @@ + #include + #include + #include ++#include + + /* debug macro */ + #if 0 +@@ -323,6 +324,68 @@ static int mtdpart_setup_real(char *s) + return 0; + } + ++static int search_fixed_partition(struct mtd_info *master, ++ struct mtd_partition *target_part, ++ struct mtd_partition *fixed_part) ++{ ++ struct device_node *mtd_node; ++ struct device_node *ofpart_node; ++ struct device_node *pp; ++ struct mtd_partition part; ++ const char *partname; ++ ++ mtd_node = mtd_get_of_node(master); ++ if (!mtd_node) ++ return -EINVAL; ++ ++ ofpart_node = of_get_child_by_name(mtd_node, "partitions"); ++ ++ for_each_child_of_node(ofpart_node, pp) { ++ const __be32 *reg; ++ int len; ++ int a_cells, s_cells; ++ ++ reg = of_get_property(pp, "reg", &len); ++ if (!reg) { ++ pr_debug("%s: ofpart partition %pOF (%pOF) missing reg property.\n", ++ master->name, pp, ++ mtd_node); ++ continue; ++ } ++ ++ a_cells = of_n_addr_cells(pp); ++ s_cells = of_n_size_cells(pp); ++ if (len / 4 != a_cells + s_cells) { ++ pr_debug("%s: ofpart partition %pOF (%pOF) error parsing reg property.\n", ++ master->name, pp, ++ mtd_node); ++ continue; ++ } ++ ++ part.offset = of_read_number(reg, a_cells); ++ part.size = of_read_number(reg + a_cells, s_cells); ++ part.of_node = pp; ++ ++ partname = of_get_property(pp, "label", &len); ++ if (!partname) ++ partname = of_get_property(pp, "name", &len); ++ part.name = partname; ++ ++ if (!strncmp(target_part->name, part.name, len)) { ++ if (part.offset != target_part->offset) ++ return -EINVAL; ++ ++ if (part.size != target_part->size) ++ return -EINVAL; ++ ++ memcpy(fixed_part, &part, sizeof(struct mtd_partition)); ++ return 0; ++ } ++ } ++ ++ return -EINVAL; ++} ++ + /* + * Main function to be called from the MTD mapping driver/device to + * obtain the partitioning information. At this point the command line +@@ -338,6 +401,7 @@ static int parse_cmdline_partitions(stru + int i, err; + struct cmdline_mtd_partition *part; + const char *mtd_id = master->name; ++ struct mtd_partition fixed_part; + + /* parse command line */ + if (!cmdline_parsed) { +@@ -382,6 +446,13 @@ static int parse_cmdline_partitions(stru + sizeof(*part->parts) * (part->num_parts - i)); + i--; + } ++ ++ err = search_fixed_partition(master, &part->parts[i], &fixed_part); ++ if (!err) { ++ part->parts[i].of_node = fixed_part.of_node; ++ pr_info("Found partition defined in DT for %s. Assigning OF node to support nvmem.", ++ part->parts[i].name); ++ } + } + + *pparts = kmemdup(part->parts, sizeof(*part->parts) * part->num_parts, diff --git a/target/linux/generic/hack-5.10/722-net-phy-aquantia-Add-AQR113-driver-support.patch b/target/linux/generic/hack-5.10/722-net-phy-aquantia-Add-AQR113-driver-support.patch index 9bb7784b0e..2b7a38d1c7 100644 --- a/target/linux/generic/hack-5.10/722-net-phy-aquantia-Add-AQR113-driver-support.patch +++ b/target/linux/generic/hack-5.10/722-net-phy-aquantia-Add-AQR113-driver-support.patch @@ -19,7 +19,7 @@ Add a new entry for AQR113 PHY_ID #define PHY_ID_AQCS109 0x03a1b5c2 #define PHY_ID_AQR405 0x03a1b4b0 @@ -817,6 +818,14 @@ static struct phy_driver aqr_driver[] = - .read_status = aqr_read_status, + .read_status = aqr107_read_status, }, { + PHY_ID_MATCH_MODEL(PHY_ID_AQR113), diff --git a/target/linux/generic/hack-5.4/421-drivers-mtd-parsers-add-nvmem-support-to-cmdlinepart.patch b/target/linux/generic/hack-5.4/421-drivers-mtd-parsers-add-nvmem-support-to-cmdlinepart.patch new file mode 100644 index 0000000000..26a1796d9a --- /dev/null +++ b/target/linux/generic/hack-5.4/421-drivers-mtd-parsers-add-nvmem-support-to-cmdlinepart.patch @@ -0,0 +1,120 @@ +From 6fa9e3678eb002246df1280322b6a024853950a5 Mon Sep 17 00:00:00 2001 +From: Ansuel Smith +Date: Mon, 11 Oct 2021 00:53:14 +0200 +Subject: [PATCH] drivers: mtd: parsers: add nvmem support to cmdlinepart + +Assuming cmdlinepart is only one level deep partition scheme and that +static partition are also defined in DTS, we can assign an of_node for +partition declared from bootargs. cmdlinepart have priority than +fiexed-partition parser so in this specific case the parser doesn't +assign an of_node. Fix this by searching a defined of_node using a +similar fixed_partition parser and if a partition is found with the same +label, check that it has the same offset and size and return the DT +of_node to correctly use NVMEM cells. + +Signed-off-by: Ansuel Smith +--- + drivers/mtd/parsers/cmdlinepart.c | 71 +++++++++++++++++++++++++++++++ + 1 file changed, 71 insertions(+) + +--- a/drivers/mtd/parsers/cmdlinepart.c ++++ b/drivers/mtd/parsers/cmdlinepart.c +@@ -43,6 +43,7 @@ + #include + #include + #include ++#include + + /* debug macro */ + #if 0 +@@ -315,6 +316,68 @@ static int mtdpart_setup_real(char *s) + return 0; + } + ++static int search_fixed_partition(struct mtd_info *master, ++ struct mtd_partition *target_part, ++ struct mtd_partition *fixed_part) ++{ ++ struct device_node *mtd_node; ++ struct device_node *ofpart_node; ++ struct device_node *pp; ++ struct mtd_partition part; ++ const char *partname; ++ ++ mtd_node = mtd_get_of_node(master); ++ if (!mtd_node) ++ return -EINVAL; ++ ++ ofpart_node = of_get_child_by_name(mtd_node, "partitions"); ++ ++ for_each_child_of_node(ofpart_node, pp) { ++ const __be32 *reg; ++ int len; ++ int a_cells, s_cells; ++ ++ reg = of_get_property(pp, "reg", &len); ++ if (!reg) { ++ pr_debug("%s: ofpart partition %pOF (%pOF) missing reg property.\n", ++ master->name, pp, ++ mtd_node); ++ continue; ++ } ++ ++ a_cells = of_n_addr_cells(pp); ++ s_cells = of_n_size_cells(pp); ++ if (len / 4 != a_cells + s_cells) { ++ pr_debug("%s: ofpart partition %pOF (%pOF) error parsing reg property.\n", ++ master->name, pp, ++ mtd_node); ++ continue; ++ } ++ ++ part.offset = of_read_number(reg, a_cells); ++ part.size = of_read_number(reg + a_cells, s_cells); ++ part.of_node = pp; ++ ++ partname = of_get_property(pp, "label", &len); ++ if (!partname) ++ partname = of_get_property(pp, "name", &len); ++ part.name = partname; ++ ++ if (!strncmp(target_part->name, part.name, len)) { ++ if (part.offset != target_part->offset) ++ return -EINVAL; ++ ++ if (part.size != target_part->size) ++ return -EINVAL; ++ ++ memcpy(fixed_part, &part, sizeof(struct mtd_partition)); ++ return 0; ++ } ++ } ++ ++ return -EINVAL; ++} ++ + /* + * Main function to be called from the MTD mapping driver/device to + * obtain the partitioning information. At this point the command line +@@ -330,6 +393,7 @@ static int parse_cmdline_partitions(stru + int i, err; + struct cmdline_mtd_partition *part; + const char *mtd_id = master->name; ++ struct mtd_partition fixed_part; + + /* parse command line */ + if (!cmdline_parsed) { +@@ -374,6 +438,13 @@ static int parse_cmdline_partitions(stru + sizeof(*part->parts) * (part->num_parts - i)); + i--; + } ++ ++ err = search_fixed_partition(master, &part->parts[i], &fixed_part); ++ if (!err) { ++ part->parts[i].of_node = fixed_part.of_node; ++ pr_info("Found partition defined in DT for %s. Assigning OF node to support nvmem.", ++ part->parts[i].name); ++ } + } + + *pparts = kmemdup(part->parts, sizeof(*part->parts) * part->num_parts, diff --git a/target/linux/generic/hack-5.4/700-swconfig_switch_drivers.patch b/target/linux/generic/hack-5.4/700-swconfig_switch_drivers.patch index f30ad81e4e..b954bbb63e 100644 --- a/target/linux/generic/hack-5.4/700-swconfig_switch_drivers.patch +++ b/target/linux/generic/hack-5.4/700-swconfig_switch_drivers.patch @@ -12,7 +12,7 @@ Signed-off-by: Felix Fietkau --- a/drivers/net/phy/Kconfig +++ b/drivers/net/phy/Kconfig -@@ -250,6 +250,85 @@ config LED_TRIGGER_PHY +@@ -250,6 +250,81 @@ config LED_TRIGGER_PHY for any speed known to the PHY. @@ -50,10 +50,6 @@ Signed-off-by: Felix Fietkau + tristate "Driver for IC+ IP17xx switches" + select SWCONFIG + -+config MVSWITCH_PHY -+ tristate "Driver for Marvell 88E6060 switches" -+ select ETHERNET_PACKET_MANGLE -+ +config PSB6970_PHY + tristate "Lantiq XWAY Tantos (PSB6970) Ethernet switch" + select SWCONFIG @@ -100,7 +96,7 @@ Signed-off-by: Felix Fietkau config SFP --- a/drivers/net/phy/Makefile +++ b/drivers/net/phy/Makefile -@@ -22,6 +22,20 @@ libphy-$(CONFIG_LED_TRIGGER_PHY) += phy_ +@@ -22,6 +22,19 @@ libphy-$(CONFIG_LED_TRIGGER_PHY) += phy_ obj-$(CONFIG_PHYLINK) += phylink.o obj-$(CONFIG_PHYLIB) += libphy.o @@ -109,7 +105,6 @@ Signed-off-by: Felix Fietkau +obj-$(CONFIG_AR8216_PHY) += ar8216.o ar8327.o +obj-$(CONFIG_SWCONFIG_B53) += b53/ +obj-$(CONFIG_IP17XX_PHY) += ip17xx.o -+obj-$(CONFIG_MVSWITCH_PHY) += mvswitch.o +obj-$(CONFIG_PSB6970_PHY) += psb6970.o +obj-$(CONFIG_RTL8306_PHY) += rtl8306.o +obj-$(CONFIG_RTL8366_SMI) += rtl8366_smi.o diff --git a/target/linux/mediatek/dts/mt7622-ubnt-unifi-6-lr.dtsi b/target/linux/mediatek/dts/mt7622-ubnt-unifi-6-lr.dtsi index 31d274a5d6..ae587a11a0 100644 --- a/target/linux/mediatek/dts/mt7622-ubnt-unifi-6-lr.dtsi +++ b/target/linux/mediatek/dts/mt7622-ubnt-unifi-6-lr.dtsi @@ -161,21 +161,17 @@ reg = <0>; phy-mode = "2500base-x"; - - fixed-link { - speed = <2500>; - full-duplex; - }; + phy-handle = <&phy0>; + phy-connection-type = "2500base-x"; }; mdio: mdio-bus { #address-cells = <1>; #size-cells = <0>; - ethernet-phy@7 { - /* Marvell AQRate AQR112W - no driver */ + phy0: ethernet-phy@8 { compatible = "ethernet-phy-ieee802.3-c45"; - reg = <0x7>; + reg = <0x8>; }; }; }; diff --git a/target/linux/mediatek/mt7622/config-5.10 b/target/linux/mediatek/mt7622/config-5.10 index 96bdea061c..58e72a3810 100644 --- a/target/linux/mediatek/mt7622/config-5.10 +++ b/target/linux/mediatek/mt7622/config-5.10 @@ -1,5 +1,6 @@ CONFIG_64BIT=y # CONFIG_AHCI_MTK is not set +CONFIG_AQUANTIA_PHY=y CONFIG_ARCH_DMA_ADDR_T_64BIT=y CONFIG_ARCH_KEEP_MEMBLOCK=y CONFIG_ARCH_MEDIATEK=y diff --git a/target/linux/mediatek/patches-5.10/701-net-ethernet-mtk_eth_soc-fix-return-value-of-MDIO-ops.patch b/target/linux/mediatek/patches-5.10/701-net-ethernet-mtk_eth_soc-fix-return-value-of-MDIO-ops.patch new file mode 100644 index 0000000000..696b68df47 --- /dev/null +++ b/target/linux/mediatek/patches-5.10/701-net-ethernet-mtk_eth_soc-fix-return-value-of-MDIO-ops.patch @@ -0,0 +1,97 @@ +From patchwork Mon Dec 27 18:31:09 2021 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +X-Patchwork-Submitter: Daniel Golle +X-Patchwork-Id: 12699993 +X-Patchwork-Delegate: kuba@kernel.org +Return-Path: +Date: Mon, 27 Dec 2021 18:31:09 +0000 +From: Daniel Golle +To: linux-mediatek@lists.infradead.org, netdev@vger.kernel.org, + linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org +Cc: Felix Fietkau , John Crispin , + Sean Wang , + Mark Lee , + "David S. Miller" , + Jakub Kicinski , + Matthias Brugger , + Russell King , + Andrew Lunn +Subject: [PATCH v5 1/2] net: ethernet: mtk_eth_soc: fix return value of MDIO + ops +Message-ID: +References: + +MIME-Version: 1.0 +Content-Disposition: inline +In-Reply-To: + +Precedence: bulk +List-ID: +X-Mailing-List: netdev@vger.kernel.org +X-Patchwork-Delegate: kuba@kernel.org + +Instead of returning -1 (-EPERM) when MDIO bus is stuck busy +while writing or 0xffff if it happens while reading, return the +appropriate -EBUSY. Also fix return type to int instead of u32. + +Fixes: 656e705243fd0 ("net-next: mediatek: add support for MT7623 ethernet") +Signed-off-by: Daniel Golle +--- +v5: fix incomplete unification of variable names phy_reg vs. phy_register +v4: clean-up return values and types, split into two commits + + drivers/net/ethernet/mediatek/mtk_eth_soc.c | 16 ++++++++-------- + 1 file changed, 8 insertions(+), 8 deletions(-) + +--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c ++++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c +@@ -95,31 +95,31 @@ static int mtk_mdio_busy_wait(struct mtk + return -1; + } + +-static u32 _mtk_mdio_write(struct mtk_eth *eth, u32 phy_addr, +- u32 phy_register, u32 write_data) ++static int _mtk_mdio_write(struct mtk_eth *eth, u32 phy_addr, u32 phy_reg, ++ u32 write_data) + { + if (mtk_mdio_busy_wait(eth)) +- return -1; ++ return -EBUSY; + + write_data &= 0xffff; + + mtk_w32(eth, PHY_IAC_ACCESS | PHY_IAC_START | PHY_IAC_WRITE | +- (phy_register << PHY_IAC_REG_SHIFT) | ++ (phy_reg << PHY_IAC_REG_SHIFT) | + (phy_addr << PHY_IAC_ADDR_SHIFT) | write_data, + MTK_PHY_IAC); + + if (mtk_mdio_busy_wait(eth)) +- return -1; ++ return -EBUSY; + + return 0; + } + +-static u32 _mtk_mdio_read(struct mtk_eth *eth, int phy_addr, int phy_reg) ++static int _mtk_mdio_read(struct mtk_eth *eth, int phy_addr, int phy_reg) + { + u32 d; + + if (mtk_mdio_busy_wait(eth)) +- return 0xffff; ++ return -EBUSY; + + mtk_w32(eth, PHY_IAC_ACCESS | PHY_IAC_START | PHY_IAC_READ | + (phy_reg << PHY_IAC_REG_SHIFT) | +@@ -127,7 +127,7 @@ static u32 _mtk_mdio_read(struct mtk_eth + MTK_PHY_IAC); + + if (mtk_mdio_busy_wait(eth)) +- return 0xffff; ++ return -EBUSY; + + d = mtk_r32(eth, MTK_PHY_IAC) & 0xffff; + diff --git a/target/linux/mediatek/patches-5.10/702-net-ethernet-mtk_eth_soc-implement-Clause-45-MDIO-access.patch b/target/linux/mediatek/patches-5.10/702-net-ethernet-mtk_eth_soc-implement-Clause-45-MDIO-access.patch new file mode 100644 index 0000000000..f7732cae9b --- /dev/null +++ b/target/linux/mediatek/patches-5.10/702-net-ethernet-mtk_eth_soc-implement-Clause-45-MDIO-access.patch @@ -0,0 +1,157 @@ +From patchwork Mon Dec 27 18:31:43 2021 +Content-Type: text/plain; charset="utf-8" +MIME-Version: 1.0 +Content-Transfer-Encoding: 7bit +X-Patchwork-Submitter: Daniel Golle +X-Patchwork-Id: 12699994 +X-Patchwork-Delegate: kuba@kernel.org +Return-Path: +Date: Mon, 27 Dec 2021 18:31:43 +0000 +From: Daniel Golle +To: linux-mediatek@lists.infradead.org, netdev@vger.kernel.org, + linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org +Cc: Felix Fietkau , John Crispin , + Sean Wang , + Mark Lee , + "David S. Miller" , + Jakub Kicinski , + Matthias Brugger , + Russell King , + Andrew Lunn +Subject: [PATCH v5 2/2] net: ethernet: mtk_eth_soc: implement Clause 45 MDIO + access +Message-ID: +References: + +MIME-Version: 1.0 +Content-Disposition: inline +In-Reply-To: + +Precedence: bulk +List-ID: +X-Mailing-List: netdev@vger.kernel.org +X-Patchwork-Delegate: kuba@kernel.org + +Implement read and write access to IEEE 802.3 Clause 45 Ethernet +phy registers. +Tested on the Ubiquiti UniFi 6 LR access point featuring +MediaTek MT7622BV WiSoC with Aquantia AQR112C. + +Signed-off-by: Daniel Golle +--- +v5: unchanged +v4: clean-up return values and types, split into two commits +v3: return -1 instead of 0xffff on error in _mtk_mdio_write +v2: use MII_DEVADDR_C45_SHIFT and MII_REGADDR_C45_MASK to extract + device id and register address. Unify read and write functions to + have identical types and parameter names where possible as we are + anyway already replacing both function bodies. + + + drivers/net/ethernet/mediatek/mtk_eth_soc.c | 60 +++++++++++++++++---- + drivers/net/ethernet/mediatek/mtk_eth_soc.h | 3 ++ + 2 files changed, 53 insertions(+), 10 deletions(-) + +--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c ++++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c +@@ -103,10 +103,30 @@ static int _mtk_mdio_write(struct mtk_et + + write_data &= 0xffff; + +- mtk_w32(eth, PHY_IAC_ACCESS | PHY_IAC_START | PHY_IAC_WRITE | +- (phy_reg << PHY_IAC_REG_SHIFT) | +- (phy_addr << PHY_IAC_ADDR_SHIFT) | write_data, +- MTK_PHY_IAC); ++ if (phy_reg & MII_ADDR_C45) { ++ u8 dev_num = (phy_reg >> MII_DEVADDR_C45_SHIFT) & GENMASK(4, 0); ++ u16 reg = (u16)(phy_reg & MII_REGADDR_C45_MASK); ++ ++ mtk_w32(eth, PHY_IAC_ACCESS | PHY_IAC_START_C45 | PHY_IAC_SET_ADDR | ++ (phy_addr << PHY_IAC_ADDR_SHIFT) | ++ (dev_num << PHY_IAC_REG_SHIFT) | ++ reg, ++ MTK_PHY_IAC); ++ ++ if (mtk_mdio_busy_wait(eth)) ++ return -EBUSY; ++ ++ mtk_w32(eth, PHY_IAC_ACCESS | PHY_IAC_START_C45 | PHY_IAC_WRITE | ++ (phy_addr << PHY_IAC_ADDR_SHIFT) | ++ (dev_num << PHY_IAC_REG_SHIFT) | ++ write_data, ++ MTK_PHY_IAC); ++ } else { ++ mtk_w32(eth, PHY_IAC_ACCESS | PHY_IAC_START | PHY_IAC_WRITE | ++ (phy_reg << PHY_IAC_REG_SHIFT) | ++ (phy_addr << PHY_IAC_ADDR_SHIFT) | write_data, ++ MTK_PHY_IAC); ++ } + + if (mtk_mdio_busy_wait(eth)) + return -EBUSY; +@@ -114,17 +134,36 @@ static int _mtk_mdio_write(struct mtk_et + return 0; + } + +-static int _mtk_mdio_read(struct mtk_eth *eth, int phy_addr, int phy_reg) ++static int _mtk_mdio_read(struct mtk_eth *eth, u32 phy_addr, u32 phy_reg) + { +- u32 d; ++ int d; + + if (mtk_mdio_busy_wait(eth)) + return -EBUSY; + +- mtk_w32(eth, PHY_IAC_ACCESS | PHY_IAC_START | PHY_IAC_READ | +- (phy_reg << PHY_IAC_REG_SHIFT) | +- (phy_addr << PHY_IAC_ADDR_SHIFT), +- MTK_PHY_IAC); ++ if (phy_reg & MII_ADDR_C45) { ++ u8 dev_num = (phy_reg >> MII_DEVADDR_C45_SHIFT) & GENMASK(4, 0); ++ u16 reg = (u16)(phy_reg & MII_REGADDR_C45_MASK); ++ ++ mtk_w32(eth, PHY_IAC_ACCESS | PHY_IAC_START_C45 | PHY_IAC_SET_ADDR | ++ (phy_addr << PHY_IAC_ADDR_SHIFT) | ++ (dev_num << PHY_IAC_REG_SHIFT) | ++ reg, ++ MTK_PHY_IAC); ++ ++ if (mtk_mdio_busy_wait(eth)) ++ return -EBUSY; ++ ++ mtk_w32(eth, PHY_IAC_ACCESS | PHY_IAC_START_C45 | PHY_IAC_READ_C45 | ++ (phy_addr << PHY_IAC_ADDR_SHIFT) | ++ (dev_num << PHY_IAC_REG_SHIFT), ++ MTK_PHY_IAC); ++ } else { ++ mtk_w32(eth, PHY_IAC_ACCESS | PHY_IAC_START | PHY_IAC_READ | ++ (phy_reg << PHY_IAC_REG_SHIFT) | ++ (phy_addr << PHY_IAC_ADDR_SHIFT), ++ MTK_PHY_IAC); ++ } + + if (mtk_mdio_busy_wait(eth)) + return -EBUSY; +@@ -584,6 +623,7 @@ static int mtk_mdio_init(struct mtk_eth + eth->mii_bus->name = "mdio"; + eth->mii_bus->read = mtk_mdio_read; + eth->mii_bus->write = mtk_mdio_write; ++ eth->mii_bus->probe_capabilities = MDIOBUS_C22_C45; + eth->mii_bus->priv = eth; + eth->mii_bus->parent = eth->dev; + +--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.h ++++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.h +@@ -340,9 +340,12 @@ + /* PHY Indirect Access Control registers */ + #define MTK_PHY_IAC 0x10004 + #define PHY_IAC_ACCESS BIT(31) ++#define PHY_IAC_SET_ADDR 0 + #define PHY_IAC_READ BIT(19) ++#define PHY_IAC_READ_C45 (BIT(18) | BIT(19)) + #define PHY_IAC_WRITE BIT(18) + #define PHY_IAC_START BIT(16) ++#define PHY_IAC_START_C45 0 + #define PHY_IAC_ADDR_SHIFT 20 + #define PHY_IAC_REG_SHIFT 25 + #define PHY_IAC_TIMEOUT HZ diff --git a/target/linux/mpc85xx/config-5.4 b/target/linux/mpc85xx/config-5.4 deleted file mode 100644 index 5ff7798e2c..0000000000 --- a/target/linux/mpc85xx/config-5.4 +++ /dev/null @@ -1,272 +0,0 @@ -# CONFIG_40x is not set -# CONFIG_44x is not set -# CONFIG_ADVANCED_OPTIONS is not set -CONFIG_AR8216_PHY=y -CONFIG_AR8216_PHY_LEDS=y -CONFIG_ARCH_32BIT_OFF_T=y -CONFIG_ARCH_HIBERNATION_POSSIBLE=y -CONFIG_ARCH_KEEP_MEMBLOCK=y -CONFIG_ARCH_MAY_HAVE_PC_FDC=y -CONFIG_ARCH_MIGHT_HAVE_PC_PARPORT=y -CONFIG_ARCH_MIGHT_HAVE_PC_SERIO=y -CONFIG_ARCH_MMAP_RND_BITS=11 -CONFIG_ARCH_MMAP_RND_BITS_MAX=17 -CONFIG_ARCH_MMAP_RND_BITS_MIN=11 -CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MAX=17 -CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MIN=11 -CONFIG_ARCH_OPTIONAL_KERNEL_RWX=y -CONFIG_ARCH_SUSPEND_POSSIBLE=y -CONFIG_ARCH_WEAK_RELEASE_ACQUIRE=y -CONFIG_ASN1=y -CONFIG_AUDIT_ARCH=y -CONFIG_BLK_MQ_PCI=y -CONFIG_BOOKE=y -CONFIG_BOOKE_WDT=y -# CONFIG_BSC9131_RDB is not set -# CONFIG_BSC9132_QDS is not set -# CONFIG_C293_PCIE is not set -CONFIG_CLONE_BACKWARDS=y -CONFIG_CLZ_TAB=y -CONFIG_CMDLINE="console=ttyS0,115200" -CONFIG_CMDLINE_BOOL=y -# CONFIG_CMDLINE_OVERRIDE is not set -CONFIG_COMPAT_32BIT_TIME=y -# CONFIG_CORENET_GENERIC is not set -# CONFIG_CPM2 is not set -CONFIG_CPU_BIG_ENDIAN=y -CONFIG_CRYPTO_AEAD=y -CONFIG_CRYPTO_AEAD2=y -# CONFIG_CRYPTO_AES_PPC_SPE is not set -CONFIG_CRYPTO_AKCIPHER=y -CONFIG_CRYPTO_AKCIPHER2=y -CONFIG_CRYPTO_AUTHENC=y -CONFIG_CRYPTO_HASH=y -CONFIG_CRYPTO_HASH2=y -CONFIG_CRYPTO_HW=y -CONFIG_CRYPTO_MANAGER=y -CONFIG_CRYPTO_MANAGER2=y -# CONFIG_CRYPTO_MD5_PPC is not set -CONFIG_CRYPTO_NULL=y -CONFIG_CRYPTO_NULL2=y -CONFIG_CRYPTO_RNG=y -CONFIG_CRYPTO_RNG2=y -CONFIG_CRYPTO_RSA=y -# CONFIG_CRYPTO_SHA1_PPC is not set -# CONFIG_CRYPTO_SHA1_PPC_SPE is not set -# CONFIG_CRYPTO_SHA256_PPC_SPE is not set -CONFIG_DATA_SHIFT=12 -CONFIG_DEBUG_BUGVERBOSE=y -CONFIG_DNOTIFY=y -CONFIG_DTC=y -# CONFIG_E200 is not set -CONFIG_E500=y -# CONFIG_E5500_CPU is not set -# CONFIG_E6500_CPU is not set -CONFIG_EARLY_PRINTK=y -CONFIG_EDAC_ATOMIC_SCRUB=y -CONFIG_EDAC_SUPPORT=y -CONFIG_ENABLE_MUST_CHECK=y -CONFIG_ETEXT_SHIFT=12 -CONFIG_ETHERNET_PACKET_MANGLE=y -CONFIG_FIXED_PHY=y -CONFIG_FSL_BOOKE=y -CONFIG_FSL_EMB_PERFMON=y -# CONFIG_FSL_FMAN is not set -CONFIG_FSL_LBC=y -CONFIG_FSL_PCI=y -CONFIG_FSL_PQ_MDIO=y -CONFIG_FSL_SOC=y -CONFIG_FSL_SOC_BOOKE=y -CONFIG_FW_LOADER_PAGED_BUF=y -CONFIG_GENERIC_ALLOCATOR=y -CONFIG_GENERIC_ATOMIC64=y -CONFIG_GENERIC_BUG=y -CONFIG_GENERIC_CLOCKEVENTS=y -CONFIG_GENERIC_CMOS_UPDATE=y -CONFIG_GENERIC_CPU=y -CONFIG_GENERIC_CPU_AUTOPROBE=y -CONFIG_GENERIC_CPU_VULNERABILITIES=y -CONFIG_GENERIC_IRQ_SHOW=y -CONFIG_GENERIC_IRQ_SHOW_LEVEL=y -CONFIG_GENERIC_ISA_DMA=y -CONFIG_GENERIC_PCI_IOMAP=y -CONFIG_GENERIC_SMP_IDLE_THREAD=y -CONFIG_GENERIC_STRNCPY_FROM_USER=y -CONFIG_GENERIC_STRNLEN_USER=y -CONFIG_GENERIC_TIME_VSYSCALL=y -CONFIG_GEN_RTC=y -# CONFIG_GE_IMP3A is not set -CONFIG_GIANFAR=y -CONFIG_GPIOLIB=y -CONFIG_GPIO_GENERIC=y -CONFIG_GPIO_MPC8XXX=y -CONFIG_HAS_DMA=y -CONFIG_HAS_IOMEM=y -CONFIG_HAS_IOPORT_MAP=y -# CONFIG_HIVEAP_330 is not set -CONFIG_HW_RANDOM=y -CONFIG_HZ_PERIODIC=y -CONFIG_I2C=y -CONFIG_I2C_BOARDINFO=y -CONFIG_I2C_MPC=y -CONFIG_ILLEGAL_POINTER_VALUE=0 -CONFIG_INITRAMFS_SOURCE="" -CONFIG_IRQCHIP=y -CONFIG_IRQ_DOMAIN=y -CONFIG_IRQ_FORCED_THREADING=y -CONFIG_IRQ_WORK=y -CONFIG_ISA_DMA_API=y -CONFIG_KERNEL_START=0xc0000000 -# CONFIG_KSI8560 is not set -CONFIG_LEGACY_PTYS=y -CONFIG_LEGACY_PTY_COUNT=256 -CONFIG_LIBFDT=y -CONFIG_LOCK_DEBUGGING_SUPPORT=y -CONFIG_LOWMEM_CAM_NUM=3 -CONFIG_LOWMEM_SIZE=0x30000000 -CONFIG_LXT_PHY=y -# CONFIG_MATH_EMULATION is not set -CONFIG_MDIO_BUS=y -CONFIG_MDIO_DEVICE=y -CONFIG_MEMFD_CREATE=y -CONFIG_MIGRATION=y -CONFIG_MODULES_USE_ELF_RELA=y -# CONFIG_MPC8536_DS is not set -# CONFIG_MPC8540_ADS is not set -# CONFIG_MPC8560_ADS is not set -# CONFIG_MPC85xx_CDS is not set -# CONFIG_MPC85xx_DS is not set -# CONFIG_MPC85xx_MDS is not set -# CONFIG_MPC85xx_RDB is not set -CONFIG_MPIC=y -# CONFIG_MPIC_MSGR is not set -CONFIG_MPIC_TIMER=y -CONFIG_MPILIB=y -# CONFIG_MTD_CFI is not set -CONFIG_MTD_NAND_CORE=y -CONFIG_MTD_NAND_ECC_SW_HAMMING=y -CONFIG_MTD_RAW_NAND=y -CONFIG_MTD_SPI_NOR=y -# CONFIG_MVME2500 is not set -CONFIG_NEED_PER_CPU_KM=y -CONFIG_NEED_SG_DMA_LENGTH=y -CONFIG_NLS=y -CONFIG_NR_IRQS=512 -CONFIG_NVMEM=y -CONFIG_OF=y -CONFIG_OF_ADDRESS=y -CONFIG_OF_DMA_DEFAULT_COHERENT=y -CONFIG_OF_EARLY_FLATTREE=y -CONFIG_OF_FLATTREE=y -CONFIG_OF_GPIO=y -CONFIG_OF_IRQ=y -CONFIG_OF_KOBJ=y -CONFIG_OF_MDIO=y -CONFIG_OF_NET=y -CONFIG_OLD_SIGACTION=y -CONFIG_OLD_SIGSUSPEND=y -# CONFIG_P1010_RDB is not set -# CONFIG_P1022_DS is not set -# CONFIG_P1022_RDK is not set -# CONFIG_P1023_RDB is not set -CONFIG_PAGE_OFFSET=0xc0000000 -# CONFIG_PANDA is not set -CONFIG_PCI=y -CONFIG_PCIEAER=y -CONFIG_PCIEASPM=y -# CONFIG_PCIEASPM_DEBUG is not set -CONFIG_PCIEASPM_DEFAULT=y -# CONFIG_PCIEASPM_PERFORMANCE is not set -# CONFIG_PCIEASPM_POWERSAVE is not set -# CONFIG_PCIEASPM_POWER_SUPERSAVE is not set -CONFIG_PCIEPORTBUS=y -CONFIG_PCI_DOMAINS=y -CONFIG_PGTABLE_LEVELS=2 -CONFIG_PHYLIB=y -CONFIG_PHYSICAL_ALIGN=0x04000000 -CONFIG_PHYSICAL_START=0x00000000 -# CONFIG_PHYS_64BIT is not set -# CONFIG_PPA8548 is not set -CONFIG_PPC=y -CONFIG_PPC32=y -# CONFIG_PPC64 is not set -CONFIG_PPC_85xx=y -# CONFIG_PPC_8xx is not set -CONFIG_PPC_ADV_DEBUG_DACS=2 -CONFIG_PPC_ADV_DEBUG_DVCS=0 -CONFIG_PPC_ADV_DEBUG_IACS=2 -CONFIG_PPC_ADV_DEBUG_REGS=y -CONFIG_PPC_BARRIER_NOSPEC=y -CONFIG_PPC_BOOK3E_MMU=y -# CONFIG_PPC_BOOK3S_601 is not set -# CONFIG_PPC_BOOK3S_6xx is not set -CONFIG_PPC_DOORBELL=y -# CONFIG_PPC_E500MC is not set -# CONFIG_PPC_EARLY_DEBUG is not set -CONFIG_PPC_FSL_BOOK3E=y -CONFIG_PPC_INDIRECT_PCI=y -# CONFIG_PPC_IRQ_SOFT_MASK_DEBUG is not set -CONFIG_PPC_MMU_NOHASH=y -CONFIG_PPC_MMU_NOHASH_32=y -CONFIG_PPC_PAGE_SHIFT=12 -# CONFIG_PPC_PTDUMP is not set -# CONFIG_PPC_QEMU_E500 is not set -CONFIG_PPC_SMP_MUXED_IPI=y -CONFIG_PPC_UDBG_16550=y -CONFIG_PPC_WERROR=y -CONFIG_QE_GPIO=y -CONFIG_QUICC_ENGINE=y -CONFIG_RAS=y -# CONFIG_RED_15W_REV1 is not set -CONFIG_RTC_CLASS=y -CONFIG_RTC_DRV_GENERIC=y -CONFIG_RTC_I2C_AND_SPI=y -CONFIG_RTC_MC146818_LIB=y -# CONFIG_SBC8548 is not set -# CONFIG_SCOM_DEBUGFS is not set -CONFIG_SERIAL_8250_EXTENDED=y -CONFIG_SERIAL_8250_FSL=y -CONFIG_SERIAL_8250_SHARE_IRQ=y -CONFIG_SERIAL_MCTRL_GPIO=y -CONFIG_SERIAL_OF_PLATFORM=y -# CONFIG_SERIAL_QE is not set -CONFIG_SIMPLE_GPIO=y -# CONFIG_SOCRATES is not set -CONFIG_SPARSE_IRQ=y -CONFIG_SPE=y -CONFIG_SPE_POSSIBLE=y -CONFIG_SPI=y -CONFIG_SPI_FSL_ESPI=y -CONFIG_SPI_MASTER=y -CONFIG_SPI_MEM=y -CONFIG_SRCU=y -# CONFIG_STRIP_ASM_SYMS is not set -# CONFIG_STX_GP3 is not set -CONFIG_SWCONFIG=y -CONFIG_SWPHY=y -CONFIG_SYSCTL_EXCEPTION_TRACE=y -CONFIG_TASK_SIZE=0xc0000000 -CONFIG_THREAD_INFO_IN_TASK=y -CONFIG_THREAD_SHIFT=13 -CONFIG_TICK_CPU_ACCOUNTING=y -CONFIG_TINY_SRCU=y -# CONFIG_TL_WDR4900_V1 is not set -# CONFIG_TQM8540 is not set -# CONFIG_TQM8541 is not set -# CONFIG_TQM8548 is not set -# CONFIG_TQM8555 is not set -# CONFIG_TQM8560 is not set -# CONFIG_TWR_P102x is not set -CONFIG_UCC=y -CONFIG_UCC_FAST=y -CONFIG_UCC_GETH=y -# CONFIG_UGETH_TX_ON_DEMAND is not set -CONFIG_USB_SUPPORT=y -CONFIG_VDSO32=y -# CONFIG_VIRT_CPU_ACCOUNTING_NATIVE is not set -CONFIG_VM_EVENT_COUNTERS=y -CONFIG_WATCHDOG_CORE=y -# CONFIG_WS_AP3710I is not set -# CONFIG_XES_MPC85xx is not set -CONFIG_XZ_DEC_BCJ=y -CONFIG_XZ_DEC_POWERPC=y diff --git a/target/linux/mpc85xx/patches-5.10/002-powerpc-85xx-fix-oops-when-CONFIG_FSL_PMC-n.patch b/target/linux/mpc85xx/patches-5.10/002-powerpc-85xx-fix-oops-when-CONFIG_FSL_PMC-n.patch deleted file mode 100644 index e9c2ec7032..0000000000 --- a/target/linux/mpc85xx/patches-5.10/002-powerpc-85xx-fix-oops-when-CONFIG_FSL_PMC-n.patch +++ /dev/null @@ -1,55 +0,0 @@ -From e7757563e621522f5cd862b3aff473aedf8b66c0 Mon Sep 17 00:00:00 2001 -From: Xiaoming Ni -Date: Fri, 26 Nov 2021 12:11:53 +0800 -Subject: [PATCH] powerpc/85xx: fix oops when CONFIG_FSL_PMC=n - -When CONFIG_FSL_PMC is set to n, no value is assigned to cpu_up_prepare - in the mpc85xx_pm_ops structure. As a result, oops is triggered in - smp_85xx_start_cpu(). - - [ 0.627233] smp: Bringing up secondary CPUs ... - [ 0.681659] kernel tried to execute user page (0) - exploit attempt? (uid: 0) - [ 0.766618] BUG: Unable to handle kernel instruction fetch (NULL pointer?) - [ 0.848899] Faulting instruction address: 0x00000000 - [ 0.908273] Oops: Kernel access of bad area, sig: 11 [#1] - ... - [ 1.758220] NIP [00000000] 0x0 - [ 1.794688] LR [c0021d2c] smp_85xx_kick_cpu+0xe8/0x568 - [ 1.856126] Call Trace: - [ 1.885295] [c1051da8] [c0021cb8] smp_85xx_kick_cpu+0x74/0x568 (unreliable) - [ 1.968633] [c1051de8] [c0011460] __cpu_up+0xc0/0x228 - [ 2.029038] [c1051e18] [c0031bbc] bringup_cpu+0x30/0x224 - [ 2.092572] [c1051e48] [c0031f3c] cpu_up.constprop.0+0x180/0x33c - [ 2.164443] [c1051e88] [c00322e8] bringup_nonboot_cpus+0x88/0xc8 - [ 2.236326] [c1051eb8] [c07e67bc] smp_init+0x30/0x78 - [ 2.295698] [c1051ed8] [c07d9e28] kernel_init_freeable+0x118/0x2a8 - [ 2.369641] [c1051f18] [c00032d8] kernel_init+0x14/0x124 - [ 2.433176] [c1051f38] [c0010278] ret_from_kernel_thread+0x14/0x1c - -Fixes: c45361abb9185b ("powerpc/85xx: fix timebase sync issue when - CONFIG_HOTPLUG_CPU=n") -Link: https://lore.kernel.org/lkml/CANA18Uyba4kMJQrbCSZVTFep2Exe5izE45whNJgwwUvNSEcNLg@mail.gmail.com/ -Reported-by: Martin Kennedy -Signed-off-by: Xiaoming Ni -Tested-by: Martin Kennedy -Cc: stable@vger.kernel.org ---- a/arch/powerpc/platforms/85xx/smp.c -+++ b/arch/powerpc/platforms/85xx/smp.c -@@ -220,7 +220,7 @@ static int smp_85xx_start_cpu(int cpu) - local_irq_save(flags); - hard_irq_disable(); - -- if (qoriq_pm_ops) -+ if (qoriq_pm_ops && qoriq_pm_ops->cpu_up_prepare) - qoriq_pm_ops->cpu_up_prepare(cpu); - - /* if cpu is not spinning, reset it */ -@@ -292,7 +292,7 @@ static int smp_85xx_kick_cpu(int nr) - booting_thread_hwid = cpu_thread_in_core(nr); - primary = cpu_first_thread_sibling(nr); - -- if (qoriq_pm_ops) -+ if (qoriq_pm_ops && qoriq_pm_ops->cpu_up_prepare) - qoriq_pm_ops->cpu_up_prepare(nr); - - /* diff --git a/target/linux/mpc85xx/patches-5.4/001-powerpc-85xx-add-gpio-keys-to-of-match-table.patch b/target/linux/mpc85xx/patches-5.4/001-powerpc-85xx-add-gpio-keys-to-of-match-table.patch deleted file mode 100644 index 5e5ab10daf..0000000000 --- a/target/linux/mpc85xx/patches-5.4/001-powerpc-85xx-add-gpio-keys-to-of-match-table.patch +++ /dev/null @@ -1,10 +0,0 @@ ---- a/arch/powerpc/platforms/85xx/common.c -+++ b/arch/powerpc/platforms/85xx/common.c -@@ -30,6 +30,7 @@ static const struct of_device_id mpc85xx - { .compatible = "fsl,mpc8548-guts", }, - /* Probably unnecessary? */ - { .compatible = "gpio-leds", }, -+ { .compatible = "gpio-keys", }, - /* For all PCI controllers */ - { .compatible = "fsl,mpc8540-pci", }, - { .compatible = "fsl,mpc8548-pcie", }, diff --git a/target/linux/mpc85xx/patches-5.4/100-powerpc-85xx-tl-wdr4900-v1-support.patch b/target/linux/mpc85xx/patches-5.4/100-powerpc-85xx-tl-wdr4900-v1-support.patch deleted file mode 100644 index 7f56edfff7..0000000000 --- a/target/linux/mpc85xx/patches-5.4/100-powerpc-85xx-tl-wdr4900-v1-support.patch +++ /dev/null @@ -1,83 +0,0 @@ -From 1d9f596e572917772b87a2a37e1680902964782f Mon Sep 17 00:00:00 2001 -From: Gabor Juhos -Date: Wed, 20 Feb 2013 08:40:33 +0100 -Subject: [PATCH] powerpc: 85xx: add support for the TP-Link TL-WDR4900 v1 - board - -This patch adds support for the TP-Link TL-WDR4900 v1 -concurrent dual-band wireless router. The devices uses -the Freescale P1014 SoC. - -Signed-off-by: Gabor Juhos -Signed-off-by: Pawel Dembicki ---- - arch/powerpc/boot/Makefile | 3 ++- - arch/powerpc/boot/wrapper | 5 +++++ - arch/powerpc/platforms/85xx/Kconfig | 12 ++++++++++++ - arch/powerpc/platforms/85xx/Makefile | 1 + - 4 files changed, 20 insertions(+), 1 deletion(-) - ---- a/arch/powerpc/boot/Makefile -+++ b/arch/powerpc/boot/Makefile -@@ -161,6 +161,7 @@ src-plat-$(CONFIG_PPC_PSERIES) += pserie - src-plat-$(CONFIG_PPC_POWERNV) += pseries-head.S - src-plat-$(CONFIG_PPC_IBM_CELL_BLADE) += pseries-head.S - src-plat-$(CONFIG_MVME7100) += motload-head.S mvme7100.c -+src-plat-$(CONFIG_TL_WDR4900_V1) += simpleboot.c fixed-head.S - - src-wlib := $(sort $(src-wlib-y)) - src-plat := $(sort $(src-plat-y)) -@@ -342,7 +343,7 @@ image-$(CONFIG_TQM8555) += cuImage.tqm - image-$(CONFIG_TQM8560) += cuImage.tqm8560 - image-$(CONFIG_SBC8548) += cuImage.sbc8548 - image-$(CONFIG_KSI8560) += cuImage.ksi8560 -- -+image-$(CONFIG_TL_WDR4900_V1) += simpleImage.tl-wdr4900-v1 - # Board ports in arch/powerpc/platform/86xx/Kconfig - image-$(CONFIG_MVME7100) += dtbImage.mvme7100 - ---- a/arch/powerpc/boot/wrapper -+++ b/arch/powerpc/boot/wrapper -@@ -323,6 +323,11 @@ adder875-redboot) - platformo="$object/fixed-head.o $object/redboot-8xx.o" - binary=y - ;; -+simpleboot-tl-wdr4900-v1) -+ platformo="$object/fixed-head.o $object/simpleboot.o" -+ link_address='0x1000000' -+ binary=y -+ ;; - simpleboot-virtex405-*) - platformo="$object/virtex405-head.o $object/simpleboot.o $object/virtex.o" - binary=y ---- a/arch/powerpc/platforms/85xx/Kconfig -+++ b/arch/powerpc/platforms/85xx/Kconfig -@@ -170,6 +170,18 @@ config STX_GP3 - select CPM2 - select DEFAULT_UIMAGE - -+config TL_WDR4900_V1 -+ bool "TP-Link TL-WDR4900 v1" -+ select DEFAULT_UIMAGE -+ select ARCH_REQUIRE_GPIOLIB -+ select GPIO_MPC8XXX -+ select SWIOTLB -+ help -+ This option enables support for the TP-Link TL-WDR4900 v1 board. -+ -+ This board is a Concurrent Dual-Band wireless router with a -+ Freescale P1014 SoC. -+ - config TQM8540 - bool "TQ Components TQM8540" - help ---- a/arch/powerpc/platforms/85xx/Makefile -+++ b/arch/powerpc/platforms/85xx/Makefile -@@ -26,6 +26,7 @@ obj-$(CONFIG_CORENET_GENERIC) += coren - obj-$(CONFIG_FB_FSL_DIU) += t1042rdb_diu.o - obj-$(CONFIG_STX_GP3) += stx_gp3.o - obj-$(CONFIG_TQM85xx) += tqm85xx.o -+obj-$(CONFIG_TL_WDR4900_V1) += tl_wdr4900_v1.o - obj-$(CONFIG_SBC8548) += sbc8548.o - obj-$(CONFIG_PPA8548) += ppa8548.o - obj-$(CONFIG_SOCRATES) += socrates.o socrates_fpga_pic.o diff --git a/target/linux/mpc85xx/patches-5.4/101-powerpc-85xx-hiveap-330-support.patch b/target/linux/mpc85xx/patches-5.4/101-powerpc-85xx-hiveap-330-support.patch deleted file mode 100644 index 34568398c2..0000000000 --- a/target/linux/mpc85xx/patches-5.4/101-powerpc-85xx-hiveap-330-support.patch +++ /dev/null @@ -1,30 +0,0 @@ ---- a/arch/powerpc/platforms/85xx/Kconfig -+++ b/arch/powerpc/platforms/85xx/Kconfig -@@ -49,6 +49,17 @@ config BSC9132_QDS - and dual StarCore SC3850 DSP cores. - Manufacturer : Freescale Semiconductor, Inc - -+config HIVEAP_330 -+ bool "Aerohive HiveAP-330" -+ select DEFAULT_UIMAGE -+ select ARCH_REQUIRE_GPIOLIB -+ select GPIO_MPC8XXX -+ help -+ This option enables support for the Aerohive HiveAP-330 board. -+ -+ This board is a Concurrent Dual-Band wireless access point with a -+ Freescale P1020 SoC. -+ - config MPC8540_ADS - bool "Freescale MPC8540 ADS" - select DEFAULT_UIMAGE ---- a/arch/powerpc/platforms/85xx/Makefile -+++ b/arch/powerpc/platforms/85xx/Makefile -@@ -10,6 +10,7 @@ obj-y += common.o - obj-$(CONFIG_BSC9131_RDB) += bsc913x_rdb.o - obj-$(CONFIG_BSC9132_QDS) += bsc913x_qds.o - obj-$(CONFIG_C293_PCIE) += c293pcie.o -+obj-$(CONFIG_HIVEAP_330) += hiveap-330.o - obj-$(CONFIG_MPC8540_ADS) += mpc85xx_ads.o - obj-$(CONFIG_MPC8560_ADS) += mpc85xx_ads.o - obj-$(CONFIG_MPC85xx_CDS) += mpc85xx_cds.o diff --git a/target/linux/mpc85xx/patches-5.4/102-powerpc-add-cmdline-override.patch b/target/linux/mpc85xx/patches-5.4/102-powerpc-add-cmdline-override.patch deleted file mode 100644 index 924ce9307e..0000000000 --- a/target/linux/mpc85xx/patches-5.4/102-powerpc-add-cmdline-override.patch +++ /dev/null @@ -1,37 +0,0 @@ ---- a/arch/powerpc/Kconfig -+++ b/arch/powerpc/Kconfig -@@ -885,6 +885,14 @@ config CMDLINE_FORCE - This is useful if you cannot or don't want to change the - command-line options your boot loader passes to the kernel. - -+config CMDLINE_OVERRIDE -+ bool "Use alternative cmdline from device tree" -+ help -+ Some bootloaders may have uneditable bootargs. While CMDLINE_FORCE can -+ be used, this is not a good option for kernels that are shared across -+ devices. This setting enables using "chosen/cmdline-override" as the -+ cmdline if it exists in the device tree. -+ - config EXTRA_TARGETS - string "Additional default image types" - help ---- a/drivers/of/fdt.c -+++ b/drivers/of/fdt.c -@@ -1060,6 +1060,17 @@ int __init early_init_dt_scan_chosen(uns - if (p != NULL && l > 0) - strlcpy(data, p, min(l, COMMAND_LINE_SIZE)); - -+ /* CONFIG_CMDLINE_OVERRIDE is used to fallback to a different -+ * device tree option of chosen/bootargs-override. This is -+ * helpful on boards where u-boot sets bootargs, and is unable -+ * to be modified. -+ */ -+#ifdef CONFIG_CMDLINE_OVERRIDE -+ p = of_get_flat_dt_prop(node, "bootargs-override", &l); -+ if (p != NULL && l > 0) -+ strlcpy(data, p, min((int)l, COMMAND_LINE_SIZE)); -+#endif -+ - /* - * CONFIG_CMDLINE is meant to be a default in case nothing else - * managed to set the command line, unless CONFIG_CMDLINE_FORCE diff --git a/target/linux/mpc85xx/patches-5.4/103-powerpc-85xx-red-15w-rev1.patch b/target/linux/mpc85xx/patches-5.4/103-powerpc-85xx-red-15w-rev1.patch deleted file mode 100644 index b84a56659c..0000000000 --- a/target/linux/mpc85xx/patches-5.4/103-powerpc-85xx-red-15w-rev1.patch +++ /dev/null @@ -1,29 +0,0 @@ ---- a/arch/powerpc/platforms/85xx/Kconfig -+++ b/arch/powerpc/platforms/85xx/Kconfig -@@ -173,6 +173,16 @@ config XES_MPC85xx - Manufacturer: Extreme Engineering Solutions, Inc. - URL: - -+config RED_15W_REV1 -+ bool "Sophos RED 15w Rev.1" -+ select DEFAULT_UIMAGE -+ select ARCH_REQUIRE_GPIOLIB -+ select GPIO_MPC8XXX -+ help -+ This option enables support for the Sophos RED 15w Rev.1 board. -+ -+ This board is a wireless VPN router with a Freescale P1010 SoC. -+ - config STX_GP3 - bool "Silicon Turnkey Express GP3" - help ---- a/arch/powerpc/platforms/85xx/Makefile -+++ b/arch/powerpc/platforms/85xx/Makefile -@@ -25,6 +25,7 @@ obj-$(CONFIG_P1023_RDB) += p1023_rdb.o - obj-$(CONFIG_TWR_P102x) += twr_p102x.o - obj-$(CONFIG_CORENET_GENERIC) += corenet_generic.o - obj-$(CONFIG_FB_FSL_DIU) += t1042rdb_diu.o -+obj-$(CONFIG_RED_15W_REV1) += red15w_rev1.o - obj-$(CONFIG_STX_GP3) += stx_gp3.o - obj-$(CONFIG_TQM85xx) += tqm85xx.o - obj-$(CONFIG_TL_WDR4900_V1) += tl_wdr4900_v1.o diff --git a/target/linux/mpc85xx/patches-5.4/104-powerpc-mpc85xx-change-P2020RDB-dts-file-for-OpenWRT.patch b/target/linux/mpc85xx/patches-5.4/104-powerpc-mpc85xx-change-P2020RDB-dts-file-for-OpenWRT.patch deleted file mode 100644 index a22f251077..0000000000 --- a/target/linux/mpc85xx/patches-5.4/104-powerpc-mpc85xx-change-P2020RDB-dts-file-for-OpenWRT.patch +++ /dev/null @@ -1,162 +0,0 @@ -From 93514afd769c305182beeed1f9c4c46235879ef8 Mon Sep 17 00:00:00 2001 -From: Pawel Dembicki -Date: Sun, 30 Dec 2018 23:24:41 +0100 -Subject: [PATCH] powerpc: mpc85xx: change P2020RDB dts file for OpenWRT - -This patch apply chages for OpenWRT in P2020RDB -dts file. - -Signed-off-by: Pawel Dembicki ---- - arch/powerpc/boot/dts/fsl/p2020rdb.dts | 98 +++++++++++++++++--------- - 1 file changed, 63 insertions(+), 35 deletions(-) - ---- a/arch/powerpc/boot/dts/fsl/p2020rdb.dts -+++ b/arch/powerpc/boot/dts/fsl/p2020rdb.dts -@@ -5,10 +5,15 @@ - * Copyright 2009-2012 Freescale Semiconductor Inc. - */ - -+/dts-v1/; -+ - /include/ "p2020si-pre.dtsi" - -+#include -+#include -+ - / { -- model = "fsl,P2020RDB"; -+ model = "Freescale P2020RDB"; - compatible = "fsl,P2020RDB"; - - aliases { -@@ -34,48 +39,38 @@ - 0x2 0x0 0x0 0xffb00000 0x00020000>; - - nor@0,0 { -- #address-cells = <1>; -- #size-cells = <1>; - compatible = "cfi-flash"; - reg = <0x0 0x0 0x1000000>; - bank-width = <2>; - device-width = <1>; - -- partition@0 { -- /* This location must not be altered */ -- /* 256KB for Vitesse 7385 Switch firmware */ -- reg = <0x0 0x00040000>; -- label = "NOR (RO) Vitesse-7385 Firmware"; -- read-only; -- }; -- -- partition@40000 { -- /* 256KB for DTB Image */ -- reg = <0x00040000 0x00040000>; -- label = "NOR (RO) DTB Image"; -- read-only; -- }; -+ partitions { -+ compatible = "fixed-partitions"; -+ #address-cells = <1>; -+ #size-cells = <1>; - -- partition@80000 { -- /* 3.5 MB for Linux Kernel Image */ -- reg = <0x00080000 0x00380000>; -- label = "NOR (RO) Linux Kernel Image"; -- read-only; -- }; -+ partition@0 { -+ /* This location must not be altered */ -+ /* 256KB for Vitesse 7385 Switch firmware */ -+ reg = <0x0 0x00040000>; -+ label = "NOR (RO) Vitesse-7385 Firmware"; -+ read-only; -+ }; - -- partition@400000 { -- /* 11MB for JFFS2 based Root file System */ -- reg = <0x00400000 0x00b00000>; -- label = "NOR (RW) JFFS2 Root File System"; -- }; -+ partition@40000 { -+ compatible = "denx,fit"; -+ reg = <0x00040000 0x00ec0000>; -+ label = "firmware"; -+ }; - -- partition@f00000 { -- /* This location must not be altered */ -- /* 512KB for u-boot Bootloader Image */ -- /* 512KB for u-boot Environment Variables */ -- reg = <0x00f00000 0x00100000>; -- label = "NOR (RO) U-Boot Image"; -- read-only; -+ partition@f00000 { -+ /* This location must not be altered */ -+ /* 512KB for u-boot Bootloader Image */ -+ /* 512KB for u-boot Environment Variables */ -+ reg = <0x00f00000 0x00100000>; -+ label = "u-boot"; -+ read-only; -+ }; - }; - }; - -@@ -140,13 +135,43 @@ - soc: soc@ffe00000 { - ranges = <0x0 0x0 0xffe00000 0x100000>; - -+ gpio0: gpio-controller@fc00 { -+ }; -+ - i2c@3000 { -+ temperature-sensor@4c { -+ compatible = "adi,adt7461"; -+ reg = <0x4c>; -+ }; -+ -+ eeprom@50 { -+ compatible = "atmel,24c256"; -+ reg = <0x50>; -+ }; -+ - rtc@68 { - compatible = "dallas,ds1339"; - reg = <0x68>; - }; - }; - -+ i2c@3100 { -+ pmic@11 { -+ compatible = "zl2006"; -+ reg = <0x11>; -+ }; -+ -+ gpio@18 { -+ compatible = "nxp,pca9557"; -+ reg = <0x18>; -+ }; -+ -+ eeprom@52 { -+ compatible = "atmel,24c01"; -+ reg = <0x52>; -+ }; -+ }; -+ - spi@7000 { - flash@0 { - #address-cells = <1>; -@@ -200,10 +225,12 @@ - phy0: ethernet-phy@0 { - interrupts = <3 1 0 0>; - reg = <0x0>; -+ reset-gpios = <&gpio0 14 GPIO_ACTIVE_LOW>; - }; - phy1: ethernet-phy@1 { - interrupts = <3 1 0 0>; - reg = <0x1>; -+ reset-gpios = <&gpio0 6 GPIO_ACTIVE_LOW>; - }; - tbi-phy@2 { - device_type = "tbi-phy"; diff --git a/target/linux/mpc85xx/patches-5.4/105-powerpc-85xx-panda-support.patch b/target/linux/mpc85xx/patches-5.4/105-powerpc-85xx-panda-support.patch deleted file mode 100644 index a08bc302f2..0000000000 --- a/target/linux/mpc85xx/patches-5.4/105-powerpc-85xx-panda-support.patch +++ /dev/null @@ -1,30 +0,0 @@ ---- a/arch/powerpc/platforms/85xx/Kconfig -+++ b/arch/powerpc/platforms/85xx/Kconfig -@@ -60,6 +60,17 @@ config HIVEAP_330 - This board is a Concurrent Dual-Band wireless access point with a - Freescale P1020 SoC. - -+config PANDA -+ bool "OCEDO PANDA" -+ select DEFAULT_UIMAGE -+ select ARCH_REQUIRE_GPIOLIB -+ select GPIO_MPC8XXX -+ help -+ This option enables support for the OCEDO PANDA board. -+ -+ This board is a Concurrent Dual-Band wireless access point with a -+ Freescale P1020 SoC. -+ - config MPC8540_ADS - bool "Freescale MPC8540 ADS" - select DEFAULT_UIMAGE ---- a/arch/powerpc/platforms/85xx/Makefile -+++ b/arch/powerpc/platforms/85xx/Makefile -@@ -22,6 +22,7 @@ obj-$(CONFIG_P1010_RDB) += p1010rdb.o - obj-$(CONFIG_P1022_DS) += p1022_ds.o - obj-$(CONFIG_P1022_RDK) += p1022_rdk.o - obj-$(CONFIG_P1023_RDB) += p1023_rdb.o -+obj-$(CONFIG_PANDA) += panda.o - obj-$(CONFIG_TWR_P102x) += twr_p102x.o - obj-$(CONFIG_CORENET_GENERIC) += corenet_generic.o - obj-$(CONFIG_FB_FSL_DIU) += t1042rdb_diu.o diff --git a/target/linux/mpc85xx/patches-5.4/106-powerpc-85xx-ws-ap3710i-support.patch b/target/linux/mpc85xx/patches-5.4/106-powerpc-85xx-ws-ap3710i-support.patch deleted file mode 100644 index 4bacedbcd7..0000000000 --- a/target/linux/mpc85xx/patches-5.4/106-powerpc-85xx-ws-ap3710i-support.patch +++ /dev/null @@ -1,30 +0,0 @@ ---- a/arch/powerpc/platforms/85xx/Kconfig -+++ b/arch/powerpc/platforms/85xx/Kconfig -@@ -71,6 +71,17 @@ config PANDA - This board is a Concurrent Dual-Band wireless access point with a - Freescale P1020 SoC. - -+config WS_AP3710I -+ bool "Enterasys WS-AP3710i" -+ select DEFAULT_UIMAGE -+ select ARCH_REQUIRE_GPIOLIB -+ select GPIO_MPC8XXX -+ help -+ This option enables support for the Enterasys WS-AP3710i board. -+ -+ This board is a Concurrent Dual-Band wireless access point with a -+ Freescale P1020 SoC. -+ - config MPC8540_ADS - bool "Freescale MPC8540 ADS" - select DEFAULT_UIMAGE ---- a/arch/powerpc/platforms/85xx/Makefile -+++ b/arch/powerpc/platforms/85xx/Makefile -@@ -24,6 +24,7 @@ obj-$(CONFIG_P1022_RDK) += p1022_rdk.o - obj-$(CONFIG_P1023_RDB) += p1023_rdb.o - obj-$(CONFIG_PANDA) += panda.o - obj-$(CONFIG_TWR_P102x) += twr_p102x.o -+obj-$(CONFIG_WS_AP3710I) += ws-ap3710i.o - obj-$(CONFIG_CORENET_GENERIC) += corenet_generic.o - obj-$(CONFIG_FB_FSL_DIU) += t1042rdb_diu.o - obj-$(CONFIG_RED_15W_REV1) += red15w_rev1.o diff --git a/target/linux/mpc85xx/patches-5.4/900-powerpc-bootwrapper-disable-uImage-generation.patch b/target/linux/mpc85xx/patches-5.4/900-powerpc-bootwrapper-disable-uImage-generation.patch deleted file mode 100644 index 6bbacdaf9a..0000000000 --- a/target/linux/mpc85xx/patches-5.4/900-powerpc-bootwrapper-disable-uImage-generation.patch +++ /dev/null @@ -1,42 +0,0 @@ -From d43ab14605510d9d2bd257a8cd70f24ada4621b0 Mon Sep 17 00:00:00 2001 -From: David Bauer -Date: Sat, 29 Feb 2020 14:27:04 +0100 -Subject: [PATCH] powerpc: bootwrapper: disable uImage generation - -Due to CONFIG_KERNEL_XZ symbol, the bootwrapper code tries to -instruct the mkimage to use the xz compression, which isn't -supported. This disables the uImage generation, as OpenWrt -generates individual uImages for each board using it's own -toolchain. - -Signed-off-by: David Bauer ---- - arch/powerpc/boot/Makefile | 9 --------- - 1 file changed, 9 deletions(-) - ---- a/arch/powerpc/boot/Makefile -+++ b/arch/powerpc/boot/Makefile -@@ -268,7 +268,6 @@ image-$(CONFIG_PPC_CHRP) += zImage.chrp - image-$(CONFIG_PPC_EFIKA) += zImage.chrp - image-$(CONFIG_PPC_PMAC) += zImage.pmac - image-$(CONFIG_PPC_HOLLY) += dtbImage.holly --image-$(CONFIG_DEFAULT_UIMAGE) += uImage - image-$(CONFIG_EPAPR_BOOT) += zImage.epapr - - # -@@ -397,15 +396,6 @@ $(obj)/dtbImage.%: vmlinux $(wrapperbits - $(obj)/vmlinux.strip: vmlinux - $(STRIP) -s -R .comment $< -o $@ - --$(obj)/uImage: vmlinux $(wrapperbits) FORCE -- $(call if_changed,wrap,uboot) -- --$(obj)/uImage.initrd.%: vmlinux $(obj)/dts/%.dtb $(wrapperbits) FORCE -- $(call if_changed,wrap,uboot-$*,,$(obj)/dts/$*.dtb,$(obj)/ramdisk.image.gz) -- --$(obj)/uImage.%: vmlinux $(obj)/dts/%.dtb $(wrapperbits) FORCE -- $(call if_changed,wrap,uboot-$*,,$(obj)/dts/$*.dtb) -- - $(obj)/cuImage.initrd.%: vmlinux $(obj)/dts/%.dtb $(wrapperbits) FORCE - $(call if_changed,wrap,cuboot-$*,,$(obj)/dts/$*.dtb,$(obj)/ramdisk.image.gz) - diff --git a/target/linux/realtek/dts-5.10/rtl8380_netgear_gigabit.dtsi b/target/linux/realtek/dts-5.10/rtl8380_netgear_gigabit.dtsi index 72956359d1..db411def30 100644 --- a/target/linux/realtek/dts-5.10/rtl8380_netgear_gigabit.dtsi +++ b/target/linux/realtek/dts-5.10/rtl8380_netgear_gigabit.dtsi @@ -30,8 +30,10 @@ }; }; -&gpio0 { - indirect-access-bus-id = <0>; +&gpio1 { + status = "okay"; + + indirect-access-bus-id = <31>; }; ðernet0 { diff --git a/target/linux/realtek/dts-5.10/rtl8380_netgear_gs110tpp-v1.dts b/target/linux/realtek/dts-5.10/rtl8380_netgear_gs110tpp-v1.dts index 8382d35a9d..1ff209cee3 100644 --- a/target/linux/realtek/dts-5.10/rtl8380_netgear_gs110tpp-v1.dts +++ b/target/linux/realtek/dts-5.10/rtl8380_netgear_gs110tpp-v1.dts @@ -1,10 +1,43 @@ // SPDX-License-Identifier: GPL-2.0-or-later #include "rtl8380_netgear_gigabit_1xx.dtsi" +#include / { compatible = "netgear,gs110tpp-v1", "realtek,rtl838x-soc"; model = "Netgear GS110TPP v1"; + + aliases { + led-boot = &led_status_green; + led-failsafe = &led_status_red; + led-running = &led_status_green; + led-upgrade = &led_status_blue; + }; + + leds { + compatible = "gpio-leds"; + + led_status_red: led-0 { + label = "red:status"; + color = ; + function = LED_FUNCTION_STATUS; + gpios = <&gpio1 31 GPIO_ACTIVE_LOW>; + }; + + led_status_green: led-1 { + label = "green:status"; + color = ; + function = LED_FUNCTION_STATUS; + gpios = <&gpio1 32 GPIO_ACTIVE_LOW>; + }; + + led_status_blue: led-2 { + label = "blue:status"; + color = ; + function = LED_FUNCTION_STATUS; + gpios = <&gpio1 34 GPIO_ACTIVE_LOW>; + }; + }; }; &uart1 { diff --git a/target/linux/rockchip/armv8/config-5.4 b/target/linux/rockchip/armv8/config-5.4 deleted file mode 100644 index dcd2a1b071..0000000000 --- a/target/linux/rockchip/armv8/config-5.4 +++ /dev/null @@ -1,640 +0,0 @@ -CONFIG_64BIT=y -CONFIG_ARCH_CLOCKSOURCE_DATA=y -CONFIG_ARCH_DMA_ADDR_T_64BIT=y -CONFIG_ARCH_HIBERNATION_POSSIBLE=y -CONFIG_ARCH_KEEP_MEMBLOCK=y -CONFIG_ARCH_MMAP_RND_BITS=18 -CONFIG_ARCH_MMAP_RND_BITS_MAX=33 -CONFIG_ARCH_MMAP_RND_BITS_MIN=18 -CONFIG_ARCH_MMAP_RND_COMPAT_BITS=11 -CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MIN=11 -CONFIG_ARCH_PROC_KCORE_TEXT=y -CONFIG_ARCH_ROCKCHIP=y -CONFIG_ARCH_SELECT_MEMORY_MODEL=y -CONFIG_ARCH_SPARSEMEM_DEFAULT=y -CONFIG_ARCH_SPARSEMEM_ENABLE=y -CONFIG_ARCH_SUSPEND_POSSIBLE=y -CONFIG_ARC_EMAC_CORE=y -CONFIG_ARM64=y -CONFIG_ARM64_4K_PAGES=y -CONFIG_ARM64_CNP=y -CONFIG_ARM64_CONT_SHIFT=4 -CONFIG_ARM64_ERRATUM_819472=y -CONFIG_ARM64_ERRATUM_824069=y -CONFIG_ARM64_ERRATUM_826319=y -CONFIG_ARM64_ERRATUM_827319=y -CONFIG_ARM64_ERRATUM_832075=y -CONFIG_ARM64_ERRATUM_843419=y -CONFIG_ARM64_ERRATUM_845719=y -CONFIG_ARM64_ERRATUM_858921=y -CONFIG_ARM64_HW_AFDBM=y -CONFIG_ARM64_LSE_ATOMICS=y -CONFIG_ARM64_MODULE_PLTS=y -CONFIG_ARM64_PAGE_SHIFT=12 -CONFIG_ARM64_PAN=y -CONFIG_ARM64_PA_BITS=48 -CONFIG_ARM64_PA_BITS_48=y -CONFIG_ARM64_PTR_AUTH=y -CONFIG_ARM64_RAS_EXTN=y -CONFIG_ARM64_SSBD=y -CONFIG_ARM64_SVE=y -# CONFIG_ARM64_SW_TTBR0_PAN is not set -CONFIG_ARM64_TAGGED_ADDR_ABI=y -CONFIG_ARM64_UAO=y -CONFIG_ARM64_VA_BITS=48 -# CONFIG_ARM64_VA_BITS_39 is not set -CONFIG_ARM64_VA_BITS_48=y -CONFIG_ARM64_VHE=y -CONFIG_ARM64_WORKAROUND_CLEAN_CACHE=y -# CONFIG_ARMV8_DEPRECATED is not set -CONFIG_ARM_AMBA=y -CONFIG_ARM_ARCH_TIMER=y -CONFIG_ARM_ARCH_TIMER_EVTSTREAM=y -CONFIG_ARM_ARCH_TIMER_OOL_WORKAROUND=y -CONFIG_ARM_CPUIDLE=y -CONFIG_ARM_GIC=y -CONFIG_ARM_GIC_V2M=y -CONFIG_ARM_GIC_V3=y -CONFIG_ARM_GIC_V3_ITS=y -CONFIG_ARM_GIC_V3_ITS_PCI=y -CONFIG_ARM_MHU=y -CONFIG_ARM_PSCI_CPUIDLE=y -CONFIG_ARM_PSCI_FW=y -CONFIG_ARM_RK3328_DMC_DEVFREQ=y -# CONFIG_ARM_RK3399_DMC_DEVFREQ is not set -# CONFIG_ARM_SCMI_PROTOCOL is not set -CONFIG_ARM_SCPI_CPUFREQ=y -CONFIG_ARM_SCPI_POWER_DOMAIN=y -CONFIG_ARM_SCPI_PROTOCOL=y -CONFIG_ARM_SMMU=y -CONFIG_ARM_SMMU_DISABLE_BYPASS_BY_DEFAULT=y -CONFIG_ARM_SMMU_V3=y -CONFIG_AUDIT_ARCH_COMPAT_GENERIC=y -CONFIG_BACKLIGHT_CLASS_DEVICE=y -CONFIG_BACKLIGHT_GPIO=y -CONFIG_BACKLIGHT_PWM=y -CONFIG_BLK_DEV_BSG=y -CONFIG_BLK_DEV_BSGLIB=y -# CONFIG_BLK_DEV_INITRD is not set -CONFIG_BLK_DEV_INTEGRITY=y -CONFIG_BLK_DEV_LOOP=y -CONFIG_BLK_DEV_NVME=y -CONFIG_BLK_DEV_PCIESSD_MTIP32XX=y -CONFIG_BLK_DEV_SD=y -CONFIG_BLK_MQ_PCI=y -CONFIG_BLK_PM=y -CONFIG_BLK_SCSI_REQUEST=y -CONFIG_BLOCK_COMPAT=y -CONFIG_BRCMSTB_GISB_ARB=y -CONFIG_BSD_PROCESS_ACCT=y -CONFIG_BSD_PROCESS_ACCT_V3=y -CONFIG_CHARGER_GPIO=y -CONFIG_CLKDEV_LOOKUP=y -CONFIG_CLKSRC_MMIO=y -CONFIG_CLONE_BACKWARDS=y -CONFIG_CMA=y -CONFIG_CMA_ALIGNMENT=8 -CONFIG_CMA_AREAS=7 -# CONFIG_CMA_DEBUG is not set -# CONFIG_CMA_DEBUGFS is not set -CONFIG_CMA_SIZE_MBYTES=5 -# CONFIG_CMA_SIZE_SEL_MAX is not set -CONFIG_CMA_SIZE_SEL_MBYTES=y -# CONFIG_CMA_SIZE_SEL_MIN is not set -# CONFIG_CMA_SIZE_SEL_PERCENTAGE is not set -CONFIG_COMMON_CLK=y -CONFIG_COMMON_CLK_RK808=y -CONFIG_COMMON_CLK_SCPI=y -CONFIG_COMPAT=y -CONFIG_COMPAT_32BIT_TIME=y -CONFIG_COMPAT_BINFMT_ELF=y -CONFIG_COMPAT_NETLINK_MESSAGES=y -CONFIG_COMPAT_OLD_SIGACTION=y -CONFIG_CONFIGFS_FS=y -CONFIG_CONSOLE_TRANSLATIONS=y -CONFIG_CONTIG_ALLOC=y -CONFIG_CPUFREQ_DT=y -CONFIG_CPUFREQ_DT_PLATDEV=y -CONFIG_CPU_FREQ=y -# CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE is not set -CONFIG_CPU_FREQ_DEFAULT_GOV_SCHEDUTIL=y -CONFIG_CPU_FREQ_GOV_ATTR_SET=y -# CONFIG_CPU_FREQ_GOV_CONSERVATIVE is not set -# CONFIG_CPU_FREQ_GOV_ONDEMAND is not set -CONFIG_CPU_FREQ_GOV_PERFORMANCE=y -CONFIG_CPU_FREQ_GOV_POWERSAVE=y -CONFIG_CPU_FREQ_GOV_SCHEDUTIL=y -# CONFIG_CPU_FREQ_GOV_USERSPACE is not set -CONFIG_CPU_FREQ_STAT=y -CONFIG_CPU_IDLE=y -CONFIG_CPU_IDLE_GOV_MENU=y -CONFIG_CPU_IDLE_MULTIPLE_DRIVERS=y -CONFIG_CPU_ISOLATION=y -CONFIG_CPU_PM=y -CONFIG_CPU_RMAP=y -CONFIG_CPU_THERMAL=y -CONFIG_CRASH_CORE=y -CONFIG_CRASH_DUMP=y -CONFIG_CRC16=y -# CONFIG_CRC32_SARWATE is not set -CONFIG_CRC32_SLICEBY8=y -CONFIG_CRC_T10DIF=y -CONFIG_CROSS_MEMORY_ATTACH=y -CONFIG_CRYPTO_AEAD=y -CONFIG_CRYPTO_AEAD2=y -CONFIG_CRYPTO_CRC32=y -CONFIG_CRYPTO_CRC32C=y -CONFIG_CRYPTO_CRCT10DIF=y -# CONFIG_CRYPTO_DEV_ROCKCHIP is not set -CONFIG_CRYPTO_DRBG=y -CONFIG_CRYPTO_DRBG_HMAC=y -CONFIG_CRYPTO_DRBG_MENU=y -CONFIG_CRYPTO_HASH=y -CONFIG_CRYPTO_HASH2=y -CONFIG_CRYPTO_JITTERENTROPY=y -CONFIG_CRYPTO_MANAGER=y -CONFIG_CRYPTO_MANAGER2=y -CONFIG_CRYPTO_NULL2=y -CONFIG_CRYPTO_RNG=y -CONFIG_CRYPTO_RNG2=y -CONFIG_CRYPTO_RNG_DEFAULT=y -CONFIG_DCACHE_WORD_ACCESS=y -CONFIG_DEBUG_BUGVERBOSE=y -# CONFIG_DEVFREQ_GOV_PASSIVE is not set -CONFIG_DEVFREQ_GOV_PERFORMANCE=y -CONFIG_DEVFREQ_GOV_POWERSAVE=y -CONFIG_DEVFREQ_GOV_SIMPLE_ONDEMAND=y -CONFIG_DEVFREQ_GOV_USERSPACE=y -# CONFIG_DEVFREQ_THERMAL is not set -CONFIG_DEVMEM=y -# CONFIG_DEVPORT is not set -CONFIG_DEVTMPFS=y -CONFIG_DEVTMPFS_MOUNT=y -CONFIG_DMADEVICES=y -CONFIG_DMA_CMA=y -CONFIG_DMA_DIRECT_REMAP=y -CONFIG_DMA_ENGINE=y -CONFIG_DMA_OF=y -CONFIG_DMA_REMAP=y -CONFIG_DMA_SHARED_BUFFER=y -CONFIG_DNOTIFY=y -CONFIG_DRM_RCAR_WRITEBACK=y -# CONFIG_DRM_ROCKCHIP is not set -CONFIG_DTC=y -CONFIG_DT_IDLE_STATES=y -CONFIG_DUMMY_CONSOLE=y -CONFIG_DWMAC_DWC_QOS_ETH=y -CONFIG_DWMAC_GENERIC=y -CONFIG_DWMAC_ROCKCHIP=y -CONFIG_EDAC_SUPPORT=y -CONFIG_EEPROM_AT24=y -CONFIG_EMAC_ROCKCHIP=y -CONFIG_ENABLE_MUST_CHECK=y -CONFIG_ENERGY_MODEL=y -CONFIG_EXT4_FS=y -CONFIG_EXT4_FS_POSIX_ACL=y -CONFIG_EXTCON=y -CONFIG_F2FS_FS=y -CONFIG_FANOTIFY=y -CONFIG_FHANDLE=y -CONFIG_FIXED_PHY=y -CONFIG_FIX_EARLYCON_MEM=y -# CONFIG_FLATMEM_MANUAL is not set -# CONFIG_FORTIFY_SOURCE is not set -CONFIG_FRAME_POINTER=y -CONFIG_FRAME_WARN=2048 -CONFIG_FS_IOMAP=y -CONFIG_FS_MBCACHE=y -CONFIG_FS_POSIX_ACL=y -CONFIG_FW_LOADER_PAGED_BUF=y -CONFIG_GENERIC_ALLOCATOR=y -CONFIG_GENERIC_ARCH_TOPOLOGY=y -CONFIG_GENERIC_BUG=y -CONFIG_GENERIC_BUG_RELATIVE_POINTERS=y -CONFIG_GENERIC_CLOCKEVENTS=y -CONFIG_GENERIC_CLOCKEVENTS_BROADCAST=y -CONFIG_GENERIC_CPU_AUTOPROBE=y -CONFIG_GENERIC_CPU_VULNERABILITIES=y -CONFIG_GENERIC_CSUM=y -CONFIG_GENERIC_EARLY_IOREMAP=y -CONFIG_GENERIC_GETTIMEOFDAY=y -CONFIG_GENERIC_IDLE_POLL_SETUP=y -CONFIG_GENERIC_IRQ_CHIP=y -CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK=y -CONFIG_GENERIC_IRQ_MIGRATION=y -CONFIG_GENERIC_IRQ_MULTI_HANDLER=y -CONFIG_GENERIC_IRQ_SHOW=y -CONFIG_GENERIC_IRQ_SHOW_LEVEL=y -CONFIG_GENERIC_MSI_IRQ=y -CONFIG_GENERIC_MSI_IRQ_DOMAIN=y -CONFIG_GENERIC_PCI_IOMAP=y -CONFIG_GENERIC_PHY=y -CONFIG_GENERIC_PINCONF=y -CONFIG_GENERIC_SCHED_CLOCK=y -CONFIG_GENERIC_SMP_IDLE_THREAD=y -CONFIG_GENERIC_STRNCPY_FROM_USER=y -CONFIG_GENERIC_STRNLEN_USER=y -CONFIG_GENERIC_TIME_VSYSCALL=y -CONFIG_GPIOLIB=y -CONFIG_GPIO_DWAPB=y -CONFIG_GPIO_GENERIC=y -CONFIG_GPIO_GENERIC_PLATFORM=y -CONFIG_HANDLE_DOMAIN_IRQ=y -# CONFIG_HARDENED_USERCOPY is not set -CONFIG_HARDEN_BRANCH_PREDICTOR=y -CONFIG_HARDIRQS_SW_RESEND=y -CONFIG_HAS_DMA=y -CONFIG_HAS_IOMEM=y -CONFIG_HAS_IOPORT_MAP=y -CONFIG_HID=y -CONFIG_HID_GENERIC=y -CONFIG_HOLES_IN_ZONE=y -CONFIG_HOTPLUG_CPU=y -CONFIG_HOTPLUG_PCI=y -# CONFIG_HOTPLUG_PCI_CPCI is not set -# CONFIG_HOTPLUG_PCI_PCIE is not set -# CONFIG_HOTPLUG_PCI_SHPC is not set -CONFIG_HUGETLBFS=y -CONFIG_HUGETLB_PAGE=y -CONFIG_HWMON=y -CONFIG_HWSPINLOCK=y -CONFIG_HW_CONSOLE=y -CONFIG_HW_RANDOM=y -CONFIG_HW_RANDOM_ROCKCHIP=y -CONFIG_HZ=250 -CONFIG_HZ_250=y -CONFIG_I2C=y -CONFIG_I2C_BOARDINFO=y -CONFIG_I2C_CHARDEV=y -CONFIG_I2C_COMPAT=y -CONFIG_I2C_HELPER_AUTO=y -CONFIG_I2C_RK3X=y -CONFIG_ILLEGAL_POINTER_VALUE=0xdead000000000000 -CONFIG_INDIRECT_PIO=y -CONFIG_INPUT=y -CONFIG_INPUT_EVDEV=y -CONFIG_INPUT_FF_MEMLESS=y -CONFIG_INPUT_KEYBOARD=y -CONFIG_INPUT_LEDS=y -CONFIG_INPUT_MATRIXKMAP=y -# CONFIG_INPUT_MISC is not set -# CONFIG_INPUT_RK805_PWRKEY is not set -CONFIG_IOMMU_API=y -# CONFIG_IOMMU_DEBUGFS is not set -# CONFIG_IOMMU_DEFAULT_PASSTHROUGH is not set -CONFIG_IOMMU_DMA=y -CONFIG_IOMMU_IOVA=y -CONFIG_IOMMU_IO_PGTABLE=y -# CONFIG_IOMMU_IO_PGTABLE_ARMV7S is not set -CONFIG_IOMMU_IO_PGTABLE_LPAE=y -# CONFIG_IOMMU_IO_PGTABLE_LPAE_SELFTEST is not set -CONFIG_IOMMU_SUPPORT=y -# CONFIG_IO_STRICT_DEVMEM is not set -CONFIG_IO_URING=y -CONFIG_IRQCHIP=y -CONFIG_IRQ_DOMAIN=y -CONFIG_IRQ_DOMAIN_HIERARCHY=y -CONFIG_IRQ_FORCED_THREADING=y -CONFIG_IRQ_MSI_IOMMU=y -CONFIG_IRQ_TIME_ACCOUNTING=y -CONFIG_IRQ_WORK=y -CONFIG_JBD2=y -CONFIG_JFFS2_ZLIB=y -CONFIG_JUMP_LABEL=y -CONFIG_KALLSYMS=y -CONFIG_KEXEC_CORE=y -CONFIG_KEXEC_FILE=y -# CONFIG_KEXEC_SIG is not set -CONFIG_KSM=y -# CONFIG_LEDS_BRIGHTNESS_HW_CHANGED is not set -CONFIG_LEDS_GPIO=y -CONFIG_LEDS_PWM=y -CONFIG_LEDS_SYSCON=y -CONFIG_LEDS_TRIGGER_CPU=y -CONFIG_LEDS_TRIGGER_PANIC=y -CONFIG_LEGACY_PTYS=y -CONFIG_LEGACY_PTY_COUNT=16 -CONFIG_LIBCRC32C=y -CONFIG_LIBFDT=y -CONFIG_LOCALVERSION_AUTO=y -CONFIG_LOCK_DEBUGGING_SUPPORT=y -CONFIG_LOCK_SPIN_ON_OWNER=y -CONFIG_LOG_BUF_SHIFT=19 -CONFIG_MAGIC_SYSRQ=y -CONFIG_MAGIC_SYSRQ_SERIAL=y -CONFIG_MAILBOX=y -# CONFIG_MAILBOX_TEST is not set -CONFIG_MANDATORY_FILE_LOCKING=y -CONFIG_MDIO_BUS=y -CONFIG_MDIO_BUS_MUX=y -CONFIG_MDIO_BUS_MUX_GPIO=y -CONFIG_MDIO_BUS_MUX_MMIOREG=y -CONFIG_MDIO_DEVICE=y -CONFIG_MEMFD_CREATE=y -CONFIG_MEMORY_ISOLATION=y -CONFIG_MFD_CORE=y -CONFIG_MFD_RK808=y -CONFIG_MFD_SYSCON=y -CONFIG_MIGRATION=y -CONFIG_MMC=y -CONFIG_MMC_BLOCK=y -CONFIG_MMC_BLOCK_MINORS=32 -CONFIG_MMC_CQHCI=y -CONFIG_MMC_DW=y -# CONFIG_MMC_DW_BLUEFIELD is not set -# CONFIG_MMC_DW_EXYNOS is not set -# CONFIG_MMC_DW_HI3798CV200 is not set -# CONFIG_MMC_DW_K3 is not set -# CONFIG_MMC_DW_PCI is not set -CONFIG_MMC_DW_PLTFM=y -CONFIG_MMC_DW_ROCKCHIP=y -CONFIG_MMC_SDHCI=y -CONFIG_MMC_SDHCI_OF_ARASAN=y -CONFIG_MMC_SDHCI_OF_DWCMSHC=y -# CONFIG_MMC_SDHCI_PCI is not set -CONFIG_MMC_SDHCI_PLTFM=y -CONFIG_MODULES_USE_ELF_RELA=y -CONFIG_MOTORCOMM_PHY=y -CONFIG_MQ_IOSCHED_DEADLINE=y -# CONFIG_MTD_CFI is not set -CONFIG_MTD_CMDLINE_PARTS=y -# CONFIG_MTD_COMPLEX_MAPPINGS is not set -CONFIG_MTD_SPI_NOR=y -CONFIG_MTD_SPI_NOR_USE_4K_SECTORS=y -CONFIG_MTD_SPLIT_FIRMWARE=y -CONFIG_MUTEX_SPIN_ON_OWNER=y -CONFIG_NEED_DMA_MAP_STATE=y -CONFIG_NEED_SG_DMA_LENGTH=y -CONFIG_NET_FLOW_LIMIT=y -CONFIG_NLS=y -CONFIG_NLS_ISO8859_1=y -CONFIG_NOP_USB_XCEIV=y -CONFIG_NO_HZ_COMMON=y -CONFIG_NO_HZ_IDLE=y -CONFIG_NR_CPUS=256 -CONFIG_NVMEM=y -CONFIG_NVMEM_SYSFS=y -CONFIG_NVME_CORE=y -# CONFIG_NVME_MULTIPATH is not set -# CONFIG_NVME_TCP is not set -CONFIG_OF=y -CONFIG_OF_ADDRESS=y -CONFIG_OF_DYNAMIC=y -CONFIG_OF_EARLY_FLATTREE=y -CONFIG_OF_FLATTREE=y -CONFIG_OF_GPIO=y -CONFIG_OF_IOMMU=y -CONFIG_OF_IRQ=y -CONFIG_OF_KOBJ=y -CONFIG_OF_MDIO=y -CONFIG_OF_NET=y -CONFIG_OF_OVERLAY=y -CONFIG_OF_RESOLVE=y -CONFIG_OLD_SIGSUSPEND3=y -# CONFIG_OVERLAY_FS_XINO_AUTO is not set -CONFIG_PADATA=y -CONFIG_PAGE_POOL=y -# CONFIG_PANIC_ON_OOPS is not set -CONFIG_PANIC_ON_OOPS_VALUE=0 -CONFIG_PANIC_TIMEOUT=0 -# CONFIG_PARTITION_ADVANCED is not set -CONFIG_PARTITION_PERCPU=y -CONFIG_PCI=y -CONFIG_PCIEAER=y -CONFIG_PCIEASPM=y -# CONFIG_PCIEASPM_DEBUG is not set -CONFIG_PCIEASPM_DEFAULT=y -# CONFIG_PCIEASPM_PERFORMANCE is not set -# CONFIG_PCIEASPM_POWERSAVE is not set -# CONFIG_PCIEASPM_POWER_SUPERSAVE is not set -CONFIG_PCIEPORTBUS=y -CONFIG_PCIE_PME=y -CONFIG_PCIE_ROCKCHIP=y -CONFIG_PCIE_ROCKCHIP_HOST=y -CONFIG_PCI_DOMAINS=y -CONFIG_PCI_DOMAINS_GENERIC=y -CONFIG_PCI_MSI=y -CONFIG_PCI_MSI_IRQ_DOMAIN=y -CONFIG_PCI_STUB=y -CONFIG_PGTABLE_LEVELS=4 -CONFIG_PHYLIB=y -CONFIG_PHYLINK=y -CONFIG_PHYS_ADDR_T_64BIT=y -CONFIG_PHY_ROCKCHIP_DP=y -CONFIG_PHY_ROCKCHIP_EMMC=y -# CONFIG_PHY_ROCKCHIP_INNO_HDMI is not set -CONFIG_PHY_ROCKCHIP_INNO_USB2=y -CONFIG_PHY_ROCKCHIP_PCIE=y -CONFIG_PHY_ROCKCHIP_TYPEC=y -CONFIG_PHY_ROCKCHIP_USB=y -CONFIG_PINCTRL=y -# CONFIG_PINCTRL_RK805 is not set -CONFIG_PINCTRL_ROCKCHIP=y -# CONFIG_PINCTRL_SINGLE is not set -CONFIG_PL330_DMA=y -CONFIG_PLATFORM_MHU=y -CONFIG_PM=y -CONFIG_PM_CLK=y -CONFIG_PM_DEVFREQ=y -# CONFIG_PM_DEVFREQ_EVENT is not set -CONFIG_PM_GENERIC_DOMAINS=y -CONFIG_PM_GENERIC_DOMAINS_OF=y -CONFIG_PM_OPP=y -CONFIG_POWER_AVS=y -CONFIG_POWER_RESET=y -CONFIG_POWER_SUPPLY=y -CONFIG_POWER_SUPPLY_HWMON=y -CONFIG_PREEMPT=y -CONFIG_PREEMPTION=y -CONFIG_PREEMPT_COUNT=y -# CONFIG_PREEMPT_NONE is not set -CONFIG_PREEMPT_RCU=y -CONFIG_PRINTK_TIME=y -# CONFIG_PRINT_QUOTA_WARNING is not set -CONFIG_PROC_PAGE_MONITOR=y -CONFIG_PROC_VMCORE=y -CONFIG_PWM=y -CONFIG_PWM_ROCKCHIP=y -CONFIG_PWM_SYSFS=y -# CONFIG_QFMT_V1 is not set -# CONFIG_QFMT_V2 is not set -CONFIG_QUEUED_RWLOCKS=y -CONFIG_QUEUED_SPINLOCKS=y -CONFIG_QUOTA=y -CONFIG_QUOTACTL=y -# CONFIG_QUOTA_NETLINK_INTERFACE is not set -CONFIG_RAID_ATTRS=y -CONFIG_RANDOMIZE_BASE=y -CONFIG_RANDOMIZE_MODULE_REGION_FULL=y -CONFIG_RAS=y -CONFIG_RATIONAL=y -# CONFIG_RAVE_SP_CORE is not set -CONFIG_RCU_TRACE=y -CONFIG_REALTEK_PHY=y -CONFIG_REFCOUNT_FULL=y -CONFIG_REGMAP=y -CONFIG_REGMAP_I2C=y -CONFIG_REGMAP_IRQ=y -CONFIG_REGMAP_MMIO=y -CONFIG_REGULATOR=y -CONFIG_REGULATOR_FAN53555=y -CONFIG_REGULATOR_FIXED_VOLTAGE=y -CONFIG_REGULATOR_GPIO=y -CONFIG_REGULATOR_PWM=y -CONFIG_REGULATOR_RK808=y -CONFIG_RELOCATABLE=y -CONFIG_RESET_CONTROLLER=y -CONFIG_RFS_ACCEL=y -CONFIG_ROCKCHIP_EFUSE=y -CONFIG_ROCKCHIP_GRF=y -CONFIG_ROCKCHIP_IODOMAIN=y -CONFIG_ROCKCHIP_IOMMU=y -CONFIG_ROCKCHIP_MBOX=y -CONFIG_ROCKCHIP_PHY=y -CONFIG_ROCKCHIP_PM_DOMAINS=y -CONFIG_ROCKCHIP_THERMAL=y -CONFIG_ROCKCHIP_TIMER=y -CONFIG_RODATA_FULL_DEFAULT_ENABLED=y -CONFIG_RPS=y -CONFIG_RSEQ=y -CONFIG_RTC_CLASS=y -CONFIG_RTC_DRV_RK808=y -CONFIG_RTC_I2C_AND_SPI=y -CONFIG_RTC_NVMEM=y -# CONFIG_RUNTIME_TESTING_MENU is not set -CONFIG_RWSEM_SPIN_ON_OWNER=y -CONFIG_SCHED_MC=y -CONFIG_SCSI=y -# CONFIG_SCSI_LOWLEVEL is not set -# CONFIG_SCSI_PROC_FS is not set -CONFIG_SCSI_SAS_ATTRS=y -CONFIG_SCSI_SAS_HOST_SMP=y -CONFIG_SCSI_SAS_LIBSAS=y -# CONFIG_SECURITY_DMESG_RESTRICT is not set -CONFIG_SENSORS_ARM_SCPI=y -CONFIG_SERIAL_8250_DEPRECATED_OPTIONS=y -CONFIG_SERIAL_8250_DW=y -CONFIG_SERIAL_8250_DWLIB=y -CONFIG_SERIAL_8250_EXAR=y -CONFIG_SERIAL_8250_EXTENDED=y -CONFIG_SERIAL_8250_FSL=y -CONFIG_SERIAL_8250_NR_UARTS=4 -CONFIG_SERIAL_8250_PCI=y -CONFIG_SERIAL_8250_RUNTIME_UARTS=4 -CONFIG_SERIAL_8250_SHARE_IRQ=y -CONFIG_SERIAL_AMBA_PL011=y -CONFIG_SERIAL_AMBA_PL011_CONSOLE=y -CONFIG_SERIAL_DEV_BUS=y -CONFIG_SERIAL_DEV_CTRL_TTYPORT=y -CONFIG_SERIAL_MCTRL_GPIO=y -CONFIG_SERIAL_OF_PLATFORM=y -CONFIG_SERIO=y -CONFIG_SERIO_AMBAKMI=y -CONFIG_SERIO_LIBPS2=y -CONFIG_SG_POOL=y -CONFIG_SIMPLE_PM_BUS=y -CONFIG_SLUB_DEBUG=y -CONFIG_SMP=y -# CONFIG_SND_SOC_ROCKCHIP is not set -CONFIG_SPARSEMEM=y -CONFIG_SPARSEMEM_EXTREME=y -CONFIG_SPARSEMEM_MANUAL=y -CONFIG_SPARSEMEM_VMEMMAP=y -CONFIG_SPARSEMEM_VMEMMAP_ENABLE=y -CONFIG_SPARSE_IRQ=y -CONFIG_SPI=y -CONFIG_SPI_BITBANG=y -CONFIG_SPI_DYNAMIC=y -CONFIG_SPI_MASTER=y -CONFIG_SPI_MEM=y -CONFIG_SPI_ROCKCHIP=y -CONFIG_SPI_SPIDEV=y -# CONFIG_SQUASHFS_DECOMP_MULTI_PERCPU is not set -CONFIG_SQUASHFS_DECOMP_SINGLE=y -# CONFIG_SQUASHFS_EMBEDDED is not set -CONFIG_SQUASHFS_FILE_CACHE=y -# CONFIG_SQUASHFS_FILE_DIRECT is not set -CONFIG_SRAM=y -CONFIG_SRCU=y -CONFIG_STACKPROTECTOR=y -CONFIG_STACKPROTECTOR_STRONG=y -CONFIG_STMMAC_ETH=y -CONFIG_STMMAC_PLATFORM=y -# CONFIG_STMMAC_SELFTESTS is not set -CONFIG_STRICT_DEVMEM=y -# CONFIG_STRIP_ASM_SYMS is not set -# CONFIG_SWAP is not set -CONFIG_SWIOTLB=y -CONFIG_SWPHY=y -CONFIG_SYNC_FILE=y -CONFIG_SYSCTL_EXCEPTION_TRACE=y -CONFIG_SYSFS_SYSCALL=y -CONFIG_SYSVIPC_COMPAT=y -CONFIG_SYS_SUPPORTS_HUGETLBFS=y -# CONFIG_TEXTSEARCH is not set -CONFIG_THERMAL=y -CONFIG_THERMAL_DEFAULT_GOV_STEP_WISE=y -CONFIG_THERMAL_EMERGENCY_POWEROFF_DELAY_MS=0 -CONFIG_THERMAL_EMULATION=y -CONFIG_THERMAL_GOV_POWER_ALLOCATOR=y -CONFIG_THERMAL_GOV_STEP_WISE=y -CONFIG_THERMAL_HWMON=y -CONFIG_THERMAL_OF=y -CONFIG_THREAD_INFO_IN_TASK=y -CONFIG_TICK_CPU_ACCOUNTING=y -CONFIG_TIMER_OF=y -CONFIG_TIMER_PROBE=y -CONFIG_TRACE_CLOCK=y -CONFIG_TRANSPARENT_HUGEPAGE=y -CONFIG_TRANSPARENT_HUGEPAGE_ALWAYS=y -# CONFIG_TRANSPARENT_HUGEPAGE_MADVISE is not set -CONFIG_TRANSPARENT_HUGE_PAGECACHE=y -CONFIG_TREE_SRCU=y -CONFIG_TYPEC=y -# CONFIG_TYPEC_DP_ALTMODE is not set -CONFIG_TYPEC_FUSB302=y -# CONFIG_TYPEC_MUX_PI3USB30532 is not set -# CONFIG_TYPEC_TCPCI is not set -CONFIG_TYPEC_TCPM=y -# CONFIG_TYPEC_TPS6598X is not set -# CONFIG_UCLAMP_TASK is not set -# CONFIG_UEVENT_HELPER is not set -CONFIG_UNINLINE_SPIN_UNLOCK=y -CONFIG_UNMAP_KERNEL_AT_EL0=y -CONFIG_USB=y -CONFIG_USB_COMMON=y -CONFIG_USB_DWC3=y -CONFIG_USB_DWC3_DUAL_ROLE=y -CONFIG_USB_DWC3_HOST=y -CONFIG_USB_DWC3_OF_SIMPLE=y -CONFIG_USB_EHCI_HCD=y -CONFIG_USB_EHCI_HCD_PLATFORM=y -# CONFIG_USB_EHCI_ROOT_HUB_TT is not set -CONFIG_USB_HID=y -CONFIG_USB_OHCI_HCD=y -CONFIG_USB_OHCI_HCD_PLATFORM=y -CONFIG_USB_PHY=y -CONFIG_USB_ROLE_SWITCH=y -CONFIG_USB_STORAGE=y -CONFIG_USB_SUPPORT=y -CONFIG_USB_ULPI=y -CONFIG_USB_ULPI_BUS=y -CONFIG_USB_ULPI_VIEWPORT=y -CONFIG_USB_XHCI_HCD=y -CONFIG_USB_XHCI_PLATFORM=y -# CONFIG_VIRTIO_MENU is not set -CONFIG_VMAP_STACK=y -CONFIG_VM_EVENT_COUNTERS=y -CONFIG_VT=y -CONFIG_VT_CONSOLE=y -CONFIG_VT_HW_CONSOLE_BINDING=y -# CONFIG_WATCHDOG is not set -CONFIG_XARRAY_MULTI=y -CONFIG_XPS=y -CONFIG_XXHASH=y -CONFIG_XZ_DEC_ARM=y -CONFIG_XZ_DEC_ARMTHUMB=y -CONFIG_XZ_DEC_BCJ=y -CONFIG_ZLIB_DEFLATE=y -CONFIG_ZLIB_INFLATE=y -CONFIG_ZONE_DMA32=y diff --git a/target/linux/rockchip/patches-5.4/001-rockchip-rk3328-Add-support-for-FriendlyARM-NanoPi-R.patch b/target/linux/rockchip/patches-5.4/001-rockchip-rk3328-Add-support-for-FriendlyARM-NanoPi-R.patch deleted file mode 100644 index 69ee8a7c3a..0000000000 --- a/target/linux/rockchip/patches-5.4/001-rockchip-rk3328-Add-support-for-FriendlyARM-NanoPi-R.patch +++ /dev/null @@ -1,404 +0,0 @@ -From 0720be5371c806c1b89936984a321248fa739bea Mon Sep 17 00:00:00 2001 -From: David Bauer -Date: Fri, 10 Jul 2020 15:57:46 +0200 -Subject: [PATCH] rockchip: rk3328: Add support for FriendlyARM NanoPi R2S - -This adds support for the NanoPi R2S from FriendlyARM. - -Rockchip RK3328 SoC -1GB DDR4 RAM -Gigabit Ethernet (WAN) -Gigabit Ethernet (USB3) (LAN) -USB 2.0 Host Port -MicroSD slot -Reset button -WAN - LAN - SYS LED - -Signed-off-by: David Bauer ---- - arch/arm64/boot/dts/rockchip/Makefile | 1 + - .../boot/dts/rockchip/rk3328-nanopi-r2s.dts | 368 ++++++++++++++++++ - 2 files changed, 369 insertions(+) - create mode 100644 arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2s.dts - ---- a/arch/arm64/boot/dts/rockchip/Makefile -+++ b/arch/arm64/boot/dts/rockchip/Makefile -@@ -1,6 +1,7 @@ - # SPDX-License-Identifier: GPL-2.0 - dtb-$(CONFIG_ARCH_ROCKCHIP) += px30-evb.dtb - dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-evb.dtb -+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-nanopi-r2s.dtb - dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-rock64.dtb - dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-roc-cc.dtb - dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3368-evb-act8846.dtb ---- /dev/null -+++ b/arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2s.dts -@@ -0,0 +1,368 @@ -+// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -+/* -+ * Copyright (c) 2020 David Bauer -+ */ -+ -+/dts-v1/; -+ -+#include -+#include -+#include "rk3328.dtsi" -+ -+/ { -+ model = "FriendlyElec NanoPi R2S"; -+ compatible = "friendlyarm,nanopi-r2s", "rockchip,rk3328"; -+ -+ chosen { -+ stdout-path = "serial2:1500000n8"; -+ }; -+ -+ gmac_clk: gmac-clock { -+ compatible = "fixed-clock"; -+ clock-frequency = <125000000>; -+ clock-output-names = "gmac_clk"; -+ #clock-cells = <0>; -+ }; -+ -+ keys { -+ compatible = "gpio-keys"; -+ pinctrl-0 = <&reset_button_pin>; -+ pinctrl-names = "default"; -+ -+ reset { -+ label = "reset"; -+ gpios = <&gpio0 RK_PA0 GPIO_ACTIVE_LOW>; -+ linux,code = ; -+ debounce-interval = <50>; -+ }; -+ }; -+ -+ leds { -+ compatible = "gpio-leds"; -+ pinctrl-0 = <&lan_led_pin>, <&sys_led_pin>, <&wan_led_pin>; -+ pinctrl-names = "default"; -+ -+ lan_led: led-0 { -+ gpios = <&gpio2 RK_PB7 GPIO_ACTIVE_HIGH>; -+ label = "nanopi-r2s:green:lan"; -+ }; -+ -+ sys_led: led-1 { -+ gpios = <&gpio0 RK_PA2 GPIO_ACTIVE_HIGH>; -+ label = "nanopi-r2s:red:sys"; -+ }; -+ -+ wan_led: led-2 { -+ gpios = <&gpio2 RK_PC2 GPIO_ACTIVE_HIGH>; -+ label = "nanopi-r2s:green:wan"; -+ }; -+ }; -+ -+ vcc_io_sdio: sdmmcio-regulator { -+ compatible = "regulator-gpio"; -+ enable-active-high; -+ gpios = <&gpio1 RK_PD4 GPIO_ACTIVE_HIGH>; -+ pinctrl-0 = <&sdio_vcc_pin>; -+ pinctrl-names = "default"; -+ regulator-name = "vcc_io_sdio"; -+ regulator-always-on; -+ regulator-min-microvolt = <1800000>; -+ regulator-max-microvolt = <3300000>; -+ regulator-settling-time-us = <5000>; -+ regulator-type = "voltage"; -+ startup-delay-us = <2000>; -+ states = <1800000 0x1 -+ 3300000 0x0>; -+ vin-supply = <&vcc_io_33>; -+ }; -+ -+ vcc_sd: sdmmc-regulator { -+ compatible = "regulator-fixed"; -+ gpio = <&gpio0 RK_PD6 GPIO_ACTIVE_LOW>; -+ pinctrl-0 = <&sdmmc0m1_gpio>; -+ pinctrl-names = "default"; -+ regulator-name = "vcc_sd"; -+ regulator-boot-on; -+ regulator-min-microvolt = <3300000>; -+ regulator-max-microvolt = <3300000>; -+ vin-supply = <&vcc_io_33>; -+ }; -+ -+ vdd_5v: vdd-5v { -+ compatible = "regulator-fixed"; -+ regulator-name = "vdd_5v"; -+ regulator-always-on; -+ regulator-boot-on; -+ regulator-min-microvolt = <5000000>; -+ regulator-max-microvolt = <5000000>; -+ }; -+}; -+ -+&cpu0 { -+ cpu-supply = <&vdd_arm>; -+}; -+ -+&cpu1 { -+ cpu-supply = <&vdd_arm>; -+}; -+ -+&cpu2 { -+ cpu-supply = <&vdd_arm>; -+}; -+ -+&cpu3 { -+ cpu-supply = <&vdd_arm>; -+}; -+ -+&gmac2io { -+ assigned-clocks = <&cru SCLK_MAC2IO>, <&cru SCLK_MAC2IO_EXT>; -+ assigned-clock-parents = <&gmac_clk>, <&gmac_clk>; -+ clock_in_out = "input"; -+ phy-handle = <&rtl8211e>; -+ phy-mode = "rgmii"; -+ phy-supply = <&vcc_io_33>; -+ pinctrl-0 = <&rgmiim1_pins>; -+ pinctrl-names = "default"; -+ rx_delay = <0x18>; -+ snps,aal; -+ tx_delay = <0x24>; -+ status = "okay"; -+ -+ mdio { -+ compatible = "snps,dwmac-mdio"; -+ #address-cells = <1>; -+ #size-cells = <0>; -+ -+ rtl8211e: ethernet-phy@1 { -+ reg = <1>; -+ pinctrl-0 = <ð_phy_reset_pin>; -+ pinctrl-names = "default"; -+ reset-assert-us = <10000>; -+ reset-deassert-us = <50000>; -+ reset-gpios = <&gpio1 RK_PC2 GPIO_ACTIVE_LOW>; -+ }; -+ }; -+}; -+ -+&i2c1 { -+ status = "okay"; -+ -+ rk805: pmic@18 { -+ compatible = "rockchip,rk805"; -+ reg = <0x18>; -+ interrupt-parent = <&gpio1>; -+ interrupts = <24 IRQ_TYPE_LEVEL_LOW>; -+ #clock-cells = <1>; -+ clock-output-names = "xin32k", "rk805-clkout2"; -+ gpio-controller; -+ #gpio-cells = <2>; -+ pinctrl-0 = <&pmic_int_l>; -+ pinctrl-names = "default"; -+ rockchip,system-power-controller; -+ wakeup-source; -+ -+ vcc1-supply = <&vdd_5v>; -+ vcc2-supply = <&vdd_5v>; -+ vcc3-supply = <&vdd_5v>; -+ vcc4-supply = <&vdd_5v>; -+ vcc5-supply = <&vcc_io_33>; -+ vcc6-supply = <&vdd_5v>; -+ -+ regulators { -+ vdd_log: DCDC_REG1 { -+ regulator-name = "vdd_log"; -+ regulator-always-on; -+ regulator-boot-on; -+ regulator-min-microvolt = <712500>; -+ regulator-max-microvolt = <1450000>; -+ regulator-ramp-delay = <12500>; -+ -+ regulator-state-mem { -+ regulator-on-in-suspend; -+ regulator-suspend-microvolt = <1000000>; -+ }; -+ }; -+ -+ vdd_arm: DCDC_REG2 { -+ regulator-name = "vdd_arm"; -+ regulator-always-on; -+ regulator-boot-on; -+ regulator-min-microvolt = <712500>; -+ regulator-max-microvolt = <1450000>; -+ regulator-ramp-delay = <12500>; -+ -+ regulator-state-mem { -+ regulator-on-in-suspend; -+ regulator-suspend-microvolt = <950000>; -+ }; -+ }; -+ -+ vcc_ddr: DCDC_REG3 { -+ regulator-name = "vcc_ddr"; -+ regulator-always-on; -+ regulator-boot-on; -+ -+ regulator-state-mem { -+ regulator-on-in-suspend; -+ }; -+ }; -+ -+ vcc_io_33: DCDC_REG4 { -+ regulator-name = "vcc_io_33"; -+ regulator-always-on; -+ regulator-boot-on; -+ regulator-min-microvolt = <3300000>; -+ regulator-max-microvolt = <3300000>; -+ -+ regulator-state-mem { -+ regulator-on-in-suspend; -+ regulator-suspend-microvolt = <3300000>; -+ }; -+ }; -+ -+ vcc_18: LDO_REG1 { -+ regulator-name = "vcc_18"; -+ regulator-always-on; -+ regulator-boot-on; -+ regulator-min-microvolt = <1800000>; -+ regulator-max-microvolt = <1800000>; -+ -+ regulator-state-mem { -+ regulator-on-in-suspend; -+ regulator-suspend-microvolt = <1800000>; -+ }; -+ }; -+ -+ vcc18_emmc: LDO_REG2 { -+ regulator-name = "vcc18_emmc"; -+ regulator-always-on; -+ regulator-boot-on; -+ regulator-min-microvolt = <1800000>; -+ regulator-max-microvolt = <1800000>; -+ -+ regulator-state-mem { -+ regulator-on-in-suspend; -+ regulator-suspend-microvolt = <1800000>; -+ }; -+ }; -+ -+ vdd_10: LDO_REG3 { -+ regulator-name = "vdd_10"; -+ regulator-always-on; -+ regulator-boot-on; -+ regulator-min-microvolt = <1000000>; -+ regulator-max-microvolt = <1000000>; -+ -+ regulator-state-mem { -+ regulator-on-in-suspend; -+ regulator-suspend-microvolt = <1000000>; -+ }; -+ }; -+ }; -+ }; -+}; -+ -+&io_domains { -+ pmuio-supply = <&vcc_io_33>; -+ vccio1-supply = <&vcc_io_33>; -+ vccio2-supply = <&vcc18_emmc>; -+ vccio3-supply = <&vcc_io_sdio>; -+ vccio4-supply = <&vcc_18>; -+ vccio5-supply = <&vcc_io_33>; -+ vccio6-supply = <&vcc_io_33>; -+ status = "okay"; -+}; -+ -+&pinctrl { -+ button { -+ reset_button_pin: reset-button-pin { -+ rockchip,pins = <0 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>; -+ }; -+ }; -+ -+ ethernet-phy { -+ eth_phy_reset_pin: eth-phy-reset-pin { -+ rockchip,pins = <1 RK_PC2 RK_FUNC_GPIO &pcfg_pull_down>; -+ }; -+ }; -+ -+ leds { -+ lan_led_pin: lan-led-pin { -+ rockchip,pins = <2 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>; -+ }; -+ -+ sys_led_pin: sys-led-pin { -+ rockchip,pins = <0 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>; -+ }; -+ -+ wan_led_pin: wan-led-pin { -+ rockchip,pins = <2 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>; -+ }; -+ }; -+ -+ pmic { -+ pmic_int_l: pmic-int-l { -+ rockchip,pins = <1 RK_PD0 RK_FUNC_GPIO &pcfg_pull_up>; -+ }; -+ }; -+ -+ sd { -+ sdio_vcc_pin: sdio-vcc-pin { -+ rockchip,pins = <1 RK_PD4 RK_FUNC_GPIO &pcfg_pull_up>; -+ }; -+ }; -+}; -+ -+&pwm2 { -+ status = "okay"; -+}; -+ -+&sdmmc { -+ bus-width = <4>; -+ cap-sd-highspeed; -+ disable-wp; -+ pinctrl-0 = <&sdmmc0_clk>, <&sdmmc0_cmd>, <&sdmmc0_dectn>, <&sdmmc0_bus4>; -+ pinctrl-names = "default"; -+ sd-uhs-sdr12; -+ sd-uhs-sdr25; -+ sd-uhs-sdr50; -+ sd-uhs-sdr104; -+ vmmc-supply = <&vcc_sd>; -+ vqmmc-supply = <&vcc_io_sdio>; -+ status = "okay"; -+}; -+ -+&tsadc { -+ rockchip,hw-tshut-mode = <0>; -+ rockchip,hw-tshut-polarity = <0>; -+ status = "okay"; -+}; -+ -+&u2phy { -+ status = "okay"; -+}; -+ -+&u2phy_host { -+ status = "okay"; -+}; -+ -+&u2phy_otg { -+ status = "okay"; -+}; -+ -+&uart2 { -+ status = "okay"; -+}; -+ -+&usb20_otg { -+ status = "okay"; -+ dr_mode = "host"; -+}; -+ -+&usb_host0_ehci { -+ status = "okay"; -+}; -+ -+&usb_host0_ohci { -+ status = "okay"; -+}; diff --git a/target/linux/rockchip/patches-5.4/004-arm64-dts-rockchip-Add-txpbl-node-for-RK3399-RK3328.patch b/target/linux/rockchip/patches-5.4/004-arm64-dts-rockchip-Add-txpbl-node-for-RK3399-RK3328.patch deleted file mode 100644 index 83ce8f1efb..0000000000 --- a/target/linux/rockchip/patches-5.4/004-arm64-dts-rockchip-Add-txpbl-node-for-RK3399-RK3328.patch +++ /dev/null @@ -1,54 +0,0 @@ -From 8a469ee35606ba65448d54e5a2a23302f7e79e3c Mon Sep 17 00:00:00 2001 -From: Carlos de Paula -Date: Tue, 18 Feb 2020 17:10:37 -0500 -Subject: [PATCH] arm64: dts: rockchip: Add txpbl node for RK3399/RK3328 - -Some rockchip SoCs like the RK3399 and RK3328 exhibit an issue -where tx checksumming does not work with packets larger than 1498. - -The default Programmable Buffer Length for TX in these GMAC's is -not suitable for MTUs higher than 1498. The workaround is to disable -TX offloading with 'ethtool -K eth0 tx off rx off' causing performance -impacts as it disables hardware checksumming. - -This patch sets snps,txpbl to 0x4 which is a safe number tested ok for -the most popular MTU value of 1500. - -For reference, see https://lkml.org/lkml/2019/4/1/1382. - -Signed-off-by: Carlos de Paula -Link: https://lore.kernel.org/r/20200218221040.10955-1-me@carlosedp.com -Signed-off-by: Heiko Stuebner ---- - arch/arm64/boot/dts/rockchip/rk3328.dtsi | 2 ++ - arch/arm64/boot/dts/rockchip/rk3399.dtsi | 1 + - 2 files changed, 3 insertions(+) - ---- a/arch/arm64/boot/dts/rockchip/rk3328.dtsi -+++ b/arch/arm64/boot/dts/rockchip/rk3328.dtsi -@@ -857,6 +857,7 @@ - resets = <&cru SRST_GMAC2IO_A>; - reset-names = "stmmaceth"; - rockchip,grf = <&grf>; -+ snps,txpbl = <0x4>; - status = "disabled"; - }; - -@@ -878,6 +879,7 @@ - reset-names = "stmmaceth", "mac-phy"; - phy-mode = "rmii"; - phy-handle = <&phy>; -+ snps,txpbl = <0x4>; - status = "disabled"; - - mdio { ---- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi -+++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi -@@ -291,6 +291,7 @@ - resets = <&cru SRST_A_GMAC>; - reset-names = "stmmaceth"; - rockchip,grf = <&grf>; -+ snps,txpbl = <0x4>; - status = "disabled"; - }; - diff --git a/target/linux/rockchip/patches-5.4/005-rockchip-rk3328-add-compatible-to-NanoPi-R2S-etherne.patch b/target/linux/rockchip/patches-5.4/005-rockchip-rk3328-add-compatible-to-NanoPi-R2S-etherne.patch deleted file mode 100644 index 897a42fea2..0000000000 --- a/target/linux/rockchip/patches-5.4/005-rockchip-rk3328-add-compatible-to-NanoPi-R2S-etherne.patch +++ /dev/null @@ -1,25 +0,0 @@ -From bc6c96d850419e71dbc9b0094ccc9b668ba9be43 Mon Sep 17 00:00:00 2001 -From: David Bauer -Date: Mon, 28 Sep 2020 22:54:52 +0200 -Subject: [PATCH] rockchip: rk3328: add compatible to NanoPi R2S ethernet PHY - -This adds the compatible property to the NanoPi R2S ethernet PHY node. -Otherwise, the PHY might not be probed, as the PHY ID reads all 0xff -when it is still in reset. - -Signed-off-by: David Bauer ---- - arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2s.dts | 2 ++ - 1 file changed, 2 insertions(+) - ---- a/arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2s.dts -+++ b/arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2s.dts -@@ -134,6 +134,8 @@ - #size-cells = <0>; - - rtl8211e: ethernet-phy@1 { -+ compatible = "ethernet-phy-id001c.c915", -+ "ethernet-phy-ieee802.3-c22"; - reg = <1>; - pinctrl-0 = <ð_phy_reset_pin>; - pinctrl-names = "default"; diff --git a/target/linux/rockchip/patches-5.4/006-rockchip-rk3328-fix-NanoPi-R2S-GMAC-clock-name.patch b/target/linux/rockchip/patches-5.4/006-rockchip-rk3328-fix-NanoPi-R2S-GMAC-clock-name.patch deleted file mode 100644 index 15c8ad71a6..0000000000 --- a/target/linux/rockchip/patches-5.4/006-rockchip-rk3328-fix-NanoPi-R2S-GMAC-clock-name.patch +++ /dev/null @@ -1,27 +0,0 @@ -From f2962ed3805c5b74948d00e4e6fbb33388261ba8 Mon Sep 17 00:00:00 2001 -From: David Bauer -Date: Sun, 4 Oct 2020 16:43:29 +0200 -Subject: [PATCH] rockchip: rk3328: fix NanoPi R2S GMAC clock name - -This commit fixes the name for the GMAC clock to gmac_clkin, as this is -the name of the clock provided by the rk3328-clk driver. - -Without this commit, the GMAC will not work in TX direction. - -Suggested-by: Tobias Waldvogel -Signed-off-by: David Bauer ---- - arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2s.dts | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - ---- a/arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2s.dts -+++ b/arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2s.dts -@@ -20,7 +20,7 @@ - gmac_clk: gmac-clock { - compatible = "fixed-clock"; - clock-frequency = <125000000>; -- clock-output-names = "gmac_clk"; -+ clock-output-names = "gmac_clkin"; - #clock-cells = <0>; - }; - diff --git a/target/linux/rockchip/patches-5.4/007-arm64-dts-rockchip-Add-RK3328-idle-state.patch b/target/linux/rockchip/patches-5.4/007-arm64-dts-rockchip-Add-RK3328-idle-state.patch deleted file mode 100644 index 874d4ddd44..0000000000 --- a/target/linux/rockchip/patches-5.4/007-arm64-dts-rockchip-Add-RK3328-idle-state.patch +++ /dev/null @@ -1,69 +0,0 @@ -From 4f279f9fbca54464173240f7e73b145a136dfa1e Mon Sep 17 00:00:00 2001 -From: Robin Murphy -Date: Sun, 29 Dec 2019 20:16:17 +0000 -Subject: arm64: dts: rockchip: Add RK3328 idle state - -Downstream RK3328 DTBs describe a CPU idle state matching that present -on other SoCs like RK3399. This works with upstream Trusted Firmware-A -too, so let's add it here. - -Signed-off-by: Robin Murphy -Link: https://lore.kernel.org/r/a8c83e705d387446ea8121516d410e38b2d9c57b.1577640736.git.robin.murphy@arm.com -Signed-off-by: Heiko Stuebner ---- - arch/arm64/boot/dts/rockchip/rk3328.dtsi | 17 +++++++++++++++++ - 1 file changed, 17 insertions(+) - ---- a/arch/arm64/boot/dts/rockchip/rk3328.dtsi -+++ b/arch/arm64/boot/dts/rockchip/rk3328.dtsi -@@ -41,6 +41,7 @@ - reg = <0x0 0x0>; - clocks = <&cru ARMCLK>; - #cooling-cells = <2>; -+ cpu-idle-states = <&CPU_SLEEP>; - dynamic-power-coefficient = <120>; - enable-method = "psci"; - next-level-cache = <&l2>; -@@ -53,6 +54,7 @@ - reg = <0x0 0x1>; - clocks = <&cru ARMCLK>; - #cooling-cells = <2>; -+ cpu-idle-states = <&CPU_SLEEP>; - dynamic-power-coefficient = <120>; - enable-method = "psci"; - next-level-cache = <&l2>; -@@ -65,6 +67,7 @@ - reg = <0x0 0x2>; - clocks = <&cru ARMCLK>; - #cooling-cells = <2>; -+ cpu-idle-states = <&CPU_SLEEP>; - dynamic-power-coefficient = <120>; - enable-method = "psci"; - next-level-cache = <&l2>; -@@ -77,12 +80,26 @@ - reg = <0x0 0x3>; - clocks = <&cru ARMCLK>; - #cooling-cells = <2>; -+ cpu-idle-states = <&CPU_SLEEP>; - dynamic-power-coefficient = <120>; - enable-method = "psci"; - next-level-cache = <&l2>; - operating-points-v2 = <&cpu0_opp_table>; - }; - -+ idle-states { -+ entry-method = "psci"; -+ -+ CPU_SLEEP: cpu-sleep { -+ compatible = "arm,idle-state"; -+ local-timer-stop; -+ arm,psci-suspend-param = <0x0010000>; -+ entry-latency-us = <120>; -+ exit-latency-us = <250>; -+ min-residency-us = <900>; -+ }; -+ }; -+ - l2: l2-cache0 { - compatible = "cache"; - }; diff --git a/target/linux/rockchip/patches-5.4/008-rockchip-add-hwmon-support-for-SoCs-and-GPUs.patch b/target/linux/rockchip/patches-5.4/008-rockchip-add-hwmon-support-for-SoCs-and-GPUs.patch deleted file mode 100644 index 7ea18e41ac..0000000000 --- a/target/linux/rockchip/patches-5.4/008-rockchip-add-hwmon-support-for-SoCs-and-GPUs.patch +++ /dev/null @@ -1,53 +0,0 @@ -From d27970b82a0f552f70e76fab154855b3192aac23 Mon Sep 17 00:00:00 2001 -From: Stefan Schaeckeler -Date: Wed, 11 Dec 2019 22:17:02 -0800 -Subject: thermal: rockchip: Enable hwmon - -By default, of-based thermal drivers do not enable hwmon. -Explicitly enable hwmon for both, the soc and gpu temperature -sensor. - -Signed-off-by: Stefan Schaeckeler -Tested-by: Daniel Lezcano -Signed-off-by: Daniel Lezcano -Link: https://lore.kernel.org/r/20191212061702.BFE2D6E85603@corona.crabdance.com ---- - drivers/thermal/rockchip_thermal.c | 12 +++++++++++- - 1 file changed, 11 insertions(+), 1 deletion(-) - ---- a/drivers/thermal/rockchip_thermal.c -+++ b/drivers/thermal/rockchip_thermal.c -@@ -58,6 +58,8 @@ enum adc_sort_mode { - ADC_INCREMENT, - }; - -+#include "thermal_hwmon.h" -+ - /** - * The max sensors is two in rockchip SoCs. - * Two sensors: CPU and GPU sensor. -@@ -1321,8 +1323,15 @@ static int rockchip_thermal_probe(struct - - thermal->chip->control(thermal->regs, true); - -- for (i = 0; i < thermal->chip->chn_num; i++) -+ for (i = 0; i < thermal->chip->chn_num; i++) { - rockchip_thermal_toggle_sensor(&thermal->sensors[i], true); -+ thermal->sensors[i].tzd->tzp->no_hwmon = false; -+ error = thermal_add_hwmon_sysfs(thermal->sensors[i].tzd); -+ if (error) -+ dev_warn(&pdev->dev, -+ "failed to register sensor %d with hwmon: %d\n", -+ i, error); -+ } - - platform_set_drvdata(pdev, thermal); - -@@ -1344,6 +1353,7 @@ static int rockchip_thermal_remove(struc - for (i = 0; i < thermal->chip->chn_num; i++) { - struct rockchip_thermal_sensor *sensor = &thermal->sensors[i]; - -+ thermal_remove_hwmon_sysfs(sensor->tzd); - rockchip_thermal_toggle_sensor(sensor, false); - } - diff --git a/target/linux/rockchip/patches-5.4/009-v5.13-rockchip-rk3399-Add-support-for-FriendlyARM-NanoPi-R.patch b/target/linux/rockchip/patches-5.4/009-v5.13-rockchip-rk3399-Add-support-for-FriendlyARM-NanoPi-R.patch deleted file mode 100644 index c508d71317..0000000000 --- a/target/linux/rockchip/patches-5.4/009-v5.13-rockchip-rk3399-Add-support-for-FriendlyARM-NanoPi-R.patch +++ /dev/null @@ -1,177 +0,0 @@ -From db792e9adbf85ffc9d6b0b060ac3c8e3148c8992 Mon Sep 17 00:00:00 2001 -From: Tianling Shen -Date: Fri, 19 Mar 2021 13:16:27 +0800 -Subject: [PATCH] rockchip: rk3399: Add support for FriendlyARM NanoPi R4S - -This adds support for the NanoPi R4S from FriendlyArm. - -Rockchip RK3399 SoC -1GB DDR3 or 4GB LPDDR4 RAM -Gigabit Ethernet (WAN) -Gigabit Ethernet (PCIe) (LAN) -USB 3.0 Port x 2 -MicroSD slot -Reset button -WAN - LAN - SYS LED - -Co-developed-by: Jensen Huang -Signed-off-by: Jensen Huang -[minor adjustments] -Co-developed-by: Marty Jones -Signed-off-by: Marty Jones -[further adjustments, fixed format issues] -Signed-off-by: Tianling Shen -Link: https://lore.kernel.org/r/20210319051627.814-2-cnsztl@gmail.com -Signed-off-by: Heiko Stuebner ---- - arch/arm64/boot/dts/rockchip/Makefile | 1 + - .../boot/dts/rockchip/rk3399-nanopi-r4s.dts | 133 +++++++++++++++++++++ - 2 files changed, 134 insertions(+) - create mode 100644 arch/arm64/boot/dts/rockchip/rk3399-nanopi-r4s.dts - ---- a/arch/arm64/boot/dts/rockchip/Makefile -+++ b/arch/arm64/boot/dts/rockchip/Makefile -@@ -25,6 +25,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-le - dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-nanopc-t4.dtb - dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-nanopi-m4.dtb - dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-nanopi-neo4.dtb -+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-nanopi-r4s.dtb - dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-orangepi.dtb - dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-puma-haikou.dtb - dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-roc-pc.dtb ---- /dev/null -+++ b/arch/arm64/boot/dts/rockchip/rk3399-nanopi-r4s.dts -@@ -0,0 +1,133 @@ -+// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -+/* -+ * FriendlyElec NanoPC-T4 board device tree source -+ * -+ * Copyright (c) 2020 FriendlyElec Computer Tech. Co., Ltd. -+ * (http://www.friendlyarm.com) -+ * -+ * Copyright (c) 2018 Collabora Ltd. -+ * -+ * Copyright (c) 2020 Jensen Huang -+ * Copyright (c) 2020 Marty Jones -+ * Copyright (c) 2021 Tianling Shen -+ */ -+ -+/dts-v1/; -+#include "rk3399-nanopi4.dtsi" -+ -+/ { -+ model = "FriendlyElec NanoPi R4S"; -+ compatible = "friendlyarm,nanopi-r4s", "rockchip,rk3399"; -+ -+ /delete-node/ display-subsystem; -+ -+ gpio-leds { -+ pinctrl-0 = <&lan_led_pin>, <&sys_led_pin>, <&wan_led_pin>; -+ -+ /delete-node/ status; -+ -+ lan_led: led-lan { -+ gpios = <&gpio1 RK_PA1 GPIO_ACTIVE_HIGH>; -+ label = "green:lan"; -+ }; -+ -+ sys_led: led-sys { -+ gpios = <&gpio0 RK_PB5 GPIO_ACTIVE_HIGH>; -+ label = "red:sys"; -+ default-state = "on"; -+ }; -+ -+ wan_led: led-wan { -+ gpios = <&gpio1 RK_PA0 GPIO_ACTIVE_HIGH>; -+ label = "green:wan"; -+ }; -+ }; -+ -+ gpio-keys { -+ pinctrl-0 = <&reset_button_pin>; -+ -+ /delete-node/ power; -+ -+ reset { -+ debounce-interval = <50>; -+ gpios = <&gpio1 RK_PC6 GPIO_ACTIVE_LOW>; -+ label = "reset"; -+ linux,code = ; -+ }; -+ }; -+ -+ vdd_5v: vdd-5v { -+ compatible = "regulator-fixed"; -+ regulator-name = "vdd_5v"; -+ regulator-always-on; -+ regulator-boot-on; -+ }; -+}; -+ -+&emmc_phy { -+ status = "disabled"; -+}; -+ -+&i2c4 { -+ status = "disabled"; -+}; -+ -+&pcie0 { -+ max-link-speed = <1>; -+ num-lanes = <1>; -+ vpcie3v3-supply = <&vcc3v3_sys>; -+}; -+ -+&pinctrl { -+ gpio-leds { -+ /delete-node/ leds-gpio; -+ -+ lan_led_pin: lan-led-pin { -+ rockchip,pins = <1 RK_PA1 RK_FUNC_GPIO &pcfg_pull_none>; -+ }; -+ -+ sys_led_pin: sys-led-pin { -+ rockchip,pins = <0 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>; -+ }; -+ -+ wan_led_pin: wan-led-pin { -+ rockchip,pins = <1 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>; -+ }; -+ }; -+ -+ rockchip-key { -+ /delete-node/ power-key; -+ -+ reset_button_pin: reset-button-pin { -+ rockchip,pins = <1 RK_PC6 RK_FUNC_GPIO &pcfg_pull_up>; -+ }; -+ }; -+}; -+ -+&sdhci { -+ status = "disabled"; -+}; -+ -+&sdio0 { -+ status = "disabled"; -+}; -+ -+&u2phy0_host { -+ phy-supply = <&vdd_5v>; -+}; -+ -+&u2phy1_host { -+ status = "disabled"; -+}; -+ -+&uart0 { -+ status = "disabled"; -+}; -+ -+&usbdrd_dwc3_0 { -+ dr_mode = "host"; -+}; -+ -+&vcc3v3_sys { -+ vin-supply = <&vcc5v0_sys>; -+}; diff --git a/target/linux/rockchip/patches-5.4/010-arm64-dts-rockchip-add-EEPROM-node-for-NanoPi-R4S.patch b/target/linux/rockchip/patches-5.4/010-arm64-dts-rockchip-add-EEPROM-node-for-NanoPi-R4S.patch deleted file mode 100644 index cd6640f944..0000000000 --- a/target/linux/rockchip/patches-5.4/010-arm64-dts-rockchip-add-EEPROM-node-for-NanoPi-R4S.patch +++ /dev/null @@ -1,40 +0,0 @@ -From 43f3999d1836117ab2e601aec9a9e6f292ce4958 Mon Sep 17 00:00:00 2001 -From: Tianling Shen -Date: Mon, 7 Jun 2021 15:45:37 +0800 -Subject: [PATCH] arm64: dts: rockchip: add EEPROM node for NanoPi R4S - -NanoPi R4S has a EEPROM attached to the 2nd I2C bus (U92), which -stores the MAC address. - -Signed-off-by: Tianling Shen ---- - .../boot/dts/rockchip/rk3399-nanopi-r4s.dts | 18 ++++++++++++++++++ - 1 file changed, 18 insertions(+) - ---- a/arch/arm64/boot/dts/rockchip/rk3399-nanopi-r4s.dts -+++ b/arch/arm64/boot/dts/rockchip/rk3399-nanopi-r4s.dts -@@ -68,6 +68,24 @@ - status = "disabled"; - }; - -+&gmac { -+ nvmem-cells = <&mac_address>; -+ nvmem-cell-names = "mac-address"; -+}; -+ -+&i2c2 { -+ eeprom@51 { -+ compatible = "microchip,24c02", "atmel,24c02"; -+ reg = <0x51>; -+ pagesize = <16>; -+ size = <256>; -+ -+ mac_address: mac-address@fa { -+ reg = <0xfa 0x06>; -+ }; -+ }; -+}; -+ - &i2c4 { - status = "disabled"; - }; diff --git a/target/linux/rockchip/patches-5.4/100-rockchip-use-system-LED-for-OpenWrt.patch b/target/linux/rockchip/patches-5.4/100-rockchip-use-system-LED-for-OpenWrt.patch deleted file mode 100644 index d0860de8c9..0000000000 --- a/target/linux/rockchip/patches-5.4/100-rockchip-use-system-LED-for-OpenWrt.patch +++ /dev/null @@ -1,47 +0,0 @@ -From 6731d2c9039fbe1ecf21915eab3acee0a999508a Mon Sep 17 00:00:00 2001 -From: David Bauer -Date: Fri, 10 Jul 2020 21:38:20 +0200 -Subject: [PATCH] rockchip: use system LED for OpenWrt - -Use the SYS LED on the casing for showing system status. - -This patch is kept separate from the NanoPi R2S support patch, as i plan -on submitting the device support upstream. - -Signed-off-by: David Bauer ---- - arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2s.dts | 9 ++++++++- - 1 file changed, 8 insertions(+), 1 deletion(-) - ---- a/arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2s.dts -+++ b/arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2s.dts -@@ -13,6 +13,13 @@ - model = "FriendlyElec NanoPi R2S"; - compatible = "friendlyarm,nanopi-r2s", "rockchip,rk3328"; - -+ aliases { -+ led-boot = &sys_led; -+ led-failsafe = &sys_led; -+ led-running = &sys_led; -+ led-upgrade = &sys_led; -+ }; -+ - chosen { - stdout-path = "serial2:1500000n8"; - }; ---- a/arch/arm64/boot/dts/rockchip/rk3399-nanopi-r4s.dts -+++ b/arch/arm64/boot/dts/rockchip/rk3399-nanopi-r4s.dts -@@ -19,6 +19,13 @@ - model = "FriendlyElec NanoPi R4S"; - compatible = "friendlyarm,nanopi-r4s", "rockchip,rk3399"; - -+ aliases { -+ led-boot = &sys_led; -+ led-failsafe = &sys_led; -+ led-running = &sys_led; -+ led-upgrade = &sys_led; -+ }; -+ - /delete-node/ display-subsystem; - - gpio-leds { diff --git a/target/linux/rockchip/patches-5.4/101-dts-rockchip-add-usb3-controller-node-for-RK3328-SoCs.patch b/target/linux/rockchip/patches-5.4/101-dts-rockchip-add-usb3-controller-node-for-RK3328-SoCs.patch deleted file mode 100644 index 621b25abca..0000000000 --- a/target/linux/rockchip/patches-5.4/101-dts-rockchip-add-usb3-controller-node-for-RK3328-SoCs.patch +++ /dev/null @@ -1,62 +0,0 @@ -From: William Wu - -RK3328 has one USB 3.0 OTG controller which uses DWC_USB3 -core's general architecture. It can act as static xHCI host -controller, static device controller, USB 3.0/2.0 OTG basing -on ID of USB3.0 PHY. - -Signed-off-by: William Wu -Signed-off-by: Leonidas P. Papadakos - ---- - -NOTE: This binding still has issues. From the original thread: - -the rk3328 usb3-phy has an issue with detecting any plugin events -after a previous device got removed - see the inno-usb3-phy driver -in the vendor kernel. - -The current state is good-enough for enabling the USB3 attached LAN -port of the NanoPi R2S. However, it might explode depending on your -use-case. You've been warned. - ---- - arch/arm64/boot/dts/rockchip/rk3328.dtsi | 27 ++++++++++++++++++++++++ - 1 file changed, 27 insertions(+) - ---- a/arch/arm64/boot/dts/rockchip/rk3328.dtsi -+++ b/arch/arm64/boot/dts/rockchip/rk3328.dtsi -@@ -955,6 +955,33 @@ - status = "disabled"; - }; - -+ usbdrd3: usb@ff600000 { -+ compatible = "rockchip,rk3328-dwc3", "rockchip,rk3399-dwc3"; -+ clocks = <&cru SCLK_USB3OTG_REF>, <&cru SCLK_USB3OTG_SUSPEND>, -+ <&cru ACLK_USB3OTG>; -+ clock-names = "ref_clk", "suspend_clk", -+ "bus_clk"; -+ #address-cells = <2>; -+ #size-cells = <2>; -+ ranges; -+ status = "disabled"; -+ -+ usbdrd_dwc3: dwc3@ff600000 { -+ compatible = "snps,dwc3"; -+ reg = <0x0 0xff600000 0x0 0x100000>; -+ interrupts = ; -+ dr_mode = "otg"; -+ phy_type = "utmi_wide"; -+ snps,dis_enblslpm_quirk; -+ snps,dis-u2-freeclk-exists-quirk; -+ snps,dis_u2_susphy_quirk; -+ snps,dis_u3_susphy_quirk; -+ snps,dis-del-phy-power-chg-quirk; -+ snps,dis-tx-ipgap-linecheck-quirk; -+ status = "disabled"; -+ }; -+ }; -+ - gic: interrupt-controller@ff811000 { - compatible = "arm,gic-400"; - #interrupt-cells = <3>; diff --git a/target/linux/rockchip/patches-5.4/102-rockchip-enable-LAN-port-on-NanoPi-R2S.patch b/target/linux/rockchip/patches-5.4/102-rockchip-enable-LAN-port-on-NanoPi-R2S.patch deleted file mode 100644 index 37dcb88948..0000000000 --- a/target/linux/rockchip/patches-5.4/102-rockchip-enable-LAN-port-on-NanoPi-R2S.patch +++ /dev/null @@ -1,60 +0,0 @@ -From 7cde8541d04e0ade5d126bdada3cf0c0429eaa99 Mon Sep 17 00:00:00 2001 -From: David Bauer -Date: Fri, 10 Jul 2020 21:12:16 +0200 -Subject: [PATCH] rockchip: enabled LAN port on NanoPi R2S - -Enable the USB3 port on the FriendlyARM NanoPi R2S. -This is required for the USB3 attached LAN port to work. - -Signed-off-by: David Bauer ---- - .../boot/dts/rockchip/rk3328-nanopi-r2s.dts | 27 +++++++++++++++++++ - 1 file changed, 27 insertions(+) - ---- a/arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2s.dts -+++ b/arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2s.dts -@@ -103,6 +103,18 @@ - regulator-min-microvolt = <5000000>; - regulator-max-microvolt = <5000000>; - }; -+ -+ vcc_rtl8153: vcc-rtl8153-regulator { -+ compatible = "regulator-fixed"; -+ gpio = <&gpio2 RK_PC6 GPIO_ACTIVE_HIGH>; -+ pinctrl-names = "default"; -+ pinctrl-0 = <&rtl8153_en_drv>; -+ regulator-always-on; -+ regulator-name = "vcc_rtl8153"; -+ regulator-min-microvolt = <5000000>; -+ regulator-max-microvolt = <5000000>; -+ enable-active-high; -+ }; - }; - - &cpu0 { -@@ -320,6 +332,12 @@ - rockchip,pins = <1 RK_PD4 RK_FUNC_GPIO &pcfg_pull_up>; - }; - }; -+ -+ usb { -+ rtl8153_en_drv: rtl8153-en-drv { -+ rockchip,pins = <2 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>; -+ }; -+ }; - }; - - &pwm2 { -@@ -375,3 +393,12 @@ - &usb_host0_ohci { - status = "okay"; - }; -+ -+&usbdrd3 { -+ status = "okay"; -+}; -+ -+&usbdrd_dwc3 { -+ dr_mode = "host"; -+ status = "okay"; -+}; diff --git a/target/linux/rockchip/patches-5.4/103-arm64-rockchip-add-OF-node-for-USB-eth-on-NanoPi-R2S.patch b/target/linux/rockchip/patches-5.4/103-arm64-rockchip-add-OF-node-for-USB-eth-on-NanoPi-R2S.patch deleted file mode 100644 index e318f3136f..0000000000 --- a/target/linux/rockchip/patches-5.4/103-arm64-rockchip-add-OF-node-for-USB-eth-on-NanoPi-R2S.patch +++ /dev/null @@ -1,28 +0,0 @@ -From 2795c8b31a686bdb8338f9404d18ef7a154f0d75 Mon Sep 17 00:00:00 2001 -From: David Bauer -Date: Sun, 26 Jul 2020 13:32:59 +0200 -Subject: [PATCH] arm64: rockchip: add OF node for USB eth on NanoPi R2S - -This adds the OF node for the USB3 ethernet adapter on the FriendlyARM -NanoPi R2S. Add the correct value for the RTL8153 LED configuration -register to match the blink behavior of the other port on the device. - -Signed-off-by: David Bauer ---- - arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2s.dts | 7 +++++++ - 1 file changed, 7 insertions(+) - ---- a/arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2s.dts -+++ b/arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2s.dts -@@ -401,4 +401,11 @@ - &usbdrd_dwc3 { - dr_mode = "host"; - status = "okay"; -+ -+ usb-eth@2 { -+ compatible = "realtek,rtl8153"; -+ reg = <2>; -+ -+ realtek,led-data = <0x87>; -+ }; - }; diff --git a/target/linux/rockchip/patches-5.4/104-rockchip-use-USB-host-by-default-on-rk3399-rock-pi-4.patch b/target/linux/rockchip/patches-5.4/104-rockchip-use-USB-host-by-default-on-rk3399-rock-pi-4.patch deleted file mode 100644 index 1abab5e2eb..0000000000 --- a/target/linux/rockchip/patches-5.4/104-rockchip-use-USB-host-by-default-on-rk3399-rock-pi-4.patch +++ /dev/null @@ -1,32 +0,0 @@ -From e12f67fe83446432ef16704c22ec23bd1dbcd094 Mon Sep 17 00:00:00 2001 -From: Vicente Bergas -Date: Tue, 1 Dec 2020 16:41:32 +0100 -Subject: arm64: dts: rockchip: use USB host by default on rk3399-rock-pi-4 - -Based on the board schematics at -https://dl.radxa.com/rockpi4/docs/hw/rockpi4/rockpi_4c_v12_sch_20200620.pdf -on page 19 there is an USB Type-A receptacle being used as an USB-OTG port. - -But the Type-A connector is not valid for OTG operation, for this reason -there is a switch to select host or device role. -This is non-compliant and error prone because switching is manual. -So, use host mode as it corresponds for a Type-A receptacle. - -Signed-off-by: Vicente Bergas -Link: https://lore.kernel.org/r/20201201154132.1286-4-vicencb@gmail.com -Signed-off-by: Heiko Stuebner ---- - arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4.dts | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - ---- a/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4.dts -+++ b/arch/arm64/boot/dts/rockchip/rk3399-rock-pi-4.dts -@@ -684,7 +684,7 @@ - - &usbdrd_dwc3_0 { - status = "okay"; -- dr_mode = "otg"; -+ dr_mode = "host"; - }; - - &usbdrd3_1 { diff --git a/target/linux/rockchip/patches-5.4/105-mmc-core-set-initial-signal-voltage-on-power-off.patch b/target/linux/rockchip/patches-5.4/105-mmc-core-set-initial-signal-voltage-on-power-off.patch deleted file mode 100644 index d462899007..0000000000 --- a/target/linux/rockchip/patches-5.4/105-mmc-core-set-initial-signal-voltage-on-power-off.patch +++ /dev/null @@ -1,35 +0,0 @@ -From 0d329112c709d6cfedf0fffb19f0cc6b19043f6b Mon Sep 17 00:00:00 2001 -From: Jonas Karlman -Date: Wed, 20 Feb 2019 07:38:34 +0000 -Subject: [PATCH] mmc: core: set initial signal voltage on power off - -Some boards have SD card connectors where the power rail cannot be switched -off by the driver. If the card has not been power cycled, it may still be -using 1.8V signaling after a warm re-boot. Bootroms expecting 3.3V signaling -will fail to boot from a UHS card that continue to use 1.8V signaling. - -Set initial signal voltage in mmc_power_off() to allow re-boot to function. - -This fixes re-boot with UHS cards on Asus Tinker Board (Rockchip RK3288), -same issue have been seen on some Rockchip RK3399 boards. - -I am sending this as a RFC because I have no insights into SD/MMC subsystem, -this change fix a re-boot issue on my boards and does not break emmc/sdio. -Is this an acceptable workaround? Any advice is appreciated. - -Signed-off-by: Jonas Karlman ---- - drivers/mmc/core/core.c | 2 ++ - 1 file changed, 2 insertions(+) - ---- a/drivers/mmc/core/core.c -+++ b/drivers/mmc/core/core.c -@@ -1371,6 +1371,8 @@ void mmc_power_off(struct mmc_host *host - - mmc_pwrseq_power_off(host); - -+ mmc_set_initial_signal_voltage(host); -+ - host->ios.clock = 0; - host->ios.vdd = 0; - diff --git a/target/linux/rockchip/patches-5.4/106-arm64-rockchip-add-OF-node-for-pcie-eth-on-NanoPi-R4S.patch b/target/linux/rockchip/patches-5.4/106-arm64-rockchip-add-OF-node-for-pcie-eth-on-NanoPi-R4S.patch deleted file mode 100644 index 563a7f6df5..0000000000 --- a/target/linux/rockchip/patches-5.4/106-arm64-rockchip-add-OF-node-for-pcie-eth-on-NanoPi-R4S.patch +++ /dev/null @@ -1,22 +0,0 @@ ---- a/arch/arm64/boot/dts/rockchip/rk3399-nanopi-r4s.dts -+++ b/arch/arm64/boot/dts/rockchip/rk3399-nanopi-r4s.dts -@@ -101,6 +101,19 @@ - max-link-speed = <1>; - num-lanes = <1>; - vpcie3v3-supply = <&vcc3v3_sys>; -+ -+ pcie@0 { -+ reg = <0x00000000 0 0 0 0>; -+ #address-cells = <3>; -+ #size-cells = <2>; -+ -+ pcie-eth@0,0 { -+ compatible = "realtek,r8168"; -+ reg = <0x000000 0 0 0 0>; -+ -+ realtek,led-data = <0x870>; -+ }; -+ }; - }; - - &pinctrl { diff --git a/target/linux/rockchip/patches-5.4/201-rockchip-rk3328-add-i2c0-controller-for-nanopi-r2s.patch b/target/linux/rockchip/patches-5.4/201-rockchip-rk3328-add-i2c0-controller-for-nanopi-r2s.patch deleted file mode 100644 index 28798047fd..0000000000 --- a/target/linux/rockchip/patches-5.4/201-rockchip-rk3328-add-i2c0-controller-for-nanopi-r2s.patch +++ /dev/null @@ -1,22 +0,0 @@ -From 3b7eb946b1d640d684a921e53e1e50985ab7eb89 Mon Sep 17 00:00:00 2001 -From: QiuSimons <45143996+QiuSimons@users.noreply.github.com> -Date: Tue, 4 Aug 2020 20:17:53 +0800 -Subject: [PATCH] rockchip: rk3328: add i2c0 controller for nanopi r2s - ---- - arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2s.dts | 4 ++++ - 1 files changed, 4 insertions(+) - ---- a/arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2s.dts -+++ b/arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2s.dts -@@ -165,6 +165,10 @@ - }; - }; - -+&i2c0 { -+ status = "okay"; -+}; -+ - &i2c1 { - status = "okay"; - diff --git a/target/linux/rockchip/patches-5.4/202-rockchip-rk3328-Add-support-for-OrangePi-R1-Plus.patch b/target/linux/rockchip/patches-5.4/202-rockchip-rk3328-Add-support-for-OrangePi-R1-Plus.patch deleted file mode 100644 index de9d9beee1..0000000000 --- a/target/linux/rockchip/patches-5.4/202-rockchip-rk3328-Add-support-for-OrangePi-R1-Plus.patch +++ /dev/null @@ -1,52 +0,0 @@ ---- a/arch/arm64/boot/dts/rockchip/Makefile -+++ b/arch/arm64/boot/dts/rockchip/Makefile -@@ -2,6 +2,7 @@ - dtb-$(CONFIG_ARCH_ROCKCHIP) += px30-evb.dtb - dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-evb.dtb - dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-nanopi-r2s.dtb -+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-orangepi-r1-plus.dtb - dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-rock64.dtb - dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-roc-cc.dtb - dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3368-evb-act8846.dtb ---- /dev/null -+++ b/arch/arm64/boot/dts/rockchip/rk3328-orangepi-r1-plus.dts -@@ -0,0 +1,39 @@ -+// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -+#include "rk3328-nanopi-r2s.dts" -+ -+/ { -+ model = "Xunlong Orange Pi R1 Plus"; -+ compatible = "xunlong,orangepi-r1-plus", "rockchip,rk3328"; -+}; -+ -+&lan_led { -+ label = "orangepi-r1-plus:green:lan"; -+}; -+ -+&spi0 { -+ max-freq = <48000000>; -+ status = "okay"; -+ -+ flash@0 { -+ compatible = "jedec,spi-nor"; -+ reg = <0>; -+ spi-max-frequency = <10000000>; -+ }; -+}; -+ -+&sys_led { -+ gpios = <&gpio3 RK_PC5 GPIO_ACTIVE_HIGH>; -+ label = "orangepi-r1-plus:red:sys"; -+}; -+ -+&sys_led_pin { -+ rockchip,pins = <3 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>; -+}; -+ -+&uart1 { -+ status = "okay"; -+}; -+ -+&wan_led { -+ label = "orangepi-r1-plus:green:wan"; -+}; diff --git a/target/linux/rockchip/patches-5.4/203-rockchip-rk3328-Add-support-for-FriendlyARM-NanoPi-R.patch b/target/linux/rockchip/patches-5.4/203-rockchip-rk3328-Add-support-for-FriendlyARM-NanoPi-R.patch deleted file mode 100644 index 9e6dc67e6e..0000000000 --- a/target/linux/rockchip/patches-5.4/203-rockchip-rk3328-Add-support-for-FriendlyARM-NanoPi-R.patch +++ /dev/null @@ -1,60 +0,0 @@ ---- a/arch/arm64/boot/dts/rockchip/Makefile -+++ b/arch/arm64/boot/dts/rockchip/Makefile -@@ -1,6 +1,7 @@ - # SPDX-License-Identifier: GPL-2.0 - dtb-$(CONFIG_ARCH_ROCKCHIP) += px30-evb.dtb - dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-evb.dtb -+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-nanopi-r2c.dtb - dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-nanopi-r2s.dtb - dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-orangepi-r1-plus.dtb - dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3328-rock64.dtb ---- /dev/null -+++ b/arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2c.dts -@@ -0,0 +1,47 @@ -+// SPDX-License-Identifier: (GPL-2.0+ OR MIT) -+/* -+ * Copyright (c) 2021 FriendlyElec Computer Tech. Co., Ltd. -+ * (http://www.friendlyarm.com) -+ * -+ * Copyright (c) 2021 Tianling Shen -+ */ -+ -+/dts-v1/; -+ -+#include "rk3328-nanopi-r2s.dts" -+ -+/ { -+ model = "FriendlyElec NanoPi R2C"; -+ compatible = "friendlyarm,nanopi-r2c", "rockchip,rk3328"; -+}; -+ -+&gmac2io { -+ phy-handle = <&yt8521s>; -+ -+ mdio { -+ /delete-node/ ethernet-phy@1; -+ -+ yt8521s: ethernet-phy@3 { -+ compatible = "ethernet-phy-id0000.011a", -+ "ethernet-phy-ieee802.3-c22"; -+ reg = <3>; -+ pinctrl-0 = <ð_phy_reset_pin>; -+ pinctrl-names = "default"; -+ reset-assert-us = <10000>; -+ reset-deassert-us = <50000>; -+ reset-gpios = <&gpio1 RK_PC2 GPIO_ACTIVE_LOW>; -+ }; -+ }; -+}; -+ -+&lan_led { -+ label = "nanopi-r2c:green:lan"; -+}; -+ -+&sys_led { -+ label = "nanopi-r2c:red:sys"; -+}; -+ -+&wan_led { -+ label = "nanopi-r2c:green:wan"; -+}; diff --git a/target/linux/rockchip/patches-5.4/600-net-phy-Add-driver-for-Motorcomm-YT85xx-PHYs.patch b/target/linux/rockchip/patches-5.4/600-net-phy-Add-driver-for-Motorcomm-YT85xx-PHYs.patch deleted file mode 100644 index 2271308b1a..0000000000 --- a/target/linux/rockchip/patches-5.4/600-net-phy-Add-driver-for-Motorcomm-YT85xx-PHYs.patch +++ /dev/null @@ -1,457 +0,0 @@ -From 5d6862cc5eac1679d7a4ef388f7c9bbc70e76770 Mon Sep 17 00:00:00 2001 -From: hmz007 -Date: Mon, 5 Jul 2021 17:03:00 +0800 -Subject: [PATCH] net: phy: Add driver for Motorcomm YT85xx PHYs - -Signed-off-by: hmz007 ---- - drivers/net/phy/Kconfig | 5 + - drivers/net/phy/Makefile | 1 + - drivers/net/phy/motorcomm.c | 346 ++++++++++++++++++++++++++++++++++ - include/linux/motorcomm_phy.h | 68 +++++++ - 4 files changed, 420 insertions(+) - create mode 100644 drivers/net/phy/motorcomm.c - create mode 100644 include/linux/motorcomm_phy.h - ---- a/drivers/net/phy/Kconfig -+++ b/drivers/net/phy/Kconfig -@@ -519,6 +519,11 @@ config MICROSEMI_PHY - ---help--- - Currently supports VSC8514, VSC8530, VSC8531, VSC8540 and VSC8541 PHYs - -+config MOTORCOMM_PHY -+ tristate "Motorcomm PHYs" -+ ---help--- -+ Supports the YT8010, YT8510, YT8511, YT8512 PHYs. -+ - config NATIONAL_PHY - tristate "National Semiconductor PHYs" - ---help--- ---- a/drivers/net/phy/Makefile -+++ b/drivers/net/phy/Makefile -@@ -98,6 +98,7 @@ obj-$(CONFIG_MICREL_PHY) += micrel.o - obj-$(CONFIG_MICROCHIP_PHY) += microchip.o - obj-$(CONFIG_MICROCHIP_T1_PHY) += microchip_t1.o - obj-$(CONFIG_MICROSEMI_PHY) += mscc.o -+obj-$(CONFIG_MOTORCOMM_PHY) += motorcomm.o - obj-$(CONFIG_NATIONAL_PHY) += national.o - obj-$(CONFIG_NXP_TJA11XX_PHY) += nxp-tja11xx.o - obj-$(CONFIG_QSEMI_PHY) += qsemi.o ---- /dev/null -+++ b/drivers/net/phy/motorcomm.c -@@ -0,0 +1,345 @@ -+/* -+ * drivers/net/phy/motorcomm.c -+ * -+ * Driver for Motorcomm PHYs -+ * -+ * Author: Leilei Zhao -+ * -+ * Copyright (c) 2019 Motorcomm, Inc. -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License as published by the -+ * Free Software Foundation; either version 2 of the License, or (at your -+ * option) any later version. -+ * -+ * Support : Motorcomm Phys: -+ * Giga phys: yt8511, yt8521 -+ * 100/10 Phys : yt8512, yt8512b, yt8510 -+ * Automotive 100Mb Phys : yt8010 -+ * Automotive 100/10 hyper range Phys: yt8510 -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+#include -+ -+static int ytphy_read_ext(struct phy_device *phydev, u32 regnum) -+{ -+ int ret; -+ int val; -+ -+ ret = phy_write(phydev, REG_DEBUG_ADDR_OFFSET, regnum); -+ if (ret < 0) -+ return ret; -+ -+ val = phy_read(phydev, REG_DEBUG_DATA); -+ -+ return val; -+} -+ -+static int ytphy_write_ext(struct phy_device *phydev, u32 regnum, u16 val) -+{ -+ int ret; -+ -+ ret = phy_write(phydev, REG_DEBUG_ADDR_OFFSET, regnum); -+ if (ret < 0) -+ return ret; -+ -+ ret = phy_write(phydev, REG_DEBUG_DATA, val); -+ -+ return ret; -+} -+ -+static int yt8010_config_aneg(struct phy_device *phydev) -+{ -+ phydev->speed = SPEED_100; -+ return 0; -+} -+ -+static int yt8512_clk_init(struct phy_device *phydev) -+{ -+ int ret; -+ int val; -+ -+ val = ytphy_read_ext(phydev, YT8512_EXTREG_AFE_PLL); -+ if (val < 0) -+ return val; -+ -+ val |= YT8512_CONFIG_PLL_REFCLK_SEL_EN; -+ -+ ret = ytphy_write_ext(phydev, YT8512_EXTREG_AFE_PLL, val); -+ if (ret < 0) -+ return ret; -+ -+ val = ytphy_read_ext(phydev, YT8512_EXTREG_EXTEND_COMBO); -+ if (val < 0) -+ return val; -+ -+ val |= YT8512_CONTROL1_RMII_EN; -+ -+ ret = ytphy_write_ext(phydev, YT8512_EXTREG_EXTEND_COMBO, val); -+ if (ret < 0) -+ return ret; -+ -+ val = phy_read(phydev, MII_BMCR); -+ if (val < 0) -+ return val; -+ -+ val |= YT_SOFTWARE_RESET; -+ ret = phy_write(phydev, MII_BMCR, val); -+ -+ return ret; -+} -+ -+static int yt8512_led_init(struct phy_device *phydev) -+{ -+ int ret; -+ int val; -+ int mask; -+ -+ val = ytphy_read_ext(phydev, YT8512_EXTREG_LED0); -+ if (val < 0) -+ return val; -+ -+ val |= YT8512_LED0_ACT_BLK_IND; -+ -+ mask = YT8512_LED0_DIS_LED_AN_TRY | YT8512_LED0_BT_BLK_EN | -+ YT8512_LED0_HT_BLK_EN | YT8512_LED0_COL_BLK_EN | -+ YT8512_LED0_BT_ON_EN; -+ val &= ~mask; -+ -+ ret = ytphy_write_ext(phydev, YT8512_EXTREG_LED0, val); -+ if (ret < 0) -+ return ret; -+ -+ val = ytphy_read_ext(phydev, YT8512_EXTREG_LED1); -+ if (val < 0) -+ return val; -+ -+ val |= YT8512_LED1_BT_ON_EN; -+ -+ mask = YT8512_LED1_TXACT_BLK_EN | YT8512_LED1_RXACT_BLK_EN; -+ val &= ~mask; -+ -+ ret = ytphy_write_ext(phydev, YT8512_LED1_BT_ON_EN, val); -+ -+ return ret; -+} -+ -+static int yt8512_config_init(struct phy_device *phydev) -+{ -+ int ret; -+ int val; -+ -+ ret = yt8512_clk_init(phydev); -+ if (ret < 0) -+ return ret; -+ -+ ret = yt8512_led_init(phydev); -+ -+ /* disable auto sleep */ -+ val = ytphy_read_ext(phydev, YT8512_EXTREG_SLEEP_CONTROL1); -+ if (val < 0) -+ return val; -+ -+ val &= (~BIT(YT8512_EN_SLEEP_SW_BIT)); -+ -+ ret = ytphy_write_ext(phydev, YT8512_EXTREG_SLEEP_CONTROL1, val); -+ if (ret < 0) -+ return ret; -+ -+ return ret; -+} -+ -+static int yt8512_read_status(struct phy_device *phydev) -+{ -+ int ret; -+ int val; -+ int speed, speed_mode, duplex; -+ -+ ret = genphy_update_link(phydev); -+ if (ret) -+ return ret; -+ -+ val = phy_read(phydev, REG_PHY_SPEC_STATUS); -+ if (val < 0) -+ return val; -+ -+ duplex = (val & YT8512_DUPLEX) >> YT8512_DUPLEX_BIT; -+ speed_mode = (val & YT8512_SPEED_MODE) >> YT8512_SPEED_MODE_BIT; -+ switch (speed_mode) { -+ case 0: -+ speed = SPEED_10; -+ break; -+ case 1: -+ speed = SPEED_100; -+ break; -+ case 2: -+ case 3: -+ default: -+ speed = SPEED_UNKNOWN; -+ break; -+ } -+ -+ phydev->speed = speed; -+ phydev->duplex = duplex; -+ -+ return 0; -+} -+ -+static int yt8521_config_init(struct phy_device *phydev) -+{ -+ int ret; -+ int val; -+ -+ /* disable auto sleep */ -+ val = ytphy_read_ext(phydev, YT8521_EXTREG_SLEEP_CONTROL1); -+ if (val < 0) -+ return val; -+ -+ val &= (~BIT(YT8521_EN_SLEEP_SW_BIT)); -+ ret = ytphy_write_ext(phydev, YT8521_EXTREG_SLEEP_CONTROL1, val); -+ if (ret < 0) -+ return ret; -+ -+ /* switch to access UTP */ -+ ret = ytphy_write_ext(phydev, 0xa000, 0); -+ if (ret < 0) -+ return ret; -+ -+ /* enable RXC clock when no wire plug */ -+ val = ytphy_read_ext(phydev, 0xc); -+ if (val < 0) -+ return val; -+ -+ val &= ~(1 << 12); -+ ret = ytphy_write_ext(phydev, 0xc, val); -+ if (ret < 0) -+ return ret; -+ -+ /* output SyncE clock (125mhz) even link is down */ -+ ret = ytphy_write_ext(phydev, 0xa012, 0x38); -+ if (ret < 0) -+ return ret; -+ -+ /* disable rgmii clk 2ns delay */ -+ val = ytphy_read_ext(phydev, 0xa001); -+ if (val < 0) -+ return val; -+ -+ val &= ~(1 << 8); -+ ret = ytphy_write_ext(phydev, 0xa001, val); -+ if (ret < 0) -+ return ret; -+ -+ /* setup delay */ -+ val = (1 << 10) | (0xf << 4) | 5; -+ ret = ytphy_write_ext(phydev, 0xa003, val); -+ if (ret < 0) -+ return ret; -+ -+ /* LED0: Unused/Off, LED1: Link, LED2: Activity, 8Hz */ -+ ytphy_write_ext(phydev, 0xa00b, 0xe004); -+ ytphy_write_ext(phydev, 0xa00c, 0); -+ ytphy_write_ext(phydev, 0xa00d, 0x2600); -+ ytphy_write_ext(phydev, 0xa00e, 0x0070); -+ ytphy_write_ext(phydev, 0xa00f, 0x000a); -+ -+ return 0; -+} -+ -+static int yt8521_config_intr(struct phy_device *phydev) -+{ -+ int val; -+ -+ if (phydev->interrupts == PHY_INTERRUPT_ENABLED) -+ val = BIT(14) | BIT(13) | BIT(11) | BIT(10); -+ else -+ val = 0; -+ -+ return phy_write(phydev, REG_INT_MASK, val); -+} -+ -+static int yt8521_ack_interrupt(struct phy_device *phydev) -+{ -+ int val; -+ -+ val = phy_read(phydev, REG_INT_STATUS); -+ phydev_dbg(phydev, "intr status 0x04%x\n", val); -+ -+ return (val < 0) ? val : 0; -+} -+ -+static struct phy_driver ytphy_drvs[] = { -+ { -+ .phy_id = PHY_ID_YT8010, -+ .name = "YT8010 Automotive Ethernet", -+ .phy_id_mask = MOTORCOMM_PHY_ID_MASK, -+ .features = PHY_BASIC_FEATURES, -+ .config_aneg = yt8010_config_aneg, -+ .read_status = genphy_read_status, -+ }, { -+ .phy_id = PHY_ID_YT8510, -+ .name = "YT8510 100/10Mb Ethernet", -+ .phy_id_mask = MOTORCOMM_PHY_ID_MASK, -+ .features = PHY_BASIC_FEATURES, -+ .read_status = genphy_read_status, -+ }, { -+ .phy_id = PHY_ID_YT8511, -+ .name = "YT8511 Gigabit Ethernet", -+ .phy_id_mask = MOTORCOMM_PHY_ID_MASK, -+ .features = PHY_GBIT_FEATURES, -+ .read_status = genphy_read_status, -+ .suspend = genphy_suspend, -+ .resume = genphy_resume, -+ }, { -+ .phy_id = PHY_ID_YT8512, -+ .name = "YT8512 Ethernet", -+ .phy_id_mask = MOTORCOMM_PHY_ID_MASK, -+ .features = PHY_BASIC_FEATURES, -+ .config_init = yt8512_config_init, -+ .read_status = yt8512_read_status, -+ .suspend = genphy_suspend, -+ .resume = genphy_resume, -+ }, { -+ .phy_id = PHY_ID_YT8512B, -+ .name = "YT8512B Ethernet", -+ .phy_id_mask = MOTORCOMM_PHY_ID_MASK, -+ .features = PHY_BASIC_FEATURES, -+ .config_init = yt8512_config_init, -+ .read_status = yt8512_read_status, -+ .suspend = genphy_suspend, -+ .resume = genphy_resume, -+ }, { -+ .phy_id = PHY_ID_YT8521, -+ .name = "YT8521 Ethernet", -+ .phy_id_mask = MOTORCOMM_PHY_ID_MASK, -+ /* PHY_GBIT_FEATURES */ -+ .config_init = yt8521_config_init, -+ .ack_interrupt = yt8521_ack_interrupt, -+ .config_intr = yt8521_config_intr, -+ .suspend = genphy_suspend, -+ .resume = genphy_resume, -+ }, -+}; -+ -+module_phy_driver(ytphy_drvs); -+ -+MODULE_DESCRIPTION("Motorcomm PHY driver"); -+MODULE_AUTHOR("Leilei Zhao"); -+MODULE_LICENSE("GPL"); -+ -+static struct mdio_device_id __maybe_unused motorcomm_tbl[] = { -+ { PHY_ID_YT8010, MOTORCOMM_PHY_ID_MASK }, -+ { PHY_ID_YT8510, MOTORCOMM_PHY_ID_MASK }, -+ { PHY_ID_YT8511, MOTORCOMM_PHY_ID_MASK }, -+ { PHY_ID_YT8512, MOTORCOMM_PHY_ID_MASK }, -+ { PHY_ID_YT8512B, MOTORCOMM_PHY_ID_MASK }, -+ { PHY_ID_YT8521, MOTORCOMM_PHY_ID_MASK }, -+ { } -+}; -+ -+MODULE_DEVICE_TABLE(mdio, motorcomm_tbl); ---- /dev/null -+++ b/include/linux/motorcomm_phy.h -@@ -0,0 +1,67 @@ -+/* -+ * include/linux/motorcomm_phy.h -+ * -+ * Motorcomm PHY IDs -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License as published by the -+ * Free Software Foundation; either version 2 of the License, or (at your -+ * option) any later version. -+ * -+ */ -+ -+#ifndef _MOTORCOMM_PHY_H -+#define _MOTORCOMM_PHY_H -+ -+#define MOTORCOMM_PHY_ID_MASK 0x00000fff -+ -+#define PHY_ID_YT8010 0x00000309 -+#define PHY_ID_YT8510 0x00000109 -+#define PHY_ID_YT8511 0x0000010a -+#define PHY_ID_YT8512 0x00000118 -+#define PHY_ID_YT8512B 0x00000128 -+#define PHY_ID_YT8521 0x0000011a -+ -+#define REG_PHY_SPEC_STATUS 0x11 -+#define REG_INT_MASK 0x12 -+#define REG_INT_STATUS 0x13 -+#define REG_DEBUG_ADDR_OFFSET 0x1e -+#define REG_DEBUG_DATA 0x1f -+ -+#define YT8512_EXTREG_AFE_PLL 0x50 -+#define YT8512_EXTREG_EXTEND_COMBO 0x4000 -+#define YT8512_EXTREG_LED0 0x40c0 -+#define YT8512_EXTREG_LED1 0x40c3 -+ -+#define YT8512_EXTREG_SLEEP_CONTROL1 0x2027 -+ -+#define YT_SOFTWARE_RESET 0x8000 -+ -+#define YT8512_CONFIG_PLL_REFCLK_SEL_EN 0x0040 -+#define YT8512_CONTROL1_RMII_EN 0x0001 -+#define YT8512_LED0_ACT_BLK_IND 0x1000 -+#define YT8512_LED0_DIS_LED_AN_TRY 0x0001 -+#define YT8512_LED0_BT_BLK_EN 0x0002 -+#define YT8512_LED0_HT_BLK_EN 0x0004 -+#define YT8512_LED0_COL_BLK_EN 0x0008 -+#define YT8512_LED0_BT_ON_EN 0x0010 -+#define YT8512_LED1_BT_ON_EN 0x0010 -+#define YT8512_LED1_TXACT_BLK_EN 0x0100 -+#define YT8512_LED1_RXACT_BLK_EN 0x0200 -+#define YT8512_SPEED_MODE 0xc000 -+#define YT8512_DUPLEX 0x2000 -+ -+#define YT8512_SPEED_MODE_BIT 14 -+#define YT8512_DUPLEX_BIT 13 -+#define YT8512_EN_SLEEP_SW_BIT 15 -+ -+#define YT8521_EXTREG_SLEEP_CONTROL1 0x27 -+#define YT8521_EN_SLEEP_SW_BIT 15 -+ -+#define YT8521_SPEED_MODE 0xc000 -+#define YT8521_DUPLEX 0x2000 -+#define YT8521_SPEED_MODE_BIT 14 -+#define YT8521_DUPLEX_BIT 13 -+#define YT8521_LINK_STATUS_BIT 10 -+ -+#endif /* _MOTORCOMM_PHY_H */ diff --git a/target/linux/rockchip/patches-5.4/801-char-add-support-for-rockchip-hardware-random-number.patch b/target/linux/rockchip/patches-5.4/801-char-add-support-for-rockchip-hardware-random-number.patch deleted file mode 100644 index 85f14e61b3..0000000000 --- a/target/linux/rockchip/patches-5.4/801-char-add-support-for-rockchip-hardware-random-number.patch +++ /dev/null @@ -1,45 +0,0 @@ -From e5b5361651940ff5c0c1784dfd0130abec7ab535 Mon Sep 17 00:00:00 2001 -From: wevsty -Date: Mon, 24 Aug 2020 02:27:11 +0800 -Subject: [PATCH] char: add support for rockchip hardware random number - generator - -This patch provides hardware random number generator support for all rockchip SOC. - -rockchip-rng.c from https://github.com/rockchip-linux/kernel/blob/develop-4.4/drivers/char/hw_random/rockchip-rng.c - -Signed-off-by: wevsty ---- - ---- a/drivers/char/hw_random/Kconfig -+++ b/drivers/char/hw_random/Kconfig -@@ -345,6 +345,19 @@ config HW_RANDOM_STM32 - - If unsure, say N. - -+config HW_RANDOM_ROCKCHIP -+ tristate "Rockchip Random Number Generator support" -+ depends on ARCH_ROCKCHIP -+ default HW_RANDOM -+ help -+ This driver provides kernel-side support for the Random Number -+ Generator hardware found on Rockchip cpus. -+ -+ To compile this driver as a module, choose M here: the -+ module will be called rockchip-rng. -+ -+ If unsure, say Y. -+ - config HW_RANDOM_PIC32 - tristate "Microchip PIC32 Random Number Generator support" - depends on HW_RANDOM && MACH_PIC32 ---- a/drivers/char/hw_random/Makefile -+++ b/drivers/char/hw_random/Makefile -@@ -32,6 +32,7 @@ obj-$(CONFIG_HW_RANDOM_IPROC_RNG200) += - obj-$(CONFIG_HW_RANDOM_ST) += st-rng.o - obj-$(CONFIG_HW_RANDOM_XGENE) += xgene-rng.o - obj-$(CONFIG_HW_RANDOM_STM32) += stm32-rng.o -+obj-$(CONFIG_HW_RANDOM_ROCKCHIP) += rockchip-rng.o - obj-$(CONFIG_HW_RANDOM_PIC32) += pic32-rng.o - obj-$(CONFIG_HW_RANDOM_MESON) += meson-rng.o - obj-$(CONFIG_HW_RANDOM_CAVIUM) += cavium-rng.o cavium-rng-vf.o diff --git a/target/linux/rockchip/patches-5.4/802-arm64-dts-rockchip-add-hardware-random-number-genera.patch b/target/linux/rockchip/patches-5.4/802-arm64-dts-rockchip-add-hardware-random-number-genera.patch deleted file mode 100644 index 970e798f5b..0000000000 --- a/target/linux/rockchip/patches-5.4/802-arm64-dts-rockchip-add-hardware-random-number-genera.patch +++ /dev/null @@ -1,50 +0,0 @@ -From e5b5361651940ff5c0c1784dfd0130abec7ab535 Mon Sep 17 00:00:00 2001 -From: wevsty -Date: Mon, 24 Aug 2020 02:27:11 +0800 -Subject: [PATCH] arm64: dts: rockchip: add hardware random number generator - for RK3328 and RK3399 - -Adding Hardware Random Number Generator Resources to the RK3328 and RK3399. - -Signed-off-by: wevsty ---- - ---- a/arch/arm64/boot/dts/rockchip/rk3328.dtsi -+++ b/arch/arm64/boot/dts/rockchip/rk3328.dtsi -@@ -264,6 +264,17 @@ - status = "disabled"; - }; - -+ rng: rng@ff060000 { -+ compatible = "rockchip,cryptov1-rng"; -+ reg = <0x0 0xff060000 0x0 0x4000>; -+ -+ clocks = <&cru SCLK_CRYPTO>, <&cru HCLK_CRYPTO_SLV>; -+ clock-names = "clk_crypto", "hclk_crypto"; -+ assigned-clocks = <&cru SCLK_CRYPTO>, <&cru HCLK_CRYPTO_SLV>; -+ assigned-clock-rates = <150000000>, <100000000>; -+ status = "disabled"; -+ }; -+ - grf: syscon@ff100000 { - compatible = "rockchip,rk3328-grf", "syscon", "simple-mfd"; - reg = <0x0 0xff100000 0x0 0x1000>; ---- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi -+++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi -@@ -1882,6 +1882,16 @@ - }; - }; - -+ rng: rng@ff8b8000 { -+ compatible = "rockchip,cryptov1-rng"; -+ reg = <0x0 0xff8b8000 0x0 0x1000>; -+ clocks = <&cru SCLK_CRYPTO1>, <&cru HCLK_S_CRYPTO1>; -+ clock-names = "clk_crypto", "hclk_crypto"; -+ assigned-clocks = <&cru SCLK_CRYPTO1>, <&cru HCLK_S_CRYPTO1>; -+ assigned-clock-rates = <150000000>, <100000000>; -+ status = "okay"; -+ }; -+ - gpu: gpu@ff9a0000 { - compatible = "rockchip,rk3399-mali", "arm,mali-t860"; - reg = <0x0 0xff9a0000 0x0 0x10000>; diff --git a/target/linux/rockchip/patches-5.4/803-PM-devfreq-rockchip-add-devfreq-driver-for-rk3328-dmc.patch b/target/linux/rockchip/patches-5.4/803-PM-devfreq-rockchip-add-devfreq-driver-for-rk3328-dmc.patch deleted file mode 100644 index 3018bd30d6..0000000000 --- a/target/linux/rockchip/patches-5.4/803-PM-devfreq-rockchip-add-devfreq-driver-for-rk3328-dmc.patch +++ /dev/null @@ -1,48 +0,0 @@ -From fcd9629c05f373771e85920e1c1d0ab252617878 Mon Sep 17 00:00:00 2001 -From: hmz007 -Date: Tue, 19 Nov 2019 13:53:25 +0800 -Subject: [PATCH] PM / devfreq: rockchip: add devfreq driver for rk3328 dmc - -Signed-off-by: hmz007 ---- - drivers/devfreq/Kconfig | 18 +- - drivers/devfreq/Makefile | 1 + - drivers/devfreq/rk3328_dmc.c | 846 +++++++++++++++++++++++++++++++++++ - 3 files changed, 862 insertions(+), 3 deletions(-) - create mode 100644 drivers/devfreq/rk3328_dmc.c - -diff --git a/drivers/devfreq/Kconfig b/drivers/devfreq/Kconfig -index defe1d438710..5ae0832f046b 100644 ---- a/drivers/devfreq/Kconfig -+++ b/drivers/devfreq/Kconfig -@@ -116,6 +116,18 @@ config ARM_TEGRA20_DEVFREQ - It reads Memory Controller counters and adjusts the operating - frequencies and voltages with OPP support. - -+config ARM_RK3328_DMC_DEVFREQ -+ tristate "ARM RK3328 DMC DEVFREQ Driver" -+ depends on ARCH_ROCKCHIP -+ select DEVFREQ_EVENT_ROCKCHIP_DFI -+ select DEVFREQ_GOV_SIMPLE_ONDEMAND -+ select PM_DEVFREQ_EVENT -+ select PM_OPP -+ help -+ This adds the DEVFREQ driver for the RK3328 DMC(Dynamic Memory Controller). -+ It sets the frequency for the memory controller and reads the usage counts -+ from hardware. -+ - config ARM_RK3399_DMC_DEVFREQ - tristate "ARM RK3399 DMC DEVFREQ Driver" - depends on (ARCH_ROCKCHIP && HAVE_ARM_SMCCC) || \ -diff --git a/drivers/devfreq/Makefile b/drivers/devfreq/Makefile -index 338ae8440db6..ec568406ef50 100644 ---- a/drivers/devfreq/Makefile -+++ b/drivers/devfreq/Makefile -@@ -9,6 +9,7 @@ obj-$(CONFIG_DEVFREQ_GOV_PASSIVE) += governor_passive.o - - # DEVFREQ Drivers - obj-$(CONFIG_ARM_EXYNOS_BUS_DEVFREQ) += exynos-bus.o -+obj-$(CONFIG_ARM_RK3328_DMC_DEVFREQ) += rk3328_dmc.o - obj-$(CONFIG_ARM_RK3399_DMC_DEVFREQ) += rk3399_dmc.o - obj-$(CONFIG_ARM_TEGRA_DEVFREQ) += tegra30-devfreq.o - obj-$(CONFIG_ARM_TEGRA20_DEVFREQ) += tegra20-devfreq.o diff --git a/target/linux/rockchip/patches-5.4/804-clk-rockchip-support-setting-ddr-clock-via-SIP-Version-2-.patch b/target/linux/rockchip/patches-5.4/804-clk-rockchip-support-setting-ddr-clock-via-SIP-Version-2-.patch deleted file mode 100644 index 4e688f8eb4..0000000000 --- a/target/linux/rockchip/patches-5.4/804-clk-rockchip-support-setting-ddr-clock-via-SIP-Version-2-.patch +++ /dev/null @@ -1,218 +0,0 @@ -From ce6d3614888e6358466f0e84e248177a6bca5258 Mon Sep 17 00:00:00 2001 -From: Tang Yun ping -Date: Thu, 4 May 2017 20:49:58 +0800 -Subject: [PATCH] clk: rockchip: support setting ddr clock via SIP Version 2 - APIs - -commit 764e893ee82321938fc6f4349e9e7caf06a04410 rockchip. - -Signed-off-by: Tang Yun ping -Signed-off-by: hmz007 ---- - drivers/clk/rockchip/clk-ddr.c | 130 ++++++++++++++++++++++++++++ - drivers/clk/rockchip/clk-rk3328.c | 7 +- - drivers/clk/rockchip/clk.h | 3 +- - include/soc/rockchip/rockchip_sip.h | 11 +++ - 4 files changed, 147 insertions(+), 4 deletions(-) - -diff --git a/drivers/clk/rockchip/clk-ddr.c b/drivers/clk/rockchip/clk-ddr.c -index 9273bce4d7b6..555aaf4e758d 100644 ---- a/drivers/clk/rockchip/clk-ddr.c -+++ b/drivers/clk/rockchip/clk-ddr.c -@@ -87,6 +87,133 @@ static const struct clk_ops rockchip_ddrclk_sip_ops = { - .get_parent = rockchip_ddrclk_get_parent, - }; - -+/* See v4.4/include/dt-bindings/display/rk_fb.h */ -+#define SCREEN_NULL 0 -+#define SCREEN_HDMI 6 -+ -+static inline int rk_drm_get_lcdc_type(void) -+{ -+ return SCREEN_NULL; -+} -+ -+struct share_params { -+ u32 hz; -+ u32 lcdc_type; -+ u32 vop; -+ u32 vop_dclk_mode; -+ u32 sr_idle_en; -+ u32 addr_mcu_el3; -+ /* -+ * 1: need to wait flag1 -+ * 0: never wait flag1 -+ */ -+ u32 wait_flag1; -+ /* -+ * 1: need to wait flag1 -+ * 0: never wait flag1 -+ */ -+ u32 wait_flag0; -+ u32 complt_hwirq; -+ /* if need, add parameter after */ -+}; -+ -+struct rockchip_ddrclk_data { -+ u32 inited_flag; -+ void __iomem *share_memory; -+}; -+ -+static struct rockchip_ddrclk_data ddr_data; -+ -+static void rockchip_ddrclk_data_init(void) -+{ -+ struct arm_smccc_res res; -+ -+ arm_smccc_smc(ROCKCHIP_SIP_SHARE_MEM, -+ 1, SHARE_PAGE_TYPE_DDR, 0, -+ 0, 0, 0, 0, &res); -+ -+ if (!res.a0) { -+ ddr_data.share_memory = (void __iomem *)ioremap(res.a1, 1<<12); -+ ddr_data.inited_flag = 1; -+ } -+} -+ -+static int rockchip_ddrclk_sip_set_rate_v2(struct clk_hw *hw, -+ unsigned long drate, -+ unsigned long prate) -+{ -+ struct share_params *p; -+ struct arm_smccc_res res; -+ -+ if (!ddr_data.inited_flag) -+ rockchip_ddrclk_data_init(); -+ -+ p = (struct share_params *)ddr_data.share_memory; -+ -+ p->hz = drate; -+ p->lcdc_type = rk_drm_get_lcdc_type(); -+ p->wait_flag1 = 1; -+ p->wait_flag0 = 1; -+ -+ arm_smccc_smc(ROCKCHIP_SIP_DRAM_FREQ, -+ SHARE_PAGE_TYPE_DDR, 0, -+ ROCKCHIP_SIP_CONFIG_DRAM_SET_RATE, -+ 0, 0, 0, 0, &res); -+ -+ if ((int)res.a1 == -6) { -+ pr_err("%s: timeout, drate = %lumhz\n", __func__, drate/1000000); -+ /* TODO: rockchip_dmcfreq_wait_complete(); */ -+ } -+ -+ return res.a0; -+} -+ -+static unsigned long rockchip_ddrclk_sip_recalc_rate_v2 -+ (struct clk_hw *hw, unsigned long parent_rate) -+{ -+ struct arm_smccc_res res; -+ -+ arm_smccc_smc(ROCKCHIP_SIP_DRAM_FREQ, -+ SHARE_PAGE_TYPE_DDR, 0, -+ ROCKCHIP_SIP_CONFIG_DRAM_GET_RATE, -+ 0, 0, 0, 0, &res); -+ if (!res.a0) -+ return res.a1; -+ else -+ return 0; -+} -+ -+static long rockchip_ddrclk_sip_round_rate_v2(struct clk_hw *hw, -+ unsigned long rate, -+ unsigned long *prate) -+{ -+ struct share_params *p; -+ struct arm_smccc_res res; -+ -+ if (!ddr_data.inited_flag) -+ rockchip_ddrclk_data_init(); -+ -+ p = (struct share_params *)ddr_data.share_memory; -+ -+ p->hz = rate; -+ -+ arm_smccc_smc(ROCKCHIP_SIP_DRAM_FREQ, -+ SHARE_PAGE_TYPE_DDR, 0, -+ ROCKCHIP_SIP_CONFIG_DRAM_ROUND_RATE, -+ 0, 0, 0, 0, &res); -+ if (!res.a0) -+ return res.a1; -+ else -+ return 0; -+} -+ -+static const struct clk_ops rockchip_ddrclk_sip_ops_v2 = { -+ .recalc_rate = rockchip_ddrclk_sip_recalc_rate_v2, -+ .set_rate = rockchip_ddrclk_sip_set_rate_v2, -+ .round_rate = rockchip_ddrclk_sip_round_rate_v2, -+ .get_parent = rockchip_ddrclk_get_parent, -+}; -+ - struct clk *rockchip_clk_register_ddrclk(const char *name, int flags, - const char *const *parent_names, - u8 num_parents, int mux_offset, -@@ -114,6 +241,9 @@ struct clk *rockchip_clk_register_ddrclk(const char *name, int flags, - case ROCKCHIP_DDRCLK_SIP: - init.ops = &rockchip_ddrclk_sip_ops; - break; -+ case ROCKCHIP_DDRCLK_SIP_V2: -+ init.ops = &rockchip_ddrclk_sip_ops_v2; -+ break; - default: - pr_err("%s: unsupported ddrclk type %d\n", __func__, ddr_flag); - kfree(ddrclk); -diff --git a/drivers/clk/rockchip/clk-rk3328.c b/drivers/clk/rockchip/clk-rk3328.c -index c186a1985bf4..ac6e6163a232 100644 ---- a/drivers/clk/rockchip/clk-rk3328.c -+++ b/drivers/clk/rockchip/clk-rk3328.c -@@ -314,9 +314,10 @@ static struct rockchip_clk_branch rk3328_clk_branches[] __initdata = { - RK3328_CLKGATE_CON(14), 1, GFLAGS), - - /* PD_DDR */ -- COMPOSITE(0, "clk_ddr", mux_ddrphy_p, CLK_IGNORE_UNUSED, -- RK3328_CLKSEL_CON(3), 8, 2, MFLAGS, 0, 3, DFLAGS | CLK_DIVIDER_POWER_OF_TWO, -- RK3328_CLKGATE_CON(0), 4, GFLAGS), -+ COMPOSITE_DDRCLK(SCLK_DDRCLK, "sclk_ddrc", mux_ddrphy_p, 0, -+ RK3328_CLKSEL_CON(3), 8, 2, 0, 3, -+ ROCKCHIP_DDRCLK_SIP_V2), -+ - GATE(0, "clk_ddrmsch", "clk_ddr", CLK_IGNORE_UNUSED, - RK3328_CLKGATE_CON(18), 6, GFLAGS), - GATE(0, "clk_ddrupctl", "clk_ddr", CLK_IGNORE_UNUSED, -diff --git a/drivers/clk/rockchip/clk.h b/drivers/clk/rockchip/clk.h -index 2271a84124b0..7405aaf965ec 100644 ---- a/drivers/clk/rockchip/clk.h -+++ b/drivers/clk/rockchip/clk.h -@@ -362,7 +362,8 @@ struct clk *rockchip_clk_register_mmc(const char *name, - * DDRCLK flags, including method of setting the rate - * ROCKCHIP_DDRCLK_SIP: use SIP call to bl31 to change ddrclk rate. - */ --#define ROCKCHIP_DDRCLK_SIP BIT(0) -+#define ROCKCHIP_DDRCLK_SIP 0x01 -+#define ROCKCHIP_DDRCLK_SIP_V2 0x03 - - struct clk *rockchip_clk_register_ddrclk(const char *name, int flags, - const char *const *parent_names, -diff --git a/include/soc/rockchip/rockchip_sip.h b/include/soc/rockchip/rockchip_sip.h -index c46a9ae2a2ab..fa7e0a2d72cc 100644 ---- a/include/soc/rockchip/rockchip_sip.h -+++ b/include/soc/rockchip/rockchip_sip.h -@@ -16,5 +16,16 @@ - #define ROCKCHIP_SIP_CONFIG_DRAM_CLR_IRQ 0x06 - #define ROCKCHIP_SIP_CONFIG_DRAM_SET_PARAM 0x07 - #define ROCKCHIP_SIP_CONFIG_DRAM_SET_ODT_PD 0x08 -+#define ROCKCHIP_SIP_CONFIG_DRAM_GET_VERSION 0x08 -+ -+#define ROCKCHIP_SIP_SHARE_MEM 0x82000009 -+ -+/* Share mem page types */ -+typedef enum { -+ SHARE_PAGE_TYPE_INVALID = 0, -+ SHARE_PAGE_TYPE_UARTDBG, -+ SHARE_PAGE_TYPE_DDR, -+ SHARE_PAGE_TYPE_MAX, -+} share_page_type_t; - - #endif diff --git a/target/linux/rockchip/patches-5.4/805-PM-devfreq-rockchip-dfi-add-more-soc-support.patch b/target/linux/rockchip/patches-5.4/805-PM-devfreq-rockchip-dfi-add-more-soc-support.patch deleted file mode 100644 index dbf491a287..0000000000 --- a/target/linux/rockchip/patches-5.4/805-PM-devfreq-rockchip-dfi-add-more-soc-support.patch +++ /dev/null @@ -1,665 +0,0 @@ -From 4db93c6dad0c71750b86163df2fdb21c35f00d9a Mon Sep 17 00:00:00 2001 -From: hmz007 -Date: Tue, 19 Nov 2019 12:49:48 +0800 -Subject: [PATCH] PM / devfreq: rockchip-dfi: add more soc support - -Signed-off-by: hmz007 ---- - drivers/devfreq/event/rockchip-dfi.c | 554 ++++++++++++++++++++++++--- - 1 file changed, 505 insertions(+), 49 deletions(-) - -diff --git a/drivers/devfreq/event/rockchip-dfi.c b/drivers/devfreq/event/rockchip-dfi.c -index 5d1042188727..80be0efdfb9b 100644 ---- a/drivers/devfreq/event/rockchip-dfi.c -+++ b/drivers/devfreq/event/rockchip-dfi.c -@@ -18,25 +18,66 @@ - #include - #include - --#include -- --#define RK3399_DMC_NUM_CH 2 -- -+#define PX30_PMUGRF_OS_REG2 0x208 -+ -+#define RK3128_GRF_SOC_CON0 0x140 -+#define RK3128_GRF_OS_REG1 0x1cc -+#define RK3128_GRF_DFI_WRNUM 0x220 -+#define RK3128_GRF_DFI_RDNUM 0x224 -+#define RK3128_GRF_DFI_TIMERVAL 0x22c -+#define RK3128_DDR_MONITOR_EN ((1 << (16 + 6)) + (1 << 6)) -+#define RK3128_DDR_MONITOR_DISB ((1 << (16 + 6)) + (0 << 6)) -+ -+#define RK3288_PMU_SYS_REG2 0x9c -+#define RK3288_GRF_SOC_CON4 0x254 -+#define RK3288_GRF_SOC_STATUS(n) (0x280 + (n) * 4) -+#define RK3288_DFI_EN (0x30003 << 14) -+#define RK3288_DFI_DIS (0x30000 << 14) -+#define RK3288_LPDDR_SEL (0x10001 << 13) -+#define RK3288_DDR3_SEL (0x10000 << 13) -+ -+#define RK3328_GRF_OS_REG2 0x5d0 -+ -+#define RK3368_GRF_DDRC0_CON0 0x600 -+#define RK3368_GRF_SOC_STATUS5 0x494 -+#define RK3368_GRF_SOC_STATUS6 0x498 -+#define RK3368_GRF_SOC_STATUS8 0x4a0 -+#define RK3368_GRF_SOC_STATUS9 0x4a4 -+#define RK3368_GRF_SOC_STATUS10 0x4a8 -+#define RK3368_DFI_EN (0x30003 << 5) -+#define RK3368_DFI_DIS (0x30000 << 5) -+ -+#define MAX_DMC_NUM_CH 2 -+#define READ_DRAMTYPE_INFO(n) (((n) >> 13) & 0x7) -+#define READ_CH_INFO(n) (((n) >> 28) & 0x3) - /* DDRMON_CTRL */ --#define DDRMON_CTRL 0x04 --#define CLR_DDRMON_CTRL (0x1f0000 << 0) --#define LPDDR4_EN (0x10001 << 4) --#define HARDWARE_EN (0x10001 << 3) --#define LPDDR3_EN (0x10001 << 2) --#define SOFTWARE_EN (0x10001 << 1) --#define SOFTWARE_DIS (0x10000 << 1) --#define TIME_CNT_EN (0x10001 << 0) -+#define DDRMON_CTRL 0x04 -+#define CLR_DDRMON_CTRL (0x3f0000 << 0) -+#define DDR4_EN (0x10001 << 5) -+#define LPDDR4_EN (0x10001 << 4) -+#define HARDWARE_EN (0x10001 << 3) -+#define LPDDR2_3_EN (0x10001 << 2) -+#define SOFTWARE_EN (0x10001 << 1) -+#define SOFTWARE_DIS (0x10000 << 1) -+#define TIME_CNT_EN (0x10001 << 0) - - #define DDRMON_CH0_COUNT_NUM 0x28 - #define DDRMON_CH0_DFI_ACCESS_NUM 0x2c - #define DDRMON_CH1_COUNT_NUM 0x3c - #define DDRMON_CH1_DFI_ACCESS_NUM 0x40 - -+/* pmu grf */ -+#define PMUGRF_OS_REG2 0x308 -+ -+enum { -+ DDR4 = 0, -+ DDR3 = 3, -+ LPDDR2 = 5, -+ LPDDR3 = 6, -+ LPDDR4 = 7, -+ UNUSED = 0xFF -+}; -+ - struct dmc_usage { - u32 access; - u32 total; -@@ -50,33 +91,261 @@ struct dmc_usage { - struct rockchip_dfi { - struct devfreq_event_dev *edev; - struct devfreq_event_desc *desc; -- struct dmc_usage ch_usage[RK3399_DMC_NUM_CH]; -+ struct dmc_usage ch_usage[MAX_DMC_NUM_CH]; - struct device *dev; - void __iomem *regs; - struct regmap *regmap_pmu; -+ struct regmap *regmap_grf; -+ struct regmap *regmap_pmugrf; - struct clk *clk; -+ u32 dram_type; -+ /* -+ * available mask, 1: available, 0: not available -+ * each bit represent a channel -+ */ -+ u32 ch_msk; -+}; -+ -+static void rk3128_dfi_start_hardware_counter(struct devfreq_event_dev *edev) -+{ -+ struct rockchip_dfi *info = devfreq_event_get_drvdata(edev); -+ -+ regmap_write(info->regmap_grf, -+ RK3128_GRF_SOC_CON0, -+ RK3128_DDR_MONITOR_EN); -+} -+ -+static void rk3128_dfi_stop_hardware_counter(struct devfreq_event_dev *edev) -+{ -+ struct rockchip_dfi *info = devfreq_event_get_drvdata(edev); -+ -+ regmap_write(info->regmap_grf, -+ RK3128_GRF_SOC_CON0, -+ RK3128_DDR_MONITOR_DISB); -+} -+ -+static int rk3128_dfi_disable(struct devfreq_event_dev *edev) -+{ -+ rk3128_dfi_stop_hardware_counter(edev); -+ -+ return 0; -+} -+ -+static int rk3128_dfi_enable(struct devfreq_event_dev *edev) -+{ -+ rk3128_dfi_start_hardware_counter(edev); -+ -+ return 0; -+} -+ -+static int rk3128_dfi_set_event(struct devfreq_event_dev *edev) -+{ -+ return 0; -+} -+ -+static int rk3128_dfi_get_event(struct devfreq_event_dev *edev, -+ struct devfreq_event_data *edata) -+{ -+ struct rockchip_dfi *info = devfreq_event_get_drvdata(edev); -+ unsigned long flags; -+ u32 dfi_wr, dfi_rd, dfi_timer; -+ -+ local_irq_save(flags); -+ -+ rk3128_dfi_stop_hardware_counter(edev); -+ -+ regmap_read(info->regmap_grf, RK3128_GRF_DFI_WRNUM, &dfi_wr); -+ regmap_read(info->regmap_grf, RK3128_GRF_DFI_RDNUM, &dfi_rd); -+ regmap_read(info->regmap_grf, RK3128_GRF_DFI_TIMERVAL, &dfi_timer); -+ -+ edata->load_count = (dfi_wr + dfi_rd) * 4; -+ edata->total_count = dfi_timer; -+ -+ rk3128_dfi_start_hardware_counter(edev); -+ -+ local_irq_restore(flags); -+ -+ return 0; -+} -+ -+static const struct devfreq_event_ops rk3128_dfi_ops = { -+ .disable = rk3128_dfi_disable, -+ .enable = rk3128_dfi_enable, -+ .get_event = rk3128_dfi_get_event, -+ .set_event = rk3128_dfi_set_event, -+}; -+ -+static void rk3288_dfi_start_hardware_counter(struct devfreq_event_dev *edev) -+{ -+ struct rockchip_dfi *info = devfreq_event_get_drvdata(edev); -+ -+ regmap_write(info->regmap_grf, RK3288_GRF_SOC_CON4, RK3288_DFI_EN); -+} -+ -+static void rk3288_dfi_stop_hardware_counter(struct devfreq_event_dev *edev) -+{ -+ struct rockchip_dfi *info = devfreq_event_get_drvdata(edev); -+ -+ regmap_write(info->regmap_grf, RK3288_GRF_SOC_CON4, RK3288_DFI_DIS); -+} -+ -+static int rk3288_dfi_disable(struct devfreq_event_dev *edev) -+{ -+ rk3288_dfi_stop_hardware_counter(edev); -+ -+ return 0; -+} -+ -+static int rk3288_dfi_enable(struct devfreq_event_dev *edev) -+{ -+ rk3288_dfi_start_hardware_counter(edev); -+ -+ return 0; -+} -+ -+static int rk3288_dfi_set_event(struct devfreq_event_dev *edev) -+{ -+ return 0; -+} -+ -+static int rk3288_dfi_get_busier_ch(struct devfreq_event_dev *edev) -+{ -+ struct rockchip_dfi *info = devfreq_event_get_drvdata(edev); -+ u32 tmp, max = 0; -+ u32 i, busier_ch = 0; -+ u32 rd_count, wr_count, total_count; -+ -+ rk3288_dfi_stop_hardware_counter(edev); -+ -+ /* Find out which channel is busier */ -+ for (i = 0; i < MAX_DMC_NUM_CH; i++) { -+ if (!(info->ch_msk & BIT(i))) -+ continue; -+ regmap_read(info->regmap_grf, -+ RK3288_GRF_SOC_STATUS(11 + i * 4), &wr_count); -+ regmap_read(info->regmap_grf, -+ RK3288_GRF_SOC_STATUS(12 + i * 4), &rd_count); -+ regmap_read(info->regmap_grf, -+ RK3288_GRF_SOC_STATUS(14 + i * 4), &total_count); -+ info->ch_usage[i].access = (wr_count + rd_count) * 4; -+ info->ch_usage[i].total = total_count; -+ tmp = info->ch_usage[i].access; -+ if (tmp > max) { -+ busier_ch = i; -+ max = tmp; -+ } -+ } -+ rk3288_dfi_start_hardware_counter(edev); -+ -+ return busier_ch; -+} -+ -+static int rk3288_dfi_get_event(struct devfreq_event_dev *edev, -+ struct devfreq_event_data *edata) -+{ -+ struct rockchip_dfi *info = devfreq_event_get_drvdata(edev); -+ int busier_ch; -+ unsigned long flags; -+ -+ local_irq_save(flags); -+ busier_ch = rk3288_dfi_get_busier_ch(edev); -+ local_irq_restore(flags); -+ -+ edata->load_count = info->ch_usage[busier_ch].access; -+ edata->total_count = info->ch_usage[busier_ch].total; -+ -+ return 0; -+} -+ -+static const struct devfreq_event_ops rk3288_dfi_ops = { -+ .disable = rk3288_dfi_disable, -+ .enable = rk3288_dfi_enable, -+ .get_event = rk3288_dfi_get_event, -+ .set_event = rk3288_dfi_set_event, -+}; -+ -+static void rk3368_dfi_start_hardware_counter(struct devfreq_event_dev *edev) -+{ -+ struct rockchip_dfi *info = devfreq_event_get_drvdata(edev); -+ -+ regmap_write(info->regmap_grf, RK3368_GRF_DDRC0_CON0, RK3368_DFI_EN); -+} -+ -+static void rk3368_dfi_stop_hardware_counter(struct devfreq_event_dev *edev) -+{ -+ struct rockchip_dfi *info = devfreq_event_get_drvdata(edev); -+ -+ regmap_write(info->regmap_grf, RK3368_GRF_DDRC0_CON0, RK3368_DFI_DIS); -+} -+ -+static int rk3368_dfi_disable(struct devfreq_event_dev *edev) -+{ -+ rk3368_dfi_stop_hardware_counter(edev); -+ -+ return 0; -+} -+ -+static int rk3368_dfi_enable(struct devfreq_event_dev *edev) -+{ -+ rk3368_dfi_start_hardware_counter(edev); -+ -+ return 0; -+} -+ -+static int rk3368_dfi_set_event(struct devfreq_event_dev *edev) -+{ -+ return 0; -+} -+ -+static int rk3368_dfi_get_event(struct devfreq_event_dev *edev, -+ struct devfreq_event_data *edata) -+{ -+ struct rockchip_dfi *info = devfreq_event_get_drvdata(edev); -+ unsigned long flags; -+ u32 dfi0_wr, dfi0_rd, dfi1_wr, dfi1_rd, dfi_timer; -+ -+ local_irq_save(flags); -+ -+ rk3368_dfi_stop_hardware_counter(edev); -+ -+ regmap_read(info->regmap_grf, RK3368_GRF_SOC_STATUS5, &dfi0_wr); -+ regmap_read(info->regmap_grf, RK3368_GRF_SOC_STATUS6, &dfi0_rd); -+ regmap_read(info->regmap_grf, RK3368_GRF_SOC_STATUS9, &dfi1_wr); -+ regmap_read(info->regmap_grf, RK3368_GRF_SOC_STATUS10, &dfi1_rd); -+ regmap_read(info->regmap_grf, RK3368_GRF_SOC_STATUS8, &dfi_timer); -+ -+ edata->load_count = (dfi0_wr + dfi0_rd + dfi1_wr + dfi1_rd) * 2; -+ edata->total_count = dfi_timer; -+ -+ rk3368_dfi_start_hardware_counter(edev); -+ -+ local_irq_restore(flags); -+ -+ return 0; -+} -+ -+static const struct devfreq_event_ops rk3368_dfi_ops = { -+ .disable = rk3368_dfi_disable, -+ .enable = rk3368_dfi_enable, -+ .get_event = rk3368_dfi_get_event, -+ .set_event = rk3368_dfi_set_event, - }; - - static void rockchip_dfi_start_hardware_counter(struct devfreq_event_dev *edev) - { - struct rockchip_dfi *info = devfreq_event_get_drvdata(edev); - void __iomem *dfi_regs = info->regs; -- u32 val; -- u32 ddr_type; -- -- /* get ddr type */ -- regmap_read(info->regmap_pmu, RK3399_PMUGRF_OS_REG2, &val); -- ddr_type = (val >> RK3399_PMUGRF_DDRTYPE_SHIFT) & -- RK3399_PMUGRF_DDRTYPE_MASK; - - /* clear DDRMON_CTRL setting */ - writel_relaxed(CLR_DDRMON_CTRL, dfi_regs + DDRMON_CTRL); - - /* set ddr type to dfi */ -- if (ddr_type == RK3399_PMUGRF_DDRTYPE_LPDDR3) -- writel_relaxed(LPDDR3_EN, dfi_regs + DDRMON_CTRL); -- else if (ddr_type == RK3399_PMUGRF_DDRTYPE_LPDDR4) -+ if (info->dram_type == LPDDR3 || info->dram_type == LPDDR2) -+ writel_relaxed(LPDDR2_3_EN, dfi_regs + DDRMON_CTRL); -+ else if (info->dram_type == LPDDR4) - writel_relaxed(LPDDR4_EN, dfi_regs + DDRMON_CTRL); -+ else if (info->dram_type == DDR4) -+ writel_relaxed(DDR4_EN, dfi_regs + DDRMON_CTRL); - - /* enable count, use software mode */ - writel_relaxed(SOFTWARE_EN, dfi_regs + DDRMON_CTRL); -@@ -100,12 +369,22 @@ static int rockchip_dfi_get_busier_ch(struct devfreq_event_dev *edev) - rockchip_dfi_stop_hardware_counter(edev); - - /* Find out which channel is busier */ -- for (i = 0; i < RK3399_DMC_NUM_CH; i++) { -- info->ch_usage[i].access = readl_relaxed(dfi_regs + -- DDRMON_CH0_DFI_ACCESS_NUM + i * 20) * 4; -+ for (i = 0; i < MAX_DMC_NUM_CH; i++) { -+ if (!(info->ch_msk & BIT(i))) -+ continue; -+ - info->ch_usage[i].total = readl_relaxed(dfi_regs + - DDRMON_CH0_COUNT_NUM + i * 20); -- tmp = info->ch_usage[i].access; -+ -+ /* LPDDR4 BL = 16,other DDR type BL = 8 */ -+ tmp = readl_relaxed(dfi_regs + -+ DDRMON_CH0_DFI_ACCESS_NUM + i * 20); -+ if (info->dram_type == LPDDR4) -+ tmp *= 8; -+ else -+ tmp *= 4; -+ info->ch_usage[i].access = tmp; -+ - if (tmp > max) { - busier_ch = i; - max = tmp; -@@ -121,7 +400,8 @@ static int rockchip_dfi_disable(struct devfreq_event_dev *edev) - struct rockchip_dfi *info = devfreq_event_get_drvdata(edev); - - rockchip_dfi_stop_hardware_counter(edev); -- clk_disable_unprepare(info->clk); -+ if (info->clk) -+ clk_disable_unprepare(info->clk); - - return 0; - } -@@ -131,10 +411,13 @@ static int rockchip_dfi_enable(struct devfreq_event_dev *edev) - struct rockchip_dfi *info = devfreq_event_get_drvdata(edev); - int ret; - -- ret = clk_prepare_enable(info->clk); -- if (ret) { -- dev_err(&edev->dev, "failed to enable dfi clk: %d\n", ret); -- return ret; -+ if (info->clk) { -+ ret = clk_prepare_enable(info->clk); -+ if (ret) { -+ dev_err(&edev->dev, "failed to enable dfi clk: %d\n", -+ ret); -+ return ret; -+ } - } - - rockchip_dfi_start_hardware_counter(edev); -@@ -151,8 +434,11 @@ static int rockchip_dfi_get_event(struct devfreq_event_dev *edev, - { - struct rockchip_dfi *info = devfreq_event_get_drvdata(edev); - int busier_ch; -+ unsigned long flags; - -+ local_irq_save(flags); - busier_ch = rockchip_dfi_get_busier_ch(edev); -+ local_irq_restore(flags); - - edata->load_count = info->ch_usage[busier_ch].access; - edata->total_count = info->ch_usage[busier_ch].total; -@@ -167,23 +453,117 @@ static const struct devfreq_event_ops rockchip_dfi_ops = { - .set_event = rockchip_dfi_set_event, - }; - --static const struct of_device_id rockchip_dfi_id_match[] = { -- { .compatible = "rockchip,rk3399-dfi" }, -- { }, --}; --MODULE_DEVICE_TABLE(of, rockchip_dfi_id_match); -+static __init int px30_dfi_init(struct platform_device *pdev, -+ struct rockchip_dfi *data, -+ struct devfreq_event_desc *desc) -+{ -+ struct device_node *np = pdev->dev.of_node, *node; -+ struct resource *res; -+ u32 val; - --static int rockchip_dfi_probe(struct platform_device *pdev) -+ res = platform_get_resource(pdev, IORESOURCE_MEM, 0); -+ data->regs = devm_ioremap_resource(&pdev->dev, res); -+ if (IS_ERR(data->regs)) -+ return PTR_ERR(data->regs); -+ -+ node = of_parse_phandle(np, "rockchip,pmugrf", 0); -+ if (node) { -+ data->regmap_pmugrf = syscon_node_to_regmap(node); -+ if (IS_ERR(data->regmap_pmugrf)) -+ return PTR_ERR(data->regmap_pmugrf); -+ } -+ -+ regmap_read(data->regmap_pmugrf, PX30_PMUGRF_OS_REG2, &val); -+ data->dram_type = READ_DRAMTYPE_INFO(val); -+ data->ch_msk = 1; -+ data->clk = NULL; -+ -+ desc->ops = &rockchip_dfi_ops; -+ -+ return 0; -+} -+ -+static __init int rk3128_dfi_init(struct platform_device *pdev, -+ struct rockchip_dfi *data, -+ struct devfreq_event_desc *desc) -+{ -+ struct device_node *np = pdev->dev.of_node, *node; -+ -+ node = of_parse_phandle(np, "rockchip,grf", 0); -+ if (node) { -+ data->regmap_grf = syscon_node_to_regmap(node); -+ if (IS_ERR(data->regmap_grf)) -+ return PTR_ERR(data->regmap_grf); -+ } -+ -+ desc->ops = &rk3128_dfi_ops; -+ -+ return 0; -+} -+ -+static __init int rk3288_dfi_init(struct platform_device *pdev, -+ struct rockchip_dfi *data, -+ struct devfreq_event_desc *desc) -+{ -+ struct device_node *np = pdev->dev.of_node, *node; -+ u32 val; -+ -+ node = of_parse_phandle(np, "rockchip,pmu", 0); -+ if (node) { -+ data->regmap_pmu = syscon_node_to_regmap(node); -+ if (IS_ERR(data->regmap_pmu)) -+ return PTR_ERR(data->regmap_pmu); -+ } -+ -+ node = of_parse_phandle(np, "rockchip,grf", 0); -+ if (node) { -+ data->regmap_grf = syscon_node_to_regmap(node); -+ if (IS_ERR(data->regmap_grf)) -+ return PTR_ERR(data->regmap_grf); -+ } -+ -+ regmap_read(data->regmap_pmu, RK3288_PMU_SYS_REG2, &val); -+ data->dram_type = READ_DRAMTYPE_INFO(val); -+ data->ch_msk = READ_CH_INFO(val); -+ -+ if (data->dram_type == DDR3) -+ regmap_write(data->regmap_grf, RK3288_GRF_SOC_CON4, -+ RK3288_DDR3_SEL); -+ else -+ regmap_write(data->regmap_grf, RK3288_GRF_SOC_CON4, -+ RK3288_LPDDR_SEL); -+ -+ desc->ops = &rk3288_dfi_ops; -+ -+ return 0; -+} -+ -+static __init int rk3368_dfi_init(struct platform_device *pdev, -+ struct rockchip_dfi *data, -+ struct devfreq_event_desc *desc) -+{ -+ struct device *dev = &pdev->dev; -+ -+ if (!dev->parent || !dev->parent->of_node) -+ return -EINVAL; -+ -+ data->regmap_grf = syscon_node_to_regmap(dev->parent->of_node); -+ if (IS_ERR(data->regmap_grf)) -+ return PTR_ERR(data->regmap_grf); -+ -+ desc->ops = &rk3368_dfi_ops; -+ -+ return 0; -+} -+ -+static __init int rockchip_dfi_init(struct platform_device *pdev, -+ struct rockchip_dfi *data, -+ struct devfreq_event_desc *desc) - { - struct device *dev = &pdev->dev; -- struct rockchip_dfi *data; - struct resource *res; -- struct devfreq_event_desc *desc; - struct device_node *np = pdev->dev.of_node, *node; -- -- data = devm_kzalloc(dev, sizeof(struct rockchip_dfi), GFP_KERNEL); -- if (!data) -- return -ENOMEM; -+ u32 val; - - res = platform_get_resource(pdev, IORESOURCE_MEM, 0); - data->regs = devm_ioremap_resource(&pdev->dev, res); -@@ -203,21 +583,97 @@ static int rockchip_dfi_probe(struct platform_device *pdev) - if (IS_ERR(data->regmap_pmu)) - return PTR_ERR(data->regmap_pmu); - } -- data->dev = dev; -+ -+ regmap_read(data->regmap_pmu, PMUGRF_OS_REG2, &val); -+ data->dram_type = READ_DRAMTYPE_INFO(val); -+ data->ch_msk = READ_CH_INFO(val); -+ -+ desc->ops = &rockchip_dfi_ops; -+ -+ return 0; -+} -+ -+static __init int rk3328_dfi_init(struct platform_device *pdev, -+ struct rockchip_dfi *data, -+ struct devfreq_event_desc *desc) -+{ -+ struct device_node *np = pdev->dev.of_node, *node; -+ struct resource *res; -+ u32 val; -+ -+ res = platform_get_resource(pdev, IORESOURCE_MEM, 0); -+ data->regs = devm_ioremap_resource(&pdev->dev, res); -+ if (IS_ERR(data->regs)) -+ return PTR_ERR(data->regs); -+ -+ node = of_parse_phandle(np, "rockchip,grf", 0); -+ if (node) { -+ data->regmap_grf = syscon_node_to_regmap(node); -+ if (IS_ERR(data->regmap_grf)) -+ return PTR_ERR(data->regmap_grf); -+ } -+ -+ regmap_read(data->regmap_grf, RK3328_GRF_OS_REG2, &val); -+ data->dram_type = READ_DRAMTYPE_INFO(val); -+ data->ch_msk = 1; -+ data->clk = NULL; -+ -+ desc->ops = &rockchip_dfi_ops; -+ -+ return 0; -+} -+ -+static const struct of_device_id rockchip_dfi_id_match[] = { -+ { .compatible = "rockchip,px30-dfi", .data = px30_dfi_init }, -+ { .compatible = "rockchip,rk1808-dfi", .data = px30_dfi_init }, -+ { .compatible = "rockchip,rk3128-dfi", .data = rk3128_dfi_init }, -+ { .compatible = "rockchip,rk3288-dfi", .data = rk3288_dfi_init }, -+ { .compatible = "rockchip,rk3328-dfi", .data = rk3328_dfi_init }, -+ { .compatible = "rockchip,rk3368-dfi", .data = rk3368_dfi_init }, -+ { .compatible = "rockchip,rk3399-dfi", .data = rockchip_dfi_init }, -+ { }, -+}; -+MODULE_DEVICE_TABLE(of, rockchip_dfi_id_match); -+ -+static int rockchip_dfi_probe(struct platform_device *pdev) -+{ -+ struct device *dev = &pdev->dev; -+ struct rockchip_dfi *data; -+ struct devfreq_event_desc *desc; -+ struct device_node *np = pdev->dev.of_node; -+ const struct of_device_id *match; -+ int (*init)(struct platform_device *pdev, struct rockchip_dfi *data, -+ struct devfreq_event_desc *desc); -+ -+ data = devm_kzalloc(dev, sizeof(struct rockchip_dfi), GFP_KERNEL); -+ if (!data) -+ return -ENOMEM; - - desc = devm_kzalloc(dev, sizeof(*desc), GFP_KERNEL); - if (!desc) - return -ENOMEM; - -- desc->ops = &rockchip_dfi_ops; -+ match = of_match_node(rockchip_dfi_id_match, pdev->dev.of_node); -+ if (match) { -+ init = match->data; -+ if (init) { -+ if (init(pdev, data, desc)) -+ return -EINVAL; -+ } else { -+ return 0; -+ } -+ } else { -+ return 0; -+ } -+ - desc->driver_data = data; - desc->name = np->name; - data->desc = desc; -+ data->dev = dev; - -- data->edev = devm_devfreq_event_add_edev(&pdev->dev, desc); -+ data->edev = devm_devfreq_event_add_edev(dev, desc); - if (IS_ERR(data->edev)) { -- dev_err(&pdev->dev, -- "failed to add devfreq-event device\n"); -+ dev_err(dev, "failed to add devfreq-event device\n"); - return PTR_ERR(data->edev); - } diff --git a/target/linux/rockchip/patches-5.4/806-arm64-dts-rockchip-rk3328-add-dfi-node.patch b/target/linux/rockchip/patches-5.4/806-arm64-dts-rockchip-rk3328-add-dfi-node.patch deleted file mode 100644 index e9b79b6fa9..0000000000 --- a/target/linux/rockchip/patches-5.4/806-arm64-dts-rockchip-rk3328-add-dfi-node.patch +++ /dev/null @@ -1,27 +0,0 @@ -From f9ae6e992d3d9e80357fee7d65ba0fe2dd37ae1f Mon Sep 17 00:00:00 2001 -From: hmz007 -Date: Tue, 19 Nov 2019 14:21:51 +0800 -Subject: [PATCH] arm64: dts: rockchip: rk3328: add dfi node - -Signed-off-by: hmz007 -[adjusted commit title] -Signed-off-by: Tianling Shen ---- - arch/arm64/boot/dts/rockchip/rk3328.dtsi | 7 +++++++ - ---- a/arch/arm64/boot/dts/rockchip/rk3328.dtsi -+++ b/arch/arm64/boot/dts/rockchip/rk3328.dtsi -@@ -993,6 +993,13 @@ - }; - }; - -+ dfi: dfi@ff790000 { -+ reg = <0x00 0xff790000 0x00 0x400>; -+ compatible = "rockchip,rk3328-dfi"; -+ rockchip,grf = <&grf>; -+ status = "disabled"; -+ }; -+ - gic: interrupt-controller@ff811000 { - compatible = "arm,gic-400"; - #interrupt-cells = <3>; diff --git a/target/linux/rockchip/patches-5.4/807-arm64-dts-nanopi-r2s-add-rk3328-dmc-relate-node.patch b/target/linux/rockchip/patches-5.4/807-arm64-dts-nanopi-r2s-add-rk3328-dmc-relate-node.patch deleted file mode 100644 index 091e295978..0000000000 --- a/target/linux/rockchip/patches-5.4/807-arm64-dts-nanopi-r2s-add-rk3328-dmc-relate-node.patch +++ /dev/null @@ -1,126 +0,0 @@ -From f9ae6e992d3d9e80357fee7d65ba0fe2dd37ae1f Mon Sep 17 00:00:00 2001 -From: hmz007 -Date: Tue, 19 Nov 2019 14:21:51 +0800 -Subject: [PATCH] arm64: dts: nanopi-r2: add rk3328-dmc relate node - -Signed-off-by: hmz007 ---- - .../rockchip/rk3328-dram-default-timing.dtsi | 311 ++++++++++++++++++ - .../dts/rockchip/rk3328-nanopi-r2-common.dtsi | 85 ++++- - include/dt-bindings/clock/rockchip-ddr.h | 63 ++++ - include/dt-bindings/memory/rk3328-dram.h | 159 +++++++++ - 4 files changed, 617 insertions(+), 1 deletion(-) - create mode 100644 arch/arm64/boot/dts/rockchip/rk3328-dram-default-timing.dtsi - create mode 100644 include/dt-bindings/clock/rockchip-ddr.h - create mode 100644 include/dt-bindings/memory/rk3328-dram.h - ---- a/arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2s.dts -+++ b/arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2s.dts -@@ -7,6 +7,7 @@ - - #include - #include -+#include "rk3328-dram-default-timing.dtsi" - #include "rk3328.dtsi" - - / { -@@ -115,6 +116,72 @@ - regulator-max-microvolt = <5000000>; - enable-active-high; - }; -+ -+ dmc: dmc { -+ compatible = "rockchip,rk3328-dmc"; -+ devfreq-events = <&dfi>; -+ center-supply = <&vdd_log>; -+ clocks = <&cru SCLK_DDRCLK>; -+ clock-names = "dmc_clk"; -+ operating-points-v2 = <&dmc_opp_table>; -+ ddr_timing = <&ddr_timing>; -+ upthreshold = <40>; -+ downdifferential = <20>; -+ auto-min-freq = <786000>; -+ auto-freq-en = <0>; -+ #cooling-cells = <2>; -+ status = "okay"; -+ -+ ddr_power_model: ddr_power_model { -+ compatible = "ddr_power_model"; -+ dynamic-power-coefficient = <120>; -+ static-power-coefficient = <200>; -+ ts = <32000 4700 (-80) 2>; -+ thermal-zone = "soc-thermal"; -+ }; -+ }; -+ -+ dmc_opp_table: dmc-opp-table { -+ compatible = "operating-points-v2"; -+ -+ rockchip,leakage-voltage-sel = < -+ 1 10 0 -+ 11 254 1 -+ >; -+ nvmem-cells = <&logic_leakage>; -+ nvmem-cell-names = "ddr_leakage"; -+ -+ opp-786000000 { -+ opp-hz = /bits/ 64 <786000000>; -+ opp-microvolt = <1075000>; -+ opp-microvolt-L0 = <1075000>; -+ opp-microvolt-L1 = <1050000>; -+ }; -+ opp-798000000 { -+ opp-hz = /bits/ 64 <798000000>; -+ opp-microvolt = <1075000>; -+ opp-microvolt-L0 = <1075000>; -+ opp-microvolt-L1 = <1050000>; -+ }; -+ opp-840000000 { -+ opp-hz = /bits/ 64 <840000000>; -+ opp-microvolt = <1075000>; -+ opp-microvolt-L0 = <1075000>; -+ opp-microvolt-L1 = <1050000>; -+ }; -+ opp-924000000 { -+ opp-hz = /bits/ 64 <924000000>; -+ opp-microvolt = <1100000>; -+ opp-microvolt-L0 = <1100000>; -+ opp-microvolt-L1 = <1075000>; -+ }; -+ opp-1056000000 { -+ opp-hz = /bits/ 64 <1056000000>; -+ opp-microvolt = <1175000>; -+ opp-microvolt-L0 = <1175000>; -+ opp-microvolt-L1 = <1150000>; -+ }; -+ }; - }; - - &cpu0 { -@@ -133,6 +200,10 @@ - cpu-supply = <&vdd_arm>; - }; - -+&dfi { -+ status = "okay"; -+}; -+ - &gmac2io { - assigned-clocks = <&cru SCLK_MAC2IO>, <&cru SCLK_MAC2IO_EXT>; - assigned-clock-parents = <&gmac_clk>, <&gmac_clk>; -@@ -198,6 +269,7 @@ - regulator-name = "vdd_log"; - regulator-always-on; - regulator-boot-on; -+ regulator-init-microvolt = <1075000>; - regulator-min-microvolt = <712500>; - regulator-max-microvolt = <1450000>; - regulator-ramp-delay = <12500>; -@@ -212,6 +284,7 @@ - regulator-name = "vdd_arm"; - regulator-always-on; - regulator-boot-on; -+ regulator-init-microvolt = <1225000>; - regulator-min-microvolt = <712500>; - regulator-max-microvolt = <1450000>; - regulator-ramp-delay = <12500>; diff --git a/target/linux/rockchip/patches-5.4/911-kernel-dma-adjust-default-coherent_pool-to-2MiB.patch b/target/linux/rockchip/patches-5.4/911-kernel-dma-adjust-default-coherent_pool-to-2MiB.patch deleted file mode 100644 index c870a4f74c..0000000000 --- a/target/linux/rockchip/patches-5.4/911-kernel-dma-adjust-default-coherent_pool-to-2MiB.patch +++ /dev/null @@ -1,20 +0,0 @@ -From 16bdf3e76fec6ddb44f1fcf221139fb39d225031 Mon Sep 17 00:00:00 2001 -From: Igor Pecovnik -Date: Sat, 2 Jan 2021 05:23:55 +0000 -Subject: [PATCH] kernel: dma: adjust default coherent_pool to 2MiB - ---- - kernel/dma/remap.c | 2 +- - 1 file changed, 1 insertion(+), 1 deletion(-) - ---- a/kernel/dma/remap.c -+++ b/kernel/dma/remap.c -@@ -101,7 +101,7 @@ void dma_common_free_remap(void *cpu_add - #ifdef CONFIG_DMA_DIRECT_REMAP - static struct gen_pool *atomic_pool __ro_after_init; - --#define DEFAULT_DMA_COHERENT_POOL_SIZE SZ_256K -+#define DEFAULT_DMA_COHERENT_POOL_SIZE SZ_2M - static size_t atomic_pool_size __initdata = DEFAULT_DMA_COHERENT_POOL_SIZE; - - static int __init early_coherent_pool(char *p) diff --git a/target/linux/rockchip/patches-5.4/991-arm64-dts-rockchip-add-more-cpu-operating-points-for.patch b/target/linux/rockchip/patches-5.4/991-arm64-dts-rockchip-add-more-cpu-operating-points-for.patch deleted file mode 100644 index 818ee4ce1d..0000000000 --- a/target/linux/rockchip/patches-5.4/991-arm64-dts-rockchip-add-more-cpu-operating-points-for.patch +++ /dev/null @@ -1,44 +0,0 @@ -From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001 -From: Leonidas P. Papadakos -Date: Fri, 1 Mar 2019 21:55:53 +0200 -Subject: [PATCH v2] arm64: dts: rockchip: add more cpu operating points for - RK3328 - -This allows for greater max frequency on rk3328 boards, -increasing performance. - -It has been included in Armbian (a linux distibution for ARM boards) -for a while now without any reported issues - -https://github.com/armbian/build/blob/master/patch/kernel/rockchip64-default/enable-1392mhz-opp.patch -https://github.com/armbian/build/blob/master/patch/kernel/rockchip64-default/enable-1512mhz-opp.patch - -Signed-off-by: Leonidas P. Papadakos ---- - arch/arm64/boot/dts/rockchip/rk3328.dtsi | 15 +++++++++++++++ - 1 files changed, 15 insertions(+) - ---- a/arch/arm64/boot/dts/rockchip/rk3328.dtsi -+++ b/arch/arm64/boot/dts/rockchip/rk3328.dtsi -@@ -140,6 +140,21 @@ - opp-microvolt = <1300000>; - clock-latency-ns = <40000>; - }; -+ opp-1392000000 { -+ opp-hz = /bits/ 64 <1392000000>; -+ opp-microvolt = <1350000>; -+ clock-latency-ns = <40000>; -+ }; -+ opp-1512000000 { -+ opp-hz = /bits/ 64 <1512000000>; -+ opp-microvolt = <1400000>; -+ clock-latency-ns = <40000>; -+ }; -+ opp-1608000000 { -+ opp-hz = /bits/ 64 <1608000000>; -+ opp-microvolt = <1450000>; -+ clock-latency-ns = <40000>; -+ }; - }; - - amba { diff --git a/target/linux/rockchip/patches-5.4/992-rockchip-rk3399-overclock-to-2.2-1.8-GHz.patch b/target/linux/rockchip/patches-5.4/992-rockchip-rk3399-overclock-to-2.2-1.8-GHz.patch deleted file mode 100644 index 12cb932d18..0000000000 --- a/target/linux/rockchip/patches-5.4/992-rockchip-rk3399-overclock-to-2.2-1.8-GHz.patch +++ /dev/null @@ -1,46 +0,0 @@ -From 04202df5cb497b1934c95211cf43784ef62245a4 Mon Sep 17 00:00:00 2001 -From: Tianling Shen -Date: Mon, 18 Oct 2021 12:47:30 +0800 -Subject: [PATCH] rockchip: rk3399: overclock to 2.2/1.8 GHz - -It's stable enough to overclock cpu frequency to 2.2/1.8 GHz, -and for better performance. - -Co-development-by: gzelvis -Signed-off-by: Tianling Shen ---- - arch/arm64/boot/dts/rockchip/rk3399-opp.dtsi | 16 ++++++++++++++++ - 1 file changed, 16 insertions(+) - ---- a/arch/arm64/boot/dts/rockchip/rk3399-opp.dtsi -+++ b/arch/arm64/boot/dts/rockchip/rk3399-opp.dtsi -@@ -33,6 +33,14 @@ - opp-hz = /bits/ 64 <1416000000>; - opp-microvolt = <1125000>; - }; -+ opp06 { -+ opp-hz = /bits/ 64 <1608000000>; -+ opp-microvolt = <1225000>; -+ }; -+ opp07 { -+ opp-hz = /bits/ 64 <1800000000>; -+ opp-microvolt = <1275000>; -+ }; - }; - - cluster1_opp: opp-table1 { -@@ -72,6 +80,14 @@ - opp-hz = /bits/ 64 <1800000000>; - opp-microvolt = <1200000>; - }; -+ opp08 { -+ opp-hz = /bits/ 64 <2016000000>; -+ opp-microvolt = <1250000>; -+ }; -+ opp09 { -+ opp-hz = /bits/ 64 <2208000000>; -+ opp-microvolt = <1325000>; -+ }; - }; - - gpu_opp_table: opp-table2 { diff --git a/target/linux/sunxi/image/cortexa53.mk b/target/linux/sunxi/image/cortexa53.mk index 08c743be85..006c9bbaa6 100644 --- a/target/linux/sunxi/image/cortexa53.mk +++ b/target/linux/sunxi/image/cortexa53.mk @@ -62,7 +62,7 @@ TARGET_DEVICES += libretech_all-h3-cc-h5 define Device/olimex_a64-olinuxino DEVICE_VENDOR := Olimex DEVICE_MODEL := A64-Olinuxino - DEVICE_PACKAGES := kmod-rtl8723bs rtl8723bs-firmware + DEVICE_PACKAGES := kmod-rtl8723bs rtl8723bu-firmware $(Device/sun50i-a64) SUNXI_DTS := $$(SUNXI_DTS_DIR)$$(SOC)-olinuxino endef @@ -72,7 +72,7 @@ define Device/olimex_a64-olinuxino-emmc DEVICE_VENDOR := Olimex DEVICE_MODEL := A64-Olinuxino DEVICE_VARIANT := eMMC - DEVICE_PACKAGES := kmod-rtl8723bs rtl8723bs-firmware + DEVICE_PACKAGES := kmod-rtl8723bs rtl8723bu-firmware $(Device/sun50i-a64) SUNXI_DTS := $$(SUNXI_DTS_DIR)$$(SOC)-olinuxino-emmc endef @@ -81,7 +81,7 @@ TARGET_DEVICES += olimex_a64-olinuxino-emmc define Device/pine64_pine64-plus DEVICE_VENDOR := Pine64 DEVICE_MODEL := Pine64+ - DEVICE_PACKAGES := kmod-rtl8723bs rtl8723bs-firmware + DEVICE_PACKAGES := kmod-rtl8723bs rtl8723bu-firmware $(Device/sun50i-a64) endef TARGET_DEVICES += pine64_pine64-plus @@ -89,7 +89,7 @@ TARGET_DEVICES += pine64_pine64-plus define Device/pine64_sopine-baseboard DEVICE_VENDOR := Pine64 DEVICE_MODEL := SoPine - DEVICE_PACKAGES := kmod-rtl8723bs rtl8723bs-firmware + DEVICE_PACKAGES := kmod-rtl8723bs rtl8723bu-firmware $(Device/sun50i-a64) endef TARGET_DEVICES += pine64_sopine-baseboard diff --git a/toolchain/musl/Config.in b/toolchain/musl/Config.in index 7e83b6fa53..67ede4d1e7 100644 --- a/toolchain/musl/Config.in +++ b/toolchain/musl/Config.in @@ -1,9 +1,10 @@ # Password crypt stubbing config MUSL_DISABLE_CRYPT_SIZE_HACK - bool "Include crypt() support for SHA256, SHA512 and Blowfish ciphers" - depends on TOOLCHAINOPTS && USE_MUSL && !EXTERNAL_TOOLCHAIN - default n + bool + prompt "Include crypt() support for SHA256, SHA512 and Blowfish ciphers" if TOOLCHAINOPTS + depends on USE_MUSL && !EXTERNAL_TOOLCHAIN + default y help Enable this option to re-include crypt() support for the SHA256, SHA512 and Blowfish ciphers. Without this option, attempting to hash a string with a salt diff --git a/tools/mkimage/Makefile b/tools/mkimage/Makefile index 1eb713a22a..5ed4107e1d 100644 --- a/tools/mkimage/Makefile +++ b/tools/mkimage/Makefile @@ -7,14 +7,14 @@ include $(TOPDIR)/rules.mk PKG_NAME:=mkimage -PKG_VERSION:=2021.01 +PKG_VERSION:=2021.10 PKG_SOURCE:=u-boot-$(PKG_VERSION).tar.bz2 PKG_SOURCE_URL:= \ https://mirror.cyberbits.eu/u-boot \ https://ftp.denx.de/pub/u-boot \ ftp://ftp.denx.de/pub/u-boot -PKG_HASH:=b407e1510a74e863b8b5cb42a24625344f0e0c2fc7582d8c866bd899367d0454 +PKG_HASH:=cde723e19262e646f2670d25e5ec4b1b368490de950d4e26275a988c36df0bd4 HOST_BUILD_DIR:=$(BUILD_DIR_HOST)/u-boot-$(PKG_VERSION) @@ -38,6 +38,7 @@ define Host/Compile CONFIG_FIT=y \ CONFIG_FIT_SIGNATURE=y \ CONFIG_FIT_SIGNATURE_MAX_SIZE=0x10000000 \ + CONFIG_TOOLS_LIBCRYPTO=y \ tools-only endef diff --git a/tools/mkimage/patches/030-allow-to-use-different-magic.patch b/tools/mkimage/patches/030-allow-to-use-different-magic.patch index 3a1677d54d..936113595a 100644 --- a/tools/mkimage/patches/030-allow-to-use-different-magic.patch +++ b/tools/mkimage/patches/030-allow-to-use-different-magic.patch @@ -2,7 +2,7 @@ This patch makes it possible to set a custom image magic. --- a/tools/mkimage.c +++ b/tools/mkimage.c -@@ -21,6 +21,7 @@ static struct image_tool_params params = +@@ -24,6 +24,7 @@ static struct image_tool_params params = .arch = IH_ARCH_PPC, .type = IH_TYPE_KERNEL, .comp = IH_COMP_GZIP, @@ -10,7 +10,7 @@ This patch makes it possible to set a custom image magic. .dtc = MKIMAGE_DEFAULT_DTC_OPTIONS, .imagename = "", .imagename2 = "", -@@ -82,11 +83,12 @@ static void usage(const char *msg) +@@ -85,11 +86,12 @@ static void usage(const char *msg) " -l ==> list image header information\n", params.cmdname); fprintf(stderr, @@ -24,16 +24,16 @@ This patch makes it possible to set a custom image magic. " -a ==> set load address to 'addr' (hex)\n" " -e ==> set entry point to 'ep' (hex)\n" " -n ==> set image name to 'name'\n" -@@ -150,7 +152,7 @@ static void process_args(int argc, char +@@ -155,7 +157,7 @@ static void process_args(int argc, char int opt; while ((opt = getopt(argc, argv, -- "a:A:b:B:c:C:d:D:e:Ef:Fk:i:K:ln:N:p:O:rR:qstT:vVx")) != -1) { -+ "a:A:b:B:c:C:d:D:e:Ef:Fk:i:K:lM:n:N:p:O:rR:qstT:vVx")) != -1) { +- "a:A:b:B:c:C:d:D:e:Ef:FG:k:i:K:ln:N:p:O:rR:qstT:vVx")) != -1) { ++ "a:A:b:B:c:C:d:D:e:Ef:FG:k:i:K:lM:n:N:p:O:rR:qstT:vVx")) != -1) { switch (opt) { case 'a': params.addr = strtoull(optarg, &ptr, 16); -@@ -237,6 +239,14 @@ static void process_args(int argc, char +@@ -245,6 +247,14 @@ static void process_args(int argc, char case 'l': params.lflag = 1; break; diff --git a/tools/mkimage/patches/050-Add-compatibility-with-non-Linux-hosts.patch b/tools/mkimage/patches/050-Add-compatibility-with-non-Linux-hosts.patch index 5b87a259db..7b71dce3b3 100644 --- a/tools/mkimage/patches/050-Add-compatibility-with-non-Linux-hosts.patch +++ b/tools/mkimage/patches/050-Add-compatibility-with-non-Linux-hosts.patch @@ -15,11 +15,9 @@ __u64 is not available on FreeBSD, remove its usage. Signed-off-by: Hauke Mehrtens --- include/image.h | 2 ++ - include/imx8image.h | 5 +++++ include/linux/posix_types.h | 2 ++ include/linux/types.h | 4 +++- - lib/rsa/rsa-sign.c | 2 +- - 5 files changed, 13 insertions(+), 2 deletions(-) + 3 files changed, 7 insertions(+), 1 deletion(-) --- a/include/image.h +++ b/include/image.h diff --git a/tools/mkimage/patches/080-mtk_image-add-support-for-booting-ARM64-images.patch b/tools/mkimage/patches/080-mtk_image-add-support-for-booting-ARM64-images.patch deleted file mode 100644 index dfe8128fb5..0000000000 --- a/tools/mkimage/patches/080-mtk_image-add-support-for-booting-ARM64-images.patch +++ /dev/null @@ -1,134 +0,0 @@ -From 44165e4c676d266f73fda2e6ba82b4bf3262daf2 Mon Sep 17 00:00:00 2001 -From: Fabien Parent -Date: Fri, 16 Oct 2020 19:52:37 +0200 -Subject: [PATCH] tools: mtk_image: add support for booting ARM64 images - -mkimage is only able to package aarch32 binaries. Add support for -AArch64 images. - -One can create a ARM64 image using the following command line: -mkimage -T mtk_image -a 0x201000 -e 0x201000 -n "media=emmc;arm64=1" --d bl2.bin bl2.img - -Signed-off-by: Fabien Parent ---- - tools/mtk_image.c | 28 ++++++++++++++++++++++++---- - tools/mtk_image.h | 6 +++++- - 2 files changed, 29 insertions(+), 5 deletions(-) - -diff --git a/tools/mtk_image.c b/tools/mtk_image.c -index 2ca519483d..bde1e5da4b 100644 ---- a/tools/mtk_image.c -+++ b/tools/mtk_image.c -@@ -246,6 +246,7 @@ static const struct brom_img_type { - /* Image type selected by user */ - static enum brlyt_img_type hdr_media; - static int use_lk_hdr; -+static bool is_arm64_image; - - /* LK image name */ - static char lk_name[32] = "U-Boot"; -@@ -276,6 +277,7 @@ static int mtk_brom_parse_imagename(const char *imagename) - static const char *media = ""; - static const char *nandinfo = ""; - static const char *lk = ""; -+ static const char *arm64_param = ""; - - key = buf; - while (key) { -@@ -323,6 +325,9 @@ static int mtk_brom_parse_imagename(const char *imagename) - - if (!strcmp(key, "lkname")) - snprintf(lk_name, sizeof(lk_name), "%s", val); -+ -+ if (!strcmp(key, "arm64")) -+ arm64_param = val; - } - - if (next) -@@ -354,6 +359,9 @@ static int mtk_brom_parse_imagename(const char *imagename) - } - } - -+ if (arm64_param && arm64_param[0] == '1') -+ is_arm64_image = true; -+ - free(buf); - - if (hdr_media == BRLYT_TYPE_INVALID) { -@@ -458,6 +466,9 @@ static int mtk_image_verify_gen_header(const uint8_t *ptr, int print) - le32_to_cpu(gfh->file_info.load_addr) + - le32_to_cpu(gfh->file_info.jump_offset)); - -+ if (print) -+ printf("Architecture: %s\n", is_arm64_image ? "ARM64" : "ARM"); -+ - return 0; - } - -@@ -523,6 +534,9 @@ static int mtk_image_verify_nand_header(const uint8_t *ptr, int print) - le32_to_cpu(gfh->file_info.load_addr) + - le32_to_cpu(gfh->file_info.jump_offset)); - -+ if (print) -+ printf("Architecture: %s\n", is_arm64_image ? "ARM64" : "ARM"); -+ - return 0; - } - -@@ -581,6 +595,8 @@ static void put_ghf_common_header(struct gfh_common_header *gfh, int size, - static void put_ghf_header(struct gfh_header *gfh, int file_size, - int dev_hdr_size, int load_addr, int flash_type) - { -+ uint32_t cfg_bits; -+ - memset(gfh, 0, sizeof(struct gfh_header)); - - /* GFH_FILE_INFO header */ -@@ -608,11 +624,15 @@ static void put_ghf_header(struct gfh_header *gfh, int file_size, - /* GFH_BROM_CFG header */ - put_ghf_common_header(&gfh->brom_cfg.gfh, sizeof(gfh->brom_cfg), - GFH_TYPE_BROM_CFG, 3); -- gfh->brom_cfg.cfg_bits = cpu_to_le32( -- GFH_BROM_CFG_USBDL_AUTO_DETECT_DIS | -- GFH_BROM_CFG_USBDL_BY_KCOL0_TIMEOUT_EN | -- GFH_BROM_CFG_USBDL_BY_FLAG_TIMEOUT_EN); -+ cfg_bits = GFH_BROM_CFG_USBDL_AUTO_DETECT_DIS | -+ GFH_BROM_CFG_USBDL_BY_KCOL0_TIMEOUT_EN | -+ GFH_BROM_CFG_USBDL_BY_FLAG_TIMEOUT_EN; - gfh->brom_cfg.usbdl_by_kcol0_timeout_ms = cpu_to_le32(5000); -+ if (is_arm64_image) { -+ gfh->brom_cfg.jump_bl_arm64 = GFH_BROM_CFG_JUMP_BL_ARM64; -+ cfg_bits |= GFH_BROM_CFG_JUMP_BL_ARM64_EN; -+ } -+ gfh->brom_cfg.cfg_bits = cpu_to_le32(cfg_bits); - - /* GFH_BL_SEC_KEY header */ - put_ghf_common_header(&gfh->bl_sec_key.gfh, sizeof(gfh->bl_sec_key), -diff --git a/tools/mtk_image.h b/tools/mtk_image.h -index 4e78b3d0ff..7dda71ce88 100644 ---- a/tools/mtk_image.h -+++ b/tools/mtk_image.h -@@ -136,7 +136,9 @@ struct gfh_brom_cfg { - struct gfh_common_header gfh; - uint32_t cfg_bits; - uint32_t usbdl_by_auto_detect_timeout_ms; -- uint8_t unused[0x48]; -+ uint8_t unused[0x45]; -+ uint8_t jump_bl_arm64; -+ uint8_t unused2[2]; - uint32_t usbdl_by_kcol0_timeout_ms; - uint32_t usbdl_by_flag_timeout_ms; - uint32_t pad; -@@ -146,6 +148,8 @@ struct gfh_brom_cfg { - #define GFH_BROM_CFG_USBDL_AUTO_DETECT_DIS 0x10 - #define GFH_BROM_CFG_USBDL_BY_KCOL0_TIMEOUT_EN 0x80 - #define GFH_BROM_CFG_USBDL_BY_FLAG_TIMEOUT_EN 0x100 -+#define GFH_BROM_CFG_JUMP_BL_ARM64_EN 0x1000 -+#define GFH_BROM_CFG_JUMP_BL_ARM64 0x64 - - struct gfh_bl_sec_key { - struct gfh_common_header gfh; --- -2.30.1 - diff --git a/tools/mkimage/patches/081-mtk_image-add-an-option-to-set-device-header-offset.patch b/tools/mkimage/patches/081-mtk_image-add-an-option-to-set-device-header-offset.patch deleted file mode 100644 index 45f8f7c1c1..0000000000 --- a/tools/mkimage/patches/081-mtk_image-add-an-option-to-set-device-header-offset.patch +++ /dev/null @@ -1,226 +0,0 @@ -From patchwork Tue Mar 9 07:52:31 2021 -Content-Type: text/plain; charset="utf-8" -MIME-Version: 1.0 -Content-Transfer-Encoding: 7bit -X-Patchwork-Submitter: Weijie Gao -X-Patchwork-Id: 1449568 -Return-Path: -X-Original-To: incoming@patchwork.ozlabs.org -Delivered-To: patchwork-incoming@bilbo.ozlabs.org -Authentication-Results: ozlabs.org; - spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de - (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; helo=phobos.denx.de; - envelope-from=u-boot-bounces@lists.denx.de; receiver=) -Authentication-Results: ozlabs.org; - dkim=pass (1024-bit key; - unprotected) header.d=mediatek.com header.i=@mediatek.com header.a=rsa-sha256 - header.s=dk header.b=i1dK9gFR; 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-X-UUID: 3b5ccbd89ab948daa31ec738ee94e7ed-20210309 -Received: from mtkcas32.mediatek.inc [(172.27.4.253)] by mailgw02.mediatek.com - (envelope-from ) - (mailgw01.mediatek.com ESMTP with TLSv1.2 ECDHE-RSA-AES256-SHA384 256/256) - with ESMTP id 23424931; Tue, 09 Mar 2021 15:53:06 +0800 -Received: from MTKCAS32.mediatek.inc (172.27.4.184) by MTKMBS31N1.mediatek.inc - (172.27.4.69) with Microsoft SMTP Server (TLS) id 15.0.1497.2; - Tue, 9 Mar 2021 15:52:58 +0800 -Received: from mcddlt001.mediatek.inc (10.19.240.15) by MTKCAS32.mediatek.inc - (172.27.4.170) with Microsoft SMTP Server id 15.0.1497.2 via Frontend - Transport; Tue, 9 Mar 2021 15:52:58 +0800 -From: Weijie Gao -To: -CC: GSS_MTK_Uboot_upstream , Weijie Gao - -Subject: [PATCH] tools: mtk_image: add an option to set device header offset -Date: Tue, 9 Mar 2021 15:52:31 +0800 -Message-ID: <1615276351-30641-1-git-send-email-weijie.gao@mediatek.com> -X-Mailer: git-send-email 1.9.1 -MIME-Version: 1.0 -X-TM-SNTS-SMTP: - B09EA906E69093D91FA73A3F764A0B89D3838DA91A4FA20DA0483EBE19962CA02000:8 -X-MTK: N -X-BeenThere: u-boot@lists.denx.de -X-Mailman-Version: 2.1.34 -Precedence: list -List-Id: U-Boot discussion -List-Unsubscribe: , - -List-Archive: -List-Post: -List-Help: -List-Subscribe: , - -Errors-To: u-boot-bounces@lists.denx.de -Sender: "U-Boot" -X-Virus-Scanned: clamav-milter 0.102.4 at phobos.denx.de -X-Virus-Status: Clean - -This patch adds an option which allows setting the device header offset. -This is useful if this tool is used to generate ATF BL2 image of mt7622 for -SD cards. - -Signed-off-by: Weijie Gao ---- - tools/mtk_image.c | 50 ++++++++++++++++++++++++++++++++++++++++++++--- - 1 file changed, 47 insertions(+), 3 deletions(-) - -diff --git a/tools/mtk_image.c b/tools/mtk_image.c -index bde1e5da4b..418c5fd54b 100644 ---- a/tools/mtk_image.c -+++ b/tools/mtk_image.c -@@ -243,8 +243,13 @@ static const struct brom_img_type { - } - }; - -+/* Indicates whether we're generating or verifying */ -+static bool img_gen; -+static uint32_t img_size; -+ - /* Image type selected by user */ - static enum brlyt_img_type hdr_media; -+static uint32_t hdr_offset; - static int use_lk_hdr; - static bool is_arm64_image; - -@@ -275,6 +280,7 @@ static int mtk_brom_parse_imagename(const char *imagename) - - /* User passed arguments from image name */ - static const char *media = ""; -+ static const char *hdr_offs = ""; - static const char *nandinfo = ""; - static const char *lk = ""; - static const char *arm64_param = ""; -@@ -317,6 +323,9 @@ static int mtk_brom_parse_imagename(const char *imagename) - if (!strcmp(key, "media")) - media = val; - -+ if (!strcmp(key, "hdroffset")) -+ hdr_offs = val; -+ - if (!strcmp(key, "nandinfo")) - nandinfo = val; - -@@ -359,6 +368,10 @@ static int mtk_brom_parse_imagename(const char *imagename) - } - } - -+ /* parse device header offset */ -+ if (hdr_offs && hdr_offs[0]) -+ hdr_offset = strtoul(hdr_offs, NULL, 0); -+ - if (arm64_param && arm64_param[0] == '1') - is_arm64_image = true; - -@@ -422,6 +435,7 @@ static int mtk_image_vrec_header(struct image_tool_params *params, - static int mtk_image_verify_gen_header(const uint8_t *ptr, int print) - { - union gen_boot_header *gbh = (union gen_boot_header *)ptr; -+ uint32_t gfh_offset, total_size, devh_size; - struct brom_layout_header *bh; - struct gfh_header *gfh; - const char *bootmedia; -@@ -453,7 +467,32 @@ static int mtk_image_verify_gen_header(const uint8_t *ptr, int print) - le32_to_cpu(bh->type) != BRLYT_TYPE_SDMMC)) - return -1; - -- gfh = (struct gfh_header *)(ptr + le32_to_cpu(bh->header_size)); -+ devh_size = sizeof(struct gen_device_header); -+ -+ if (img_gen) { -+ gfh_offset = devh_size; -+ } else { -+ gfh_offset = le32_to_cpu(bh->header_size); -+ -+ if (gfh_offset + sizeof(struct gfh_header) > img_size) { -+ /* -+ * This may happen if the hdr_offset used to generate -+ * this image is not zero. -+ * Since device header size is not fixed, we can't -+ * cover all possible cases. -+ * Assuming the image is valid only if the real -+ * device header size equals to devh_size. -+ */ -+ total_size = le32_to_cpu(bh->total_size); -+ -+ if (total_size - gfh_offset > img_size - devh_size) -+ return -1; -+ -+ gfh_offset = devh_size; -+ } -+ } -+ -+ gfh = (struct gfh_header *)(ptr + gfh_offset); - - if (strcmp(gfh->file_info.name, GFH_FILE_INFO_NAME)) - return -1; -@@ -549,6 +588,8 @@ static int mtk_image_verify_header(unsigned char *ptr, int image_size, - if (le32_to_cpu(lk->magic) == LK_PART_MAGIC) - return 0; - -+ img_size = image_size; -+ - if (!strcmp((char *)ptr, NAND_BOOT_NAME)) - return mtk_image_verify_nand_header(ptr, 0); - else -@@ -682,8 +723,8 @@ static void mtk_image_set_gen_header(void *ptr, off_t filesize, - - /* BRLYT header */ - put_brom_layout_header(&hdr->brlyt, hdr_media); -- hdr->brlyt.header_size = cpu_to_le32(sizeof(struct gen_device_header)); -- hdr->brlyt.total_size = cpu_to_le32(filesize); -+ hdr->brlyt.header_size = cpu_to_le32(hdr_offset + sizeof(*hdr)); -+ hdr->brlyt.total_size = cpu_to_le32(hdr_offset + filesize); - hdr->brlyt.header_size_2 = hdr->brlyt.header_size; - hdr->brlyt.total_size_2 = hdr->brlyt.total_size; - -@@ -747,6 +788,9 @@ static void mtk_image_set_header(void *ptr, struct stat *sbuf, int ifd, - return; - } - -+ img_gen = true; -+ img_size = sbuf->st_size; -+ - if (hdr_media == BRLYT_TYPE_NAND || hdr_media == BRLYT_TYPE_SNAND) - mtk_image_set_nand_header(ptr, sbuf->st_size, params->addr); - else diff --git a/tools/mkimage/patches/090-macos-arm64-builing-fix.patch b/tools/mkimage/patches/090-macos-arm64-builing-fix.patch index 216a8abd35..9f842146f7 100644 --- a/tools/mkimage/patches/090-macos-arm64-builing-fix.patch +++ b/tools/mkimage/patches/090-macos-arm64-builing-fix.patch @@ -2,27 +2,9 @@ This patch fixes compilation issues on MacOS arm64. Based on discussion https://github.com/u-boot/u-boot/commit/3b142045e8a7f0ab17b6099e9226296af45967d0 -diff --git a/Makefile b/Makefile -index b4f1cbc..551041f 100644 ---- a/Makefile -+++ b/Makefile -@@ -324,11 +324,6 @@ HOSTCC = $(call os_x_before, 10, 5, "cc", "gcc") - KBUILD_HOSTCFLAGS += $(call os_x_before, 10, 4, "-traditional-cpp") - KBUILD_HOSTLDFLAGS += $(call os_x_before, 10, 5, "-multiply_defined suppress") - --# since Lion (10.7) ASLR is on by default, but we use linker generated lists --# in some host tools which is a problem then ... so disable ASLR for these --# tools --KBUILD_HOSTLDFLAGS += $(call os_x_before, 10, 7, "", "-Xlinker -no_pie") -- - # macOS Mojave (10.14.X) - # Undefined symbols for architecture x86_64: "_PyArg_ParseTuple" - KBUILD_HOSTLDFLAGS += $(call os_x_after, 10, 14, "-lpython -dynamclib", "") -diff --git a/tools/imagetool.h b/tools/imagetool.h -index 8726792..d1b72ef 100644 --- a/tools/imagetool.h +++ b/tools/imagetool.h -@@ -270,17 +270,20 @@ int rockchip_copy_image(int fd, struct image_tool_params *mparams); +@@ -272,11 +272,14 @@ int rockchip_copy_image(int fd, struct i * b) we need a API call to get the respective section symbols */ #if defined(__MACH__) #include @@ -30,18 +12,10 @@ index 8726792..d1b72ef 100644 #define INIT_SECTION(name) do { \ unsigned long name ## _len; \ -- char *__cat(pstart_, name) = getsectdata("__TEXT", \ -+ char *__cat(pstart_, name) = getsectdata("__DATA", \ + char *__cat(pstart_, name) = getsectdata("__DATA", \ #name, &__cat(name, _len)); \ + __cat(pstart_, name) += \ + _dyld_get_image_vmaddr_slide(0); \ char *__cat(pstop_, name) = __cat(pstart_, name) + \ __cat(name, _len); \ __cat(__start_, name) = (void *)__cat(pstart_, name); \ - __cat(__stop_, name) = (void *)__cat(pstop_, name); \ - } while (0) --#define SECTION(name) __attribute__((section("__TEXT, " #name))) -+#define SECTION(name) __attribute__((section("__DATA, " #name))) - - struct image_type_params **__start_image_type, **__stop_image_type; - #else