Hardware specification
----------------------
* RTL8380M SoC, 1 MIPS 4KEc core @ 500MHz
* 256MB DRAM
* 32MB NOR Flash
* 8 x 10/100/1000BASE-T ports
* 2 x SFP ports
* Power LED, Fault LED
* Reset button on front panel
* UART (115200 8N1) via populated standard pin header marked JP1
TODO: The SFP ports use a shared SCL GPIO that the driver cannot handle.
The left SFP port (lan9) is defined and fully functional while the laser
on the right SFP port (lan10) is off by default.
UART pinout
-----------
[o]ooo|JP1
| ||`------ GND
| |`------- RX
| `-------- TX
`---------- Vcc (3V3)
Installation using OEM webinterface
-----------------------------------
1. Make sure you are running OEM firmware in secondary slot
2. Install squashfs-factory.imag to primary slot by upload via http
Installation using serial interface
-----------------------------------
1. Press "a" "c" "p" during message "Enter correct key to stop autoboot"
2. Load image with "upgrade runtime <TFTP IP>:squashfs-sysupgrade.bin" command
3. Switch to primary slot with "setsys bootpartition 0"
4. Store config with "savesys"
5. Boot the image with `boota` command
Dual-boot with stock firmware using writable u-boot-env
-------------------------------------------------------
From stock to OpenWrt / primary image 1 (CLI as admin):
- > boot system image1
- > reboot
From OpenWrt to stock / boot image 2: (shell as root)
- # fw_setsys bootpartition 1
- # reboot
Debrick using serial interface
------------------------------
1. Press "a" "c" "p" during message "Enter correct key to stop autoboot"
2. Load vendor image with "upgrade runtime <TFTP IP>:LGS310xxxxx.imag"
3. switch to primary partition "setsys bootpartition 0"
4. safe config "savesys"
Further documentation
---------------------
See https://openwrt.org/toh/linksys/lgs352c
It has been developed and tested on device with v1 revision.
Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de>
Link: https://github.com/openwrt/openwrt/pull/16068
[Add missing 'w' in name of firmware partition]
Signed-off-by: Sander Vanheule <sander@svanheule.net>
Backport patch that fixes memory disclosure in packet padding.
The downstream driver supports statistics, so when a packet
cannot be padded the statistics of dropped packets are incremented.
The other patches do not introduce any functional changes.
Signed-off-by: Aleksander Jan Bajkowski <olek2@wp.pl>
Link: https://github.com/openwrt/openwrt/pull/16563
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
The cbr-reg DTS property uses a wrong name causing the RAC kernel
panic again on BCM6358 BCM6368 boards.
Use the correct cbr-reg name property.
Fixes: 7c9644a7b5 ("bmips: backport upstreamed RAC patches")
Signed-off-by: Daniel González Cabanelas <dgcbueu@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/16561
Signed-off-by: Robert Marko <robimarko@gmail.com>
Select MT7996 2+3+3 firmware for the Adtran SmartRG SDG-8733A device
and also add it to the image for the BPi-R4 which supports both,
BE19000 (4+5+5) as well as BE14000 (2+3+3) Wi-Fi 7 modules.
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
This driver does not support more than 1 queue.
Fixes: ba24b94e0b ("ramips: use more devm in mtk_eth_soc")
Signed-off-by: Rosen Penev <rosenp@gmail.com>
There are cases where an unavailable port is not an error, making
this error message a false-positive. The kernel log is flooded with
the messages like:
OF: graph: no port node found in /soc@0/bus@42000000/i2c@42530000/usb-typec@50
Silence this message by making it a debug message.
Signed-off-by: Tianling Shen <cnsztl@immortalwrt.org>
Link: https://github.com/openwrt/openwrt/pull/16524
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
This fixes some corner cases triggered by enabling fraglist GRO, where some
protocols may accidentally or intentionally linearize fraglist skbs.
Previously, these skbs became unusable and segmenting them led to crashes.
With this patch, they are properly handled by passing them to skb_segment
instead of skb_segment_list.
Signed-off-by: Felix Fietkau <nbd@nbd.name>
These got added to the kernel after this driver was written.
Signed-off-by: Rosen Penev <rosenp@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/16415
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
It automatically adds the error code at the end of the message. It also
deals with -EPROBE_DEFER automatically (doesn't output). Simpler code.
Signed-off-by: Rosen Penev <rosenp@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/16350
Signed-off-by: Robert Marko <robimarko@gmail.com>
General hardware info:
----------------------
D-Link DGS-1210-28P rev. F1 is a switch with 24 ethernet ports and 4
combo ports, all ports Gbit capable. It is based on a RTL8382 SoC
@500MHz, DRAM 128MB and 32MB flash. 24 ethernet ports are 802.3af/at PoE
capable with a total PoE power budget of 193W.
Power over Ethernet:
--------------------
The PSE hardware consists of three BCM59121 PSE chips, serving 8 ports
each. They are controlled by a Nuvoton MCU. In order to enable PoE, the
realtek-poe package is required. It is installed by default, but
currently it requires the manual editing of /etc/config/poe. Keep in
mind that the port number assignment does not match on this switch,
alway 8 ports are in reversed order: 8-1, 16-9 and 24-17.
LEDs and Buttons:
-----------------
On stock firmware, the mode button is supposed to switch the LED
indicators of all port LEDs between Link Activity and PoE status. The
currently selected mode is visualized using the respective LEDs. PoE Max
indicates that the maximum PoE budget has been reached. Since there is
currently no support for this behavior, these LEDs and the mode button
can be used independently.
Serial connection:
------------------
The UART for the SoC (115200 8N1) is available via unpopulated standard
0.1" pin header marked J6. Pin1 is marked with arrow and square.
Pin 1: Vcc 3.3V
Pin 2: Tx
Pin 3: Rx
Pin 4: Gnd
OEM installation from Web Interface:
------------------------------------
1. Make sure you are booting using OEM in image 2 slot. If not,
switch to
image2 using the menus
System > Firmware Information > Boot from image2
Tools > reboot
2. Upload image in vendor firmware via Tools > Backup / Upgrade
Firmware > image1
3. Toggle startup image via System > Firmware Information > Boot
from
image1
4. Tools > reboot
Other installation methods not tested, but since the device shares the
board with the DGS-1210-28, the following should work:
Boot initramfs image from U-Boot:
---------------------------------
1. Press Escape key during `Hit Esc key to stop autoboot` prompt
2. Press CTRL+C keys to get into real U-Boot prompt
3. Init network with `rtk network on` command
4. Load image with `tftpboot 0x8f000000
openwrt-rtl838x-generic-d-link_dgs-1210-28p-f-initramfs-kernel.bin`
command
5. Boot the image with `bootm` command
Signed-off-by: Luiz Angelo Daros de Luca <luizluca@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/15938
Signed-off-by: Sander Vanheule <sander@svanheule.net>
Hardware
--------
RockChip RK3588 ARM64 (8 cores)
8GB LPDDR4 RAM
2x 2500 Base-T (PCIe, rtl8125b)
1x LED
128GB eMMC on-board
Micro-SD Slot
HDMI IN/OUT
USB 3.0 Port
USB Type-C 3.0 Port
M.2 B-Key
M.2 E-Key
M.2 M-Key
DC Jack 12V
Installation
------------
Uncompress the ImmortalWrt sysupgrade and write it to a micro SD card or
internal eMMC using dd.
Signed-off-by: Tianling Shen <cnsztl@immortalwrt.org>
Before this commit, sysupgrade saved the settings backup data to
the area following rootfs even though the device has an actual
rootfs_data partition. The backup data was completely ignored on
the following boot, but since rootfs_data was not being cleared
during sysupgrade, the issue was not noticed earlier.
Note that this commit changes the filesystem of rootfs_data from
ext4 to F2FS (if OEM partitioning is used).
Signed-off-by: Rodrigo Balerdi <lanchon@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/16463
Signed-off-by: Robert Marko <robimarko@gmail.com>
This board is also as known as Bananapi BPi-M7.
Hardware
--------
RockChip RK3588 ARM64 (8 cores)
8/16/32GB LPDDR4/LPDDR4x RAM
2x 2500 Base-T (PCIe, rtl8125b)
2 LEDs (RED / GREEN)
16GB/32GB/64GB/128GB eMMC on-board
Micro-SD Slot
USB 2.0 Port
USB 3.0 Port
M.2 M-Key
40-Pin Header
USB PD 2.0 9/12/15V Power
Installation
------------
Uncompress the OpenWrt sysupgrade and write it to a micro SD card or
internal eMMC using dd.
Signed-off-by: Tianling Shen <cnsztl@immortalwrt.org>
Link: https://github.com/openwrt/openwrt/pull/16462
Signed-off-by: Nick Hainke <vincent@systemli.org>
of_property_read_u32 returns -EINVAL when property does not exist,
according to the documentation -ENOENT is not a valid return code.
So, instead of checking for -ENOENT check for -EINVAL as otherwise the
blamed commit breaks AQR probe since it will return -EINVAL during probe.
Fixes: cb2a11f49c ("generic: phy: aquantia: add pending patch to force MDI pair order")
Link: https://github.com/openwrt/openwrt/pull/16466
Signed-off-by: Robert Marko <robimarko@gmail.com>
Add missing ksym CONFIG_RUST
Building r27563 without this commit will fail due to this ksym
being undefined in the generic config.
Build system: x86/64
Build-tested: x86/64/AMD Cezanne
Run-tested: x86/64/AMD Cezanne
Signed-off-by: John Audia <therealgraysky@proton.me>
Link: https://github.com/openwrt/openwrt/pull/16464
Signed-off-by: Robert Marko <robimarko@gmail.com>
We already have an kernel module package "kmod-phy-ath79-usb" to
drive the ath79 USB. It will be selected by the usb base package
"kmod-usb2" and "kmod-usb-ohci".
Signed-off-by: Shiji Yang <yangshiji66@qq.com>
Link: https://github.com/openwrt/openwrt/pull/16380
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Add u-boot support based on the kernel dts introduced in d1016446 and
the GL-MT6000 u-boot support in fe10f974.
The pcie-mediatek-gen3 kernel driver doesn't like hotplug, so to work in
PCIe mode, the 5G modem on this device needs to be switched on by u-boot
before starting the kernel. Include an init_modem step in the boot_system
action to set the relevant gpios. (The factory bootloader does the same,
using Mediatek SDK-specific gpio_power_clr and gpio_pull_up.)
Ideally the modem would be started using gpio-hog in the device tree, but
this will need to wait until mediatek gpio-hog support is fixed upstream:
https://lore.kernel.org/u-boot/6ef2583e85eea60560d7776377d662779e7c44e5.1722419839.git.chris@arachsys.com/
The bootloader can be replaced using the built-in web interface of the
factory bootloader. Hold the reset button for five seconds while powering
on the device and it will boot into a recovery http server.
http://192.168.1.1/uboot.html and http://192.168.1.1/bl2.html can then
be used to upload openwrt-mediatek-filogic-glinet_gl-x3000-bl31-uboot.fip
and openwrt-mediatek-filogic-glinet_gl-x3000-preloader.bin respectively.
Alternatively, from a root shell on the running system, unlock the boot
partition with
echo 0 >/sys/block/mmcblk0boot0/force_ro
then write openwrt-mediatek-filogic-glinet_gl-x3000-bl31-uboot.fip to
/dev/mmcblk0p4 and openwrt-mediatek-filogic-glinet_gl-x3000-preloader.bin
to /dev/mmcblk0boot0.
Signed-off-by: Chris Webb <chris@arachsys.com>
Link: https://github.com/openwrt/openwrt/pull/15645
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Hardware Specification:
SoC: Mediatek MT7621DAT (MIPS1004Kc 880 MHz, dual core)
RAM: 128 MB
Storage: 128 MB NAND flash
Ethernet: 5x 10/100/1000 Mbps LAN1,LAN2,LAN3,LAN4 & WAN
Wireless: 2.4GHz: Mediatek MT7603EN up to 300Mbps (802.11b/g/n MIMO 2x2)
Wireless: 5GHz: Mediatek MT7615N up to 1733Mbps (802.11n/ac MU-MIMO 4x4)
LEDs: Power (white & amber), Internet (white & amber)
LEDs: 2.4G (White), 5Ghz (White)
Buttons: WPS, Reset
USB: Front V3.0 & Rear V2.0
MAC Table
Label xx:xx:xx:xx:xx:38
LAN xx:xx:xx:xx:xx:39
2.4Ghz xx:xx:xx:xx:xx:3A
5Ghz xx:xx:xx:xx:xx:3C
WAN xx:xx:xx:xx:xx:38
Flash Instructions:
D-Link normal OEM firmware update page
1. upload OpenWRT factory.bin like any D-Link upgrade image
D-Link Fail Safe GUI:
1. Push and hold reset button (on the bottom of the device) until power led starts flashing (about 10 secs or so) while plugging in the power cable.
2. Give it ~30 seconds, to boot the fail safe GUI
3. Connect your client computer to LAN1 of the device
4. Set your client IP address manually to 192.168.0.2 / 255.255.255.0
5. Call the fail safe page for the device at http://192.168.0.1/
6. Use the provided fail safe web GUI to upload the factory.bin to the device
Signed-off-by: Alan Luck <luckyhome2008@gmail.com>
Link: https://github.com/openwrt/openwrt/pull/16269
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
