Commit Graph

10 Commits

Author SHA1 Message Date
Tianling Shen
37d1d43db8
Merge Official Source
Signed-off-by: Tianling Shen <cnsztl@immortalwrt.org>
2022-07-08 12:44:26 +08:00
Ronny Kotzschmar
9b00e97956
rockchip: reliably distribute net interrupts
On the NanoPI R4S it takes an average of 3..5 seconds for the network devices
to appear in '/proc/interrupts'.
Wait up to 10 seconds to ensure that the distribution of the interrupts
really happens.

Signed-off-by: Ronny Kotzschmar <ro.ok@me.com>
2022-07-07 13:13:26 +02:00
Tianling Shen
9d64b55c2e
rockchip: add OrangePi R1 Plus LTS support
This board is a fork of OrangePi R1 Plus, with native NIC changed.

Hardware
--------
RockChip RK3328 ARM64 (4 cores)
1GB DDR4 RAM
2x 1000 Base-T
3 LEDs (LAN / WAN / SYS)
1 Button (Reset)
Micro-SD slot
USB 2.0 Port

Installation
------------
Uncompress the OpenWrt sysupgrade and write it to a micro SD card using
dd.

Signed-off-by: Tianling Shen <cnsztl@immortalwrt.org>
2022-02-13 20:34:48 +08:00
Ronny Kotzschmar
fd65ce6f32
rockchip: reliably distribute net interrupts
On the NanoPI R4S it takes an average of 3..5 seconds for the network devices
to appear in '/proc/interrupts'.
Wait up to 10 seconds to ensure that the distribution of the interrupts
really happens.

Signed-off-by: Ronny Kotzschmar <ro.ok@me.com>
Signed-off-by: Tianling Shen <cnsztl@immortalwrt.org>
2021-08-19 15:59:11 +08:00
QiuSimons
9ba4de031d
rockchip: distribute R2C net interrupts
Signed-off-by: Tianling Shen <cnsztl@immortalwrt.org>
2021-08-19 15:54:44 +08:00
Tianling Shen
b721579842 rockchip: add NanoPi R4S support
Hardware
--------
RockChip RK3399 ARM64 (6 cores)
4GB LPDDR4 RAM
2x 1000 Base-T
3 LEDs (LAN / WAN / SYS)
1 Button (Reset)
Micro-SD slot
2x USB 3.0 Port

Installation
------------
Uncompress the OpenWrt sysupgrade and write it to a micro SD card using
dd.

=====================================
NOTICE FOR USERS WHO USE 1GB VERSION:
     BY NOW IT IS NOT SUPPORTED
====================================

[initialed target]
Co-developed-by: Marty Jones <mj8263788@gmail.com>
Signed-off-by: Marty Jones <mj8263788@gmail.com>
[fixed bootscript]
Co-developed-by: Jayantajit Gogoi <jayanta.gogoi525@gmail.com>
Signed-off-by: Jayantajit Gogoi <jayanta.gogoi525@gmail.com>
Signed-off-by: Tianling Shen <cnsztl@immortalwrt.org>
2021-06-10 10:34:44 +02:00
AmadeusGhost
65bdd1f5a7
rockchip: add support for OrangePi R1 Plus
Hardware Specification:
  CPU: RockChip RK3328 (4 cores)
  RAM: 1GB DDR4
  Ethernet: 2x 1000 Base-T
  Flash: SPI-NOR 16 MB (mx25l12835f)
  LED: SYS, LAN, WAN
  MicroSD Slot x 1
  Button: Reset
  USB:1x 2.0
  Serial1: 13 Pin pin-header
  Serial2: 3 Pin debug port
  Type-C: for power input
  Power Supply: DC 5V/2A

Installation:
  Write the image to SD Card with dd.

Signed-off-by: AmadeusGhost <amadeus@jmu.edu.cn>
Signed-off-by: Tianling Shen <cnsztl@immortalwrt.org>
2021-03-29 23:36:46 +08:00
Tianling Shen
259cf3b7e3 rockchip: add NanoPi R4S support
Hardware
--------
RockChip RK3399 ARM64 (6 cores)
1GB DDR3 or 4GB LPDDR4 RAM
2x 1000 Base-T
3 LEDs (LAN / WAN / SYS)
1 Button (Reset)
Micro-SD slot
2x USB 3.0 Port

Installation
------------
Uncompress the OpenWrt sysupgrade and write it to a micro SD card using
dd.

Signed-off-by: Tianling Shen <cnsztl@gmail.com>
Co-authored-by: Jensen Huang <jensenhuang@friendlyarm.com>
Signed-off-by: Jensen Huang <jensenhuang@friendlyarm.com>
Co-authored-by: Marty Jones <mj8263788@gmail.com>
Signed-off-by: Marty Jones <mj8263788@gmail.com>
2020-12-27 14:00:31 +08:00
Adrian Schmutzler
84fc80dd66 rockchip: remove useless echo in 40-net-smp-affinity
The command in the $() brackets will already provide the same output.

Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
2020-08-17 23:13:57 +02:00
David Bauer
7a4fc8906c rockchip: distribute net interrupts
This adds a hotplug script for distributing interrupts of eth0 and eth1
across different cores. Otherwise the forwarding performance between
eth0 and eth1 is severely affected.

The existing SMP distribution mechanic in OpenWrt can't be used here, as
the actual device IRQ has to be moved to dedicated cores. In case of
eth1, this is in fact the USB3 controller.

Signed-off-by: David Bauer <mail@david-bauer.net>
2020-07-28 15:52:44 +02:00