Commit Graph

9 Commits

Author SHA1 Message Date
Adrian Schmutzler
75e4d46d67
ath79: drop num-cs for SPI controller
None of the spi drivers on ath79 uses the num-cs property.

Cc: Chuanhong Guo <gch981213@gmail.com>
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
Acked-by: Chuanhong Guo <gch981213@gmail.com>
2020-12-05 17:19:35 +08:00
CN_SZTL
a288c03e6e
ath79: remove model name from LED labels 2020-11-21 19:51:26 +08:00
Adrian Schmutzler
dca7079050
ath79: move dts-v1 statement to ath79.dtsi
The "/dts-v1/;" identifier is supposed to be present once at the
top of a device tree file after the includes have been processed.

In ath79, we therefore requested to have in the DTS files so far,
and omit it in the DTSI files. However, essentially the syntax of
the parent ath79.dtsi file already determines the DTS version, so
putting it into the DTS files is just a useless repetition.

Consequently, this patch puts the dts-v1 statement into the parent
ath79.dtsi, which is (indirectly) included by all DTS files. All
other occurences are removed.
Since the dts-v1 statement needs to be before any other definitions,
this also moves the includes to make sure the ath79.dtsi or its
descendants are always included first.

Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
2020-09-27 13:26:08 +08:00
CN_SZTL
a484539511
ath79: sync with upstream source 2020-09-06 19:53:51 +08:00
Adrian Schmutzler
d2e4554bd2 ath79: drop and consolidate redundant chosen/bootargs
In ath79, for several SoCs the console bootargs are defined to the
very same value in every device's DTS. Consolidate these definitions
in the SoC dtsi files and drop further redundant definitions elsewhere.

The only device without any bootargs set has been OpenMesh OM5P-AC V2.
This will now inherit the setting from qca955x.dtsi

Note that while this tidies up master a lot, it might develop into a
frequent pitfall for backports.

Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
2020-06-26 12:32:53 +08:00
Sebastian Schaper
e12c6743c5 ath79: increase spi clock for D-Link DIR-842
AHB is 258 MHz for this device (CPU_PLL / 3), but there is no difference
between 64 MHz and 50 MHz for spi-max-frequency, thus increase to 50 MHz.

Tested on revisions C1 and C3.

Signed-off-by: Sebastian Schaper <openwrt@sebastianschaper.net>
2020-05-27 18:03:57 +08:00
Sebastian Schaper
5e00d891df ath79: define switch reset-gpios for D-Link DIR-842
GPIO 11 needs to be pulled high for the external gigabit switch to work,
this is currently solved via gpio-hog. Replace with phy0 reset-gpios.

Tested on revisions C1 and C3. Reset button is still working for reboot,
to enter failsafe, and to enter bootloader http recovery.

Signed-off-by: Sebastian Schaper <openwrt@sebastianschaper.net>
2020-05-27 18:03:29 +08:00
AmadeusGhost
2d7f1ed162
ath79: sync and fix wireless (#2919)
This commit sync target ath79 from openwrt master, and revert some commit which will causes wireless to not work.
Use ath10k-ct-smallbuffers by default, so that small memory devices can normal work.
2020-02-03 23:45:16 +08:00
LEAN-ESX
90eaa19f4e ath79: update upsteam 2019-12-02 05:55:49 -08:00