The GL-MT1300 is a high-performance new generation pocket-sized router
that offers a powerful hardware and first-class cybersecurity protocol
with unique and modern design.
Specifications:
- SoC: MT7621A, Dual-Core @880MHz
- RAM: 256 MB DDR3
- Flash: 32 MB
- Ethernet: 3 x 10/100/1000: 2 x LAN + 1 x WAN
- Wireless: 1 x MT7615D Dual-Band 2.4GHz(400Mbps) + 5GHz(867Mbps)
- USB: 1 x USB 3.0 port
- Slot: 1 x MicroSD card slot
- Button: 1 x Reset button
- Switch: 1 x Mode switch
- LED: 1 x Blue LED + 1 x White LED
MAC addresses based on vendor firmware:
WAN : factory 0x4000
LAN : Mac from factory 0x4000 + 1
2.4GHz : factory 0x4
5GHz : Mac form factory 0x4 + 1
Flashing instructions:
1.Connect to one of LAN ports.
2.Set the static IP on the PC to 192.168.1.2.
3.Press the Reset button and power the device (do not release the button).
After waiting for the blue led to flash 5 times, the white led will
come on and release the button.
4.Browse the 192.168.1.1 web page and update firmware according to web
tips.
5.The blue led will flash when the firmware is being upgraded.
6.The blue led stops blinking to indicate that the firmware upgrade is
complete and U-Boot automatically starts the firmware.
For more information on GL-MT1300, see the OFFICIAL GL.iNet website:
https://www.gl-inet.com/products/gl-mt1300/
Signed-off-by: Xinfa Deng <xinfa.deng@gl-inet.com>
[add input-type for switch, wrap long line in 10_fix_wifi_mac]
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
Add support for the ar71xx supported GL.iNet GL-USB150 to ath79.
GL.iNet GL-USB150 is an USB dongle WiFi router, based on Atheros AR9331.
Specification:
- 400/400/200 MHz (CPU/DDR/AHB)
- 64 MB of RAM (DDR2)
- 16 MB of FLASH (SPI NOR)
- Realtek RTL8152B USB to Ethernet bridge (connected with AR9331 PHY4)
- 1T1R 2.4 GHz
- 2x LED, 1x button
- UART header on PCB
Flash instruction:
Vendor software is based on openwrt so you can flash the sysupgrade
image via the vendor GUI or using command line sysupgrade utility.
Make sure to not save configuration over reflash as uci settings
differ between versions.
Signed-off-by: Chen Minqiang <ptpt52@gmail.com>
This patch will match the clock-latency-ns values in the device tree
for those found inside the OEM device tree and kernel source code and
unlock 896Mhz CPU operating points.
phy-mode is already set to rgmii for eth0 and sgmii for eth1 in
qca955x.dtsi, no need to do that again in the device DTS files.
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
The sub target does not support network and there are not so many users
out there, just mark it as source only, so we do jot have to build it.
The quality is not worse than before, it just does not make much sense
to build this automatically.
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Package architecture aarch64_generic [1] can be used just with three
devices. One is NanoPI R2S and then there are two development boards
from NXP. Let's change armvirt/64 to Cortex A53 (aarch64_cortex-a53)
[2]. It has wider support by multiple devices like NanoPI Neo Plus2/Core2,
ESPRESSObin, Pine64, and Raspberry Pi 2&3.
While looking at ARMvirt/32 it has set CPU_TYPE and CPU_SUBTYPE to be
arm_cortex-a15_neon-vfpv4 [3]. It has support to devices like
Linksys EA8500 v1, Linksys EA7500 v1, Netgear D7800, Netgear R7500 and so on.
Tested with:
qemu-system-aarch64 -m 1024 -smp 2 -cpu cortex-a57 -M virt -nographic \
-kernel openwrt-armvirt-64-Image-initramfs
Successfully compiled and booted.
Here goes the output:
root@OpenWrt:/# uname -a
Linux OpenWrt 5.4.82 #0 SMP Sun Dec 13 12:52:10 2020 aarch64 GNU/Linux
root@OpenWrt:/# cat /etc/openwrt_release
DISTRIB_ID='OpenWrt'
DISTRIB_RELEASE='SNAPSHOT'
DISTRIB_REVISION='r15207-96fca0f807'
DISTRIB_TARGET='armvirt/64'
DISTRIB_ARCH='aarch64_cortex-a53'
DISTRIB_DESCRIPTION='OpenWrt SNAPSHOT r15207-96fca0f807'
DISTRIB_TAINTS='no-all'
Also, change BOARDNAME to be the same as it is in armvirt/32.
[1] https://openwrt.org/docs/techref/instructionset/aarch64_generic
[2] https://openwrt.org/docs/techref/instructionset/aarch64_cortex-a53
[3] https://openwrt.org/docs/techref/instructionset/arm_cortex-a15_neon-vfpv4
Signed-off-by: Josef Schlehofer <pepe.schlehofer@gmail.com>
The ASUS MAP-AC2200 suffers from a lower transmit/receive
signal power as compared to the stock firmware.
Upon investigation, it was discovered that stock firmware from
the GPL_MAP-AC2200_3.0.0.4.384.46249-g97d05bb.tar archive.
set the following GPIOs in "release/src/router/rc/init.c".
GPIO 44 and 46 have to be set to output high
GPIO 45 and 47 have to be set to output low
THX @ slh
Fixes: 9ad3967f14 ("ipq40xx: add support for ASUS Lyra")
Signed-off-by: Yushi Nishida <kyro2man@gmx.net>
[slightly rewritten commit, added missing <>)
Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
This device is the non-US build of the F9K1115 v2, with a different
firmware magic.
Specifications:
SoC: QCA9558
CPU: 720 MHz
Flash: 16 MiB NOR
RAM: 128 MiB
WiFi 2.4 GHz: QCA9558-AT4A 3x3 MIMO 802.11b/g/n
WiFi 5 GHz: QCA9880-2R4E 3x3 MIMO 802.11a/n/ac
Ethernet: 4x LAN and 1x WAN (all 1gbps)
USB: 1 x USB 2.0 (lower), 1 x USB 3.0 (upper)
MAC addresses based on OEM firmware:
Interface Address Location
--------- ------- --------
lan *:5A sometimes in 0x6
wan *:5B 0x0
2.4Ghz *:5A 0x1002
5Ghz As per mini PCIe EEPROM
Flashing instructions:
The factory.bin can be flashed via the Belkin web UI or via the uboot
http upgrade page.
Once the factory.bin has been written, sysupgrade.bin will work as usual.
Signed-off-by: Damien Mascord <tusker@tusker.org>
Acked-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
[wrap commit message/code, adjust label-mac-device, whitespace fixes,
merge block in 02_network]
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
This adds DTB to kernel and that way makes it possible to easily boot
initramfs image and also kernel.
The sequence to boot initramfs on Omnia is then just:
env set bootargs earlyprintk console=ttyS0,115200
dhcp 0x1000000 192.168.1.1:openwrt-mvebu-cortexa9-cznic_turris-omnia-initramfs-kernel.bin
bootz 0x1000000
Without this change kernel boot won't proceed and is stuck on "Starting
kernel".
Signed-off-by: Karel Kočí <karel.koci@nic.cz>
[fixed From: to match with SoB:]
Signed-off-by: Petr Štetiar <ynezz@true.cz>
Cppcheck shows here duplicated break.
Code `state->speed = SPEED_1000;` will be never executed because above
it there is break statement.
Almost identical statement is placed in another realtek driver
18a53d43d6/target/linux/realtek/files-5.4/drivers/net/dsa/rtl83xx/dsa.c (L286-L294)
Signed-off-by: Rafał Mikrut <mikrutrafal@protonmail.com>
Cppcheck shows self initialization error, which is an obvious bug.
Basing on logic of similar fragment below I assigned to this variable,
value `RTL838X_LED_GLB_CTRL` which I think is proper.
Signed-off-by: Rafał Mikrut <mikrutrafal@protonmail.com>
The Netgear DGND3700v1/DGND3800B shows kernel redundant info at the board
message, already provided by the machine info message.
Use the real board name which is silkscreened on the PCB and used in the
stock firmware header.
Signed-off-by: Daniel González Cabanelas <dgcbueu@gmail.com>
Removed since included upstream and could be reverse-applied by quilt:
backport-5.4/315-v5.10-usbnet-ipeth-fix-connectivity-with-ios-14.patch
Remaining modifications made by update_kernel.sh
Build system: x86_64
Build-tested: ipq806x/R7800, ath79/generic, bcm27xx/bcm2711
Run-tested: ipq806x/R7800
No dmesg regressions, everything functional
Signed-off-by: John Audia <graysky@archlinux.us>
Tested-by: Curtis Deptuck <curtdept@me.com> [build/run x86_64]
mt7621, mt7628an and rt5350 have USB controllers (ehci/ohci or xhci)
enabled by default. Thus, this patch drops redundant status=okay
statements in derived device DTS files.
While at it, also drop an explicit status=okay in mt7621.dtsi, as
this is default.
Note:
For rt5350, about 50 % of the devices enabled ehci/ohci in the DTS
files, and there is actually no device actively disabling it.
It looks like only a few people are aware that the controllers are
enabled by default here.
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
At the moment, ehci/ohci is enabled in mt7628an SoC DTSI, then
disabled in the TP-Link-specific DTSI files, and finally enabled
again in the DTS files of the devices needing it.
This on-off-on scheme is hard to grasp on a quick look. Thus, this
patch drops the status in the TP-Link-specific DTSI files, having
the TP-Link devices treated like the rest of mt7628an DTSes, i.e.
ehci/ohci is enabled by default and needs to be disabled explicitly
where needed.
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
This fixes tethering with devices using iOS 14. Prior to this patch,
connections to remote endpoints were not possible while data transfers
between the OpenWrt device and the iOS endpoints worked fine.
Signed-off-by: David Bauer <mail@david-bauer.net>
This ports support for the TP-Link TL-WDR7500 v3 from ar71xx to ath79.
The basic features appear to be identical to the Archer C7 v1, however
it has the (supported) QCA9880-BR4A chip of the C7 v2.
Specifications:
SoC: QCA9558
CPU: 720 MHz
Flash: 8 MiB
RAM: 128 MiB
WLAN: 2.4 GHz b/g/n, 5 GHz a/n/ac
Qualcomm Atheros QCA9880-BR4A
Ethernet: 5x Gbit ports
USB: 2x 2.0 ports
Flashing instructions:
Upload the factory image via the OEM firmware GUI.
TFTP recovery appears to be available as well.
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
All modifications made by update_kernel.sh/no human intervention needed
Build system: x86_64
Build-tested: ipq806x/R7800, ath79/generic, bcm27xx/bcm2711
Run-tested: ipq806x/R7800
No dmesg regressions, everything functional
Signed-off-by: John Audia <graysky@archlinux.us>
[another refresh]
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
The first gpio controller (gpio or gpio0) is always enabled by
default in the SoC DTSI files. No need to set status=okay in the
device DTS files a second time.
Remove the redundant statements.
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
None of the spi drivers on ath79 uses the num-cs property.
Cc: Chuanhong Guo <gch981213@gmail.com>
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
Acked-by: Chuanhong Guo <gch981213@gmail.com>
Some x86_64 single board computer (including Atomic Pi)
has onboard emmc, but requires CONFIG_MMC_SDHCI_ACPI driver
to use or boot from it.
Here is boot message for the mmc device
[ 2.838008] mmc0: SDHCI controller on ACPI [80860F14:00] using ADMA
[ 2.857536] mmc1: SDHCI controller on ACPI [80860F14:01] using ADMA
[ 2.950019] mmc0: new HS200 MMC card at address 0001
[ 3.158271] mmcblk0: mmc0:0001 M52516 14.6 GiB
[ 3.170290] mmcblk0boot0: mmc0:0001 M52516 partition 1 4.00 MiB
[ 3.177191] mmcblk0boot1: mmc0:0001 M52516 partition 2 4.00 MiB
[ 3.183963] mmcblk0rpmb: mmc0:0001 M52516 partition 3 4.00 MiB, \
chardev (248:0)
Other lines changed in this config file are introduced by menuconfig.
Signed-off-by: Mengyang Li <mayli.he@gmail.com>
This fixes tethering with devices using iOS 14. Prior to this patch,
connections to remote endpoints were not possible while data transfers
between the OpenWrt device and the iOS endpoints worked fine.
Signed-off-by: David Bauer <mail@david-bauer.net>
Remove the MDIO reset from the MAC mode for the AR934x SoC family.
The reset is currently also defined for the MDIO node, where the reset
is acquired exclusively.
In case the ethernet node is enabled, this triggers a warning, as the
reset is already acquired by the MAC.
Signed-off-by: David Bauer <mail@david-bauer.net>
The TPLink CPE devices CPE210/CPE510 based on ar9344 have a build-in
Low Noise Amplifier on both of the 2x2 mimo rx chains.
This patch activates those two LNAs in the respective receiving chains
and hence improves the RX sensitivity by about 20dB.
Tested on CPE510 v2 & v3.
Signed-off-by: Thomas Huehn <thomas.huehn@hs-nordhausen.de>
Acked-by: Robert Marko <robimarko@gmail.com>
In this new setup the switch is treated as wan, lan1.100 is used as
our mgmt vlan.
The board mac is applied to eth0, switch and switch.1
The board mac is assigned with the LA bit set to all lan ports while
incrementing it.
Signed-off-by: John Crispin <john@phrozen.org>
