This Kernel option allows to run OpenWrt witin a `firecracker` micro VM.
Firecracker is a KVM-based tool for superfast booting VMs on x86_64 and
aarch64. It makes rootfs available to the guest as a virtio-mmio device
and passes its address via the kernel cmdline. A kernel without
CONFIG_VIRTIO_MMIO_CMDLINE_DEVICES will not recognize the rootfs
virtio-mmio device.
Suggested-by: Packet Please <pktpls@systemli.org>
Signed-off-by: Paul Spooren <mail@aparcar.org>
This Kernel option allows to run OpenWrt witin a `firecracker` micro VM.
Firecracker is a KVM-based tool for superfast booting VMs on x86_64 and
aarch64. It makes rootfs available to the guest as a virtio-mmio device
and passes its address via the kernel cmdline. A kernel without
CONFIG_VIRTIO_MMIO_CMDLINE_DEVICES will not recognize the rootfs
virtio-mmio device.
Suggested-by: Packet Please <pktpls@systemli.org>
Signed-off-by: Paul Spooren <mail@aparcar.org>
The otto GPIO driver does not work with rtl9300 SoCs. Add
the legacy driver again and use that by default in the 9300 .dtsi
Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
RTL8393 SoCs older than Revision C hang on accesses to PHYs with PHY address
larger or equal to the CPU-port (52). This will make scanning the MDIO bus
hang forever. Since the RTL8390 platform does not support more than
52 PHYs, return -EIO for phy addresses >= 52. Note that the RTL8390 family
of SoCs has a fixed mapping between port number and PHY-address.
Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
Adds SoC specific routing offload implementations for
RTL8380/90 and RTL9300. RTL83xx supports merely nexthop
routing, RTL9300 full host and prefix routes.
Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
Add generic support for listening to FIB and Event notifier updates and
use this information to hook into the L3 hardware capabilities of the
RTL SoCs.
Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
The ingress filter registers use 2 bits for each port to define the filtering
state, whereas the egress filter uses 1 bit. So for for the ingress filter
the register offset for a given port is:
(port >> 4) << 4: since there are 16 entries in a register of 32 bits
and for the egress filter:
(port >> 5) << 4: since there are 32 entries in a register of 32 bits
Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
Configure a sane L2 learning configuration upon DSA driver load so that the
switch can start learning L2 addresses. Also configure the correct flood masks
for broadcast and unknown unicast traffice.
Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
This adds RTL93xx-specific MAC configuration routines that allow also configuration
of 10GBit links for phylink. There is support for the Realtek-specific HISGMI
protocol.
Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
This adds support for offloading TC flower by using the Packet Inspection Engine
of the RTL-SoCs. Basic infrastructure support is provide with callbacks to the
tc subsystem and support for HW packet counters.
Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
All RTL SoCs addresss PHYs via their port number, which is mapped to an
SMI address. Add support for configuring this mapping via the .dts on all
SoCs apart from the 839x, where the mapping to the 64 ports is fixed.
Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
On RTL83xx enable learning of the MAC source address of the CPU port
from outgoing packets. Add documentation on bit fields. On RTL93xx
enable port-mask usage and the use of internal priority, these
SoCs automatically learn the MAC.
Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
Remove the storm control and attack warnings from the IRQ handler
of the Ethernet driver. There was no consequence to the detection
and the kernel can also handle at least the attacks itself.
Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
This enlarges the size of the TX ring buffer, which prevents warnings
when the buffer runs out of space.
Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
The D-Link DIR-685 has a small screen with a framebuffer
console, so if we have this, when we start, display the
banner on this framebuffer console so the user know they
are running OpenWRT as root filesystem.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
try to reduce the kernel size by disabling and moving
options from the common kernel configuration to the
SATA target that doesn't have the constraints.
For NAND this has become necessary because as with 5.10
some devices outgrew their kernels. Though, in my tests
this didn't help much: just a smidgen over 100kib was
saved on the uncompressed kernel.
... running make kernel_oldconfig also removed some
other config symbols, mostly those that already set
from elsewhere or became obsolete in the meantime.
Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
disables the MX60(W) from being built by the builders for now.
But there's an effort to bring it back:
<https://github.com/openwrt/openwrt/pull/4617>
Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
Due to 5.10 increased kernel size, the current 4MiB-ish kernel
partition got too small. Luckily, netgear's uboot environment
is setup to read 0x60000 bytes from the kernel partition location.
... While at it: also do some cleanups in the DTS in there.
The original (re-)installation described in
commit d82d84694e ("apm821xx: add support for the Netgear WNDAP620 and WNDAP660")
seemed to be still working for now. What I noticed though
is that the bigger initramfs images needed to use a different
destination address (1000000) to prevent it overwriting
itself during decompression. i.e:
# tftp 1000000 openwrt-...-wndap620-initramfs-kernel.bin
# bootm
However, in case of the WNDAP620+660 the factory.img image can be
written directly to the flash through uboot.
Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
Both NAND and SATA targets need the DMA engine in one way
or another.
Due to a kernel config refresh various existing symbols
got removed from the apm821xx main config file as well.
(That being said, they are still included because the
built-in crpyto4xx depends on these.)
Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
LED labels got reversed by accident, so fix it to the usual color:led_name format.
Fixes: 78cf3e53b1 ("mvebu: add Globalscale MOCHAbin")
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
[add Fixes:]
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
Enable kernel options to allow loading device tree overlay via configfs
at runtime. This is useful for devboards like the BPi-R2 and BPi-R64
which got RasbPi-compatible 40-pin GPIO header which allow all sorts
of extensions.
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
Add Vladimir Oltean's "net: dsa: don't set skb->offload_fwd_mark when
not offloading the bridge"
This covers cases where packets received by an upstream switch must be
forwarded back on the same port, which skb->offload_fwd_mark normally
prevents.
Signed-off-by: Matthew Hagan <mnhagan88@gmail.com>
This fixes:
ERROR: "switch_generic_set_link" [drivers/net/phy/b53/b53_common.ko] undefined!
At some point all packages for swconfig drivers were dropped and targets
were meant to have them built into kernels. It seems b53 (re-)gained its
kmod-switch-bcm53xx however and b53 needs to be built as module.
Fixes: b2cfed48f6 ("Revert "swconfig: fix Broadcom b53 support"")
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
This reverts commit 8f9cd1af0f.
That commit was meant to add a single EXPORT_SYMBOL_GPL() but it
actually also added few .of_match_table-s. One commit should handle one
thing and should not introduce unrelated changes.
Regarding actual changes:
1. EXPORT_SYMBOL_GPL is not required as we don't build swconfig drivers
as modules.
2. PHY drivers must not have .of_match_table. That is allowed for MDIO
drivers. This could work for some time (although is didn't for me on
bcm53xx) but does not with kernel 5.10. It causes a soft lockup and
upstream developers confirmed it's an unsupported design.
Link: https://lore.kernel.org/netdev/2b1dc053-8c9a-e3e4-b450-eecdfca3fe16@gmail.com/t/#mf80e472f35ee23f7a75cbf5b1e101a17ab3a64a3
Cc: Tobias Schramm <tobleminer@gmail.com>
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
These instructions are repeated for a few devices now, let's move
them to shared definition so we do not repeat ourselves too often.
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
The bootloader can leave the GPIO expander in a state which doesn't have
output drivers enabled so GPIOs will properly work for input but output
operations will have no effect.
To avoid disrupting the boot in case the bootloader left direction and
data registers in an inconsistent state (e.g. pulling SoC's reset to 0)
reconfigure everything as input.
Reviewed-by: Sander Vanheule <sander@svanheule.net>
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Globalscale MOCHAbin is a Armada 7040 based development board.
Specifications:
* Armada 7040 Quad core ARMv8 Cortex A-72 @ 1.4GHz
* 2 / 4 / 8 GB of DDR4 DRAM
* 16 GB eMMC
* 4MB SPI-NOR (Bootloader)
* 1x M.2-2280 B-key socket (for SSD expansion, SATA3 only)
* 1x M.2-2250 B-key socket (for modems, USB2.0 and I2C only)
* 1x Mini-PCIe 3.0 (x1, USB2.0 and I2C)
* 1x SATA 7+15 socket (SATA3)
* 1x 16-pin (2×8) MikroBus Connector
* 1x SIM card slot (Connected to the mini-PCIe and both M.2 slots)
* 2x USB3.0 Type-A ports via SMSC USB5434B hub
* Cortex 2x5 JTAG
* microUSB port for UART (PL2303GL/PL2303SA onboard)
* 1x 10G SFP+
* 1x 1G SFP (Connected to 88E1512 PHY)
* 1x 1G RJ45 with PoE PD (Connected to 88E1512 PHY)
* 4x 1G RJ45 ports via Topaz 88E6141 switch
* RTC with battery holder (SoC provided, requires CR2032 battery)
* 1x 12V DC IN
* 1x Power switch
* 1x 12V fan header (3-pin, power only)
* 1x mini-PCIe LED header (2x0.1" pins)
* 1x M.2-2280 LED header (2x0.1" pins)
* 6x Bootstrap jumpers
* 1x Power LED (Green)
* 3x Tri-color RGB LEDs (Controllable)
* 1x Microchip ATECC608B secure element
Note that 1G SFP and 1G WAN cannot be used at the same time as they are in
parallel connected to the same PHY.
Installation:
Copy dtb from build_dir to bin/ and run tftpserver there:
$ cp ./build_dir/target-aarch64_cortex-a72_musl/linux-mvebu_cortexa72/image-armada-7040-mochabin.dtb bin/targets/mvebu/cortexa72/
$ in.tftpd -L -s bin/targets/mvebu/cortexa72/
Connect to the device UART via microUSB port and power on the device.
Power on the device and hit any key to stop the autoboot.
Set serverip (host IP) and ipaddr (any free IP address on the same subnet), e.g:
$ setenv serverip 192.168.1.10 # Host
$ setenv ipaddr 192.168.1.15 # Device
Set the ethernet device (Example for the 1G WAN):
$ setenv ethact mvpp2-2
Ping server to confirm network is working:
$ ping $serverip
Using mvpp2-2 device
host 192.168.1.15 is alive
Tftpboot the firmware:
$ tftpboot $kernel_addr_r openwrt-mvebu-cortexa72-globalscale_mochabin-initramfs-kernel.bin
$ tftpboot $fdt_addr_r image-armada-7040-mochabin.dtb
Boot the image:
$ booti $kernel_addr_r - $fdt_addr_r
Once the initramfs is booted, transfer openwrt-mvebu-cortexa72-globalscale_mochabin-squashfs-sdcard.img.gz
to /tmp dir on the device.
Gunzip and dd the image:
$ gunzip /tmp/openwrt-mvebu-cortexa72-globalscale_mochabin-squashfs-sdcard.img.gz
$ dd if=/tmp/openwrt-mvebu-cortexa72-globalscale_mochabin-squashfs-sdcard.img of=/dev/mmcblk0 && sync
Reboot the device.
Hit any key to stop the autoboot.
Reset U-boot env and set the bootcmd:
$ env default -a
$ setenv bootcmd 'load mmc 0 ${loadaddr} boot.scr && source ${loadaddr}'
Optionally I would advise to edit the console env variable to remove earlycon as that
causes the kernel to never use the driver for the serial console.
Earlycon should be used only for debugging before the kernel can configure the console
and will otherwise cause various issues with the console.
$ setenv console 'console=ttyS0,115200'
Save and reset
$ saveenv
$ reset
OpenWrt should boot from eMMC now.
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
When trying to add support for another device with Micron NAND chips,
it was discovered that the default setting in the kernel source does
not work with Micron Chips, since the device trees setting is
overwritten and hard coded by the kernel xway_nand driver. This was
the original reason for this PR.
A kernel patch sets the default ECC mode to soft without overwriting
the device tree settings and the device tree for devices using it
are updated with new parameters because the old ones are deprecated
by torvalds/linux@533af69.
A patch for kernel 5.4 is provided to support the new settings
because kernel 5.4 does not support it.
Signed-off-by: Daniel Kestrel <kestrel1974@t-online.de>
This backports a fix proposed for upstream kernel to fix overwriting
the NAND ECC engine in device tree.
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Switch port order was reversed due to reading the internal labling
(which mismatches the one on the case).
Signed-off-by: David Bauer <mail@david-bauer.net>
