This removes the assignment of setup and cleanup functions for the ath79
target. Assigning the setup-method will lead to 'setup_transfer' not
being assigned in spi_bitbang_init.
Also drop the redundant cleanup assignment, as this also happens in
spi_bitbang_init.
Signed-off-by: David Bauer <mail@david-bauer.net>
* Fix some bugs in the driver
* Add missing clock and reset references in dts
* Rename mdio-bus to mdio so the driver find it
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Signed-off-by: David Bauer <mail@david-bauer.net>
[refreshed]
Signed-off-by: Koen Vandeputte <koen.vandeputte@ncentric.com>
* Sync the patches with the changes done for kernel 4.19
* Use KERNEL_TESTING_PATCHVER
* Refresh the configuration
* Fix multiple compile bugs in the patches
* Only add own ag71xx files for kernel 4.19 and use upstream version for
5.4.
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
In accordance to ebc090e420 ("ath79: reduce spi-max-frequency to 50 MHz")
this also reduces the spi-max-frequency to 50 MHz for the last remaining
device with higher frequency in ath79. This will save us from having a
single special case that will require adjustment when the spi driver for
this device is changed in the future.
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
Acked-by: Chuanhong Guo <gch981213@gmail.com>
The introduction of ebf0d8dade ("ath79: add new ar934x spi driver")
made the SPI memory unusable on devices with very high spi-max-frequency
(104 MHz).
Here's how the actual clock is calculated: (AHB_CLK/((CLOCK_DIVIDER+1)*2))
where AHB_CLK is a fixed clock (e.g. 200MHz on AR9331) and CLOCK_DIVIDER
is the parameter we can set. Highest clock according to this formula is
AHB_CLK/2 (100MHz, but that didn't work in device tests).
The next possible value is AHB_CLK/4 (50MHz). Speeds between 50 MHz and
100 MHz will be rounded down, so using values higher than 50 MHz does
not provide any benefit.
Consequently, this patch reduces spi-max-frequency for all devices with
values higher than 50 MHz to 50 MHz (effectively, this only affects
devices with 104 MHz before this patch).
Tested on GL.inet GL-AR150:
Boot fails with 104 MHz but is successful with both 50 MHz and 80 MHz
(fast-read), where the latter two yield identical read speeds.
Fixes: ebf0d8dade ("ath79: add new ar934x spi driver")
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
The introduction of ebf0d8dade (ath79: add new ar934x spi driver)
made the SPI memory unusable. Reducing the spi-max-frequency to
a smaller value makes it work again.
Tested on two MikroTik RouterBOARD wAP G-5HacT2HnD devices.
Signed-off-by: Roger Pueyo Centelles <roger.pueyo@guifi.net>
This patch ports support for the MikroTik RouterBOARD 922UAGS-5HPacD
with a built-in 802.11ac High-Power radio (31dBm), which was already
available in the ar71xx target.
See https://mikrotik.com/product/RB922UAGS-5HPacD for more info.
Specifications:
- SoC: Qualcomm Atheros QCA9558 (720 MHz)
- RAM: 128 MB
- Storage: 128 MB NAND
- Wireless: external QCA9882 802.11a/ac 2x2:2
- Ethernet: 1x 1000/100/10 Mbps, integrated, via AR8031 PHY, passive PoE-in 24V
- SFP: 1x host
- USB: 1x 2.0 type A
- PCIe: 1x Mini slot (also contains USB 2.0 for 3G/LTE modems)
- SIM slot: 1x mini-SIM
Working:
- Board/system detection
- SPI and NAND storage
- PCIe
- USB type A host
- Wireless
- Ethernet
- LEDs (user, phy0)
- Reset button
- Sysupgrade to/from ar71xx
Not supported:
- RSSI LEDs
- SFP cage
Installation methods:
- Sysupgrade from ar71xx (it is advisable to use the -n option to
wipe any previous settings), or
- Boot the initramfs image via TFTP and then flash the sysupgrade
image using "sysupgrade -n"
Signed-off-by: Roger Pueyo Centelles <roger.pueyo@guifi.net>
This patch ports support for the MikroTik RouterBOARD 922UAGS-5HPacD
with a built-in 802.11ac High-Power radio (31dBm), which was already
available in the ar71xx target.
See https://mikrotik.com/product/RB922UAGS-5HPacD for more info.
Specifications:
- SoC: Qualcomm Atheros QCA9558 (720 MHz)
- RAM: 128 MB
- Storage: 128 MB NAND
- Wireless: external QCA9882 802.11a/ac 2x2:2
- Ethernet: 1x 1000/100/10 Mbps, integrated, via AR8031 PHY, passive PoE-in 24V
- SFP: 1x host
- USB: 1x 2.0 type A
- PCIe: 1x Mini slot (also contains USB 2.0 for 3G/LTE modems)
- SIM slot: 1x mini-SIM
Working:
- Board/system detection
- SPI and NAND storage
- PCIe
- USB type A host
- Wireless
- Ethernet
- LEDs (user, phy0)
- Reset button
- Sysupgrade to/from ar71xx
Not supported:
- RSSI LEDs
- SFP cage
Installation methods:
- Sysupgrade from ar71xx (it is advisable to use the -n option to
wipe any previous settings), or
- Boot the initramfs image via TFTP and then flash the sysupgrade
image using "sysupgrade -n"
Signed-off-by: Roger Pueyo Centelles <roger.pueyo@guifi.net>
When porting support from ar71xx to ath79, the reset-gpios option was
missed. Due to a hardware bug, this would eventually leave the devices
with RX-deaf Ethernet PHY.
Signed-off-by: Roger Pueyo Centelles <roger.pueyo@guifi.net>
Some newer bootloaders for the TP-Link TL-WA901ND put the ethernet PHY
in reset before loading the kernel, thus the LAN interface is not
working in OpenWrt.
Clear the reset to restore ethernet functionality.
Signed-off-by: David Bauer <mail@david-bauer.net>
Many DTS files contain the same includes again that are already
present in the DTSI files they are derived from.
Remove those redundant includes in the DTS files.
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
Specification:
- 550/400/200 MHz (CPU/DDR/AHB)
- 128 MB of RAM (DDR2)
- 16 MB of FLASH (SPI NOR)
- 4x 10/100 Mbps Ethernet, with passive PoE support on LAN1
- 2T2R 2,4 GHz (AR9344)
- built-in 4G/3G module (example: Quectel EC-25EU)
- internal microSD slot (spi-mmc, buggy and disabled for now)
- RS232 on D-Sub9 port (Cypress ACM via USB, /dev/ttyACM0)
- RS422/RS485 (AR934x high speed UART, /dev/ttyATH1)
- analog 0-24V input (MCP3221)
- various digital inputs and outputs incl. a relay
- 11x LED (4 are driven by AR9344, 7 by 74HC595)
- 2x miniSIM slot (can be swapped via GPIO)
- 2x RP-SMA/F (Wi-Fi), 3x SMA/F (2x WWAN, GPS)
- 1x button (reset)
- DC jack for main power input (9-30 V)
- debugging UART available on PCB edge connector
Serial console (/dev/ttyS0) pinout:
- RX: pin1 (square) on top side of the main PCB (AR9344 is on top)
- TX: pin1 (square) on bottom side
Flash instruction:
Vendor firmware is based on OpenWrt CC release. Use the "factory" image
directly in GUI (make sure to uncheck "keep settings") or in U-Boot web
based recovery. To avoid any problems, make sure to first update vendor
firmware to latest version - "factory" image was successfully tested on
device running "RUT9XX_R_00.06.051" firmware and U-Boot "3.0.2".
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
Add support for RS485 tranceiver with transmit/receive switch hooked
to a RTS GPIO pin.
Use the 'rts-gpios' and 'rs485-rts-active-low' properties as described
in devicetree/bindings/serial/rs485.yaml.
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
This adds support for the various clones of the TL-WA830RE recently
supported in fb99ac6807 ("ath79: add support for TP-Link TL-WA830RE v1"):
- tplink,tl-wa701nd-v1
- tplink,tl-wa730re-v1
- tplink,tl-wa801nd-v1
- tplink,tl-wa830re-v1 (already supported)
- tplink,tl-wa901nd-v1
Since these devices are 100%-clones in ar71xx, this patch adds all
of them without run-testing (as this has been done for TL-WA830RE v1).
Specifications:
- SOC: Atheros AR7240
- CPU: 400MHz
- Flash: 4 MiB (Spansion S25FL032P)
- RAM: 32 MiB (Zentel A3S56D40FTP-G5)
- WLAN: Atheros AR9280 bgn 2x2
- Ethernet: 1 port (100M)
Flash instructions:
- install from u-boot with tftp (requires serial access)
> setenv ipaddr a.b.c.d
> setenv serverip e.f.g.h
> tftpboot 0x80000000 \
openwrt-ath79-tiny-tplink_tl-waxxxxx-v1-squashfs-factory.bin
> erase 0x9f020000 +0x3c0000
> cp.b 0x80000000 0x9f020000 0x3c0000
> bootm 0x9f020000
- flash factory image from OEM WebUI
- sysupgrade from ar71xx image
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
With the wrong blocksize, the rootfs was not positioned on the boundary
of a block, thus breaking the mtdsplit driver.
Signed-off-by: David Bauer <mail@david-bauer.net>
This adds the label MAC address for the Ubiquiti Picostation M (XM).
This was overlooked when adding support in the previous patch.
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
This adds support for the Ubiquiti Picostation M (XM), which has the
same board/LEDs as the Bullet M XM, but different case and antennas.
Specifications:
- AR7241 SoC @ 400 MHz
- 32 MB RAM
- 8 MB SPI flash
- 1x 10/100 Mbps Ethernet, 24 Vdc PoE-in
- External antenna: 5 dBi (USA), 2 dBi (EU)
- POWER/LAN green LEDs
- 4x RSSI LEDs (red, orange, green, green)
- UART (115200 8N1) on PCB
Flashing via WebUI:
Upload the factory image via the stock firmware web UI.
Attention: airOS firmware versions >= 5.6 have a new bootloader with
an incompatible partition table!
Please downgrade to <= 5.5 _before_ flashing OpenWrt!
Refer to the device's Wiki page for further information.
Flashing via TFTP:
Same procedure as other NanoStation M boards.
- Use a pointy tool (e.g., pen cap, paper clip) and keep the reset
button on the device or on the PoE supply pressed
- Power on the device via PoE (keep reset button pressed)
- Keep pressing until LEDs flash alternatively LED1+LED3 =>
LED2+LED4 => LED1+LED3, etc.
- Release reset button
- The device starts a TFTP server at 192.168.1.20
- Set a static IP on the computer (e.g., 192.168.1.21/24)
- Upload via tftp the factory image:
$ tftp 192.168.1.20
tftp> bin
tftp> trace
tftp> put openwrt-ath79-generic-xxxxx-ubnt_picostation-m-squashfs-factory.bin
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
This adds support for the Ubiquiti Nanostation Loco M (XM), which
has the same board/LEDs as the Bullet M XM, but different case and
antennas.
Specifications:
- AR7241 SoC @ 400 MHz
- 32 MB RAM
- 8 MB SPI flash
- 1x 10/100 Mbps Ethernet, 24 Vdc PoE-in
- NS Loco M2: built-in antenna: 8 dBi; AR9287
- NS Loco M5: built-in antenna: 13 dBi; 2T2R 5 GHz radio
- POWER/LAN green LEDs
- 4x RSSI LEDs (red, orange, green, green)
- UART (115200 8N1) on PCB
Flashing via WebUI:
Upload the factory image via the stock firmware web UI.
Note that only certain firmware versions accept unsigned
images. Refer to the device's Wiki page for further information.
Flashing via TFTP:
Same procedure as other NanoStation M boards.
- Use a pointy tool (e.g., pen cap, paper clip) and keep the reset
button on the device or on the PoE supply pressed
- Power on the device via PoE (keep reset button pressed)
- Keep pressing until LEDs flash alternatively LED1+LED3 =>
LED2+LED4 => LED1+LED3, etc.
- Release reset button
- The device starts a TFTP server at 192.168.1.20
- Set a static IP on the computer (e.g., 192.168.1.21/24)
- Upload via tftp the factory image:
$ tftp 192.168.1.20
tftp> bin
tftp> trace
tftp> put openwrt-ath79-generic-xxxxx-ubnt_nanostation-loco-m-squashfs-factory.bin
Tested on NanoStation Loco M2.
Signed-off-by: Sven Roederer <freifunk@it-solutions.geroedel.de>
Co-developed-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
Several devices with tplink-safeloader contain default values (0x0)
for TPLINK_HWID and TPLINK_HWREV in their device definitions.
Move those to common tplink-safeloader definition so they do not
have to be repeated each time.
While at it, set default value for tplink-v1 and tplink-v2 as well.
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
This adds a pinmux to the shared DTSI for TP-Link TL-WR841N/ND v8,
TL-WR842N v2 and TL-MR3420 v2. It is supposed to be the equivalent
of:
/* config gpio4 as normal gpio function */
ath79_gpio_output_select(TL_MR3420V2_GPIO_USB_POWER,AR934X_GPIO_OUT_GPIO);
This allows to enable USB power on these devices.
While at it, move the jtag_disable_pins to &gpio node and remove the
redundant status=okay there.
Tested on TP-Link TL-WR842N v2.
Fixes: FS#2753
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
Tested-by: Armin Fuerst <armin@fuerst.priv.at>
Mikrotik devices will be found in both generic and nand subtargets.
The file mikrotik-caldata.sh, currently used in generic, contains
a few lines of code that would need to be duplicated for nand
support. Instead of duplicating it, move it to target base-files,
as size impact is small and the maintenance gain should outweigh it.
This is changed separately to make life easier for the people
currently working on Mikrotik NAND support.
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
Hardware
--------
SoC: Atheros AR7161
RAM: Samsung K4H511638D-UCCC
2x 64M DDR1
SPI: Micron M25P128 (16M)
WiFi: Atheros AR9160 bgn
Atheros AR9160 an
ETH: Broadcom BCM5481
LED: Power (Green/Red)
ETH (Green / Blue / Yellow)
(PHY-controlled)
WiFi 5 (Green / Blue)
WiFi 2 (Green / Blue)
BTN: Reset
Serial: Cisco-Style RJ45 - 115200 8N1
Installation
------------
1. Download the OpenWrt initramfs-image. Place it into a TFTP server
root directory and rename it to 1401A8C0.img. Configure the TFTP
server to listen at 192.168.1.66/24.
2. Connect the TFTP server to the access point.
3. Connect to the serial console of the access point. Attach power and
interrupt the boot procedure when prompted (bootdelay is 1 second).
4. Configure the U-Boot environment for booting OpenWrt from Ram and
flash:
$ setenv boot_openwrt 'setenv bootargs; bootm 0xbf080000'
$ setenv ramboot_openwrt 'setenv serverip 192.168.1.66;
tftpboot; bootm'
$ saveenv
5. Load OpenWrt into memory:
$ run ramboot_openwrt
Wait for the image to boot.
6. Transfer the OpenWrt sysupgrade image to the device. Write the image
to flash using sysupgrade:
$ sysupgrade -n /path/to/openwrt-sysuograde.bin
Signed-off-by: David Bauer <mail@david-bauer.net>
The Siemens WS-AP3610 asserts reset to the ethernet PHY with the
reset-register. Backport the necessary patches to de-assert reset
when probing the PHY.
These patches can be dropped when using kernel 5.4.
Signed-off-by: David Bauer <mail@david-bauer.net>
The TL-WR940N v6 is similar to v3/v4, it just has different
LEDs and MAC address assignment.
Specification:
- 750 MHz CPU
- 32 MB of RAM
- 4 MB of FLASH
- 2.4 GHz WiFi
- 4x 10/100 Mbps Ethernet
The use of LEDs is based on ar71xx, so blue LED is used for WAN
and orange LED for diag (boot/failsafe/etc.).
Flash instruction (WebUI):
Download *-factory.bin image and upload it via the firmwary upgrade
function of the stock firmware WebUI.
Flash instruction (TFTP):
1. Set PC to fixed ip address 192.168.0.66
2. Download *-factory.bin image and rename it to
wr940nv6_tp_recovery.bin
3. Start a tftp server with the image file in its root directory
4. Turn off the router
5. Press and hold Reset button
6. Turn on router with the reset button pressed and wait ~15 seconds
7. Release the reset button and after a short time
the firmware should be transferred from the tftp server
8. Wait ~30 second to complete recovery.
Thanks to Manuel Kock for reviewing and testing this patch.
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
Tested-by: Manuel Kock <github.web@manu.li>
This adds the ar71xx board name to the SUPPORTED_DEVICES on ath79,
so forceless sysupgrade on this device becomes possible.
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
This ports support for the TL-WA830RE v1 range extender from ar71xx to
ath79.
Specifications:
- SOC: Atheros AR7240
- CPU: 400MHz
- Flash: 4 MiB (Spansion S25FL032P)
- RAM: 32 MiB (Zentel A3S56D40FTP-G5)
- WLAN: Atheros AR9280 bgn 2x2
- Ethernet: 1 port (100M)
Flash instructions:
- install from u-boot with tftp (requires serial access)
> setenv ipaddr a.b.c.d
> setenv serverip e.f.g.h
> tftpboot 0x80000000 \
openwrt-ath79-tiny-tplink_tl-wa830re-v1-squashfs-factory.bin
> erase 0x9f020000 +0x3c0000
> cp.b 0x80000000 0x9f020000 0x3c0000
> bootm 0x9f020000
- flash factory image from OEM WebUI
- sysupgrade from ar71xx image
The device seems to be a clone of the following devices not yet
added to ath79:
- tl-wa701nd-v1
- tl-wa730re-v1
- tl-wa801nd-v1
- tl-wa901nd-v1
Signed-off-by: Christian Buschau <christian.buschau@mailbox.org>
[make use of ar7240_tplink.dtsi, add note about clones]
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
The current set of TP-Link devices with ar7240 SoC all share
the same DTSI file. As the latter is very similar to the
definition required for the to-be-supported TP-Link TL-WA devices
with ar7240, this patch splits the definitions into a shared part
for all TP-Link devices (ar7240_tplink.dtsi) and a file containing
the specific setup for the present TL-WR devices
(ar7240_tplink_tl-wr.dtsi), equivalent to the former
ar7240_tplink_tl-wr74xn-v1.dtsi.
While at it, remove unused firmware partition label and rename
pinmux_switch_led_pins.
Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
If bootloader doesn't terminate its last spi operation properly
before starting kernel, our first transfer in kernel becomes a
continuous transfer to that request instead of a new one.
Fix this flaw by restoring IOC register, which restored all pin
state to default.
Fixes: ebf0d8dade ("ath79: add new ar934x spi driver")
Reported-by: Russell Senior <russell@personaltelco.net>
Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
Inspired by commit c48b571ad7, add an LED trigger for the WAN LED on top of
the TP-Link TL-WR902AC v1. Currently, only the LED on the port itself shows the
link state, while the LED on top of the device stays dark.
The WAN port of the device is a hybrid LAN/WAN one, hence why the LED at the
port was labeled LAN.
Signed-off-by: Lech Perczak <lech.perczak@gmail.com>
AR934x chips also got the 'old' qca,ar9330-uart in addition to the
'new' ns16550a compatible one. Add support for UART1 clock selector as
well as device-tree bindings in ar934x.dtsi to make use of that uart.
Reported-by: Piotr Dymacz <pepe2k@gmail.com>
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
On AR934x this UART is usually not initialized by the bootloader
as it is only used as a secondary serial port while the primary
UART is a newly introduced NS16550-compatible.
In order to make use of the ar933x-uart on AR934x without RTS/CTS
hardware flow control, one needs to set the
UART_CS_{RX,TX}_READY_ORIDE bits as other than on AR933x where this
UART is used as primary/console, the bootloader on AR934x typically
doesn't set those bits.
Setting them explicitely on AR933x does not do any harm, so just set
them unconditionally.
Tested-by: Chuanhong Guo <gch981213@gmail.com
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
This new function make batch processing of network packets possible,
which slightly improves performance.
Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
Tested-by: Rosen Penev <rosenp@gmail.com>
ar933x appears to have the same spi controller as ar934x but it's
not mentioned in datasheet at all. Use new spi driver instead to
gain more flash operating performance.
Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
A new shift mode was introduced since ar934x which has a way better
performance than current bitbang driver and can handle higher spi
clock properly. This commit adds a new driver to make use of this
new feature.
This new driver has chipselect properly configured and we don't need
cs-gpios hack in dts anymore. Remove them.
Signed-off-by: Chuanhong Guo <gch981213@gmail.com>
Remove read-only flag from U-boot environment partition for Netgear
WNDR3700 v1 and v2 so u-boot-envtools can modify data there.
Signed-off-by: Michal Cieslakiewicz <michal.cieslakiewicz@wp.pl>
