#include "mt7620a.dtsi"

#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/leds/common.h>

/ {
	compatible = "bolt,bl201", "ralink,mt7620a-soc";
	model = "Bolt BL201";

	aliases {
		led-boot = &power_red;
		led-failsafe = &power_red;
		led-running = &power_blue;
		led-upgrade = &power_red;
		label-mac-device = &ethernet;
	};

	chosen {
		bootargs = "console=ttyS0,115200";
	};

	leds {
		compatible = "gpio-leds";

		wan {
			function = LED_FUNCTION_WAN;
			color = <LED_COLOR_ID_BLUE>;
			gpios = <&gpio1 5 GPIO_ACTIVE_LOW>;
		};

		power_red: power_red {
			function = LED_FUNCTION_POWER;
			color = <LED_COLOR_ID_RED>;
			gpios = <&gpio1 8 GPIO_ACTIVE_LOW>;
		};

		power_blue: power_blue {
			function = LED_FUNCTION_POWER;
			color = <LED_COLOR_ID_BLUE>;
			gpios = <&gpio1 9 GPIO_ACTIVE_LOW>;
		};

		lte_s1_blue {
			label = "blue:lte_s1";
			gpios = <&gpio1 7 GPIO_ACTIVE_LOW>;
		};

		lte_s2_blue {
			label = "blue:lte_s2";
			gpios = <&gpio1 6 GPIO_ACTIVE_LOW>;
		};

		lte_s3_blue {
			label = "blue:lte_s3";
			gpios = <&gpio1 10 GPIO_ACTIVE_LOW>;
		};

		lte_s4_blue {
			label = "blue:lte_s4";
			gpios = <&gpio1 11 GPIO_ACTIVE_LOW>;
		};

		wps_blue {
			function = LED_FUNCTION_WPS;
			color = <LED_COLOR_ID_BLUE>;
			gpios = <&gpio2 22 GPIO_ACTIVE_LOW>;
		};

		lte_s1s2_red {
			label = "red:lte_s1s2";
			gpios = <&gpio2 24 GPIO_ACTIVE_LOW>;
		};

		lte_s3s4_red {
			label = "red:lte_s3s4";
			gpios = <&gpio2 25 GPIO_ACTIVE_LOW>;
		};

		wlan_blue {
			function = LED_FUNCTION_WLAN;
			color = <LED_COLOR_ID_BLUE>;
			gpios = <&gpio3 0 GPIO_ACTIVE_LOW>;
		};
	};

	keys {
		compatible = "gpio-keys";

		reset {
			label = "reset";
			gpios = <&gpio1 26 GPIO_ACTIVE_LOW>;
			linux,code = <KEY_RESTART>;
		};
	};
};

&gpio0 {
	status = "okay";
};

&gpio1 {
	status = "okay";
};

&gpio2 {
	status = "okay";
};

&gpio3 {
	status = "okay";
};

&spi0 {
	status = "okay";

	flash@0 {
		compatible = "jedec,spi-nor";
		reg = <0>;
		spi-max-frequency = <10000000>;

		partitions {
			compatible = "fixed-partitions";
			#address-cells = <1>;
			#size-cells = <1>;

			partition@0 {
				label = "u-boot";
				reg = <0x0 0x30000>;
				read-only;
			};

			partition@30000 {
				label = "u-boot-env";
				reg = <0x30000 0x10000>;
			};

			partition@40000 {
				compatible = "nvmem-cells";
				label = "factory";
				reg = <0x40000 0x10000>;
				read-only;

				nvmem-layout {
					compatible = "fixed-layout";
					#address-cells = <1>;
					#size-cells = <1>;

					eeprom_factory_0: eeprom@0 {
						reg = <0x0 0x200>;
					};

					eeprom_factory_8000: eeprom@8000 {
						reg = <0x8000 0x200>;
					};

					macaddr_factory_28: macaddr@28 {
						compatible = "mac-base";
						reg = <0x28 0x6>;
						#nvmem-cell-cells = <1>;
					};
				};
			};

			partition@50000 {
				compatible = "denx,uimage";
				label = "firmware";
				reg = <0x50000 0xf80000>;
			};

			partition@fd0000 {
				label = "crash";
				reg = <0xfd0000 0x10000>;
			};

			partition@fe0000 {
				label = "reserved";
				reg = <0xfe0000 0x10000>;
				read-only;
			};

			partition@ff0000 {
				label = "Bdata";
				reg = <0xff0000 0x10000>;
			};
		};
	};
};

&ehci {
	status = "okay";
};

&ohci {
	status = "okay";
};

&ethernet {
	nvmem-cells = <&macaddr_factory_28 0>;
	nvmem-cell-names = "mac-address";

	mediatek,portmap = "llllw";
};

&wmac {
	nvmem-cells = <&eeprom_factory_0>;
	nvmem-cell-names = "eeprom";
	pinctrl-names = "default";
	pinctrl-0 = <&pa_pins>;
};

&pcie {
	status = "okay";
};

&pcie0 {
	mt76@0,0 {
		reg = <0x0000 0 0 0 0>;
		nvmem-cells = <&eeprom_factory_8000>;
		nvmem-cell-names = "eeprom";
		ieee80211-freq-limit = <5000000 6000000>;
	};
};

&state_default {
	gpio {
		groups = "i2c", "uartf", "rgmii1", "rgmii2", "ephy", "wled", "nd_sd";
		function = "gpio";
	};
};