Tomasz Maciej Nowak db99e1851d tegra: correct cpu subtype ... Tegra 2 processors have only 16 double-precision registers. The change introduced by 8dcc108760 ("toolchain: ARM: Fix toolchain compilation for gcc 8.x") switched accidentally the toolchain for tegra target to cpu type with 32 double-precision registers. This stems from gcc defaults which assume "vfpv3-d32" if only "vfpv3" as mfpu is specified. That change resulted in unusable image, in which kernel will kill userspace as soon as it causing "Illegal instruction". Ref: https://forum.openwrt.org/t/gcc-was-broken-on-mvebu-armada-370-device-after-commit-on-2019-03-25/43272 Fixes: 8dcc108760 ("toolchain: ARM: Fix toolchain compilation for gcc 8.x") Signed-off-by: Tomasz Maciej Nowak <tomek_n@o2.pl> (cherry picked from commit 43d1d88510)		2022-05-14 14:53:22 +08:00
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base-files	treewide: don't hardcode "sysupgrade.tgz" file name	2022-04-02 00:29:37 +08:00
image	treewide: provide global default for SUPPORTED_DEVICES	2021-01-29 22:47:58 +08:00
patches-4.14	kernel: bump to 4.14.167, 4.19.98	2020-01-26 17:18:34 +08:00
patches-4.19	kernel: bump to 4.14.167, 4.19.98	2020-01-26 17:18:34 +08:00
config-4.14	kernel: add missing Kconfigs for kernel 4.14	2022-01-01 17:35:27 +08:00
config-4.19	kernel: bump to 4.14.167, 4.19.98	2020-01-26 17:18:34 +08:00
Makefile	tegra: correct cpu subtype	2022-05-14 14:53:22 +08:00