4d5fe0a362
Move kernel config and patches to kernel 6.6. Signed-off-by: Tianling Shen <cnsztl@immortalwrt.org>
148 lines
5.0 KiB
Diff
148 lines
5.0 KiB
Diff
From fb1c13d595857ccff49cbb69ddcdc08594a832e7 Mon Sep 17 00:00:00 2001
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From: Simon Xue <xxm@rock-chips.com>
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Date: Sun, 4 Jun 2023 00:23:33 +0530
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Subject: [PATCH] iio: adc: rockchip_saradc: Add callback functions
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Add start, read and power_down callback functions,
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which will help in adding new rockchip device support
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cleanly.
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Signed-off-by: Simon Xue <xxm@rock-chips.com>
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Signed-off-by: Shreeya Patel <shreeya.patel@collabora.com>
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Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
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Link: https://lore.kernel.org/r/20230603185340.13838-2-shreeya.patel@collabora.com
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Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
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---
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drivers/iio/adc/rockchip_saradc.c | 64 +++++++++++++++++++++++++++++++--------
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1 file changed, 52 insertions(+), 12 deletions(-)
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--- a/drivers/iio/adc/rockchip_saradc.c
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+++ b/drivers/iio/adc/rockchip_saradc.c
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@@ -37,10 +37,15 @@
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#define SARADC_TIMEOUT msecs_to_jiffies(100)
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#define SARADC_MAX_CHANNELS 8
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+struct rockchip_saradc;
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+
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struct rockchip_saradc_data {
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const struct iio_chan_spec *channels;
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int num_channels;
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unsigned long clk_rate;
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+ void (*start)(struct rockchip_saradc *info, int chn);
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+ int (*read)(struct rockchip_saradc *info);
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+ void (*power_down)(struct rockchip_saradc *info);
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};
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struct rockchip_saradc {
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@@ -57,27 +62,50 @@ struct rockchip_saradc {
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struct notifier_block nb;
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};
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-static void rockchip_saradc_power_down(struct rockchip_saradc *info)
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+static void rockchip_saradc_reset_controller(struct reset_control *reset);
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+
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+static void rockchip_saradc_start_v1(struct rockchip_saradc *info, int chn)
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+{
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+ /* 8 clock periods as delay between power up and start cmd */
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+ writel_relaxed(8, info->regs + SARADC_DLY_PU_SOC);
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+ /* Select the channel to be used and trigger conversion */
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+ writel(SARADC_CTRL_POWER_CTRL | (chn & SARADC_CTRL_CHN_MASK) |
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+ SARADC_CTRL_IRQ_ENABLE, info->regs + SARADC_CTRL);
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+}
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+
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+static void rockchip_saradc_start(struct rockchip_saradc *info, int chn)
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+{
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+ info->data->start(info, chn);
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+}
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+
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+static int rockchip_saradc_read_v1(struct rockchip_saradc *info)
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+{
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+ return readl_relaxed(info->regs + SARADC_DATA);
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+}
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+
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+static int rockchip_saradc_read(struct rockchip_saradc *info)
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+{
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+ return info->data->read(info);
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+}
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+
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+static void rockchip_saradc_power_down_v1(struct rockchip_saradc *info)
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{
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- /* Clear irq & power down adc */
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writel_relaxed(0, info->regs + SARADC_CTRL);
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}
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+static void rockchip_saradc_power_down(struct rockchip_saradc *info)
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+{
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+ if (info->data->power_down)
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+ info->data->power_down(info);
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+}
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+
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static int rockchip_saradc_conversion(struct rockchip_saradc *info,
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struct iio_chan_spec const *chan)
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{
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reinit_completion(&info->completion);
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- /* 8 clock periods as delay between power up and start cmd */
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- writel_relaxed(8, info->regs + SARADC_DLY_PU_SOC);
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-
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info->last_chan = chan;
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-
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- /* Select the channel to be used and trigger conversion */
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- writel(SARADC_CTRL_POWER_CTRL
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- | (chan->channel & SARADC_CTRL_CHN_MASK)
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- | SARADC_CTRL_IRQ_ENABLE,
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- info->regs + SARADC_CTRL);
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+ rockchip_saradc_start(info, chan->channel);
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if (!wait_for_completion_timeout(&info->completion, SARADC_TIMEOUT))
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return -ETIMEDOUT;
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@@ -120,7 +148,7 @@ static irqreturn_t rockchip_saradc_isr(i
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struct rockchip_saradc *info = dev_id;
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/* Read value */
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- info->last_val = readl_relaxed(info->regs + SARADC_DATA);
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+ info->last_val = rockchip_saradc_read(info);
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info->last_val &= GENMASK(info->last_chan->scan_type.realbits - 1, 0);
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rockchip_saradc_power_down(info);
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@@ -160,6 +188,9 @@ static const struct rockchip_saradc_data
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.channels = rockchip_saradc_iio_channels,
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.num_channels = ARRAY_SIZE(rockchip_saradc_iio_channels),
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.clk_rate = 1000000,
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+ .start = rockchip_saradc_start_v1,
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+ .read = rockchip_saradc_read_v1,
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+ .power_down = rockchip_saradc_power_down_v1,
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};
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static const struct iio_chan_spec rockchip_rk3066_tsadc_iio_channels[] = {
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@@ -171,6 +202,9 @@ static const struct rockchip_saradc_data
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.channels = rockchip_rk3066_tsadc_iio_channels,
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.num_channels = ARRAY_SIZE(rockchip_rk3066_tsadc_iio_channels),
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.clk_rate = 50000,
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+ .start = rockchip_saradc_start_v1,
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+ .read = rockchip_saradc_read_v1,
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+ .power_down = rockchip_saradc_power_down_v1,
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};
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static const struct iio_chan_spec rockchip_rk3399_saradc_iio_channels[] = {
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@@ -186,6 +220,9 @@ static const struct rockchip_saradc_data
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.channels = rockchip_rk3399_saradc_iio_channels,
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.num_channels = ARRAY_SIZE(rockchip_rk3399_saradc_iio_channels),
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.clk_rate = 1000000,
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+ .start = rockchip_saradc_start_v1,
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+ .read = rockchip_saradc_read_v1,
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+ .power_down = rockchip_saradc_power_down_v1,
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};
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static const struct iio_chan_spec rockchip_rk3568_saradc_iio_channels[] = {
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@@ -203,6 +240,9 @@ static const struct rockchip_saradc_data
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.channels = rockchip_rk3568_saradc_iio_channels,
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.num_channels = ARRAY_SIZE(rockchip_rk3568_saradc_iio_channels),
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.clk_rate = 1000000,
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+ .start = rockchip_saradc_start_v1,
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+ .read = rockchip_saradc_read_v1,
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+ .power_down = rockchip_saradc_power_down_v1,
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};
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static const struct of_device_id rockchip_saradc_match[] = {
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