a2f87aaf53
0. Added rk356x support to existing drivers (PCIe v2 / usb) (upstreamed) 1. Added rk356x dtsi (upstreamed) 2. Added combo phy driver (upstreamed) 3. Added hwRNG support (vendor) 4. Added PCIe v3 driver (under review) 5. Added VOP2 driver (upstreamed) 6. Added 1992 MHz to cpu opp-table (local) Signed-off-by: Tianling Shen <cnsztl@immortalwrt.org>
46 lines
1.5 KiB
Diff
46 lines
1.5 KiB
Diff
From 9c19c531dc98d7ba49b44802a607042e763ebe21 Mon Sep 17 00:00:00 2001
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From: Peter Geis <pgwipeout@gmail.com>
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Date: Wed, 15 Dec 2021 16:02:47 -0500
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Subject: [PATCH] phy: phy-rockchip-inno-usb2: support #address_cells = 2
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New Rockchip devices have the usb phy nodes as standalone devices.
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These nodes have register nodes with #address_cells = 2, but only use 32
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bit addresses.
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Adjust the driver to check if the returned address is "0", and adjust
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the index in that case.
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Signed-off-by: Peter Geis <pgwipeout@gmail.com>
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Tested-by: Michael Riesch <michael.riesch@wolfvision.net>
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Link: https://lore.kernel.org/r/20211215210252.120923-4-pgwipeout@gmail.com
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Signed-off-by: Vinod Koul <vkoul@kernel.org>
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---
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drivers/phy/rockchip/phy-rockchip-inno-usb2.c | 11 ++++++++++-
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1 file changed, 10 insertions(+), 1 deletion(-)
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--- a/drivers/phy/rockchip/phy-rockchip-inno-usb2.c
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+++ b/drivers/phy/rockchip/phy-rockchip-inno-usb2.c
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@@ -1098,12 +1098,21 @@ static int rockchip_usb2phy_probe(struct
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rphy->usbgrf = NULL;
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}
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- if (of_property_read_u32(np, "reg", ®)) {
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+ if (of_property_read_u32_index(np, "reg", 0, ®)) {
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dev_err(dev, "the reg property is not assigned in %pOFn node\n",
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np);
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return -EINVAL;
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}
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+ /* support address_cells=2 */
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+ if (reg == 0) {
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+ if (of_property_read_u32_index(np, "reg", 1, ®)) {
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+ dev_err(dev, "the reg property is not assigned in %pOFn node\n",
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+ np);
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+ return -EINVAL;
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+ }
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+ }
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+
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rphy->dev = dev;
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phy_cfgs = match->data;
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rphy->chg_state = USB_CHG_STATE_UNDEFINED;
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