Hardware -------- RockChip RK3328 ARM64 (4 cores) up to 4GB DDR3 RAM 100 Base-T 1000 Base-T LED (status) ADC button Micro-SD slot eMMC slot USB 3.0 Port Type-C power Signed-off-by: Tianling Shen <cnsztl@immortalwrt.org>
238 lines
6.1 KiB
Diff
238 lines
6.1 KiB
Diff
From f9ae6e992d3d9e80357fee7d65ba0fe2dd37ae1f Mon Sep 17 00:00:00 2001
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From: hmz007 <hmz007@gmail.com>
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Date: Tue, 19 Nov 2019 14:21:51 +0800
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Subject: [PATCH] arm64: dts: nanopi-r2: add rk3328-dmc relate node
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Signed-off-by: hmz007 <hmz007@gmail.com>
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---
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.../rockchip/rk3328-dram-default-timing.dtsi | 311 ++++++++++++++++++
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.../dts/rockchip/rk3328-nanopi-r2-common.dtsi | 85 ++++-
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include/dt-bindings/clock/rockchip-ddr.h | 63 ++++
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include/dt-bindings/memory/rk3328-dram.h | 159 +++++++++
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4 files changed, 617 insertions(+), 1 deletion(-)
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create mode 100644 arch/arm64/boot/dts/rockchip/rk3328-dram-default-timing.dtsi
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create mode 100644 include/dt-bindings/clock/rockchip-ddr.h
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create mode 100644 include/dt-bindings/memory/rk3328-dram.h
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--- a/arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2s.dts
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+++ b/arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2s.dts
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@@ -137,10 +137,19 @@
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cpu-supply = <&vdd_arm>;
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};
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+&dfi {
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+ status = "okay";
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+};
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+
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&display_subsystem {
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status = "disabled";
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};
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+&dmc {
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+ center-supply = <&vdd_log>;
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+ status = "okay";
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+};
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+
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&gmac2io {
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assigned-clocks = <&cru SCLK_MAC2IO>, <&cru SCLK_MAC2IO_EXT>;
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assigned-clock-parents = <&gmac_clk>, <&gmac_clk>;
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@@ -206,6 +215,7 @@
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regulator-name = "vdd_log";
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regulator-always-on;
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regulator-boot-on;
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+ regulator-init-microvolt = <1075000>;
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regulator-min-microvolt = <712500>;
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regulator-max-microvolt = <1450000>;
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regulator-ramp-delay = <12500>;
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@@ -220,6 +230,7 @@
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regulator-name = "vdd_arm";
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regulator-always-on;
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regulator-boot-on;
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+ regulator-init-microvolt = <1225000>;
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regulator-min-microvolt = <712500>;
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regulator-max-microvolt = <1450000>;
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regulator-ramp-delay = <12500>;
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--- a/arch/arm64/boot/dts/rockchip/rk3328-orangepi-r1-plus.dts
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+++ b/arch/arm64/boot/dts/rockchip/rk3328-orangepi-r1-plus.dts
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@@ -104,10 +104,19 @@
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cpu-supply = <&vdd_arm>;
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};
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+&dfi {
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+ status = "okay";
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+};
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+
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&display_subsystem {
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status = "disabled";
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};
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+&dmc {
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+ center-supply = <&vdd_log>;
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+ status = "okay";
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+};
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+
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&gmac2io {
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assigned-clocks = <&cru SCLK_MAC2IO>, <&cru SCLK_MAC2IO_EXT>;
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assigned-clock-parents = <&gmac_clk>, <&gmac_clk>;
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@@ -167,6 +176,7 @@
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regulator-name = "vdd_log";
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regulator-always-on;
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regulator-boot-on;
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+ regulator-init-microvolt = <1075000>;
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regulator-min-microvolt = <712500>;
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regulator-max-microvolt = <1450000>;
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regulator-ramp-delay = <12500>;
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@@ -181,6 +191,7 @@
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regulator-name = "vdd_arm";
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regulator-always-on;
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regulator-boot-on;
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+ regulator-init-microvolt = <1225000>;
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regulator-min-microvolt = <712500>;
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regulator-max-microvolt = <1450000>;
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regulator-ramp-delay = <12500>;
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--- a/arch/arm64/boot/dts/rockchip/rk3328-orangepi-r1-plus-lts.dts
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+++ b/arch/arm64/boot/dts/rockchip/rk3328-orangepi-r1-plus-lts.dts
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@@ -14,6 +14,21 @@
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compatible = "xunlong,orangepi-r1-plus-lts", "rockchip,rk3328";
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};
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+&dmc_opp_table {
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+ opp-798000000 {
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+ status = "disabled";
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+ };
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+ opp-840000000 {
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+ status = "disabled";
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+ };
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+ opp-924000000 {
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+ status = "disabled";
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+ };
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+ opp-1056000000 {
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+ status = "disabled";
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+ };
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+};
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+
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&gmac2io {
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phy-handle = <&yt8531c>;
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tx_delay = <0x19>;
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--- a/arch/arm64/boot/dts/rockchip/rk3328-roc-cc.dts
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+++ b/arch/arm64/boot/dts/rockchip/rk3328-roc-cc.dts
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@@ -134,6 +134,68 @@
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cpu-supply = <&vdd_arm>;
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};
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+&ddr_timing {
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+ ddr3a1_ddr4a9_de-skew = <0>;
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+ ddr3a0_ddr4a10_de-skew = <0>;
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+ ddr3a3_ddr4a6_de-skew = <1>;
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+ ddr3a2_ddr4a4_de-skew = <1>;
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+ ddr3a5_ddr4a8_de-skew = <0>;
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+ ddr3a4_ddr4a5_de-skew = <2>;
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+ ddr3a7_ddr4a11_de-skew = <0>;
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+ ddr3a6_ddr4a7_de-skew = <2>;
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+ ddr3a9_ddr4a0_de-skew = <1>;
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+ ddr3a8_ddr4a13_de-skew = <0>;
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+ ddr3a11_ddr4a3_de-skew = <2>;
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+ ddr3a10_ddr4cs0_de-skew = <0>;
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+ ddr3a13_ddr4a2_de-skew = <1>;
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+ ddr3a12_ddr4ba1_de-skew = <0>;
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+ ddr3a15_ddr4odt0_de-skew = <0>;
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+ ddr3a14_ddr4a1_de-skew = <1>;
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+ ddr3ba1_ddr4a15_de-skew = <0>;
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+ ddr3ba0_ddr4bg0_de-skew = <0>;
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+ ddr3ras_ddr4cke_de-skew = <0>;
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+ ddr3ba2_ddr4ba0_de-skew = <1>;
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+ ddr3we_ddr4bg1_de-skew = <1>;
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+ ddr3cas_ddr4a12_de-skew = <0>;
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+ ddr3ckn_ddr4ckn_de-skew = <5>;
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+ ddr3ckp_ddr4ckp_de-skew = <5>;
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+ ddr3cke_ddr4a16_de-skew = <1>;
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+ ddr3odt0_ddr4a14_de-skew = <0>;
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+ ddr3cs0_ddr4act_de-skew = <1>;
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+ ddr3reset_ddr4reset_de-skew = <0>;
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+ ddr3cs1_ddr4cs1_de-skew = <0>;
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+ ddr3odt1_ddr4odt1_de-skew = <0>;
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+};
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+
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+&dfi {
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+ status = "okay";
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+};
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+
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+&dmc {
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+ center-supply = <&vdd_logic>;
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+ status = "okay";
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+};
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+
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+&dmc_opp_table {
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+ /delete-node/ opp-1056000000;
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+
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+ opp-798000000 {
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+ opp-microvolt-L1 = <12000000>;
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+ };
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+ opp-840000000 {
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+ opp-microvolt-L1 = <12000000>;
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+ };
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+ opp-924000000 {
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+ opp-microvolt-L1 = <12000000>;
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+ };
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+ opp-1068000000 {
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+ opp-hz = /bits/ 64 <1068000000>;
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+ opp-microvolt = <1175000>;
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+ opp-microvolt-L0 = <1175000>;
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+ opp-microvolt-L1 = <12000000>;
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+ };
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+};
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+
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&emmc {
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bus-width = <8>;
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cap-mmc-highspeed;
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@@ -206,6 +268,7 @@
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regulators {
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vdd_logic: DCDC_REG1 {
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regulator-name = "vdd_logic";
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+ regulator-init-microvolt = <1075000>;
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regulator-min-microvolt = <712500>;
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regulator-max-microvolt = <1450000>;
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regulator-always-on;
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@@ -218,6 +281,7 @@
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vdd_arm: DCDC_REG2 {
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regulator-name = "vdd_arm";
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+ regulator-init-microvolt = <1225000>;
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regulator-min-microvolt = <712500>;
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regulator-max-microvolt = <1450000>;
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regulator-always-on;
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--- a/arch/arm64/boot/dts/rockchip/rk3328-rock-pi-e.dts
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+++ b/arch/arm64/boot/dts/rockchip/rk3328-rock-pi-e.dts
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@@ -134,6 +134,15 @@
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cpu-supply = <&vdd_arm>;
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};
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+&dfi {
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+ status = "okay";
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+};
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+
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+&dmc {
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+ center-supply = <&vdd_log>;
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+ status = "okay";
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+};
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+
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&emmc {
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bus-width = <8>;
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cap-mmc-highspeed;
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@@ -214,6 +223,7 @@
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regulator-name = "vdd_log";
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regulator-always-on;
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regulator-boot-on;
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+ regulator-init-microvolt = <1075000>;
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regulator-min-microvolt = <712500>;
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regulator-max-microvolt = <1450000>;
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regulator-ramp-delay = <12500>;
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@@ -228,6 +238,7 @@
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regulator-name = "vdd_arm";
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regulator-always-on;
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regulator-boot-on;
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+ regulator-init-microvolt = <1225000>;
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regulator-min-microvolt = <712500>;
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regulator-max-microvolt = <1450000>;
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regulator-ramp-delay = <12500>;
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