Tomasz Maciej Nowak db99e1851d tegra: correct cpu subtype ... Tegra 2 processors have only 16 double-precision registers. The change introduced by 8dcc108760 ("toolchain: ARM: Fix toolchain compilation for gcc 8.x") switched accidentally the toolchain for tegra target to cpu type with 32 double-precision registers. This stems from gcc defaults which assume "vfpv3-d32" if only "vfpv3" as mfpu is specified. That change resulted in unusable image, in which kernel will kill userspace as soon as it causing "Illegal instruction". Ref: https://forum.openwrt.org/t/gcc-was-broken-on-mvebu-armada-370-device-after-commit-on-2019-03-25/43272 Fixes: 8dcc108760 ("toolchain: ARM: Fix toolchain compilation for gcc 8.x") Signed-off-by: Tomasz Maciej Nowak <tomek_n@o2.pl> (cherry picked from commit 43d1d88510)		2022-05-14 14:53:22 +08:00
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imagebuilder	imagebuilder: export SOURCE_DATE_EPOCH to environment	2022-04-14 01:04:14 +08:00
linux	tegra: correct cpu subtype	2022-05-14 14:53:22 +08:00
sdk	build: scripts/config - update to kconfig-v5.14	2022-02-24 11:35:03 +08:00
toolchain	config: pack toolchain per default on buildbots	2021-11-27 03:52:11 +08:00
Config.in	build: define PWM_SUPPORT arch feature flag	2020-09-26 11:34:00 +08:00
Makefile	update target	2019-08-19 22:26:19 +08:00