Jonathan A. Kollasch e378615cee ath79: fix eth0 PLL registers on WD My Net Wi-Fi Range Extender ... This replaces the register bits for RGMII delay on the MAC side in favor of having the RGMII delay on the PHY side by setting the phy-mode property to rgmii-id (RGMII internal delay), which is supported by the at803x driver. Speed 1000 is fixed as a result, so now all ethernet speeds function. Signed-off-by: Jonathan A. Kollasch <jakllsch@kollasch.net> Reviewed-by: Michael Pratt <mcpratt@pm.me>		2021-06-07 23:33:41 +08:00
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imagebuilder	imagebuilder: unset BINARY_FOLDER and DOWNLOAD_FOLDER in final archive	2021-05-09 00:35:59 +08:00
linux	ath79: fix eth0 PLL registers on WD My Net Wi-Fi Range Extender	2021-06-07 23:33:41 +08:00
sdk	sdk: generate correct base feed	2021-05-26 22:34:13 +08:00
toolchain
Config.in
Makefile