CN_SZTL bcbf8f84e3 rockchip/sunxi: kernel: adjust default coherent_pool to 2MiB ... Signed-off-by: CN_SZTL <cnsztl@project-openwrt.eu.org>		2021-01-02 13:30:18 +08:00
..
base-files	sunxi: fix board.d/01_leds permissions and drop include	2020-11-12 17:18:26 +01:00
cortexa7	kernel: remove support for kernel 4.19	2020-10-30 19:29:59 +01:00
cortexa8	kernel: remove support for kernel 4.19	2020-10-30 19:29:59 +01:00
cortexa53	kernel: remove support for kernel 4.19	2020-10-30 19:29:59 +01:00
image	sunxi: add support for Libre Computer ALL-H3-CC H5	2020-11-12 18:21:17 +01:00
patches-5.4	rockchip/sunxi: kernel: adjust default coherent_pool to 2MiB	2021-01-02 13:30:18 +08:00
profiles	treewide: use wpad-basic-wolfssl as default	2020-08-20 14:19:39 +02:00
config-5.4	treewide: enable the vDSO	2020-10-13 20:08:41 +02:00
Makefile	sunxi: add text referencing Allwinner H3 and H5 CPUs	2020-06-27 00:19:13 +02:00
modules.mk	sunxi: add a kmod package for sun4i_spdif	2020-10-11 17:45:02 +02:00