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Merge Official Source

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Signed-off-by: Tianling Shen <cnsztl@immortalwrt.org>
This commit is contained in:
Tianling Shen 2024-07-07 20:04:25 +08:00
commit 472770b5cb
No known key found for this signature in database
GPG Key ID: 6850B6345C862176
40 changed files with 1987 additions and 403 deletions
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3
package/boot/uboot-envtools/files/mediatek_filogic
View File

@ -70,6 +70,9 @@ cmcc,rax3000m)
cmcc,rax3000m-emmc-ubootmod)
ubootenv_add_uci_config "/dev/mmcblk0p1" "0x0" "0x80000" "0x80000"
;;
comfast,cf-e393ax)
ubootenv_add_uci_config "/dev/mtd1" "0x0" "0x20000" "0x80000"
;;
glinet,gl-mt2500|\
glinet,gl-mt6000)
local envdev=$(find_mmc_part "u-boot-env")

4
package/boot/uboot-envtools/files/mediatek_mt7622
View File

@ -12,6 +12,10 @@ touch /etc/config/ubootenv
board=$(board_name)
case "$board" in
dlink,eagle-pro-ai-m32-a1|\
dlink,eagle-pro-ai-r32-a1)
ubootenv_add_uci_config "/dev/mtd3" "0x0" "0x2000" "0x2000"
;;
linksys,e8450-ubi)
ubootenv_add_uci_config "/dev/ubi0_0" "0x0" "0x1f000" "0x1f000" "1"
ubootenv_add_uci_config "/dev/ubi0_1" "0x0" "0x1f000" "0x1f000" "1"

2
package/libs/libjson-c/Makefile
View File

@ -18,7 +18,7 @@ PKG_HASH:=ac8a3dd6820daaca579b23fbc74664310fbc3d67f52f6707cda67d21dde5570f
PKG_MAINTAINER:=Felix Fietkau <nbd@nbd.name>
PKG_LICENSE:=MIT
PKG_LICENSE_FILES:=COPYING
PKG_CPE_ID:=cpe:/a:json-c_project:json-c
PKG_CPE_ID:=cpe:/a:json-c:json-c
HOST_BUILD_PREFIX:=$(STAGING_DIR_HOST)

8
package/libs/openssl/Makefile
View File

@ -8,8 +8,8 @@
include $(TOPDIR)/rules.mk
PKG_NAME:=openssl
PKG_VERSION:=3.0.13
PKG_RELEASE:=1
PKG_VERSION:=3.0.14
PKG_RELEASE:=2
PKG_BUILD_FLAGS:=no-mips16 gc-sections no-lto
PKG_BUILD_PARALLEL:=1
@ -26,7 +26,7 @@ PKG_SOURCE_URL:= \
ftp://ftp.pca.dfn.de/pub/tools/net/openssl/source/ \
ftp://ftp.pca.dfn.de/pub/tools/net/openssl/source/old/$(PKG_BASE)/
PKG_HASH:=88525753f79d3bec27d2fa7c66aa0b92b3aa9498dafd93d7cfa4b3780cdae313
PKG_HASH:=eeca035d4dd4e84fc25846d952da6297484afa0650a6f84c682e39df3a4123ca
PKG_LICENSE:=Apache-2.0
PKG_LICENSE_FILES:=LICENSE
@ -418,6 +418,8 @@ define Package/libopenssl-conf/install
$(INSTALL_BIN) ./files/openssl.init $(1)/etc/init.d/openssl
$(SED) 's!%ENGINES_DIR%!/usr/lib/$(ENGINES_DIR)!' $(1)/etc/init.d/openssl
touch $(1)/etc/config/openssl
$(if $(CONFIG_OPENSSL_ENGINE),,
$(SED) 's!engines = engines_sect!#&!' $(1)/etc/ssl/openssl.cnf)
$(if $(CONFIG_OPENSSL_ENGINE_BUILTIN_DEVCRYPTO),
$(CP) ./files/devcrypto.cnf $(1)/etc/ssl/modules.cnf.d/
echo -e "config engine 'devcrypto'\n\toption enabled '1'\n\toption builtin '1'" >> $(1)/etc/config/openssl)

2
package/libs/pcre2/Makefile
View File

@ -18,7 +18,7 @@ PKG_HASH:=8d36cd8cb6ea2a4c2bb358ff6411b0c788633a2a45dabbf1aeb4b701d1b5e840
PKG_MAINTAINER:=Shane Peelar <lookatyouhacker@gmail.com>
PKG_LICENSE:=BSD-3-Clause
PKG_LICENSE_FILES:=LICENCE
PKG_CPE_ID:=cpe:/a:pcre:pcre
PKG_CPE_ID:=cpe:/a:pcre:pcre2
PKG_CONFIG_DEPENDS:=\
CONFIG_PACKAGE_libpcre2-16 \

4
package/libs/wolfssl/Makefile
View File

@ -8,12 +8,12 @@
include $(TOPDIR)/rules.mk
PKG_NAME:=wolfssl
PKG_VERSION:=5.6.4-stable
PKG_VERSION:=5.7.0-stable
PKG_RELEASE:=1
PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.gz
PKG_SOURCE_URL:=https://github.com/wolfSSL/wolfssl/archive/v$(PKG_VERSION)
PKG_HASH:=031691906794ff45e1e792561cf31759f5d29ac74936bc8dffb8b14f16d820b4
PKG_HASH:=2de93e8af588ee856fe67a6d7fce23fc1b226b74d710b0e3946bc8061f6aa18f
PKG_FIXUP:=libtool libtool-abiver
PKG_INSTALL:=1

2
package/libs/wolfssl/patches/100-disable-hardening-check.patch
View File

@ -1,6 +1,6 @@
--- a/wolfssl/wolfcrypt/settings.h
+++ b/wolfssl/wolfcrypt/settings.h
@@ -2630,7 +2630,7 @@ extern void uITRON4_free(void *p) ;
@@ -2945,7 +2945,7 @@ extern void uITRON4_free(void *p) ;
/* warning for not using harden build options (default with ./configure) */
/* do not warn if big integer support is disabled */

2
package/network/services/dropbear/Makefile
View File

@ -19,7 +19,7 @@ PKG_HASH:=3a038d2bbc02bf28bbdd20c012091f741a3ec5cbe460691811d714876aad75d1
PKG_LICENSE:=MIT
PKG_LICENSE_FILES:=LICENSE libtomcrypt/LICENSE libtommath/LICENSE
PKG_CPE_ID:=cpe:/a:matt_johnston:dropbear_ssh_server
PKG_CPE_ID:=cpe:/a:dropbear_ssh_project:dropbear_ssh
PKG_BUILD_PARALLEL:=1
PKG_ASLR_PIE_REGULAR:=1

2
package/network/utils/iptables/Makefile
View File

@ -23,7 +23,7 @@ PKG_INSTALL:=1
PKG_BUILD_FLAGS:=gc-sections no-lto
PKG_BUILD_PARALLEL:=1
PKG_LICENSE:=GPL-2.0
PKG_CPE_ID:=cpe:/a:netfilter_core_team:iptables
PKG_CPE_ID:=cpe:/a:netfilter:iptables
include $(INCLUDE_DIR)/package.mk
ifeq ($(DUMP),)

1
package/utils/secilc/Makefile
View File

@ -15,7 +15,6 @@ PKG_HASH:=3eebc5a1f97847fa530cf90654b9f3b8f21a13c9ea3d07495325651580cd3373
HOST_BUILD_DEPENDS:=libsepol/host
PKG_MAINTAINER:=Dominick Grift <dominick.grift@defensec.nl>
PKG_CPE_ID:=cpe:/a:selinuxproject:secilc
PKG_LICENSE:=BSD-2-Clause
PKG_LICENSE_FILES:=COPYING

5
target/linux/armsr/armv8/config-5.15
View File

@ -612,6 +612,11 @@ CONFIG_SERIAL_MVEBU_CONSOLE=y
CONFIG_SERIAL_MVEBU_UART=y
CONFIG_SERIAL_SAMSUNG=y
CONFIG_SERIAL_SAMSUNG_CONSOLE=y
CONFIG_SERIAL_SH_SCI=y
CONFIG_SERIAL_SH_SCI_CONSOLE=y
CONFIG_SERIAL_SH_SCI_DMA=y
CONFIG_SERIAL_SH_SCI_EARLYCON=y
CONFIG_SERIAL_SH_SCI_NR_UARTS=18
# CONFIG_SMC91X is not set
# CONFIG_SND_SOC_RCAR is not set
# CONFIG_SND_SOC_RZ is not set

1
target/linux/armsr/base-files/etc/inittab
View File

@ -7,3 +7,4 @@ hvc0::askfirst:/usr/libexec/login.sh
ttymxc0::askfirst:/usr/libexec/login.sh
ttymxc1::askfirst:/usr/libexec/login.sh
ttymxc2::askfirst:/usr/libexec/login.sh
ttySC0::askfirst:/usr/libexec/login.sh

3
target/linux/armsr/config-5.15
View File

@ -99,6 +99,9 @@ CONFIG_DMA_REMAP=y
CONFIG_DMI=y
CONFIG_DMIID=y
CONFIG_DMI_SYSFS=y
CONFIG_DRM_FBDEV_EMULATION=y
CONFIG_DRM_FBDEV_OVERALLOC=100
CONFIG_DRM_LOAD_EDID_FIRMWARE=y
CONFIG_DTC=y
CONFIG_EDAC_SUPPORT=y
CONFIG_EFI=y

3
target/linux/armsr/image/Makefile
View File

@ -116,7 +116,8 @@ define Device/generic
kmod-fsl-enetc-net kmod-dwmac-imx kmod-fsl-fec kmod-thunderx-net \
kmod-dwmac-rockchip kmod-dwmac-sun8i kmod-phy-aquantia kmod-phy-broadcom \
kmod-phy-marvell kmod-phy-marvell-10g kmod-sfp kmod-atlantic \
kmod-bcmgenet kmod-octeontx2-net
kmod-bcmgenet kmod-octeontx2-net kmod-renesas-net-avb \
kmod-phy-realtek kmod-phy-smsc
endef
TARGET_DEVICES += generic

15
target/linux/armsr/modules.mk
View File

@ -314,6 +314,21 @@ define KernelPackage/octeontx2-net
endef
$(eval $(call KernelPackage,octeontx2-net))
define KernelPackage/renesas-net-avb
SUBMENU:=$(NETWORK_DEVICES_MENU)
TITLE:=Renesas network drivers
DEPENDS:=@(TARGET_armsr_armv8) +kmod-phylink +kmod-mii +kmod-ptp +kmod-libphy +kmod-mdio-gpio
KCONFIG:=CONFIG_RAVB
FILES=$(LINUX_DIR)/drivers/net/ethernet/renesas/ravb.ko
AUTOLOAD:=$(call AutoProbe,ravb)
endef
define KernelPackage/renesas-net-avb/description
Support Renesas RZ platform Ethernet module
endef
$(eval $(call KernelPackage,renesas-net-avb))
define KernelPackage/wdt-sp805
SUBMENU:=$(OTHER_MENU)
TITLE:=ARM SP805 Watchdog

5
target/linux/mediatek/base-files/lib/preinit/05_set_preinit_iface
View File

@ -11,6 +11,11 @@ set_preinit_iface() {
ip link set eth0 up
ifname=eth0
;;
smartrg,sdg-8622|\
smartrg,sdg-8632)
ip link set lan up
ifname=lan
;;
xiaomi,mi-router-ax3000t|\
xiaomi,mi-router-ax3000t-ubootmod|\
xiaomi,mi-router-wr30u-112m-nmbm|\

369
target/linux/mediatek/dts/mt7622-dlink-eagle-pro-ai-ax3200-a1.dtsi Normal file
View File

@ -0,0 +1,369 @@
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/dts-v1/;
#include "mt7622.dtsi"
#include "mt6380.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
/ {
aliases {
serial0 = &uart0;
label-mac-device = &gmac0;
};
chosen {
stdout-path = "serial0:115200n8";
bootargs = "earlycon=uart8250,mmio32,0x11002000 console=ttyS0,115200n8 swiotlb=512";
};
cpus {
cpu@0 {
proc-supply = <&mt6380_vcpu_reg>;
sram-supply = <&mt6380_vm_reg>;
};
cpu@1 {
proc-supply = <&mt6380_vcpu_reg>;
sram-supply = <&mt6380_vm_reg>;
};
};
gpio-keys {
compatible = "gpio-keys";
button-reset {
gpios = <&pio 0 GPIO_ACTIVE_LOW>;
label = "reset";
linux,code = <KEY_RESTART>;
};
button-wps {
gpios = <&pio 102 GPIO_ACTIVE_LOW>;
label = "wps";
linux,code = <KEY_WPS_BUTTON>;
};
};
memory {
reg = <0 0x40000000 0 0x40000000>;
};
};
&bch {
status = "okay";
};
&btif {
status = "okay";
};
&eth {
pinctrl-names = "default";
pinctrl-0 = <&eth_pins>;
status = "okay";
gmac0: mac@0 {
compatible = "mediatek,eth-mac";
phy-mode = "2500base-x";
reg = <0>;
nvmem-cells = <&macaddr_odm 1>;
nvmem-cell-names = "mac-address";
fixed-link {
full-duplex;
pause;
speed = <2500>;
};
};
mdio-bus {
#address-cells = <1>;
#size-cells = <0>;
switch: switch@0 {
compatible = "mediatek,mt7531";
reg = <0>;
interrupt-controller;
#interrupt-cells = <1>;
interrupt-parent = <&pio>;
interrupts = <53 IRQ_TYPE_LEVEL_HIGH>;
reset-gpios = <&pio 54 0>;
ports {
wan: port@4 {
reg = <4>;
label = "wan";
nvmem-cells = <&macaddr_odm 0>;
nvmem-cell-names = "mac-address";
};
port@6 {
reg = <6>;
ethernet = <&gmac0>;
phy-mode = "2500base-x";
fixed-link {
speed = <2500>;
full-duplex;
pause;
};
};
};
};
};
};
&pcie0 {
pinctrl-names = "default";
pinctrl-0 = <&pcie0_pins>;
status = "okay";
};
&pcie1 {
pinctrl-names = "default";
pinctrl-0 = <&pcie1_pins>;
status = "okay";
};
&pio {
epa_elna_pins: epa-elna-pins {
mux {
function = "antsel";
groups = "antsel0", "antsel1", "antsel2", "antsel3",
"antsel4", "antsel5", "antsel6", "antsel7",
"antsel8", "antsel9", "antsel12", "antsel13",
"antsel14", "antsel15", "antsel16", "antsel17";
};
};
eth_pins: eth-pins {
mux {
function = "eth";
groups = "mdc_mdio", "rgmii_via_gmac2";
};
};
pcie0_pins: pcie0-pins {
mux {
function = "pcie";
groups = "pcie0_pad_perst",
"pcie0_1_waken",
"pcie0_1_clkreq";
};
};
pcie1_pins: pcie1-pins {
mux {
function = "pcie";
groups = "pcie1_pad_perst",
"pcie1_0_waken",
"pcie1_0_clkreq";
};
};
pmic_bus_pins: pmic-bus-pins {
mux {
function = "pmic";
groups = "pmic_bus";
};
};
/* Serial NAND is shared pin with SPI-NOR */
serial_nand_pins: serial-nand-pins {
mux {
function = "flash";
groups = "snfi";
};
};
uart0_pins: uart0-pins {
mux {
function = "uart";
groups = "uart0_0_tx_rx";
};
};
watchdog_pins: watchdog-pins {
mux {
function = "watchdog";
groups = "watchdog";
};
};
};
&pwrap {
pinctrl-names = "default";
pinctrl-0 = <&pmic_bus_pins>;
status = "okay";
};
&rtc {
status = "disabled";
};
&sata {
status = "disabled";
};
&sata_phy {
status = "disabled";
};
&slot0 {
wmac1: mt7915@0,0 {
reg = <0x0000 0 0 0 0>;
ieee80211-freq-limit = <5000000 6000000>;
mediatek,mtd-eeprom = <&factory 0x05000>;
nvmem-cells = <&macaddr_odm 3>;
nvmem-cell-names = "mac-address";
};
};
&snfi {
pinctrl-names = "default";
pinctrl-0 = <&serial_nand_pins>;
status = "okay";
snand: flash@0 {
compatible = "spi-nand";
mediatek,bmt-table-size = <0x1000>;
mediatek,bmt-v2;
nand-ecc-engine = <&snfi>;
reg = <0>;
spi-rx-bus-width = <4>;
spi-tx-bus-width = <4>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "Preloader";
reg = <0x00000000 0x00080000>;
read-only;
};
partition@80000 {
label = "ATF";
reg = <0x00080000 0x00040000>;
read-only;
};
partition@C0000 {
label = "Bootloader";
reg = <0x000C0000 0x00080000>;
read-only;
};
partition@140000 {
label = "BootConfig";
reg = <0x00140000 0x00040000>;
};
partition@180000 {
label = "Odm";
reg = <0x00180000 0x00040000>;
read-only;
odm_partition: nvmem-layout {
compatible = "fixed-layout";
};
};
config1: partition@1C0000 {
compatible = "nvmem-cells";
label = "Config1";
reg = <0x001C0000 0x00080000>;
read-only;
};
partition@240000 {
label = "Config2";
reg = <0x00240000 0x00080000>;
read-only;
};
partition@2C0000 {
label = "Kernel1";
reg = <0x002C0000 0x02D00000>;
compatible = "denx,fit";
openwrt,cmdline-match = "boot_part=Kernel1";
partition@0 {
label = "kernel";
reg = <0x00000000 0x00800000>;
};
partition@800000 {
label = "ubi";
reg = <0x00800000 0x02500000>;
};
};
partition@2FC0000 {
label = "Kernel2";
reg = <0x02FC0000 0x02D00000>;
compatible = "denx,fit";
openwrt,cmdline-match = "boot_part=Kernel2";
partition@0 {
label = "kernel";
reg = <0x00000000 0x00800000>;
};
partition@800000 {
label = "ubi";
reg = <0x00800000 0x02500000>;
};
};
factory: partition@5CC0000 {
label = "Factory";
reg = <0x05CC0000 0x00100000>;
read-only;
};
partition@5DC0000 {
label = "Mydlink";
reg = <0x05DC0000 0x00200000>;
read-only;
};
partition@5FC0000 {
label = "Storage";
reg = <0x05FC0000 0x00300000>;
read-only;
};
};
};
};
&ssusb {
status = "disabled";
};
&u3phy {
status = "disabled";
};
&uart0 {
pinctrl-names = "default";
pinctrl-0 = <&uart0_pins>;
status = "okay";
};
&watchdog {
pinctrl-names = "default";
pinctrl-0 = <&watchdog_pins>;
status = "okay";
};
&wmac {
pinctrl-names = "default";
pinctrl-0 = <&epa_elna_pins>;
mediatek,mtd-eeprom = <&factory 0x0000>;
nvmem-cells = <&macaddr_odm 2>;
nvmem-cell-names = "mac-address";
status = "okay";
};

393
target/linux/mediatek/dts/mt7622-dlink-eagle-pro-ai-m32-a1.dts
View File

@ -1,399 +1,62 @@
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/dts-v1/;
#include "mt7622.dtsi"
#include "mt6380.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include "mt7622-dlink-eagle-pro-ai-ax3200-a1.dtsi"
#include <dt-bindings/leds/common.h>
/ {
model = "D-Link EAGLE PRO AI M32 A1";
compatible = "dlink,eagle-pro-ai-m32-a1", "mediatek,mt7622";
aliases {
led-boot = &status_orange;
led-failsafe = &status_red;
led-running = &status_white;
led-upgrade = &status_red;
serial0 = &uart0;
label-mac-device = &gmac0;
};
chosen {
stdout-path = "serial0:115200n8";
bootargs = "earlycon=uart8250,mmio32,0x11002000 console=ttyS0,115200n8 swiotlb=512";
};
cpus {
cpu@0 {
proc-supply = <&mt6380_vcpu_reg>;
sram-supply = <&mt6380_vm_reg>;
};
cpu@1 {
proc-supply = <&mt6380_vcpu_reg>;
sram-supply = <&mt6380_vm_reg>;
};
};
gpio-keys {
compatible = "gpio-keys";
reset {
gpios = <&pio 0 GPIO_ACTIVE_LOW>;
label = "reset";
linux,code = <KEY_RESTART>;
};
wps {
gpios = <&pio 102 GPIO_ACTIVE_LOW>;
label = "wps";
linux,code = <KEY_WPS_BUTTON>;
};
led-boot = &led_status_orange;
led-failsafe = &led_status_red;
led-running = &led_status_white;
led-upgrade = &led_status_red;
};
leds {
compatible = "gpio-leds";
status_white: status_white {
label = "white:status";
led_status_white: led-status-white {
color = <LED_COLOR_ID_WHITE>;
function = LED_FUNCTION_STATUS;
gpios = <&pio 85 GPIO_ACTIVE_LOW>;
};
status_orange: status_orange {
label = "orange:status";
led_status_orange: led-status-orange {
color = <LED_COLOR_ID_ORANGE>;
function = LED_FUNCTION_STATUS;
gpios = <&pio 20 GPIO_ACTIVE_LOW>;
default-state = "on";
};
status_red: status_red {
label = "red:status";
led_status_red: led-status-red {
color = <LED_COLOR_ID_RED>;
function = LED_FUNCTION_STATUS;
gpios = <&pio 17 GPIO_ACTIVE_LOW>;
};
};
memory {
reg = <0 0x40000000 0 0x40000000>;
};
};
&bch {
status = "okay";
};
&btif {
status = "okay";
};
&eth {
pinctrl-names = "default";
pinctrl-0 = <&eth_pins>;
status = "okay";
gmac0: mac@0 {
compatible = "mediatek,eth-mac";
nvmem-cells = <&macaddr_odm_83>;
nvmem-cell-names = "mac-address";
phy-mode = "2500base-x";
reg = <0>;
fixed-link {
full-duplex;
pause;
speed = <2500>;
&switch {
ports {
port@2 {
reg = <2>;
label = "lan2";
};
};
mdio-bus {
#address-cells = <1>;
#size-cells = <0>;
switch@0 {
compatible = "mediatek,mt7531";
reg = <0>;
interrupt-controller;
#interrupt-cells = <1>;
interrupt-parent = <&pio>;
interrupts = <53 IRQ_TYPE_LEVEL_HIGH>;
reset-gpios = <&pio 54 0>;
ports {
#address-cells = <1>;
#size-cells = <0>;
port@2 {
reg = <2>;
label = "lan2";
};
port@3 {
reg = <3>;
label = "lan1";
};
wan: port@4 {
reg = <4>;
label = "wan";
};
port@6 {
reg = <6>;
ethernet = <&gmac0>;
phy-mode = "2500base-x";
fixed-link {
speed = <2500>;
full-duplex;
pause;
};
};
};
port@3 {
reg = <3>;
label = "lan1";
};
};
};
&pcie0 {
pinctrl-names = "default";
pinctrl-0 = <&pcie0_pins>;
status = "okay";
};
&pcie1 {
pinctrl-names = "default";
pinctrl-0 = <&pcie1_pins>;
status = "okay";
};
&pio {
epa_elna_pins: epa-elna-pins {
mux {
function = "antsel";
groups = "antsel0", "antsel1", "antsel2", "antsel3",
"antsel4", "antsel5", "antsel6", "antsel7",
"antsel8", "antsel9", "antsel12", "antsel13",
"antsel14", "antsel15", "antsel16", "antsel17";
};
};
eth_pins: eth-pins {
mux {
function = "eth";
groups = "mdc_mdio", "rgmii_via_gmac2";
};
};
pcie0_pins: pcie0-pins {
mux {
function = "pcie";
groups = "pcie0_pad_perst",
"pcie0_1_waken",
"pcie0_1_clkreq";
};
};
pcie1_pins: pcie1-pins {
mux {
function = "pcie";
groups = "pcie1_pad_perst",
"pcie1_0_waken",
"pcie1_0_clkreq";
};
};
pmic_bus_pins: pmic-bus-pins {
mux {
function = "pmic";
groups = "pmic_bus";
};
};
/* Serial NAND is shared pin with SPI-NOR */
serial_nand_pins: serial-nand-pins {
mux {
function = "flash";
groups = "snfi";
};
};
uart0_pins: uart0-pins {
mux {
function = "uart";
groups = "uart0_0_tx_rx";
};
};
watchdog_pins: watchdog-pins {
mux {
function = "watchdog";
groups = "watchdog";
};
&odm_partition {
macaddr_odm: macaddr@83 {
compatible = "mac-base";
reg = <0x83 0x6>;
#nvmem-cell-cells = <1>;
};
};
&pwrap {
pinctrl-names = "default";
pinctrl-0 = <&pmic_bus_pins>;
status = "okay";
};
&rtc {
status = "disabled";
};
&sata {
status = "disabled";
};
&sata_phy {
status = "disabled";
};
&slot0 {
wmac1: mt7915@0,0 {
reg = <0x0000 0 0 0 0>;
ieee80211-freq-limit = <5000000 6000000>;
mediatek,mtd-eeprom = <&factory 0x05000>;
};
};
&snfi {
pinctrl-names = "default";
pinctrl-0 = <&serial_nand_pins>;
status = "okay";
snand: flash@0 {
compatible = "spi-nand";
mediatek,bmt-table-size = <0x1000>;
mediatek,bmt-v2;
nand-ecc-engine = <&snfi>;
reg = <0>;
spi-rx-bus-width = <4>;
spi-tx-bus-width = <4>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "Preloader";
reg = <0x00000000 0x00080000>;
read-only;
};
partition@80000 {
label = "ATF";
reg = <0x00080000 0x00040000>;
read-only;
};
partition@C0000 {
label = "Bootloader";
reg = <0x000C0000 0x00080000>;
read-only;
};
partition@140000 {
label = "BootConfig";
reg = <0x00140000 0x00040000>;
read-only;
};
odm: partition@180000 {
compatible = "nvmem-cells";
label = "Odm";
reg = <0x00180000 0x00040000>;
read-only;
macaddr_odm_83: macaddr@83 {
reg = <0x83 0x6>;
};
};
config1: partition@1C0000 {
compatible = "nvmem-cells";
label = "Config1";
reg = <0x001C0000 0x00080000>;
#address-cells = <1>;
#size-cells = <1>;
read-only;
};
partition@240000 {
label = "Config2";
reg = <0x00240000 0x00080000>;
read-only;
};
partition@2C0000 {
label = "Kernel1";
reg = <0x002C0000 0x02D00000>;
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "kernel";
reg = <0x00000000 0x00800000>;
};
partition@800000 {
label = "ubi";
reg = <0x00800000 0x02500000>;
};
};
partition@2FC0000 {
label = "Kernel2";
reg = <0x02FC0000 0x02D00000>;
read-only;
};
factory: partition@5CC0000 {
label = "Factory";
reg = <0x05CC0000 0x00100000>;
read-only;
};
partition@5DC0000 {
label = "Mydlink";
reg = <0x05DC0000 0x00200000>;
read-only;
};
partition@5FC0000 {
label = "Storage";
reg = <0x05FC0000 0x00300000>;
read-only;
};
};
};
};
&ssusb {
status = "disabled";
};
&u3phy {
status = "disabled";
};
&uart0 {
pinctrl-names = "default";
pinctrl-0 = <&uart0_pins>;
status = "okay";
};
&watchdog {
pinctrl-names = "default";
pinctrl-0 = <&watchdog_pins>;
status = "okay";
};
&wmac {
pinctrl-names = "default";
pinctrl-0 = <&epa_elna_pins>;
mediatek,mtd-eeprom = <&factory 0x0000>;
status = "okay";
};

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target/linux/mediatek/dts/mt7622-dlink-eagle-pro-ai-r32-a1.dts Normal file
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// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/dts-v1/;
#include "mt7622-dlink-eagle-pro-ai-ax3200-a1.dtsi"
#include <dt-bindings/leds/common.h>
/ {
model = "D-Link EAGLE PRO AI R32 A1";
compatible = "dlink,eagle-pro-ai-r32-a1", "mediatek,mt7622";
aliases {
led-boot = &led_power_orange;
led-failsafe = &led_power_orange;
led-running = &led_power_white;
led-upgrade = &led_power_orange;
};
leds {
compatible = "gpio-leds";
led_power_orange: led-power-orange {
color = <LED_COLOR_ID_ORANGE>;
function = LED_FUNCTION_STATUS;
gpios = <&pio 20 GPIO_ACTIVE_HIGH>;
};
led_power_white: led-power-white {
color = <LED_COLOR_ID_WHITE>;
function = LED_FUNCTION_STATUS;
gpios = <&pio 85 GPIO_ACTIVE_LOW>;
};
led_internet_orange: led-internet-orange {
color = <LED_COLOR_ID_ORANGE>;
function = "internet"; // LED_FUNCTION_INTERNET;
gpios = <&pio 5 GPIO_ACTIVE_HIGH>;
};
led_internet_white: led-internet-white {
color = <LED_COLOR_ID_WHITE>;
function = "internet"; // LED_FUNCTION_INTERNET;
gpios = <&pio 17 GPIO_ACTIVE_LOW>;
};
};
};
&switch {
ports {
port@0 {
reg = <0>;
label = "lan4";
};
port@1 {
reg = <1>;
label = "lan3";
};
port@2 {
reg = <2>;
label = "lan2";
};
port@3 {
reg = <3>;
label = "lan1";
};
};
};
&odm_partition {
macaddr_odm: macaddr@81 {
compatible = "mac-base";
reg = <0x81 0x6>;
#nvmem-cell-cells = <1>;
};
};

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target/linux/mediatek/dts/mt7981a-comfast-cf-e393ax.dts Normal file
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// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/dts-v1/;
#include "mt7981.dtsi"
/ {
model = "COMFAST CF-E393AX";
compatible = "comfast,cf-e393ax", "mediatek,mt7981";
aliases {
serial0 = &uart0;
led-boot = &led_red;
led-failsafe = &led_red;
led-running = &led_blue;
led-upgrade = &led_green;
};
chosen {
bootargs-override = "console=ttyS0,115200n8";
stdout-path = "serial0:115200n8";
};
memory {
reg = <0 0x40000000 0 0x10000000>; // 256mb
};
gpio-keys {
compatible = "gpio-keys";
reset {
label = "reset";
linux,code = <KEY_RESTART>;
gpios = <&pio 1 GPIO_ACTIVE_LOW>;
};
};
leds {
compatible = "gpio-leds";
led_blue: blue {
label = "blue:status";
gpios = <&pio 8 GPIO_ACTIVE_LOW>;
color = <LED_COLOR_ID_BLUE>;
function = LED_FUNCTION_STATUS;
};
led_red: red {
label = "red:status";
gpios = <&pio 34 GPIO_ACTIVE_LOW>;
color = <LED_COLOR_ID_RED>;
function = LED_FUNCTION_STATUS;
};
led_green: green {
label = "green:status";
gpios = <&pio 35 GPIO_ACTIVE_LOW>;
color = <LED_COLOR_ID_GREEN>;
function = LED_FUNCTION_STATUS;
};
};
};
&eth {
status = "okay";
gmac0: mac@0 {
/* LAN */
compatible = "mediatek,eth-mac";
reg = <0>;
phy-mode = "2500base-x";
nvmem-cells = <&macaddr_factory_e000 0>;
nvmem-cell-names = "mac-address";
fixed-link {
speed = <2500>;
full-duplex;
pause;
};
};
gmac1: mac@1 {
/* WAN */
compatible = "mediatek,eth-mac";
reg = <1>;
phy-mode = "gmii";
phy-handle = <&int_gbe_phy>;
nvmem-cells = <&macaddr_factory_e000 1>;
nvmem-cell-names = "mac-address";
};
};
&mdio_bus {
switch: switch@1f {
compatible = "mediatek,mt7531";
reg = <31>;
interrupt-controller;
#interrupt-cells = <1>;
interrupt-parent = <&pio>;
interrupts = <38 IRQ_TYPE_LEVEL_HIGH>;
reset-gpios = <&pio 5 GPIO_ACTIVE_HIGH>;
};
};
&crypto {
status = "okay";
};
&pio {
spi0_flash_pins: spi0-pins {
mux {
function = "spi";
groups = "spi0", "spi0_wp_hold";
};
conf-pu {
pins = "SPI0_CS", "SPI0_HOLD", "SPI0_WP";
drive-strength = <MTK_DRIVE_8mA>;
bias-pull-up = <MTK_PUPD_SET_R1R0_11>;
};
conf-pd {
pins = "SPI0_CLK", "SPI0_MOSI", "SPI0_MISO";
drive-strength = <MTK_DRIVE_8mA>;
bias-pull-down = <MTK_PUPD_SET_R1R0_11>;
};
};
};
&spi0 {
pinctrl-names = "default";
pinctrl-0 = <&spi0_flash_pins>;
cs-gpios = <0>, <0>;
#address-cells = <1>;
#size-cells = <0>;
status = "okay";
#address-cells = <1>;
#size-cells = <0>;
spi_nand: spi_nand@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "spi-nand";
reg = <1>;
spi-max-frequency = <52000000>;
spi-cal-enable;
spi-cal-mode = "read-data";
spi-cal-datalen = <7>;
spi-cal-data = /bits/ 8 <0x53 0x50 0x49 0x4E 0x41 0x4E 0x44>;
spi-cal-addrlen = <5>;
spi-cal-addr = /bits/ 32 <0x0 0x0 0x0 0x0 0x0>;
spi-tx-bus-width = <4>;
spi-rx-bus-width = <4>;
mediatek,nmbm;
mediatek,bmt-max-ratio = <1>;
mediatek,bmt-max-reserved-blocks = <64>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "BL2";
reg = <0x00000 0x0100000>;
read-only;
};
partition@100000 {
label = "u-boot-env";
reg = <0x0100000 0x0080000>;
read-only;
};
factory: partition@180000 {
label = "Factory";
reg = <0x180000 0x0200000>;
read-only;
nvmem-layout {
compatible = "fixed-layout";
#address-cells = <1>;
#size-cells = <1>;
eeprom_factory_0: eeprom@0 {
reg = <0x0 0x1000>;
};
macaddr_factory_e000: macaddr@e000 {
compatible = "mac-base";
reg = <0xe000 0x6>;
#nvmem-cell-cells = <1>;
};
};
};
partition@380000 {
label = "FIP";
reg = <0x380000 0x0200000>;
read-only;
};
partition@580000 {
label = "ubi";
reg = <0x580000 0x4000000>;
compatible = "linux,ubi";
};
};
};
};
&switch {
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
label = "lan1";
};
port@6 {
reg = <6>;
label = "cpu";
ethernet = <&gmac0>;
phy-mode = "2500base-x";
fixed-link {
speed = <2500>;
full-duplex;
pause;
};
};
};
};
&uart0 {
status = "okay";
};
&watchdog {
status = "okay";
};
&wifi {
status = "okay";
nvmem-cells = <&eeprom_factory_0>;
nvmem-cell-names = "eeprom";
};

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target/linux/mediatek/dts/mt7981b-yuncore-ax835.dts Normal file
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// SPDX-License-Identifier: (GPL-2.0 OR MIT)
/dts-v1/;
#include "mt7981.dtsi"
/ {
compatible = "yuncore,ax835", "mediatek,mt7981";
model = "YunCore AX835";
aliases {
ethernet0 = &gmac0;
led-boot = &led_system;
led-failsafe = &led_system;
led-running = &led_system;
led-upgrade = &led_system;
serial0 = &uart0;
};
chosen {
stdout-path = "serial0:115200n8";
};
gpio-keys {
compatible = "gpio-keys";
reset {
label = "reset";
linux,code = <KEY_RESTART>;
gpios = <&pio 1 GPIO_ACTIVE_LOW>;
};
};
reg_led_vbus {
compatible = "regulator-fixed";
regulator-name = "led_vbus";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
gpio = <&pio 5 GPIO_ACTIVE_HIGH>;
};
leds {
compatible = "gpio-leds";
led_system: led_system {
label = "red:system";
gpios = <&pio 4 GPIO_ACTIVE_LOW>;
};
led_wifi24 {
label = "green:wifi2";
gpios = <&pio 34 GPIO_ACTIVE_LOW>;
linux,default-trigger = "phy0tpt";
};
led_wifi5 {
label = "blue:wifi5";
gpios = <&pio 35 GPIO_ACTIVE_LOW>;
linux,default-trigger = "phy1tpt";
};
led_hwwatchdog {
// a gpio-wdt watchdog couldn't be made to work.
// the device rebooted after 5 minutes.
label = "hwwatchdog";
gpios = <&pio 7 GPIO_ACTIVE_LOW>;
linux,default-trigger = "timer";
led-pattern = <1000>, <1000>;
};
// there's another "syswatchdog" on gpio2
};
};
&eth {
pinctrl-names = "default";
pinctrl-0 = <&mdio_pins>;
status = "okay";
gmac0: mac@0 {
compatible = "mediatek,eth-mac";
reg = <0>;
phy-mode = "2500base-x";
fixed-link {
speed = <2500>;
full-duplex;
pause;
};
};
};
&mdio_bus {
switch: switch@1f {
compatible = "mediatek,mt7531";
reg = <31>;
reset-gpios = <&pio 39 GPIO_ACTIVE_HIGH>;
};
};
&pio {
spi0_flash_pins: spi0-pins {
mux {
function = "spi";
groups = "spi0", "spi0_wp_hold";
};
};
spi2_flash_pins: spi2-pins {
mux {
function = "spi";
groups = "spi2", "spi2_wp_hold";
};
conf-pu {
pins = "SPI2_CS", "SPI2_HOLD", "SPI2_WP";
drive-strength = <8>;
bias-pull-up = <103>;
};
conf-pd {
pins = "SPI2_CLK", "SPI2_MOSI", "SPI2_MISO";
drive-strength = <8>;
bias-pull-down = <103>;
};
};
};
&spi0 {
pinctrl-names = "default";
pinctrl-0 = <&spi0_flash_pins>;
status = "disabled";
};
&spi2 {
pinctrl-names = "default";
pinctrl-0 = <&spi2_flash_pins>;
status = "okay";
flash@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <52000000>;
spi-tx-buswidth = <4>;
spi-rx-buswidth = <4>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@00000 {
label = "BL2";
reg = <0x00000 0x40000>;
read-only;
};
partition@40000 {
label = "u-boot-env";
reg = <0x40000 0x10000>;
read-only;
};
factory: partition@50000 {
label = "Factory";
reg = <0x50000 0x10000>;
read-only;
compatible = "nvmem-cells";
#address-cells = <1>;
#size-cells = <1>;
eeprom_factory: eeprom@0 {
reg = <0x0 0x1000>;
};
macaddr_factory_4: macaddr@4 {
reg = <0x4 0x6>;
};
macaddr_factory_24: macaddr@24 {
reg = <0x24 0x6>;
};
macaddr_factory_2a: macaddr@2a {
reg = <0x2a 0x6>;
};
};
partition@100000 {
label = "FIP";
reg = <0x100000 0x80000>;
read-only;
};
partition@180000 {
compatible = "denx,fit";
label = "firmware";
reg = <0x180000 0xe00000>;
};
};
};
};
&switch {
ports {
#address-cells = <1>;
#size-cells = <0>;
lan: port@3 {
reg = <3>;
label = "lan";
nvmem-cell-names = "mac-address";
nvmem-cells = <&macaddr_factory_2a 0>;
};
port@4 {
reg = <4>;
label = "wan";
nvmem-cell-names = "mac-address";
nvmem-cells = <&macaddr_factory_2a 0>;
};
port@6 {
reg = <6>;
label = "cpu";
ethernet = <&gmac0>;
phy-mode = "2500base-x";
fixed-link {
speed = <2500>;
full-duplex;
pause;
};
};
};
};
&uart0 {
status = "okay";
};
&watchdog {
status = "okay";
};
&wifi {
status = "okay";
nvmem-cells = <&eeprom_factory 0>;
nvmem-cell-names = "eeprom";
};

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target/linux/mediatek/dts/mt7986a-smartrg-SDG-8612.dts Normal file
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// SPDX-License-Identifier: (GPL-2.0 OR MIT)
/*
* Copyright (C) 2022 SmartRG Inc.
* Author: Chad Monroe <chad.monroe@smartrg.com>
*/
#include "mt7986a-smartrg-bonanza-peak.dtsi"
/ {
model = "SmartRG SDG-8612";
compatible = "smartrg,sdg-8612", "mediatek,mt7986a";
};
&gmac0 {
fixed-link {
speed = <2500>;
full-duplex;
pause;
};
};
&gmac1 {
phy-handle = <&phy6>;
};
&mdio {
switch: switch@1f {
compatible = "mediatek,mt7531";
reg = <31>;
reset-gpios = <&pio 5 GPIO_ACTIVE_HIGH>;
ports {
#address-cells = <1>;
#size-cells = <0>;
port@1 {
reg = <1>;
label = "lan3";
};
port@2 {
reg = <2>;
label = "lan2";
};
port@3 {
reg = <3>;
label = "lan1";
};
port5: port@5 {
reg = <5>;
label = "lan4";
phy-mode = "2500base-x";
phy-handle = <&phy5>;
};
port@6 {
reg = <6>;
ethernet = <&gmac0>;
phy-mode = "2500base-x";
fixed-link {
speed = <2500>;
full-duplex;
pause;
};
};
};
};
};
&wifi {
ieee80211-freq-limit = <2400000 2500000>, <5170000 5835000>;
};

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target/linux/mediatek/dts/mt7986a-smartrg-SDG-8614.dts Normal file
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// SPDX-License-Identifier: (GPL-2.0 OR MIT)
/*
* Copyright (C) 2022 SmartRG Inc.
* Author: Chad Monroe <chad.monroe@smartrg.com>
*/
#include "mt7986a-smartrg-bonanza-peak.dtsi"
/ {
model = "SmartRG SDG-8614";
compatible = "smartrg,sdg-8614", "mediatek,mt7986a";
/* SFP1 cage (WAN) */
i2c_sfp1: i2c-gpio-0 {
compatible = "i2c-gpio";
sda-gpios = <&pio 62 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
scl-gpios = <&pio 63 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
i2c-gpio,delay-us = <2>;
#address-cells = <1>;
#size-cells = <0>;
};
sfp1: sfp1 {
compatible = "sff,sfp";
i2c-bus = <&i2c_sfp1>;
los-gpios = <&pio 20 GPIO_ACTIVE_HIGH>;
mod-def0-gpios = <&pio 65 GPIO_ACTIVE_LOW>;
rate-select0-gpios = <&pio 9 GPIO_ACTIVE_HIGH>;
rate-select1-gpios = <&pio 28 GPIO_ACTIVE_HIGH>;
tx-disable-gpios = <&pio 64 GPIO_ACTIVE_HIGH>;
tx-fault-gpios = <&pio 7 GPIO_ACTIVE_HIGH>;
maximum-power-milliwatt = <3000>;
};
leds {
compatible = "gpio-leds";
sfp_red {
color = <LED_COLOR_ID_RED>;
function = "sfp";
function-enumerator = <1>;
gpios = <&pio 16 GPIO_ACTIVE_HIGH>;
default-state = "off";
};
sfp_green {
color = <LED_COLOR_ID_GREEN>;
function = "sfp";
function-enumerator = <0>;
gpios = <&pio 19 GPIO_ACTIVE_HIGH>;
default-state = "off";
};
};
};
&mux_sel {
output-low;
/delete-node/ output-high;
};
&gmac0 {
fixed-link {
speed = <2500>;
full-duplex;
pause;
};
};
&gmac1 {
sfp = <&sfp1>;
managed = "in-band-status";
};
&mdio {
switch: switch@1f {
compatible = "mediatek,mt7531";
reg = <31>;
reset-gpios = <&pio 5 GPIO_ACTIVE_HIGH>;
ports {
#address-cells = <1>;
#size-cells = <0>;
port@1 {
reg = <1>;
label = "lan3";
};
port@2 {
reg = <2>;
label = "lan2";
};
port@3 {
reg = <3>;
label = "lan1";
};
port5: port@5 {
reg = <5>;
label = "lan4";
phy-mode = "2500base-x";
phy-handle = <&phy5>;
};
port@6 {
reg = <6>;
ethernet = <&gmac0>;
phy-mode = "2500base-x";
fixed-link {
speed = <2500>;
full-duplex;
pause;
};
};
};
};
};
&wifi {
ieee80211-freq-limit = <2400000 2500000>, <5170000 5835000>;
};

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target/linux/mediatek/dts/mt7986a-smartrg-SDG-8622.dts Normal file
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// SPDX-License-Identifier: (GPL-2.0 OR MIT)
/*
* Copyright (C) 2022 SmartRG Inc.
* Author: Chad Monroe <chad.monroe@smartrg.com>
*/
#include "mt7986a-smartrg-bonanza-peak.dtsi"
/ {
model = "SmartRG SDG-8622";
compatible = "smartrg,sdg-8622", "mediatek,mt7986a";
};
&gmac0 {
phy-handle = <&phy5>;
label = "lan";
};
&gmac1 {
phy-handle = <&phy6>;
};
&pcie {
status = "okay";
};
&pcie_phy {
status = "okay";
};
&radio0 {
ieee80211-freq-limit = <5170000 5330000>;
};
&wifi {
ieee80211-freq-limit = <2400000 2500000>, <5490000 5835000>;
};

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target/linux/mediatek/dts/mt7986a-smartrg-SDG-8632.dts Normal file
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// SPDX-License-Identifier: (GPL-2.0 OR MIT)
/*
* Copyright (C) 2022 SmartRG Inc.
* Author: Chad Monroe <chad.monroe@smartrg.com>
*/
#include "mt7986a-smartrg-bonanza-peak.dtsi"
/ {
model = "SmartRG SDG-8632";
compatible = "smartrg,sdg-8632", "mediatek,mt7986a";
};
&gmac0 {
phy-handle = <&phy5>;
label = "lan";
};
&gmac1 {
phy-handle = <&phy6>;
};
&pcie {
status = "okay";
};
&pcie_phy {
status = "okay";
};
&radio0 {
ieee80211-freq-limit = <5170000 5835000>;
};
&wifi {
ieee80211-freq-limit = <2400000 2500000>, <5945000 7125000>;
};

481
target/linux/mediatek/dts/mt7986a-smartrg-bonanza-peak.dtsi Normal file
View File

@ -0,0 +1,481 @@
// SPDX-License-Identifier: (GPL-2.0 OR MIT)
/*
* Copyright (C) 2022 SmartRG Inc.
* Author: Chad Monroe <chad.monroe@smartrg.com>
*/
/dts-v1/;
#include <dt-bindings/input/input.h>
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/leds/common.h>
#include "mt7986a.dtsi"
/ {
aliases {
serial0 = &uart0;
ethernet0 = &gmac0;
ethernet1 = &gmac1;
led-boot = &led_status_green;
led-failsafe = &led_status_red;
led-running = &led_status_white;
led-upgrade = &led_status_blue;
};
chosen {
stdout-path = "serial0:115200n8";
bootargs = "root=/dev/mmcblk0p5";
};
memory@40000000 {
device_type = "memory";
reg = <0 0x40000000 0 0x40000000>;
};
reserved-memory {
#address-cells = <2>;
#size-cells = <2>;
ranges;
/delete-node/ramoops@42ff0000;
bootdata_reserved: bootdata@45000000 {
no-map;
reg = <0x0 0x45000000 0x0 0x00001000>;
};
ramoops_reserved: ramoops@45001000 {
no-map;
compatible = "ramoops";
reg = <0x0 0x45001000 0x0 0x00140000>;
ftrace-size = <0x20000>;
record-size = <0x20000>;
console-size = <0x20000>;
pmsg-size = <0x80000>;
};
};
bootdata {
compatible = "bootdata";
memory-region = <&bootdata_reserved>;
};
reg_1p8v: regulator-1p8v {
compatible = "regulator-fixed";
regulator-name = "fixed-1.8V";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-boot-on;
regulator-always-on;
};
reg_3p3v: regulator-3p3v {
compatible = "regulator-fixed";
regulator-name = "fixed-3.3V";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-boot-on;
regulator-always-on;
};
reg_5v: regulator-5v {
compatible = "regulator-fixed";
regulator-name = "fixed-5V";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
regulator-boot-on;
regulator-always-on;
};
fan: pwm-fan {
compatible = "pwm-fan";
#cooling-cells = <2>;
pwms = <&pwm 1 40000 0>;
/**
* set fan speed
*
* 0 = off
* 51 = 20% duty cycle (minimum supported)
* 61 = 24% duty cycle (2020 RPM)
* 77 = 30% duty cycle (3000 RPM)
* 102 = 40% duty cycle (3600 RPM)
* 255 = 100% duty cycle
*/
cooling-levels = <51 61 77 102>;
interrupt-parent = <&pio>;
interrupts = <25 IRQ_TYPE_EDGE_FALLING>;
pulses-per-revolution = <2>;
status = "okay";
};
keys {
compatible = "gpio-keys";
pinctrl-names = "default";
pinctrl-0 = <&button_pins>;
button-reset {
label = "reset";
linux,code = <KEY_RESTART>;
gpios = <&pio 17 GPIO_ACTIVE_LOW>;
};
};
};
&cpu_thermal {
cooling-maps {
cpu-active-high {
/* active: set fan to cooling level 3 */
cooling-device = <&fan 3 3>;
trip = <&cpu_trip_active_high>;
};
cpu-active-medium {
/* active: set fan to cooling level 2 */
cooling-device = <&fan 2 2>;
trip = <&cpu_trip_active_medium>;
};
cpu-active-low {
/* active: set fan to cooling level 1 */
cooling-device = <&fan 1 1>;
trip = <&cpu_trip_active_low>;
};
cpu-active-silent {
/* active: set fan to cooling level 0 */
cooling-device = <&fan 0 0>;
trip = <&cpu_trip_active_silent>;
};
};
trips {
cpu_trip_active_high: active-high {
temperature = <110000>;
hysteresis = <2000>;
type = "active";
};
cpu_trip_active_medium: active-medium {
temperature = <80000>;
hysteresis = <2000>;
type = "active";
};
cpu_trip_active_low: active-low {
temperature = <60000>;
hysteresis = <2000>;
type = "active";
};
cpu_trip_active_silent: active-silent {
temperature = <40000>;
hysteresis = <2000>;
type = "active";
};
};
};
&crypto {
status = "okay";
};
&eth {
status = "okay";
gmac0: mac@0 {
compatible = "mediatek,eth-mac";
reg = <0>;
phy-mode = "2500base-x";
};
gmac1: mac@1 {
label = "wan";
compatible = "mediatek,eth-mac";
reg = <1>;
phy-mode = "2500base-x";
};
mdio: mdio-bus {
#address-cells = <1>;
#size-cells = <0>;
};
};
&mdio {
#address-cells = <1>;
#size-cells = <0>;
reset-gpios = <&pio 6 GPIO_ACTIVE_LOW>;
reset-delay-us = <1500000>;
reset-post-delay-us = <1000000>;
phy5: ethernet-phy@5 {
/* GPY211 */
compatible = "maxlinear,gpy211", "ethernet-phy-ieee802.3-c45";
reg = <5>;
mxl,led-drive-vdd;
mxl,led-config = <0x30 0x40 0x80 0x0>;
};
phy6: ethernet-phy@6 {
/* GPY211 */
compatible = "maxlinear,gpy211", "ethernet-phy-ieee802.3-c45";
reg = <6>;
mxl,led-drive-vdd;
mxl,led-config = <0x30 0x40 0x80 0x0>;
};
};
&crypto {
status = "okay";
};
&mmc0 {
pinctrl-names = "default", "state_uhs";
pinctrl-0 = <&mmc0_pins_default>;
pinctrl-1 = <&mmc0_pins_uhs>;
bus-width = <8>;
max-frequency = <200000000>;
cap-mmc-highspeed;
mmc-hs200-1_8v;
mmc-hs400-1_8v;
hs400-ds-delay = <0x14014>;
vmmc-supply = <&reg_3p3v>;
vqmmc-supply = <&reg_1p8v>;
non-removable;
no-sd;
no-sdio;
status = "okay";
};
&pcie {
pinctrl-names = "default";
pinctrl-0 = <&pcie_pins>;
status = "disabled";
slot0: pcie@0,0 {
reg = <0x0000 0 0 0 0>;
radio0: mt7915@0,0 {
reg = <0x0000 0 0 0 0>;
};
};
};
&pcie_phy {
status = "disabled";
};
&wifi {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&wf_2g_5g_pins>;
};
&pio {
mmc0_pins_default: mmc0-pins {
mux {
function = "emmc";
groups = "emmc_51";
};
conf-cmd-dat {
pins = "EMMC_DATA_0", "EMMC_DATA_1", "EMMC_DATA_2",
"EMMC_DATA_3", "EMMC_DATA_4", "EMMC_DATA_5",
"EMMC_DATA_6", "EMMC_DATA_7", "EMMC_CMD";
input-enable;
drive-strength = <4>;
mediatek,pull-up-adv = <1>; /* pull-up 10K */
};
conf-clk {
pins = "EMMC_CK";
drive-strength = <6>;
mediatek,pull-down-adv = <2>; /* pull-down 50K */
};
conf-ds {
pins = "EMMC_DSL";
mediatek,pull-down-adv = <2>; /* pull-down 50K */
};
conf-rst {
pins = "EMMC_RSTB";
drive-strength = <4>;
mediatek,pull-up-adv = <1>; /* pull-up 10K */
};
};
mmc0_pins_uhs: mmc0-uhs-pins {
mux {
function = "emmc";
groups = "emmc_51";
};
conf-cmd-dat {
pins = "EMMC_DATA_0", "EMMC_DATA_1", "EMMC_DATA_2",
"EMMC_DATA_3", "EMMC_DATA_4", "EMMC_DATA_5",
"EMMC_DATA_6", "EMMC_DATA_7", "EMMC_CMD";
input-enable;
drive-strength = <4>;
mediatek,pull-up-adv = <1>; /* pull-up 10K */
};
conf-clk {
pins = "EMMC_CK";
drive-strength = <6>;
mediatek,pull-down-adv = <2>; /* pull-down 50K */
};
conf-ds {
pins = "EMMC_DSL";
mediatek,pull-down-adv = <2>; /* pull-down 50K */
};
conf-rst {
pins = "EMMC_RSTB";
drive-strength = <4>;
mediatek,pull-up-adv = <1>; /* pull-up 10K */
};
};
pcie_pins: pcie-pins {
mux {
function = "pcie";
groups = "pcie_clk", "pcie_pereset";
};
};
button_pins: button-pins {
pins = "GPIO_12";
mediatek,pull-down-adv = <0>; /* bias-disable */
};
uart1_pins: uart1-pins {
mux {
function = "uart";
groups = "uart1_2_rx_tx", "uart1_2_cts_rts";
};
};
i2c0_pins: i2c0-pins {
mux {
function = "i2c";
groups = "i2c";
};
};
pwm_pins: pwm-pins {
mux {
function = "pwm";
groups = "pwm0", "pwm1_0";
};
};
wf_2g_5g_pins: wf-2g-5g-pins {
mux {
function = "wifi";
groups = "wf_2g", "wf_5g";
};
conf {
pins = "WF0_HB1", "WF0_HB2", "WF0_HB3", "WF0_HB4",
"WF0_HB0", "WF0_HB0_B", "WF0_HB5", "WF0_HB6",
"WF0_HB7", "WF0_HB8", "WF0_HB9", "WF0_HB10",
"WF0_TOP_CLK", "WF0_TOP_DATA", "WF1_HB1",
"WF1_HB2", "WF1_HB3", "WF1_HB4", "WF1_HB0",
"WF1_HB5", "WF1_HB6", "WF1_HB7", "WF1_HB8",
"WF1_TOP_CLK", "WF1_TOP_DATA";
drive-strength = <4>;
};
};
mux_sel: mux-sel-hog {
gpio-hog;
gpios = <23 GPIO_ACTIVE_LOW>;
line-name = "mux-sel";
output-high;
};
mux_oe: mux-oe-hog {
gpio-hog;
gpios = <24 GPIO_ACTIVE_LOW>;
line-name = "mux-oe";
output-high;
};
};
&ssusb {
vusb33-supply = <&reg_3p3v>;
vbus-supply = <&reg_5v>;
status = "okay";
};
&trng {
status = "okay";
};
&uart0 {
status = "okay";
};
&uart1 {
pinctrl-names = "default";
pinctrl-0 = <&uart1_pins>;
status = "okay";
/* DA14531MOD Bluetooth */
bluetooth {
compatible = "renesas,DA14531";
reset-gpios = <&pio 27 GPIO_ACTIVE_LOW>;
};
};
&usb_phy {
status = "okay";
};
&i2c0 {
pinctrl-names = "default";
pinctrl-0 = <&i2c0_pins>;
status = "okay";
system-leds {
compatible = "srg,sysled";
reg = <0x30>;
led_status_red: led@1 {
color = <LED_COLOR_ID_RED>;
function = LED_FUNCTION_STATUS;
reg = <1>;
};
led_status_green: led@2 {
color = <LED_COLOR_ID_GREEN>;
function = LED_FUNCTION_STATUS;
reg = <2>;
};
led_status_blue: led@3 {
color = <LED_COLOR_ID_BLUE>;
function = LED_FUNCTION_STATUS;
reg = <3>;
};
led_status_white: led@4 {
color = <LED_COLOR_ID_WHITE>;
function = LED_FUNCTION_STATUS;
reg = <4>;
};
};
};
&pwm {
pinctrl-names = "default";
pinctrl-0 = <&pwm_pins>;
status = "okay";
};
&watchdog {
interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
status = "okay";
};

19
target/linux/mediatek/filogic/base-files/etc/board.d/02_network
View File

@ -60,6 +60,9 @@ mediatek_setup_interfaces()
bananapi,bpi-r3-mini)
ucidef_set_interfaces_lan_wan "eth0" "eth1"
;;
comfast,cf-e393ax)
ucidef_set_interfaces_lan_wan "lan1" eth1
;;
cudy,tr3000-v1|\
glinet,gl-mt2500|\
glinet,gl-mt3000)
@ -89,6 +92,11 @@ mediatek_setup_interfaces()
zyxel,nwa50ax-pro)
ucidef_set_interface_lan "eth0"
;;
smartrg,sdg-8622|\
smartrg,sdg-8632|\
yuncore,ax835)
ucidef_set_interfaces_lan_wan lan wan
;;
tplink,tl-xdr6086)
ucidef_set_interfaces_lan_wan "lan1 lan2" eth1
;;
@ -188,6 +196,14 @@ mediatek_setup_macs()
wan_mac=$(macaddr_add "$lan_mac" 1)
label_mac=$wan_mac
;;
smartrg,sdg-8612|\
smartrg,sdg-8614|\
smartrg,sdg-8622|\
smartrg,sdg-8632)
label_mac=$(mmc_get_mac_ascii mfginfo MFG_MAC)
wan_mac=$label_mac
lan_mac=$(macaddr_add "$label_mac" 1)
;;
xiaomi,mi-router-ax3000t|\
xiaomi,mi-router-ax3000t-ubootmod|\
xiaomi,mi-router-wr30u-112m-nmbm|\
@ -199,6 +215,9 @@ mediatek_setup_macs()
wan_mac=$(mtd_get_mac_ascii Bdata ethaddr_wan)
label_mac=$wan_mac
;;
yuncore,ax835)
label_mac=$(mtd_get_mac_binary "Factory" 0x4)
;;
esac
[ -n "$lan_mac" ] && ucidef_set_interface_macaddr "lan" $lan_mac

18
target/linux/mediatek/filogic/base-files/etc/hotplug.d/firmware/11-mt76-caldata
View File

@ -7,10 +7,18 @@
board=$(board_name)
case "$FIRMWARE" in
"mediatek/mt7915_eeprom.bin")
case "$board" in
smartrg,sdg-8622)
caldata_extract_mmc "factory" 0xa0000 0x1000
;;
esac
;;
"mediatek/mt7916_eeprom.bin")
case "$board" in
acer,predator-w6)
caldata_extract_mmc "factory" 0xA0000 0x1000
acer,predator-w6|\
smartrg,sdg-8632)
caldata_extract_mmc "factory" 0xa0000 0x1000
;;
esac
;;
@ -35,6 +43,12 @@ case "$FIRMWARE" in
ln -sf /tmp/tp_data/MT7986_EEPROM.bin \
/lib/firmware/$FIRMWARE
;;
smartrg,sdg-8612|\
smartrg,sdg-8614|\
smartrg,sdg-8622|\
smartrg,sdg-8632)
caldata_extract_mmc "factory" 0x0 0x1000
;;
esac
;;
"mediatek/mt7986_eeprom_mt7976.bin")

13
target/linux/mediatek/filogic/base-files/etc/hotplug.d/ieee80211/11_fix_wifi_mac
View File

@ -81,6 +81,10 @@ case "$board" in
jdcloud,re-cp-03)
[ "$PHYNBR" = "1" ] && mmc_get_mac_binary factory 0xa > /sys${DEVPATH}/macaddress
;;
comfast,cf-e393ax)
addr=$(mtd_get_mac_binary "Factory" 0x8000)
[ "$PHYNBR" = "1" ] && macaddr_add $addr 1 > /sys${DEVPATH}/macaddress
;;
cudy,re3000-v1|\
cudy,tr3000-v1)
addr=$(mtd_get_mac_binary bdinfo 0xde00)
@ -144,6 +148,15 @@ case "$board" in
[ "$PHYNBR" = "0" ] && macaddr_add $addr 2 > /sys${DEVPATH}/macaddress
[ "$PHYNBR" = "1" ] && macaddr_add $addr 3 > /sys${DEVPATH}/macaddress
;;
smartrg,sdg-8612|\
smartrg,sdg-8614|\
smartrg,sdg-8622|\
smartrg,sdg-8632)
addr=$(mmc_get_mac_ascii mfginfo MFG_MAC)
[ "$PHYNBR" = "0" ] && macaddr_add $addr 2 > /sys${DEVPATH}/macaddress
[ "$PHYNBR" = "1" ] && macaddr_add $addr 3 > /sys${DEVPATH}/macaddress
[ "$PHYNBR" = "2" ] && macaddr_add $addr 4 > /sys${DEVPATH}/macaddress
;;
tplink,tl-xdr4288|\
tplink,tl-xdr6086|\
tplink,tl-xdr6088)

17
target/linux/mediatek/filogic/base-files/lib/preinit/10_fix_eth_mac.sh
View File

@ -21,6 +21,23 @@ preinit_set_mac_address() {
addr=$(get_mac_binary "/tmp/tp_data/default-mac" 0)
ip link set dev eth1 address "$(macaddr_add $addr 1)"
;;
smartrg,sdg-8612|\
smartrg,sdg-8614)
addr=$(mmc_get_mac_ascii mfginfo MFG_MAC)
lan_addr=$(macaddr_add $addr 1)
ip link set dev wan address "$addr"
ip link set dev eth0 address "$lan_addr"
ip link set dev lan1 address "$lan_addr"
ip link set dev lan2 address "$lan_addr"
ip link set dev lan3 address "$lan_addr"
ip link set dev lan4 address "$lan_addr"
;;
smartrg,sdg-8622|\
smartrg,sdg-8632)
addr=$(mmc_get_mac_ascii mfginfo MFG_MAC)
ip link set dev wan address "$addr"
ip link set dev lan address "$(macaddr_add $addr 1)"
;;
*)
;;
esac

9
target/linux/mediatek/filogic/base-files/lib/upgrade/platform.sh
View File

@ -80,7 +80,11 @@ platform_do_upgrade() {
CI_KERNPART="fit"
nand_do_upgrade "$1"
;;
acer,predator-w6)
acer,predator-w6|\
smartrg,sdg-8612|\
smartrg,sdg-8614|\
smartrg,sdg-8622|\
smartrg,sdg-8632)
CI_KERNPART="kernel"
CI_ROOTPART="rootfs"
emmc_do_upgrade "$1"
@ -132,8 +136,9 @@ platform_do_upgrade() {
CI_ROOTPART="rootfs"
emmc_do_upgrade "$1"
;;
cudy,re3000-v1|\
cudy,wr3000-v1|\
cudy,re3000-v1)
yuncore,ax835)
default_do_upgrade "$1"
;;
jdcloud,re-cp-03)

79
target/linux/mediatek/image/filogic.mk
View File

@ -183,6 +183,43 @@ define Device/acer_predator-w6
endef
TARGET_DEVICES += acer_predator-w6
define Device/adtran_smartrg
DEVICE_VENDOR := Adtran
DEVICE_DTS_DIR := ../dts
DEVICE_PACKAGES := e2fsprogs f2fsck mkf2fs kmod-hwmon-pwmfan \
kmod-mt7986-firmware mt7986-wo-firmware
IMAGE/sysupgrade.bin := sysupgrade-tar | append-metadata
endef
define Device/smartrg_sdg-8612
$(call Device/adtran_smartrg)
DEVICE_MODEL := SDG-8612
DEVICE_DTS := mt7986a-smartrg-SDG-8612
endef
TARGET_DEVICES += smartrg_sdg-8612
define Device/smartrg_sdg-8614
$(call Device/adtran_smartrg)
DEVICE_MODEL := SDG-8614
DEVICE_DTS := mt7986a-smartrg-SDG-8614
endef
TARGET_DEVICES += smartrg_sdg-8614
define Device/smartrg_sdg-8622
$(call Device/adtran_smartrg)
DEVICE_MODEL := SDG-8622
DEVICE_DTS := mt7986a-smartrg-SDG-8622
DEVICE_PACKAGES += kmod-mt7915-firmware
endef
TARGET_DEVICES += smartrg_sdg-8622
define Device/smartrg_sdg-8632
$(call Device/adtran_smartrg)
DEVICE_MODEL := SDG-8632
DEVICE_DTS := mt7986a-smartrg-SDG-8632
DEVICE_PACKAGES += kmod-mt7915-firmware
endef
TARGET_DEVICES += smartrg_sdg-8632
define Device/asus_rt-ax59u
DEVICE_VENDOR := ASUS
@ -446,6 +483,30 @@ define Device/cmcc_rax3000m-nand-ubootmod
endef
TARGET_DEVICES += cmcc_rax3000m-nand-ubootmod
define Device/comfast_cf-e393ax
DEVICE_VENDOR := Comfast
DEVICE_MODEL := CF-E393AX
DEVICE_DTS := mt7981a-comfast-cf-e393ax
DEVICE_DTS_DIR := ../dts
DEVICE_DTC_FLAGS := --pad 4096
DEVICE_DTS_LOADADDR := 0x43f00000
DEVICE_PACKAGES := kmod-mt7981-firmware mt7981-wo-firmware
KERNEL_LOADADDR := 0x44000000
KERNEL = kernel-bin | lzma | \
fit lzma $$(KDIR)/image-$$(firstword $$(DEVICE_DTS)).dtb
KERNEL_INITRAMFS = kernel-bin | lzma | \
fit lzma $$(KDIR)/image-$$(firstword $$(DEVICE_DTS)).dtb with-initrd
UBINIZE_OPTS := -E 5
BLOCKSIZE := 128k
PAGESIZE := 2048
IMAGE_SIZE := 65536k
KERNEL_IN_UBI := 1
IMAGES := sysupgrade.bin factory.bin
IMAGE/factory.bin := append-ubi | check-size $$$$(IMAGE_SIZE)
IMAGE/sysupgrade.bin := sysupgrade-tar | append-metadata
endef
TARGET_DEVICES += comfast_cf-e393ax
define Device/confiabits_mt7981
DEVICE_VENDOR := Confiabits
DEVICE_MODEL := MT7981
@ -1319,6 +1380,24 @@ endif
endef
TARGET_DEVICES += xiaomi_redmi-router-ax6000-ubootmod
define Device/yuncore_ax835
DEVICE_VENDOR := YunCore
DEVICE_MODEL := AX835
DEVICE_DTS := mt7981b-yuncore-ax835
DEVICE_DTS_DIR := ../dts
DEVICE_DTS_LOADADDR := 0x47000000
IMAGES := sysupgrade.bin
IMAGE_SIZE := 14336k
SUPPORTED_DEVICES += mediatek,mt7981-spim-nor-rfb
KERNEL := kernel-bin | lzma | \
fit lzma $$(KDIR)/image-$$(firstword $$(DEVICE_DTS)).dtb
KERNEL_INITRAMFS := kernel-bin | lzma | \
fit lzma $$(KDIR)/image-$$(firstword $$(DEVICE_DTS)).dtb with-initrd | pad-to 64k
IMAGE/sysupgrade.bin := append-kernel | pad-to 128k | append-rootfs | pad-rootfs | check-size | append-metadata
DEVICE_PACKAGES := kmod-mt7981-firmware mt7981-wo-firmware
endef
TARGET_DEVICES += yuncore_ax835
define Device/zbtlink_zbt-z8102ax
DEVICE_VENDOR := Zbtlink
DEVICE_MODEL := ZBT-Z8102AX

40
target/linux/mediatek/image/mt7622.mk
View File

@ -35,9 +35,15 @@ define Build/bl31-uboot
cat $(STAGING_DIR_IMAGE)/mt7622_$1-u-boot.fip >> $@
endef
# Append header to a D-Link M32 Kernel 1 partition
define Build/m32-recovery-header-kernel1
echo -en "DLK6E6010001\x00\x00\xCF\x33" > "$@.header"
# Append header to a D-Link M32/R32 Kernel 1 partition
define Build/m32-r32-recovery-header-kernel1
$(eval header_start=$(word 1,$(1)))
# create $@.header without the checksum
echo -en "$(header_start)\x00\x00" > "$@.header"
# Calculate checksum over data area ($@) and append it to the header.
# The checksum is the 2byte-sum over the whole data area.
# Every overflow during the checksum calculation must increment the current checksum value by 1.
od -v -w2 -tu2 -An --endian little "$@" | awk '{ s+=$$1; } END { s%=65535; printf "%c%c",s%256,s/256; }' >> "$@.header"
echo -en "\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x01\x00\x8D\x57\x30\x0B" >> "$@.header"
# Byte 0-3: Erase Start 0x002C0000
# Byte 4-7: Erase Length 0x02D00000
@ -46,9 +52,11 @@ define Build/m32-recovery-header-kernel1
echo -en "\x00\x00\x2C\x00\x00\x00\xD0\x02\x00\x00\x2C\x00\x00\x00\xD0\x02" >> "$@.header"
# Only zeros
echo -en "\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00" >> "$@.header"
# Note: The last 2 bytes of the following line are the checksum of the header
# If any data in the header will be changed, the checksum must be re-calculated
echo -en "\x42\x48\x02\x00\x00\x00\x08\x00\x00\x00\x00\x00\x60\x6E\x68\x61" >> "$@.header"
# Last 16 bytes, but without checksum
echo -en "\x42\x48\x02\x00\x00\x00\x08\x00\x00\x00\x00\x00\x60\x6E" >> "$@.header"
# Calculate and append checksum: The checksum must be set so that the 2byte-sum of the whole header is 0.
# Every overflow during the checksum calculation must increment the current checksum value by 1.
od -v -w2 -tu2 -An --endian little "$@.header" | awk '{s+=65535-$$1;}END{s%=65535;printf "%c%c",s%256,s/256;}' >> "$@.header"
cat "$@.header" "$@" > "$@.new"
mv "$@.new" "$@"
rm "$@.header"
@ -178,12 +186,10 @@ define Device/buffalo_wsr-3200ax4s
endef
TARGET_DEVICES += buffalo_wsr-3200ax4s
define Device/dlink_eagle-pro-ai-m32-a1
define Device/dlink_eagle-pro-ai-ax3200-a1
IMAGE_SIZE := 46080k
DEVICE_VENDOR := D-Link
DEVICE_MODEL := EAGLE PRO AI M32
DEVICE_VARIANT := A1
DEVICE_DTS := mt7622-dlink-eagle-pro-ai-m32-a1
DEVICE_DTS_DIR := ../dts
DEVICE_PACKAGES := kmod-mt7915-firmware
KERNEL_SIZE := 8192k
@ -193,10 +199,24 @@ define Device/dlink_eagle-pro-ai-m32-a1
IMAGES += tftp.bin recovery.bin
IMAGE/sysupgrade.bin := sysupgrade-tar | append-metadata
IMAGE/tftp.bin := append-kernel | pad-to $$(KERNEL_SIZE) | append-ubi | check-size
IMAGE/recovery.bin := append-kernel | pad-to $$(KERNEL_SIZE) | append-ubi | pad-to $$(IMAGE_SIZE) | m32-recovery-header-kernel1
endef
define Device/dlink_eagle-pro-ai-m32-a1
$(Device/dlink_eagle-pro-ai-ax3200-a1)
DEVICE_MODEL := EAGLE PRO AI M32
DEVICE_DTS := mt7622-dlink-eagle-pro-ai-m32-a1
IMAGE/recovery.bin := append-kernel | pad-to $$(KERNEL_SIZE) | append-ubi | pad-to $$(IMAGE_SIZE) | m32-r32-recovery-header-kernel1 DLK6E6010001
endef
TARGET_DEVICES += dlink_eagle-pro-ai-m32-a1
define Device/dlink_eagle-pro-ai-r32-a1
$(Device/dlink_eagle-pro-ai-ax3200-a1)
DEVICE_MODEL := EAGLE PRO AI R32
DEVICE_DTS := mt7622-dlink-eagle-pro-ai-r32-a1
IMAGE/recovery.bin := append-kernel | pad-to $$(KERNEL_SIZE) | append-ubi | pad-to $$(IMAGE_SIZE) | m32-r32-recovery-header-kernel1 DLK6E6015001
endef
TARGET_DEVICES += dlink_eagle-pro-ai-r32-a1
define Device/elecom_wrc-2533gent
DEVICE_VENDOR := Elecom
DEVICE_MODEL := WRC-2533GENT

5
target/linux/mediatek/mt7622/base-files/etc/board.d/02_network
View File

@ -10,6 +10,7 @@ mediatek_setup_interfaces()
case $board in
bananapi,bpi-r64|\
buffalo,wsr-3200ax4s|\
dlink,eagle-pro-ai-r32-a1|\
elecom,wrc-x3200gst3|\
linksys,e8450|\
linksys,e8450-ubi|\
@ -64,10 +65,6 @@ mediatek_setup_macs()
wan_mac=$lan_mac
label_mac=$lan_mac
;;
dlink,eagle-pro-ai-m32-a1)
wan_mac=$(get_mac_label)
lan_mac=$(macaddr_add $(get_mac_label) 1)
;;
reyee,ax3200-e5|\
ruijie,rg-ew3200gx-pro)
lan_mac=$(macaddr_add $(get_mac_label) 1)

4
target/linux/mediatek/mt7622/base-files/etc/hotplug.d/ieee80211/11_fix_wifi_mac
View File

@ -18,10 +18,6 @@ case "$board" in
[ "$PHYNBR" = "0" ] && macaddr_add $basemac 1 > /sys${DEVPATH}/macaddress
[ "$PHYNBR" = "1" ] && macaddr_add $basemac 8 > /sys${DEVPATH}/macaddress
;;
dlink,eagle-pro-ai-m32-a1)
[ "$PHYNBR" = "0" ] && macaddr_add $(cat /sys/class/net/eth0/address) 2 > /sys${DEVPATH}/macaddress
[ "$PHYNBR" = "1" ] && macaddr_add $(cat /sys/class/net/eth0/address) 3 > /sys${DEVPATH}/macaddress
;;
reyee,ax3200-e5|\
ruijie,rg-ew3200gx-pro)
[ "$PHYNBR" = "0" ] && macaddr_add $(get_mac_label) 3 > /sys${DEVPATH}/macaddress

8
target/linux/mediatek/mt7622/base-files/etc/init.d/bootcount
View File

@ -4,6 +4,14 @@ START=99
boot() {
case $(board_name) in
dlink,eagle-pro-ai-m32-a1|\
dlink,eagle-pro-ai-r32-a1)
if grep -q boot_part=Kernel1 /proc/cmdline; then
fw_setenv boot_part 1
else
fw_setenv boot_part 2
fi
;;
linksys,e8450)
mtd erase senv || true
;;

4
target/linux/mediatek/mt7622/base-files/lib/upgrade/platform.sh
View File

@ -35,6 +35,7 @@ platform_do_upgrade() {
fi
;;
dlink,eagle-pro-ai-m32-a1|\
dlink,eagle-pro-ai-r32-a1|\
elecom,wrc-x3200gst3|\
mediatek,mt7622-rfb1-ubi|\
netgear,wax206|\
@ -73,7 +74,8 @@ platform_check_image() {
buffalo,wsr-3200ax4s)
buffalo_check_image "$board" "$magic" "$1" || return 1
;;
dlink,eagle-pro-ai-m32-a1|\
dlink,eagle-pro-ai-m32-a1|\
dlink,eagle-pro-ai-r32-a1|\
elecom,wrc-x3200gst3|\
mediatek,mt7622-rfb1-ubi|\
netgear,wax206|\

2
toolchain/nasm/Makefile
View File

@ -10,7 +10,7 @@ PKG_VERSION:=2.16.01
PKG_SOURCE_URL:=https://www.nasm.us/pub/nasm/releasebuilds/$(PKG_VERSION)/
PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.xz
PKG_HASH:=c77745f4802375efeee2ec5c0ad6b7f037ea9c87c92b149a9637ff099f162558
PKG_CPE_ID:=cpe:/a:nasm:nasm
PKG_CPE_ID:=cpe:/a:nasm:netwide_assembler
HOST_BUILD_PARALLEL:=1

2
tools/flex/Makefile
View File

@ -7,7 +7,7 @@
include $(TOPDIR)/rules.mk
PKG_NAME:=flex
PKG_CPE_ID:=cpe:/a:flex_project:flex
PKG_CPE_ID:=cpe:/a:westes:flex
PKG_VERSION:=2.6.4
PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.gz

2
tools/zlib/Makefile
View File

@ -17,7 +17,7 @@ PKG_HASH:=d14c38e313afc35a9a8760dadf26042f51ea0f5d154b0630a31da0540107fb98
PKG_LICENSE:=Zlib
PKG_LICENSE_FILES:=README
PKG_CPE_ID:=cpe:/a:gnu:zlib
PKG_CPE_ID:=cpe:/a:zlib:zlib
HOST_BUILD_PARALLEL:=1