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Merge Official Source

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Signed-off-by: Tianling Shen <cnsztl@immortalwrt.org>
This commit is contained in:
Tianling Shen 2022-05-04 14:54:03 +08:00
commit ac60824d7a
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GPG Key ID: 6850B6345C862176
231 changed files with 11723 additions and 9890 deletions
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2
Makefile
View File

@ -51,7 +51,7 @@ printdb:
prepare: $(target/stamp-compile)
_clean: FORCE
rm -rf $(BUILD_DIR) $(STAGING_DIR) $(BIN_DIR) $(OUTPUT_DIR)/packages/$(ARCH_PACKAGES) $(BUILD_LOG_DIR) $(TOPDIR)/staging_dir/packages
rm -rf $(BUILD_DIR) $(STAGING_DIR) $(BIN_DIR) $(OUTPUT_DIR)/packages/$(ARCH_PACKAGES) $(TOPDIR)/staging_dir/packages
clean: _clean
rm -rf $(BUILD_LOG_DIR)

4
include/kernel-5.10
View File

@ -1,2 +1,2 @@
LINUX_VERSION-5.10 = .112
LINUX_KERNEL_HASH-5.10.112 = 8c6c1dc361ebb1ef63a7666b2069c9d7cdcec8ebb706b03780af1c8bb03b4aa5
LINUX_VERSION-5.10 = .113
LINUX_KERNEL_HASH-5.10.113 = 82516a02bb52456f6e8057217dde6e02b78003b1e058117557c2ae9661696dfc

3
package/base-files/files/lib/functions.sh
View File

@ -386,6 +386,9 @@ group_add_user() {
echo "$grp" | grep -q ":$" && delim=""
[ -n "$IPKG_INSTROOT" ] || lock /var/lock/passwd
sed -i "s/$grp/$grp$delim$2/g" ${IPKG_INSTROOT}/etc/group
if [ -z "$IPKG_INSTROOT" ] && [ -x /usr/sbin/selinuxenabled ] && selinuxenabled; then
restorecon /etc/group
fi
[ -n "$IPKG_INSTROOT" ] || lock -u /var/lock/passwd
}

8
package/base-files/files/lib/upgrade/nand.sh
View File

@ -305,7 +305,11 @@ nand_upgrade_tar() {
local ubi_kernel_length
if [ "$kernel_length" ]; then
if [ "$kernel_mtd" ]; then
mtd erase "$CI_KERNPART"
# On some devices, the raw kernel and ubi partitions overlap.
# These devices brick if the kernel partition is erased.
# Hence only invalidate kernel for now.
dd if=/dev/zero bs=4096 count=1 2>/dev/null | \
mtd write - "$CI_KERNPART"
else
ubi_kernel_length="$kernel_length"
fi
@ -322,7 +326,7 @@ nand_upgrade_tar() {
if [ "$kernel_length" ]; then
if [ "$kernel_mtd" ]; then
tar xf "$tar_file" "$board_dir/kernel" -O | \
mtd -n write - "$CI_KERNPART"
mtd write - "$CI_KERNPART"
else
local kern_ubivol="$( nand_find_volume $ubidev "$CI_KERNPART" )"
tar xf "$tar_file" "$board_dir/kernel" -O | \

4
package/boot/uboot-envtools/files/mpc85xx
View File

@ -8,6 +8,10 @@ touch /etc/config/ubootenv
board=$(board_name)
case "$board" in
extreme-networks,ws-ap3825i)
ubootenv_add_uci_config "$(find_mtd_part 'cfg1')" "0x0" "0x10000" "0x20000"
ubootenv_add_uci_config "$(find_mtd_part 'cfg2')" "0x0" "0x10000" "0x20000"
;;
ocedo,panda)
ubootenv_add_uci_config "/dev/mtd1" "0x0" "0x20000" "0x20000"
ubootenv_add_uci_config "/dev/mtd2" "0x0" "0x20000" "0x20000"

11
package/boot/uboot-mvebu/Makefile
View File

@ -8,10 +8,10 @@
include $(TOPDIR)/rules.mk
include $(INCLUDE_DIR)/kernel.mk
PKG_VERSION:=2022.01
PKG_VERSION:=2022.04
PKG_RELEASE:=$(AUTORELEASE)
PKG_HASH:=81b4543227db228c03f8a1bf5ddbc813b0bb8f6555ce46064ef721a6fc680413
PKG_HASH:=68e065413926778e276ec3abd28bb32fa82abaa4a6898d570c1f48fbdb08bcd0
include $(INCLUDE_DIR)/u-boot.mk
include $(INCLUDE_DIR)/package.mk
@ -62,13 +62,6 @@ UBOOT_TARGETS:= \
espressobin \
uDPU
define Build/Configure
# enable additional options beyond <device>_defconfig
echo CONFIG_CMD_SETEXPR=y >> $(PKG_BUILD_DIR)/configs/$(UBOOT_CONFIG)_defconfig
$(call Build/Configure/U-Boot)
endef
define Package/u-boot/install
$(if $(findstring cortexa53,$(BUILD_SUBTARGET)),,$(Package/u-boot/install/default))
endef

116
package/boot/uboot-mvebu/patches/010-ddr-marvell-a38x-fix-split-out-mix.patch
View File

@ -1,116 +0,0 @@
From 3fc92a215b69ad448c151489228eb340df9a8703 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Marek=20Beh=C3=BAn?= <marek.behun@nic.cz>
Date: Wed, 12 Jan 2022 17:06:59 +0100
Subject: [PATCH] ddr: marvell: a38x: fix SPLIT_OUT_MIX state decision
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
This is a cleaned up and fixed version of a patch
mv_ddr: a380: fix SPLIT_OUT_MIX state decision
in each pattern cycle the bus state can be changed
in order to avoide it, need to back to the same bus state on each
pattern cycle
by
Moti Boskula <motib@marvell.com>
The original patch is not in Marvell's mv-ddr-marvell repository. It was
gives to us by Marvell to fix an issues with DDR training on some
boards, but it cannot be applied as is to mv-ddr-marvell, because it is
a very dirty draft patch that would certainly break other things, mainly
DDR4 training code in mv-ddr-marvell, since it changes common functions.
I have cleaned up the patch and removed stuff that seemed unnecessary
(when removed, it still fixed things). Note that I don't understand
completely what the code does exactly, since I haven't studied the DDR
training code extensively (and I suspect that no one besides some few
people in Marvell understand the code completely).
Anyway after the cleanup the patch still fixes isssues with DDR training
on the failing boards.
There was also a problem with the original patch on some of the Allied
Telesis' x530 boards, reported by Chris Packham. I have asked Chris to
send me some logs, and managed to fix it:
- if you look at the change, you'll notice that it introduces
subtraction of cur_start_win[] and cur_end_win[] members, depending on
a bit set in the current_byte_status variable
- the original patch subtracted cur_start_win[] if either
BYTE_SPLIT_OUT_MIX or BYTE_HOMOGENEOUS_SPLIT_OUT bits were set, but
subtracted cur_end_win[] only if the first one (BYTE_SPLIT_OUT_MIX)
was set
- from Chris Packham logs I discovered that the x530 board where the
original patch introduced DDR training failure, only the
BYTE_HOMOGENEOUS_SPLIT_OUT bit was set, and on our boards where the
patch is needed only the BYTE_SPLIT_OUT_MIX is set in the
current_byte_status variable
- this led me to the hypothesis that both cur_start_win[] and
cur_end_win[] should be subtracted only if BYTE_SPLIT_OUT_MIX bit is
set, the BYTE_HOMOGENEOUS_SPLIT_OUT bit shouldn't be considered at all
- this hypothesis also gains credibility when considering the commit
title ("fix SPLIT_OUT_MIX state decision")
Hopefully this will fix things without breaking anything else.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
Tested-by: Chris Packham <judge.packham@gmail.com>
---
.../a38x/ddr3_training_centralization.c | 26 +++++++++++++++++++
1 file changed, 26 insertions(+)
--- a/drivers/ddr/marvell/a38x/ddr3_training_centralization.c
+++ b/drivers/ddr/marvell/a38x/ddr3_training_centralization.c
@@ -55,6 +55,7 @@ static int ddr3_tip_centralization(u32 d
enum hws_training_ip_stat training_result[MAX_INTERFACE_NUM];
u32 if_id, pattern_id, bit_id;
u8 bus_id;
+ u8 current_byte_status;
u8 cur_start_win[BUS_WIDTH_IN_BITS];
u8 centralization_result[MAX_INTERFACE_NUM][BUS_WIDTH_IN_BITS];
u8 cur_end_win[BUS_WIDTH_IN_BITS];
@@ -166,6 +167,10 @@ static int ddr3_tip_centralization(u32 d
result[search_dir_id][7]));
}
+ current_byte_status =
+ mv_ddr_tip_sub_phy_byte_status_get(if_id,
+ bus_id);
+
for (bit_id = 0; bit_id < BUS_WIDTH_IN_BITS;
bit_id++) {
/* check if this code is valid for 2 edge, probably not :( */
@@ -174,11 +179,32 @@ static int ddr3_tip_centralization(u32 d
[HWS_LOW2HIGH]
[bit_id],
EDGE_1);
+ if (current_byte_status &
+ BYTE_SPLIT_OUT_MIX) {
+ if (cur_start_win[bit_id] >= 64)
+ cur_start_win[bit_id] -= 64;
+ else
+ cur_start_win[bit_id] = 0;
+ DEBUG_CENTRALIZATION_ENGINE
+ (DEBUG_LEVEL_INFO,
+ ("pattern %d IF %d pup %d bit %d subtract 64 adll from start\n",
+ pattern_id, if_id, bus_id, bit_id));
+ }
cur_end_win[bit_id] =
GET_TAP_RESULT(result
[HWS_HIGH2LOW]
[bit_id],
EDGE_1);
+ if (cur_end_win[bit_id] >= 64 &&
+ (current_byte_status &
+ BYTE_SPLIT_OUT_MIX)) {
+ cur_end_win[bit_id] -= 64;
+ DEBUG_CENTRALIZATION_ENGINE
+ (DEBUG_LEVEL_INFO,
+ ("pattern %d IF %d pup %d bit %d subtract 64 adll from end\n",
+ pattern_id, if_id, bus_id, bit_id));
+ }
+
/* window length */
current_window[bit_id] =
cur_end_win[bit_id] -

98
package/boot/uboot-mvebu/patches/011-ddr-marvell-a38x-fix-synchronous-asynchronous-mode.patch
View File

@ -1,98 +0,0 @@
From eadc4f512fb43bba2fa4e842c982da919da664be Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Marek=20Beh=C3=BAn?= <marek.behun@nic.cz>
Date: Tue, 4 Jan 2022 15:57:49 +0100
Subject: [PATCH] ddr: marvell: a38x: Fix Synchronous vs Asynchronous mode
determination
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
Before commit 4c289425752f ("mv_ddr: a38x: add support for ddr async
mode"), Asynchornous Mode was only used when the CPU Subsystem Clock
Options[4:0] field in the SAR1 register was set to value 0x13: CPU at
2 GHz and DDR at 933 MHz.
Then commit 4c289425752f ("mv_ddr: a38x: add support for ddr async
mode") added support for Asynchornous Modes with frequencies other than
933 MHz (but at least 467 MHz), but the code it added to check for
whether Asynchornous Mode should be used is wrong: it checks whether the
frequency setting in board DDR topology map is set to value other than
MV_DDR_FREQ_SAR.
Thus boards which define a specific value, greater than 400 MHz, for DDR
frequency in their board topology (e.g. Turris Omnia defines
MV_DDR_FREQ_800), are incorrectly put into Asynchornous Mode after that
commit.
The A38x Functional Specification, section 10.12 DRAM Clocking, says:
In Synchornous mode, the DRAM and CPU clocks are edge aligned and run
in 1:2 or 1:3 CPU to DRAM frequency ratios.
Change the check for whether Asynchornous Mode should be used according
to this explanation in Functional Specification.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Tested-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
---
drivers/ddr/marvell/a38x/mv_ddr_plat.c | 19 ++++++++-----------
1 file changed, 8 insertions(+), 11 deletions(-)
--- a/drivers/ddr/marvell/a38x/mv_ddr_plat.c
+++ b/drivers/ddr/marvell/a38x/mv_ddr_plat.c
@@ -167,8 +167,6 @@ static u16 a38x_vco_freq_per_sar_ref_clk
};
-static u32 async_mode_at_tf;
-
static u32 dq_bit_map_2_phy_pin[] = {
1, 0, 2, 6, 9, 8, 3, 7, /* 0 */
8, 9, 1, 7, 2, 6, 3, 0, /* 1 */
@@ -734,7 +732,8 @@ static int ddr3_tip_a38x_set_divider(u8
u32 divider = 0;
u32 sar_val, ref_clk_satr;
u32 async_val;
- u32 freq = mv_ddr_freq_get(frequency);
+ u32 cpu_freq;
+ u32 ddr_freq = mv_ddr_freq_get(frequency);
if (if_id != 0) {
DEBUG_TRAINING_ACCESS(DEBUG_LEVEL_ERROR,
@@ -751,11 +750,14 @@ static int ddr3_tip_a38x_set_divider(u8
ref_clk_satr = reg_read(DEVICE_SAMPLE_AT_RESET2_REG);
if (((ref_clk_satr >> DEVICE_SAMPLE_AT_RESET2_REG_REFCLK_OFFSET) & 0x1) ==
DEVICE_SAMPLE_AT_RESET2_REG_REFCLK_25MHZ)
- divider = a38x_vco_freq_per_sar_ref_clk_25_mhz[sar_val] / freq;
+ cpu_freq = a38x_vco_freq_per_sar_ref_clk_25_mhz[sar_val];
else
- divider = a38x_vco_freq_per_sar_ref_clk_40_mhz[sar_val] / freq;
+ cpu_freq = a38x_vco_freq_per_sar_ref_clk_40_mhz[sar_val];
+
+ divider = cpu_freq / ddr_freq;
- if ((async_mode_at_tf == 1) && (freq > 400)) {
+ if (((cpu_freq % ddr_freq != 0) || (divider != 2 && divider != 3)) &&
+ (ddr_freq > 400)) {
/* Set async mode */
dunit_write(0x20220, 0x1000, 0x1000);
dunit_write(0xe42f4, 0x200, 0x200);
@@ -869,8 +871,6 @@ int ddr3_tip_ext_write(u32 dev_num, u32
int mv_ddr_early_init(void)
{
- struct mv_ddr_topology_map *tm = mv_ddr_topology_map_get();
-
/* FIXME: change this configuration per ddr type
* configure a380 and a390 to work with receiver odt timing
* the odt_config is defined:
@@ -882,9 +882,6 @@ int mv_ddr_early_init(void)
mv_ddr_sw_db_init(0, 0);
- if (tm->interface_params[0].memory_freq != MV_DDR_FREQ_SAR)
- async_mode_at_tf = 1;
-
return MV_OK;
}

92
package/boot/uboot-mvebu/patches/012-nvme-Do-not-allocate-8kB-buffer-on-stack.patch
View File

@ -1,92 +0,0 @@
From d17ab6e1289b1d705c75de8a2351218962fb7352 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Pali=20Roh=C3=A1r?= <pali@kernel.org>
Date: Thu, 9 Dec 2021 11:06:39 +0100
Subject: [PATCH] nvme: Do not allocate 8kB buffer on stack
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
Calling 'nvme scan' followed by 'nvme detail' crashes U-Boot on Turris
Omnia with the following error:
undefined instruction
pc : [<0a000000>] lr : [<7ff80bfc>]
reloc pc : [<8a8c0000>] lr : [<00840bfc>]
sp : 7fb2b908 ip : 0000002a fp : 02000000
r10: 04000000 r9 : 7fb2fed0 r8 : e1000000
r7 : 0c000000 r6 : 03000000 r5 : 06000000 r4 : 01000000
r3 : 7fb30928 r2 : 7fb30928 r1 : 00000000 r0 : 00000000
Flags: nZCv IRQs off FIQs off Mode SVC_32
Code: 0f0fb4f0 0f0fb4f0 0f0fb4f0 0f0fb4f0 (f0f04b0f)
Resetting CPU ...
This happens when nvme_print_info() tries to return to the caller. It
looks like this error is caused by trying to allocate 8 KiB of memory
on the stack by the two uses of ALLOC_CACHE_ALIGN_BUFFER().
Use malloc_cache_aligned() to allocate this memory dynamically instead.
This fixes 'nvme detail' on Turris Omnia.
Note that similar change was applied to file drivers/nvme/nvme.c in past by
commit 2f83481dff9c ("nvme: use page-aligned buffer for identify command").
Signed-off-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Marek Behún <marek.behun@nic.cz>
---
drivers/nvme/nvme_show.c | 35 ++++++++++++++++++++++++++---------
1 file changed, 26 insertions(+), 9 deletions(-)
--- a/drivers/nvme/nvme_show.c
+++ b/drivers/nvme/nvme_show.c
@@ -106,24 +106,41 @@ int nvme_print_info(struct udevice *udev
{
struct nvme_ns *ns = dev_get_priv(udev);
struct nvme_dev *dev = ns->dev;
- ALLOC_CACHE_ALIGN_BUFFER(char, buf_ns, sizeof(struct nvme_id_ns));
- struct nvme_id_ns *id = (struct nvme_id_ns *)buf_ns;
- ALLOC_CACHE_ALIGN_BUFFER(char, buf_ctrl, sizeof(struct nvme_id_ctrl));
- struct nvme_id_ctrl *ctrl = (struct nvme_id_ctrl *)buf_ctrl;
+ struct nvme_id_ctrl *ctrl;
+ struct nvme_id_ns *id;
+ int ret = 0;
- if (nvme_identify(dev, 0, 1, (dma_addr_t)(long)ctrl))
- return -EIO;
+ ctrl = memalign(dev->page_size, sizeof(struct nvme_id_ctrl));
+ if (!ctrl)
+ return -ENOMEM;
+
+ if (nvme_identify(dev, 0, 1, (dma_addr_t)(long)ctrl)) {
+ ret = -EIO;
+ goto free_ctrl;
+ }
print_optional_admin_cmd(le16_to_cpu(ctrl->oacs), ns->devnum);
print_optional_nvm_cmd(le16_to_cpu(ctrl->oncs), ns->devnum);
print_format_nvme_attributes(ctrl->fna, ns->devnum);
- if (nvme_identify(dev, ns->ns_id, 0, (dma_addr_t)(long)id))
- return -EIO;
+ id = memalign(dev->page_size, sizeof(struct nvme_id_ns));
+ if (!id) {
+ ret = -ENOMEM;
+ goto free_ctrl;
+ }
+
+ if (nvme_identify(dev, ns->ns_id, 0, (dma_addr_t)(long)id)) {
+ ret = -EIO;
+ goto free_id;
+ }
print_formats(id, ns);
print_data_protect_cap(id->dpc, ns->devnum);
print_metadata_cap(id->mc, ns->devnum);
- return 0;
+free_id:
+ free(id);
+free_ctrl:
+ free(ctrl);
+ return ret;
}

64
package/boot/uboot-mvebu/patches/013-mmc-xenon_sdhci-remove-wait_dat0-SDHCI-OP.patch
View File

@ -1,64 +0,0 @@
From 0f3466f52fbacce67e147b9234e6323edff26a6d Mon Sep 17 00:00:00 2001
From: Robert Marko <robert.marko@sartura.hr>
Date: Fri, 11 Mar 2022 19:14:07 +0100
Subject: [PATCH] mmc: xenon_sdhci: remove wait_dat0 SDHCI OP
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
Generic SDHCI driver received support for checking the busy status by
polling the DAT[0] level instead of waiting for the worst MMC switch time.
Unfortunately, it appears that this does not work for Xenon controllers
despite being a part of the standard SDHCI registers and the Armada 3720
datasheet itself telling that BIT(20) is useful for detecting the DAT[0]
busy signal.
I have tried increasing the timeout value, but I have newer managed to
catch DAT_LEVEL bits change from 0 at all.
This issue appears to hit most if not all SoC-s supported by Xenon driver,
at least A3720, A8040 and CN9130 have non working eMMC currently.
So, until a better solution is found drop the wait_dat0 OP for Xenon.
I was able to only test it on A3720, but it should work for others as well.
Fixes: 40e6f52454fc ("drivers: mmc: Add wait_dat0 support for sdhci driver")
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Reviewed-by: Stefan Roese <sr@denx.de>
---
drivers/mmc/xenon_sdhci.c | 7 ++++++-
1 file changed, 6 insertions(+), 1 deletion(-)
--- a/drivers/mmc/xenon_sdhci.c
+++ b/drivers/mmc/xenon_sdhci.c
@@ -439,6 +439,8 @@ static const struct sdhci_ops xenon_sdhc
.set_ios_post = xenon_sdhci_set_ios_post
};
+static struct dm_mmc_ops xenon_mmc_ops;
+
static int xenon_sdhci_probe(struct udevice *dev)
{
struct xenon_sdhci_plat *plat = dev_get_plat(dev);
@@ -452,6 +454,9 @@ static int xenon_sdhci_probe(struct udev
host->mmc->dev = dev;
upriv->mmc = host->mmc;
+ xenon_mmc_ops = sdhci_ops;
+ xenon_mmc_ops.wait_dat0 = NULL;
+
/* Set quirks */
host->quirks = SDHCI_QUIRK_WAIT_SEND_CMD | SDHCI_QUIRK_32BIT_DMA_ADDR;
@@ -568,7 +573,7 @@ U_BOOT_DRIVER(xenon_sdhci_drv) = {
.id = UCLASS_MMC,
.of_match = xenon_sdhci_ids,
.of_to_plat = xenon_sdhci_of_to_plat,
- .ops = &sdhci_ops,
+ .ops = &xenon_mmc_ops,
.bind = xenon_sdhci_bind,
.probe = xenon_sdhci_probe,
.remove = xenon_sdhci_remove,

65
package/boot/uboot-mvebu/patches/100-ddr-marvell-a38x-fix-BYTE_HOMOGENEOUS_SPLIT_OUT-deci.patch
View File

@ -1,65 +0,0 @@
From c11428c7def52671f57089701efe878f7071b696 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Marek=20Beh=C3=BAn?= <marek.behun@nic.cz>
Date: Thu, 17 Feb 2022 01:08:37 +0100
Subject: [PATCH 1/3] ddr: marvell: a38x: fix BYTE_HOMOGENEOUS_SPLIT_OUT
decision
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
In commit 3fc92a215b69 ("ddr: marvell: a38x: fix SPLIT_OUT_MIX state
decision") I ported a cleaned up and changed version of patch
mv_ddr: a380: fix SPLIT_OUT_MIX state decision
In the port we removed checking for BYTE_HOMOGENEOUS_SPLIT_OUT bit,
because:
- the fix seemed to work without it
- the bit was checked for only at one place out of two, while the second
bit, BYTE_SPLIT_OUT_MIX, was checked for in both cases
- without the removal it didn't work on Allied Telesis' x530 board
We recently had a chance to test on more boards, and it seems that the
change needs to be opposite: instead of removing the check for
BYTE_HOMOGENEOUS_SPLIT_OUT from the first if() statement, the check
needs to be added also to the second one - it needs to be at both
places.
With this change all the Turris Omnia boards I have had available to
test seem to work, I didn't encounter not even one failed DDR training.
As last time, I am noting that I do not understand what this code is
actually doing, I haven't studied the DDR training algorithm and
I suspect that no one will be able to explain it to U-Boot contributors,
so we are left with this blind poking in the code with testing whether
it works on several boards and hoping it doesn't break anything for
anyone :-(.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Tested-by: Chris Packham <judge.packham@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
---
drivers/ddr/marvell/a38x/ddr3_training_centralization.c | 6 ++++--
1 file changed, 4 insertions(+), 2 deletions(-)
--- a/drivers/ddr/marvell/a38x/ddr3_training_centralization.c
+++ b/drivers/ddr/marvell/a38x/ddr3_training_centralization.c
@@ -180,7 +180,8 @@ static int ddr3_tip_centralization(u32 d
[bit_id],
EDGE_1);
if (current_byte_status &
- BYTE_SPLIT_OUT_MIX) {
+ (BYTE_SPLIT_OUT_MIX |
+ BYTE_HOMOGENEOUS_SPLIT_OUT)) {
if (cur_start_win[bit_id] >= 64)
cur_start_win[bit_id] -= 64;
else
@@ -197,7 +198,8 @@ static int ddr3_tip_centralization(u32 d
EDGE_1);
if (cur_end_win[bit_id] >= 64 &&
(current_byte_status &
- BYTE_SPLIT_OUT_MIX)) {
+ (BYTE_SPLIT_OUT_MIX |
+ BYTE_HOMOGENEOUS_SPLIT_OUT))) {
cur_end_win[bit_id] -= 64;
DEBUG_CENTRALIZATION_ENGINE
(DEBUG_LEVEL_INFO,

49
package/boot/uboot-mvebu/patches/101-arm-mvebu-spl-Add-option-to-reset-the-board-on-DDR-t.patch
View File

@ -1,49 +0,0 @@
From 74767a3875c99b1a3d2818456a5fdc02ec1e4f93 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Marek=20Beh=C3=BAn?= <marek.behun@nic.cz>
Date: Thu, 17 Feb 2022 13:54:42 +0100
Subject: [PATCH 2/3] arm: mvebu: spl: Add option to reset the board on DDR
training failure
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
Some boards may occacionally fail DDR training. Currently we hang() in
this case. Add an option that makes the board do an immediate reset in
such a case, so that a new training is tried as soon as possible,
instead of hanging and possibly waiting for watchdog to reset the board.
(If the DDR training fails while booting the image via UART, we will
still hang - it doesn't make sense to reset in such a case, because
after reset the board will try booting from another medium, and the
UART booting utility does not expect that.)
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Pali Rohár <pali@kernel.org>
Reviewed-by: Stefan Roese <sr@denx.de>
---
arch/arm/mach-mvebu/spl.c | 7 ++++++-
1 file changed, 6 insertions(+), 1 deletion(-)
--- a/arch/arm/mach-mvebu/spl.c
+++ b/arch/arm/mach-mvebu/spl.c
@@ -4,6 +4,7 @@
*/
#include <common.h>
+#include <cpu_func.h>
#include <dm.h>
#include <debug_uart.h>
#include <fdtdec.h>
@@ -290,7 +291,11 @@ void board_init_f(ulong dummy)
ret = ddr3_init();
if (ret) {
debug("ddr3_init() failed: %d\n", ret);
- hang();
+ if (IS_ENABLED(CONFIG_DDR_RESET_ON_TRAINING_FAILURE) &&
+ get_boot_device() != BOOT_DEVICE_UART)
+ reset_cpu();
+ else
+ hang();
}
#endif

38
package/boot/uboot-mvebu/patches/102-arm-mvebu-turris_omnia-Reset-the-board-immediately-o.patch
View File

@ -1,38 +0,0 @@
From 930c46e86123aeea1c73ae55d70ff3dcfc077992 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Marek=20Beh=C3=BAn?= <marek.behun@nic.cz>
Date: Thu, 17 Feb 2022 13:54:43 +0100
Subject: [PATCH 3/3] arm: mvebu: turris_omnia: Reset the board immediately on
DDR training failure
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
The state of the current DDR training code for Armada 38x is such that
we cannot be sure it will always train successfully - although after the
last change we were yet unable to find a board that failed DDR training,
from experience in the last 2 years we know that it is possible.
The experience also tells us that in many cases the board fails training
only sometimes, and after a reset the training is successful.
Enable the new option that makes the board reset itself on DDR training
failure immediately. Until now we called hang() in such a case, which
meant that the board was reset by the MCU after 120 seconds.
Signed-off-by: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Stefan Roese <sr@denx.de>
Reviewed-by: Pali Rohár <pali@kernel.org>
---
configs/turris_omnia_defconfig | 1 +
1 file changed, 1 insertion(+)
--- a/configs/turris_omnia_defconfig
+++ b/configs/turris_omnia_defconfig
@@ -11,6 +11,7 @@ CONFIG_NR_DRAM_BANKS=2
CONFIG_SYS_MEMTEST_START=0x00800000
CONFIG_SYS_MEMTEST_END=0x00ffffff
CONFIG_TARGET_TURRIS_OMNIA=y
+CONFIG_DDR_RESET_ON_TRAINING_FAILURE=y
CONFIG_ENV_SIZE=0x10000
CONFIG_ENV_OFFSET=0xF0000
CONFIG_ENV_SECT_SIZE=0x10000

31
package/boot/uboot-mvebu/patches/103-arm-mvebu-clearfog_defconfig-enable-setexpr-command.patch Normal file
View File

@ -0,0 +1,31 @@
From 40a67a9403deafdac05564b7350af49a71e12373 Mon Sep 17 00:00:00 2001
From: Josef Schlehofer <pepe.schlehofer@gmail.com>
Date: Fri, 29 Apr 2022 17:34:53 +0200
Subject: [PATCH] arm: mvebu: clearfog_defconfig: enable setexpr command
This command is useful in U-boot scripts and it is being used by
OpenWrt bootscript for this board [1]. Otherwise shell scripting
commands are enabled by default in cmd/Kconfig.
[1] https://github.com/openwrt/openwrt/blob/852126680e21edc71c0c66561ae5a6d7479dcc67/target/linux/mvebu/image/clearfog.bootscript#L7
[2] https://source.denx.de/u-boot/u-boot/-/blob/e95afa56753cebcd20a5114b6d121f281b789006/cmd/Kconfig#L1504
Fixes: 0299c90f396c5b2971a4bac596339f4b03661c27 ("arm: mvebu: Add
SolidRun ClearFog Armada 38x initial support")
Signed-off-by: Josef Schlehofer <pepe.schlehofer@gmail.com>
---
configs/clearfog_defconfig | 1 -
1 file changed, 1 deletion(-)
--- a/configs/clearfog_defconfig
+++ b/configs/clearfog_defconfig
@@ -35,7 +35,6 @@ CONFIG_CMD_MMC=y
CONFIG_CMD_PCI=y
CONFIG_CMD_SPI=y
CONFIG_CMD_USB=y
-# CONFIG_CMD_SETEXPR is not set
CONFIG_CMD_TFTPPUT=y
CONFIG_CMD_CACHE=y
CONFIG_CMD_TIME=y

BIN
package/firmware/ipq-wifi/board-glinet_gl-b2200.qca9888
View File

Binary file not shown.

2
package/kernel/lantiq/ltq-adsl/Makefile
View File

@ -10,7 +10,7 @@ include $(INCLUDE_DIR)/kernel.mk
PKG_NAME:=ltq-adsl
PKG_VERSION:=3.24.4.4
PKG_RELEASE:=3
PKG_RELEASE:=4
PKG_SOURCE:=drv_dsl_cpe_api_danube-$(PKG_VERSION).tar.gz
PKG_BUILD_DIR:=$(KERNEL_BUILD_DIR)/ltq-dsl-$(BUILD_VARIANT)/drv_dsl_cpe_api-$(PKG_VERSION)
PKG_SOURCE_URL:=@OPENWRT

122
package/kernel/lantiq/ltq-adsl/patches/200-fix-elapsed-time.patch Normal file
View File

@ -0,0 +1,122 @@
--- a/src/include/drv_dsl_cpe_pm_core.h
+++ b/src/include/drv_dsl_cpe_pm_core.h
@@ -1525,9 +1525,9 @@ typedef struct
DSL_boolean_t bShowtimeProcessingStart;
/** Showtime reached flag*/
DSL_boolean_t bShowtimeInvTrigger;
- /** Current Showtime synchronization time to be used, (msec) */
+ /** Current Showtime synchronization time to be used, (sec) */
DSL_uint32_t nCurrShowtimeTime;
- /** Showtime synchronization time to be used, (msec) */
+ /** Showtime synchronization time to be used, (sec) */
DSL_uint32_t nElapsedShowtimeTime;
/** Actual Line state*/
DSL_LineStateValue_t nLineState;
--- a/src/pm/drv_dsl_cpe_api_pm.c
+++ b/src/pm/drv_dsl_cpe_api_pm.c
@@ -1445,7 +1445,7 @@ DSL_Error_t DSL_DRV_PM_ChannelCountersTo
}
/* Fill Total Counters elapsed time*/
- pCounters->total.nElapsedTime = DSL_DRV_PM_CONTEXT(pContext)->nPmTotalElapsedTime/DSL_PM_MSEC;
+ pCounters->total.nElapsedTime = DSL_DRV_PM_CONTEXT(pContext)->nPmTotalElapsedTime;
pChCounters = DSL_DRV_PM_PTR_CHANNEL_COUNTERS_TOTAL(pCounters->nChannel,pCounters->nDirection);
@@ -1501,7 +1501,7 @@ DSL_Error_t DSL_DRV_PM_ChannelCountersEx
}
/* Fill Total Counters elapsed time*/
- pCounters->total.nElapsedTime = DSL_DRV_PM_CONTEXT(pContext)->nPmTotalElapsedTime/DSL_PM_MSEC;
+ pCounters->total.nElapsedTime = DSL_DRV_PM_CONTEXT(pContext)->nPmTotalElapsedTime;
pChCounters = DSL_DRV_PM_PTR_CHANNEL_COUNTERS_TOTAL_EXT(pCounters->nChannel);
@@ -2418,7 +2418,7 @@ DSL_Error_t DSL_DRV_PM_DataPathCountersT
}
/* Fill Total Counters elapsed time*/
- pCounters->total.nElapsedTime = DSL_DRV_PM_CONTEXT(pContext)->nPmTotalElapsedTime/DSL_PM_MSEC;
+ pCounters->total.nElapsedTime = DSL_DRV_PM_CONTEXT(pContext)->nPmTotalElapsedTime;
pDpCounters = DSL_DRV_PM_PTR_DATAPATH_COUNTERS_TOTAL(pCounters->nChannel,pCounters->nDirection);
@@ -3190,7 +3190,7 @@ DSL_Error_t DSL_DRV_PM_DataPathFailureCo
}
/* Fill Total Counters elapsed time*/
- pCounters->total.nElapsedTime = DSL_DRV_PM_CONTEXT(pContext)->nPmTotalElapsedTime/DSL_PM_MSEC;
+ pCounters->total.nElapsedTime = DSL_DRV_PM_CONTEXT(pContext)->nPmTotalElapsedTime;
pDpCounters = DSL_DRV_PM_PTR_DATAPATH_FAILURE_COUNTERS_TOTAL(pCounters->nChannel,pCounters->nDirection);
@@ -3950,7 +3950,7 @@ DSL_Error_t DSL_DRV_PM_LineSecCountersTo
}
/* Fill Total Counters elapsed time*/
- pCounters->total.nElapsedTime = DSL_DRV_PM_CONTEXT(pContext)->nPmTotalElapsedTime/DSL_PM_MSEC;
+ pCounters->total.nElapsedTime = DSL_DRV_PM_CONTEXT(pContext)->nPmTotalElapsedTime;
pLineCounters = DSL_DRV_PM_PTR_LINE_SEC_COUNTERS_TOTAL(pCounters->nDirection);
@@ -4602,7 +4602,7 @@ DSL_Error_t DSL_DRV_PM_LineInitCountersT
}
/* Fill Total Counters elapsed time*/
- pCounters->total.nElapsedTime = DSL_DRV_PM_CONTEXT(pContext)->nPmTotalElapsedTime/DSL_PM_MSEC;
+ pCounters->total.nElapsedTime = DSL_DRV_PM_CONTEXT(pContext)->nPmTotalElapsedTime;
pLinitCounters = DSL_DRV_PM_PTR_LINE_INIT_COUNTERS_TOTAL();
@@ -5131,7 +5131,7 @@ DSL_Error_t DSL_DRV_PM_LineEventShowtime
}
/* Fill Total Counters elapsed time*/
- pCounters->total.nElapsedTime = DSL_DRV_PM_CONTEXT(pContext)->nPmTotalElapsedTime/DSL_PM_MSEC;
+ pCounters->total.nElapsedTime = DSL_DRV_PM_CONTEXT(pContext)->nPmTotalElapsedTime;
pLfCounters = DSL_DRV_PM_PTR_LINE_EVENT_SHOWTIME_COUNTERS_TOTAL(pCounters->nDirection);
@@ -5670,7 +5670,7 @@ DSL_Error_t DSL_DRV_PM_ReTxCountersTotal
}
/* Fill Total Counters elapsed time*/
- pCounters->total.nElapsedTime = DSL_DRV_PM_CONTEXT(pContext)->nPmTotalElapsedTime/DSL_PM_MSEC;
+ pCounters->total.nElapsedTime = DSL_DRV_PM_CONTEXT(pContext)->nPmTotalElapsedTime;
pReTxCounters = DSL_DRV_PM_PTR_RETX_COUNTERS_TOTAL(pCounters->nDirection);
--- a/src/pm/drv_dsl_cpe_pm_core.c
+++ b/src/pm/drv_dsl_cpe_pm_core.c
@@ -61,6 +61,7 @@ static DSL_Error_t DSL_DRV_PM_SyncTimeUp
{
DSL_Error_t nErrCode = DSL_SUCCESS;
DSL_uint32_t msecTimeFrame = DSL_PM_COUNTER_POLLING_CYCLE,
+ secTimeFrame = DSL_PM_COUNTER_POLLING_CYCLE/DSL_PM_MSEC,
nCurrMsTime = 0;
#ifdef INCLUDE_DSL_CPE_PM_HISTORY
DSL_uint32_t nCurrSysTime = 0, nPrevElapsedTime = 0;
@@ -100,10 +101,13 @@ static DSL_Error_t DSL_DRV_PM_SyncTimeUp
{
/* Get elapsed time [msec] since the last entry*/
msecTimeFrame = nCurrMsTime - DSL_DRV_PM_CONTEXT(pContext)->nLastMsTimeCheck;
+
+ /* Get elapsed time [sec] since the last entry*/
+ secTimeFrame = (nCurrMsTime/DSL_PM_MSEC) - (DSL_DRV_PM_CONTEXT(pContext)->nLastMsTimeCheck/DSL_PM_MSEC);
}
/* Get Total Elapsed Time Since the PM module startup*/
- DSL_DRV_PM_CONTEXT(pContext)->nPmTotalElapsedTime += msecTimeFrame;
+ DSL_DRV_PM_CONTEXT(pContext)->nPmTotalElapsedTime += secTimeFrame;
/* Set last time check to the current time*/
DSL_DRV_PM_CONTEXT(pContext)->nLastMsTimeCheck = nCurrMsTime;
@@ -141,7 +145,7 @@ static DSL_Error_t DSL_DRV_PM_SyncTimeUp
else
{
/* Update current showtime elapsed time*/
- DSL_DRV_PM_CONTEXT(pContext)->nCurrShowtimeTime += (msecTimeFrame/DSL_PM_MSEC);
+ DSL_DRV_PM_CONTEXT(pContext)->nCurrShowtimeTime += secTimeFrame;
DSL_DRV_PM_CONTEXT(pContext)->nElapsedShowtimeTime =
DSL_DRV_PM_CONTEXT(pContext)->nCurrShowtimeTime;
}

13
package/kernel/lantiq/ltq-atm/Makefile
View File

@ -22,13 +22,18 @@ define KernelPackage/ltq-atm-template
URL:=http://www.lantiq.com/
VARIANT:=$(1)
DEPENDS:=@$(2) +kmod-atm +br2684ctl
ifeq ($(1),vr9)
DEPENDS+= +PACKAGE_kmod-ltq-atm-$(1):kmod-ltq-vdsl-vr9-mei
else
DEPENDS+= +PACKAGE_kmod-ltq-atm-$(1):kmod-ltq-adsl-$(1)-mei
endif
FILES:=$(PKG_BUILD_DIR)/ltq_atm_$(1).ko
endef
KernelPackage/ltq-atm-danube=$(call KernelPackage/ltq-atm-template,danube,(TARGET_lantiq_xway||TARGET_lantiq_xway_legacy) +kmod-ltq-adsl-danube-mei)
KernelPackage/ltq-atm-ar9=$(call KernelPackage/ltq-atm-template,ar9,TARGET_lantiq_xway +kmod-ltq-adsl-ar9-mei)
KernelPackage/ltq-atm-ase=$(call KernelPackage/ltq-atm-template,ase,TARGET_lantiq_ase +kmod-ltq-adsl-ase-mei)
KernelPackage/ltq-atm-vr9=$(call KernelPackage/ltq-atm-template,vr9,TARGET_lantiq_xrx200 +kmod-ltq-vdsl-vr9-mei)
KernelPackage/ltq-atm-danube=$(call KernelPackage/ltq-atm-template,danube,(TARGET_lantiq_xway||TARGET_lantiq_xway_legacy))
KernelPackage/ltq-atm-ar9=$(call KernelPackage/ltq-atm-template,ar9,TARGET_lantiq_xway)
KernelPackage/ltq-atm-ase=$(call KernelPackage/ltq-atm-template,ase,TARGET_lantiq_ase)
KernelPackage/ltq-atm-vr9=$(call KernelPackage/ltq-atm-template,vr9,TARGET_lantiq_xrx200)
define Build/Configure
endef

4
package/kernel/lantiq/ltq-ptm/Makefile
View File

@ -24,9 +24,9 @@ define KernelPackage/ltq-ptm-template
VARIANT:=$(1)
DEPENDS:=@TARGET_lantiq_$(2)
ifeq ($(1),vr9)
DEPENDS+= +kmod-ltq-vdsl-vr9-mei
DEPENDS+= +PACKAGE_kmod-ltq-ptm-$(1):kmod-ltq-vdsl-vr9-mei
else
DEPENDS+= +kmod-ltq-adsl-$(1)-mei
DEPENDS+= +PACKAGE_kmod-ltq-ptm-$(1):kmod-ltq-adsl-$(1)-mei
endif
ifeq ($(1),ase)
DEPENDS+=@BROKEN

2
package/kernel/lantiq/ltq-vdsl/Makefile
View File

@ -9,7 +9,7 @@ include $(INCLUDE_DIR)/kernel.mk
PKG_NAME:=ltq-vdsl-vr9
PKG_VERSION:=4.17.18.6
PKG_RELEASE:=6
PKG_RELEASE:=7
PKG_BASE_NAME:=drv_dsl_cpe_api
PKG_SOURCE:=$(PKG_BASE_NAME)_vrx-$(PKG_VERSION).tar.gz

122
package/kernel/lantiq/ltq-vdsl/patches/200-fix-elapsed-time.patch Normal file
View File

@ -0,0 +1,122 @@
--- a/src/include/drv_dsl_cpe_pm_core.h
+++ b/src/include/drv_dsl_cpe_pm_core.h
@@ -1552,9 +1552,9 @@ typedef struct
DSL_boolean_t bShowtimeProcessingStart;
/** Showtime reached flag*/
DSL_boolean_t bShowtimeInvTrigger;
- /** Current Showtime synchronization time to be used, (msec) */
+ /** Current Showtime synchronization time to be used, (sec) */
DSL_uint32_t nCurrShowtimeTime;
- /** Showtime synchronization time to be used, (msec) */
+ /** Showtime synchronization time to be used, (sec) */
DSL_uint32_t nElapsedShowtimeTime;
/** Actual Line state*/
DSL_LineStateValue_t nLineState;
--- a/src/pm/drv_dsl_cpe_api_pm.c
+++ b/src/pm/drv_dsl_cpe_api_pm.c
@@ -1475,7 +1475,7 @@ DSL_Error_t DSL_DRV_PM_ChannelCountersTo
}
/* Fill Total Counters elapsed time*/
- pCounters->total.nElapsedTime = DSL_DRV_PM_CONTEXT(pContext)->nPmTotalElapsedTime/DSL_PM_MSEC;
+ pCounters->total.nElapsedTime = DSL_DRV_PM_CONTEXT(pContext)->nPmTotalElapsedTime;
pChCounters = DSL_DRV_PM_PTR_CHANNEL_COUNTERS_TOTAL(pCounters->nChannel,pCounters->nDirection);
@@ -1535,7 +1535,7 @@ DSL_Error_t DSL_DRV_PM_ChannelCountersEx
}
/* Fill Total Counters elapsed time*/
- pCounters->total.nElapsedTime = DSL_DRV_PM_CONTEXT(pContext)->nPmTotalElapsedTime/DSL_PM_MSEC;
+ pCounters->total.nElapsedTime = DSL_DRV_PM_CONTEXT(pContext)->nPmTotalElapsedTime;
pChCounters = DSL_DRV_PM_PTR_CHANNEL_COUNTERS_TOTAL_EXT(pCounters->nChannel);
@@ -2518,7 +2518,7 @@ DSL_Error_t DSL_DRV_PM_DataPathCountersT
}
/* Fill Total Counters elapsed time*/
- pCounters->total.nElapsedTime = DSL_DRV_PM_CONTEXT(pContext)->nPmTotalElapsedTime/DSL_PM_MSEC;
+ pCounters->total.nElapsedTime = DSL_DRV_PM_CONTEXT(pContext)->nPmTotalElapsedTime;
pDpCounters = DSL_DRV_PM_PTR_DATAPATH_COUNTERS_TOTAL(pCounters->nChannel,pCounters->nDirection);
@@ -3352,7 +3352,7 @@ DSL_Error_t DSL_DRV_PM_DataPathFailureCo
}
/* Fill Total Counters elapsed time*/
- pCounters->total.nElapsedTime = DSL_DRV_PM_CONTEXT(pContext)->nPmTotalElapsedTime/DSL_PM_MSEC;
+ pCounters->total.nElapsedTime = DSL_DRV_PM_CONTEXT(pContext)->nPmTotalElapsedTime;
pDpCounters = DSL_DRV_PM_PTR_DATAPATH_FAILURE_COUNTERS_TOTAL(pCounters->nChannel,pCounters->nDirection);
@@ -4130,7 +4130,7 @@ DSL_Error_t DSL_DRV_PM_LineSecCountersTo
}
/* Fill Total Counters elapsed time*/
- pCounters->total.nElapsedTime = DSL_DRV_PM_CONTEXT(pContext)->nPmTotalElapsedTime/DSL_PM_MSEC;
+ pCounters->total.nElapsedTime = DSL_DRV_PM_CONTEXT(pContext)->nPmTotalElapsedTime;
pLineCounters = DSL_DRV_PM_PTR_LINE_SEC_COUNTERS_TOTAL(pCounters->nDirection);
@@ -4787,7 +4787,7 @@ DSL_Error_t DSL_DRV_PM_LineInitCountersT
}
/* Fill Total Counters elapsed time*/
- pCounters->total.nElapsedTime = DSL_DRV_PM_CONTEXT(pContext)->nPmTotalElapsedTime/DSL_PM_MSEC;
+ pCounters->total.nElapsedTime = DSL_DRV_PM_CONTEXT(pContext)->nPmTotalElapsedTime;
pLinitCounters = DSL_DRV_PM_PTR_LINE_INIT_COUNTERS_TOTAL();
@@ -5240,7 +5240,7 @@ DSL_Error_t DSL_DRV_PM_LineEventShowtime
}
/* Fill Total Counters elapsed time*/
- pCounters->total.nElapsedTime = DSL_DRV_PM_CONTEXT(pContext)->nPmTotalElapsedTime/DSL_PM_MSEC;
+ pCounters->total.nElapsedTime = DSL_DRV_PM_CONTEXT(pContext)->nPmTotalElapsedTime;
pLfCounters = DSL_DRV_PM_PTR_LINE_EVENT_SHOWTIME_COUNTERS_TOTAL(pCounters->nDirection);
@@ -5720,7 +5720,7 @@ DSL_Error_t DSL_DRV_PM_ReTxCountersTotal
}
/* Fill Total Counters elapsed time*/
- pCounters->total.nElapsedTime = DSL_DRV_PM_CONTEXT(pContext)->nPmTotalElapsedTime/DSL_PM_MSEC;
+ pCounters->total.nElapsedTime = DSL_DRV_PM_CONTEXT(pContext)->nPmTotalElapsedTime;
pReTxCounters = DSL_DRV_PM_PTR_RETX_COUNTERS_TOTAL(pCounters->nDirection);
--- a/src/pm/drv_dsl_cpe_pm_core.c
+++ b/src/pm/drv_dsl_cpe_pm_core.c
@@ -60,6 +60,7 @@ static DSL_Error_t DSL_DRV_PM_SyncTimeUp
{
DSL_Error_t nErrCode = DSL_SUCCESS;
DSL_uint32_t msecTimeFrame = DSL_PM_COUNTER_POLLING_CYCLE,
+ secTimeFrame = DSL_PM_COUNTER_POLLING_CYCLE/DSL_PM_MSEC,
nCurrMsTime = 0;
#ifdef INCLUDE_DSL_CPE_PM_HISTORY
DSL_uint32_t nCurrSysTime = 0, nPrevElapsedTime = 0;
@@ -99,10 +100,13 @@ static DSL_Error_t DSL_DRV_PM_SyncTimeUp
{
/* Get elapsed time [msec] since the last entry*/
msecTimeFrame = nCurrMsTime - DSL_DRV_PM_CONTEXT(pContext)->nLastMsTimeCheck;
+
+ /* Get elapsed time [sec] since the last entry*/
+ secTimeFrame = (nCurrMsTime/DSL_PM_MSEC) - (DSL_DRV_PM_CONTEXT(pContext)->nLastMsTimeCheck/DSL_PM_MSEC);
}
/* Get Total Elapsed Time Since the PM module startup*/
- DSL_DRV_PM_CONTEXT(pContext)->nPmTotalElapsedTime += msecTimeFrame;
+ DSL_DRV_PM_CONTEXT(pContext)->nPmTotalElapsedTime += secTimeFrame;
/* Set last time check to the current time*/
DSL_DRV_PM_CONTEXT(pContext)->nLastMsTimeCheck = nCurrMsTime;
@@ -140,7 +144,7 @@ static DSL_Error_t DSL_DRV_PM_SyncTimeUp
else
{
/* Update current showtime elapsed time*/
- DSL_DRV_PM_CONTEXT(pContext)->nCurrShowtimeTime += (msecTimeFrame/DSL_PM_MSEC);
+ DSL_DRV_PM_CONTEXT(pContext)->nCurrShowtimeTime += secTimeFrame;
DSL_DRV_PM_CONTEXT(pContext)->nElapsedShowtimeTime =
DSL_DRV_PM_CONTEXT(pContext)->nCurrShowtimeTime;
}

6
package/kernel/nat46/Makefile
View File

@ -3,11 +3,11 @@ include $(INCLUDE_DIR)/kernel.mk
PKG_NAME:=nat46
PKG_MIRROR_HASH:=1476da31996e26ef76e2ba9623d978d33002abf357a59323d9b539812b0a4b76
PKG_MIRROR_HASH:=c26b8c60aa991a087011b8b6492e43a6749f0a5d9dc79ffcfd352da5fa20b78d
PKG_SOURCE_URL:=https://github.com/ayourtch/nat46.git
PKG_SOURCE_DATE:=2021-11-24
PKG_SOURCE_DATE:=2022-03-30
PKG_SOURCE_PROTO:=git
PKG_SOURCE_VERSION:=d9bc161faa4c18ad1d327a96baa2dc4460b71ccd
PKG_SOURCE_VERSION:=95ca1c3b99376da2d0306919f2df4a8d3c9bb78b
PKG_MAINTAINER:=Hans Dedecker <dedeckeh@gmail.com>
PKG_LICENSE:=GPL-2.0

75
package/network/config/ltq-vdsl-app/patches/200-autoboot.patch
View File

@ -1,3 +1,10 @@
This enables automatic connection after the control daemon is started,
and also stops the connection on termination.
Using the autoboot restart command is necessary because the stop command
doesn't actually stop the connection, and would also leave the driver in
a state where an explicit start command is necessary to connect again.
--- a/src/dsl_cpe_init_cfg.c
+++ b/src/dsl_cpe_init_cfg.c
@@ -27,7 +27,7 @@ DSL_InitData_t gInitCfgData =
@ -9,3 +16,71 @@
DSL_CPE_AUTOBOOT_CFG_SET(DSL_FALSE, DSL_FALSE, DSL_FALSE),
DSL_CPE_TEST_MODE_CTRL_SET(DSL_TESTMODE_DISABLE),
DSL_CPE_LINE_ACTIVATE_CTRL_SET(DSL_G997_INHIBIT_LDSF, DSL_G997_INHIBIT_ACSF, DSL_G997_NORMAL_STARTUP),
--- a/src/dsl_cpe_control.c
+++ b/src/dsl_cpe_control.c
@@ -6515,10 +6515,13 @@ DSL_CPE_STATIC void DSL_CPE_Termination
DSL_CPE_STATIC DSL_void_t DSL_CPE_Termination (void)
{
#ifdef INCLUDE_DSL_CPE_CLI_SUPPORT
- DSL_int_t nDevice = 0;
DSL_char_t buf[32] = "quit";
#endif
+ DSL_Error_t nRet = DSL_SUCCESS;
+ DSL_int_t nDevice = 0;
+ DSL_AutobootConfig_t sAutobootCfg;
+ DSL_AutobootControl_t sAutobootCtl;
DSL_CPE_Control_Context_t *pCtrlCtx;
pCtrlCtx = DSL_CPE_GetGlobalContext();
@@ -6527,6 +6530,50 @@ DSL_CPE_STATIC DSL_void_t DSL_CPE_Termi
pCtrlCtx->bRun = DSL_FALSE;
}
+ for (nDevice = 0; nDevice < DSL_CPE_MAX_DSL_ENTITIES; ++nDevice)
+ {
+ g_bWaitBeforeConfigWrite[nDevice] = DSL_TRUE;
+ g_bWaitBeforeLinkActivation[nDevice] = DSL_TRUE;
+ g_bWaitBeforeRestart[nDevice] = DSL_TRUE;
+
+ g_bAutoContinueWaitBeforeConfigWrite[nDevice] = DSL_FALSE;
+ g_bAutoContinueWaitBeforeLinkActivation[nDevice] = DSL_FALSE;
+ g_bAutoContinueWaitBeforeRestart[nDevice] = DSL_FALSE;
+
+ memset(&sAutobootCfg, 0x0, sizeof(DSL_AutobootConfig_t));
+ sAutobootCfg.data.nStateMachineOptions.bWaitBeforeConfigWrite = DSL_TRUE;
+ sAutobootCfg.data.nStateMachineOptions.bWaitBeforeLinkActivation = DSL_TRUE;
+ sAutobootCfg.data.nStateMachineOptions.bWaitBeforeRestart = DSL_TRUE;
+
+ nRet = (DSL_Error_t)DSL_CPE_Ioctl(
+ DSL_CPE_GetGlobalContext()->fd[nDevice],
+ DSL_FIO_AUTOBOOT_CONFIG_SET, (DSL_int_t)&sAutobootCfg);
+
+ if (nRet < DSL_SUCCESS)
+ {
+ DSL_CCA_DEBUG(DSL_CCA_DBG_ERR, (DSL_CPE_PREFIX
+ "Autoboot configuration for device (%d) failed!, nRet = %d!"
+ DSL_CPE_CRLF, nDevice, sAutobootCtl.accessCtl.nReturn));
+ }
+
+ memset(&sAutobootCtl, 0, sizeof(DSL_AutobootControl_t));
+ sAutobootCtl.data.nCommand = DSL_AUTOBOOT_CTRL_RESTART;
+
+ nRet = (DSL_Error_t)DSL_CPE_Ioctl(
+ DSL_CPE_GetGlobalContext()->fd[nDevice],
+ DSL_FIO_AUTOBOOT_CONTROL_SET, (DSL_int_t)&sAutobootCtl);
+
+ if (nRet < DSL_SUCCESS)
+ {
+ DSL_CCA_DEBUG(DSL_CCA_DBG_ERR, (DSL_CPE_PREFIX
+ "Autoboot restart for device (%d) failed!, nRet = %d!"
+ DSL_CPE_CRLF, nDevice, sAutobootCtl.accessCtl.nReturn));
+ }
+ }
+
+ DSL_CCA_DEBUG(DSL_CCA_DBG_MSG, (DSL_CPE_PREFIX
+ "Autoboot restart executed" DSL_CPE_CRLF));
+
#ifdef INCLUDE_DSL_CPE_CLI_SUPPORT
for (nDevice = 0; nDevice < DSL_CPE_MAX_DSL_ENTITIES; nDevice++)
{

2
package/network/config/ltq-vdsl-app/patches/201-sigterm.patch
View File

@ -9,7 +9,7 @@
{
DSL_CCA_DEBUG(DSL_CCA_DBG_MSG, (DSL_CPE_PREFIX "terminated" DSL_CPE_CRLF));
DSL_CPE_Termination ();
@@ -6756,6 +6756,7 @@ DSL_int_t dsl_cpe_daemon (
@@ -6803,6 +6803,7 @@ DSL_int_t dsl_cpe_daemon (
#ifndef RTEMS
signal (SIGINT, DSL_CPE_TerminationHandler);

4
package/network/config/ltq-vdsl-app/patches/300-ubus.patch
View File

@ -10,7 +10,7 @@
DSL_char_t *g_sFirmwareName1 = DSL_NULL;
DSL_FirmwareFeatures_t g_nFwFeatures1 = {DSL_FW_XDSLMODE_CLEANED, DSL_FW_XDSLFEATURE_CLEANED,
DSL_FW_XDSLFEATURE_CLEANED};
@@ -6759,6 +6762,8 @@ DSL_int_t dsl_cpe_daemon (
@@ -6806,6 +6809,8 @@ DSL_int_t dsl_cpe_daemon (
signal (SIGTERM, DSL_CPE_TerminationHandler);
#endif /* RTEMS*/
@ -19,7 +19,7 @@
/* Open DSL_CPE_MAX_DSL_ENTITIES devices*/
for (nDevice = 0; nDevice < DSL_CPE_MAX_DSL_ENTITIES; nDevice++)
{
@@ -7213,6 +7218,7 @@ DSL_int_t dsl_cpe_daemon (
@@ -7260,6 +7265,7 @@ DSL_int_t dsl_cpe_daemon (
#endif /* INCLUDE_DSL_CPE_CLI_SUPPORT */
DSL_CPE_CONTROL_EXIT:

16
package/network/services/dnsmasq/files/dnsmasq.init
View File

@ -820,7 +820,7 @@ dnsmasq_ipset_add() {
dnsmasq_start()
{
local cfg="$1"
local disabled user_dhcpscript
local disabled user_dhcpscript logfacility
local resolvfile resolvdir localuse=0
config_get_bool disabled "$cfg" disabled 0
@ -938,6 +938,7 @@ dnsmasq_start()
append_parm "$cfg" mini_ttl "--min-ttl"
config_get logfacility "$cfg" "logfacility"
append_parm "$cfg" cachesize "--cache-size"
append_parm "$cfg" dnsforwardmax "--dns-forward-max"
append_parm "$cfg" port "--port"
@ -976,7 +977,14 @@ dnsmasq_start()
config_list_foreach "$cfg" "addnhosts" append_addnhosts
config_list_foreach "$cfg" "bogusnxdomain" append_bogusnxdomain
append_parm "$cfg" "leasefile" "--dhcp-leasefile" "/tmp/dhcp.leases"
append_parm "$cfg" "serversfile" "--servers-file"
local serversfile
config_get serversfile "$cfg" "serversfile"
[ -n "$serversfile" ] && {
xappend "--servers-file=$serversfile"
append EXTRA_MOUNT "$serversfile"
}
append_parm "$cfg" "tftp_root" "--tftp-root"
append_parm "$cfg" "dhcp_boot" "--dhcp-boot"
append_parm "$cfg" "local_ttl" "--local-ttl"
@ -1171,6 +1179,10 @@ dnsmasq_start()
procd_add_jail_mount $dnsmasqconffile $dnsmasqconfdir $resolvdir $user_dhcpscript
procd_add_jail_mount /etc/passwd /etc/group /etc/TZ /etc/hosts /etc/ethers
procd_add_jail_mount_rw /var/run/dnsmasq/ $leasefile
case "$logfacility" in */*)
[ ! -e "$logfacility" ] && touch "$logfacility"
procd_add_jail_mount_rw "$logfacility"
esac
procd_close_instance

6
package/network/utils/iwinfo/Makefile
View File

@ -11,9 +11,9 @@ PKG_RELEASE:=1
PKG_SOURCE_PROTO:=git
PKG_SOURCE_URL=$(PROJECT_GIT)/project/iwinfo.git
PKG_SOURCE_DATE:=2022-04-24
PKG_SOURCE_VERSION:=a479b9b08aeac82fd45cc7a306937c9447157f5e
PKG_MIRROR_HASH:=ed3e8d0b665f2ee95117fe86fc5619d90f9e4849d518111c2f62ebd58ea99f35
PKG_SOURCE_DATE:=2022-04-26
PKG_SOURCE_VERSION:=dc6847eb5ec8747867bc20f1024723c6397c1df7
PKG_MIRROR_HASH:=3f243cf75f4cec02e9e8ecc2087577146845346c0172808f64dea066f84f88d4
PKG_MAINTAINER:=Jo-Philipp Wich <jo@mein.io>
PKG_LICENSE:=GPL-2.0

6
package/network/utils/uqmi/Makefile
View File

@ -5,9 +5,9 @@ PKG_RELEASE:=$(AUTORELEASE)
PKG_SOURCE_PROTO:=git
PKG_SOURCE_URL=$(PROJECT_GIT)/project/uqmi.git
PKG_SOURCE_DATE:=2022-03-12
PKG_SOURCE_VERSION:=44dd095794a5327611d0ee1a58b0a6333d397b64
PKG_MIRROR_HASH:=1f7890c659981e1da5c6d73911c30e24722818ff52d58f41d80cc96b62d53311
PKG_SOURCE_DATE:=2022-05-04
PKG_SOURCE_VERSION:=56cb2d4056fef132ccf78dfb6f3074ae5d109992
PKG_MIRROR_HASH:=cc832b5318805df8c8387a3650f250dee72d5f1dbda4e4866b5503e186b2210c
PKG_MAINTAINER:=Matti Laakso <malaakso@elisanet.fi>
PKG_LICENSE:=GPL-2.0

6
package/system/fstools/Makefile
View File

@ -12,9 +12,9 @@ PKG_RELEASE:=$(AUTORELEASE)
PKG_SOURCE_PROTO:=git
PKG_SOURCE_URL=$(PROJECT_GIT)/project/fstools.git
PKG_MIRROR_HASH:=e4d8fcdf8f83749553be109c7c39141cc4495ac46d476c8d2dc6a0d8dccfb741
PKG_SOURCE_DATE:=2021-11-16
PKG_SOURCE_VERSION:=77c02889177c43df8ebe07bce4d55b7f7358118f
PKG_MIRROR_HASH:=c6239a75f6a3b5b010a48d195006550b0e2154f5b22611484c4979f552c0da7d
PKG_SOURCE_DATE:=2022-05-03
PKG_SOURCE_VERSION:=9e11b3723ce30b9b8c94ad7d15072a10cf13c0b4
CMAKE_INSTALL:=1
PKG_LICENSE:=GPL-2.0

6
package/system/procd/Makefile
View File

@ -12,9 +12,9 @@ PKG_RELEASE:=$(AUTORELEASE)
PKG_SOURCE_PROTO:=git
PKG_SOURCE_URL=$(PROJECT_GIT)/project/procd.git
PKG_MIRROR_HASH:=28630389c91e6025a718abcbd100534d72446afce3c5956f94d6972e56ed7c5f
PKG_SOURCE_DATE:=2022-04-13
PKG_SOURCE_VERSION:=eb03f03105a857a0b7310e4c93bff46aa29f3a40
PKG_MIRROR_HASH:=26c4dd6cfb27ef8f5ef55f7c8d4622ff91e3490917e4fb03f54b138737113251
PKG_SOURCE_DATE:=2022-05-03
PKG_SOURCE_VERSION:=652e6df06f8413f19a4786a275862cfe76628093
CMAKE_INSTALL:=1
PKG_LICENSE:=GPL-2.0

6
package/system/selinux-policy/Makefile
View File

@ -7,9 +7,9 @@ include $(TOPDIR)/rules.mk
PKG_NAME:=selinux-policy
PKG_SOURCE_PROTO:=git
PKG_SOURCE_URL:=https://github.com/DefenSec/selinux-policy
PKG_VERSION:=1.0
PKG_MIRROR_HASH:=2358a064d1231d39e6292d646e1a38898d949b8bef6558ac1e0992d3b5bca33f
PKG_SOURCE_URL:=https://git.defensec.nl/selinux-policy.git
PKG_VERSION:=1.1
PKG_MIRROR_HASH:=657ec1ff51ab946753fb3559384511a536ac1e018691f3e49cbab21c55d23e08
PKG_SOURCE_VERSION:=v$(PKG_VERSION)
PKG_BUILD_DEPENDS:=secilc/host policycoreutils/host

2
package/utils/f2fs-tools/Makefile
View File

@ -9,7 +9,7 @@ include $(TOPDIR)/rules.mk
PKG_NAME:=f2fs-tools
PKG_VERSION:=1.14.0
PKG_RELEASE:=2
PKG_RELEASE:=3
PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.gz
PKG_SOURCE_URL:=https://git.kernel.org/pub/scm/linux/kernel/git/jaegeuk/f2fs-tools.git/snapshot/

46
package/utils/f2fs-tools/patches/200-resize_f2fs-fix_wrong_ovp_calculation.patch Normal file
View File

@ -0,0 +1,46 @@
From f056fbeff08d30a6d9acdb9e06704461ceee3500 Mon Sep 17 00:00:00 2001
From: Jaegeuk Kim <jaegeuk@kernel.org>
Date: Thu, 1 Apr 2021 20:13:55 -0700
Subject: resize.f2fs: fix wrong ovp calculation
beroal reported a mount failure due to broken valid_user_blocks.
[ 6890.647749] F2FS-fs (loop0): Wrong valid_user_blocks: 16040048,
user_block_count: 10016768
From fsck,
segment_count_main [0x 9a95 : 39573]
-> 39573 * 2MB = 78GB as user space
overprov_segment_count [0x 4e29 : 20009]
-> 20009 * 2MB = 40GB as overprovisioned space which user can't see.
But,
[FSCK] valid_block_count matching with CP [Ok..] [0xf4c070]
-> 0xf4c070 = 16040048
valid_block_count [0x f4c070 : 16040048]
-> So, this is correct.
It turns out resize.f2fs gave very large and wrong overprovisioning space
result in shortage of user blocks. The root cause was f2fs_get_usable_segments()
didn't consider resize case which needs segment_count_main from new superblock.
Fixes: f8410857b7a8 ("f2fs-tools: zns zone-capacity support")
Signed-off-by: Jaegeuk Kim <jaegeuk@kernel.org>
---
lib/libf2fs_zoned.c | 3 +++
1 file changed, 3 insertions(+)
--- a/lib/libf2fs_zoned.c
+++ b/lib/libf2fs_zoned.c
@@ -495,6 +495,9 @@ uint32_t f2fs_get_usable_segments(struct
int i, j;
uint32_t usable_segs = 0, zone_segs;
+ if (c.func == RESIZE)
+ return get_sb(segment_count_main);
+
for (i = 0; i < c.ndevs; i++) {
if (c.devices[i].zoned_model != F2FS_ZONED_HM) {
usable_segs += c.devices[i].total_segments;

15
package/utils/mdadm/Makefile
View File

@ -8,12 +8,12 @@
include $(TOPDIR)/rules.mk
PKG_NAME:=mdadm
PKG_VERSION:=4.1
PKG_RELEASE:=2
PKG_VERSION:=4.2
PKG_RELEASE:=1
PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.xz
PKG_SOURCE_URL:=@KERNEL/linux/utils/raid/mdadm
PKG_HASH:=ab7688842908d3583a704d491956f31324c3a5fc9f6a04653cb75d19f1934f4a
PKG_HASH:=461c215670864bb74a4d1a3620684aa2b2f8296dffa06743f26dda5557acf01d
PKG_MAINTAINER:=Felix Fietkau <nbd@nbd.name>
PKG_CPE_ID:=cpe:/a:mdadm_project:mdadm
@ -48,11 +48,16 @@ TARGET_CFLAGS += \
-DCONFFILE='\"/var/etc/mdadm.conf\"' \
-DMAP_DIR='\"/var/run/mdadm\"' \
-DMDMON_DIR='\"/var/run/mdadm\"' \
-DFAILED_SLOTS_DIR='\"/var/run/mdadm/failed-slots\"'
-DFAILED_SLOTS_DIR='\"/var/run/mdadm/failed-slots\"' \
-DNO_LIBUDEV
TARGET_CXFLAGS = -DNO_LIBUDEV
TARGET_LDFLAGS += -Wl,--gc-sections
MAKE_FLAGS += CHECK_RUN_DIR=0
MAKE_FLAGS += \
CHECK_RUN_DIR=0 \
CXFLAGS="$(TARGET_CXFLAGS)"
define Build/Compile
$(call Build/Compile/Default,mdadm)

2
package/utils/mdadm/patches/100-cross_compile.patch
View File

@ -1,6 +1,6 @@
--- a/Makefile
+++ b/Makefile
@@ -97,7 +97,7 @@ DLM:=$(shell [ -f /usr/include/libdlm.h
@@ -99,7 +99,7 @@ DLM:=$(shell [ -f /usr/include/libdlm.h
DIRFLAGS = -DMAP_DIR=\"$(MAP_DIR)\" -DMAP_FILE=\"$(MAP_FILE)\"
DIRFLAGS += -DMDMON_DIR=\"$(MDMON_DIR)\"
DIRFLAGS += -DFAILED_SLOTS_DIR=\"$(FAILED_SLOTS_DIR)\"

38
package/utils/mdadm/patches/101-mdadm.h-Undefine-dprintf-before-redefining.patch
View File

@ -1,38 +0,0 @@
From 6d369e8f226594632ce4260129509daf7030de0a Mon Sep 17 00:00:00 2001
From: Khem Raj <raj.khem@gmail.com>
Date: Mon, 9 May 2016 22:03:57 +0000
Subject: [PATCH] mdadm.h: Undefine dprintf before redefining
dprintf is also defined in libc see
usr/include/bits/stdio2.h, this comes into
play especially when fortify sources is enabled
and compilers like clang reports the override
In file included from policy.c:25:
./mdadm.h:1562:9: error: 'dprintf' macro redefined [-Werror,-Wmacro-redefined]
^
/mnt/oe/openembedded-core/build/tmp-glibc/sysroots/qemux86/usr/include/bits/stdio2.h:145:12: note: previous definition is here
Signed-off-by: Khem Raj <raj.khem@gmail.com>
---
Upstream-Status: Pending
mdadm.h | 2 ++
1 file changed, 2 insertions(+)
--- a/mdadm.h
+++ b/mdadm.h
@@ -1649,11 +1649,13 @@ static inline char *to_subarray(struct m
}
#ifdef DEBUG
+#undef dprintf
#define dprintf(fmt, arg...) \
fprintf(stderr, "%s: %s: "fmt, Name, __func__, ##arg)
#define dprintf_cont(fmt, arg...) \
fprintf(stderr, fmt, ##arg)
#else
+#undef dprintf
#define dprintf(fmt, arg...) \
({ if (0) fprintf(stderr, "%s: %s: " fmt, Name, __func__, ##arg); 0; })
#define dprintf_cont(fmt, arg...) \

29
package/utils/mdadm/patches/102-Add-missing-include-file-sys-sysmacros.h.patch
View File

@ -1,29 +0,0 @@
From 452dc4d13a012cdcb05088c0dbc699959c4d6c73 Mon Sep 17 00:00:00 2001
From: Baruch Siach <baruch@tkos.co.il>
Date: Tue, 6 Aug 2019 16:05:23 +0300
Subject: mdadm.h: include sysmacros.h unconditionally
musl libc now also requires sys/sysmacros.h for the major/minor macros.
All supported libc implementations carry sys/sysmacros.h, including
diet-libc, klibc, and uclibc-ng.
Cc: Hauke Mehrtens <hauke@hauke-m.de>
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Signed-off-by: Jes Sorensen <jsorensen@fb.com>
---
mdadm.h | 2 --
1 file changed, 2 deletions(-)
--- a/mdadm.h
+++ b/mdadm.h
@@ -45,10 +45,8 @@ extern __off64_t lseek64 __P ((int __fd,
#include <errno.h>
#include <string.h>
#include <syslog.h>
-#ifdef __GLIBC__
/* Newer glibc requires sys/sysmacros.h directly for makedev() */
#include <sys/sysmacros.h>
-#endif
#ifdef __dietlibc__
#include <strings.h>
/* dietlibc has deprecated random and srandom!! */

20
package/utils/mdadm/patches/200-reduce_size.patch
View File

@ -1,19 +1,19 @@
--- a/Incremental.c
+++ b/Incremental.c
@@ -1619,6 +1619,10 @@ static int Incremental_container(struct
if (ra_all == ra_blocked)
return 0;
@@ -983,6 +983,10 @@ static int array_try_spare(char *devname
goto next;
}
+#ifndef MDADM_FULL
+ return 0;
+#endif
+ #ifndef MDADM_FULL
+ return 0;
+ #endif
+
/* Now move all suitable spares from spare container */
domains = domain_from_array(list, st->ss->name);
memcpy(suuid, uuid_zero, sizeof(int[4]));
dl = domain_from_array(sra, st2->ss->name);
if (domain_test(dl, pol, st2->ss->name) != 1) {
/* domain test fails */
--- a/util.c
+++ b/util.c
@@ -1220,7 +1220,9 @@ void wait_for(char *dev, int fd)
@@ -1147,7 +1147,9 @@ void wait_for(char *dev, int fd)
struct superswitch *superlist[] =
{
&super0, &super1,

2
package/utils/ucode/Makefile
View File

@ -201,8 +201,8 @@ define Package/ucode-mod-uci/install
endef
$(eval $(call BuildPackage,ucode))
$(eval $(call BuildPackage,libucode))
$(eval $(call BuildPackage,ucode))
$(eval $(call BuildPackage,ucode-mod-fs))
$(eval $(call BuildPackage,ucode-mod-math))
$(eval $(call BuildPackage,ucode-mod-nl80211))

22
target/linux/at91/patches-5.10/115-net-macb-add-userio-bits-as-platform-configuration.patch
View File

@ -49,7 +49,7 @@ Signed-off-by: David S. Miller <davem@davemloft.net>
#ifdef CONFIG_MACB_USE_HWSTAMP
--- a/drivers/net/ethernet/cadence/macb_main.c
+++ b/drivers/net/ethernet/cadence/macb_main.c
@@ -3823,15 +3823,15 @@ static int macb_init(struct platform_dev
@@ -3831,15 +3831,15 @@ static int macb_init(struct platform_dev
if (!(bp->caps & MACB_CAPS_USRIO_DISABLED)) {
val = 0;
if (phy_interface_mode_is_rgmii(bp->phy_interface))
@ -69,7 +69,7 @@ Signed-off-by: David S. Miller <davem@davemloft.net>
macb_or_gem_writel(bp, USRIO, val);
}
@@ -4349,6 +4349,13 @@ static int fu540_c000_init(struct platfo
@@ -4357,6 +4357,13 @@ static int fu540_c000_init(struct platfo
return macb_init(pdev);
}
@ -83,7 +83,7 @@ Signed-off-by: David S. Miller <davem@davemloft.net>
static const struct macb_config fu540_c000_config = {
.caps = MACB_CAPS_GIGABIT_MODE_AVAILABLE | MACB_CAPS_JUMBO |
MACB_CAPS_GEM_HAS_PTP,
@@ -4356,12 +4363,14 @@ static const struct macb_config fu540_c0
@@ -4364,12 +4371,14 @@ static const struct macb_config fu540_c0
.clk_init = fu540_c000_clk_init,
.init = fu540_c000_init,
.jumbo_max_len = 10240,
@ -98,7 +98,7 @@ Signed-off-by: David S. Miller <davem@davemloft.net>
};
static const struct macb_config sama5d3macb_config = {
@@ -4369,6 +4378,7 @@ static const struct macb_config sama5d3m
@@ -4377,6 +4386,7 @@ static const struct macb_config sama5d3m
| MACB_CAPS_USRIO_HAS_CLKEN | MACB_CAPS_USRIO_DEFAULT_IS_MII_GMII,
.clk_init = macb_clk_init,
.init = macb_init,
@ -106,7 +106,7 @@ Signed-off-by: David S. Miller <davem@davemloft.net>
};
static const struct macb_config pc302gem_config = {
@@ -4376,6 +4386,7 @@ static const struct macb_config pc302gem
@@ -4384,6 +4394,7 @@ static const struct macb_config pc302gem
.dma_burst_length = 16,
.clk_init = macb_clk_init,
.init = macb_init,
@ -114,7 +114,7 @@ Signed-off-by: David S. Miller <davem@davemloft.net>
};
static const struct macb_config sama5d2_config = {
@@ -4383,6 +4394,7 @@ static const struct macb_config sama5d2_
@@ -4391,6 +4402,7 @@ static const struct macb_config sama5d2_
.dma_burst_length = 16,
.clk_init = macb_clk_init,
.init = macb_init,
@ -122,7 +122,7 @@ Signed-off-by: David S. Miller <davem@davemloft.net>
};
static const struct macb_config sama5d3_config = {
@@ -4392,6 +4404,7 @@ static const struct macb_config sama5d3_
@@ -4400,6 +4412,7 @@ static const struct macb_config sama5d3_
.clk_init = macb_clk_init,
.init = macb_init,
.jumbo_max_len = 10240,
@ -130,7 +130,7 @@ Signed-off-by: David S. Miller <davem@davemloft.net>
};
static const struct macb_config sama5d4_config = {
@@ -4399,18 +4412,21 @@ static const struct macb_config sama5d4_
@@ -4407,18 +4420,21 @@ static const struct macb_config sama5d4_
.dma_burst_length = 4,
.clk_init = macb_clk_init,
.init = macb_init,
@ -152,7 +152,7 @@ Signed-off-by: David S. Miller <davem@davemloft.net>
};
static const struct macb_config zynqmp_config = {
@@ -4421,6 +4437,7 @@ static const struct macb_config zynqmp_c
@@ -4429,6 +4445,7 @@ static const struct macb_config zynqmp_c
.clk_init = macb_clk_init,
.init = macb_init,
.jumbo_max_len = 10240,
@ -160,7 +160,7 @@ Signed-off-by: David S. Miller <davem@davemloft.net>
};
static const struct macb_config zynq_config = {
@@ -4429,6 +4446,7 @@ static const struct macb_config zynq_con
@@ -4437,6 +4454,7 @@ static const struct macb_config zynq_con
.dma_burst_length = 16,
.clk_init = macb_clk_init,
.init = macb_init,
@ -168,7 +168,7 @@ Signed-off-by: David S. Miller <davem@davemloft.net>
};
static const struct of_device_id macb_dt_ids[] = {
@@ -4549,6 +4567,8 @@ static int macb_probe(struct platform_de
@@ -4557,6 +4575,8 @@ static int macb_probe(struct platform_de
bp->wol |= MACB_WOL_HAS_MAGIC_PACKET;
device_set_wakeup_capable(&pdev->dev, bp->wol & MACB_WOL_HAS_MAGIC_PACKET);

8
target/linux/at91/patches-5.10/117-net-macb-add-function-to-disable-all-macb-clocks.patch
View File

@ -14,7 +14,7 @@ Signed-off-by: David S. Miller <davem@davemloft.net>
--- a/drivers/net/ethernet/cadence/macb_main.c
+++ b/drivers/net/ethernet/cadence/macb_main.c
@@ -3598,6 +3598,20 @@ static void macb_probe_queues(void __iom
@@ -3606,6 +3606,20 @@ static void macb_probe_queues(void __iom
*num_queues = hweight32(*queue_mask);
}
@ -35,7 +35,7 @@ Signed-off-by: David S. Miller <davem@davemloft.net>
static int macb_clk_init(struct platform_device *pdev, struct clk **pclk,
struct clk **hclk, struct clk **tx_clk,
struct clk **rx_clk, struct clk **tsu_clk)
@@ -4660,11 +4674,7 @@ err_out_free_netdev:
@@ -4668,11 +4682,7 @@ err_out_free_netdev:
free_netdev(dev);
err_disable_clocks:
@ -48,7 +48,7 @@ Signed-off-by: David S. Miller <davem@davemloft.net>
pm_runtime_disable(&pdev->dev);
pm_runtime_set_suspended(&pdev->dev);
pm_runtime_dont_use_autosuspend(&pdev->dev);
@@ -4689,11 +4699,8 @@ static int macb_remove(struct platform_d
@@ -4697,11 +4707,8 @@ static int macb_remove(struct platform_d
pm_runtime_disable(&pdev->dev);
pm_runtime_dont_use_autosuspend(&pdev->dev);
if (!pm_runtime_suspended(&pdev->dev)) {
@ -62,7 +62,7 @@ Signed-off-by: David S. Miller <davem@davemloft.net>
pm_runtime_set_suspended(&pdev->dev);
}
phylink_destroy(bp->phylink);
@@ -4872,13 +4879,10 @@ static int __maybe_unused macb_runtime_s
@@ -4880,13 +4887,10 @@ static int __maybe_unused macb_runtime_s
struct net_device *netdev = dev_get_drvdata(dev);
struct macb *bp = netdev_priv(netdev);

4
target/linux/at91/patches-5.10/118-net-macb-unprepare-clocks-in-case-of-failure.patch
View File

@ -14,7 +14,7 @@ Signed-off-by: David S. Miller <davem@davemloft.net>
--- a/drivers/net/ethernet/cadence/macb_main.c
+++ b/drivers/net/ethernet/cadence/macb_main.c
@@ -4330,8 +4330,10 @@ static int fu540_c000_clk_init(struct pl
@@ -4338,8 +4338,10 @@ static int fu540_c000_clk_init(struct pl
return err;
mgmt = devm_kzalloc(&pdev->dev, sizeof(*mgmt), GFP_KERNEL);
@ -27,7 +27,7 @@ Signed-off-by: David S. Miller <davem@davemloft.net>
init.name = "sifive-gemgxl-mgmt";
init.ops = &fu540_c000_ops;
@@ -4342,16 +4344,26 @@ static int fu540_c000_clk_init(struct pl
@@ -4350,16 +4352,26 @@ static int fu540_c000_clk_init(struct pl
mgmt->hw.init = &init;
*tx_clk = devm_clk_register(&pdev->dev, &mgmt->hw);

6
target/linux/at91/patches-5.10/119-net-macb-add-support-for-sama7g5-gem-interface.patch
View File

@ -14,7 +14,7 @@ Signed-off-by: David S. Miller <davem@davemloft.net>
--- a/drivers/net/ethernet/cadence/macb_main.c
+++ b/drivers/net/ethernet/cadence/macb_main.c
@@ -4382,6 +4382,14 @@ static const struct macb_usrio_config ma
@@ -4390,6 +4390,14 @@ static const struct macb_usrio_config ma
.refclk = MACB_BIT(CLKEN),
};
@ -29,7 +29,7 @@ Signed-off-by: David S. Miller <davem@davemloft.net>
static const struct macb_config fu540_c000_config = {
.caps = MACB_CAPS_GIGABIT_MODE_AVAILABLE | MACB_CAPS_JUMBO |
MACB_CAPS_GEM_HAS_PTP,
@@ -4475,6 +4483,14 @@ static const struct macb_config zynq_con
@@ -4483,6 +4491,14 @@ static const struct macb_config zynq_con
.usrio = &macb_default_usrio,
};
@ -44,7 +44,7 @@ Signed-off-by: David S. Miller <davem@davemloft.net>
static const struct of_device_id macb_dt_ids[] = {
{ .compatible = "cdns,at32ap7000-macb" },
{ .compatible = "cdns,at91sam9260-macb", .data = &at91sam9260_config },
@@ -4492,6 +4508,7 @@ static const struct of_device_id macb_dt
@@ -4500,6 +4516,7 @@ static const struct of_device_id macb_dt
{ .compatible = "cdns,zynqmp-gem", .data = &zynqmp_config},
{ .compatible = "cdns,zynq-gem", .data = &zynq_config },
{ .compatible = "sifive,fu540-c000-gem", .data = &fu540_c000_config },

4
target/linux/at91/patches-5.10/120-net-macb-add-support-for-sama7g5-emac-interface.patch
View File

@ -14,7 +14,7 @@ Signed-off-by: David S. Miller <davem@davemloft.net>
--- a/drivers/net/ethernet/cadence/macb_main.c
+++ b/drivers/net/ethernet/cadence/macb_main.c
@@ -4491,6 +4491,14 @@ static const struct macb_config sama7g5_
@@ -4499,6 +4499,14 @@ static const struct macb_config sama7g5_
.usrio = &sama7g5_usrio,
};
@ -29,7 +29,7 @@ Signed-off-by: David S. Miller <davem@davemloft.net>
static const struct of_device_id macb_dt_ids[] = {
{ .compatible = "cdns,at32ap7000-macb" },
{ .compatible = "cdns,at91sam9260-macb", .data = &at91sam9260_config },
@@ -4509,6 +4517,7 @@ static const struct of_device_id macb_dt
@@ -4517,6 +4525,7 @@ static const struct of_device_id macb_dt
{ .compatible = "cdns,zynq-gem", .data = &zynq_config },
{ .compatible = "sifive,fu540-c000-gem", .data = &fu540_c000_config },
{ .compatible = "microchip,sama7g5-gem", .data = &sama7g5_gem_config },

8
target/linux/at91/patches-5.10/133-dmaengine-at_xdmac-add-support-for-sama7g5-based-at_.patch
View File

@ -238,7 +238,7 @@ Signed-off-by: Vinod Koul <vkoul@kernel.org>
while (!(at_xdmac_chan_read(atchan, AT_XDMAC_CIS) & AT_XDMAC_CIS_FIS))
cpu_relax();
}
@@ -1760,7 +1810,7 @@ static int at_xdmac_device_pause(struct
@@ -1762,7 +1812,7 @@ static int at_xdmac_device_pause(struct
return 0;
spin_lock_irqsave(&atchan->lock, flags);
@ -247,7 +247,7 @@ Signed-off-by: Vinod Koul <vkoul@kernel.org>
while (at_xdmac_chan_read(atchan, AT_XDMAC_CC)
& (AT_XDMAC_CC_WRIP | AT_XDMAC_CC_RDIP))
cpu_relax();
@@ -1783,7 +1833,7 @@ static int at_xdmac_device_resume(struct
@@ -1785,7 +1835,7 @@ static int at_xdmac_device_resume(struct
return 0;
}
@ -256,7 +256,7 @@ Signed-off-by: Vinod Koul <vkoul@kernel.org>
clear_bit(AT_XDMAC_CHAN_IS_PAUSED, &atchan->status);
spin_unlock_irqrestore(&atchan->lock, flags);
@@ -1985,6 +2035,10 @@ static int at_xdmac_probe(struct platfor
@@ -1987,6 +2037,10 @@ static int at_xdmac_probe(struct platfor
atxdmac->regs = base;
atxdmac->irq = irq;
@ -267,7 +267,7 @@ Signed-off-by: Vinod Koul <vkoul@kernel.org>
atxdmac->clk = devm_clk_get(&pdev->dev, "dma_clk");
if (IS_ERR(atxdmac->clk)) {
dev_err(&pdev->dev, "can't get dma_clk\n");
@@ -2127,6 +2181,10 @@ static const struct dev_pm_ops atmel_xdm
@@ -2129,6 +2183,10 @@ static const struct dev_pm_ops atmel_xdm
static const struct of_device_id atmel_xdmac_dt_ids[] = {
{
.compatible = "atmel,sama5d4-dma",

4
target/linux/at91/patches-5.10/134-dmaengine-at_xdmac-add-AXI-priority-support-and-reco.patch
View File

@ -71,7 +71,7 @@ Signed-off-by: Vinod Koul <vkoul@kernel.org>
};
static inline void __iomem *at_xdmac_chan_reg_base(struct at_xdmac *atxdmac, unsigned int chan_nb)
@@ -1996,6 +2017,30 @@ static int atmel_xdmac_resume(struct dev
@@ -1998,6 +2019,30 @@ static int atmel_xdmac_resume(struct dev
}
#endif /* CONFIG_PM_SLEEP */
@ -102,7 +102,7 @@ Signed-off-by: Vinod Koul <vkoul@kernel.org>
static int at_xdmac_probe(struct platform_device *pdev)
{
struct at_xdmac *atxdmac;
@@ -2140,6 +2185,8 @@ static int at_xdmac_probe(struct platfor
@@ -2142,6 +2187,8 @@ static int at_xdmac_probe(struct platfor
dev_info(&pdev->dev, "%d channels, mapped at 0x%p\n",
nr_channels, atxdmac->regs);

6
target/linux/at91/patches-5.10/148-net-macb-Add-default-usrio-config-to-default-gem-con.patch
View File

@ -20,7 +20,7 @@ Signed-off-by: David S. Miller <davem@davemloft.net>
--- a/drivers/net/ethernet/cadence/macb_main.c
+++ b/drivers/net/ethernet/cadence/macb_main.c
@@ -3860,6 +3860,13 @@ static int macb_init(struct platform_dev
@@ -3868,6 +3868,13 @@ static int macb_init(struct platform_dev
return 0;
}
@ -34,7 +34,7 @@ Signed-off-by: David S. Miller <davem@davemloft.net>
#if defined(CONFIG_OF)
/* 1518 rounded up */
#define AT91ETHER_MAX_RBUFF_SZ 0x600
@@ -4375,13 +4382,6 @@ static int fu540_c000_init(struct platfo
@@ -4383,13 +4390,6 @@ static int fu540_c000_init(struct platfo
return macb_init(pdev);
}
@ -48,7 +48,7 @@ Signed-off-by: David S. Miller <davem@davemloft.net>
static const struct macb_usrio_config sama7g5_usrio = {
.mii = 0,
.rmii = 1,
@@ -4530,6 +4530,7 @@ static const struct macb_config default_
@@ -4538,6 +4538,7 @@ static const struct macb_config default_
.dma_burst_length = 16,
.clk_init = macb_clk_init,
.init = macb_init,

169
target/linux/ath79/dts/ar7161_netgear_wndap360.dts Normal file
View File

@ -0,0 +1,169 @@
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
#include "ar7100.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
/ {
compatible = "netgear,wndap360", "qca,ar7161";
model = "Netgear WNDAP360";
aliases {
led-boot = &led_power_orange;
led-failsafe = &led_power_orange;
led-running = &led_power_orange;
led-upgrade = &led_power_orange;
};
extosc: ref {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-output-names = "ref";
clock-frequency = <40000000>;
};
leds {
compatible = "gpio-leds";
led_power_orange: power_orange {
label = "orange:power";
gpios = <&gpio 0 GPIO_ACTIVE_LOW>;
};
};
ath9k-leds {
compatible = "gpio-leds";
wifi_2g_green {
label = "green:wlan2g";
gpios = <&ath9k0 5 GPIO_ACTIVE_LOW>;
linux,default-trigger = "phy0tpt";
};
wifi_5g_green {
label = "green:wlan5g";
gpios = <&ath9k1 5 GPIO_ACTIVE_LOW>;
linux,default-trigger = "phy1tpt";
};
};
keys {
compatible = "gpio-keys";
reset {
label = "reset";
linux,code = <KEY_RESTART>;
gpios = <&gpio 8 GPIO_ACTIVE_LOW>;
};
};
};
&mdio0 {
status = "okay";
phy-mask = <0x0f>;
phy1: ethernet-phy@1 {
reg = <0x1>;
};
};
&eth0 {
status = "okay";
phy-mode = "rgmii";
phy-handle = <&phy1>;
nvmem-cells = <&macaddr_art_0>;
nvmem-cell-names = "mac-address";
};
&spi {
status = "okay";
flash@0 {
compatible = "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <50000000>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "u-boot";
reg = <0x0 0x040000>;
read-only;
};
partition@40000 {
label = "u-boot-env";
reg = <0x40000 0x010000>;
read-only;
};
partition@50000 {
compatible = "denx,uimage";
label = "firmware";
reg = <0x50000 0x790000>;
};
partition@7e0000 {
label = "nvram";
reg = <0x7e0000 0x010000>;
read-only;
};
art: partition@7f0000 {
label = "art";
reg = <0x7f0000 0x010000>;
read-only;
};
};
};
};
&pcie0 {
status = "okay";
ath9k0: wifi@0,11 {
compatible = "pci168c,0029";
reg = <0x8800 0 0 0 0>;
qca,no-eeprom;
nvmem-cells = <&macaddr_art_120c>;
nvmem-cell-names = "mac-address";
#gpio-cells = <2>;
gpio-controller;
};
ath9k1: wifi@0,12 {
compatible = "pci168c,0029";
reg = <0x9000 0 0 0 0>;
qca,no-eeprom;
nvmem-cells = <&macaddr_art_520c>;
nvmem-cell-names = "mac-address";
mac-address-increment = <1>;
#gpio-cells = <2>;
gpio-controller;
};
};
&art {
compatible = "nvmem-cells";
#address-cells = <1>;
#size-cells = <1>;
macaddr_art_0: macaddr@0 {
reg = <0x0 0x6>;
};
macaddr_art_120c: macaddr@120c {
reg = <0x120c 0x6>;
};
macaddr_art_520c: macaddr@520c {
reg = <0x520c 0x6>;
};
};

6
target/linux/ath79/dts/qca9531_glinet_gl-ar300m-lite.dts
View File

@ -7,6 +7,8 @@
model = "GL.iNet GL-AR300M-Lite";
};
/delete-node/ &reg_usb_vbus;
/delete-node/ &nand_flash;
&nor_firmware {
@ -27,3 +29,7 @@
&led_wlan {
label = "green:wlan";
};
&usb0 {
/delete-property/ vbus-supply;
};

11
target/linux/ath79/dts/qca9531_glinet_gl-ar300m.dtsi
View File

@ -37,6 +37,16 @@
};
};
reg_usb_vbus: reg_usb_vbus {
compatible = "regulator-fixed";
regulator-name = "usb_vbus";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
gpio = <&gpio 2 GPIO_ACTIVE_HIGH>;
enable-active-high;
};
leds {
compatible = "gpio-leds";
@ -134,6 +144,7 @@
&usb0 {
#address-cells = <1>;
#size-cells = <0>;
vbus-supply = <&reg_usb_vbus>;
status = "okay";
};

147
target/linux/ath79/dts/qca9563_tplink_deco-m4r-v1.dts Normal file
View File

@ -0,0 +1,147 @@
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include "qca956x.dtsi"
/ {
compatible = "tplink,deco-m4r-v1", "qca,qca9563";
model = "TP-Link Deco M4R v1";
aliases {
led-boot = &led_power;
led-failsafe = &led_power;
led-running = &led_power;
led-upgrade = &led_power;
};
leds {
compatible = "gpio-leds";
wlan2g {
label = "red:wlan2g";
gpios = <&gpio 1 GPIO_ACTIVE_LOW>;
linux,default-trigger = "phy1tpt";
};
led_power: power {
label = "green:power";
gpios = <&gpio 7 GPIO_ACTIVE_LOW>;
default-state = "on";
};
wlan5g {
label = "blue:wlan5g";
gpios = <&gpio 9 GPIO_ACTIVE_LOW>;
linux,default-trigger = "phy0tpt";
};
};
keys {
compatible = "gpio-keys";
reset {
label = "Reset button";
linux,code = <KEY_RESTART>;
gpios = <&gpio 2 GPIO_ACTIVE_LOW>;
debounce-interval = <60>;
};
};
};
&pcie {
status = "okay";
};
&mdio0 {
status = "okay";
phy-mask = <0>;
phy0: ethernet-phy@0 {
reg = <0>;
phy-mode = "sgmii";
qca,mib-poll-interval = <500>;
qca,ar8327-initvals = <
0x04 0x00080080 /* PORT0 PAD MODE CTRL */
0x7c 0x0000007e /* PORT0_STATUS */
>;
};
};
&spi {
status = "okay";
num-cs = <1>;
flash@0 {
compatible = "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <25000000>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
uboot: partition@0 {
label = "u-boot";
reg = <0x000000 0x080000>;
read-only;
};
partition@80000 {
compatible = "denx,uimage";
label = "firmware";
reg = <0x080000 0xe00000>;
};
partition@e80000 {
label = "product-info";
reg = <0xe80000 0x05000>;
read-only;
};
config: partition@e85000 {
label = "config";
reg = <0xe85000 0x16b000>;
read-only;
};
art: partition@ff0000 {
label = "art";
reg = <0xff0000 0x010000>;
read-only;
};
};
};
};
&eth0 {
status = "okay";
phy-mode = "sgmii";
phy-handle = <&phy0>;
nvmem-cells = <&macaddr_config_8>;
nvmem-cell-names = "mac-address";
};
&wmac {
status = "okay";
mtd-cal-data = <&art 0x1000>;
nvmem-cells = <&macaddr_config_8>;
nvmem-cell-names = "mac-address";
};
&config {
compatible = "nvmem-cells";
#address-cells = <1>;
#size-cells = <1>;
macaddr_config_8: macaddr@8 {
reg = <0x8 0x6>;
};
};

2
target/linux/ath79/dts/qca9563_tplink_eap245-v3.dts
View File

@ -7,7 +7,7 @@
/ {
compatible = "tplink,eap245-v3", "qca,qca9563";
model = "TP-Link EAP245 v3";
model = "TP-Link EAP245 v3 / EAP265 HD v1";
aliases {
led-boot = &led_status_green;

4
target/linux/ath79/generic/base-files/etc/board.d/01_leds
View File

@ -474,10 +474,6 @@ wd,mynet-wifi-rangeextender)
xiaomi,aiot-ac2350)
ucidef_set_led_switch "wan" "WAN" "blue:wan" "switch0" "0x02"
;;
xwrt,csac)
ucidef_set_led_wlan "wlan5g" "WLAN5G" "blue:wlan5g" "phy1tpt"
ucidef_set_led_wlan "wlan2g" "WLAN2G" "blue:wlan2g" "phy0tpt"
;;
yuncore,a770)
ucidef_set_led_netdev "wan" "WAN" "green:wan" "eth1"
ucidef_set_led_switch "lan" "LAN" "green:lan" "switch0" "0x10"

13
target/linux/ath79/generic/base-files/etc/board.d/02_network
View File

@ -49,6 +49,7 @@ ath79_setup_interfaces()
netgear,ex6400|\
netgear,ex7300|\
netgear,ex7300-v2|\
netgear,wndap360|\
ocedo,koala|\
ocedo,raccoon|\
onion,omega|\
@ -315,8 +316,7 @@ ath79_setup_interfaces()
iodata,wn-ac1600dgr2|\
iodata,wn-ag300dgr|\
pcs,cr5000|\
wd,mynet-n750|\
xwrt,csac)
wd,mynet-n750)
ucidef_add_switch "switch0" \
"0@eth0" "1:lan" "2:lan" "3:lan" "4:lan" "5:wan"
;;
@ -509,6 +509,10 @@ ath79_setup_interfaces()
ucidef_add_switch "switch0" \
"0@eth0" "1:lan" "2:lan"
;;
tplink,deco-m4r-v1)
ucidef_add_switch "switch0" \
"0@eth0" "3:lan:1" "5:lan:2"
;;
hiwifi,hc6361|\
xiaomi,mi-router-4q|\
zbtlink,zbt-wd323)
@ -742,11 +746,6 @@ ath79_setup_macs()
xiaomi,aiot-ac2350)
lan_mac=$(mtd_get_mac_binary art 0x1002)
;;
xwrt,csac)
wan_mac=$(mtd_get_mac_binary art 0)
lan_mac=$(macaddr_add "$wan_mac" 1)
label_mac=$wan_mac
;;
zyxel,nbg6616)
label_mac=$(mtd_get_mac_ascii u-boot-env ethaddr)
;;

6
target/linux/ath79/generic/base-files/etc/hotplug.d/firmware/10-ath9k-eeprom
View File

@ -152,7 +152,8 @@ case "$FIRMWARE" in
"ath9k-eeprom-pci-0000:00:11.0.bin")
case $board in
buffalo,wzr-600dhp|\
buffalo,wzr-hp-ag300h)
buffalo,wzr-hp-ag300h|\
netgear,wndap360)
caldata_extract "art" 0x1000 0xeb8
;;
dlink,dir-825-b1)
@ -170,7 +171,8 @@ case "$FIRMWARE" in
"ath9k-eeprom-pci-0000:00:12.0.bin")
case $board in
buffalo,wzr-600dhp|\
buffalo,wzr-hp-ag300h)
buffalo,wzr-hp-ag300h|\
netgear,wndap360)
caldata_extract "art" 0x5000 0xeb8
;;
dlink,dir-825-b1)

7
target/linux/ath79/generic/base-files/etc/hotplug.d/firmware/11-ath10k-caldata
View File

@ -269,7 +269,12 @@ case "$FIRMWARE" in
ln -sf /lib/firmware/ath10k/pre-cal-pci-0000\:00\:00.0.bin \
/lib/firmware/ath10k/QCA9984/hw1.0/board.bin
;;
xwrt,csac|\
tplink,deco-m4r-v1)
caldata_extract "art" 0x5000 0x2f20
ath10k_patch_mac $(macaddr_add $(mtd_get_mac_binary config 0x8) -1)
ln -sf /lib/firmware/ath10k/pre-cal-pci-0000\:00\:00.0.bin \
/lib/firmware/ath10k/QCA9888/hw2.0/board.bin
;;
yuncore,a782|\
yuncore,xd4200)
caldata_extract "art" 0x5000 0x2f20

15
target/linux/ath79/image/generic-tp-link.mk
View File

@ -451,11 +451,26 @@ define Device/tplink_eap245-v3
IMAGE_SIZE := 14592k
DEVICE_MODEL := EAP245
DEVICE_VARIANT := v3
DEVICE_ALT0_VENDOR := $$(DEVICE_VENDOR)
DEVICE_ALT0_MODEL := EAP265 HD
DEVICE_ALT0_VARIANT := v1
DEVICE_PACKAGES := kmod-ath10k-ct ath10k-firmware-qca99x0-ct
TPLINK_BOARD_ID := EAP245-V3
endef
TARGET_DEVICES += tplink_eap245-v3
define Device/tplink_deco-m4r-v1
$(Device/tplink-safeloader-uimage)
SOC := qca9563
IMAGE_SIZE := 13824k
DEVICE_MODEL := Deco M4R
DEVICE_VARIANT := v1
DEVICE_PACKAGES := kmod-ath10k-ct ath10k-firmware-qca9888-ct
SUPPORTED_DEVICES += deco-m4r-v1
TPLINK_BOARD_ID := DECO-M4R-V1
endef
TARGET_DEVICES += tplink_deco-m4r-v1
define Device/tplink_re350k-v1
$(Device/tplink-safeloader)
SOC := qca9558

15
target/linux/ath79/image/generic.mk
View File

@ -1655,6 +1655,21 @@ define Device/netgear_ex7300-v2
endef
TARGET_DEVICES += netgear_ex7300-v2
define Device/netgear_wndap360
$(Device/netgear_generic)
SOC := ar7161
DEVICE_MODEL := WNDAP360
DEVICE_PACKAGES := kmod-leds-reset kmod-owl-loader
IMAGE_SIZE := 7744k
BLOCKSIZE := 256k
KERNEL := kernel-bin | append-dtb | gzip | uImage gzip
KERNEL_INITRAMFS := kernel-bin | append-dtb | uImage none
IMAGES := sysupgrade.bin
IMAGE/sysupgrade.bin := append-kernel | pad-to 64k | append-rootfs | pad-rootfs | \
check-size | append-metadata
endef
TARGET_DEVICES += netgear_wndap360
define Device/netgear_wndr3x00
$(Device/netgear_generic)
SOC := ar7161

4
target/linux/ath79/patches-5.10/910-unaligned_access_hacks.patch
View File

@ -799,7 +799,7 @@
*sum = csum_fold(csum_partial(diff, sizeof(diff),
--- a/include/linux/etherdevice.h
+++ b/include/linux/etherdevice.h
@@ -500,7 +500,7 @@ static inline bool is_etherdev_addr(cons
@@ -499,7 +499,7 @@ static inline bool is_etherdev_addr(cons
* @b: Pointer to Ethernet header
*
* Compare two Ethernet headers, returns 0 if equal.
@ -808,7 +808,7 @@
* aligned OR the platform can handle unaligned access. This is the
* case for all packets coming into netif_receive_skb or similar
* entry points.
@@ -523,11 +523,12 @@ static inline unsigned long compare_ethe
@@ -522,11 +522,12 @@ static inline unsigned long compare_ethe
fold |= *(unsigned long *)(a + 6) ^ *(unsigned long *)(b + 6);
return fold;
#else

2
target/linux/bcm27xx/patches-5.10/950-0383-drm-panel-raspberrypi-ts-Insert-delay-before-polling.patch
View File

@ -16,7 +16,7 @@ Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.com>
--- a/drivers/gpu/drm/panel/panel-raspberrypi-touchscreen.c
+++ b/drivers/gpu/drm/panel/panel-raspberrypi-touchscreen.c
@@ -299,6 +299,7 @@ static int rpi_touchscreen_enable(struct
@@ -299,6 +299,7 @@ static int rpi_touchscreen_prepare(struc
int i;
rpi_touchscreen_i2c_write(ts, REG_POWERON, 1);

2
target/linux/bcm27xx/patches-5.10/950-0562-drm-vc4-dsi-Introduce-a-variant-structure.patch
View File

@ -66,7 +66,7 @@ Link: https://patchwork.freedesktop.org/patch/msgid/20201203132543.861591-5-maxi
struct vc4_dsi_encoder {
@@ -837,7 +848,7 @@ static void vc4_dsi_encoder_enable(struc
ret = pm_runtime_get_sync(dev);
ret = pm_runtime_resume_and_get(dev);
if (ret) {
- DRM_ERROR("Failed to runtime PM enable on DSI%d\n", dsi->port);
+ DRM_ERROR("Failed to runtime PM enable on DSI%d\n", dsi->variant->port);

4
target/linux/generic/backport-5.10/732-net-next-1-of-net-pass-the-dst-buffer-to-of_get_mac_address.patch
View File

@ -423,7 +423,7 @@ Signed-off-by: David S. Miller <davem@davemloft.net>
if (bgmac->irq < 0)
--- a/drivers/net/ethernet/cadence/macb_main.c
+++ b/drivers/net/ethernet/cadence/macb_main.c
@@ -4479,7 +4479,6 @@ static int macb_probe(struct platform_de
@@ -4487,7 +4487,6 @@ static int macb_probe(struct platform_de
struct net_device *dev;
struct resource *regs;
void __iomem *mem;
@ -431,7 +431,7 @@ Signed-off-by: David S. Miller <davem@davemloft.net>
struct macb *bp;
int err, val;
@@ -4592,15 +4591,11 @@ static int macb_probe(struct platform_de
@@ -4600,15 +4599,11 @@ static int macb_probe(struct platform_de
if (bp->caps & MACB_CAPS_NEEDS_RSTONUBR)
bp->rx_intr_mask |= MACB_BIT(RXUBR);

82
target/linux/generic/backport-5.15/400-mtdblock-warn-if-opened-on-NAND.patch Normal file
View File

@ -0,0 +1,82 @@
From 96a3295c351da82d7af99b2fc004a3cf9f4716a9 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Bj=C3=B8rn=20Mork?= <bjorn@mork.no>
Date: Mon, 28 Mar 2022 18:11:08 +0200
Subject: [PATCH] mtdblock: warn if opened on NAND
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
Warning on every translated mtd partition results in excessive log noise
if this driver is loaded:
nand: device found, Manufacturer ID: 0xc2, Chip ID: 0xf1
nand: Macronix MX30LF1G18AC
nand: 128 MiB, SLC, erase size: 128 KiB, page size: 2048, OOB size: 64
mt7621-nand 1e003000.nand: ECC strength adjusted to 4 bits
read_bbt: found bbt at block 1023
10 fixed-partitions partitions found on MTD device mt7621-nand
Creating 10 MTD partitions on "mt7621-nand":
0x000000000000-0x000000080000 : "Bootloader"
mtdblock: MTD device 'Bootloader' is NAND, please consider using UBI block devices instead.
0x000000080000-0x000000100000 : "Config"
mtdblock: MTD device 'Config' is NAND, please consider using UBI block devices instead.
0x000000100000-0x000000140000 : "Factory"
mtdblock: MTD device 'Factory' is NAND, please consider using UBI block devices instead.
0x000000140000-0x000002000000 : "Kernel"
mtdblock: MTD device 'Kernel' is NAND, please consider using UBI block devices instead.
0x000000540000-0x000002000000 : "ubi"
mtdblock: MTD device 'ubi' is NAND, please consider using UBI block devices instead.
0x000002140000-0x000004000000 : "Kernel2"
mtdblock: MTD device 'Kernel2' is NAND, please consider using UBI block devices instead.
0x000004000000-0x000004100000 : "wwan"
mtdblock: MTD device 'wwan' is NAND, please consider using UBI block devices instead.
0x000004100000-0x000005100000 : "data"
mtdblock: MTD device 'data' is NAND, please consider using UBI block devices instead.
0x000005100000-0x000005200000 : "rom-d"
mtdblock: MTD device 'rom-d' is NAND, please consider using UBI block devices instead.
0x000005200000-0x000005280000 : "reserve"
mtdblock: MTD device 'reserve' is NAND, please consider using UBI block devices instead.
mtk_soc_eth 1e100000.ethernet eth0: mediatek frame engine at 0xbe100000, irq 21
This is more likely to annoy than to help users of embedded distros where
this driver is enabled by default. Making the blockdevs available does
not imply that they are in use, and warning about bootloader partitions
or other devices which obviously never will be mounted is more confusing
than helpful.
Move the warning to open(), where it will be of more use - actually warning
anyone who mounts a file system on NAND using mtdblock.
Fixes: e07403a8c6be ("mtdblock: Warn if added for a NAND device")
Signed-off-by: Bjørn Mork <bjorn@mork.no>
Reviewed-by: Ezequiel Garcia <ezequiel@vanguardiasur.com.ar>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/linux-mtd/20220328161108.87757-1-bjorn@mork.no
---
drivers/mtd/mtdblock.c | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
--- a/drivers/mtd/mtdblock.c
+++ b/drivers/mtd/mtdblock.c
@@ -257,6 +257,10 @@ static int mtdblock_open(struct mtd_blkt
return 0;
}
+ if (mtd_type_is_nand(mbd->mtd))
+ pr_warn("%s: MTD device '%s' is NAND, please consider using UBI block devices instead.\n",
+ mbd->tr->name, mbd->mtd->name);
+
/* OK, it's not open. Create cache info for it */
mtdblk->count = 1;
mutex_init(&mtdblk->cache_mutex);
@@ -322,10 +326,6 @@ static void mtdblock_add_mtd(struct mtd_
if (!(mtd->flags & MTD_WRITEABLE))
dev->mbd.readonly = 1;
- if (mtd_type_is_nand(mtd))
- pr_warn("%s: MTD device '%s' is NAND, please consider using UBI block devices instead.\n",
- tr->name, mtd->name);
-
if (add_mtd_blktrans_dev(&dev->mbd))
kfree(dev);
}

2
target/linux/generic/config-5.15
View File

@ -4655,6 +4655,7 @@ CONFIG_PCI_SYSCALL=y
# CONFIG_PHY_MIXEL_MIPI_DPHY is not set
# CONFIG_PHY_MTK_HDMI is not set
# CONFIG_PHY_MTK_MIPI_DSI is not set
# CONFIG_PHY_MVEBU_CP110_UTMI is not set
# CONFIG_PHY_OCELOT_SERDES is not set
# CONFIG_PHY_PISTACHIO_USB is not set
# CONFIG_PHY_PXA_28NM_HSIC is not set
@ -4857,6 +4858,7 @@ CONFIG_PWRSEQ_SIMPLE=y
# CONFIG_QCOM_LMH is not set
# CONFIG_QCOM_QDF2400_ERRATUM_0065 is not set
# CONFIG_QCOM_SPMI_ADC5 is not set
# CONFIG_QCOM_SPMI_ADC_TM5 is not set
# CONFIG_QCOM_SPMI_IADC is not set
# CONFIG_QCOM_SPMI_TEMP_ALARM is not set
# CONFIG_QCOM_SPMI_VADC is not set

7
target/linux/generic/hack-5.15/410-block-fit-partition-parser.patch
View File

@ -112,13 +112,12 @@
dev->gd = gd;
--- a/drivers/mtd/mtd_blkdevs.c
+++ b/drivers/mtd/mtd_blkdevs.c
@@ -345,6 +345,9 @@ int add_mtd_blktrans_dev(struct mtd_blkt
@@ -345,6 +345,8 @@ int add_mtd_blktrans_dev(struct mtd_blkt
gd->first_minor = (new->devnum) << tr->part_bits;
gd->minors = 1 << tr->part_bits;
gd->fops = &mtd_block_ops;
+#ifdef CONFIG_FIT_PARTITION
+ gd->flags |= GENHD_FL_EXT_DEVT;
+#endif
+ if (IS_ENABLED(CONFIG_FIT_PARTITION) && !mtd_type_is_nand(new->mtd))
+ gd->flags |= GENHD_FL_EXT_DEVT;
if (tr->part_bits)
if (new->devnum < 26)

6
target/linux/generic/pending-5.10/630-packet_socket_type.patch
View File

@ -87,7 +87,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
if (!net_eq(dev_net(dev), sock_net(sk)))
goto drop;
@@ -3325,6 +3327,7 @@ static int packet_create(struct net *net
@@ -3330,6 +3332,7 @@ static int packet_create(struct net *net
mutex_init(&po->pg_vec_lock);
po->rollover = NULL;
po->prot_hook.func = packet_rcv;
@ -95,7 +95,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
if (sock->type == SOCK_PACKET)
po->prot_hook.func = packet_rcv_spkt;
@@ -3969,6 +3972,16 @@ packet_setsockopt(struct socket *sock, i
@@ -3974,6 +3977,16 @@ packet_setsockopt(struct socket *sock, i
po->xmit = val ? packet_direct_xmit : dev_queue_xmit;
return 0;
}
@ -112,7 +112,7 @@ Signed-off-by: Felix Fietkau <nbd@nbd.name>
default:
return -ENOPROTOOPT;
}
@@ -4025,6 +4038,13 @@ static int packet_getsockopt(struct sock
@@ -4030,6 +4043,13 @@ static int packet_getsockopt(struct sock
case PACKET_VNET_HDR:
val = po->has_vnet_hdr;
break;

18
target/linux/generic/pending-5.10/670-ipv6-allow-rejecting-with-source-address-failed-policy.patch
View File

@ -157,7 +157,7 @@ Signed-off-by: Jonas Gorski <jogo@openwrt.org>
case RTN_THROW:
case RTN_UNREACHABLE:
default:
@@ -4448,6 +4467,17 @@ static int ip6_pkt_prohibit_out(struct n
@@ -4449,6 +4468,17 @@ static int ip6_pkt_prohibit_out(struct n
return ip6_pkt_drop(skb, ICMPV6_ADM_PROHIBITED, IPSTATS_MIB_OUTNOROUTES);
}
@ -175,7 +175,7 @@ Signed-off-by: Jonas Gorski <jogo@openwrt.org>
/*
* Allocate a dst for local (unicast / anycast) address.
*/
@@ -4928,7 +4958,8 @@ static int rtm_to_fib6_config(struct sk_
@@ -4929,7 +4959,8 @@ static int rtm_to_fib6_config(struct sk_
if (rtm->rtm_type == RTN_UNREACHABLE ||
rtm->rtm_type == RTN_BLACKHOLE ||
rtm->rtm_type == RTN_PROHIBIT ||
@ -185,7 +185,7 @@ Signed-off-by: Jonas Gorski <jogo@openwrt.org>
cfg->fc_flags |= RTF_REJECT;
if (rtm->rtm_type == RTN_LOCAL)
@@ -6127,6 +6158,8 @@ static int ip6_route_dev_notify(struct n
@@ -6128,6 +6159,8 @@ static int ip6_route_dev_notify(struct n
#ifdef CONFIG_IPV6_MULTIPLE_TABLES
net->ipv6.ip6_prohibit_entry->dst.dev = dev;
net->ipv6.ip6_prohibit_entry->rt6i_idev = in6_dev_get(dev);
@ -194,7 +194,7 @@ Signed-off-by: Jonas Gorski <jogo@openwrt.org>
net->ipv6.ip6_blk_hole_entry->dst.dev = dev;
net->ipv6.ip6_blk_hole_entry->rt6i_idev = in6_dev_get(dev);
#endif
@@ -6138,6 +6171,7 @@ static int ip6_route_dev_notify(struct n
@@ -6139,6 +6172,7 @@ static int ip6_route_dev_notify(struct n
in6_dev_put_clear(&net->ipv6.ip6_null_entry->rt6i_idev);
#ifdef CONFIG_IPV6_MULTIPLE_TABLES
in6_dev_put_clear(&net->ipv6.ip6_prohibit_entry->rt6i_idev);
@ -202,7 +202,7 @@ Signed-off-by: Jonas Gorski <jogo@openwrt.org>
in6_dev_put_clear(&net->ipv6.ip6_blk_hole_entry->rt6i_idev);
#endif
}
@@ -6329,6 +6363,8 @@ static int __net_init ip6_route_net_init
@@ -6330,6 +6364,8 @@ static int __net_init ip6_route_net_init
#ifdef CONFIG_IPV6_MULTIPLE_TABLES
net->ipv6.fib6_has_custom_rules = false;
@ -211,7 +211,7 @@ Signed-off-by: Jonas Gorski <jogo@openwrt.org>
net->ipv6.ip6_prohibit_entry = kmemdup(&ip6_prohibit_entry_template,
sizeof(*net->ipv6.ip6_prohibit_entry),
GFP_KERNEL);
@@ -6339,11 +6375,21 @@ static int __net_init ip6_route_net_init
@@ -6340,11 +6376,21 @@ static int __net_init ip6_route_net_init
ip6_template_metrics, true);
INIT_LIST_HEAD(&net->ipv6.ip6_prohibit_entry->rt6i_uncached);
@ -234,7 +234,7 @@ Signed-off-by: Jonas Gorski <jogo@openwrt.org>
net->ipv6.ip6_blk_hole_entry->dst.ops = &net->ipv6.ip6_dst_ops;
dst_init_metrics(&net->ipv6.ip6_blk_hole_entry->dst,
ip6_template_metrics, true);
@@ -6370,6 +6416,8 @@ out:
@@ -6371,6 +6417,8 @@ out:
return ret;
#ifdef CONFIG_IPV6_MULTIPLE_TABLES
@ -243,7 +243,7 @@ Signed-off-by: Jonas Gorski <jogo@openwrt.org>
out_ip6_prohibit_entry:
kfree(net->ipv6.ip6_prohibit_entry);
out_ip6_null_entry:
@@ -6389,6 +6437,7 @@ static void __net_exit ip6_route_net_exi
@@ -6390,6 +6438,7 @@ static void __net_exit ip6_route_net_exi
kfree(net->ipv6.ip6_null_entry);
#ifdef CONFIG_IPV6_MULTIPLE_TABLES
kfree(net->ipv6.ip6_prohibit_entry);
@ -251,7 +251,7 @@ Signed-off-by: Jonas Gorski <jogo@openwrt.org>
kfree(net->ipv6.ip6_blk_hole_entry);
#endif
dst_entries_destroy(&net->ipv6.ip6_dst_ops);
@@ -6466,6 +6515,9 @@ void __init ip6_route_init_special_entri
@@ -6467,6 +6516,9 @@ void __init ip6_route_init_special_entri
init_net.ipv6.ip6_prohibit_entry->rt6i_idev = in6_dev_get(init_net.loopback_dev);
init_net.ipv6.ip6_blk_hole_entry->dst.dev = init_net.loopback_dev;
init_net.ipv6.ip6_blk_hole_entry->rt6i_idev = in6_dev_get(init_net.loopback_dev);

2
target/linux/ipq40xx/Makefile
View File

@ -9,7 +9,7 @@ CPU_SUBTYPE:=neon-vfpv4
SUBTARGETS:=generic chromium mikrotik
KERNEL_PATCHVER:=5.10
KERNEL_TESTING_PATCHVER:=5.10
KERNEL_TESTING_PATCHVER:=5.15
KERNELNAME:=zImage Image dtbs

2
target/linux/ipq40xx/chromium/config-default
View File

@ -1,6 +1,6 @@
CONFIG_BLK_DEV_SD=y
CONFIG_BLK_SCSI_REQUEST=y
CONFIG_SCSI=y
CONFIG_SCSI_COMMON=y
CONFIG_SG_POOL=y
CONFIG_USB_DWC3=y
CONFIG_USB_DWC3_HOST=y

504
target/linux/ipq40xx/config-5.15 Normal file
View File

@ -0,0 +1,504 @@
CONFIG_ALIGNMENT_TRAP=y
# CONFIG_APQ_GCC_8084 is not set
# CONFIG_APQ_MMCC_8084 is not set
CONFIG_AR40XX_PHY=y
CONFIG_ARCH_32BIT_OFF_T=y
CONFIG_ARCH_HIBERNATION_POSSIBLE=y
CONFIG_ARCH_IPQ40XX=y
CONFIG_ARCH_KEEP_MEMBLOCK=y
# CONFIG_ARCH_MDM9615 is not set
CONFIG_ARCH_MIGHT_HAVE_PC_PARPORT=y
# CONFIG_ARCH_MSM8960 is not set
# CONFIG_ARCH_MSM8974 is not set
# CONFIG_ARCH_MSM8X60 is not set
CONFIG_ARCH_MULTIPLATFORM=y
CONFIG_ARCH_MULTI_V6_V7=y
CONFIG_ARCH_MULTI_V7=y
CONFIG_ARCH_NR_GPIO=0
CONFIG_ARCH_OPTIONAL_KERNEL_RWX=y
CONFIG_ARCH_OPTIONAL_KERNEL_RWX_DEFAULT=y
CONFIG_ARCH_QCOM=y
CONFIG_ARCH_SELECT_MEMORY_MODEL=y
CONFIG_ARCH_SPARSEMEM_ENABLE=y
CONFIG_ARCH_SUSPEND_POSSIBLE=y
CONFIG_ARM=y
CONFIG_ARM_AMBA=y
CONFIG_ARM_APPENDED_DTB=y
CONFIG_ARM_ARCH_TIMER=y
CONFIG_ARM_ARCH_TIMER_EVTSTREAM=y
# CONFIG_ARM_ATAG_DTB_COMPAT is not set
CONFIG_ARM_CPUIDLE=y
# CONFIG_ARM_CPU_TOPOLOGY is not set
CONFIG_ARM_CRYPTO=y
CONFIG_ARM_GIC=y
CONFIG_ARM_HAS_SG_CHAIN=y
CONFIG_ARM_L1_CACHE_SHIFT=6
CONFIG_ARM_L1_CACHE_SHIFT_6=y
CONFIG_ARM_PATCH_IDIV=y
CONFIG_ARM_PATCH_PHYS_VIRT=y
# CONFIG_ARM_QCOM_CPUFREQ_HW is not set
# CONFIG_ARM_QCOM_CPUFREQ_NVMEM is not set
# CONFIG_ARM_QCOM_SPM_CPUIDLE is not set
# CONFIG_ARM_SMMU is not set
CONFIG_ARM_THUMB=y
CONFIG_ARM_UNWIND=y
CONFIG_ARM_VIRT_EXT=y
CONFIG_AT803X_PHY=y
CONFIG_AUTO_ZRELADDR=y
CONFIG_BCH=y
CONFIG_BINFMT_FLAT_ARGVP_ENVP_ON_STACK=y
CONFIG_BLK_DEV_LOOP=y
CONFIG_BLK_MQ_PCI=y
CONFIG_BOUNCE=y
# CONFIG_CACHE_L2X0 is not set
CONFIG_CLKSRC_QCOM=y
CONFIG_CLONE_BACKWARDS=y
CONFIG_CMDLINE_PARTITION=y
CONFIG_COMMON_CLK=y
CONFIG_COMMON_CLK_QCOM=y
CONFIG_COMPAT_32BIT_TIME=y
CONFIG_CPUFREQ_DT=y
CONFIG_CPUFREQ_DT_PLATDEV=y
CONFIG_CPU_32v6K=y
CONFIG_CPU_32v7=y
CONFIG_CPU_ABRT_EV7=y
CONFIG_CPU_CACHE_V7=y
CONFIG_CPU_CACHE_VIPT=y
CONFIG_CPU_COPY_V6=y
CONFIG_CPU_CP15=y
CONFIG_CPU_CP15_MMU=y
CONFIG_CPU_FREQ=y
CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND=y
# CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE is not set
CONFIG_CPU_FREQ_GOV_ATTR_SET=y
CONFIG_CPU_FREQ_GOV_COMMON=y
# CONFIG_CPU_FREQ_GOV_CONSERVATIVE is not set
CONFIG_CPU_FREQ_GOV_ONDEMAND=y
CONFIG_CPU_FREQ_GOV_PERFORMANCE=y
# CONFIG_CPU_FREQ_GOV_POWERSAVE is not set
# CONFIG_CPU_FREQ_GOV_USERSPACE is not set
CONFIG_CPU_FREQ_STAT=y
CONFIG_CPU_HAS_ASID=y
CONFIG_CPU_IDLE=y
CONFIG_CPU_IDLE_GOV_LADDER=y
CONFIG_CPU_IDLE_GOV_MENU=y
CONFIG_CPU_IDLE_MULTIPLE_DRIVERS=y
CONFIG_CPU_PABRT_V7=y
CONFIG_CPU_PM=y
CONFIG_CPU_RMAP=y
CONFIG_CPU_SPECTRE=y
CONFIG_CPU_THERMAL=y
CONFIG_CPU_THUMB_CAPABLE=y
CONFIG_CPU_TLB_V7=y
CONFIG_CPU_V7=y
CONFIG_CRC16=y
# CONFIG_CRC32_SARWATE is not set
CONFIG_CRC32_SLICEBY8=y
CONFIG_CRC8=y
CONFIG_CRYPTO_AES_ARM=y
CONFIG_CRYPTO_AES_ARM_BS=y
CONFIG_CRYPTO_CBC=y
CONFIG_CRYPTO_CRYPTD=y
CONFIG_CRYPTO_DEFLATE=y
CONFIG_CRYPTO_DES=y
CONFIG_CRYPTO_DEV_QCE=y
# CONFIG_CRYPTO_DEV_QCE_ENABLE_AEAD is not set
# CONFIG_CRYPTO_DEV_QCE_ENABLE_ALL is not set
# CONFIG_CRYPTO_DEV_QCE_ENABLE_SHA is not set
CONFIG_CRYPTO_DEV_QCE_ENABLE_SKCIPHER=y
CONFIG_CRYPTO_DEV_QCE_SKCIPHER=y
CONFIG_CRYPTO_DEV_QCE_SW_MAX_LEN=512
CONFIG_CRYPTO_DEV_QCOM_RNG=y
CONFIG_CRYPTO_DRBG=y
CONFIG_CRYPTO_DRBG_HMAC=y
CONFIG_CRYPTO_DRBG_MENU=y
CONFIG_CRYPTO_ECB=y
CONFIG_CRYPTO_HASH_INFO=y
CONFIG_CRYPTO_HMAC=y
CONFIG_CRYPTO_HW=y
CONFIG_CRYPTO_JITTERENTROPY=y
CONFIG_CRYPTO_LIB_DES=y
CONFIG_CRYPTO_LIB_SHA256=y
CONFIG_CRYPTO_LZO=y
CONFIG_CRYPTO_RNG=y
CONFIG_CRYPTO_RNG2=y
CONFIG_CRYPTO_RNG_DEFAULT=y
CONFIG_CRYPTO_SEQIV=y
CONFIG_CRYPTO_SHA1=y
CONFIG_CRYPTO_SHA256=y
CONFIG_CRYPTO_SHA256_ARM=y
CONFIG_CRYPTO_SHA512=y
CONFIG_CRYPTO_SIMD=y
CONFIG_CRYPTO_XTS=y
CONFIG_CRYPTO_ZSTD=y
CONFIG_DCACHE_WORD_ACCESS=y
CONFIG_DEBUG_LL_INCLUDE="mach/debug-macro.S"
CONFIG_DEBUG_MISC=y
CONFIG_DMADEVICES=y
CONFIG_DMA_ENGINE=y
CONFIG_DMA_OF=y
CONFIG_DMA_OPS=y
CONFIG_DMA_REMAP=y
CONFIG_DMA_SHARED_BUFFER=y
CONFIG_DMA_VIRTUAL_CHANNELS=y
CONFIG_DTC=y
CONFIG_DT_IDLE_STATES=y
CONFIG_DYNAMIC_DEBUG=y
CONFIG_EDAC_ATOMIC_SCRUB=y
CONFIG_EDAC_SUPPORT=y
CONFIG_EEPROM_AT24=y
CONFIG_ESSEDMA=y
CONFIG_EXTCON=y
CONFIG_FIXED_PHY=y
CONFIG_FIX_EARLYCON_MEM=y
CONFIG_FWNODE_MDIO=y
CONFIG_FW_LOADER_PAGED_BUF=y
CONFIG_GENERIC_ALLOCATOR=y
CONFIG_GENERIC_BUG=y
CONFIG_GENERIC_CLOCKEVENTS=y
CONFIG_GENERIC_CLOCKEVENTS_BROADCAST=y
CONFIG_GENERIC_CPU_AUTOPROBE=y
CONFIG_GENERIC_CPU_VULNERABILITIES=y
CONFIG_GENERIC_EARLY_IOREMAP=y
CONFIG_GENERIC_GETTIMEOFDAY=y
CONFIG_GENERIC_IDLE_POLL_SETUP=y
CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK=y
CONFIG_GENERIC_IRQ_MULTI_HANDLER=y
CONFIG_GENERIC_IRQ_SHOW=y
CONFIG_GENERIC_IRQ_SHOW_LEVEL=y
CONFIG_GENERIC_LIB_DEVMEM_IS_ALLOWED=y
CONFIG_GENERIC_MSI_IRQ=y
CONFIG_GENERIC_MSI_IRQ_DOMAIN=y
CONFIG_GENERIC_PCI_IOMAP=y
CONFIG_GENERIC_PHY=y
CONFIG_GENERIC_PINCONF=y
CONFIG_GENERIC_PINCTRL_GROUPS=y
CONFIG_GENERIC_PINMUX_FUNCTIONS=y
CONFIG_GENERIC_SCHED_CLOCK=y
CONFIG_GENERIC_SMP_IDLE_THREAD=y
CONFIG_GENERIC_STRNCPY_FROM_USER=y
CONFIG_GENERIC_STRNLEN_USER=y
CONFIG_GENERIC_TIME_VSYSCALL=y
CONFIG_GENERIC_VDSO_32=y
CONFIG_GPIOLIB=y
CONFIG_GPIOLIB_IRQCHIP=y
CONFIG_GPIO_74X164=y
CONFIG_GPIO_CDEV=y
CONFIG_GPIO_WATCHDOG=y
CONFIG_GPIO_WATCHDOG_ARCH_INITCALL=y
CONFIG_HANDLE_DOMAIN_IRQ=y
CONFIG_HARDEN_BRANCH_PREDICTOR=y
CONFIG_HARDIRQS_SW_RESEND=y
CONFIG_HAS_DMA=y
CONFIG_HAS_IOMEM=y
CONFIG_HAS_IOPORT_MAP=y
CONFIG_HAVE_SMP=y
CONFIG_HIGHMEM=y
# CONFIG_HIGHPTE is not set
CONFIG_HWSPINLOCK=y
CONFIG_HWSPINLOCK_QCOM=y
CONFIG_HW_RANDOM=y
CONFIG_HW_RANDOM_OPTEE=y
CONFIG_HZ_FIXED=0
CONFIG_I2C=y
CONFIG_I2C_BOARDINFO=y
CONFIG_I2C_CHARDEV=y
CONFIG_I2C_HELPER_AUTO=y
# CONFIG_I2C_QCOM_CCI is not set
CONFIG_I2C_QUP=y
CONFIG_INITRAMFS_SOURCE=""
# CONFIG_IOMMU_DEBUGFS is not set
# CONFIG_IOMMU_IO_PGTABLE_ARMV7S is not set
# CONFIG_IOMMU_IO_PGTABLE_LPAE is not set
CONFIG_IOMMU_SUPPORT=y
CONFIG_IO_URING=y
# CONFIG_IPQ_APSS_PLL is not set
CONFIG_IPQ_GCC_4019=y
# CONFIG_IPQ_GCC_6018 is not set
# CONFIG_IPQ_GCC_806X is not set
# CONFIG_IPQ_GCC_8074 is not set
# CONFIG_IPQ_LCC_806X is not set
CONFIG_IRQCHIP=y
CONFIG_IRQ_DOMAIN=y
CONFIG_IRQ_DOMAIN_HIERARCHY=y
CONFIG_IRQ_FASTEOI_HIERARCHY_HANDLERS=y
CONFIG_IRQ_FORCED_THREADING=y
CONFIG_IRQ_WORK=y
CONFIG_KMAP_LOCAL=y
CONFIG_KMAP_LOCAL_NON_LINEAR_PTE_ARRAY=y
# CONFIG_KPSS_XCC is not set
# CONFIG_KRAITCC is not set
CONFIG_LEDS_LP5523=y
CONFIG_LEDS_LP5562=y
CONFIG_LEDS_LP55XX_COMMON=y
CONFIG_LEDS_TLC591XX=y
CONFIG_LIBFDT=y
CONFIG_LOCK_DEBUGGING_SUPPORT=y
CONFIG_LOCK_SPIN_ON_OWNER=y
CONFIG_LZO_COMPRESS=y
CONFIG_LZO_DECOMPRESS=y
CONFIG_MDIO_BITBANG=y
CONFIG_MDIO_BUS=y
CONFIG_MDIO_DEVICE=y
CONFIG_MDIO_DEVRES=y
CONFIG_MDIO_GPIO=y
CONFIG_MDIO_IPQ4019=y
# CONFIG_MDM_GCC_9615 is not set
# CONFIG_MDM_LCC_9615 is not set
CONFIG_MEMFD_CREATE=y
# CONFIG_MFD_HI6421_SPMI is not set
# CONFIG_MFD_QCOM_RPM is not set
# CONFIG_MFD_SPMI_PMIC is not set
CONFIG_MFD_SYSCON=y
CONFIG_MIGHT_HAVE_CACHE_L2X0=y
CONFIG_MIGRATION=y
CONFIG_MMC=y
CONFIG_MMC_BLOCK=y
CONFIG_MMC_CQHCI=y
CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_IO_ACCESSORS=y
CONFIG_MMC_SDHCI_MSM=y
# CONFIG_MMC_SDHCI_PCI is not set
CONFIG_MMC_SDHCI_PLTFM=y
CONFIG_MODULES_USE_ELF_REL=y
# CONFIG_MSM_GCC_8660 is not set
# CONFIG_MSM_GCC_8916 is not set
# CONFIG_MSM_GCC_8939 is not set
# CONFIG_MSM_GCC_8960 is not set
# CONFIG_MSM_GCC_8974 is not set
# CONFIG_MSM_GCC_8994 is not set
# CONFIG_MSM_GCC_8996 is not set
# CONFIG_MSM_GCC_8998 is not set
# CONFIG_MSM_GPUCC_8998 is not set
# CONFIG_MSM_LCC_8960 is not set
# CONFIG_MSM_MMCC_8960 is not set
# CONFIG_MSM_MMCC_8974 is not set
# CONFIG_MSM_MMCC_8996 is not set
# CONFIG_MSM_MMCC_8998 is not set
CONFIG_MTD_CMDLINE_PARTS=y
CONFIG_MTD_NAND_CORE=y
CONFIG_MTD_NAND_ECC=y
CONFIG_MTD_NAND_ECC_SW_BCH=y
CONFIG_MTD_NAND_ECC_SW_HAMMING=y
CONFIG_MTD_NAND_QCOM=y
# CONFIG_MTD_QCOMSMEM_PARTS is not set
CONFIG_MTD_RAW_NAND=y
CONFIG_MTD_SPI_NAND=y
CONFIG_MTD_SPI_NOR=y
CONFIG_MTD_SPLIT_FIRMWARE=y
CONFIG_MTD_SPLIT_FIT_FW=y
CONFIG_MTD_SPLIT_WRGG_FW=y
CONFIG_MTD_UBI=y
CONFIG_MTD_UBI_BEB_LIMIT=20
CONFIG_MTD_UBI_BLOCK=y
CONFIG_MTD_UBI_WL_THRESHOLD=4096
CONFIG_MUTEX_SPIN_ON_OWNER=y
CONFIG_NEED_DMA_MAP_STATE=y
CONFIG_NEON=y
CONFIG_NET_FLOW_LIMIT=y
CONFIG_NET_PTP_CLASSIFY=y
CONFIG_NET_SELFTESTS=y
CONFIG_NLS=y
CONFIG_NO_HZ=y
CONFIG_NO_HZ_COMMON=y
CONFIG_NO_HZ_IDLE=y
CONFIG_NR_CPUS=4
CONFIG_NVMEM=y
# CONFIG_NVMEM_SPMI_SDAM is not set
CONFIG_NVMEM_SYSFS=y
CONFIG_OF=y
CONFIG_OF_ADDRESS=y
CONFIG_OF_EARLY_FLATTREE=y
CONFIG_OF_FLATTREE=y
CONFIG_OF_GPIO=y
CONFIG_OF_IRQ=y
CONFIG_OF_KOBJ=y
CONFIG_OF_MDIO=y
CONFIG_OLD_SIGACTION=y
CONFIG_OLD_SIGSUSPEND3=y
CONFIG_OPTEE=y
CONFIG_OPTEE_SHM_NUM_PRIV_PAGES=1
CONFIG_PADATA=y
CONFIG_PAGE_OFFSET=0xC0000000
CONFIG_PCI=y
CONFIG_PCIEAER=y
CONFIG_PCIEPORTBUS=y
CONFIG_PCIE_DW=y
CONFIG_PCIE_DW_HOST=y
CONFIG_PCIE_QCOM=y
CONFIG_PCI_DISABLE_COMMON_QUIRKS=y
CONFIG_PCI_DOMAINS=y
CONFIG_PCI_DOMAINS_GENERIC=y
CONFIG_PCI_MSI=y
CONFIG_PCI_MSI_IRQ_DOMAIN=y
CONFIG_PERF_USE_VMALLOC=y
CONFIG_PGTABLE_LEVELS=2
CONFIG_PHYLIB=y
# CONFIG_PHY_QCOM_APQ8064_SATA is not set
CONFIG_PHY_QCOM_IPQ4019_USB=y
# CONFIG_PHY_QCOM_IPQ806X_SATA is not set
# CONFIG_PHY_QCOM_IPQ806X_USB is not set
# CONFIG_PHY_QCOM_PCIE2 is not set
# CONFIG_PHY_QCOM_QMP is not set
# CONFIG_PHY_QCOM_QUSB2 is not set
# CONFIG_PHY_QCOM_USB_HS_28NM is not set
# CONFIG_PHY_QCOM_USB_SNPS_FEMTO_V2 is not set
# CONFIG_PHY_QCOM_USB_SS is not set
CONFIG_PINCTRL=y
# CONFIG_PINCTRL_APQ8064 is not set
# CONFIG_PINCTRL_APQ8084 is not set
CONFIG_PINCTRL_IPQ4019=y
# CONFIG_PINCTRL_IPQ6018 is not set
# CONFIG_PINCTRL_IPQ8064 is not set
# CONFIG_PINCTRL_IPQ8074 is not set
# CONFIG_PINCTRL_MDM9615 is not set
CONFIG_PINCTRL_MSM=y
# CONFIG_PINCTRL_MSM8226 is not set
# CONFIG_PINCTRL_MSM8660 is not set
# CONFIG_PINCTRL_MSM8916 is not set
# CONFIG_PINCTRL_MSM8960 is not set
# CONFIG_PINCTRL_MSM8976 is not set
# CONFIG_PINCTRL_MSM8994 is not set
# CONFIG_PINCTRL_MSM8996 is not set
# CONFIG_PINCTRL_MSM8998 is not set
# CONFIG_PINCTRL_QCOM_SPMI_PMIC is not set
# CONFIG_PINCTRL_QCOM_SSBI_PMIC is not set
# CONFIG_PINCTRL_QCS404 is not set
# CONFIG_PINCTRL_SC7180 is not set
# CONFIG_PINCTRL_SDM660 is not set
# CONFIG_PINCTRL_SDM845 is not set
# CONFIG_PINCTRL_SM8150 is not set
# CONFIG_PINCTRL_SM8250 is not set
CONFIG_PM_OPP=y
CONFIG_POWER_RESET=y
CONFIG_POWER_RESET_MSM=y
CONFIG_POWER_SUPPLY=y
CONFIG_PPS=y
CONFIG_PRINTK_TIME=y
CONFIG_PTP_1588_CLOCK=y
CONFIG_PTP_1588_CLOCK_OPTIONAL=y
CONFIG_QCA807X_PHY=y
CONFIG_QCOM_A53PLL=y
# CONFIG_QCOM_ADM is not set
CONFIG_QCOM_BAM_DMA=y
# CONFIG_QCOM_COMMAND_DB is not set
# CONFIG_QCOM_CPR is not set
# CONFIG_QCOM_EBI2 is not set
# CONFIG_QCOM_GENI_SE is not set
# CONFIG_QCOM_GSBI is not set
# CONFIG_QCOM_HFPLL is not set
# CONFIG_QCOM_IOMMU is not set
# CONFIG_QCOM_LLCC is not set
# CONFIG_QCOM_OCMEM is not set
# CONFIG_QCOM_PDC is not set
CONFIG_QCOM_QFPROM=y
# CONFIG_QCOM_RMTFS_MEM is not set
# CONFIG_QCOM_RPMH is not set
CONFIG_QCOM_SCM=y
# CONFIG_QCOM_SCM_DOWNLOAD_MODE_DEFAULT is not set
CONFIG_QCOM_SMEM=y
# CONFIG_QCOM_SMSM is not set
# CONFIG_QCOM_SOCINFO is not set
CONFIG_QCOM_TCSR=y
# CONFIG_QCOM_TSENS is not set
CONFIG_QCOM_WDT=y
# CONFIG_QCS_GCC_404 is not set
# CONFIG_QCS_Q6SSTOP_404 is not set
# CONFIG_QCS_TURING_404 is not set
CONFIG_RAS=y
CONFIG_RATIONAL=y
CONFIG_REGMAP=y
CONFIG_REGMAP_I2C=y
CONFIG_REGMAP_MMIO=y
CONFIG_REGULATOR=y
CONFIG_REGULATOR_FIXED_VOLTAGE=y
# CONFIG_REGULATOR_QCOM_LABIBB is not set
# CONFIG_REGULATOR_QCOM_SPMI is not set
# CONFIG_REGULATOR_QCOM_USB_VBUS is not set
CONFIG_REGULATOR_VCTRL=y
CONFIG_REGULATOR_VQMMC_IPQ4019=y
CONFIG_RESET_CONTROLLER=y
# CONFIG_RESET_QCOM_AOSS is not set
# CONFIG_RESET_QCOM_PDC is not set
CONFIG_RFS_ACCEL=y
CONFIG_RPS=y
CONFIG_RTC_CLASS=y
CONFIG_RTC_I2C_AND_SPI=y
CONFIG_RTC_MC146818_LIB=y
CONFIG_RWSEM_SPIN_ON_OWNER=y
# CONFIG_SC_DISPCC_7180 is not set
# CONFIG_SC_GCC_7180 is not set
# CONFIG_SC_GPUCC_7180 is not set
# CONFIG_SC_LPASS_CORECC_7180 is not set
# CONFIG_SC_MSS_7180 is not set
# CONFIG_SC_VIDEOCC_7180 is not set
# CONFIG_SDM_CAMCC_845 is not set
# CONFIG_SDM_DISPCC_845 is not set
# CONFIG_SDM_GCC_660 is not set
# CONFIG_SDM_GCC_845 is not set
# CONFIG_SDM_GPUCC_845 is not set
# CONFIG_SDM_LPASSCC_845 is not set
# CONFIG_SDM_VIDEOCC_845 is not set
CONFIG_SERIAL_8250_FSL=y
CONFIG_SERIAL_MCTRL_GPIO=y
CONFIG_SERIAL_MSM=y
CONFIG_SERIAL_MSM_CONSOLE=y
CONFIG_SGL_ALLOC=y
CONFIG_SMP=y
CONFIG_SMP_ON_UP=y
# CONFIG_SM_GCC_8150 is not set
# CONFIG_SM_GCC_8250 is not set
# CONFIG_SM_GPUCC_8150 is not set
# CONFIG_SM_GPUCC_8250 is not set
# CONFIG_SM_VIDEOCC_8150 is not set
# CONFIG_SM_VIDEOCC_8250 is not set
CONFIG_SOCK_RX_QUEUE_MAPPING=y
CONFIG_SPARSE_IRQ=y
CONFIG_SPI=y
CONFIG_SPI_BITBANG=y
CONFIG_SPI_GPIO=y
CONFIG_SPI_MASTER=y
CONFIG_SPI_MEM=y
CONFIG_SPI_QUP=y
CONFIG_SPMI=y
# CONFIG_SPMI_HISI3670 is not set
CONFIG_SPMI_MSM_PMIC_ARB=y
# CONFIG_SPMI_PMIC_CLKDIV is not set
CONFIG_SRCU=y
CONFIG_SWCONFIG=y
CONFIG_SWCONFIG_LEDS=y
CONFIG_SWPHY=y
CONFIG_SWP_EMULATE=y
CONFIG_SYS_SUPPORTS_APM_EMULATION=y
CONFIG_TEE=y
CONFIG_THERMAL=y
CONFIG_THERMAL_DEFAULT_GOV_STEP_WISE=y
CONFIG_THERMAL_EMERGENCY_POWEROFF_DELAY_MS=0
CONFIG_THERMAL_GOV_STEP_WISE=y
CONFIG_THERMAL_OF=y
CONFIG_TICK_CPU_ACCOUNTING=y
CONFIG_TIMER_OF=y
CONFIG_TIMER_PROBE=y
CONFIG_TREE_RCU=y
CONFIG_TREE_SRCU=y
CONFIG_UBIFS_FS=y
CONFIG_UEVENT_HELPER_PATH=""
CONFIG_UNCOMPRESS_INCLUDE="debug/uncompress.h"
CONFIG_UNWINDER_ARM=y
CONFIG_USB=y
CONFIG_USB_COMMON=y
CONFIG_USB_SUPPORT=y
CONFIG_USE_OF=y
CONFIG_VFP=y
CONFIG_VFPv3=y
CONFIG_WATCHDOG_CORE=y
CONFIG_XPS=y
CONFIG_XXHASH=y
CONFIG_XZ_DEC_ARM=y
CONFIG_XZ_DEC_BCJ=y
CONFIG_ZBOOT_ROM_BSS=0
CONFIG_ZBOOT_ROM_TEXT=0
CONFIG_ZLIB_DEFLATE=y
CONFIG_ZLIB_INFLATE=y
CONFIG_ZSTD_COMPRESS=y
CONFIG_ZSTD_DECOMPRESS=y

3
target/linux/ipq40xx/files-5.10/drivers/net/mdio/ar40xx.c
View File

@ -998,6 +998,7 @@ ar40xx_malibu_psgmii_ess_reset(struct ar40xx_priv *priv)
*/
mdelay(2);
}
mdelay(50);
/*check malibu psgmii calibration done end..*/
@ -1016,6 +1017,7 @@ ar40xx_malibu_psgmii_ess_reset(struct ar40xx_priv *priv)
/* Polling interval to check PSGMII PLL in ESS is ready */
mdelay(2);
}
mdelay(50);
/* check dakota psgmii calibration done end..*/
@ -1023,6 +1025,7 @@ ar40xx_malibu_psgmii_ess_reset(struct ar40xx_priv *priv)
mdiobus_write(bus, 5, 0x1a, 0x3230);
/* release phy psgmii RX 20bit */
mdiobus_write(bus, 5, 0x0, 0x005f);
mdelay(200);
}
static void

1890
target/linux/ipq40xx/files-5.15/drivers/net/mdio/ar40xx.c Normal file
View File

File diff suppressed because it is too large Load Diff

342
target/linux/ipq40xx/files-5.15/drivers/net/mdio/ar40xx.h Normal file
View File

@ -0,0 +1,342 @@
/*
* Copyright (c) 2016, The Linux Foundation. All rights reserved.
*
* Permission to use, copy, modify, and/or distribute this software for
* any purpose with or without fee is hereby granted, provided that the
* above copyright notice and this permission notice appear in all copies.
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT
* OF OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
*/
#ifndef __AR40XX_H
#define __AR40XX_H
#define AR40XX_MAX_VLANS 128
#define AR40XX_NUM_PORTS 6
#define AR40XX_NUM_PHYS 5
#define BITS(_s, _n) (((1UL << (_n)) - 1) << _s)
struct ar40xx_priv {
struct switch_dev dev;
u8 __iomem *hw_addr;
u8 __iomem *psgmii_hw_addr;
u32 mac_mode;
struct reset_control *ess_rst;
u32 cpu_bmp;
u32 lan_bmp;
u32 wan_bmp;
struct mii_bus *mii_bus;
struct phy_device *phy;
/* mutex for qm task */
struct mutex qm_lock;
struct delayed_work qm_dwork;
u32 port_link_up[AR40XX_NUM_PORTS];
u32 ar40xx_port_old_link[AR40XX_NUM_PORTS];
u32 ar40xx_port_qm_buf[AR40XX_NUM_PORTS];
u32 phy_t_status;
/* mutex for switch reg access */
struct mutex reg_mutex;
/* mutex for mib task */
struct mutex mib_lock;
struct delayed_work mib_work;
int mib_next_port;
u64 *mib_stats;
char buf[2048];
/* all fields below will be cleared on reset */
bool vlan;
u16 vlan_id[AR40XX_MAX_VLANS];
u8 vlan_table[AR40XX_MAX_VLANS];
u8 vlan_tagged;
u16 pvid[AR40XX_NUM_PORTS];
/* mirror */
bool mirror_rx;
bool mirror_tx;
int source_port;
int monitor_port;
};
#define AR40XX_PORT_LINK_UP 1
#define AR40XX_PORT_LINK_DOWN 0
#define AR40XX_QM_NOT_EMPTY 1
#define AR40XX_QM_EMPTY 0
#define AR40XX_LAN_VLAN 1
#define AR40XX_WAN_VLAN 2
enum ar40xx_port_wrapper_cfg {
PORT_WRAPPER_PSGMII = 0,
};
struct ar40xx_mib_desc {
u32 size;
u32 offset;
const char *name;
};
#define AR40XX_PORT_CPU 0
#define AR40XX_PSGMII_MODE_CONTROL 0x1b4
#define AR40XX_PSGMII_ATHR_CSCO_MODE_25M BIT(0)
#define AR40XX_PSGMIIPHY_TX_CONTROL 0x288
#define AR40XX_MII_ATH_MMD_ADDR 0x0d
#define AR40XX_MII_ATH_MMD_DATA 0x0e
#define AR40XX_MII_ATH_DBG_ADDR 0x1d
#define AR40XX_MII_ATH_DBG_DATA 0x1e
#define AR40XX_STATS_RXBROAD 0x00
#define AR40XX_STATS_RXPAUSE 0x04
#define AR40XX_STATS_RXMULTI 0x08
#define AR40XX_STATS_RXFCSERR 0x0c
#define AR40XX_STATS_RXALIGNERR 0x10
#define AR40XX_STATS_RXRUNT 0x14
#define AR40XX_STATS_RXFRAGMENT 0x18
#define AR40XX_STATS_RX64BYTE 0x1c
#define AR40XX_STATS_RX128BYTE 0x20
#define AR40XX_STATS_RX256BYTE 0x24
#define AR40XX_STATS_RX512BYTE 0x28
#define AR40XX_STATS_RX1024BYTE 0x2c
#define AR40XX_STATS_RX1518BYTE 0x30
#define AR40XX_STATS_RXMAXBYTE 0x34
#define AR40XX_STATS_RXTOOLONG 0x38
#define AR40XX_STATS_RXGOODBYTE 0x3c
#define AR40XX_STATS_RXBADBYTE 0x44
#define AR40XX_STATS_RXOVERFLOW 0x4c
#define AR40XX_STATS_FILTERED 0x50
#define AR40XX_STATS_TXBROAD 0x54
#define AR40XX_STATS_TXPAUSE 0x58
#define AR40XX_STATS_TXMULTI 0x5c
#define AR40XX_STATS_TXUNDERRUN 0x60
#define AR40XX_STATS_TX64BYTE 0x64
#define AR40XX_STATS_TX128BYTE 0x68
#define AR40XX_STATS_TX256BYTE 0x6c
#define AR40XX_STATS_TX512BYTE 0x70
#define AR40XX_STATS_TX1024BYTE 0x74
#define AR40XX_STATS_TX1518BYTE 0x78
#define AR40XX_STATS_TXMAXBYTE 0x7c
#define AR40XX_STATS_TXOVERSIZE 0x80
#define AR40XX_STATS_TXBYTE 0x84
#define AR40XX_STATS_TXCOLLISION 0x8c
#define AR40XX_STATS_TXABORTCOL 0x90
#define AR40XX_STATS_TXMULTICOL 0x94
#define AR40XX_STATS_TXSINGLECOL 0x98
#define AR40XX_STATS_TXEXCDEFER 0x9c
#define AR40XX_STATS_TXDEFER 0xa0
#define AR40XX_STATS_TXLATECOL 0xa4
#define AR40XX_REG_MODULE_EN 0x030
#define AR40XX_MODULE_EN_MIB BIT(0)
#define AR40XX_REG_MIB_FUNC 0x034
#define AR40XX_MIB_BUSY BIT(17)
#define AR40XX_MIB_CPU_KEEP BIT(20)
#define AR40XX_MIB_FUNC BITS(24, 3)
#define AR40XX_MIB_FUNC_S 24
#define AR40XX_MIB_FUNC_NO_OP 0x0
#define AR40XX_MIB_FUNC_FLUSH 0x1
#define AR40XX_ESS_SERVICE_TAG 0x48
#define AR40XX_ESS_SERVICE_TAG_STAG BIT(17)
#define AR40XX_REG_PORT_STATUS(_i) (0x07c + (_i) * 4)
#define AR40XX_PORT_SPEED BITS(0, 2)
#define AR40XX_PORT_STATUS_SPEED_S 0
#define AR40XX_PORT_TX_EN BIT(2)
#define AR40XX_PORT_RX_EN BIT(3)
#define AR40XX_PORT_STATUS_TXFLOW BIT(4)
#define AR40XX_PORT_STATUS_RXFLOW BIT(5)
#define AR40XX_PORT_DUPLEX BIT(6)
#define AR40XX_PORT_TXHALF_FLOW BIT(7)
#define AR40XX_PORT_STATUS_LINK_UP BIT(8)
#define AR40XX_PORT_AUTO_LINK_EN BIT(9)
#define AR40XX_PORT_STATUS_FLOW_CONTROL BIT(12)
#define AR40XX_REG_MAX_FRAME_SIZE 0x078
#define AR40XX_MAX_FRAME_SIZE_MTU BITS(0, 14)
#define AR40XX_REG_PORT_HEADER(_i) (0x09c + (_i) * 4)
#define AR40XX_REG_EEE_CTRL 0x100
#define AR40XX_EEE_CTRL_DISABLE_PHY(_i) BIT(4 + (_i) * 2)
#define AR40XX_REG_PORT_VLAN0(_i) (0x420 + (_i) * 0x8)
#define AR40XX_PORT_VLAN0_DEF_SVID BITS(0, 12)
#define AR40XX_PORT_VLAN0_DEF_SVID_S 0
#define AR40XX_PORT_VLAN0_DEF_CVID BITS(16, 12)
#define AR40XX_PORT_VLAN0_DEF_CVID_S 16
#define AR40XX_REG_PORT_VLAN1(_i) (0x424 + (_i) * 0x8)
#define AR40XX_PORT_VLAN1_CORE_PORT BIT(9)
#define AR40XX_PORT_VLAN1_PORT_TLS_MODE BIT(7)
#define AR40XX_PORT_VLAN1_PORT_VLAN_PROP BIT(6)
#define AR40XX_PORT_VLAN1_OUT_MODE BITS(12, 2)
#define AR40XX_PORT_VLAN1_OUT_MODE_S 12
#define AR40XX_PORT_VLAN1_OUT_MODE_UNMOD 0
#define AR40XX_PORT_VLAN1_OUT_MODE_UNTAG 1
#define AR40XX_PORT_VLAN1_OUT_MODE_TAG 2
#define AR40XX_PORT_VLAN1_OUT_MODE_UNTOUCH 3
#define AR40XX_REG_VTU_FUNC0 0x0610
#define AR40XX_VTU_FUNC0_EG_MODE BITS(4, 14)
#define AR40XX_VTU_FUNC0_EG_MODE_S(_i) (4 + (_i) * 2)
#define AR40XX_VTU_FUNC0_EG_MODE_KEEP 0
#define AR40XX_VTU_FUNC0_EG_MODE_UNTAG 1
#define AR40XX_VTU_FUNC0_EG_MODE_TAG 2
#define AR40XX_VTU_FUNC0_EG_MODE_NOT 3
#define AR40XX_VTU_FUNC0_IVL BIT(19)
#define AR40XX_VTU_FUNC0_VALID BIT(20)
#define AR40XX_REG_VTU_FUNC1 0x0614
#define AR40XX_VTU_FUNC1_OP BITS(0, 3)
#define AR40XX_VTU_FUNC1_OP_NOOP 0
#define AR40XX_VTU_FUNC1_OP_FLUSH 1
#define AR40XX_VTU_FUNC1_OP_LOAD 2
#define AR40XX_VTU_FUNC1_OP_PURGE 3
#define AR40XX_VTU_FUNC1_OP_REMOVE_PORT 4
#define AR40XX_VTU_FUNC1_OP_GET_NEXT 5
#define AR40XX7_VTU_FUNC1_OP_GET_ONE 6
#define AR40XX_VTU_FUNC1_FULL BIT(4)
#define AR40XX_VTU_FUNC1_PORT BIT(8, 4)
#define AR40XX_VTU_FUNC1_PORT_S 8
#define AR40XX_VTU_FUNC1_VID BIT(16, 12)
#define AR40XX_VTU_FUNC1_VID_S 16
#define AR40XX_VTU_FUNC1_BUSY BIT(31)
#define AR40XX_REG_FWD_CTRL0 0x620
#define AR40XX_FWD_CTRL0_CPU_PORT_EN BIT(10)
#define AR40XX_FWD_CTRL0_MIRROR_PORT BITS(4, 4)
#define AR40XX_FWD_CTRL0_MIRROR_PORT_S 4
#define AR40XX_REG_FWD_CTRL1 0x624
#define AR40XX_FWD_CTRL1_UC_FLOOD BITS(0, 7)
#define AR40XX_FWD_CTRL1_UC_FLOOD_S 0
#define AR40XX_FWD_CTRL1_MC_FLOOD BITS(8, 7)
#define AR40XX_FWD_CTRL1_MC_FLOOD_S 8
#define AR40XX_FWD_CTRL1_BC_FLOOD BITS(16, 7)
#define AR40XX_FWD_CTRL1_BC_FLOOD_S 16
#define AR40XX_FWD_CTRL1_IGMP BITS(24, 7)
#define AR40XX_FWD_CTRL1_IGMP_S 24
#define AR40XX_REG_PORT_LOOKUP(_i) (0x660 + (_i) * 0xc)
#define AR40XX_PORT_LOOKUP_MEMBER BITS(0, 7)
#define AR40XX_PORT_LOOKUP_IN_MODE BITS(8, 2)
#define AR40XX_PORT_LOOKUP_IN_MODE_S 8
#define AR40XX_PORT_LOOKUP_STATE BITS(16, 3)
#define AR40XX_PORT_LOOKUP_STATE_S 16
#define AR40XX_PORT_LOOKUP_LEARN BIT(20)
#define AR40XX_PORT_LOOKUP_LOOPBACK BIT(21)
#define AR40XX_PORT_LOOKUP_ING_MIRROR_EN BIT(25)
#define AR40XX_REG_ATU_FUNC 0x60c
#define AR40XX_ATU_FUNC_OP BITS(0, 4)
#define AR40XX_ATU_FUNC_OP_NOOP 0x0
#define AR40XX_ATU_FUNC_OP_FLUSH 0x1
#define AR40XX_ATU_FUNC_OP_LOAD 0x2
#define AR40XX_ATU_FUNC_OP_PURGE 0x3
#define AR40XX_ATU_FUNC_OP_FLUSH_LOCKED 0x4
#define AR40XX_ATU_FUNC_OP_FLUSH_UNICAST 0x5
#define AR40XX_ATU_FUNC_OP_GET_NEXT 0x6
#define AR40XX_ATU_FUNC_OP_SEARCH_MAC 0x7
#define AR40XX_ATU_FUNC_OP_CHANGE_TRUNK 0x8
#define AR40XX_ATU_FUNC_BUSY BIT(31)
#define AR40XX_REG_QM_DEBUG_ADDR 0x820
#define AR40XX_REG_QM_DEBUG_VALUE 0x824
#define AR40XX_REG_QM_PORT0_3_QNUM 0x1d
#define AR40XX_REG_QM_PORT4_6_QNUM 0x1e
#define AR40XX_REG_PORT_HOL_CTRL1(_i) (0x974 + (_i) * 0x8)
#define AR40XX_PORT_HOL_CTRL1_EG_MIRROR_EN BIT(16)
#define AR40XX_REG_PORT_FLOWCTRL_THRESH(_i) (0x9b0 + (_i) * 0x4)
#define AR40XX_PORT0_FC_THRESH_ON_DFLT 0x60
#define AR40XX_PORT0_FC_THRESH_OFF_DFLT 0x90
#define AR40XX_PHY_DEBUG_0 0
#define AR40XX_PHY_MANU_CTRL_EN BIT(12)
#define AR40XX_PHY_DEBUG_2 2
#define AR40XX_PHY_SPEC_STATUS 0x11
#define AR40XX_PHY_SPEC_STATUS_LINK BIT(10)
#define AR40XX_PHY_SPEC_STATUS_DUPLEX BIT(13)
#define AR40XX_PHY_SPEC_STATUS_SPEED BITS(14, 2)
/* port forwarding state */
enum {
AR40XX_PORT_STATE_DISABLED = 0,
AR40XX_PORT_STATE_BLOCK = 1,
AR40XX_PORT_STATE_LISTEN = 2,
AR40XX_PORT_STATE_LEARN = 3,
AR40XX_PORT_STATE_FORWARD = 4
};
/* ingress 802.1q mode */
enum {
AR40XX_IN_PORT_ONLY = 0,
AR40XX_IN_PORT_FALLBACK = 1,
AR40XX_IN_VLAN_ONLY = 2,
AR40XX_IN_SECURE = 3
};
/* egress 802.1q mode */
enum {
AR40XX_OUT_KEEP = 0,
AR40XX_OUT_STRIP_VLAN = 1,
AR40XX_OUT_ADD_VLAN = 2
};
/* port speed */
enum {
AR40XX_PORT_SPEED_10M = 0,
AR40XX_PORT_SPEED_100M = 1,
AR40XX_PORT_SPEED_1000M = 2,
AR40XX_PORT_SPEED_ERR = 3,
};
#define AR40XX_MIB_WORK_DELAY 2000 /* msecs */
#define AR40XX_QM_WORK_DELAY 100
#define AR40XX_MIB_FUNC_CAPTURE 0x3
#define AR40XX_REG_PORT_STATS_START 0x1000
#define AR40XX_REG_PORT_STATS_LEN 0x100
#define AR40XX_PORTS_ALL 0x3f
#define AR40XX_PSGMII_ID 5
#define AR40XX_PSGMII_CALB_NUM 100
#define AR40XX_MALIBU_PSGMII_MODE_CTRL 0x6d
#define AR40XX_MALIBU_PHY_PSGMII_MODE_CTRL_ADJUST_VAL 0x220c
#define AR40XX_MALIBU_PHY_MMD7_DAC_CTRL 0x801a
#define AR40XX_MALIBU_DAC_CTRL_MASK 0x380
#define AR40XX_MALIBU_DAC_CTRL_VALUE 0x280
#define AR40XX_MALIBU_PHY_RLP_CTRL 0x805a
#define AR40XX_PSGMII_TX_DRIVER_1_CTRL 0xb
#define AR40XX_MALIBU_PHY_PSGMII_REDUCE_SERDES_TX_AMP 0x8a
#define AR40XX_MALIBU_PHY_LAST_ADDR 4
static inline struct ar40xx_priv *
swdev_to_ar40xx(struct switch_dev *swdev)
{
return container_of(swdev, struct ar40xx_priv, dev);
}
#endif

12
target/linux/ipq40xx/files/arch/arm/boot/dts/qcom-ipq4019-wpj419.dts
View File

@ -352,12 +352,6 @@
perst-gpio = <&tlmm 38 GPIO_ACTIVE_LOW>;
wake-gpio = <&tlmm 50 GPIO_ACTIVE_LOW>;
};
nand: qpic-nand@79b0000 {
pinctrl-0 = <&nand_pins>;
pinctrl-names = "default";
status = "okay";
};
};
keys {
@ -371,6 +365,12 @@
};
};
&nand {
pinctrl-0 = <&nand_pins>;
pinctrl-names = "default";
status = "okay";
};
&gmac0 {
qcom,phy_mdio_addr = <4>;
qcom,poll_required = <1>;

12
target/linux/ipq40xx/files/drivers/net/ethernet/qualcomm/essedma/edma_ethtool.c
View File

@ -244,8 +244,14 @@ static int edma_set_settings(struct net_device *netdev,
/* edma_get_coalesce
* get interrupt mitigation
*/
#if LINUX_VERSION_CODE >= KERNEL_VERSION(5,15,0)
static int edma_get_coalesce(struct net_device *dev, struct ethtool_coalesce *ec,
struct kernel_ethtool_coalesce *kernel_coal,
struct netlink_ext_ack *extack)
#else
static int edma_get_coalesce(struct net_device *netdev,
struct ethtool_coalesce *ec)
#endif
{
u32 reg_val;
@ -266,8 +272,14 @@ static int edma_get_coalesce(struct net_device *netdev,
/* edma_set_coalesce
* set interrupt mitigation
*/
#if LINUX_VERSION_CODE >= KERNEL_VERSION(5,15,0)
static int edma_set_coalesce(struct net_device *dev, struct ethtool_coalesce *ec,
struct kernel_ethtool_coalesce *kernel_coal,
struct netlink_ext_ack *extack)
#else
static int edma_set_coalesce(struct net_device *netdev,
struct ethtool_coalesce *ec)
#endif
{
if (ec->tx_coalesce_usecs)
edma_change_tx_coalesce(ec->tx_coalesce_usecs);

36
target/linux/ipq40xx/files/drivers/net/phy/qca807x.c
View File

@ -610,6 +610,7 @@ static int qca807x_config_intr(struct phy_device *phydev)
return ret;
}
#if LINUX_VERSION_CODE < KERNEL_VERSION(5,12,0)
static int qca807x_ack_intr(struct phy_device *phydev)
{
int ret;
@ -618,6 +619,33 @@ static int qca807x_ack_intr(struct phy_device *phydev)
return (ret < 0) ? ret : 0;
}
#else
static irqreturn_t qca807x_handle_interrupt(struct phy_device *phydev)
{
int irq_status, int_enabled;
irq_status = phy_read(phydev, QCA807X_INTR_STATUS);
if (irq_status < 0) {
phy_error(phydev);
return IRQ_NONE;
}
/* Read the current enabled interrupts */
int_enabled = phy_read(phydev, QCA807X_INTR_ENABLE);
if (int_enabled < 0) {
phy_error(phydev);
return IRQ_NONE;
}
/* See if this was one of our enabled interrupts */
if (!(irq_status & int_enabled))
return IRQ_NONE;
phy_trigger_machine(phydev);
return IRQ_HANDLED;
}
#endif
static int qca807x_led_config(struct phy_device *phydev)
{
@ -779,7 +807,11 @@ static struct phy_driver qca807x_drivers[] = {
.config_init = qca807x_config,
.read_status = qca807x_read_status,
.config_intr = qca807x_config_intr,
#if LINUX_VERSION_CODE < KERNEL_VERSION(5,12,0)
.ack_interrupt = qca807x_ack_intr,
#else
.handle_interrupt = qca807x_handle_interrupt,
#endif
.soft_reset = genphy_soft_reset,
.get_tunable = qca807x_get_tunable,
.set_tunable = qca807x_set_tunable,
@ -799,7 +831,11 @@ static struct phy_driver qca807x_drivers[] = {
.config_init = qca807x_config,
.read_status = qca807x_read_status,
.config_intr = qca807x_config_intr,
#if LINUX_VERSION_CODE < KERNEL_VERSION(5,12,0)
.ack_interrupt = qca807x_ack_intr,
#else
.handle_interrupt = qca807x_handle_interrupt,
#endif
.soft_reset = genphy_soft_reset,
.get_tunable = qca807x_get_tunable,
.set_tunable = qca807x_set_tunable,

2
target/linux/ipq40xx/mikrotik/config-default
View File

@ -1,5 +1,5 @@
CONFIG_MIKROTIK=y
CONFIG_MIKROTIK_RB_SYSFS=y
CONFIG_MTD_ROUTERBOOT_PARTS=y
CONFIG_MTD_SPLIT_MINOR_FW=y
CONFIG_MTD_SPI_NOR_USE_VARIABLE_ERASE=y
CONFIG_MTD_SPLIT_MINOR_FW=y

115
target/linux/ipq40xx/patches-5.15/104-clk-fix-apss-cpu-overclocking.patch Normal file
View File

@ -0,0 +1,115 @@
From f2b87dc1028b710ec8ce25808b9d21f92b376184 Mon Sep 17 00:00:00 2001
From: Christian Lamparter <chunkeey@googlemail.com>
Date: Sun, 11 Mar 2018 14:41:31 +0100
Subject: [PATCH 2/2] clk: fix apss cpu overclocking
There's an interaction issue between the clk changes:"
clk: qcom: ipq4019: Add the apss cpu pll divider clock node
clk: qcom: ipq4019: remove fixed clocks and add pll clocks
" and the cpufreq-dt.
cpufreq-dt is now spamming the kernel-log with the following:
[ 1099.190658] cpu cpu0: dev_pm_opp_set_rate: failed to find current OPP
for freq 761142857 (-34)
This only happens on certain devices like the Compex WPJ428
and AVM FritzBox!4040. However, other devices like the Asus
RT-AC58U and Meraki MR33 work just fine.
The issue stem from the fact that all higher CPU-Clocks
are achieved by switching the clock-parent to the P_DDRPLLAPSS
(ddrpllapss). Which is set by Qualcomm's proprietary bootcode
as part of the DDR calibration.
For example, the FB4040 uses 256 MiB Nanya NT5CC128M16IP clocked
at round 533 MHz (ddrpllsdcc = 190285714 Hz).
whereas the 128 MiB Nanya NT5CC64M16GP-DI in the ASUS RT-AC58U is
clocked at a slightly higher 537 MHz ( ddrpllsdcc = 192000000 Hz).
This patch attempts to fix the issue by modifying
clk_cpu_div_round_rate(), clk_cpu_div_set_rate(), clk_cpu_div_recalc_rate()
to use a new qcom_find_freq_close() function, which returns the closest
matching frequency, instead of the next higher. This way, the SoC in
the FB4040 (with its max clock speed of 710.4 MHz) will no longer
try to overclock to 761 MHz.
Fixes: d83dcacea18 ("clk: qcom: ipq4019: Add the apss cpu pll divider clock node")
Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
Signed-off-by: John Crispin <john@phrozen.org>
---
drivers/clk/qcom/gcc-ipq4019.c | 34 +++++++++++++++++++++++++++++++---
1 file changed, 31 insertions(+), 3 deletions(-)
--- a/drivers/clk/qcom/gcc-ipq4019.c
+++ b/drivers/clk/qcom/gcc-ipq4019.c
@@ -1243,6 +1243,29 @@ static const struct clk_fepll_vco gcc_fe
.reg = 0x2f020,
};
+
+const struct freq_tbl *qcom_find_freq_close(const struct freq_tbl *f,
+ unsigned long rate)
+{
+ const struct freq_tbl *last = NULL;
+
+ for ( ; f->freq; f++) {
+ if (rate == f->freq)
+ return f;
+
+ if (f->freq > rate) {
+ if (!last ||
+ (f->freq - rate) < (rate - last->freq))
+ return f;
+ else
+ return last;
+ }
+ last = f;
+ }
+
+ return last;
+}
+
/*
* Round rate function for APSS CPU PLL Clock divider.
* It looks up the frequency table and returns the next higher frequency
@@ -1255,7 +1278,7 @@ static long clk_cpu_div_round_rate(struc
struct clk_hw *p_hw;
const struct freq_tbl *f;
- f = qcom_find_freq(pll->freq_tbl, rate);
+ f = qcom_find_freq_close(pll->freq_tbl, rate);
if (!f)
return -EINVAL;
@@ -1277,7 +1300,7 @@ static int clk_cpu_div_set_rate(struct c
const struct freq_tbl *f;
u32 mask;
- f = qcom_find_freq(pll->freq_tbl, rate);
+ f = qcom_find_freq_close(pll->freq_tbl, rate);
if (!f)
return -EINVAL;
@@ -1304,6 +1327,7 @@ static unsigned long
clk_cpu_div_recalc_rate(struct clk_hw *hw,
unsigned long parent_rate)
{
+ const struct freq_tbl *f;
struct clk_fepll *pll = to_clk_fepll(hw);
u32 cdiv, pre_div;
u64 rate;
@@ -1324,7 +1348,11 @@ clk_cpu_div_recalc_rate(struct clk_hw *h
rate = clk_fepll_vco_calc_rate(pll, parent_rate) * 2;
do_div(rate, pre_div);
- return rate;
+ f = qcom_find_freq_close(pll->freq_tbl, rate);
+ if (!f)
+ return rate;
+
+ return f->freq;
};
static const struct clk_ops clk_regmap_cpu_div_ops = {

52
target/linux/ipq40xx/patches-5.15/300-clk-qcom-ipq4019-add-ess-reset.patch Normal file
View File

@ -0,0 +1,52 @@
From 480c1f7648fc586db12d6003c717c23667a4fcf0 Mon Sep 17 00:00:00 2001
From: Ram Chandra Jangir <rjangir@codeaurora.org>
Date: Tue, 28 Mar 2017 22:35:33 +0530
Subject: [PATCH] clk: qcom: ipq4019: add ess reset
Added the ESS reset in IPQ4019 GCC.
Signed-off-by: Ram Chandra Jangir <rjangir@codeaurora.org>
---
drivers/clk/qcom/gcc-ipq4019.c | 11 +++++++++++
include/dt-bindings/clock/qcom,gcc-ipq4019.h | 11 +++++++++++
2 files changed, 22 insertions(+)
--- a/drivers/clk/qcom/gcc-ipq4019.c
+++ b/drivers/clk/qcom/gcc-ipq4019.c
@@ -1735,6 +1735,17 @@ static const struct qcom_reset_map gcc_i
[GCC_TCSR_BCR] = {0x22000, 0},
[GCC_MPM_BCR] = {0x24000, 0},
[GCC_SPDM_BCR] = {0x25000, 0},
+ [ESS_MAC1_ARES] = {0x1200C, 0},
+ [ESS_MAC2_ARES] = {0x1200C, 1},
+ [ESS_MAC3_ARES] = {0x1200C, 2},
+ [ESS_MAC4_ARES] = {0x1200C, 3},
+ [ESS_MAC5_ARES] = {0x1200C, 4},
+ [ESS_PSGMII_ARES] = {0x1200C, 5},
+ [ESS_MAC1_CLK_DIS] = {0x1200C, 8},
+ [ESS_MAC2_CLK_DIS] = {0x1200C, 9},
+ [ESS_MAC3_CLK_DIS] = {0x1200C, 10},
+ [ESS_MAC4_CLK_DIS] = {0x1200C, 11},
+ [ESS_MAC5_CLK_DIS] = {0x1200C, 12},
};
static const struct regmap_config gcc_ipq4019_regmap_config = {
--- a/include/dt-bindings/clock/qcom,gcc-ipq4019.h
+++ b/include/dt-bindings/clock/qcom,gcc-ipq4019.h
@@ -165,5 +165,16 @@
#define GCC_QDSS_BCR 69
#define GCC_MPM_BCR 70
#define GCC_SPDM_BCR 71
+#define ESS_MAC1_ARES 72
+#define ESS_MAC2_ARES 73
+#define ESS_MAC3_ARES 74
+#define ESS_MAC4_ARES 75
+#define ESS_MAC5_ARES 76
+#define ESS_PSGMII_ARES 77
+#define ESS_MAC1_CLK_DIS 78
+#define ESS_MAC2_CLK_DIS 79
+#define ESS_MAC3_CLK_DIS 80
+#define ESS_MAC4_CLK_DIS 81
+#define ESS_MAC5_CLK_DIS 82
#endif

48
target/linux/ipq40xx/patches-5.15/301-arm-compressed-add-appended-DTB-section.patch Normal file
View File

@ -0,0 +1,48 @@
From 0843a61d6913bdac8889eb048ed89f7903059787 Mon Sep 17 00:00:00 2001
From: Robert Marko <robimarko@gmail.com>
Date: Fri, 30 Oct 2020 13:36:31 +0100
Subject: [PATCH] arm: compressed: add appended DTB section
This adds a appended_dtb section to the ARM decompressor
linker script.
This allows using the existing ARM zImage appended DTB support for
appending a DTB to the raw ELF kernel.
Its size is set to 1MB max to match the zImage appended DTB size limit.
To use it to pass the DTB to the kernel, objcopy is used:
objcopy --set-section-flags=.appended_dtb=alloc,contents \
--update-section=.appended_dtb=<target>.dtb vmlinux
This is based off the following patch:
https://github.com/openwrt/openwrt/commit/c063e27e02a9dcac0e7f5877fb154e58fa3e1a69
Signed-off-by: Robert Marko <robimarko@gmail.com>
---
arch/arm/boot/compressed/vmlinux.lds.S | 9 ++++++++-
1 file changed, 8 insertions(+), 1 deletion(-)
--- a/arch/arm/boot/compressed/vmlinux.lds.S
+++ b/arch/arm/boot/compressed/vmlinux.lds.S
@@ -101,6 +101,13 @@ SECTIONS
_edata = .;
+ .appended_dtb : {
+ /* leave space for appended DTB */
+ . += 0x100000;
+ }
+
+ _edata_dtb = .;
+
/*
* The image_end section appears after any additional loadable sections
* that the linker may decide to insert in the binary image. Having
@@ -138,4 +145,4 @@ SECTIONS
ARM_ASSERTS
}
-ASSERT(_edata_real == _edata, "error: zImage file size is incorrect");
+ASSERT(_edata_real == _edata_dtb, "error: zImage file size is incorrect");

66
target/linux/ipq40xx/patches-5.15/302-arm-compressed-set-ipq40xx-watchdog-to-allow-boot.patch Normal file
View File

@ -0,0 +1,66 @@
From 11d6a6128a5a07c429941afc202b6e62a19771be Mon Sep 17 00:00:00 2001
From: John Thomson <git@johnthomson.fastmail.com.au>
Date: Fri, 23 Oct 2020 19:42:36 +1000
Subject: [PATCH 2/2] arm: compressed: set ipq40xx watchdog to allow boot
For IPQ40XX systems where the SoC watchdog is activated before linux,
the watchdog timer may be too small for linux to finish uncompress,
boot, and watchdog management start.
If the watchdog is enabled, set the timeout for it to 30 seconds.
The functionality and offsets were copied from:
drivers/watchdog/qcom-wdt.c qcom_wdt_set_timeout & qcom_wdt_start
The watchdog memory address was taken from:
arch/arm/boot/dts/qcom-ipq4019.dtsi
This was required on Mikrotik IPQ40XX consumer hardware using Mikrotik's
RouterBoot bootloader.
Signed-off-by: John Thomson <git@johnthomson.fastmail.com.au>
---
arch/arm/boot/compressed/head.S | 35 +++++++++++++++++++++++++++++++++
1 file changed, 35 insertions(+)
--- a/arch/arm/boot/compressed/head.S
+++ b/arch/arm/boot/compressed/head.S
@@ -624,6 +624,41 @@ not_relocated: mov r0, #0
bic r4, r4, #1
blne cache_on
+/* Set the Qualcom IPQ40xx watchdog timeout to 30 seconds
+ * if it is enabled, so that there is time for kernel
+ * to decompress, boot, and take over the watchdog.
+ * data and functionality from drivers/watchdog/qcom-wdt.c
+ * address from arch/arm/boot/dts/qcom-ipq4019.dtsi
+ */
+#ifdef CONFIG_ARCH_IPQ40XX
+watchdog_set:
+ /* offsets:
+ * 0x04 reset (=1 resets countdown)
+ * 0x08 enable (=0 disables)
+ * 0x0c status (=1 when SoC was reset by watchdog)
+ * 0x10 bark (=timeout warning in ticks)
+ * 0x14 bite (=timeout reset in ticks)
+ * clock rate is 1<<15 hertz
+ */
+ .equ watchdog, 0x0b017000 @Store watchdog base address
+ movw r0, #:lower16:watchdog
+ movt r0, #:upper16:watchdog
+ ldr r1, [r0, #0x08] @Get enabled?
+ cmp r1, #1 @If not enabled, do not change
+ bne watchdog_finished
+ mov r1, #0
+ str r1, [r0, #0x08] @Disable the watchdog
+ mov r1, #1
+ str r1, [r0, #0x04] @Pet the watchdog
+ mov r1, #30 @30 seconds timeout
+ lsl r1, r1, #15 @converted to ticks
+ str r1, [r0, #0x10] @Set the bark timeout
+ str r1, [r0, #0x14] @Set the bite timeout
+ mov r1, #1
+ str r1, [r0, #0x08] @Enable the watchdog
+watchdog_finished:
+#endif /* CONFIG_ARCH_IPQ40XX */
+
/*
* The C runtime environment should now be setup sufficiently.
* Set up some pointers, and start decompressing.

24
target/linux/ipq40xx/patches-5.15/400-mmc-sdhci-sdhci-msm-use-sdhci_set_clock-instead-of-s.patch Normal file
View File

@ -0,0 +1,24 @@
From f63ea127643a605da97090ce585fdd7c2d17fa42 Mon Sep 17 00:00:00 2001
From: Robert Marko <robert.marko@sartura.hr>
Date: Mon, 14 Dec 2020 13:35:35 +0100
Subject: [PATCH] mmc: sdhci-msm: use sdhci_set_clock
When using sdhci_msm_set_clock clock setting will fail, so lets
use the generic sdhci_set_clock.
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
---
drivers/mmc/host/sdhci-msm.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
--- a/drivers/mmc/host/sdhci-msm.c
+++ b/drivers/mmc/host/sdhci-msm.c
@@ -2445,7 +2445,7 @@ MODULE_DEVICE_TABLE(of, sdhci_msm_dt_mat
static const struct sdhci_ops sdhci_msm_ops = {
.reset = sdhci_msm_reset,
- .set_clock = sdhci_msm_set_clock,
+ .set_clock = sdhci_set_clock,
.get_min_clock = sdhci_msm_get_min_clock,
.get_max_clock = sdhci_msm_get_max_clock,
.set_bus_width = sdhci_set_bus_width,

47
target/linux/ipq40xx/patches-5.15/420-firmware-qcom-scm-disable-SDI.patch Normal file
View File

@ -0,0 +1,47 @@
--- a/drivers/firmware/qcom_scm.c
+++ b/drivers/firmware/qcom_scm.c
@@ -404,6 +404,20 @@ static int __qcom_scm_set_dload_mode(str
return qcom_scm_call_atomic(__scm->dev, &desc, NULL);
}
+static int __qcom_scm_disable_sdi(struct device *dev)
+{
+ struct qcom_scm_desc desc = {
+ .svc = QCOM_SCM_SVC_BOOT,
+ .cmd = QCOM_SCM_BOOT_CONFIG_SDI,
+ .arginfo = QCOM_SCM_ARGS(2),
+ .args[0] = 1 /* 1: disable watchdog debug */,
+ .args[1] = 0 /* 0: disable SDI */,
+ .owner = ARM_SMCCC_OWNER_SIP,
+ };
+
+ return qcom_scm_call(__scm->dev, &desc, NULL);
+}
+
static void qcom_scm_set_download_mode(bool enable)
{
bool avail;
@@ -1320,6 +1334,13 @@ static int qcom_scm_probe(struct platfor
if (download_mode)
qcom_scm_set_download_mode(true);
+ /*
+ * Factory firmware leaves SDI (a debug interface), which prevents
+ * clean reboot.
+ */
+ if (of_machine_is_compatible("google,wifi"))
+ __qcom_scm_disable_sdi(__scm->dev);
+
return 0;
}
--- a/drivers/firmware/qcom_scm.h
+++ b/drivers/firmware/qcom_scm.h
@@ -77,6 +77,7 @@ extern int scm_legacy_call(struct device
#define QCOM_SCM_SVC_BOOT 0x01
#define QCOM_SCM_BOOT_SET_ADDR 0x01
#define QCOM_SCM_BOOT_TERMINATE_PC 0x02
+#define QCOM_SCM_BOOT_CONFIG_SDI 0x09
#define QCOM_SCM_BOOT_SET_DLOAD_MODE 0x10
#define QCOM_SCM_BOOT_SET_REMOTE_STATE 0x0a
#define QCOM_SCM_FLUSH_FLAG_MASK 0x3

121
target/linux/ipq40xx/patches-5.15/421-firmware-qcom-scm-cold-boot-address.patch Normal file
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@ -0,0 +1,121 @@
--- a/drivers/firmware/qcom_scm-legacy.c
+++ b/drivers/firmware/qcom_scm-legacy.c
@@ -13,6 +13,9 @@
#include <linux/arm-smccc.h>
#include <linux/dma-mapping.h>
+#include <asm/cacheflush.h>
+#include <asm/outercache.h>
+
#include "qcom_scm.h"
static DEFINE_MUTEX(qcom_scm_lock);
@@ -117,6 +120,25 @@ static void __scm_legacy_do(const struct
} while (res->a0 == QCOM_SCM_INTERRUPTED);
}
+static void qcom_scm_inv_range(unsigned long start, unsigned long end)
+{
+ u32 cacheline_size, ctr;
+
+ asm volatile("mrc p15, 0, %0, c0, c0, 1" : "=r" (ctr));
+ cacheline_size = 4 << ((ctr >> 16) & 0xf);
+
+ start = round_down(start, cacheline_size);
+ end = round_up(end, cacheline_size);
+ outer_inv_range(start, end);
+ while (start < end) {
+ asm ("mcr p15, 0, %0, c7, c6, 1" : : "r" (start)
+ : "memory");
+ start += cacheline_size;
+ }
+ dsb();
+ isb();
+}
+
/**
* scm_legacy_call() - Sends a command to the SCM and waits for the command to
* finish processing.
@@ -160,10 +182,16 @@ int scm_legacy_call(struct device *dev,
rsp = scm_legacy_command_to_response(cmd);
- cmd_phys = dma_map_single(dev, cmd, alloc_len, DMA_TO_DEVICE);
- if (dma_mapping_error(dev, cmd_phys)) {
- kfree(cmd);
- return -ENOMEM;
+ if (dev) {
+ cmd_phys = dma_map_single(dev, cmd, alloc_len, DMA_TO_DEVICE);
+ if (dma_mapping_error(dev, cmd_phys)) {
+ kfree(cmd);
+ return -ENOMEM;
+ }
+ } else {
+ cmd_phys = virt_to_phys(cmd);
+ __cpuc_flush_dcache_area(cmd, alloc_len);
+ outer_flush_range(cmd_phys, cmd_phys + alloc_len);
}
smc.args[0] = 1;
@@ -179,13 +207,26 @@ int scm_legacy_call(struct device *dev,
goto out;
do {
- dma_sync_single_for_cpu(dev, cmd_phys + sizeof(*cmd) + cmd_len,
- sizeof(*rsp), DMA_FROM_DEVICE);
+ if (dev) {
+ dma_sync_single_for_cpu(dev, cmd_phys + sizeof(*cmd) +
+ cmd_len, sizeof(*rsp),
+ DMA_FROM_DEVICE);
+ } else {
+ unsigned long start = (uintptr_t)cmd + sizeof(*cmd) +
+ cmd_len;
+ qcom_scm_inv_range(start, start + sizeof(*rsp));
+ }
} while (!rsp->is_complete);
- dma_sync_single_for_cpu(dev, cmd_phys + sizeof(*cmd) + cmd_len +
- le32_to_cpu(rsp->buf_offset),
- resp_len, DMA_FROM_DEVICE);
+ if (dev) {
+ dma_sync_single_for_cpu(dev, cmd_phys + sizeof(*cmd) + cmd_len +
+ le32_to_cpu(rsp->buf_offset),
+ resp_len, DMA_FROM_DEVICE);
+ } else {
+ unsigned long start = (uintptr_t)cmd + sizeof(*cmd) + cmd_len +
+ le32_to_cpu(rsp->buf_offset);
+ qcom_scm_inv_range(start, start + resp_len);
+ }
if (res) {
res_buf = scm_legacy_get_response_buffer(rsp);
@@ -193,7 +234,8 @@ int scm_legacy_call(struct device *dev,
res->result[i] = le32_to_cpu(res_buf[i]);
}
out:
- dma_unmap_single(dev, cmd_phys, alloc_len, DMA_TO_DEVICE);
+ if (dev)
+ dma_unmap_single(dev, cmd_phys, alloc_len, DMA_TO_DEVICE);
kfree(cmd);
return ret;
}
--- a/drivers/firmware/qcom_scm.c
+++ b/drivers/firmware/qcom_scm.c
@@ -344,6 +344,17 @@ int qcom_scm_set_cold_boot_addr(void *en
desc.args[0] = flags;
desc.args[1] = virt_to_phys(entry);
+ /*
+ * Factory firmware doesn't support the atomic variant. Non-atomic SCMs
+ * require ugly DMA invalidation support that was dropped upstream a
+ * while ago. For more info, see:
+ *
+ * [RFC] qcom_scm: IPQ4019 firmware does not support atomic API?
+ * https://lore.kernel.org/linux-arm-msm/20200913201608.GA3162100@bDebian/
+ */
+ if (of_machine_is_compatible("google,wifi"))
+ return qcom_scm_call(__scm ? __scm->dev : NULL, &desc, NULL);
+
return qcom_scm_call_atomic(__scm ? __scm->dev : NULL, &desc, NULL);
}
EXPORT_SYMBOL(qcom_scm_set_cold_boot_addr);

46
target/linux/ipq40xx/patches-5.15/702-dts-ipq4019-add-PHY-switch-nodes.patch Normal file
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@ -0,0 +1,46 @@
From 9deeec35dd3b628b95624e41d4e04acf728991ba Mon Sep 17 00:00:00 2001
From: Christian Lamparter <chunkeey@gmail.com>
Date: Sun, 20 Nov 2016 02:20:54 +0100
Subject: [PATCH] dts: ipq4019: add PHY/switch nodes
This patch adds both the "qcom,ess-switch" and "qcom,ess-psgmii"
nodes which are needed for the ar40xx.c driver to initialize the
switch.
Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
---
arch/arm/boot/dts/qcom-ipq4019.dtsi | 23 +++++++++++++++++++++++
1 file changed, 23 insertions(+)
--- a/arch/arm/boot/dts/qcom-ipq4019.dtsi
+++ b/arch/arm/boot/dts/qcom-ipq4019.dtsi
@@ -617,6 +617,29 @@
};
};
+ ess-switch@c000000 {
+ compatible = "qcom,ess-switch";
+ reg = <0xc000000 0x80000>;
+ switch_access_mode = "local bus";
+ resets = <&gcc ESS_RESET>;
+ reset-names = "ess_rst";
+ clocks = <&gcc GCC_ESS_CLK>;
+ clock-names = "ess_clk";
+ switch_cpu_bmp = <0x1>;
+ switch_lan_bmp = <0x1e>;
+ switch_wan_bmp = <0x20>;
+ switch_mac_mode = <0>; /* PORT_WRAPPER_PSGMII */
+ switch_initvlas = <0x7c 0x54>;
+ status = "disabled";
+ };
+
+ ess-psgmii@98000 {
+ compatible = "qcom,ess-psgmii";
+ reg = <0x98000 0x800>;
+ psgmii_access_mode = "local bus";
+ status = "disabled";
+ };
+
usb3_ss_phy: ssphy@9a000 {
compatible = "qcom,usb-ss-ipq4019-phy";
#phy-cells = <0>;

53
target/linux/ipq40xx/patches-5.15/703-net-IPQ4019-needs-rfs-vlan_tag-callbacks-in.patch Normal file
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@ -0,0 +1,53 @@
From 7c129254adb1093d10a62ed7bf7b956fcc6ffe34 Mon Sep 17 00:00:00 2001
From: Rakesh Nair <ranair@codeaurora.org>
Date: Wed, 20 Jul 2016 15:02:01 +0530
Subject: [PATCH] net: IPQ4019 needs rfs/vlan_tag callbacks in
netdev_ops
Add callback support to get default vlan tag and register
receive flow steering filter.
Used by IPQ4019 ess-edma driver.
BUG=chrome-os-partner:33096
TEST=none
Change-Id: I266070e4a0fbe4a0d9966fe79a71e50ec4f26c75
Signed-off-by: Rakesh Nair <ranair@codeaurora.org>
Reviewed-on: https://chromium-review.googlesource.com/362203
Commit-Ready: Grant Grundler <grundler@chromium.org>
Tested-by: Grant Grundler <grundler@chromium.org>
Reviewed-by: Grant Grundler <grundler@chromium.org>
---
include/linux/netdevice.h | 13 +++++++++++++
1 file changed, 13 insertions(+)
--- a/include/linux/netdevice.h
+++ b/include/linux/netdevice.h
@@ -771,6 +771,16 @@ struct xps_map {
#define XPS_MIN_MAP_ALLOC ((L1_CACHE_ALIGN(offsetof(struct xps_map, queues[1])) \
- sizeof(struct xps_map)) / sizeof(u16))
+#ifdef CONFIG_RFS_ACCEL
+typedef int (*set_rfs_filter_callback_t)(struct net_device *dev,
+ __be32 src,
+ __be32 dst,
+ __be16 sport,
+ __be16 dport,
+ u8 proto,
+ u16 rxq_index,
+ u32 action);
+#endif
/*
* This structure holds all XPS maps for device. Maps are indexed by CPU.
*
@@ -1477,6 +1487,9 @@ struct net_device_ops {
const struct sk_buff *skb,
u16 rxq_index,
u32 flow_id);
+ int (*ndo_register_rfs_filter)(struct net_device *dev,
+ set_rfs_filter_callback_t set_filter);
+ int (*ndo_get_default_vlan_tag)(struct net_device *net);
#endif
int (*ndo_add_slave)(struct net_device *dev,
struct net_device *slave_dev,

27
target/linux/ipq40xx/patches-5.15/705-net-add-qualcomm-ar40xx-phy.patch Normal file
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@ -0,0 +1,27 @@
--- a/drivers/net/mdio/Kconfig
+++ b/drivers/net/mdio/Kconfig
@@ -41,6 +41,13 @@ config ACPI_MDIO
help
ACPI MDIO bus (Ethernet PHY) accessors
+config AR40XX_PHY
+ tristate "Driver for Qualcomm Atheros IPQ40XX switches"
+ depends on HAS_IOMEM && OF && OF_MDIO
+ select SWCONFIG
+ help
+ This is the driver for Qualcomm Atheros IPQ40XX ESS switches.
+
if MDIO_BUS
config MDIO_DEVRES
--- a/drivers/net/mdio/Makefile
+++ b/drivers/net/mdio/Makefile
@@ -23,6 +23,8 @@ obj-$(CONFIG_MDIO_SUN4I) += mdio-sun4i.
obj-$(CONFIG_MDIO_THUNDER) += mdio-thunder.o
obj-$(CONFIG_MDIO_XGENE) += mdio-xgene.o
+obj-$(CONFIG_AR40XX_PHY) += ar40xx.o
+
obj-$(CONFIG_MDIO_BUS_MUX) += mdio-mux.o
obj-$(CONFIG_MDIO_BUS_MUX_BCM6368) += mdio-mux-bcm6368.o
obj-$(CONFIG_MDIO_BUS_MUX_BCM_IPROC) += mdio-mux-bcm-iproc.o

61
target/linux/ipq40xx/patches-5.15/706-dt-bindings-net-add-QCA807x-PHY.patch Normal file
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@ -0,0 +1,61 @@
From c66863c1ba8995b61e6d727d78a241c734f5bb57 Mon Sep 17 00:00:00 2001
From: Robert Marko <robert.marko@sartura.hr>
Date: Thu, 1 Oct 2020 15:05:35 +0200
Subject: [PATCH] dt-bindings: net: add QCA807x PHY
Add DT bindings for Qualcomm QCA807x PHY series.
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
---
include/dt-bindings/net/qcom-qca807x.h | 45 ++++++++++++++++++++++++++
1 file changed, 45 insertions(+)
create mode 100644 include/dt-bindings/net/qcom-qca807x.h
--- /dev/null
+++ b/include/dt-bindings/net/qcom-qca807x.h
@@ -0,0 +1,45 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+/*
+ * Device Tree constants for the Qualcomm QCA807X PHYs
+ */
+
+#ifndef _DT_BINDINGS_QCOM_QCA807X_H
+#define _DT_BINDINGS_QCOM_QCA807X_H
+
+#define PSGMII_QSGMII_TX_DRIVER_140MV 0
+#define PSGMII_QSGMII_TX_DRIVER_160MV 1
+#define PSGMII_QSGMII_TX_DRIVER_180MV 2
+#define PSGMII_QSGMII_TX_DRIVER_200MV 3
+#define PSGMII_QSGMII_TX_DRIVER_220MV 4
+#define PSGMII_QSGMII_TX_DRIVER_240MV 5
+#define PSGMII_QSGMII_TX_DRIVER_260MV 6
+#define PSGMII_QSGMII_TX_DRIVER_280MV 7
+#define PSGMII_QSGMII_TX_DRIVER_300MV 8
+#define PSGMII_QSGMII_TX_DRIVER_320MV 9
+#define PSGMII_QSGMII_TX_DRIVER_400MV 10
+#define PSGMII_QSGMII_TX_DRIVER_500MV 11
+/* Default value */
+#define PSGMII_QSGMII_TX_DRIVER_600MV 12
+
+/* Full amplitude, full bias current */
+#define QCA807X_CONTROL_DAC_FULL_VOLT_BIAS 0
+/* Amplitude follow DSP (amplitude is adjusted based on cable length), half bias current */
+#define QCA807X_CONTROL_DAC_DSP_VOLT_HALF_BIAS 1
+/* Full amplitude, bias current follow DSP (bias current is adjusted based on cable length) */
+#define QCA807X_CONTROL_DAC_FULL_VOLT_DSP_BIAS 2
+/* Both amplitude and bias current follow DSP */
+#define QCA807X_CONTROL_DAC_DSP_VOLT_BIAS 3
+/* Full amplitude, half bias current */
+#define QCA807X_CONTROL_DAC_FULL_VOLT_HALF_BIAS 4
+/* Amplitude follow DSP setting; 1/4 bias current when cable<10m,
+ * otherwise half bias current
+ */
+#define QCA807X_CONTROL_DAC_DSP_VOLT_QUARTER_BIAS 5
+/* Full amplitude; same bias current setting with “010” and “011”,
+ * but half more bias is reduced when cable <10m
+ */
+#define QCA807X_CONTROL_DAC_FULL_VOLT_HALF_BIAS_SHORT 6
+/* Amplitude follow DSP; same bias current setting with “110”, default value */
+#define QCA807X_CONTROL_DAC_DSP_VOLT_HALF_BIAS_SHORT 7
+
+#endif

50
target/linux/ipq40xx/patches-5.15/707-net-phy-Add-Qualcom-QCA807x-driver.patch Normal file
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@ -0,0 +1,50 @@
From f825cdc8bfde7616a14e2163f16303a8973031d2 Mon Sep 17 00:00:00 2001
From: Robert Marko <robert.marko@sartura.hr>
Date: Wed, 7 Oct 2020 17:38:48 +0200
Subject: [PATCH] net: phy: Add Qualcom QCA807x driver
This adds driver for the Qualcomm QCA8072 and QCA8075 PHY-s.
They are 2 or 5 port IEEE 802.3 clause 22 compliant 10BASE-Te, 100BASE-TX and 1000BASE-T PHY-s.
They feature 2 SerDes, one for PSGMII or QSGMII connection with MAC, while second one is SGMII for connection to MAC or fiber.
Both models have a combo port that supports 1000BASE-X and 100BASE-FX fiber.
Each PHY inside of QCA807x series has 4 digitally controlled output only pins that natively drive LED-s.
But some vendors used these to driver generic LED-s controlled by userspace,
so lets enable registering each PHY as GPIO controller and add driver for it.
These are commonly used in Qualcomm IPQ40xx, IPQ60xx and IPQ807x boards.
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
---
drivers/net/phy/Kconfig | 6 ++++++
drivers/net/phy/Makefile | 1 +
2 files changed, 7 insertions(+)
--- a/drivers/net/phy/Kconfig
+++ b/drivers/net/phy/Kconfig
@@ -346,6 +346,12 @@ config AT803X_PHY
Currently supports the AR8030, AR8031, AR8033, AR8035 and internal
QCA8337(Internal qca8k PHY) model
+config QCA807X_PHY
+ tristate "Qualcomm QCA807X PHYs"
+ depends on OF_MDIO
+ help
+ Currently supports the QCA8072 and QCA8075 models.
+
config QSEMI_PHY
tristate "Quality Semiconductor PHYs"
help
--- a/drivers/net/phy/Makefile
+++ b/drivers/net/phy/Makefile
@@ -90,6 +90,7 @@ obj-$(CONFIG_NATIONAL_PHY) += national.o
obj-$(CONFIG_NXP_C45_TJA11XX_PHY) += nxp-c45-tja11xx.o
obj-$(CONFIG_NXP_TJA11XX_PHY) += nxp-tja11xx.o
obj-$(CONFIG_QSEMI_PHY) += qsemi.o
+obj-$(CONFIG_QCA807X_PHY) += qca807x.o
obj-$(CONFIG_REALTEK_PHY) += realtek.o
obj-$(CONFIG_RENESAS_PHY) += uPD60620.o
obj-$(CONFIG_ROCKCHIP_PHY) += rockchip.o

62
target/linux/ipq40xx/patches-5.15/708-arm-dts-ipq4019-QCA807x-properties.patch Normal file
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@ -0,0 +1,62 @@
From e0fa88eaa3c176b71e563da68949ac2ab45aaa61 Mon Sep 17 00:00:00 2001
From: Robert Marko <robert.marko@sartura.hr>
Date: Fri, 2 Oct 2020 10:43:26 +0200
Subject: [PATCH] arm: dts: ipq4019: QCA807x properties
This adds necessary DT properties for QCA807x PHY-s to IPQ4019 DTSI.
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
---
arch/arm/boot/dts/qcom-ipq4019.dtsi | 18 ++++++++++++++++++
1 file changed, 18 insertions(+)
--- a/arch/arm/boot/dts/qcom-ipq4019.dtsi
+++ b/arch/arm/boot/dts/qcom-ipq4019.dtsi
@@ -8,6 +8,7 @@
#include <dt-bindings/clock/qcom,gcc-ipq4019.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/interrupt-controller/irq.h>
+#include <dt-bindings/net/qcom-qca807x.h>
/ {
#address-cells = <1>;
@@ -598,22 +599,39 @@
ethphy0: ethernet-phy@0 {
reg = <0>;
+
+ qcom,control-dac = <QCA807X_CONTROL_DAC_DSP_VOLT_QUARTER_BIAS>;
};
ethphy1: ethernet-phy@1 {
reg = <1>;
+
+ qcom,control-dac = <QCA807X_CONTROL_DAC_DSP_VOLT_QUARTER_BIAS>;
};
ethphy2: ethernet-phy@2 {
reg = <2>;
+
+ qcom,control-dac = <QCA807X_CONTROL_DAC_DSP_VOLT_QUARTER_BIAS>;
};
ethphy3: ethernet-phy@3 {
reg = <3>;
+
+ qcom,control-dac = <QCA807X_CONTROL_DAC_DSP_VOLT_QUARTER_BIAS>;
};
ethphy4: ethernet-phy@4 {
reg = <4>;
+
+ qcom,control-dac = <QCA807X_CONTROL_DAC_DSP_VOLT_QUARTER_BIAS>;
+ };
+
+ psgmiiphy: psgmii-phy@5 {
+ reg = <5>;
+
+ qcom,tx-driver-strength = <PSGMII_QSGMII_TX_DRIVER_300MV>;
+ qcom,psgmii-az;
};
};

37
target/linux/ipq40xx/patches-5.15/710-net-add-qualcomm-essedma-ethernet-driver.patch Normal file
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@ -0,0 +1,37 @@
From 12e9319da1adacac92930c899c99f0e1970cac11 Mon Sep 17 00:00:00 2001
From: Christian Lamparter <chunkeey@googlemail.com>
Date: Thu, 19 Jan 2017 02:01:31 +0100
Subject: [PATCH 33/38] NET: add qualcomm essedma ethernet driver
Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
---
drivers/net/ethernet/qualcomm/Kconfig | 9 +++++++++
drivers/net/ethernet/qualcomm/Makefile | 1 +
2 files changed, 10 insertions(+)
--- a/drivers/net/ethernet/qualcomm/Kconfig
+++ b/drivers/net/ethernet/qualcomm/Kconfig
@@ -62,4 +62,14 @@ config QCOM_EMAC
source "drivers/net/ethernet/qualcomm/rmnet/Kconfig"
+config ESSEDMA
+ tristate "Qualcomm Atheros ESS Edma support"
+ depends on OF_MDIO
+ help
+ This driver supports ethernet edma adapter.
+ Say Y to build this driver.
+
+ To compile this driver as a module, choose M here. The module
+ will be called essedma.ko.
+
endif # NET_VENDOR_QUALCOMM
--- a/drivers/net/ethernet/qualcomm/Makefile
+++ b/drivers/net/ethernet/qualcomm/Makefile
@@ -10,5 +10,6 @@ obj-$(CONFIG_QCA7000_UART) += qcauart.o
qcauart-objs := qca_uart.o
obj-y += emac/
+obj-$(CONFIG_ESSEDMA) += essedma/
obj-$(CONFIG_RMNET) += rmnet/

92
target/linux/ipq40xx/patches-5.15/711-dts-ipq4019-add-ethernet-essedma-node.patch Normal file
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@ -0,0 +1,92 @@
From c611d3780fa101662a822d10acf8feb04ca97409 Mon Sep 17 00:00:00 2001
From: Christian Lamparter <chunkeey@gmail.com>
Date: Sun, 20 Nov 2016 01:01:10 +0100
Subject: [PATCH] dts: ipq4019: add ethernet essedma node
This patch adds the device-tree node for the ethernet
interfaces.
Note: The driver isn't anywhere close to be upstream,
so the info might change.
Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
---
arch/arm/boot/dts/qcom-ipq4019.dtsi | 60 +++++++++++++++++++++++++++++++++++++
1 file changed, 60 insertions(+)
--- a/arch/arm/boot/dts/qcom-ipq4019.dtsi
+++ b/arch/arm/boot/dts/qcom-ipq4019.dtsi
@@ -39,6 +39,8 @@
spi1 = &blsp1_spi2;
i2c0 = &blsp1_i2c3;
i2c1 = &blsp1_i2c4;
+ ethernet0 = &gmac0;
+ ethernet1 = &gmac1;
};
cpus {
@@ -658,6 +660,64 @@
status = "disabled";
};
+ edma@c080000 {
+ compatible = "qcom,ess-edma";
+ reg = <0xc080000 0x8000>;
+ qcom,page-mode = <0>;
+ qcom,rx_head_buf_size = <1540>;
+ qcom,mdio_supported;
+ qcom,poll_required = <1>;
+ qcom,num_gmac = <2>;
+ interrupts = <0 65 IRQ_TYPE_EDGE_RISING
+ 0 66 IRQ_TYPE_EDGE_RISING
+ 0 67 IRQ_TYPE_EDGE_RISING
+ 0 68 IRQ_TYPE_EDGE_RISING
+ 0 69 IRQ_TYPE_EDGE_RISING
+ 0 70 IRQ_TYPE_EDGE_RISING
+ 0 71 IRQ_TYPE_EDGE_RISING
+ 0 72 IRQ_TYPE_EDGE_RISING
+ 0 73 IRQ_TYPE_EDGE_RISING
+ 0 74 IRQ_TYPE_EDGE_RISING
+ 0 75 IRQ_TYPE_EDGE_RISING
+ 0 76 IRQ_TYPE_EDGE_RISING
+ 0 77 IRQ_TYPE_EDGE_RISING
+ 0 78 IRQ_TYPE_EDGE_RISING
+ 0 79 IRQ_TYPE_EDGE_RISING
+ 0 80 IRQ_TYPE_EDGE_RISING
+ 0 240 IRQ_TYPE_EDGE_RISING
+ 0 241 IRQ_TYPE_EDGE_RISING
+ 0 242 IRQ_TYPE_EDGE_RISING
+ 0 243 IRQ_TYPE_EDGE_RISING
+ 0 244 IRQ_TYPE_EDGE_RISING
+ 0 245 IRQ_TYPE_EDGE_RISING
+ 0 246 IRQ_TYPE_EDGE_RISING
+ 0 247 IRQ_TYPE_EDGE_RISING
+ 0 248 IRQ_TYPE_EDGE_RISING
+ 0 249 IRQ_TYPE_EDGE_RISING
+ 0 250 IRQ_TYPE_EDGE_RISING
+ 0 251 IRQ_TYPE_EDGE_RISING
+ 0 252 IRQ_TYPE_EDGE_RISING
+ 0 253 IRQ_TYPE_EDGE_RISING
+ 0 254 IRQ_TYPE_EDGE_RISING
+ 0 255 IRQ_TYPE_EDGE_RISING>;
+
+ status = "disabled";
+
+ gmac0: gmac0 {
+ local-mac-address = [00 00 00 00 00 00];
+ vlan_tag = <1 0x1f>;
+ };
+
+ gmac1: gmac1 {
+ local-mac-address = [00 00 00 00 00 00];
+ qcom,phy_mdio_addr = <4>;
+ qcom,poll_required = <1>;
+ qcom,forced_speed = <1000>;
+ qcom,forced_duplex = <1>;
+ vlan_tag = <2 0x20>;
+ };
+ };
+
usb3_ss_phy: ssphy@9a000 {
compatible = "qcom,usb-ss-ipq4019-phy";
#phy-cells = <0>;

180
target/linux/ipq40xx/patches-5.15/850-soc-add-qualcomm-syscon.patch Normal file
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@ -0,0 +1,180 @@
From: Christian Lamparter <chunkeey@googlemail.com>
Subject: SoC: add qualcomm syscon
--- a/drivers/soc/qcom/Makefile
+++ b/drivers/soc/qcom/Makefile
@@ -21,6 +21,7 @@ obj-$(CONFIG_QCOM_SMP2P) += smp2p.o
obj-$(CONFIG_QCOM_SMSM) += smsm.o
obj-$(CONFIG_QCOM_SOCINFO) += socinfo.o
obj-$(CONFIG_QCOM_WCNSS_CTRL) += wcnss_ctrl.o
+obj-$(CONFIG_QCOM_TCSR) += qcom_tcsr.o
obj-$(CONFIG_QCOM_APR) += apr.o
obj-$(CONFIG_QCOM_LLCC) += llcc-qcom.o
obj-$(CONFIG_QCOM_RPMHPD) += rpmhpd.o
--- a/drivers/soc/qcom/Kconfig
+++ b/drivers/soc/qcom/Kconfig
@@ -190,6 +190,13 @@ config QCOM_SOCINFO
Say yes here to support the Qualcomm socinfo driver, providing
information about the SoC to user space.
+config QCOM_TCSR
+ tristate "QCOM Top Control and Status Registers"
+ depends on ARCH_QCOM
+ help
+ Say y here to enable TCSR support. The TCSR provides control
+ functions for various peripherals.
+
config QCOM_WCNSS_CTRL
tristate "Qualcomm WCNSS control driver"
depends on ARCH_QCOM || COMPILE_TEST
--- /dev/null
+++ b/drivers/soc/qcom/qcom_tcsr.c
@@ -0,0 +1,98 @@
+/*
+ * Copyright (c) 2014, The Linux foundation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License rev 2 and
+ * only rev 2 as published by the free Software foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or fITNESS fOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <linux/clk.h>
+#include <linux/err.h>
+#include <linux/io.h>
+#include <linux/module.h>
+#include <linux/of.h>
+#include <linux/of_platform.h>
+#include <linux/platform_device.h>
+
+#define TCSR_USB_PORT_SEL 0xb0
+#define TCSR_USB_HSPHY_CONFIG 0xC
+
+#define TCSR_ESS_INTERFACE_SEL_OFFSET 0x0
+#define TCSR_ESS_INTERFACE_SEL_MASK 0xf
+
+#define TCSR_WIFI0_GLB_CFG_OFFSET 0x0
+#define TCSR_WIFI1_GLB_CFG_OFFSET 0x4
+#define TCSR_PNOC_SNOC_MEMTYPE_M0_M2 0x4
+
+static int tcsr_probe(struct platform_device *pdev)
+{
+ struct resource *res;
+ const struct device_node *node = pdev->dev.of_node;
+ void __iomem *base;
+ u32 val;
+
+ res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+ base = devm_ioremap_resource(&pdev->dev, res);
+ if (IS_ERR(base))
+ return PTR_ERR(base);
+
+ if (!of_property_read_u32(node, "qcom,usb-ctrl-select", &val)) {
+ dev_err(&pdev->dev, "setting usb port select = %d\n", val);
+ writel(val, base + TCSR_USB_PORT_SEL);
+ }
+
+ if (!of_property_read_u32(node, "qcom,usb-hsphy-mode-select", &val)) {
+ dev_info(&pdev->dev, "setting usb hs phy mode select = %x\n", val);
+ writel(val, base + TCSR_USB_HSPHY_CONFIG);
+ }
+
+ if (!of_property_read_u32(node, "qcom,ess-interface-select", &val)) {
+ u32 tmp = 0;
+ dev_info(&pdev->dev, "setting ess interface select = %x\n", val);
+ tmp = readl(base + TCSR_ESS_INTERFACE_SEL_OFFSET);
+ tmp = tmp & (~TCSR_ESS_INTERFACE_SEL_MASK);
+ tmp = tmp | (val&TCSR_ESS_INTERFACE_SEL_MASK);
+ writel(tmp, base + TCSR_ESS_INTERFACE_SEL_OFFSET);
+ }
+
+ if (!of_property_read_u32(node, "qcom,wifi_glb_cfg", &val)) {
+ dev_info(&pdev->dev, "setting wifi_glb_cfg = %x\n", val);
+ writel(val, base + TCSR_WIFI0_GLB_CFG_OFFSET);
+ writel(val, base + TCSR_WIFI1_GLB_CFG_OFFSET);
+ }
+
+ if (!of_property_read_u32(node, "qcom,wifi_noc_memtype_m0_m2", &val)) {
+ dev_info(&pdev->dev,
+ "setting wifi_noc_memtype_m0_m2 = %x\n", val);
+ writel(val, base + TCSR_PNOC_SNOC_MEMTYPE_M0_M2);
+ }
+
+ return 0;
+}
+
+static const struct of_device_id tcsr_dt_match[] = {
+ { .compatible = "qcom,tcsr", },
+ { },
+};
+
+MODULE_DEVICE_TABLE(of, tcsr_dt_match);
+
+static struct platform_driver tcsr_driver = {
+ .driver = {
+ .name = "tcsr",
+ .owner = THIS_MODULE,
+ .of_match_table = tcsr_dt_match,
+ },
+ .probe = tcsr_probe,
+};
+
+module_platform_driver(tcsr_driver);
+
+MODULE_AUTHOR("Andy Gross <agross@codeaurora.org>");
+MODULE_DESCRIPTION("QCOM TCSR driver");
+MODULE_LICENSE("GPL v2");
--- /dev/null
+++ b/include/dt-bindings/soc/qcom,tcsr.h
@@ -0,0 +1,48 @@
+/* Copyright (c) 2014, The Linux Foundation. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+#ifndef __DT_BINDINGS_QCOM_TCSR_H
+#define __DT_BINDINGS_QCOM_TCSR_H
+
+#define TCSR_USB_SELECT_USB3_P0 0x1
+#define TCSR_USB_SELECT_USB3_P1 0x2
+#define TCSR_USB_SELECT_USB3_DUAL 0x3
+
+/* IPQ40xx HS PHY Mode Select */
+#define TCSR_USB_HSPHY_HOST_MODE 0x00E700E7
+#define TCSR_USB_HSPHY_DEVICE_MODE 0x00C700E7
+
+/* IPQ40xx ess interface mode select */
+#define TCSR_ESS_PSGMII 0
+#define TCSR_ESS_PSGMII_RGMII5 1
+#define TCSR_ESS_PSGMII_RMII0 2
+#define TCSR_ESS_PSGMII_RMII1 4
+#define TCSR_ESS_PSGMII_RMII0_RMII1 6
+#define TCSR_ESS_PSGMII_RGMII4 9
+
+/*
+ * IPQ40xx WiFi Global Config
+ * Bit 30:AXID_EN
+ * Enable AXI master bus Axid translating to confirm all txn submitted by order
+ * Bit 24: Use locally generated socslv_wxi_bvalid
+ * 1: use locally generate socslv_wxi_bvalid for performance.
+ * 0: use SNOC socslv_wxi_bvalid.
+ */
+#define TCSR_WIFI_GLB_CFG 0x41000000
+
+/* IPQ40xx MEM_TYPE_SEL_M0_M2 Select Bit 26:24 - 2 NORMAL */
+#define TCSR_WIFI_NOC_MEMTYPE_M0_M2 0x02222222
+
+/* TCSR A/B REG */
+#define IPQ806X_TCSR_REG_A_ADM_CRCI_MUX_SEL 0
+#define IPQ806X_TCSR_REG_B_ADM_CRCI_MUX_SEL 1
+
+#endif

176
target/linux/ipq40xx/patches-5.15/900-dts-ipq4019-ap-dk01.1.patch Normal file
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@ -0,0 +1,176 @@
--- a/arch/arm/boot/dts/qcom-ipq4019-ap.dk01.1.dtsi
+++ b/arch/arm/boot/dts/qcom-ipq4019-ap.dk01.1.dtsi
@@ -15,6 +15,7 @@
*/
#include "qcom-ipq4019.dtsi"
+#include <dt-bindings/soc/qcom,tcsr.h>
/ {
model = "Qualcomm Technologies, Inc. IPQ4019/AP-DK01.1";
@@ -29,6 +30,32 @@
};
soc {
+ tcsr@194b000 {
+ /* select hostmode */
+ compatible = "qcom,tcsr";
+ reg = <0x194b000 0x100>;
+ qcom,usb-hsphy-mode-select = <TCSR_USB_HSPHY_HOST_MODE>;
+ status = "okay";
+ };
+
+ ess_tcsr@1953000 {
+ compatible = "qcom,tcsr";
+ reg = <0x1953000 0x1000>;
+ qcom,ess-interface-select = <TCSR_ESS_PSGMII>;
+ };
+
+ tcsr@1949000 {
+ compatible = "qcom,tcsr";
+ reg = <0x1949000 0x100>;
+ qcom,wifi_glb_cfg = <TCSR_WIFI_GLB_CFG>;
+ };
+
+ tcsr@1957000 {
+ compatible = "qcom,tcsr";
+ reg = <0x1957000 0x100>;
+ qcom,wifi_noc_memtype_m0_m2 = <TCSR_WIFI_NOC_MEMTYPE_M0_M2>;
+ };
+
rng@22000 {
status = "okay";
};
@@ -74,14 +101,6 @@
pinctrl-names = "default";
status = "okay";
cs-gpios = <&tlmm 54 0>;
-
- mx25l25635e@0 {
- #address-cells = <1>;
- #size-cells = <1>;
- reg = <0>;
- compatible = "mx25l25635e";
- spi-max-frequency = <24000000>;
- };
};
serial@78af000 {
@@ -109,5 +128,41 @@
wifi@a800000 {
status = "okay";
};
+
+ mdio@90000 {
+ status = "okay";
+ };
+
+ ess-switch@c000000 {
+ status = "okay";
+ };
+
+ ess-psgmii@98000 {
+ status = "okay";
+ };
+
+ edma@c080000 {
+ status = "okay";
+ };
+
+ usb3_ss_phy: ssphy@9a000 {
+ status = "okay";
+ };
+
+ usb3_hs_phy: hsphy@a6000 {
+ status = "okay";
+ };
+
+ usb3: usb3@8af8800 {
+ status = "okay";
+ };
+
+ usb2_hs_phy: hsphy@a8000 {
+ status = "okay";
+ };
+
+ usb2: usb2@60f8800 {
+ status = "okay";
+ };
};
};
--- a/arch/arm/boot/dts/qcom-ipq4019-ap.dk01.1-c1.dts
+++ b/arch/arm/boot/dts/qcom-ipq4019-ap.dk01.1-c1.dts
@@ -18,5 +18,73 @@
/ {
model = "Qualcomm Technologies, Inc. IPQ40xx/AP-DK01.1-C1";
+ compatible = "qcom,ap-dk01.1-c1", "qcom,ap-dk01.2-c1";
+ memory {
+ device_type = "memory";
+ reg = <0x80000000 0x10000000>;
+ };
+};
+
+&blsp1_spi1 {
+ mx25l25635f@0 {
+ compatible = "mx25l25635f", "jedec,spi-nor";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ reg = <0>;
+ spi-max-frequency = <24000000>;
+
+ SBL1@0 {
+ label = "SBL1";
+ reg = <0x0 0x40000>;
+ read-only;
+ };
+ MIBIB@40000 {
+ label = "MIBIB";
+ reg = <0x40000 0x20000>;
+ read-only;
+ };
+ QSEE@60000 {
+ label = "QSEE";
+ reg = <0x60000 0x60000>;
+ read-only;
+ };
+ CDT@c0000 {
+ label = "CDT";
+ reg = <0xc0000 0x10000>;
+ read-only;
+ };
+ DDRPARAMS@d0000 {
+ label = "DDRPARAMS";
+ reg = <0xd0000 0x10000>;
+ read-only;
+ };
+ APPSBLENV@e0000 {
+ label = "APPSBLENV";
+ reg = <0xe0000 0x10000>;
+ read-only;
+ };
+ APPSBL@f0000 {
+ label = "APPSBL";
+ reg = <0xf0000 0x80000>;
+ read-only;
+ };
+ ART@170000 {
+ label = "ART";
+ reg = <0x170000 0x10000>;
+ read-only;
+ };
+ kernel@180000 {
+ label = "kernel";
+ reg = <0x180000 0x400000>;
+ };
+ rootfs@580000 {
+ label = "rootfs";
+ reg = <0x580000 0x1600000>;
+ };
+ firmware@180000 {
+ label = "firmware";
+ reg = <0x180000 0x1a00000>;
+ };
+ };
};

88
target/linux/ipq40xx/patches-5.15/901-arm-boot-add-dts-files.patch Normal file
View File

@ -0,0 +1,88 @@
From a10fab12a927e60b7141a602e740d70cb4d09e4a Mon Sep 17 00:00:00 2001
From: John Crispin <john@phrozen.org>
Date: Thu, 9 Mar 2017 11:03:18 +0100
Subject: [PATCH] arm: boot: add dts files
Signed-off-by: John Crispin <john@phrozen.org>
---
arch/arm/boot/dts/Makefile | 23 +++++++++++++++++++++++
1 file changed, 23 insertions(+)
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -951,11 +951,75 @@ dtb-$(CONFIG_ARCH_QCOM) += \
qcom-ipq4018-ap120c-ac.dtb \
qcom-ipq4018-ap120c-ac-bit.dtb \
qcom-ipq4018-jalapeno.dtb \
+ qcom-ipq4018-a42.dtb \
+ qcom-ipq4018-ap120c-ac.dtb \
+ qcom-ipq4018-dap-2610.dtb \
+ qcom-ipq4018-cs-w3-wd1200g-eup.dtb \
+ qcom-ipq4018-magic-2-wifi-next.dtb \
+ qcom-ipq4018-ea6350v3.dtb \
+ qcom-ipq4018-eap1300.dtb \
+ qcom-ipq4018-ecw5211.dtb \
+ qcom-ipq4018-emd1.dtb \
+ qcom-ipq4018-emr3500.dtb \
+ qcom-ipq4018-ens620ext.dtb \
+ qcom-ipq4018-ex6100v2.dtb \
+ qcom-ipq4018-ex6150v2.dtb \
+ qcom-ipq4018-fritzbox-4040.dtb \
+ qcom-ipq4018-gl-ap1300.dtb \
+ qcom-ipq4018-meshpoint-one.dtb \
+ qcom-ipq4018-cap-ac.dtb \
+ qcom-ipq4018-hap-ac2.dtb \
+ qcom-ipq4018-sxtsq-5-ac.dtb \
+ qcom-ipq4018-nbg6617.dtb \
+ qcom-ipq4019-oap100.dtb \
+ qcom-ipq4018-pa1200.dtb \
+ qcom-ipq4018-rt-ac58u.dtb \
+ qcom-ipq4018-rutx10.dtb \
+ qcom-ipq4018-wac510.dtb \
+ qcom-ipq4018-wre6606.dtb \
+ qcom-ipq4018-wrtq-329acn.dtb \
qcom-ipq4019-ap.dk01.1-c1.dtb \
qcom-ipq4019-ap.dk04.1-c1.dtb \
qcom-ipq4019-ap.dk04.1-c3.dtb \
qcom-ipq4019-ap.dk07.1-c1.dtb \
qcom-ipq4019-ap.dk07.1-c2.dtb \
+ qcom-ipq4019-a62.dtb \
+ qcom-ipq4019-cm520-79f.dtb \
+ qcom-ipq4019-e2600ac-c1.dtb \
+ qcom-ipq4019-e2600ac-c2.dtb \
+ qcom-ipq4019-ea8300.dtb \
+ qcom-ipq4019-eap2200.dtb \
+ qcom-ipq4019-fritzbox-7530.dtb \
+ qcom-ipq4019-fritzrepeater-1200.dtb \
+ qcom-ipq4019-fritzrepeater-3000.dtb \
+ qcom-ipq4019-habanero-dvk.dtb \
+ qcom-ipq4019-hap-ac3.dtb \
+ qcom-ipq4019-map-ac2200.dtb \
+ qcom-ipq4019-lhgg-60ad.dtb \
+ qcom-ipq4019-mf286d.dtb \
+ qcom-ipq4019-mr8300.dtb \
+ qcom-ipq4019-pa2200.dtb \
+ qcom-ipq4019-r619ac-64m.dtb \
+ qcom-ipq4019-r619ac-128m.dtb \
+ qcom-ipq4019-rbr50.dtb \
+ qcom-ipq4019-rbs50.dtb \
+ qcom-ipq4019-rt-ac42u.dtb \
+ qcom-ipq4019-rtl30vw.dtb \
+ qcom-ipq4019-srr60.dtb \
+ qcom-ipq4019-srs60.dtb \
+ qcom-ipq4019-u4019-32m.dtb \
+ qcom-ipq4019-wifi.dtb \
+ qcom-ipq4019-wpj419.dtb \
+ qcom-ipq4019-wtr-m2133hp.dtb \
+ qcom-ipq4019-x1pro.dtb \
+ qcom-ipq4028-wpj428.dtb \
+ qcom-ipq4029-ap-303.dtb \
+ qcom-ipq4029-ap-303h.dtb \
+ qcom-ipq4029-ap-365.dtb \
+ qcom-ipq4029-gl-b1300.dtb \
+ qcom-ipq4019-gl-b2200.dtb \
+ qcom-ipq4029-gl-s1300.dtb \
+ qcom-ipq4029-mr33.dtb \
qcom-ipq8064-ap148.dtb \
qcom-ipq8064-rb3011.dtb \
qcom-msm8226-samsung-s3ve3g.dtb \

167
target/linux/ipq40xx/patches-5.15/902-dts-ipq4019-ap-dk04.1.patch Normal file
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@ -0,0 +1,167 @@
--- a/arch/arm/boot/dts/qcom-ipq4019-ap.dk04.1.dtsi
+++ b/arch/arm/boot/dts/qcom-ipq4019-ap.dk04.1.dtsi
@@ -17,53 +17,79 @@
stdout-path = "serial0:115200n8";
};
- memory {
- device_type = "memory";
- reg = <0x80000000 0x10000000>; /* 256MB */
- };
-
soc {
+ rng@22000 {
+ status = "okay";
+ };
+
pinctrl@1000000 {
serial_0_pins: serial0-pinmux {
- pins = "gpio16", "gpio17";
- function = "blsp_uart0";
- bias-disable;
+ mux {
+ pins = "gpio16", "gpio17";
+ function = "blsp_uart0";
+ bias-disable;
+ };
};
serial_1_pins: serial1-pinmux {
- pins = "gpio8", "gpio9",
- "gpio10", "gpio11";
- function = "blsp_uart1";
- bias-disable;
+ mux {
+ pins = "gpio8", "gpio9";
+ function = "blsp_uart1";
+ bias-disable;
+ };
};
spi_0_pins: spi-0-pinmux {
pinmux {
function = "blsp_spi0";
pins = "gpio13", "gpio14", "gpio15";
- bias-disable;
};
pinmux_cs {
function = "gpio";
pins = "gpio12";
+ };
+ pinconf {
+ pins = "gpio13", "gpio14", "gpio15";
+ drive-strength = <12>;
+ bias-disable;
+ };
+ pinconf_cs {
+ pins = "gpio12";
+ drive-strength = <2>;
bias-disable;
output-high;
};
};
i2c_0_pins: i2c-0-pinmux {
- pins = "gpio20", "gpio21";
- function = "blsp_i2c0";
- bias-disable;
+ pinmux {
+ function = "blsp_i2c0";
+ pins = "gpio10", "gpio11";
+ };
+ pinconf {
+ pins = "gpio10", "gpio11";
+ drive-strength = <16>;
+ bias-disable;
+ };
};
nand_pins: nand-pins {
- pins = "gpio53", "gpio55", "gpio56",
- "gpio57", "gpio58", "gpio59",
- "gpio60", "gpio62", "gpio63",
- "gpio64", "gpio65", "gpio66",
- "gpio67", "gpio68", "gpio69";
- function = "qpic";
+ pullups {
+ pins = "gpio52", "gpio53", "gpio58",
+ "gpio59";
+ function = "qpic";
+ bias-pull-up;
+ };
+
+ pulldowns {
+ pins = "gpio54", "gpio55", "gpio56",
+ "gpio57", "gpio60", "gpio61",
+ "gpio62", "gpio63", "gpio64",
+ "gpio65", "gpio66", "gpio67",
+ "gpio68", "gpio69";
+ function = "qpic";
+ bias-pull-down;
+ };
};
};
@@ -89,11 +115,11 @@
status = "okay";
cs-gpios = <&tlmm 12 0>;
- m25p80@0 {
+ mx25l25635e@0 {
#address-cells = <1>;
#size-cells = <1>;
reg = <0>;
- compatible = "n25q128a11";
+ compatible = "mx25l25635e";
spi-max-frequency = <24000000>;
};
};
@@ -103,9 +129,48 @@
perst-gpio = <&tlmm 38 0x1>;
};
+ i2c0: i2c@78b7000 { /* BLSP1 QUP2 */
+ pinctrl-0 = <&i2c_0_pins>;
+ pinctrl-names = "default";
+
+ status = "okay";
+ };
+
qpic-nand@79b0000 {
pinctrl-0 = <&nand_pins>;
pinctrl-names = "default";
};
+
+ usb3_ss_phy: ssphy@9a000 {
+ status = "okay";
+ };
+
+ usb3_hs_phy: hsphy@a6000 {
+ status = "okay";
+ };
+
+ usb3: usb3@8af8800 {
+ status = "okay";
+ };
+
+ usb2_hs_phy: hsphy@a8000 {
+ status = "okay";
+ };
+
+ usb2: usb2@60f8800 {
+ status = "okay";
+ };
+
+ cryptobam: dma@8e04000 {
+ status = "okay";
+ };
+
+ crypto@8e3a000 {
+ status = "okay";
+ };
+
+ watchdog@b017000 {
+ status = "okay";
+ };
};
};

1
target/linux/kirkwood/Makefile
View File

@ -11,6 +11,7 @@ FEATURES:=usb nand squashfs ramdisk
CPU_TYPE:=xscale
KERNEL_PATCHVER:=5.10
KERNEL_TESTING_PATCHVER:=5.15
include $(INCLUDE_DIR)/target.mk

294
target/linux/kirkwood/config-5.15 Normal file
View File

@ -0,0 +1,294 @@
CONFIG_ALIGNMENT_TRAP=y
CONFIG_ARCH_32BIT_OFF_T=y
CONFIG_ARCH_HIBERNATION_POSSIBLE=y
CONFIG_ARCH_KEEP_MEMBLOCK=y
CONFIG_ARCH_MIGHT_HAVE_PC_PARPORT=y
CONFIG_ARCH_MULTIPLATFORM=y
CONFIG_ARCH_MULTI_CPU_AUTO=y
# CONFIG_ARCH_MULTI_V4 is not set
# CONFIG_ARCH_MULTI_V4T is not set
CONFIG_ARCH_MULTI_V4_V5=y
CONFIG_ARCH_MULTI_V5=y
CONFIG_ARCH_MVEBU=y
CONFIG_ARCH_NR_GPIO=0
CONFIG_ARCH_OPTIONAL_KERNEL_RWX=y
CONFIG_ARCH_SELECT_MEMORY_MODEL=y
CONFIG_ARCH_SPARSEMEM_ENABLE=y
CONFIG_ARCH_SUSPEND_POSSIBLE=y
CONFIG_ARM=y
# CONFIG_ARMADA_37XX_WATCHDOG is not set
# CONFIG_ARMADA_THERMAL is not set
CONFIG_ARM_APPENDED_DTB=y
CONFIG_ARM_ATAG_DTB_COMPAT=y
CONFIG_ARM_ATAG_DTB_COMPAT_CMDLINE_FROM_BOOTLOADER=y
CONFIG_ARM_HAS_SG_CHAIN=y
# CONFIG_ARM_KIRKWOOD_CPUIDLE is not set
CONFIG_ARM_L1_CACHE_SHIFT=5
# CONFIG_ARM_MVEBU_V7_CPUIDLE is not set
CONFIG_ARM_PATCH_PHYS_VIRT=y
# CONFIG_ARM_THUMB is not set
CONFIG_ARM_UNWIND=y
CONFIG_ATA=y
CONFIG_ATAGS=y
CONFIG_ATA_LEDS=y
CONFIG_AUTO_ZRELADDR=y
CONFIG_BINFMT_FLAT_ARGVP_ENVP_ON_STACK=y
CONFIG_BLK_DEV_SD=y
CONFIG_BLK_MQ_PCI=y
CONFIG_CACHE_FEROCEON_L2=y
# CONFIG_CACHE_FEROCEON_L2_WRITETHROUGH is not set
CONFIG_CLKSRC_MMIO=y
CONFIG_CLONE_BACKWARDS=y
CONFIG_COMMON_CLK=y
CONFIG_COMPAT_32BIT_TIME=y
CONFIG_CPU_32v5=y
CONFIG_CPU_ABRT_EV5T=y
CONFIG_CPU_CACHE_VIVT=y
CONFIG_CPU_COPY_FEROCEON=y
CONFIG_CPU_CP15=y
CONFIG_CPU_CP15_MMU=y
CONFIG_CPU_FEROCEON=y
# CONFIG_CPU_FEROCEON_OLD_ID is not set
CONFIG_CPU_IDLE=y
CONFIG_CPU_IDLE_GOV_LADDER=y
CONFIG_CPU_PABRT_LEGACY=y
CONFIG_CPU_PM=y
CONFIG_CPU_THERMAL=y
CONFIG_CPU_THUMB_CAPABLE=y
CONFIG_CPU_TLB_FEROCEON=y
CONFIG_CPU_USE_DOMAINS=y
CONFIG_CRC16=y
# CONFIG_CRC32_SARWATE is not set
CONFIG_CRC32_SLICEBY8=y
CONFIG_CRYPTO_CRC32C=y
CONFIG_CRYPTO_DEFLATE=y
CONFIG_CRYPTO_DES=y
CONFIG_CRYPTO_DEV_MARVELL=y
CONFIG_CRYPTO_DEV_MARVELL_CESA=y
CONFIG_CRYPTO_HASH_INFO=y
CONFIG_CRYPTO_HW=y
CONFIG_CRYPTO_LIB_DES=y
CONFIG_CRYPTO_LZO=y
CONFIG_CRYPTO_RNG2=y
CONFIG_CRYPTO_ZSTD=y
CONFIG_DEBUG_LL=y
CONFIG_DEBUG_LL_INCLUDE="debug/8250.S"
CONFIG_DEBUG_MVEBU_UART0_ALTERNATE=y
# CONFIG_DEBUG_MVEBU_UART1_ALTERNATE is not set
CONFIG_DEBUG_UART_8250=y
CONFIG_DEBUG_UART_8250_SHIFT=2
CONFIG_DEBUG_UART_PHYS=0xf1012000
CONFIG_DEBUG_UART_VIRT=0xfed12000
CONFIG_DEBUG_UNCOMPRESS=y
CONFIG_DMA_OPS=y
CONFIG_DMA_REMAP=y
CONFIG_DNOTIFY=y
CONFIG_DTC=y
# CONFIG_EARLY_PRINTK is not set
CONFIG_EDAC_ATOMIC_SCRUB=y
CONFIG_EDAC_SUPPORT=y
CONFIG_FIXED_PHY=y
CONFIG_FIX_EARLYCON_MEM=y
CONFIG_FORCE_PCI=y
CONFIG_FWNODE_MDIO=y
CONFIG_FW_LOADER_PAGED_BUF=y
CONFIG_GENERIC_ALLOCATOR=y
CONFIG_GENERIC_ATOMIC64=y
CONFIG_GENERIC_BUG=y
CONFIG_GENERIC_CLOCKEVENTS=y
CONFIG_GENERIC_CPU_AUTOPROBE=y
CONFIG_GENERIC_EARLY_IOREMAP=y
CONFIG_GENERIC_IDLE_POLL_SETUP=y
CONFIG_GENERIC_IRQ_CHIP=y
CONFIG_GENERIC_IRQ_MULTI_HANDLER=y
CONFIG_GENERIC_IRQ_SHOW=y
CONFIG_GENERIC_IRQ_SHOW_LEVEL=y
CONFIG_GENERIC_LIB_DEVMEM_IS_ALLOWED=y
CONFIG_GENERIC_PCI_IOMAP=y
CONFIG_GENERIC_PHY=y
CONFIG_GENERIC_PINCONF=y
CONFIG_GENERIC_SCHED_CLOCK=y
CONFIG_GENERIC_SMP_IDLE_THREAD=y
CONFIG_GENERIC_STRNCPY_FROM_USER=y
CONFIG_GENERIC_STRNLEN_USER=y
CONFIG_GLOB=y
CONFIG_GPIOLIB=y
CONFIG_GPIOLIB_IRQCHIP=y
CONFIG_GPIO_CDEV=y
CONFIG_GPIO_MVEBU=y
CONFIG_GRO_CELLS=y
CONFIG_HANDLE_DOMAIN_IRQ=y
CONFIG_HARDIRQS_SW_RESEND=y
CONFIG_HAS_DMA=y
CONFIG_HAS_IOMEM=y
CONFIG_HAS_IOPORT_MAP=y
CONFIG_HWMON=y
CONFIG_HW_RANDOM=y
CONFIG_HW_RANDOM_OMAP=y
CONFIG_HZ_FIXED=0
CONFIG_HZ_PERIODIC=y
CONFIG_I2C=y
CONFIG_I2C_BOARDINFO=y
CONFIG_I2C_CHARDEV=y
CONFIG_I2C_MV64XXX=y
# CONFIG_I2C_PXA is not set
CONFIG_INITRAMFS_SOURCE=""
CONFIG_IRQCHIP=y
CONFIG_IRQ_DOMAIN=y
CONFIG_IRQ_FORCED_THREADING=y
CONFIG_IRQ_WORK=y
CONFIG_KIRKWOOD_CLK=y
CONFIG_KIRKWOOD_THERMAL=y
CONFIG_LEDS_GPIO=y
CONFIG_LEDS_NETXBIG=y
CONFIG_LEDS_NS2=y
CONFIG_LIBFDT=y
CONFIG_LOCK_DEBUGGING_SUPPORT=y
CONFIG_LZO_COMPRESS=y
CONFIG_LZO_DECOMPRESS=y
CONFIG_MACH_KIRKWOOD=y
CONFIG_MACH_MVEBU_ANY=y
CONFIG_MANGLE_BOOTARGS=y
CONFIG_MARVELL_PHY=y
CONFIG_MDIO_BUS=y
CONFIG_MDIO_DEVICE=y
CONFIG_MDIO_DEVRES=y
CONFIG_MEMFD_CREATE=y
CONFIG_MIGRATION=y
CONFIG_MODULES_USE_ELF_REL=y
# CONFIG_MTD_CFI is not set
CONFIG_MTD_CMDLINE_PARTS=y
CONFIG_MTD_NAND_CORE=y
CONFIG_MTD_NAND_ECC=y
CONFIG_MTD_NAND_ECC_SW_HAMMING=y
# CONFIG_MTD_NAND_MARVELL is not set
CONFIG_MTD_NAND_ORION=y
CONFIG_MTD_RAW_NAND=y
CONFIG_MTD_SPI_NOR=y
CONFIG_MTD_SPLIT_FIRMWARE=y
CONFIG_MTD_SPLIT_UIMAGE_FW=y
CONFIG_MTD_UBI=y
CONFIG_MTD_UBI_BEB_LIMIT=20
CONFIG_MTD_UBI_BLOCK=y
CONFIG_MTD_UBI_WL_THRESHOLD=4096
CONFIG_MV643XX_ETH=y
CONFIG_MVEBU_CLK_COMMON=y
CONFIG_MVEBU_MBUS=y
CONFIG_MVMDIO=y
# CONFIG_MVNETA is not set
# CONFIG_MVPP2 is not set
CONFIG_NEED_DMA_MAP_STATE=y
CONFIG_NEED_KUSER_HELPERS=y
CONFIG_NEED_PER_CPU_KM=y
CONFIG_NET_DEVLINK=y
CONFIG_NET_DSA=y
CONFIG_NET_DSA_MV88E6XXX=y
CONFIG_NET_DSA_TAG_DSA=y
CONFIG_NET_DSA_TAG_DSA_COMMON=y
CONFIG_NET_DSA_TAG_EDSA=y
CONFIG_NET_SELFTESTS=y
CONFIG_NET_SWITCHDEV=y
CONFIG_NLS=y
CONFIG_NVMEM=y
CONFIG_OF=y
CONFIG_OF_ADDRESS=y
CONFIG_OF_EARLY_FLATTREE=y
CONFIG_OF_FLATTREE=y
CONFIG_OF_GPIO=y
CONFIG_OF_IRQ=y
CONFIG_OF_KOBJ=y
CONFIG_OF_MDIO=y
CONFIG_OLD_SIGACTION=y
CONFIG_OLD_SIGSUSPEND3=y
CONFIG_ORION_IRQCHIP=y
CONFIG_ORION_TIMER=y
CONFIG_ORION_WATCHDOG=y
CONFIG_OUTER_CACHE=y
CONFIG_PAGE_OFFSET=0xC0000000
CONFIG_PCI=y
CONFIG_PCI_BRIDGE_EMUL=y
CONFIG_PCI_DOMAINS=y
CONFIG_PCI_DOMAINS_GENERIC=y
CONFIG_PCI_MVEBU=y
CONFIG_PERF_USE_VMALLOC=y
CONFIG_PGTABLE_LEVELS=2
CONFIG_PHYLIB=y
CONFIG_PHYLINK=y
# CONFIG_PHY_MVEBU_A3700_UTMI is not set
# CONFIG_PHY_MVEBU_A38X_COMPHY is not set
CONFIG_PHY_MVEBU_SATA=y
CONFIG_PINCTRL=y
CONFIG_PINCTRL_KIRKWOOD=y
CONFIG_PINCTRL_MVEBU=y
# CONFIG_PINCTRL_SINGLE is not set
CONFIG_PINCTRL_SX150X=y
CONFIG_PLAT_ORION=y
CONFIG_POWER_RESET=y
CONFIG_POWER_RESET_GPIO=y
CONFIG_POWER_RESET_LINKSTATION=y
CONFIG_POWER_SUPPLY=y
CONFIG_PTP_1588_CLOCK_OPTIONAL=y
CONFIG_RATIONAL=y
CONFIG_REGMAP=y
CONFIG_REGMAP_MMIO=y
CONFIG_REGULATOR=y
CONFIG_REGULATOR_FIXED_VOLTAGE=y
CONFIG_RTC_CLASS=y
CONFIG_RTC_DRV_MV=y
CONFIG_RTC_I2C_AND_SPI=y
CONFIG_RTC_MC146818_LIB=y
CONFIG_SATA_HOST=y
CONFIG_SATA_PMP=y
CONFIG_SCSI=y
CONFIG_SCSI_COMMON=y
CONFIG_SERIAL_8250_DEPRECATED_OPTIONS=y
CONFIG_SERIAL_8250_FSL=y
CONFIG_SERIAL_MCTRL_GPIO=y
# CONFIG_SERIAL_MVEBU_UART is not set
CONFIG_SERIAL_OF_PLATFORM=y
CONFIG_SGL_ALLOC=y
CONFIG_SG_POOL=y
CONFIG_SOC_BUS=y
CONFIG_SPARSE_IRQ=y
CONFIG_SPI=y
# CONFIG_SPI_ARMADA_3700 is not set
CONFIG_SPI_MASTER=y
CONFIG_SPI_MEM=y
CONFIG_SPI_ORION=y
CONFIG_SPLIT_PTLOCK_CPUS=999999
CONFIG_SRAM=y
CONFIG_SRAM_EXEC=y
CONFIG_SRCU=y
CONFIG_SWPHY=y
CONFIG_SYS_SUPPORTS_APM_EMULATION=y
CONFIG_THERMAL=y
CONFIG_THERMAL_DEFAULT_GOV_STEP_WISE=y
CONFIG_THERMAL_EMERGENCY_POWEROFF_DELAY_MS=0
CONFIG_THERMAL_GOV_STEP_WISE=y
CONFIG_THERMAL_HWMON=y
CONFIG_THERMAL_OF=y
CONFIG_TICK_CPU_ACCOUNTING=y
CONFIG_TIMER_OF=y
CONFIG_TIMER_PROBE=y
CONFIG_TINY_SRCU=y
CONFIG_UBIFS_FS=y
CONFIG_UNCOMPRESS_INCLUDE="debug/uncompress.h"
CONFIG_UNWINDER_ARM=y
CONFIG_USB=y
CONFIG_USB_COMMON=y
CONFIG_USB_LED_TRIG=y
CONFIG_USB_SUPPORT=y
CONFIG_USE_OF=y
# CONFIG_VFP is not set
CONFIG_VM_EVENT_COUNTERS=y
CONFIG_WAN=y
CONFIG_WATCHDOG_CORE=y
CONFIG_XXHASH=y
CONFIG_XZ_DEC_ARM=y
CONFIG_XZ_DEC_BCJ=y
CONFIG_ZBOOT_ROM_BSS=0x0
CONFIG_ZBOOT_ROM_TEXT=0x0
CONFIG_ZLIB_DEFLATE=y
CONFIG_ZLIB_INFLATE=y
CONFIG_ZSTD_COMPRESS=y
CONFIG_ZSTD_DECOMPRESS=y

53
target/linux/kirkwood/patches-5.15/100-ib62x0.patch Normal file
View File

@ -0,0 +1,53 @@
--- a/arch/arm/boot/dts/kirkwood-ib62x0.dts
+++ b/arch/arm/boot/dts/kirkwood-ib62x0.dts
@@ -6,7 +6,14 @@
/ {
model = "RaidSonic ICY BOX IB-NAS62x0 (Rev B)";
- compatible = "raidsonic,ib-nas6210-b", "raidsonic,ib-nas6220-b", "raidsonic,ib-nas6210", "raidsonic,ib-nas6220", "raidsonic,ib-nas62x0", "marvell,kirkwood-88f6281", "marvell,kirkwood";
+ compatible = "raidsonic,ib-nas62x0", "marvell,kirkwood-88f6281", "marvell,kirkwood";
+
+ aliases {
+ led-boot = &led_green_os;
+ led-failsafe = &led_red_os;
+ led-running = &led_green_os;
+ led-upgrade = &led_red_os;
+ };
memory {
device_type = "memory";
@@ -81,12 +88,12 @@
&pmx_led_usb_transfer>;
pinctrl-names = "default";
- green-os {
+ led_green_os: green-os {
label = "ib62x0:green:os";
gpios = <&gpio0 25 GPIO_ACTIVE_HIGH>;
- default-state = "keep";
+ default-state = "on";
};
- red-os {
+ led_red_os: red-os {
label = "ib62x0:red:os";
gpios = <&gpio0 22 GPIO_ACTIVE_HIGH>;
};
@@ -118,13 +125,13 @@
};
partition@100000 {
- label = "uImage";
- reg = <0x0100000 0x600000>;
+ label = "second stage u-boot";
+ reg = <0x100000 0x200000>;
};
- partition@700000 {
- label = "root";
- reg = <0x0700000 0xf900000>;
+ partition@200000 {
+ label = "ubi";
+ reg = <0x200000 0xfe00000>;
};
};

80
target/linux/kirkwood/patches-5.15/101-iconnect.patch Normal file
View File

@ -0,0 +1,80 @@
--- a/arch/arm/boot/dts/kirkwood-iconnect.dts
+++ b/arch/arm/boot/dts/kirkwood-iconnect.dts
@@ -8,6 +8,13 @@
model = "Iomega Iconnect";
compatible = "iom,iconnect-1.1", "iom,iconnect", "marvell,kirkwood-88f6281", "marvell,kirkwood";
+ aliases {
+ led-boot = &led_power_blue;
+ led-failsafe = &led_power_red;
+ led-running = &led_power_blue;
+ led-upgrade = &led_power_red;
+ };
+
memory {
device_type = "memory";
reg = <0x00000000 0x10000000>;
@@ -16,8 +23,6 @@
chosen {
bootargs = "console=ttyS0,115200n8 earlyprintk";
stdout-path = &uart0;
- linux,initrd-start = <0x4500040>;
- linux,initrd-end = <0x4800000>;
};
ocp@f1000000 {
@@ -89,12 +94,12 @@
gpios = <&gpio1 9 GPIO_ACTIVE_HIGH>;
default-state = "on";
};
- power-blue {
+ led_power_blue: power-blue {
label = "power:blue";
gpios = <&gpio1 10 GPIO_ACTIVE_HIGH>;
- default-state = "keep";
+ default-state = "on";
};
- power-red {
+ led_power_red: power-red {
label = "power:red";
gpios = <&gpio1 11 GPIO_ACTIVE_HIGH>;
};
@@ -146,28 +151,23 @@
status = "okay";
partition@0 {
- label = "uboot";
- reg = <0x0000000 0xc0000>;
+ label = "u-boot";
+ reg = <0x0000000 0xe0000>;
};
- partition@a0000 {
- label = "env";
- reg = <0xa0000 0x20000>;
+ partition@e0000 {
+ label = "u-boot environment";
+ reg = <0xe0000 0x100000>;
};
partition@100000 {
- label = "zImage";
- reg = <0x100000 0x300000>;
- };
-
- partition@540000 {
- label = "initrd";
- reg = <0x540000 0x300000>;
+ label = "second stage u-boot";
+ reg = <0x100000 0x200000>;
};
- partition@980000 {
- label = "boot";
- reg = <0x980000 0x1f400000>;
+ partition@200000 {
+ label = "ubi";
+ reg = <0x200000 0x1fe00000>;
};
};

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