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AmadeusGhost 2020-09-01 17:18:09 +08:00
commit e2d2e6146f
640 changed files with 2981 additions and 86338 deletions
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10
config/Config-build.in
View File

@ -328,4 +328,14 @@ menu "Global build settings"
bool "Full"
endchoice
config TARGET_ROOTFS_SECURITY_LABELS
bool "Enable rootfs security labels"
select KERNEL_SQUASHFS_XATTR
select KERNEL_EXT4_FS_SECURITY
select KERNEL_F2FS_FS_SECURITY
select KERNEL_UBIFS_FS_SECURITY
select KERNEL_JFFS2_FS_SECURITY
select PACKAGE_refpolicy
help
This option enables the usage of SELinux labels
endmenu

1
config/Config-images.in
View File

@ -15,7 +15,6 @@ menu "Target Images"
choice
prompt "Compression"
default TARGET_INITRAMFS_COMPRESSION_LZMA if TARGET_apm821xx
default TARGET_INITRAMFS_COMPRESSION_LZMA if TARGET_ar71xx
default TARGET_INITRAMFS_COMPRESSION_LZMA if TARGET_ath79_mikrotik
default TARGET_INITRAMFS_COMPRESSION_LZMA if TARGET_lantiq
default TARGET_INITRAMFS_COMPRESSION_LZMA if TARGET_mpc85xx

55
config/Config-kernel.in
View File

@ -1081,6 +1081,9 @@ config KERNEL_SQUASHFS_FRAGMENT_CACHE_SIZE
default 2 if (SMALL_FLASH && !LOW_MEMORY_FOOTPRINT)
default 3
config KERNEL_SQUASHFS_XATTR
bool "Squashfs XATTR support"
#
# compile optimiziation setting
#
@ -1102,3 +1105,55 @@ config KERNEL_CC_OPTIMIZE_FOR_SIZE
your compiler resulting in a smaller kernel.
endchoice
config KERNEL_AUDIT
bool "Auditing support"
config KERNEL_SECURITY
bool "Enable different security models"
config KERNEL_SECURITY_NETWORK
bool "Socket and Networking Security Hooks"
select KERNEL_SECURITY
config KERNEL_SECURITY_SELINUX
bool "NSA SELinux Support"
select KERNEL_SECURITY_NETWORK
select KERNEL_AUDIT
config KERNEL_SECURITY_SELINUX_BOOTPARAM
bool "NSA SELinux boot parameter"
depends on KERNEL_SECURITY_SELINUX
config KERNEL_SECURITY_SELINUX_DISABLE
bool "NSA SELinux runtime disable"
depends on KERNEL_SECURITY_SELINUX
config KERNEL_SECURITY_SELINUX_DEVELOP
bool "NSA SELinux Development Support"
depends on KERNEL_SECURITY_SELINUX
choice
prompt "First legacy 'major LSM' to be initialized"
depends on KERNEL_SECURITY_SELINUX
default KERNEL_DEFAULT_SECURITY_SELINUX
config KERNEL_DEFAULT_SECURITY_SELINUX
bool "SELinux"
config KERNEL_DEFAULT_SECURITY_DAC
bool "Unix Discretionary Access Controls"
endchoice
config KERNEL_EXT4_FS_SECURITY
bool "Ext4 Security Labels"
config KERNEL_F2FS_FS_SECURITY
bool "F2FS Security Labels"
config KERNEL_UBIFS_FS_SECURITY
bool "UBIFS Security Labels"
config KERNEL_JFFS2_FS_SECURITY
bool "JFFS2 Security Labels"

19
include/image.mk
View File

@ -234,13 +234,30 @@ endef
$(eval $(foreach S,$(JFFS2_BLOCKSIZE),$(call Image/mkfs/jffs2/template,$(S))))
$(eval $(foreach S,$(NAND_BLOCKSIZE),$(call Image/mkfs/jffs2-nand/template,$(S))))
define Image/mkfs/squashfs
define Image/mkfs/squashfs-common
$(STAGING_DIR_HOST)/bin/mksquashfs4 $(call mkfs_target_dir,$(1)) $@ \
-nopad -noappend -root-owned \
-comp $(SQUASHFSCOMP) $(SQUASHFSOPT) \
-processors $(shell nproc)
endef
ifeq ($(CONFIG_TARGET_ROOTFS_SECURITY_LABELS),y)
define Image/mkfs/squashfs
echo "LD_LIBRARY_PATH=\$$LD_LIBRARY_PATH:$(STAGING_DIR_HOSTPKG)/lib" \
"$(STAGING_DIR_HOSTPKG)/sbin/setfiles -r" \
"$(call mkfs_target_dir,$(1))" \
"$(call mkfs_target_dir,$(1))/etc/selinux/targeted/contexts/files/file_contexts " \
"$(call mkfs_target_dir,$(1))" > $@.fakeroot-script
echo "$(Image/mkfs/squashfs-common)" >> $@.fakeroot-script
chmod +x $@.fakeroot-script
$(FAKEROOT) "$@.fakeroot-script"
endef
else
define Image/mkfs/squashfs
$(call Image/mkfs/squashfs-common,$(1))
endef
endif
# $(1): board name
# $(2): rootfs type
# $(3): kernel image

4
include/kernel-version.mk
View File

@ -8,11 +8,11 @@ endif
LINUX_VERSION-4.14 = .193
LINUX_VERSION-4.19 = .138
LINUX_VERSION-5.4 = .60
LINUX_VERSION-5.4 = .61
LINUX_KERNEL_HASH-4.14.193 = 0b0fb41d4430e1a42738b341cbfd2f41951aa5cd02acabbd53f076119c8b9f03
LINUX_KERNEL_HASH-4.19.138 = d15c27d05f6c527269b75b30cc72972748e55720e7e00ad8abbaa4fe3b1d5e02
LINUX_KERNEL_HASH-5.4.60 = add2ab2385c40fc9a3dfebe403e56da8500b633dc7dc42cf0c670c61d151a223
LINUX_KERNEL_HASH-5.4.61 = 86f13d050f6389c5a1727fa81510ee8eceac795297bc584f443354609617fea4
remove_uri_prefix=$(subst git://,,$(subst http://,,$(subst https://,,$(1))))
sanitize_uri=$(call qstrip,$(subst @,_,$(subst :,_,$(subst .,_,$(subst -,_,$(subst /,_,$(1)))))))

8
include/package-ipkg.mk
View File

@ -9,10 +9,6 @@ ifndef DUMP
include $(INCLUDE_DIR)/feeds.mk
endif
# invoke ipkg-build with some default options
IPKG_BUILD:= \
$(SCRIPT_DIR)/ipkg-build -c -o 0 -g 0
IPKG_REMOVE:= \
$(SCRIPT_DIR)/ipkg-remove
@ -185,6 +181,7 @@ $$(call addfield,Depends,$$(Package/$(1)/DEPENDS)
)$$(call addfield,LicenseFiles,$(LICENSE_FILES)
)$$(call addfield,Section,$(SECTION)
)$$(call addfield,Require-User,$(USERID)
)$$(call addfield,SourceDateEpoch,$(shell $(TOPDIR)/scripts/get_source_date_epoch.sh $(SOURCE))
)$(if $(PKG_CPE_ID),CPE-ID: $(PKG_CPE_ID)
)$(if $(filter hold,$(PKG_FLAGS)),Status: unknown hold not-installed
)$(if $(filter essential,$(PKG_FLAGS)),Essential: yes
@ -196,6 +193,7 @@ $(_endef)
$$(IPKG_$(1)) : export CONTROL=$$(Package/$(1)/CONTROL)
$$(IPKG_$(1)) : export DESCRIPTION=$$(Package/$(1)/description)
$$(IPKG_$(1)) : export PATH=$$(TARGET_PATH_PKG)
$$(IPKG_$(1)) : export PKG_SOURCE_DATE_EPOCH=$(shell $(TOPDIR)/scripts/get_source_date_epoch.sh $(SOURCE))
$(PKG_INFO_DIR)/$(1).provides $$(IPKG_$(1)): $(STAMP_BUILT) $(INCLUDE_DIR)/package-ipkg.mk
@rm -rf $$(IDIR_$(1)); \
$$(call remove_ipkg_files,$(1),$$(call opkg_package_files,$(call gen_ipkg_wildcard,$(1))))
@ -262,7 +260,7 @@ $(_endef)
endif
$(INSTALL_DIR) $$(PDIR_$(1))
$(IPKG_BUILD) $$(IDIR_$(1)) $$(PDIR_$(1))
$(FAKEROOT) $(SCRIPT_DIR)/ipkg-build -m "$(PKG_FILE_MODES)" $$(IDIR_$(1)) $$(PDIR_$(1))
@[ -f $$(IPKG_$(1)) ]
$(1)-clean:

6
include/target.mk
View File

@ -20,7 +20,11 @@ DEFAULT_PACKAGES:=base-files libc libgcc busybox dropbear mtd uci opkg netifd fs
# For the basic set
DEFAULT_PACKAGES.basic:=
# For nas targets
DEFAULT_PACKAGES.nas:=block-mount fdisk lsblk mdadm
DEFAULT_PACKAGES.nas:=\
block-mount \
fdisk \
lsblk \
mdadm
# For router targets
DEFAULT_PACKAGES.router:=dnsmasq-full iptables ip6tables ppp ppp-mod-pppoe firewall odhcpd-ipv6only odhcp6c

2
include/version.mk
View File

@ -32,7 +32,7 @@ VERSION_CODE:=$(call qstrip,$(CONFIG_VERSION_CODE))
VERSION_CODE:=$(if $(VERSION_CODE),$(VERSION_CODE),$(REVISION))
VERSION_REPO:=$(call qstrip,$(CONFIG_VERSION_REPO))
VERSION_REPO:=$(if $(VERSION_REPO),$(VERSION_REPO),http://downloads.openwrt.org/snapshots)
VERSION_REPO:=$(if $(VERSION_REPO),$(VERSION_REPO),https://downloads.openwrt.org/snapshots)
VERSION_DIST:=$(call qstrip,$(CONFIG_VERSION_DIST))
VERSION_DIST:=$(if $(VERSION_DIST),$(VERSION_DIST),OpenWrt)

2
package/Makefile
View File

@ -84,7 +84,7 @@ $(curdir)/index: FORCE
mkdir -p $$d; \
cd $$d || continue; \
$(SCRIPT_DIR)/ipkg-make-index.sh . 2>&1 > Packages.manifest; \
grep -vE '^(Maintainer|LicenseFiles|Source|SourceName|Require)' Packages.manifest > Packages; \
grep -vE '^(Maintainer|LicenseFiles|Source|SourceName|Require|SourceDateEpoch)' Packages.manifest > Packages; \
case "$$(((64 + $$(stat -L -c%s Packages)) % 128))" in 110|111) \
$(call ERROR_MESSAGE,WARNING: Applying padding in $$d/Packages to workaround usign SHA-512 bug!); \
{ echo ""; echo ""; } >> Packages;; \

2
package/base-files/image-config.in
View File

@ -183,7 +183,7 @@ if VERSIONOPT
config VERSION_REPO
string
prompt "Release repository"
default "http://downloads.openwrt.org/snapshots"
default "https://downloads.openwrt.org/snapshots"
help
This is the repository address embedded in the image, it defaults
to the trunk snapshot repo; the url may contain the following placeholders:

33
package/boot/uboot-ar71xx/Makefile
View File

@ -1,33 +0,0 @@
#
# Copyright (C) 2010 OpenWrt.org
#
# This is free software, licensed under the GNU General Public License v2.
# See /LICENSE for more information.
#
include $(TOPDIR)/rules.mk
PKG_VERSION:=2010.03
PKG_RELEASE:=1
PKG_HASH:=902d1b2c15787df55186fae4033685fb0c5a5a12755a08383e97c4a3e255925b
include $(INCLUDE_DIR)/u-boot.mk
include $(INCLUDE_DIR)/package.mk
define U-Boot/Default
BUILD_TARGET:=ar71xx
BUILD_SUBTARGET:=generic
endef
define U-Boot/nbg460n_550n_550nh
TITLE:=NBG460N/550N/550NH routers
BUILD_DEVICES:=NBG_460N_550N_550NH
HIDDEN:=y
endef
UBOOT_MAKE_FLAGS :=
UBOOT_TARGETS:=nbg460n_550n_550nh
$(eval $(call BuildPackage/U-Boot))

82
package/boot/uboot-ar71xx/patches/0001-upstream-Reproducible-U-Boot-build-support-using-SOURCE_DATE_.patch
View File

@ -1,82 +0,0 @@
From f3f431a712729a1af94d01bd1bfde17a252ff02c Mon Sep 17 00:00:00 2001
From: Paul Kocialkowski <contact@paulk.fr>
Date: Sun, 26 Jul 2015 18:48:15 +0200
Subject: [PATCH] Reproducible U-Boot build support, using SOURCE_DATE_EPOCH
In order to achieve reproducible builds in U-Boot, timestamps that are defined
at build-time have to be somewhat eliminated. The SOURCE_DATE_EPOCH environment
variable allows setting a fixed value for those timestamps.
Simply by setting SOURCE_DATE_EPOCH to a fixed value, a number of targets can be
built reproducibly. This is the case for e.g. sunxi devices.
However, some other devices might need some more tweaks, especially regarding
the image generation tools.
Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
---
Makefile | 7 ++++---
README | 12 ++++++++++++
tools/default_image.c | 21 ++++++++++++++++++++-
3 files changed, 36 insertions(+), 4 deletions(-)
--- a/README
+++ b/README
@@ -2785,6 +2785,18 @@ Low Level (hardware related) configurati
that is executed before the actual U-Boot. E.g. when
compiling a NAND SPL.
+Reproducible builds
+-------------------
+
+In order to achieve reproducible builds, timestamps used in the U-Boot build
+process have to be set to a fixed value.
+
+This is done using the SOURCE_DATE_EPOCH environment variable.
+SOURCE_DATE_EPOCH is to be set on the build host's shell, not as a configuration
+option for U-Boot or an environment variable in U-Boot.
+
+SOURCE_DATE_EPOCH should be set to a number of seconds since the epoch, in UTC.
+
Building the Software:
======================
--- a/tools/default_image.c
+++ b/tools/default_image.c
@@ -101,6 +101,9 @@ static void image_set_header (void *ptr,
struct mkimage_params *params)
{
uint32_t checksum;
+ char *source_date_epoch;
+ struct tm *time_universal;
+ time_t time;
image_header_t * hdr = (image_header_t *)ptr;
@@ -109,9 +112,25 @@ static void image_set_header (void *ptr,
sizeof(image_header_t)),
sbuf->st_size - sizeof(image_header_t));
+source_date_epoch = getenv("SOURCE_DATE_EPOCH");
+ if (source_date_epoch != NULL) {
+ time = (time_t) strtol(source_date_epoch, NULL, 10);
+
+ time_universal = gmtime(&time);
+ if (time_universal == NULL) {
+ fprintf(stderr, "%s: SOURCE_DATE_EPOCH is not valid\n",
+ __func__);
+ time = 0;
+ } else {
+ time = mktime(time_universal);
+ }
+ } else {
+ time = sbuf->st_mtime;
+ }
+
/* Build new header */
image_set_magic (hdr, IH_MAGIC);
- image_set_time (hdr, sbuf->st_mtime);
+ image_set_time(hdr, time);
image_set_size (hdr, sbuf->st_size - sizeof(image_header_t));
image_set_load (hdr, params->addr);
image_set_ep (hdr, params->ep);

31
package/boot/uboot-ar71xx/patches/0002-upstream-Makefile-Reproducible-U-Boot-build-support.patch
View File

@ -1,31 +0,0 @@
--- a/Makefile
+++ b/Makefile
@@ -389,8 +389,26 @@ $(VERSION_FILE):
@cmp -s $@ $@.tmp && rm -f $@.tmp || mv -f $@.tmp $@
$(TIMESTAMP_FILE):
- @date +'#define U_BOOT_DATE "%b %d %C%y"' > $@
- @date +'#define U_BOOT_TIME "%T"' >> $@
+ (if test -n "$${SOURCE_DATE_EPOCH}"; then \
+ SOURCE_DATE="@$${SOURCE_DATE_EPOCH}"; \
+ DATE=""; \
+ for date in gdate date.gnu date; do \
+ $${date} -u -d "$${SOURCE_DATE}" >/dev/null 2>&1 && DATE="$${date}"; \
+ done; \
+ if test -n "$${DATE}"; then \
+ LC_ALL=C $${DATE} -u -d "$${SOURCE_DATE}" +'#define U_BOOT_DATE "%b %d %C%y"' > $@; \
+ LC_ALL=C $${DATE} -u -d "$${SOURCE_DATE}" +'#define U_BOOT_TIME "%T"' >> $@; \
+ LC_ALL=C $${DATE} -u -d "$${SOURCE_DATE}" +'#define U_BOOT_TZ "%z"' >> $@; \
+ LC_ALL=C $${DATE} -u -d "$${SOURCE_DATE}" +'#define U_BOOT_DMI_DATE "%m/%d/%Y"' >> $@; \
+ else \
+ return 42; \
+ fi; \
+ else \
+ LC_ALL=C date +'#define U_BOOT_DATE "%b %d %C%y"'; \
+ LC_ALL=C date +'#define U_BOOT_TIME "%T"'; \
+ LC_ALL=C date +'#define U_BOOT_TZ "%z"'; \
+ LC_ALL=C date +'#define U_BOOT_DMI_DATE "%m/%d/%Y"'; \
+ fi)
gdbtools:
$(MAKE) -C tools/gdb all || exit 1

26
package/boot/uboot-ar71xx/patches/001-ar71xx.patch
View File

@ -1,26 +0,0 @@
--- a/cpu/mips/Makefile
+++ b/cpu/mips/Makefile
@@ -33,6 +33,7 @@ SOBJS-$(CONFIG_INCA_IP) += incaip_wdt.o
COBJS-$(CONFIG_INCA_IP) += asc_serial.o incaip_clock.o
COBJS-$(CONFIG_PURPLE) += asc_serial.o
COBJS-$(CONFIG_SOC_AU1X00) += au1x00_eth.o au1x00_serial.o au1x00_usb_ohci.o
+COBJS-$(CONFIG_AR71XX) += ar71xx_serial.o
SRCS := $(START:.o=.S) $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c)
OBJS := $(addprefix $(obj),$(SOBJS-y) $(COBJS-y))
--- a/Makefile
+++ b/Makefile
@@ -3474,6 +3474,13 @@ qemu_mips_config : unconfig
@$(MKCONFIG) -a qemu-mips mips mips qemu-mips
#########################################################################
+## MIPS32 AR71XX (24K)
+#########################################################################
+
+nbg460n_550n_550nh_config : unconfig
+ @$(MKCONFIG) -a nbg460n mips mips nbg460n zyxel
+
+#########################################################################
## MIPS64 5Kc
#########################################################################

11
package/boot/uboot-ar71xx/patches/002-ar71xx-spi.patch
View File

@ -1,11 +0,0 @@
diff -ur u-boot-2010.03/drivers/spi/Makefile u-boot-nbg/drivers/spi/Makefile
--- u-boot-2010.03/drivers/spi/Makefile 2010-03-31 23:54:39.000000000 +0200
+++ u-boot-nbg/drivers/spi/Makefile 2010-04-15 19:31:27.000000000 +0200
@@ -25,6 +25,7 @@
LIB := $(obj)libspi.a
+COBJS-$(CONFIG_AR71XX_SPI) += ar71xx_spi.o
COBJS-$(CONFIG_ATMEL_DATAFLASH_SPI) += atmel_dataflash_spi.o
COBJS-$(CONFIG_ATMEL_SPI) += atmel_spi.o
COBJS-$(CONFIG_BFIN_SPI) += bfin_spi.o

22
package/boot/uboot-ar71xx/patches/010-enet-ag71xx.patch
View File

@ -1,22 +0,0 @@
diff -ur u-boot-2010.03/drivers/net/Makefile u-boot-nbg/drivers/net/Makefile
--- u-boot-2010.03/drivers/net/Makefile 2010-03-31 23:54:39.000000000 +0200
+++ u-boot-nbg/drivers/net/Makefile 2010-04-19 23:30:01.000000000 +0200
@@ -27,6 +27,7 @@
COBJS-$(CONFIG_DRIVER_3C589) += 3c589.o
COBJS-$(CONFIG_PPC4xx_EMAC) += 4xx_enet.o
+COBJS-$(CONFIG_AG71XX) += ag71xx.o
COBJS-$(CONFIG_DRIVER_AT91EMAC) += at91_emac.o
COBJS-$(CONFIG_DRIVER_AX88180) += ax88180.o
COBJS-$(CONFIG_BCM570x) += bcm570x.o bcm570x_autoneg.o 5701rls.o
diff -ur u-boot-2010.03/include/netdev.h u-boot-nbg/include/netdev.h
--- u-boot-2010.03/include/netdev.h 2010-03-31 23:54:39.000000000 +0200
+++ u-boot-nbg/include/netdev.h 2010-05-02 11:30:58.000000000 +0200
@@ -42,6 +42,7 @@
/* Driver initialization prototypes */
int au1x00_enet_initialize(bd_t*);
+int ag71xx_register(bd_t * bis, char *phyname[], u16 phyid[], u16 phyfixed[]);
int at91emac_register(bd_t *bis, unsigned long iobase);
int bfin_EMAC_initialize(bd_t *bis);
int cs8900_initialize(u8 dev_num, int base_addr);

28
package/boot/uboot-ar71xx/patches/011-switch-rtl8366sr.patch
View File

@ -1,28 +0,0 @@
diff -ur u-boot-2010.03/drivers/net/Makefile u-boot-nbg/drivers/net/Makefile
--- u-boot-2010.03/drivers/net/Makefile 2010-03-31 23:54:39.000000000 +0200
+++ u-boot-nbg/drivers/net/Makefile 2010-04-19 23:30:01.000000000 +0200
@@ -65,6 +65,7 @@
COBJS-$(CONFIG_DRIVER_RTL8019) += rtl8019.o
COBJS-$(CONFIG_RTL8139) += rtl8139.o
COBJS-$(CONFIG_RTL8169) += rtl8169.o
+COBJS-$(CONFIG_RTL8366_MII) += phy/rtl8366_mii.o
COBJS-$(CONFIG_DRIVER_S3C4510_ETH) += s3c4510b_eth.o
COBJS-$(CONFIG_SH_ETHER) += sh_eth.o
COBJS-$(CONFIG_SMC91111) += smc91111.o
diff -ur u-boot-2010.03/include/netdev.h u-boot-nbg/include/netdev.h
--- u-boot-2010.03/include/netdev.h 2010-03-31 23:54:39.000000000 +0200
+++ u-boot-nbg/include/netdev.h 2010-05-02 11:30:58.000000000 +0200
@@ -175,5 +175,13 @@
int mv88e61xx_switch_initialize(struct mv88e61xx_config *swconfig);
#endif /* CONFIG_MV88E61XX_SWITCH */
+
+#if defined(CONFIG_RTL8366_MII)
+#define RTL8366_DEVNAME "rtl8366"
+#define RTL8366_WANPHY_ID 4
+#define RTL8366_LANPHY_ID -1
+int rtl8366_mii_register(bd_t *bis);
+int rtl8366s_initialize(void);
+#endif
#endif /* _NETDEV_H_ */

11
package/boot/uboot-ar71xx/patches/020-freebsd-compat.patch
View File

@ -1,11 +0,0 @@
--- a/include/compiler.h
+++ b/include/compiler.h
@@ -46,7 +46,7 @@ extern int errno;
#ifdef __linux__
# include <endian.h>
# include <byteswap.h>
-#elif defined(__MACH__)
+#elif defined(__MACH__) || defined(__FreeBSD__)
# include <machine/endian.h>
typedef unsigned long ulong;
typedef unsigned int uint;

23
package/boot/uboot-ar71xx/patches/021-darwin_compat.patch
View File

@ -1,23 +0,0 @@
--- a/config.mk
+++ b/config.mk
@@ -64,9 +64,17 @@ HOSTSTRIP = strip
#
ifeq ($(HOSTOS),darwin)
-HOSTCC = cc
-HOSTCFLAGS += -traditional-cpp
-HOSTLDFLAGS += -multiply_defined suppress
+#get the major and minor product version (e.g. '10' and '6' for Snow Leopard)
+DARWIN_MAJOR_VERSION = $(shell sw_vers -productVersion | cut -f 1 -d '.')
+DARWIN_MINOR_VERSION = $(shell sw_vers -productVersion | cut -f 2 -d '.')
+
+before-snow-leopard = $(shell if [ $(DARWIN_MAJOR_VERSION) -le 10 -a \
+ $(DARWIN_MINOR_VERSION) -le 5 ] ; then echo "$(1)"; else echo "$(2)"; fi ;)
+
+# Snow Leopards build environment has no longer restrictions as described above
+HOSTCC = $(call before-snow-leopard, "cc", "gcc")
+HOSTCFLAGS += $(call before-snow-leopard, "-traditional-cpp")
+HOSTLDFLAGS += $(call before-snow-leopard, "-multiply_defined suppress")
else
HOSTCC = gcc
endif

21
package/boot/uboot-ar71xx/patches/022-getline_backport.patch
View File

@ -1,21 +0,0 @@
--- a/tools/os_support.c
+++ b/tools/os_support.c
@@ -23,6 +23,6 @@
#ifdef __MINGW32__
#include "mingw_support.c"
#endif
-#ifdef __APPLE__
+#if defined(__APPLE__) && __DARWIN_C_LEVEL < 200809L
#include "getline.c"
#endif
--- a/tools/os_support.h
+++ b/tools/os_support.h
@@ -28,7 +28,7 @@
#include "mingw_support.h"
#endif
-#ifdef __APPLE__
+#if defined(__APPLE__) && __DARWIN_C_LEVEL < 200809L
#include "getline.h"
#endif

13
package/boot/uboot-ar71xx/patches/023-musl-compat.patch
View File

@ -1,13 +0,0 @@
--- a/include/compiler.h 2018-08-29
+++ b/include/compiler.h 2018-08-29
@@ -46,6 +46,10 @@ extern int errno;
#ifdef __linux__
# include <endian.h>
# include <byteswap.h>
+#ifndef __GLIBC__
+typedef unsigned long ulong;
+typedef unsigned int uint;
+#endif
#elif defined(__MACH__) || defined(__FreeBSD__)
# include <machine/endian.h>
typedef unsigned long ulong;

13
package/boot/uboot-ar71xx/patches/030-no_examples.patch
View File

@ -1,13 +0,0 @@
--- a/Makefile
+++ b/Makefile
@@ -139,9 +139,7 @@ endif
# The "tools" are needed early, so put this first
# Don't include stuff already done in $(LIBS)
-SUBDIRS = tools \
- examples/standalone \
- examples/api
+SUBDIRS = tools
.PHONY : $(SUBDIRS)

112
package/boot/uboot-ar71xx/patches/040-no_extern_inline.patch
View File

@ -1,112 +0,0 @@
--- a/include/asm-mips/io.h
+++ b/include/asm-mips/io.h
@@ -118,12 +118,12 @@ static inline void set_io_port_base(unsi
* Change virtual addresses to physical addresses and vv.
* These are trivial on the 1:1 Linux/MIPS mapping
*/
-extern inline phys_addr_t virt_to_phys(volatile void * address)
+static inline phys_addr_t virt_to_phys(volatile void * address)
{
return CPHYSADDR(address);
}
-extern inline void * phys_to_virt(unsigned long address)
+static inline void * phys_to_virt(unsigned long address)
{
return (void *)KSEG0ADDR(address);
}
@@ -131,12 +131,12 @@ extern inline void * phys_to_virt(unsign
/*
* IO bus memory addresses are also 1:1 with the physical address
*/
-extern inline unsigned long virt_to_bus(volatile void * address)
+static inline unsigned long virt_to_bus(volatile void * address)
{
return CPHYSADDR(address);
}
-extern inline void * bus_to_virt(unsigned long address)
+static inline void * bus_to_virt(unsigned long address)
{
return (void *)KSEG0ADDR(address);
}
@@ -150,12 +150,12 @@ extern unsigned long isa_slot_offset;
extern void * __ioremap(unsigned long offset, unsigned long size, unsigned long flags);
#if 0
-extern inline void *ioremap(unsigned long offset, unsigned long size)
+static inline void *ioremap(unsigned long offset, unsigned long size)
{
return __ioremap(offset, size, _CACHE_UNCACHED);
}
-extern inline void *ioremap_nocache(unsigned long offset, unsigned long size)
+static inline void *ioremap_nocache(unsigned long offset, unsigned long size)
{
return __ioremap(offset, size, _CACHE_UNCACHED);
}
@@ -238,7 +238,7 @@ out:
*/
#define __OUT1(s) \
-extern inline void __out##s(unsigned int value, unsigned int port) {
+static inline void __out##s(unsigned int value, unsigned int port) {
#define __OUT2(m) \
__asm__ __volatile__ ("s" #m "\t%0,%1(%2)"
@@ -252,7 +252,7 @@ __OUT1(s##c_p) __OUT2(m) : : "r" (__iosw
SLOW_DOWN_IO; }
#define __IN1(t,s) \
-extern __inline__ t __in##s(unsigned int port) { t _v;
+static inline t __in##s(unsigned int port) { t _v;
/*
* Required nops will be inserted by the assembler
@@ -267,7 +267,7 @@ __IN1(t,s##_p) __IN2(m) : "=r" (_v) : "i
__IN1(t,s##c_p) __IN2(m) : "=r" (_v) : "ir" (port), "r" (mips_io_port_base)); SLOW_DOWN_IO; return __ioswab##w(_v); }
#define __INS1(s) \
-extern inline void __ins##s(unsigned int port, void * addr, unsigned long count) {
+static inline void __ins##s(unsigned int port, void * addr, unsigned long count) {
#define __INS2(m) \
if (count) \
@@ -295,7 +295,7 @@ __INS1(s##c) __INS2(m) \
: "$1");}
#define __OUTS1(s) \
-extern inline void __outs##s(unsigned int port, const void * addr, unsigned long count) {
+static inline void __outs##s(unsigned int port, const void * addr, unsigned long count) {
#define __OUTS2(m) \
if (count) \
--- a/include/asm-mips/system.h
+++ b/include/asm-mips/system.h
@@ -23,7 +23,7 @@
#include <linux/kernel.h>
#endif
-extern __inline__ void
+static inline void
__sti(void)
{
__asm__ __volatile__(
@@ -47,7 +47,7 @@ __sti(void)
* R4000/R4400 need three nops, the R4600 two nops and the R10000 needs
* no nops at all.
*/
-extern __inline__ void
+static inline void
__cli(void)
{
__asm__ __volatile__(
@@ -208,7 +208,7 @@ do { \
* For 32 and 64 bit operands we can take advantage of ll and sc.
* FIXME: This doesn't work for R3000 machines.
*/
-extern __inline__ unsigned long xchg_u32(volatile int * m, unsigned long val)
+static inline unsigned long xchg_u32(volatile int * m, unsigned long val)
{
#ifdef CONFIG_CPU_HAS_LLSC
unsigned long dummy;

12
package/boot/uboot-ar71xx/patches/041-no_weak_alias.patch
View File

@ -1,12 +0,0 @@
--- a/common/main.c
+++ b/common/main.c
@@ -47,8 +47,7 @@ DECLARE_GLOBAL_DATA_PTR;
/*
* Board-specific Platform code can reimplement show_boot_progress () if needed
*/
-void inline __show_boot_progress (int val) {}
-void show_boot_progress (int val) __attribute__((weak, alias("__show_boot_progress")));
+void __attribute__((weak)) show_boot_progress(int val) {}
#if defined(CONFIG_BOOT_RETRY_TIME) && defined(CONFIG_RESET_TO_RETRY)
extern int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]); /* for do_reset() prototype */

46
package/boot/uboot-ar71xx/src/board/zyxel/nbg460n/Makefile
View File

@ -1,46 +0,0 @@
#
# (C) Copyright 2003-2008
# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
#
# See file CREDITS for list of people who contributed to this
# project.
#
# This program is free software; you can redistribute it and/or
# modify it under the terms of the GNU General Public License as
# published by the Free Software Foundation; either version 2 of
# the License, or (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program; if not, write to the Free Software
# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
# MA 02111-1307 USA
#
include $(TOPDIR)/config.mk
LIB = $(obj)lib$(BOARD).a
COBJS-y += $(BOARD).o
SOBJS-y += lowlevel_init.o
SRCS := $(SOBJS-y:.o=.S) $(COBJS-y:.o=.c)
OBJS := $(addprefix $(obj),$(COBJS-y))
SOBJS := $(addprefix $(obj),$(SOBJS-y))
$(LIB): $(obj).depend $(OBJS) $(SOBJS)
$(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS)
#########################################################################
# defines $(obj).depend target
include $(SRCTREE)/rules.mk
sinclude $(obj).depend
#########################################################################

1
package/boot/uboot-ar71xx/src/board/zyxel/nbg460n/config.mk
View File

@ -1 +0,0 @@
TEXT_BASE = 0x81E00000

39
package/boot/uboot-ar71xx/src/board/zyxel/nbg460n/lowlevel_init.S
View File

@ -1,39 +0,0 @@
/*
* (C) Copyright 2010
* Michael Kurz <michi.kurz@googlemail.com>.
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#include <config.h>
#include <version.h>
#include <asm/regdef.h>
#include <asm/mipsregs.h>
#include <asm/addrspace.h>
.globl lowlevel_init
/*
All done by Bootbase, nothing to do
*/
lowlevel_init:
jr ra
nop

96
package/boot/uboot-ar71xx/src/board/zyxel/nbg460n/nbg460n.c
View File

@ -1,96 +0,0 @@
/*
* (C) Copyright 2010
* Michael Kurz <michi.kurz@googlemail.com>.
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#include <common.h>
#include <netdev.h>
#include <asm/mipsregs.h>
#include <asm/addrspace.h>
#include <asm/reboot.h>
#include <asm/ar71xx.h>
#include <asm/ar71xx_gpio.h>
#define NBG460N_WAN_LED 19
phys_size_t initdram(int board_type)
{
return (32*1024*1024);
}
int checkboard(void)
{
// Set pin 19 to 1, to stop WAN LED blinking
ar71xx_setpindir(NBG460N_WAN_LED, 1);
ar71xx_setpin(NBG460N_WAN_LED, 1);
printf("U-boot on Zyxel NBG460N\n");
return 0;
}
void _machine_restart(void)
{
for (;;) {
writel((RESET_MODULE_FULL_CHIP | RESET_MODULE_DDR),
KSEG1ADDR(AR71XX_RESET_BASE + AR91XX_RESET_REG_RESET_MODULE));
readl(KSEG1ADDR(AR71XX_RESET_BASE + AR91XX_RESET_REG_RESET_MODULE));
}
}
int board_eth_init(bd_t *bis)
{
char *phynames[] = {RTL8366_DEVNAME, RTL8366_DEVNAME};
u16 phyids[] = {RTL8366_LANPHY_ID, RTL8366_WANPHY_ID};
u16 phyfixed[] = {1, 0};
if (ag71xx_register(bis, phynames, phyids, phyfixed) <= 0)
return -1;
if (rtl8366s_initialize())
return -1;
if (rtl8366_mii_register(bis))
return -1;
return 0;
}
int misc_init_r(void) {
uint8_t macaddr[6];
uint8_t enetaddr[6];
debug("Testing mac addresses\n");
memcpy(macaddr, (uint8_t *) CONFIG_ETHADDR_ADDR, 6);
if (!eth_getenv_enetaddr("ethaddr", enetaddr)) {
debug("Setting eth0 mac addr to %pM\n", macaddr);
eth_setenv_enetaddr("ethaddr", macaddr);
}
if (!eth_getenv_enetaddr("eth1addr", enetaddr)) {
macaddr[5] += 1;
debug("Setting eth1 mac addr to %pM\n", macaddr);
eth_setenv_enetaddr("eth1addr", macaddr);
}
return 0;
}

42
package/boot/uboot-ar71xx/src/board/zyxel/nbg460n/u-boot.lds
View File

@ -1,42 +0,0 @@
OUTPUT_FORMAT("elf32-tradbigmips", "elf32-tradbigmips", "elf32-tradbigmips")
OUTPUT_ARCH(mips)
ENTRY(_start)
SECTIONS
{
. = 0x00000000;
. = ALIGN(4);
.text :
{
*(.text)
}
. = ALIGN(4);
.rodata : { *(.rodata) }
. = ALIGN(4);
.data : { *(.data) }
. = ALIGN(4);
.sdata : { *(.sdata) }
_gp = ALIGN(16);
__got_start = .;
.got : { *(.got) }
__got_end = .;
.sdata : { *(.sdata) }
__u_boot_cmd_start = .;
.u_boot_cmd : { *(.u_boot_cmd) }
__u_boot_cmd_end = .;
uboot_end_data = .;
num_got_entries = (__got_end - __got_start) >> 2;
. = ALIGN(4);
.sbss : { *(.sbss) }
.bss : { *(.bss) }
uboot_end = .;
}

177
package/boot/uboot-ar71xx/src/cpu/mips/ar71xx_serial.c
View File

@ -1,177 +0,0 @@
/*
* (C) Copyright 2010
* Michael Kurz <michi.kurz@googlemail.com>.
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#include <asm/addrspace.h>
#include <asm/types.h>
#include <config.h>
#include <asm/ar71xx.h>
#define REG_SIZE 4
/* === END OF CONFIG === */
/* register offset */
#define OFS_RCV_BUFFER (0*REG_SIZE)
#define OFS_TRANS_HOLD (0*REG_SIZE)
#define OFS_SEND_BUFFER (0*REG_SIZE)
#define OFS_INTR_ENABLE (1*REG_SIZE)
#define OFS_INTR_ID (2*REG_SIZE)
#define OFS_DATA_FORMAT (3*REG_SIZE)
#define OFS_LINE_CONTROL (3*REG_SIZE)
#define OFS_MODEM_CONTROL (4*REG_SIZE)
#define OFS_RS232_OUTPUT (4*REG_SIZE)
#define OFS_LINE_STATUS (5*REG_SIZE)
#define OFS_MODEM_STATUS (6*REG_SIZE)
#define OFS_RS232_INPUT (6*REG_SIZE)
#define OFS_SCRATCH_PAD (7*REG_SIZE)
#define OFS_DIVISOR_LSB (0*REG_SIZE)
#define OFS_DIVISOR_MSB (1*REG_SIZE)
#define UART16550_READ(y) readl(KSEG1ADDR(AR71XX_UART_BASE+y))
#define UART16550_WRITE(x, z) writel(z, KSEG1ADDR((AR71XX_UART_BASE+x)))
void
ar71xx_sys_frequency(u32 *cpu_freq, u32 *ddr_freq, u32 *ahb_freq)
{
#ifndef CONFIG_AR91XX
u32 pll, pll_div, cpu_div, ahb_div, ddr_div, freq;
pll = readl(KSEG1ADDR(AR71XX_PLL_REG_CPU_CONFIG + AR71XX_PLL_BASE));
pll_div =
((pll & AR71XX_PLL_DIV_MASK) >> AR71XX_PLL_DIV_SHIFT) + 1;
cpu_div =
((pll & AR71XX_CPU_DIV_MASK) >> AR71XX_CPU_DIV_SHIFT) + 1;
ddr_div =
((pll & AR71XX_DDR_DIV_MASK) >> AR71XX_DDR_DIV_SHIFT) + 1;
ahb_div =
(((pll & AR71XX_AHB_DIV_MASK) >> AR71XX_AHB_DIV_SHIFT) + 1)*2;
freq = pll_div * 40000000;
if (cpu_freq)
*cpu_freq = freq/cpu_div;
if (ddr_freq)
*ddr_freq = freq/ddr_div;
if (ahb_freq)
*ahb_freq = (freq/cpu_div)/ahb_div;
#else
u32 pll, pll_div, ahb_div, ddr_div, freq;
pll = readl(KSEG1ADDR(AR91XX_PLL_REG_CPU_CONFIG + AR71XX_PLL_BASE));
pll_div =
((pll & AR91XX_PLL_DIV_MASK) >> AR91XX_PLL_DIV_SHIFT);
ddr_div =
((pll & AR91XX_DDR_DIV_MASK) >> AR91XX_DDR_DIV_SHIFT) + 1;
ahb_div =
(((pll & AR91XX_AHB_DIV_MASK) >> AR91XX_AHB_DIV_SHIFT) + 1)*2;
freq = pll_div * 5000000;
if (cpu_freq)
*cpu_freq = freq;
if (ddr_freq)
*ddr_freq = freq/ddr_div;
if (ahb_freq)
*ahb_freq = freq/ahb_div;
#endif
}
int serial_init(void)
{
u32 div;
u32 ahb_freq = 100000000;
ar71xx_sys_frequency (0, 0, &ahb_freq);
div = ahb_freq/(16 * CONFIG_BAUDRATE);
// enable uart pins
#ifndef CONFIG_AR91XX
writel(AR71XX_GPIO_FUNC_UART_EN, KSEG1ADDR(AR71XX_GPIO_BASE + GPIO_REG_FUNC));
#else
writel(AR91XX_GPIO_FUNC_UART_EN, KSEG1ADDR(AR71XX_GPIO_BASE + GPIO_REG_FUNC));
#endif
/* set DIAB bit */
UART16550_WRITE(OFS_LINE_CONTROL, 0x80);
/* set divisor */
UART16550_WRITE(OFS_DIVISOR_LSB, (div & 0xff));
UART16550_WRITE(OFS_DIVISOR_MSB, ((div >> 8) & 0xff));
/* clear DIAB bit*/
UART16550_WRITE(OFS_LINE_CONTROL, 0x00);
/* set data format */
UART16550_WRITE(OFS_DATA_FORMAT, 0x3);
UART16550_WRITE(OFS_INTR_ENABLE, 0);
return 0;
}
int serial_tstc (void)
{
return(UART16550_READ(OFS_LINE_STATUS) & 0x1);
}
int serial_getc(void)
{
while(!serial_tstc());
return UART16550_READ(OFS_RCV_BUFFER);
}
void serial_putc(const char byte)
{
if (byte == '\n') serial_putc ('\r');
while (((UART16550_READ(OFS_LINE_STATUS)) & 0x20) == 0x0);
UART16550_WRITE(OFS_SEND_BUFFER, byte);
}
void serial_setbrg (void)
{
}
void serial_puts (const char *s)
{
while (*s)
{
serial_putc (*s++);
}
}

809
package/boot/uboot-ar71xx/src/drivers/net/ag71xx.c
View File

@ -1,809 +0,0 @@
/*
* Atheros AR71xx built-in ethernet mac driver
*
* Copyright (C) 2010 Michael Kurz <michi.kurz@googlemail.com>
* Copyright (C) 2008-2010 Gabor Juhos <juhosg@openwrt.org>
* Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
*
* Based on Atheros' AG7100 driver
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License version 2 as published
* by the Free Software Foundation.
*/
#include <common.h>
#include <malloc.h>
#include <net.h>
#include <miiphy.h>
#include <asm/ar71xx.h>
#include "ag71xx.h"
#ifdef AG71XX_DEBUG
#define DBG(fmt,args...) printf(fmt ,##args)
#else
#define DBG(fmt,args...)
#endif
static struct ag71xx agtable[] = {
{
.mac_base = KSEG1ADDR(AR71XX_GE0_BASE),
.mii_ctrl = KSEG1ADDR(AR71XX_MII_BASE + MII_REG_MII0_CTRL),
.mii_if = CONFIG_AG71XX_MII0_IIF,
} , {
.mac_base = KSEG1ADDR(AR71XX_GE1_BASE),
.mii_ctrl = KSEG1ADDR(AR71XX_MII_BASE + MII_REG_MII1_CTRL),
.mii_if = CONFIG_AG71XX_MII1_IIF,
}
};
static int ag71xx_ring_alloc(struct ag71xx_ring *ring, unsigned int size)
{
int err;
int i;
int rsize;
ring->desc_size = sizeof(struct ag71xx_desc);
if (ring->desc_size % (CONFIG_SYS_CACHELINE_SIZE)) {
rsize = roundup(ring->desc_size, CONFIG_SYS_CACHELINE_SIZE);
DBG("ag71xx: ring %p, desc size %u rounded to %u\n",
ring, ring->desc_size,
rsize);
ring->desc_size = rsize;
}
ring->descs_cpu = (u8 *) malloc((size * ring->desc_size)
+ CONFIG_SYS_CACHELINE_SIZE - 1);
if (!ring->descs_cpu) {
err = -1;
goto err;
}
ring->descs_cpu = (u8 *) UNCACHED_SDRAM((((u32) ring->descs_cpu +
CONFIG_SYS_CACHELINE_SIZE - 1) & ~(CONFIG_SYS_CACHELINE_SIZE - 1)));
ring->descs_dma = (u8 *) virt_to_phys(ring->descs_cpu);
ring->size = size;
ring->buf = malloc(size * sizeof(*ring->buf));
if (!ring->buf) {
err = -1;
goto err;
}
memset(ring->buf, 0, size * sizeof(*ring->buf));
for (i = 0; i < size; i++) {
ring->buf[i].desc =
(struct ag71xx_desc *)&ring->descs_cpu[i * ring->desc_size];
DBG("ag71xx: ring %p, desc %d at %p\n",
ring, i, ring->buf[i].desc);
}
flush_cache( (u32) ring->buf, size * sizeof(*ring->buf));
return 0;
err:
return err;
}
static void ag71xx_ring_tx_init(struct ag71xx *ag)
{
struct ag71xx_ring *ring = &ag->tx_ring;
int i;
for (i = 0; i < AG71XX_TX_RING_SIZE; i++) {
ring->buf[i].desc->next = (u32) virt_to_phys((ring->descs_dma +
ring->desc_size * ((i + 1) % AG71XX_TX_RING_SIZE)));
ring->buf[i].desc->ctrl = DESC_EMPTY;
ring->buf[i].skb = NULL;
}
ring->curr = 0;
}
static void ag71xx_ring_rx_clean(struct ag71xx *ag)
{
struct ag71xx_ring *ring = &ag->rx_ring;
int i;
if (!ring->buf)
return;
for (i = 0; i < AG71XX_RX_RING_SIZE; i++) {
ring->buf[i].desc->data = (u32) virt_to_phys(NetRxPackets[i]);
flush_cache((u32) NetRxPackets[i], PKTSIZE_ALIGN);
ring->buf[i].desc->ctrl = DESC_EMPTY;
}
ring->curr = 0;
}
static int ag71xx_ring_rx_init(struct ag71xx *ag)
{
struct ag71xx_ring *ring = &ag->rx_ring;
unsigned int i;
for (i = 0; i < AG71XX_RX_RING_SIZE; i++) {
ring->buf[i].desc->next = (u32) virt_to_phys((ring->descs_dma +
ring->desc_size * ((i + 1) % AG71XX_RX_RING_SIZE)));
DBG("ag71xx: RX desc at %p, next is %08x\n",
ring->buf[i].desc,
ring->buf[i].desc->next);
}
for (i = 0; i < AG71XX_RX_RING_SIZE; i++) {
ring->buf[i].desc->data = (u32) virt_to_phys(NetRxPackets[i]);
ring->buf[i].desc->ctrl = DESC_EMPTY;
}
ring->curr = 0;
return 0;
}
static int ag71xx_rings_init(struct ag71xx *ag)
{
int ret;
ret = ag71xx_ring_alloc(&ag->tx_ring, AG71XX_TX_RING_SIZE);
if (ret)
return ret;
ag71xx_ring_tx_init(ag);
ret = ag71xx_ring_alloc(&ag->rx_ring, AG71XX_RX_RING_SIZE);
if (ret)
return ret;
ret = ag71xx_ring_rx_init(ag);
return ret;
}
static void ar71xx_set_pll(u32 cfg_reg, u32 pll_reg, u32 pll_val, u32 shift)
{
uint32_t base = KSEG1ADDR(AR71XX_PLL_BASE);
u32 t;
t = readl(base + cfg_reg);
t &= ~(3 << shift);
t |= (2 << shift);
writel(t, base + cfg_reg);
udelay(100);
writel(pll_val, base + pll_reg);
t |= (3 << shift);
writel(t, base + cfg_reg);
udelay(100);
t &= ~(3 << shift);
writel(t, base + cfg_reg);
udelay(100);
debug("ar71xx: pll_reg %#x: %#x\n", (unsigned int)(base + pll_reg),
readl(base + pll_reg));
}
static void ar91xx_set_pll_ge0(int speed)
{
//u32 val = ar71xx_get_eth_pll(0, speed);
u32 pll_val;
switch (speed) {
case SPEED_10:
pll_val = 0x00441099;
break;
case SPEED_100:
pll_val = 0x13000a44;
break;
case SPEED_1000:
pll_val = 0x1a000000;
break;
default:
BUG();
}
ar71xx_set_pll(AR91XX_PLL_REG_ETH_CONFIG, AR91XX_PLL_REG_ETH0_INT_CLOCK,
pll_val, AR91XX_ETH0_PLL_SHIFT);
}
static void ar91xx_set_pll_ge1(int speed)
{
//u32 val = ar71xx_get_eth_pll(1, speed);
u32 pll_val;
switch (speed) {
case SPEED_10:
pll_val = 0x00441099;
break;
case SPEED_100:
pll_val = 0x13000a44;
break;
case SPEED_1000:
pll_val = 0x1a000000;
break;
default:
BUG();
}
ar71xx_set_pll(AR91XX_PLL_REG_ETH_CONFIG, AR91XX_PLL_REG_ETH1_INT_CLOCK,
pll_val, AR91XX_ETH1_PLL_SHIFT);
}
static void ag71xx_hw_set_macaddr(struct ag71xx *ag, unsigned char *mac)
{
u32 t;
t = (((u32) mac[5]) << 24) | (((u32) mac[4]) << 16)
| (((u32) mac[3]) << 8) | ((u32) mac[2]);
ag71xx_wr(ag, AG71XX_REG_MAC_ADDR1, t);
t = (((u32) mac[1]) << 24) | (((u32) mac[0]) << 16);
ag71xx_wr(ag, AG71XX_REG_MAC_ADDR2, t);
}
static void ag71xx_dma_reset(struct ag71xx *ag)
{
u32 val;
int i;
DBG("%s: txdesc reg: 0x%08x rxdesc reg: 0x%08x\n",
ag->dev->name,
ag71xx_rr(ag, AG71XX_REG_TX_DESC),
ag71xx_rr(ag, AG71XX_REG_RX_DESC));
/* stop RX and TX */
ag71xx_wr(ag, AG71XX_REG_RX_CTRL, 0);
ag71xx_wr(ag, AG71XX_REG_TX_CTRL, 0);
/* clear descriptor addresses */
ag71xx_wr(ag, AG71XX_REG_TX_DESC, 0);
ag71xx_wr(ag, AG71XX_REG_RX_DESC, 0);
/* clear pending RX/TX interrupts */
for (i = 0; i < 256; i++) {
ag71xx_wr(ag, AG71XX_REG_RX_STATUS, RX_STATUS_PR);
ag71xx_wr(ag, AG71XX_REG_TX_STATUS, TX_STATUS_PS);
}
/* clear pending errors */
ag71xx_wr(ag, AG71XX_REG_RX_STATUS, RX_STATUS_BE | RX_STATUS_OF);
ag71xx_wr(ag, AG71XX_REG_TX_STATUS, TX_STATUS_BE | TX_STATUS_UR);
val = ag71xx_rr(ag, AG71XX_REG_RX_STATUS);
if (val)
printf("%s: unable to clear DMA Rx status: %08x\n",
ag->dev->name, val);
val = ag71xx_rr(ag, AG71XX_REG_TX_STATUS);
/* mask out reserved bits */
val &= ~0xff000000;
if (val)
printf("%s: unable to clear DMA Tx status: %08x\n",
ag->dev->name, val);
}
static void ag71xx_halt(struct eth_device *dev)
{
struct ag71xx *ag = (struct ag71xx *) dev->priv;
/* stop RX engine */
ag71xx_wr(ag, AG71XX_REG_RX_CTRL, 0);
ag71xx_dma_reset(ag);
}
#define MAX_WAIT 1000
static int ag71xx_send(struct eth_device *dev, volatile void *packet,
int length)
{
struct ag71xx *ag = (struct ag71xx *) dev->priv;
struct ag71xx_ring *ring = &ag->tx_ring;
struct ag71xx_desc *desc;
int i;
i = ring->curr % AG71XX_TX_RING_SIZE;
desc = ring->buf[i].desc;
if (!ag71xx_desc_empty(desc)) {
printf("%s: tx buffer full\n", ag->dev->name);
return 1;
}
flush_cache((u32) packet, length);
desc->data = (u32) virt_to_phys(packet);
desc->ctrl = (length & DESC_PKTLEN_M);
DBG("%s: sending %#08x length %#08x\n",
ag->dev->name, desc->data, desc->ctrl);
ring->curr++;
if (ring->curr >= AG71XX_TX_RING_SIZE){
ring->curr = 0;
}
/* enable TX engine */
ag71xx_wr(ag, AG71XX_REG_TX_CTRL, TX_CTRL_TXE);
for (i = 0; i < MAX_WAIT; i++)
{
if (ag71xx_desc_empty(desc))
break;
udelay(10);
}
if (i == MAX_WAIT) {
printf("%s: tx timed out!\n", ag->dev->name);
return -1;
}
/* disable TX engine */
ag71xx_wr(ag, AG71XX_REG_TX_CTRL, 0);
desc->data = 0;
desc->ctrl = DESC_EMPTY;
return 0;
}
static int ag71xx_recv(struct eth_device *dev)
{
struct ag71xx *ag = (struct ag71xx *) dev->priv;
struct ag71xx_ring *ring = &ag->rx_ring;
for (;;) {
unsigned int i = ring->curr % AG71XX_RX_RING_SIZE;
struct ag71xx_desc *desc = ring->buf[i].desc;
int pktlen;
if (ag71xx_desc_empty(desc))
break;
DBG("%s: rx packets, curr=%u\n", dev->name, ring->curr);
pktlen = ag71xx_desc_pktlen(desc);
pktlen -= ETH_FCS_LEN;
NetReceive(NetRxPackets[i] , pktlen);
flush_cache( (u32) NetRxPackets[i], PKTSIZE_ALIGN);
ring->buf[i].desc->ctrl = DESC_EMPTY;
ring->curr++;
if (ring->curr >= AG71XX_RX_RING_SIZE){
ring->curr = 0;
}
}
if ((ag71xx_rr(ag, AG71XX_REG_RX_CTRL) & RX_CTRL_RXE) == 0) {
/* start RX engine */
ag71xx_wr(ag, AG71XX_REG_RX_CTRL, RX_CTRL_RXE);
}
return 0;
}
#ifdef AG71XX_DEBUG
static char *ag71xx_speed_str(struct ag71xx *ag)
{
switch (ag->speed) {
case SPEED_1000:
return "1000";
case SPEED_100:
return "100";
case SPEED_10:
return "10";
}
return "?";
}
#endif
void ag71xx_link_adjust(struct ag71xx *ag)
{
u32 cfg2;
u32 ifctl;
u32 fifo5;
u32 mii_speed;
if (!ag->link) {
DBG("%s: link down\n", ag->dev->name);
return;
}
cfg2 = ag71xx_rr(ag, AG71XX_REG_MAC_CFG2);
cfg2 &= ~(MAC_CFG2_IF_1000 | MAC_CFG2_IF_10_100 | MAC_CFG2_FDX);
cfg2 |= (ag->duplex) ? MAC_CFG2_FDX : 0;
ifctl = ag71xx_rr(ag, AG71XX_REG_MAC_IFCTL);
ifctl &= ~(MAC_IFCTL_SPEED);
fifo5 = ag71xx_rr(ag, AG71XX_REG_FIFO_CFG5);
fifo5 &= ~FIFO_CFG5_BM;
switch (ag->speed) {
case SPEED_1000:
mii_speed = MII_CTRL_SPEED_1000;
cfg2 |= MAC_CFG2_IF_1000;
fifo5 |= FIFO_CFG5_BM;
break;
case SPEED_100:
mii_speed = MII_CTRL_SPEED_100;
cfg2 |= MAC_CFG2_IF_10_100;
ifctl |= MAC_IFCTL_SPEED;
break;
case SPEED_10:
mii_speed = MII_CTRL_SPEED_10;
cfg2 |= MAC_CFG2_IF_10_100;
break;
default:
BUG();
return;
}
ag71xx_wr(ag, AG71XX_REG_FIFO_CFG3, 0x00780fff);
if (ag->macNum == 0)
ar91xx_set_pll_ge0(ag->speed);
else
ar91xx_set_pll_ge1(ag->speed);
ag71xx_mii_ctrl_set_speed(ag, mii_speed);
ag71xx_wr(ag, AG71XX_REG_MAC_CFG2, cfg2);
ag71xx_wr(ag, AG71XX_REG_FIFO_CFG5, fifo5);
ag71xx_wr(ag, AG71XX_REG_MAC_IFCTL, ifctl);
DBG("%s: link up (%sMbps/%s duplex)\n",
ag->dev->name,
ag71xx_speed_str(ag),
(1 == ag->duplex) ? "Full" : "Half");
DBG("%s: fifo_cfg0=%#x, fifo_cfg1=%#x, fifo_cfg2=%#x\n",
ag->dev->name,
ag71xx_rr(ag, AG71XX_REG_FIFO_CFG0),
ag71xx_rr(ag, AG71XX_REG_FIFO_CFG1),
ag71xx_rr(ag, AG71XX_REG_FIFO_CFG2));
DBG("%s: fifo_cfg3=%#x, fifo_cfg4=%#x, fifo_cfg5=%#x\n",
ag->dev->name,
ag71xx_rr(ag, AG71XX_REG_FIFO_CFG3),
ag71xx_rr(ag, AG71XX_REG_FIFO_CFG4),
ag71xx_rr(ag, AG71XX_REG_FIFO_CFG5));
DBG("%s: mac_cfg2=%#x, mac_ifctl=%#x, mii_ctrl=%#x\n",
ag->dev->name,
ag71xx_rr(ag, AG71XX_REG_MAC_CFG2),
ag71xx_rr(ag, AG71XX_REG_MAC_IFCTL),
ag71xx_mii_ctrl_rr(ag));
}
#if defined(CONFIG_MII) || defined(CONFIG_CMD_MII)
static int ag71xx_getMiiSpeed(struct ag71xx *ag)
{
uint16_t phyreg, cap;
if (miiphy_read(ag->phyname, ag->phyid,
PHY_BMSR, &phyreg)) {
puts("PHY_BMSR read failed, assuming no link\n");
return -1;
}
if ((phyreg & PHY_BMSR_LS) == 0) {
return -1;
}
if (miiphy_read(ag->phyname, ag->phyid,
PHY_1000BTSR, &phyreg))
return -1;
if (phyreg & PHY_1000BTSR_1000FD) {
ag->speed = SPEED_1000;
ag->duplex = 1;
} else if (phyreg & PHY_1000BTSR_1000HD) {
ag->speed = SPEED_1000;
ag->duplex = 0;
} else {
if (miiphy_read(ag->phyname, ag->phyid,
PHY_ANAR, &cap))
return -1;
if (miiphy_read(ag->phyname, ag->phyid,
PHY_ANLPAR, &phyreg))
return -1;
cap &= phyreg;
if (cap & PHY_ANLPAR_TXFD) {
ag->speed = SPEED_100;
ag->duplex = 1;
} else if (cap & PHY_ANLPAR_TX) {
ag->speed = SPEED_100;
ag->duplex = 0;
} else if (cap & PHY_ANLPAR_10FD) {
ag->speed = SPEED_10;
ag->duplex = 1;
} else {
ag->speed = SPEED_10;
ag->duplex = 0;
}
}
ag->link = 1;
return 0;
}
#endif
static int ag71xx_hw_start(struct eth_device *dev, bd_t * bd)
{
struct ag71xx *ag = (struct ag71xx *) dev->priv;
ag71xx_dma_reset(ag);
ag71xx_ring_rx_clean(ag);
ag71xx_ring_tx_init(ag);
ag71xx_wr(ag, AG71XX_REG_TX_DESC,
(u32) virt_to_phys(ag->tx_ring.descs_dma));
ag71xx_wr(ag, AG71XX_REG_RX_DESC,
(u32) virt_to_phys(ag->rx_ring.descs_dma));
ag71xx_hw_set_macaddr(ag, ag->dev->enetaddr);
if (ag->phyfixed) {
ag->link = 1;
ag->duplex = 1;
ag->speed = SPEED_1000;
} else {
#if (defined(CONFIG_MII) || defined(CONFIG_CMD_MII))
if (ag71xx_getMiiSpeed(ag))
return -1;
#else
/* only fixed, without mii */
return -1;
#endif
}
ag71xx_link_adjust(ag);
DBG("%s: txdesc reg: %#08x rxdesc reg: %#08x\n",
ag->dev->name,
ag71xx_rr(ag, AG71XX_REG_TX_DESC),
ag71xx_rr(ag, AG71XX_REG_RX_DESC));
/* start RX engine */
ag71xx_wr(ag, AG71XX_REG_RX_CTRL, RX_CTRL_RXE);
return 0;
}
#define FIFO_CFG0_INIT (FIFO_CFG0_ALL << FIFO_CFG0_ENABLE_SHIFT)
#define FIFO_CFG4_INIT (FIFO_CFG4_DE | FIFO_CFG4_DV | FIFO_CFG4_FC | \
FIFO_CFG4_CE | FIFO_CFG4_CR | FIFO_CFG4_LM | \
FIFO_CFG4_LO | FIFO_CFG4_OK | FIFO_CFG4_MC | \
FIFO_CFG4_BC | FIFO_CFG4_DR | FIFO_CFG4_LE | \
FIFO_CFG4_CF | FIFO_CFG4_PF | FIFO_CFG4_UO | \
FIFO_CFG4_VT)
#define FIFO_CFG5_INIT (FIFO_CFG5_DE | FIFO_CFG5_DV | FIFO_CFG5_FC | \
FIFO_CFG5_CE | FIFO_CFG5_LO | FIFO_CFG5_OK | \
FIFO_CFG5_MC | FIFO_CFG5_BC | FIFO_CFG5_DR | \
FIFO_CFG5_CF | FIFO_CFG5_PF | FIFO_CFG5_VT | \
FIFO_CFG5_LE | FIFO_CFG5_FT | FIFO_CFG5_16 | \
FIFO_CFG5_17 | FIFO_CFG5_SF)
static int ag71xx_hw_init(struct ag71xx *ag)
{
int ret = 0;
uint32_t reg;
uint32_t mask, mii_type;
if (ag->macNum == 0) {
mask = (RESET_MODULE_GE0_MAC | RESET_MODULE_GE0_PHY);
mii_type = 0x13;
} else {
mask = (RESET_MODULE_GE1_MAC | RESET_MODULE_GE1_PHY);
mii_type = 0x11;
}
// mac soft reset
ag71xx_sb(ag, AG71XX_REG_MAC_CFG1, MAC_CFG1_SR);
udelay(20);
// device stop
reg = ar71xx_reset_rr(AR91XX_RESET_REG_RESET_MODULE);
ar71xx_reset_wr(AR91XX_RESET_REG_RESET_MODULE, reg | mask);
udelay(100 * 1000);
// device start
reg = ar71xx_reset_rr(AR91XX_RESET_REG_RESET_MODULE);
ar71xx_reset_wr(AR91XX_RESET_REG_RESET_MODULE, reg & ~mask);
udelay(100 * 1000);
/* setup MAC configuration registers */
ag71xx_wr(ag, AG71XX_REG_MAC_CFG1, (MAC_CFG1_RXE | MAC_CFG1_TXE));
ag71xx_sb(ag, AG71XX_REG_MAC_CFG2,
MAC_CFG2_PAD_CRC_EN | MAC_CFG2_LEN_CHECK);
/* setup FIFO configuration register 0 */
ag71xx_wr(ag, AG71XX_REG_FIFO_CFG0, FIFO_CFG0_INIT);
/* setup MII interface type */
ag71xx_mii_ctrl_set_if(ag, ag->mii_if);
/* setup mdio clock divisor */
ag71xx_wr(ag, AG71XX_REG_MII_CFG, MII_CFG_CLK_DIV_20);
/* setup FIFO configuration registers */
ag71xx_sb(ag, AG71XX_REG_FIFO_CFG4, FIFO_CFG4_INIT);
ag71xx_wr(ag, AG71XX_REG_FIFO_CFG1, 0x0fff0000);
ag71xx_wr(ag, AG71XX_REG_FIFO_CFG2, 0x00001fff);
ag71xx_wr(ag, AG71XX_REG_FIFO_CFG5, FIFO_CFG5_INIT);
ag71xx_dma_reset(ag);
ret = ag71xx_rings_init(ag);
if (ret)
return -1;
ag71xx_wr(ag, AG71XX_REG_TX_DESC,
(u32) virt_to_phys(ag->tx_ring.descs_dma));
ag71xx_wr(ag, AG71XX_REG_RX_DESC,
(u32) virt_to_phys(ag->rx_ring.descs_dma));
ag71xx_hw_set_macaddr(ag, ag->dev->enetaddr);
return 0;
}
#if defined(CONFIG_MII) || defined(CONFIG_CMD_MII)
#define AG71XX_MDIO_RETRY 1000
#define AG71XX_MDIO_DELAY 5
static inline struct ag71xx *ag71xx_name2mac(char *devname)
{
if (strcmp(devname, agtable[0].dev->name) == 0)
return &agtable[0];
else if (strcmp(devname, agtable[1].dev->name) == 0)
return &agtable[1];
else
return NULL;
}
static inline void ag71xx_mdio_wr(struct ag71xx *ag, unsigned reg,
u32 value)
{
uint32_t r;
r = ag->mac_base + reg;
writel(value, r);
/* flush write */
(void) readl(r);
}
static inline u32 ag71xx_mdio_rr(struct ag71xx *ag, unsigned reg)
{
return readl(ag->mac_base + reg);
}
static int ag71xx_mdio_read(char *devname, unsigned char addr,
unsigned char reg, unsigned short *val)
{
struct ag71xx *ag = ag71xx_name2mac(devname);
uint16_t regData;
int i;
ag71xx_mdio_wr(ag, AG71XX_REG_MII_CMD, MII_CMD_WRITE);
ag71xx_mdio_wr(ag, AG71XX_REG_MII_ADDR,
((addr & 0xff) << MII_ADDR_SHIFT) | (reg & 0xff));
ag71xx_mdio_wr(ag, AG71XX_REG_MII_CMD, MII_CMD_READ);
i = AG71XX_MDIO_RETRY;
while (ag71xx_mdio_rr(ag, AG71XX_REG_MII_IND) & MII_IND_BUSY) {
if (i-- == 0) {
printf("%s: mii_read timed out\n",
ag->dev->name);
return -1;
}
udelay(AG71XX_MDIO_DELAY);
}
regData = (uint16_t) ag71xx_mdio_rr(ag, AG71XX_REG_MII_STATUS) & 0xffff;
ag71xx_mdio_wr(ag, AG71XX_REG_MII_CMD, MII_CMD_WRITE);
DBG("mii_read: addr=%04x, reg=%04x, value=%04x\n", addr, reg, regData);
if (val)
*val = regData;
return 0;
}
static int ag71xx_mdio_write(char *devname, unsigned char addr,
unsigned char reg, unsigned short val)
{
struct ag71xx *ag = ag71xx_name2mac(devname);
int i;
if (ag == NULL)
return 1;
DBG("mii_write: addr=%04x, reg=%04x, value=%04x\n", addr, reg, val);
ag71xx_mdio_wr(ag, AG71XX_REG_MII_ADDR,
((addr & 0xff) << MII_ADDR_SHIFT) | (reg & 0xff));
ag71xx_mdio_wr(ag, AG71XX_REG_MII_CTRL, val);
i = AG71XX_MDIO_RETRY;
while (ag71xx_mdio_rr(ag, AG71XX_REG_MII_IND) & MII_IND_BUSY) {
if (i-- == 0) {
printf("%s: mii_write timed out\n",
ag->dev->name);
break;
}
udelay(AG71XX_MDIO_DELAY);
}
return 0;
}
#endif
int ag71xx_register(bd_t * bis, char *phyname[], uint16_t phyid[], uint16_t phyfixed[])
{
int i, num = 0;
u8 used_ports[MAX_AG71XX_DEVS] = CONFIG_AG71XX_PORTS;
for (i = 0; i < MAX_AG71XX_DEVS; i++) {
/*skip if port is configured not to use */
if (used_ports[i] == 0)
continue;
agtable[i].dev = malloc(sizeof(struct eth_device));
if (agtable[i].dev == NULL) {
puts("malloc failed\n");
return 0;
}
memset(agtable[i].dev, 0, sizeof(struct eth_device));
sprintf(agtable[i].dev->name, "eth%d", i);
agtable[i].dev->iobase = 0;
agtable[i].dev->init = ag71xx_hw_start;
agtable[i].dev->halt = ag71xx_halt;
agtable[i].dev->send = ag71xx_send;
agtable[i].dev->recv = ag71xx_recv;
agtable[i].dev->priv = (void *) (&agtable[i]);
agtable[i].macNum = i;
eth_register(agtable[i].dev);
#if defined(CONFIG_MII) || defined(CONFIG_CMD_MII)
if ((phyname == NULL) || (phyid == NULL) || (phyfixed == NULL))
return -1;
agtable[i].phyname = strdup(phyname[i]);
agtable[i].phyid = phyid[i];
agtable[i].phyfixed = phyfixed[i];
miiphy_register(agtable[i].dev->name, ag71xx_mdio_read,
ag71xx_mdio_write);
#endif
if (ag71xx_hw_init(&agtable[i]))
continue;
num++;
}
return num;
}

374
package/boot/uboot-ar71xx/src/drivers/net/ag71xx.h
View File

@ -1,374 +0,0 @@
/*
* Atheros AR71xx built-in ethernet mac driver
*
* Copyright (C) 2008-2010 Gabor Juhos <juhosg@openwrt.org>
* Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
*
* Based on Atheros' AG7100 driver
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License version 2 as published
* by the Free Software Foundation.
*/
#ifndef __AG71XX_H
#define __AG71XX_H
#include <linux/types.h>
#include <linux/bitops.h>
#include <asm/ar71xx.h>
// controller has 2 ports
#define MAX_AG71XX_DEVS 2
#define ETH_FCS_LEN 4
#define SPEED_10 10
#define SPEED_100 100
#define SPEED_1000 1000
#define AG71XX_INT_ERR (AG71XX_INT_RX_BE | AG71XX_INT_TX_BE)
#define AG71XX_INT_TX (AG71XX_INT_TX_PS)
#define AG71XX_INT_RX (AG71XX_INT_RX_PR | AG71XX_INT_RX_OF)
#define AG71XX_INT_POLL (AG71XX_INT_RX | AG71XX_INT_TX)
#define AG71XX_INT_INIT (AG71XX_INT_ERR | AG71XX_INT_POLL)
#define AG71XX_TX_FIFO_LEN 2048
#define AG71XX_TX_MTU_LEN 1536
#define AG71XX_RX_PKT_RESERVE 64
#define AG71XX_RX_PKT_SIZE \
(AG71XX_RX_PKT_RESERVE + ETH_HLEN + ETH_FRAME_LEN + ETH_FCS_LEN)
#ifndef CONFIG_SYS_RX_ETH_BUFFER
#define AG71XX_TX_RING_SIZE 4
#define AG71XX_RX_RING_SIZE 4
#else
#define AG71XX_TX_RING_SIZE CONFIG_SYS_RX_ETH_BUFFER
#define AG71XX_RX_RING_SIZE CONFIG_SYS_RX_ETH_BUFFER
#endif
#define AG71XX_TX_THRES_STOP (AG71XX_TX_RING_SIZE - 4)
#define AG71XX_TX_THRES_WAKEUP \
(AG71XX_TX_RING_SIZE - (AG71XX_TX_RING_SIZE / 4))
struct ag71xx_desc {
u32 data;
u32 ctrl;
#define DESC_EMPTY BIT(31)
#define DESC_MORE BIT(24)
#define DESC_PKTLEN_M 0xfff
u32 next;
u32 pad;
} __attribute__((aligned(4)));
struct ag71xx_buf {
struct sk_buff *skb;
struct ag71xx_desc *desc;
dma_addr_t dma_addr;
u32 pad;
};
struct ag71xx_ring {
struct ag71xx_buf *buf;
u8 *descs_cpu;
u8 *descs_dma;
unsigned int desc_size;
unsigned int curr;
unsigned int size;
};
struct ag71xx {
uint32_t mac_base;
uint32_t mii_ctrl;
struct eth_device *dev;
struct ag71xx_ring rx_ring;
struct ag71xx_ring tx_ring;
char *phyname;
u16 phyid;
u16 phyfixed;
uint32_t link;
uint32_t speed;
int32_t duplex;
uint32_t macNum;
uint32_t mii_if;
};
void ag71xx_link_adjust(struct ag71xx *ag);
int ag71xx_phy_connect(struct ag71xx *ag);
void ag71xx_phy_disconnect(struct ag71xx *ag);
void ag71xx_phy_start(struct ag71xx *ag);
void ag71xx_phy_stop(struct ag71xx *ag);
static inline int ag71xx_desc_empty(struct ag71xx_desc *desc)
{
return ((desc->ctrl & DESC_EMPTY) != 0);
}
static inline int ag71xx_desc_pktlen(struct ag71xx_desc *desc)
{
return (desc->ctrl & DESC_PKTLEN_M);
}
/* Register offsets */
#define AG71XX_REG_MAC_CFG1 0x0000
#define AG71XX_REG_MAC_CFG2 0x0004
#define AG71XX_REG_MAC_IPG 0x0008
#define AG71XX_REG_MAC_HDX 0x000c
#define AG71XX_REG_MAC_MFL 0x0010
#define AG71XX_REG_MII_CFG 0x0020
#define AG71XX_REG_MII_CMD 0x0024
#define AG71XX_REG_MII_ADDR 0x0028
#define AG71XX_REG_MII_CTRL 0x002c
#define AG71XX_REG_MII_STATUS 0x0030
#define AG71XX_REG_MII_IND 0x0034
#define AG71XX_REG_MAC_IFCTL 0x0038
#define AG71XX_REG_MAC_ADDR1 0x0040
#define AG71XX_REG_MAC_ADDR2 0x0044
#define AG71XX_REG_FIFO_CFG0 0x0048
#define AG71XX_REG_FIFO_CFG1 0x004c
#define AG71XX_REG_FIFO_CFG2 0x0050
#define AG71XX_REG_FIFO_CFG3 0x0054
#define AG71XX_REG_FIFO_CFG4 0x0058
#define AG71XX_REG_FIFO_CFG5 0x005c
#define AG71XX_REG_FIFO_RAM0 0x0060
#define AG71XX_REG_FIFO_RAM1 0x0064
#define AG71XX_REG_FIFO_RAM2 0x0068
#define AG71XX_REG_FIFO_RAM3 0x006c
#define AG71XX_REG_FIFO_RAM4 0x0070
#define AG71XX_REG_FIFO_RAM5 0x0074
#define AG71XX_REG_FIFO_RAM6 0x0078
#define AG71XX_REG_FIFO_RAM7 0x007c
#define AG71XX_REG_TX_CTRL 0x0180
#define AG71XX_REG_TX_DESC 0x0184
#define AG71XX_REG_TX_STATUS 0x0188
#define AG71XX_REG_RX_CTRL 0x018c
#define AG71XX_REG_RX_DESC 0x0190
#define AG71XX_REG_RX_STATUS 0x0194
#define AG71XX_REG_INT_ENABLE 0x0198
#define AG71XX_REG_INT_STATUS 0x019c
#define MAC_CFG1_TXE BIT(0) /* Tx Enable */
#define MAC_CFG1_STX BIT(1) /* Synchronize Tx Enable */
#define MAC_CFG1_RXE BIT(2) /* Rx Enable */
#define MAC_CFG1_SRX BIT(3) /* Synchronize Rx Enable */
#define MAC_CFG1_TFC BIT(4) /* Tx Flow Control Enable */
#define MAC_CFG1_RFC BIT(5) /* Rx Flow Control Enable */
#define MAC_CFG1_LB BIT(8) /* Loopback mode */
#define MAC_CFG1_SR BIT(31) /* Soft Reset */
#define MAC_CFG2_FDX BIT(0)
#define MAC_CFG2_CRC_EN BIT(1)
#define MAC_CFG2_PAD_CRC_EN BIT(2)
#define MAC_CFG2_LEN_CHECK BIT(4)
#define MAC_CFG2_HUGE_FRAME_EN BIT(5)
#define MAC_CFG2_IF_1000 BIT(9)
#define MAC_CFG2_IF_10_100 BIT(8)
#define FIFO_CFG0_WTM BIT(0) /* Watermark Module */
#define FIFO_CFG0_RXS BIT(1) /* Rx System Module */
#define FIFO_CFG0_RXF BIT(2) /* Rx Fabric Module */
#define FIFO_CFG0_TXS BIT(3) /* Tx System Module */
#define FIFO_CFG0_TXF BIT(4) /* Tx Fabric Module */
#define FIFO_CFG0_ALL (FIFO_CFG0_WTM | FIFO_CFG0_RXS | FIFO_CFG0_RXF \
| FIFO_CFG0_TXS | FIFO_CFG0_TXF)
#define FIFO_CFG0_ENABLE_SHIFT 8
#define FIFO_CFG4_DE BIT(0) /* Drop Event */
#define FIFO_CFG4_DV BIT(1) /* RX_DV Event */
#define FIFO_CFG4_FC BIT(2) /* False Carrier */
#define FIFO_CFG4_CE BIT(3) /* Code Error */
#define FIFO_CFG4_CR BIT(4) /* CRC error */
#define FIFO_CFG4_LM BIT(5) /* Length Mismatch */
#define FIFO_CFG4_LO BIT(6) /* Length out of range */
#define FIFO_CFG4_OK BIT(7) /* Packet is OK */
#define FIFO_CFG4_MC BIT(8) /* Multicast Packet */
#define FIFO_CFG4_BC BIT(9) /* Broadcast Packet */
#define FIFO_CFG4_DR BIT(10) /* Dribble */
#define FIFO_CFG4_LE BIT(11) /* Long Event */
#define FIFO_CFG4_CF BIT(12) /* Control Frame */
#define FIFO_CFG4_PF BIT(13) /* Pause Frame */
#define FIFO_CFG4_UO BIT(14) /* Unsupported Opcode */
#define FIFO_CFG4_VT BIT(15) /* VLAN tag detected */
#define FIFO_CFG4_FT BIT(16) /* Frame Truncated */
#define FIFO_CFG4_UC BIT(17) /* Unicast Packet */
#define FIFO_CFG5_DE BIT(0) /* Drop Event */
#define FIFO_CFG5_DV BIT(1) /* RX_DV Event */
#define FIFO_CFG5_FC BIT(2) /* False Carrier */
#define FIFO_CFG5_CE BIT(3) /* Code Error */
#define FIFO_CFG5_LM BIT(4) /* Length Mismatch */
#define FIFO_CFG5_LO BIT(5) /* Length Out of Range */
#define FIFO_CFG5_OK BIT(6) /* Packet is OK */
#define FIFO_CFG5_MC BIT(7) /* Multicast Packet */
#define FIFO_CFG5_BC BIT(8) /* Broadcast Packet */
#define FIFO_CFG5_DR BIT(9) /* Dribble */
#define FIFO_CFG5_CF BIT(10) /* Control Frame */
#define FIFO_CFG5_PF BIT(11) /* Pause Frame */
#define FIFO_CFG5_UO BIT(12) /* Unsupported Opcode */
#define FIFO_CFG5_VT BIT(13) /* VLAN tag detected */
#define FIFO_CFG5_LE BIT(14) /* Long Event */
#define FIFO_CFG5_FT BIT(15) /* Frame Truncated */
#define FIFO_CFG5_16 BIT(16) /* unknown */
#define FIFO_CFG5_17 BIT(17) /* unknown */
#define FIFO_CFG5_SF BIT(18) /* Short Frame */
#define FIFO_CFG5_BM BIT(19) /* Byte Mode */
#define AG71XX_INT_TX_PS BIT(0)
#define AG71XX_INT_TX_UR BIT(1)
#define AG71XX_INT_TX_BE BIT(3)
#define AG71XX_INT_RX_PR BIT(4)
#define AG71XX_INT_RX_OF BIT(6)
#define AG71XX_INT_RX_BE BIT(7)
#define MAC_IFCTL_SPEED BIT(16)
#define MII_CFG_CLK_DIV_4 0
#define MII_CFG_CLK_DIV_6 2
#define MII_CFG_CLK_DIV_8 3
#define MII_CFG_CLK_DIV_10 4
#define MII_CFG_CLK_DIV_14 5
#define MII_CFG_CLK_DIV_20 6
#define MII_CFG_CLK_DIV_28 7
#define MII_CFG_RESET BIT(31)
#define MII_CMD_WRITE 0x0
#define MII_CMD_READ 0x1
#define MII_ADDR_SHIFT 8
#define MII_IND_BUSY BIT(0)
#define MII_IND_INVALID BIT(2)
#define TX_CTRL_TXE BIT(0) /* Tx Enable */
#define TX_STATUS_PS BIT(0) /* Packet Sent */
#define TX_STATUS_UR BIT(1) /* Tx Underrun */
#define TX_STATUS_BE BIT(3) /* Bus Error */
#define RX_CTRL_RXE BIT(0) /* Rx Enable */
#define RX_STATUS_PR BIT(0) /* Packet Received */
#define RX_STATUS_OF BIT(2) /* Rx Overflow */
#define RX_STATUS_BE BIT(3) /* Bus Error */
#define MII_CTRL_IF_MASK 3
#define MII_CTRL_SPEED_SHIFT 4
#define MII_CTRL_SPEED_MASK 3
#define MII_CTRL_SPEED_10 0
#define MII_CTRL_SPEED_100 1
#define MII_CTRL_SPEED_1000 2
static inline void ag71xx_wr(struct ag71xx *ag, unsigned reg, u32 value)
{
__raw_writel(value, ag->mac_base + reg);
/* flush write */
(void) __raw_readl(ag->mac_base + reg);
}
static inline u32 ag71xx_rr(struct ag71xx *ag, unsigned reg)
{
return __raw_readl(ag->mac_base + reg);
}
static inline void ag71xx_sb(struct ag71xx *ag, unsigned reg, u32 mask)
{
uint32_t r;
r = ag->mac_base + reg;
__raw_writel(__raw_readl(r) | mask, r);
/* flush write */
(void)__raw_readl(r);
}
static inline void ag71xx_cb(struct ag71xx *ag, unsigned reg, u32 mask)
{
uint32_t r;
r = ag->mac_base + reg;
__raw_writel(__raw_readl(r) & ~mask, r);
/* flush write */
(void) __raw_readl(r);
}
static inline void ag71xx_int_enable(struct ag71xx *ag, u32 ints)
{
ag71xx_sb(ag, AG71XX_REG_INT_ENABLE, ints);
}
static inline void ag71xx_int_disable(struct ag71xx *ag, u32 ints)
{
ag71xx_cb(ag, AG71XX_REG_INT_ENABLE, ints);
}
static inline void ag71xx_mii_ctrl_wr(struct ag71xx *ag, u32 value)
{
__raw_writel(value, ag->mii_ctrl);
/* flush write */
__raw_readl(ag->mii_ctrl);
}
static inline u32 ag71xx_mii_ctrl_rr(struct ag71xx *ag)
{
return __raw_readl(ag->mii_ctrl);
}
static void inline ag71xx_mii_ctrl_set_if(struct ag71xx *ag,
unsigned int mii_if)
{
u32 t;
t = ag71xx_mii_ctrl_rr(ag);
t &= ~(MII_CTRL_IF_MASK);
t |= (mii_if & MII_CTRL_IF_MASK);
ag71xx_mii_ctrl_wr(ag, t);
}
static void inline ag71xx_mii_ctrl_set_speed(struct ag71xx *ag,
unsigned int speed)
{
u32 t;
t = ag71xx_mii_ctrl_rr(ag);
t &= ~(MII_CTRL_SPEED_MASK << MII_CTRL_SPEED_SHIFT);
t |= (speed & MII_CTRL_SPEED_MASK) << MII_CTRL_SPEED_SHIFT;
ag71xx_mii_ctrl_wr(ag, t);
}
#ifdef CONFIG_AG71XX_AR8216_SUPPORT
void ag71xx_add_ar8216_header(struct ag71xx *ag, struct sk_buff *skb);
int ag71xx_remove_ar8216_header(struct ag71xx *ag, struct sk_buff *skb,
int pktlen);
static inline int ag71xx_has_ar8216(struct ag71xx *ag)
{
return ag71xx_get_pdata(ag)->has_ar8216;
}
#else
static inline void ag71xx_add_ar8216_header(struct ag71xx *ag,
struct sk_buff *skb)
{
}
static inline int ag71xx_remove_ar8216_header(struct ag71xx *ag,
struct sk_buff *skb,
int pktlen)
{
return 0;
}
static inline int ag71xx_has_ar8216(struct ag71xx *ag)
{
return 0;
}
#endif
#endif /* _AG71XX_H */

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package/boot/uboot-ar71xx/src/drivers/net/phy/rtl8366.h
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@ -1,188 +0,0 @@
/*
* (C) Copyright 2010
* Michael Kurz <michi.kurz@googlemail.com>.
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#ifndef RTL8366_MII_H
#define RTL8366_MII_H
#define MII_CONTROL_REG 0
#define MII_STATUS_REG 1
#define MII_PHY_ID0 2
#define MII_PHY_ID1 3
#define MII_LOCAL_CAP 4
#define MII_REMOTE_CAP 5
#define MII_EXT_AUTONEG 6
#define MII_LOCAL_NEXT_PAGE 7
#define MII_REMOTE_NEXT_PAGE 8
#define MII_GIGA_CONTROL 9
#define MII_GIGA_STATUS 10
#define MII_EXT_STATUS_REG 15
/* Control register */
#define MII_CONTROL_1000MBPS 6
#define MII_CONTROL_COLL_TEST 7
#define MII_CONTROL_FULLDUPLEX 8
#define MII_CONTROL_RENEG 9
#define MII_CONTROL_ISOLATE 10
#define MII_CONTROL_POWERDOWN 11
#define MII_CONTROL_AUTONEG 12
#define MII_CONTROL_100MBPS 13
#define MII_CONTROL_LOOPBACK 14
#define MII_CONTROL_RESET 15
/* Status/Extended status register */
/* Basic status */
#define MII_STATUS_CAPABILITY 0
#define MII_STATUS_JABBER 1
#define MII_STATUS_LINK_UP 2
#define MII_STATUS_AUTONEG_ABLE 3
#define MII_STATUS_REMOTE_FAULT 4
#define MII_STATUS_AUTONEG_DONE 5
#define MII_STATUS_NO_PREAMBLE 6
#define MII_STATUS_RESERVED 7
#define MII_STATUS_EXTENDED 8
#define MII_STATUS_100_T2_HALF 9
#define MII_STATUS_100_T2_FULL 10
#define MII_STATUS_10_TX_HALF 11
#define MII_STATUS_10_TX_FULL 12
#define MII_STATUS_100_TX_HALF 13
#define MII_STATUS_100_TX_FULL 14
#define MII_STATUS_100_T4 15
#define MII_GIGA_CONTROL_HALF 8
#define MII_GIGA_CONTROL_FULL 9
#define MII_GIGA_STATUS_HALF 10
#define MII_GIGA_STATUS_FULL 11
/* Extended status */
#define MII_STATUS_1000_T_HALF 12
#define MII_STATUS_1000_T_FULL 13
#define MII_STATUS_1000_X_HALF 14
#define MII_STATUS_1000_X_FULL 15
/* Local/Remmote capability register */
#define MII_CAP_10BASE_TX 5
#define MII_CAP_10BASE_TX_FULL 6
#define MII_CAP_100BASE_TX 7
#define MII_CAP_100BASE_TX_FULL 8
#define MII_CAP_100BASE_T4 9
#define MII_CAP_SYMM_PAUSE 10
#define MII_CAP_ASYMM_PAUSE 11
#define MII_CAP_RESERVED 12
#define MII_CAP_REMOTE_FAULT 13
#define MII_CAP_ACKNOWLEDGE 14
#define MII_CAP_NEXT_PAGE 15
#define MII_CAP_IEEE_802_3 0x0001
#define MII_LINK_MODE_MASK 0x1f
#define REALTEK_RTL8366_CHIP_ID0 0x001C
#define REALTEK_RTL8366_CHIP_ID1 0xC940
#define REALTEK_RTL8366_CHIP_ID1_MP 0xC960
#define REALTEK_MIN_PORT_ID 0
#define REALTEK_MAX_PORT_ID 5
#define REALTEK_MIN_PHY_ID REALTEK_MIN_PORT_ID
#define REALTEK_MAX_PHY_ID 4
#define REALTEK_CPU_PORT_ID REALTEK_MAX_PORT_ID
#define REALTEK_PHY_PORT_MASK ((1<<(REALTEK_MAX_PHY_ID+1)) - (1<<REALTEK_MIN_PHY_ID))
#define REALTEK_CPU_PORT_MASK (1<<REALTEK_CPU_PORT_ID)
#define REALTEK_ALL_PORT_MASK (REALTEK_PHY_PORT_MASK | REALTEK_CPU_PORT_MASK)
/* port ability */
#define RTL8366S_PORT_ABILITY_BASE 0x0011
/* port vlan control register */
#define RTL8366S_PORT_VLAN_CTRL_BASE 0x0058
/* port linking status */
#define RTL8366S_PORT_LINK_STATUS_BASE 0x0060
#define RTL8366S_PORT_STATUS_SPEED_BIT 0
#define RTL8366S_PORT_STATUS_SPEED_MSK 0x0003
#define RTL8366S_PORT_STATUS_DUPLEX_BIT 2
#define RTL8366S_PORT_STATUS_DUPLEX_MSK 0x0004
#define RTL8366S_PORT_STATUS_LINK_BIT 4
#define RTL8366S_PORT_STATUS_LINK_MSK 0x0010
#define RTL8366S_PORT_STATUS_TXPAUSE_BIT 5
#define RTL8366S_PORT_STATUS_TXPAUSE_MSK 0x0020
#define RTL8366S_PORT_STATUS_RXPAUSE_BIT 6
#define RTL8366S_PORT_STATUS_RXPAUSE_MSK 0x0040
#define RTL8366S_PORT_STATUS_AN_BIT 7
#define RTL8366S_PORT_STATUS_AN_MSK 0x0080
/* internal control */
#define RTL8366S_RESET_CONTROL_REG 0x0100
#define RTL8366S_RESET_QUEUE_BIT 2
#define RTL8366S_CHIP_ID_REG 0x0105
/* MAC control */
#define RTL8366S_MAC_FORCE_CTRL0_REG 0x0F04
#define RTL8366S_MAC_FORCE_CTRL1_REG 0x0F05
/* PHY registers control */
#define RTL8366S_PHY_ACCESS_CTRL_REG 0x8028
#define RTL8366S_PHY_ACCESS_DATA_REG 0x8029
#define RTL8366S_PHY_CTRL_READ 1
#define RTL8366S_PHY_CTRL_WRITE 0
#define RTL8366S_PHY_REG_MASK 0x1F
#define RTL8366S_PHY_PAGE_OFFSET 5
#define RTL8366S_PHY_PAGE_MASK (0x7<<5)
#define RTL8366S_PHY_NO_OFFSET 9
#define RTL8366S_PHY_NO_MASK (0x1F<<9)
#define RTL8366S_PHY_NO_MAX 4
#define RTL8366S_PHY_PAGE_MAX 7
#define RTL8366S_PHY_ADDR_MAX 31
/* cpu port control reg */
#define RTL8366S_CPU_CTRL_REG 0x004F
#define RTL8366S_CPU_DRP_BIT 14
#define RTL8366S_CPU_DRP_MSK 0x4000
#define RTL8366S_CPU_INSTAG_BIT 15
#define RTL8366S_CPU_INSTAG_MSK 0x8000
/* LED registers*/
#define RTL8366S_LED_BLINK_REG 0x420
#define RTL8366S_LED_BLINKRATE_BIT 0
#define RTL8366S_LED_BLINKRATE_MSK 0x0007
#define RTL8366S_LED_INDICATED_CONF_REG 0x421
#define RTL8366S_LED_0_1_FORCE_REG 0x422
#define RTL8366S_LED_2_3_FORCE_REG 0x423
#define RTL8366S_LEDCONF_LEDFORCE 0x1F
#define RTL8366S_LED_GROUP_MAX 4
#define RTL8366S_GREEN_FEATURE_REG 0x000A
#define RTL8366S_GREEN_FEATURE_TX_BIT 3
#define RTL8366S_GREEN_FEATURE_TX_MSK 0x0008
#define RTL8366S_GREEN_FEATURE_RX_BIT 4
#define RTL8366S_GREEN_FEATURE_RX_MSK 0x0010
#define RTL8366S_MODEL_ID_REG 0x5C
#define RTL8366S_REV_ID_REG 0x5D
#define RTL8366S_MODEL_8366SR 0x6027
#define RTL8366S_MODEL_8366RB 0x5937
#endif

786
package/boot/uboot-ar71xx/src/drivers/net/phy/rtl8366_mii.c
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/*
* (C) Copyright 2010
* Michael Kurz <michi.kurz@googlemail.com>.
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#include <common.h>
#include <net.h>
#include <netdev.h>
#include <miiphy.h>
#include MII_GPIOINCLUDE
#include "rtl8366.h"
#ifdef DEBUG_RTL8366
#define DBG(fmt,args...) printf (fmt ,##args)
#else
#define DBG(fmt,args...)
#endif
//-------------------------------------------------------------------
// Soft SMI functions
//-------------------------------------------------------------------
#define DELAY 2
static void smi_init(void)
{
MII_SDAINPUT;
MII_SCKINPUT;
MII_SETSDA(1);
MII_SETSCK(1);
udelay(20);
}
static void smi_start(void)
{
/*
* rtl8366 chip needs a extra clock with
* SDA high before start condition
*/
/* set gpio pins output */
MII_SDAOUTPUT;
MII_SCKOUTPUT;
udelay(DELAY);
/* set initial state: SCK:0, SDA:1 */
MII_SETSCK(0);
MII_SETSDA(1);
udelay(DELAY);
/* toggle clock */
MII_SETSCK(1);
udelay(DELAY);
MII_SETSCK(0);
udelay(DELAY);
/* start condition */
MII_SETSCK(1);
udelay(DELAY);
MII_SETSDA(0);
udelay(DELAY);
MII_SETSCK(0);
udelay(DELAY);
MII_SETSDA(1);
}
static void smi_stop(void)
{
/*
* rtl8366 chip needs a extra clock with
* SDA high after stop condition
*/
/* stop condition */
udelay(DELAY);
MII_SETSDA(0);
MII_SETSCK(1);
udelay(DELAY);
MII_SETSDA(1);
udelay(DELAY);
MII_SETSCK(1);
udelay(DELAY);
MII_SETSCK(0);
udelay(DELAY);
/* toggle clock */
MII_SETSCK(1);
udelay(DELAY);
MII_SETSCK(0);
udelay(DELAY);
MII_SETSCK(1);
/* set gpio pins input */
MII_SDAINPUT;
MII_SCKINPUT;
}
static void smi_writeBits(uint32_t data, uint8_t length)
{
uint8_t test;
for( ; length > 0; length--) {
udelay(DELAY);
/* output data */
test = (((data & (1 << (length - 1))) != 0) ? 1 : 0);
MII_SETSDA(test);
udelay(DELAY);
/* toogle clock */
MII_SETSCK(1);
udelay(DELAY);
MII_SETSCK(0);
}
}
static uint32_t smi_readBits(uint8_t length)
{
uint32_t ret;
MII_SDAINPUT;
for(ret = 0 ; length > 0; length--) {
udelay(DELAY);
ret <<= 1;
/* toogle clock */
MII_SETSCK(1);
udelay(DELAY);
ret |= MII_GETSDA;
MII_SETSCK(0);
}
MII_SDAOUTPUT;
return ret;
}
static int smi_waitAck(void)
{
uint32_t retry = 0;
while (smi_readBits(1)) {
if (retry++ == 5)
return -1;
}
return 0;
}
static int smi_read(uint32_t reg, uint32_t *data)
{
uint32_t rawData;
/* send start condition */
smi_start();
/* send CTRL1 code: 0b1010*/
smi_writeBits(0x0a, 4);
/* send CTRL2 code: 0b100 */
smi_writeBits(0x04, 3);
/* send READ command */
smi_writeBits(0x01, 1);
/* wait for ACK */
if (smi_waitAck())
return -1;
/* send address low */
smi_writeBits(reg & 0xFF, 8);
/* wait for ACK */
if (smi_waitAck())
return -1;
/* send address high */
smi_writeBits((reg & 0xFF00) >> 8, 8);
/* wait for ACK */
if (smi_waitAck())
return -1;
/* read data low */
rawData = (smi_readBits(8) & 0xFF);
/* send ACK */
smi_writeBits(0, 1);
/* read data high */
rawData |= (smi_readBits(8) & 0xFF) << 8;
/* send NACK */
smi_writeBits(1, 1);
/* send stop condition */
smi_stop();
if (data)
*data = rawData;
return 0;
}
static int smi_write(uint32_t reg, uint32_t data)
{
/* send start condition */
smi_start();
/* send CTRL1 code: 0b1010*/
smi_writeBits(0x0a, 4);
/* send CTRL2 code: 0b100 */
smi_writeBits(0x04, 3);
/* send WRITE command */
smi_writeBits(0x00, 1);
/* wait for ACK */
if (smi_waitAck())
return -1;
/* send address low */
smi_writeBits(reg & 0xFF, 8);
/* wait for ACK */
if (smi_waitAck())
return -1;
/* send address high */
smi_writeBits((reg & 0xFF00) >> 8, 8);
/* wait for ACK */
if (smi_waitAck())
return -1;
/* send data low */
smi_writeBits(data & 0xFF, 8);
/* wait for ACK */
if (smi_waitAck())
return -1;
/* send data high */
smi_writeBits((data & 0xFF00) >> 8, 8);
/* wait for ACK */
if (smi_waitAck())
return -1;
/* send stop condition */
smi_stop();
return 0;
}
//-------------------------------------------------------------------
// Switch register read / write functions
//-------------------------------------------------------------------
static int rtl8366_readRegister(uint32_t reg, uint16_t *data)
{
uint32_t regData;
DBG("rtl8366: read register=%#04x, data=", reg);
if (smi_read(reg, &regData)) {
printf("\nrtl8366 smi read failed!\n");
return -1;
}
if (data)
*data = regData;
DBG("%#04x\n", regData);
return 0;
}
static int rtl8366_writeRegister(uint32_t reg, uint16_t data)
{
DBG("rtl8366: write register=%#04x, data=%#04x\n", reg, data);
if (smi_write(reg, data)) {
printf("rtl8366 smi write failed!\n");
return -1;
}
return 0;
}
static int rtl8366_setRegisterBit(uint32_t reg, uint32_t bitNum, uint32_t value)
{
uint16_t regData;
if (bitNum >= 16)
return -1;
if (rtl8366_readRegister(reg, &regData))
return -1;
if (value)
regData |= (1 << bitNum);
else
regData &= ~(1 << bitNum);
if (rtl8366_writeRegister(reg, regData))
return -1;
return 0;
}
//-------------------------------------------------------------------
// MII PHY read / write functions
//-------------------------------------------------------------------
static int rtl8366_getPhyReg(uint32_t phyNum, uint32_t reg, uint16_t *data)
{
uint16_t phyAddr, regData;
if (phyNum > RTL8366S_PHY_NO_MAX) {
printf("rtl8366s: invalid phy number!\n");
return -1;
}
if (phyNum > RTL8366S_PHY_ADDR_MAX) {
printf("rtl8366s: invalid phy register number!\n");
return -1;
}
if (rtl8366_writeRegister(RTL8366S_PHY_ACCESS_CTRL_REG,
RTL8366S_PHY_CTRL_READ))
return -1;
phyAddr = 0x8000 | (1 << (phyNum + RTL8366S_PHY_NO_OFFSET))
| (reg & RTL8366S_PHY_REG_MASK);
if (rtl8366_writeRegister(phyAddr, 0))
return -1;
if (rtl8366_readRegister(RTL8366S_PHY_ACCESS_DATA_REG, &regData))
return -1;
if (data)
*data = regData;
return 0;
}
static int rtl8366_setPhyReg(uint32_t phyNum, uint32_t reg, uint16_t data)
{
uint16_t phyAddr;
if (phyNum > RTL8366S_PHY_NO_MAX) {
printf("rtl8366s: invalid phy number!\n");
return -1;
}
if (phyNum > RTL8366S_PHY_ADDR_MAX) {
printf("rtl8366s: invalid phy register number!\n");
return -1;
}
if (rtl8366_writeRegister(RTL8366S_PHY_ACCESS_CTRL_REG,
RTL8366S_PHY_CTRL_WRITE))
return -1;
phyAddr = 0x8000 | (1 << (phyNum + RTL8366S_PHY_NO_OFFSET))
| (reg & RTL8366S_PHY_REG_MASK);
if (rtl8366_writeRegister(phyAddr, data))
return -1;
return 0;
}
static int rtl8366_miiread(char *devname, uchar phy_adr, uchar reg, ushort *data)
{
uint16_t regData;
DBG("rtl8366_miiread: devname=%s, addr=%#02x, reg=%#02x\n",
devname, phy_adr, reg);
if (strcmp(devname, RTL8366_DEVNAME) != 0)
return -1;
if (rtl8366_getPhyReg(phy_adr, reg, &regData)) {
printf("rtl8366_miiread: write failed!\n");
return -1;
}
if (data)
*data = regData;
return 0;
}
static int rtl8366_miiwrite(char *devname, uchar phy_adr, uchar reg, ushort data)
{
DBG("rtl8366_miiwrite: devname=%s, addr=%#02x, reg=%#02x, data=%#04x\n",
devname, phy_adr, reg, data);
if (strcmp(devname, RTL8366_DEVNAME) != 0)
return -1;
if (rtl8366_setPhyReg(phy_adr, reg, data)) {
printf("rtl8366_miiwrite: write failed!\n");
return -1;
}
return 0;
}
int rtl8366_mii_register(bd_t *bis)
{
miiphy_register(strdup(RTL8366_DEVNAME), rtl8366_miiread,
rtl8366_miiwrite);
return 0;
}
//-------------------------------------------------------------------
// Switch management functions
//-------------------------------------------------------------------
int rtl8366s_setGreenFeature(uint32_t tx, uint32_t rx)
{
if (rtl8366_setRegisterBit(RTL8366S_GREEN_FEATURE_REG,
RTL8366S_GREEN_FEATURE_TX_BIT, tx))
return -1;
if (rtl8366_setRegisterBit(RTL8366S_GREEN_FEATURE_REG,
RTL8366S_GREEN_FEATURE_RX_BIT, rx))
return -1;
return 0;
}
int rtl8366s_setPowerSaving(uint32_t phyNum, uint32_t enabled)
{
uint16_t regData;
if (phyNum > RTL8366S_PHY_NO_MAX)
return -1;
if (rtl8366_getPhyReg(phyNum, 12, &regData))
return -1;
if (enabled)
regData |= (1 << 12);
else
regData &= ~(1 << 12);
if (rtl8366_setPhyReg(phyNum, 12, regData))
return -1;
return 0;
}
int rtl8366s_setGreenEthernet(uint32_t greenFeature, uint32_t powerSaving)
{
uint32_t phyNum, i;
uint16_t regData;
const uint16_t greenSettings[][2] =
{
{0xBE5B,0x3500},
{0xBE5C,0xB975},
{0xBE5D,0xB9B9},
{0xBE77,0xA500},
{0xBE78,0x5A78},
{0xBE79,0x6478}
};
if (rtl8366_readRegister(RTL8366S_MODEL_ID_REG, &regData))
return -1;
switch (regData)
{
case 0x0000:
for (i = 0; i < 6; i++) {
if (rtl8366_writeRegister(RTL8366S_PHY_ACCESS_CTRL_REG, RTL8366S_PHY_CTRL_WRITE))
return -1;
if (rtl8366_writeRegister(greenSettings[i][0], greenSettings[i][1]))
return -1;
}
break;
case RTL8366S_MODEL_8366SR:
if (rtl8366_writeRegister(RTL8366S_PHY_ACCESS_CTRL_REG, RTL8366S_PHY_CTRL_WRITE))
return -1;
if (rtl8366_writeRegister(greenSettings[0][0], greenSettings[0][1]))
return -1;
break;
default:
printf("rtl8366s_initChip: unsupported chip found!\n");
return -1;
}
if (rtl8366s_setGreenFeature(greenFeature, powerSaving))
return -1;
for (phyNum = 0; phyNum <= RTL8366S_PHY_NO_MAX; phyNum++) {
if (rtl8366s_setPowerSaving(phyNum, powerSaving))
return -1;
}
return 0;
}
int rtl8366s_setCPUPortMask(uint8_t port, uint32_t enabled)
{
if(port >= 6){
printf("rtl8366s_setCPUPortMask: invalid port number\n");
return -1;
}
return rtl8366_setRegisterBit(RTL8366S_CPU_CTRL_REG, port, enabled);
}
int rtl8366s_setCPUDisableInsTag(uint32_t enable)
{
return rtl8366_setRegisterBit(RTL8366S_CPU_CTRL_REG,
RTL8366S_CPU_INSTAG_BIT, enable);
}
int rtl8366s_setCPUDropUnda(uint32_t enable)
{
return rtl8366_setRegisterBit(RTL8366S_CPU_CTRL_REG,
RTL8366S_CPU_DRP_BIT, enable);
}
int rtl8366s_setCPUPort(uint8_t port, uint32_t noTag, uint32_t dropUnda)
{
uint32_t i;
if(port >= 6){
printf("rtl8366s_setCPUPort: invalid port number\n");
return -1;
}
/* reset register */
for(i = 0; i < 6; i++)
{
if(rtl8366s_setCPUPortMask(i, 0)){
printf("rtl8366s_setCPUPort: rtl8366s_setCPUPortMask failed\n");
return -1;
}
}
if(rtl8366s_setCPUPortMask(port, 1)){
printf("rtl8366s_setCPUPort: rtl8366s_setCPUPortMask failed\n");
return -1;
}
if(rtl8366s_setCPUDisableInsTag(noTag)){
printf("rtl8366s_setCPUPort: rtl8366s_setCPUDisableInsTag fail\n");
return -1;
}
if(rtl8366s_setCPUDropUnda(dropUnda)){
printf("rtl8366s_setCPUPort: rtl8366s_setCPUDropUnda fail\n");
return -1;
}
return 0;
}
int rtl8366s_setLedConfig(uint32_t ledNum, uint8_t config)
{
uint16_t regData;
if(ledNum >= RTL8366S_LED_GROUP_MAX) {
DBG("rtl8366s_setLedConfig: invalid led group\n");
return -1;
}
if(config > RTL8366S_LEDCONF_LEDFORCE) {
DBG("rtl8366s_setLedConfig: invalid led config\n");
return -1;
}
if (rtl8366_readRegister(RTL8366S_LED_INDICATED_CONF_REG, &regData)) {
printf("rtl8366s_setLedConfig: failed to get led register!\n");
return -1;
}
regData &= ~(0xF << (ledNum * 4));
regData |= config << (ledNum * 4);
if (rtl8366_writeRegister(RTL8366S_LED_INDICATED_CONF_REG, regData)) {
printf("rtl8366s_setLedConfig: failed to set led register!\n");
return -1;
}
return 0;
}
int rtl8366s_getLedConfig(uint32_t ledNum, uint8_t *config)
{
uint16_t regData;
if(ledNum >= RTL8366S_LED_GROUP_MAX) {
DBG("rtl8366s_getLedConfig: invalid led group\n");
return -1;
}
if (rtl8366_readRegister(RTL8366S_LED_INDICATED_CONF_REG, &regData)) {
printf("rtl8366s_getLedConfig: failed to get led register!\n");
return -1;
}
if (config)
*config = (regData >> (ledNum * 4)) & 0xF;
return 0;
}
int rtl8366s_setLedForceValue(uint32_t group0, uint32_t group1,
uint32_t group2, uint32_t group3)
{
uint16_t regData;
regData = (group0 & 0x3F) | ((group1 & 0x3F) << 6);
if (rtl8366_writeRegister(RTL8366S_LED_0_1_FORCE_REG, regData)) {
printf("rtl8366s_setLedForceValue: failed to set led register!\n");
return -1;
}
regData = (group2 & 0x3F) | ((group3 & 0x3F) << 6);
if (rtl8366_writeRegister(RTL8366S_LED_2_3_FORCE_REG, regData)) {
printf("rtl8366s_setLedForceValue: failed to set led register!\n");
return -1;
}
return 0;
}
int rtl8366s_initChip(void)
{
uint32_t ledGroup, i = 0;
uint16_t regData;
uint8_t ledData[RTL8366S_LED_GROUP_MAX];
const uint16_t (*chipData)[2];
const uint16_t chipB[][2] =
{
{0x0000, 0x0038},{0x8100, 0x1B37},{0xBE2E, 0x7B9F},{0xBE2B, 0xA4C8},
{0xBE74, 0xAD14},{0xBE2C, 0xDC00},{0xBE69, 0xD20F},{0xBE3B, 0xB414},
{0xBE24, 0x0000},{0xBE23, 0x00A1},{0xBE22, 0x0008},{0xBE21, 0x0120},
{0xBE20, 0x1000},{0xBE24, 0x0800},{0xBE24, 0x0000},{0xBE24, 0xF000},
{0xBE23, 0xDF01},{0xBE22, 0xDF20},{0xBE21, 0x101A},{0xBE20, 0xA0FF},
{0xBE24, 0xF800},{0xBE24, 0xF000},{0x0242, 0x02BF},{0x0245, 0x02BF},
{0x0248, 0x02BF},{0x024B, 0x02BF},{0x024E, 0x02BF},{0x0251, 0x02BF},
{0x0230, 0x0A32},{0x0233, 0x0A32},{0x0236, 0x0A32},{0x0239, 0x0A32},
{0x023C, 0x0A32},{0x023F, 0x0A32},{0x0254, 0x0A3F},{0x0255, 0x0064},
{0x0256, 0x0A3F},{0x0257, 0x0064},{0x0258, 0x0A3F},{0x0259, 0x0064},
{0x025A, 0x0A3F},{0x025B, 0x0064},{0x025C, 0x0A3F},{0x025D, 0x0064},
{0x025E, 0x0A3F},{0x025F, 0x0064},{0x0260, 0x0178},{0x0261, 0x01F4},
{0x0262, 0x0320},{0x0263, 0x0014},{0x021D, 0x9249},{0x021E, 0x0000},
{0x0100, 0x0004},{0xBE4A, 0xA0B4},{0xBE40, 0x9C00},{0xBE41, 0x501D},
{0xBE48, 0x3602},{0xBE47, 0x8051},{0xBE4C, 0x6465},{0x8000, 0x1F00},
{0x8001, 0x000C},{0x8008, 0x0000},{0x8007, 0x0000},{0x800C, 0x00A5},
{0x8101, 0x02BC},{0xBE53, 0x0005},{0x8E45, 0xAFE8},{0x8013, 0x0005},
{0xBE4B, 0x6700},{0x800B, 0x7000},{0xBE09, 0x0E00},
{0xFFFF, 0xABCD}
};
const uint16_t chipDefault[][2] =
{
{0x0242, 0x02BF},{0x0245, 0x02BF},{0x0248, 0x02BF},{0x024B, 0x02BF},
{0x024E, 0x02BF},{0x0251, 0x02BF},
{0x0254, 0x0A3F},{0x0256, 0x0A3F},{0x0258, 0x0A3F},{0x025A, 0x0A3F},
{0x025C, 0x0A3F},{0x025E, 0x0A3F},
{0x0263, 0x007C},{0x0100, 0x0004},
{0xBE5B, 0x3500},{0x800E, 0x200F},{0xBE1D, 0x0F00},{0x8001, 0x5011},
{0x800A, 0xA2F4},{0x800B, 0x17A3},{0xBE4B, 0x17A3},{0xBE41, 0x5011},
{0xBE17, 0x2100},{0x8000, 0x8304},{0xBE40, 0x8304},{0xBE4A, 0xA2F4},
{0x800C, 0xA8D5},{0x8014, 0x5500},{0x8015, 0x0004},{0xBE4C, 0xA8D5},
{0xBE59, 0x0008},{0xBE09, 0x0E00},{0xBE36, 0x1036},{0xBE37, 0x1036},
{0x800D, 0x00FF},{0xBE4D, 0x00FF},
{0xFFFF, 0xABCD}
};
DBG("rtl8366s_initChip\n");
/* save current led config and set to led force */
for (ledGroup = 0; ledGroup < RTL8366S_LED_GROUP_MAX; ledGroup++) {
if (rtl8366s_getLedConfig(ledGroup, &ledData[ledGroup]))
return -1;
if (rtl8366s_setLedConfig(ledGroup, RTL8366S_LEDCONF_LEDFORCE))
return -1;
}
if (rtl8366s_setLedForceValue(0,0,0,0))
return -1;
if (rtl8366_readRegister(RTL8366S_MODEL_ID_REG, &regData))
return -1;
switch (regData)
{
case 0x0000:
chipData = chipB;
break;
case RTL8366S_MODEL_8366SR:
chipData = chipDefault;
break;
default:
printf("rtl8366s_initChip: unsupported chip found!\n");
return -1;
}
DBG("rtl8366s_initChip: found %x chip\n", regData);
while ((chipData[i][0] != 0xFFFF) && (chipData[i][1] != 0xABCD)) {
/* phy settings*/
if ((chipData[i][0] & 0xBE00) == 0xBE00) {
if (rtl8366_writeRegister(RTL8366S_PHY_ACCESS_CTRL_REG,
RTL8366S_PHY_CTRL_WRITE))
return -1;
}
if (rtl8366_writeRegister(chipData[i][0], chipData[i][1]))
return -1;
i++;
}
/* chip needs some time */
udelay(100 * 1000);
/* restore led config */
for (ledGroup = 0; ledGroup < RTL8366S_LED_GROUP_MAX; ledGroup++) {
if (rtl8366s_setLedConfig(ledGroup, ledData[ledGroup]))
return -1;
}
return 0;
}
int rtl8366s_initialize(void)
{
uint16_t regData;
DBG("rtl8366s_initialize: start setup\n");
smi_init();
rtl8366_readRegister(RTL8366S_CHIP_ID_REG, &regData);
DBG("Realtek 8366SR switch ID %#04x\n", regData);
if (regData != 0x8366) {
printf("rtl8366s_initialize: found unsupported switch\n");
return -1;
}
if (rtl8366s_initChip()) {
printf("rtl8366s_initialize: init chip failed\n");
return -1;
}
if (rtl8366s_setGreenEthernet(1, 1)) {
printf("rtl8366s_initialize: set green ethernet failed\n");
return -1;
}
/* Set port 5 noTag and don't dropUnda */
if (rtl8366s_setCPUPort(5, 1, 0)) {
printf("rtl8366s_initialize: set CPU port failed\n");
return -1;
}
return 0;
}

191
package/boot/uboot-ar71xx/src/drivers/spi/ar71xx_spi.c
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@ -1,191 +0,0 @@
/*
* (C) Copyright 2010
* Michael Kurz <michi.kurz@googlemail.com>
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#include <common.h>
#include <malloc.h>
#include <spi.h>
#include <asm/addrspace.h>
#include <asm/types.h>
#include <asm/ar71xx.h>
/*-----------------------------------------------------------------------
* Definitions
*/
#ifdef DEBUG_SPI
#define PRINTD(fmt,args...) printf (fmt ,##args)
#else
#define PRINTD(fmt,args...)
#endif
struct ar71xx_spi_slave {
struct spi_slave slave;
unsigned int mode;
};
static inline struct ar71xx_spi_slave *to_ar71xx_spi(struct spi_slave *slave)
{
return container_of(slave, struct ar71xx_spi_slave, slave);
}
/*=====================================================================*/
/* Public Functions */
/*=====================================================================*/
/*-----------------------------------------------------------------------
* Initialization
*/
void spi_init()
{
PRINTD("ar71xx_spi: spi_init");
// Init SPI Hardware, disable remap, set clock
__raw_writel(0x43, KSEG1ADDR(AR71XX_SPI_BASE + SPI_REG_CTRL));
PRINTD(" ---> out\n");
}
struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs,
unsigned int max_hz, unsigned int mode)
{
struct ar71xx_spi_slave *ss;
PRINTD("ar71xx_spi: spi_setup_slave");
if ((bus != 0) || (cs > 2))
return NULL;
ss = malloc(sizeof(struct ar71xx_spi_slave));
if (!ss)
return NULL;
ss->slave.bus = bus;
ss->slave.cs = cs;
ss->mode = mode;
/* TODO: Use max_hz to limit the SCK rate */
PRINTD(" ---> out\n");
return &ss->slave;
}
void spi_free_slave(struct spi_slave *slave)
{
struct ar71xx_spi_slave *ss = to_ar71xx_spi(slave);
free(ss);
}
int spi_claim_bus(struct spi_slave *slave)
{
return 0;
}
void spi_release_bus(struct spi_slave *slave)
{
}
int spi_xfer(struct spi_slave *slave, unsigned int bitlen, const void *dout,
void *din, unsigned long flags)
{
struct ar71xx_spi_slave *ss = to_ar71xx_spi(slave);
uint8_t *rx = din;
const uint8_t *tx = dout;
uint8_t curbyte, curbitlen, restbits;
uint32_t bytes = bitlen / 8;
uint32_t out;
uint32_t in;
PRINTD("ar71xx_spi: spi_xfer: slave:%p bitlen:%08x dout:%p din:%p flags:%08x\n", slave, bitlen, dout, din, flags);
if (flags & SPI_XFER_BEGIN) {
__raw_writel(SPI_FS_GPIO, KSEG1ADDR(AR71XX_SPI_BASE + SPI_REG_FS));
__raw_writel(SPI_IOC_CS_ALL, KSEG1ADDR(AR71XX_SPI_BASE + SPI_REG_IOC));
}
restbits = (bitlen % 8);
if (restbits != 0)
bytes++;
// enable chip select
out = SPI_IOC_CS_ALL & ~(SPI_IOC_CS(slave->cs));
while (bytes--) {
curbyte = 0;
if (tx) {
curbyte = *tx++;
}
if (restbits != 0) {
curbitlen = restbits;
curbyte <<= 8 - restbits;
} else {
curbitlen = 8;
}
PRINTD("ar71xx_spi: sending: data:%02x length:%d\n", curbyte, curbitlen);
/* clock starts at inactive polarity */
for (curbyte <<= (8 - curbitlen); curbitlen; curbitlen--) {
if (curbyte & (1 << 7))
out |= SPI_IOC_DO;
else
out &= ~(SPI_IOC_DO);
/* setup MSB (to slave) on trailing edge */
__raw_writel(out, KSEG1ADDR(AR71XX_SPI_BASE + SPI_REG_IOC));
__raw_writel(out | SPI_IOC_CLK, KSEG1ADDR(AR71XX_SPI_BASE + SPI_REG_IOC));
curbyte <<= 1;
}
in = __raw_readl(KSEG1ADDR(AR71XX_SPI_BASE + SPI_REG_RDS));
PRINTD("ar71xx_spi: received:%02x\n", in);
if (rx) {
if (restbits == 0) {
*rx++ = in;
} else {
*rx++ = (in << (8 - restbits));
}
}
}
if (flags & SPI_XFER_END) {
__raw_writel(SPI_IOC_CS(slave->cs), KSEG1ADDR(AR71XX_SPI_BASE + SPI_REG_IOC));
__raw_writel(SPI_IOC_CS_ALL, KSEG1ADDR(AR71XX_SPI_BASE + SPI_REG_IOC));
__raw_writel(0, KSEG1ADDR(AR71XX_SPI_BASE + SPI_REG_FS));
}
PRINTD(" ---> out\n");
return 0;
}

515
package/boot/uboot-ar71xx/src/include/asm-mips/ar71xx.h
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@ -1,515 +0,0 @@
/*
* Atheros AR71xx SoC specific definitions
*
* Copyright (C) 2008-2009 Gabor Juhos <juhosg@openwrt.org>
* Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
*
* Parts of this file are based on Atheros' 2.6.15 BSP
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License version 2 as published
* by the Free Software Foundation.
*/
#ifndef __ASM_MACH_AR71XX_H
#define __ASM_MACH_AR71XX_H
#include <linux/types.h>
#include <asm/io.h>
#include <linux/bitops.h>
#ifndef __ASSEMBLER__
#define BIT(x) (1<<(x))
#define AR71XX_PCI_MEM_BASE 0x10000000
#define AR71XX_PCI_MEM_SIZE 0x08000000
#define AR71XX_APB_BASE 0x18000000
#define AR71XX_GE0_BASE 0x19000000
#define AR71XX_GE0_SIZE 0x01000000
#define AR71XX_GE1_BASE 0x1a000000
#define AR71XX_GE1_SIZE 0x01000000
#define AR71XX_EHCI_BASE 0x1b000000
#define AR71XX_EHCI_SIZE 0x01000000
#define AR71XX_OHCI_BASE 0x1c000000
#define AR71XX_OHCI_SIZE 0x01000000
#define AR7240_OHCI_BASE 0x1b000000
#define AR7240_OHCI_SIZE 0x01000000
#define AR71XX_SPI_BASE 0x1f000000
#define AR71XX_SPI_SIZE 0x01000000
#define AR71XX_DDR_CTRL_BASE (AR71XX_APB_BASE + 0x00000000)
#define AR71XX_DDR_CTRL_SIZE 0x10000
#define AR71XX_CPU_BASE (AR71XX_APB_BASE + 0x00010000)
#define AR71XX_UART_BASE (AR71XX_APB_BASE + 0x00020000)
#define AR71XX_UART_SIZE 0x10000
#define AR71XX_USB_CTRL_BASE (AR71XX_APB_BASE + 0x00030000)
#define AR71XX_USB_CTRL_SIZE 0x10000
#define AR71XX_GPIO_BASE (AR71XX_APB_BASE + 0x00040000)
#define AR71XX_GPIO_SIZE 0x10000
#define AR71XX_PLL_BASE (AR71XX_APB_BASE + 0x00050000)
#define AR71XX_PLL_SIZE 0x10000
#define AR71XX_RESET_BASE (AR71XX_APB_BASE + 0x00060000)
#define AR71XX_RESET_SIZE 0x10000
#define AR71XX_MII_BASE (AR71XX_APB_BASE + 0x00070000)
#define AR71XX_MII_SIZE 0x10000
#define AR71XX_SLIC_BASE (AR71XX_APB_BASE + 0x00090000)
#define AR71XX_SLIC_SIZE 0x10000
#define AR71XX_DMA_BASE (AR71XX_APB_BASE + 0x000A0000)
#define AR71XX_DMA_SIZE 0x10000
#define AR71XX_STEREO_BASE (AR71XX_APB_BASE + 0x000B0000)
#define AR71XX_STEREO_SIZE 0x10000
#define AR724X_PCI_CRP_BASE (AR71XX_APB_BASE + 0x000C0000)
#define AR724X_PCI_CRP_SIZE 0x100
#define AR724X_PCI_CTRL_BASE (AR71XX_APB_BASE + 0x000F0000)
#define AR724X_PCI_CTRL_SIZE 0x100
#define AR91XX_WMAC_BASE (AR71XX_APB_BASE + 0x000C0000)
#define AR91XX_WMAC_SIZE 0x30000
#define AR71XX_MEM_SIZE_MIN 0x0200000
#define AR71XX_MEM_SIZE_MAX 0x10000000
#define AR71XX_CPU_IRQ_BASE 0
#define AR71XX_MISC_IRQ_BASE 8
#define AR71XX_MISC_IRQ_COUNT 8
#define AR71XX_GPIO_IRQ_BASE 16
#define AR71XX_GPIO_IRQ_COUNT 32
#define AR71XX_PCI_IRQ_BASE 48
#define AR71XX_PCI_IRQ_COUNT 8
#define AR71XX_CPU_IRQ_IP2 (AR71XX_CPU_IRQ_BASE + 2)
#define AR71XX_CPU_IRQ_USB (AR71XX_CPU_IRQ_BASE + 3)
#define AR71XX_CPU_IRQ_GE0 (AR71XX_CPU_IRQ_BASE + 4)
#define AR71XX_CPU_IRQ_GE1 (AR71XX_CPU_IRQ_BASE + 5)
#define AR71XX_CPU_IRQ_MISC (AR71XX_CPU_IRQ_BASE + 6)
#define AR71XX_CPU_IRQ_TIMER (AR71XX_CPU_IRQ_BASE + 7)
#define AR71XX_MISC_IRQ_TIMER (AR71XX_MISC_IRQ_BASE + 0)
#define AR71XX_MISC_IRQ_ERROR (AR71XX_MISC_IRQ_BASE + 1)
#define AR71XX_MISC_IRQ_GPIO (AR71XX_MISC_IRQ_BASE + 2)
#define AR71XX_MISC_IRQ_UART (AR71XX_MISC_IRQ_BASE + 3)
#define AR71XX_MISC_IRQ_WDOG (AR71XX_MISC_IRQ_BASE + 4)
#define AR71XX_MISC_IRQ_PERFC (AR71XX_MISC_IRQ_BASE + 5)
#define AR71XX_MISC_IRQ_OHCI (AR71XX_MISC_IRQ_BASE + 6)
#define AR71XX_MISC_IRQ_DMA (AR71XX_MISC_IRQ_BASE + 7)
#define AR71XX_GPIO_IRQ(_x) (AR71XX_GPIO_IRQ_BASE + (_x))
#define AR71XX_PCI_IRQ_DEV0 (AR71XX_PCI_IRQ_BASE + 0)
#define AR71XX_PCI_IRQ_DEV1 (AR71XX_PCI_IRQ_BASE + 1)
#define AR71XX_PCI_IRQ_DEV2 (AR71XX_PCI_IRQ_BASE + 2)
#define AR71XX_PCI_IRQ_CORE (AR71XX_PCI_IRQ_BASE + 4)
extern u32 ar71xx_ahb_freq;
extern u32 ar71xx_cpu_freq;
extern u32 ar71xx_ddr_freq;
enum ar71xx_soc_type {
AR71XX_SOC_UNKNOWN,
AR71XX_SOC_AR7130,
AR71XX_SOC_AR7141,
AR71XX_SOC_AR7161,
AR71XX_SOC_AR7240,
AR71XX_SOC_AR7241,
AR71XX_SOC_AR7242,
AR71XX_SOC_AR9130,
AR71XX_SOC_AR9132
};
extern enum ar71xx_soc_type ar71xx_soc;
/*
* PLL block
*/
#define AR71XX_PLL_REG_CPU_CONFIG 0x00
#define AR71XX_PLL_REG_SEC_CONFIG 0x04
#define AR71XX_PLL_REG_ETH0_INT_CLOCK 0x10
#define AR71XX_PLL_REG_ETH1_INT_CLOCK 0x14
#define AR71XX_PLL_DIV_SHIFT 3
#define AR71XX_PLL_DIV_MASK 0x1f
#define AR71XX_CPU_DIV_SHIFT 16
#define AR71XX_CPU_DIV_MASK 0x3
#define AR71XX_DDR_DIV_SHIFT 18
#define AR71XX_DDR_DIV_MASK 0x3
#define AR71XX_AHB_DIV_SHIFT 20
#define AR71XX_AHB_DIV_MASK 0x7
#define AR71XX_ETH0_PLL_SHIFT 17
#define AR71XX_ETH1_PLL_SHIFT 19
#define AR724X_PLL_REG_CPU_CONFIG 0x00
#define AR724X_PLL_REG_PCIE_CONFIG 0x18
#define AR724X_PLL_DIV_SHIFT 0
#define AR724X_PLL_DIV_MASK 0x3ff
#define AR724X_PLL_REF_DIV_SHIFT 10
#define AR724X_PLL_REF_DIV_MASK 0xf
#define AR724X_AHB_DIV_SHIFT 19
#define AR724X_AHB_DIV_MASK 0x1
#define AR724X_DDR_DIV_SHIFT 22
#define AR724X_DDR_DIV_MASK 0x3
#define AR91XX_PLL_REG_CPU_CONFIG 0x00
#define AR91XX_PLL_REG_ETH_CONFIG 0x04
#define AR91XX_PLL_REG_ETH0_INT_CLOCK 0x14
#define AR91XX_PLL_REG_ETH1_INT_CLOCK 0x18
#define AR91XX_PLL_DIV_SHIFT 0
#define AR91XX_PLL_DIV_MASK 0x3ff
#define AR91XX_DDR_DIV_SHIFT 22
#define AR91XX_DDR_DIV_MASK 0x3
#define AR91XX_AHB_DIV_SHIFT 19
#define AR91XX_AHB_DIV_MASK 0x1
#define AR91XX_ETH0_PLL_SHIFT 20
#define AR91XX_ETH1_PLL_SHIFT 22
// extern void __iomem *ar71xx_pll_base;
// static inline void ar71xx_pll_wr(unsigned reg, u32 val)
// {
// __raw_writel(val, ar71xx_pll_base + reg);
// }
// static inline u32 ar71xx_pll_rr(unsigned reg)
// {
// return __raw_readl(ar71xx_pll_base + reg);
// }
/*
* USB_CONFIG block
*/
#define USB_CTRL_REG_FLADJ 0x00
#define USB_CTRL_REG_CONFIG 0x04
// extern void __iomem *ar71xx_usb_ctrl_base;
// static inline void ar71xx_usb_ctrl_wr(unsigned reg, u32 val)
// {
// __raw_writel(val, ar71xx_usb_ctrl_base + reg);
// }
// static inline u32 ar71xx_usb_ctrl_rr(unsigned reg)
// {
// return __raw_readl(ar71xx_usb_ctrl_base + reg);
// }
/*
* GPIO block
*/
#define GPIO_REG_OE 0x00
#define GPIO_REG_IN 0x04
#define GPIO_REG_OUT 0x08
#define GPIO_REG_SET 0x0c
#define GPIO_REG_CLEAR 0x10
#define GPIO_REG_INT_MODE 0x14
#define GPIO_REG_INT_TYPE 0x18
#define GPIO_REG_INT_POLARITY 0x1c
#define GPIO_REG_INT_PENDING 0x20
#define GPIO_REG_INT_ENABLE 0x24
#define GPIO_REG_FUNC 0x28
#define AR71XX_GPIO_FUNC_STEREO_EN BIT(17)
#define AR71XX_GPIO_FUNC_SLIC_EN BIT(16)
#define AR71XX_GPIO_FUNC_SPI_CS2_EN BIT(13)
#define AR71XX_GPIO_FUNC_SPI_CS1_EN BIT(12)
#define AR71XX_GPIO_FUNC_UART_EN BIT(8)
#define AR71XX_GPIO_FUNC_USB_OC_EN BIT(4)
#define AR71XX_GPIO_FUNC_USB_CLK_EN BIT(0)
#define AR71XX_GPIO_COUNT 16
#define AR724X_GPIO_FUNC_GE0_MII_CLK_EN BIT(19)
#define AR724X_GPIO_FUNC_SPI_EN BIT(18)
#define AR724X_GPIO_FUNC_SPI_CS_EN2 BIT(14)
#define AR724X_GPIO_FUNC_SPI_CS_EN1 BIT(13)
#define AR724X_GPIO_FUNC_CLK_OBS5_EN BIT(12)
#define AR724X_GPIO_FUNC_CLK_OBS4_EN BIT(11)
#define AR724X_GPIO_FUNC_CLK_OBS3_EN BIT(10)
#define AR724X_GPIO_FUNC_CLK_OBS2_EN BIT(9)
#define AR724X_GPIO_FUNC_CLK_OBS1_EN BIT(8)
#define AR724X_GPIO_FUNC_ETH_SWITCH_LED4_EN BIT(7)
#define AR724X_GPIO_FUNC_ETH_SWITCH_LED3_EN BIT(6)
#define AR724X_GPIO_FUNC_ETH_SWITCH_LED2_EN BIT(5)
#define AR724X_GPIO_FUNC_ETH_SWITCH_LED1_EN BIT(4)
#define AR724X_GPIO_FUNC_ETH_SWITCH_LED0_EN BIT(3)
#define AR724X_GPIO_FUNC_UART_RTS_CTS_EN BIT(2)
#define AR724X_GPIO_FUNC_UART_EN BIT(1)
#define AR724X_GPIO_FUNC_JTAG_DISABLE BIT(0)
#define AR724X_GPIO_COUNT 18
#define AR91XX_GPIO_FUNC_WMAC_LED_EN BIT(22)
#define AR91XX_GPIO_FUNC_EXP_PORT_CS_EN BIT(21)
#define AR91XX_GPIO_FUNC_I2S_REFCLKEN BIT(20)
#define AR91XX_GPIO_FUNC_I2S_MCKEN BIT(19)
#define AR91XX_GPIO_FUNC_I2S1_EN BIT(18)
#define AR91XX_GPIO_FUNC_I2S0_EN BIT(17)
#define AR91XX_GPIO_FUNC_SLIC_EN BIT(16)
#define AR91XX_GPIO_FUNC_UART_RTSCTS_EN BIT(9)
#define AR91XX_GPIO_FUNC_UART_EN BIT(8)
#define AR91XX_GPIO_FUNC_USB_CLK_EN BIT(4)
#define AR91XX_GPIO_COUNT 22
// extern void __iomem *ar71xx_gpio_base;
// static inline void ar71xx_gpio_wr(unsigned reg, u32 value)
// {
// __raw_writel(value, ar71xx_gpio_base + reg);
// }
// static inline u32 ar71xx_gpio_rr(unsigned reg)
// {
// return __raw_readl(ar71xx_gpio_base + reg);
// }
// void ar71xx_gpio_init(void) __init;
// void ar71xx_gpio_function_enable(u32 mask);
// void ar71xx_gpio_function_disable(u32 mask);
// void ar71xx_gpio_function_setup(u32 set, u32 clear);
/*
* DDR_CTRL block
*/
#define AR71XX_DDR_REG_PCI_WIN0 0x7c
#define AR71XX_DDR_REG_PCI_WIN1 0x80
#define AR71XX_DDR_REG_PCI_WIN2 0x84
#define AR71XX_DDR_REG_PCI_WIN3 0x88
#define AR71XX_DDR_REG_PCI_WIN4 0x8c
#define AR71XX_DDR_REG_PCI_WIN5 0x90
#define AR71XX_DDR_REG_PCI_WIN6 0x94
#define AR71XX_DDR_REG_PCI_WIN7 0x98
#define AR71XX_DDR_REG_FLUSH_GE0 0x9c
#define AR71XX_DDR_REG_FLUSH_GE1 0xa0
#define AR71XX_DDR_REG_FLUSH_USB 0xa4
#define AR71XX_DDR_REG_FLUSH_PCI 0xa8
#define AR724X_DDR_REG_FLUSH_GE0 0x7c
#define AR724X_DDR_REG_FLUSH_GE1 0x80
#define AR724X_DDR_REG_FLUSH_USB 0x84
#define AR724X_DDR_REG_FLUSH_PCIE 0x88
#define AR91XX_DDR_REG_FLUSH_GE0 0x7c
#define AR91XX_DDR_REG_FLUSH_GE1 0x80
#define AR91XX_DDR_REG_FLUSH_USB 0x84
#define AR91XX_DDR_REG_FLUSH_WMAC 0x88
#define PCI_WIN0_OFFS 0x10000000
#define PCI_WIN1_OFFS 0x11000000
#define PCI_WIN2_OFFS 0x12000000
#define PCI_WIN3_OFFS 0x13000000
#define PCI_WIN4_OFFS 0x14000000
#define PCI_WIN5_OFFS 0x15000000
#define PCI_WIN6_OFFS 0x16000000
#define PCI_WIN7_OFFS 0x07000000
// extern void __iomem *ar71xx_ddr_base;
// static inline void ar71xx_ddr_wr(unsigned reg, u32 val)
// {
// __raw_writel(val, ar71xx_ddr_base + reg);
// }
// static inline u32 ar71xx_ddr_rr(unsigned reg)
// {
// return __raw_readl(ar71xx_ddr_base + reg);
// }
// void ar71xx_ddr_flush(u32 reg);
/*
* PCI block
*/
#define AR71XX_PCI_CFG_BASE (AR71XX_PCI_MEM_BASE + PCI_WIN7_OFFS + 0x10000)
#define AR71XX_PCI_CFG_SIZE 0x100
#define PCI_REG_CRP_AD_CBE 0x00
#define PCI_REG_CRP_WRDATA 0x04
#define PCI_REG_CRP_RDDATA 0x08
#define PCI_REG_CFG_AD 0x0c
#define PCI_REG_CFG_CBE 0x10
#define PCI_REG_CFG_WRDATA 0x14
#define PCI_REG_CFG_RDDATA 0x18
#define PCI_REG_PCI_ERR 0x1c
#define PCI_REG_PCI_ERR_ADDR 0x20
#define PCI_REG_AHB_ERR 0x24
#define PCI_REG_AHB_ERR_ADDR 0x28
#define PCI_CRP_CMD_WRITE 0x00010000
#define PCI_CRP_CMD_READ 0x00000000
#define PCI_CFG_CMD_READ 0x0000000a
#define PCI_CFG_CMD_WRITE 0x0000000b
#define PCI_IDSEL_ADL_START 17
#define AR724X_PCI_CFG_BASE (AR71XX_PCI_MEM_BASE + 0x4000000)
#define AR724X_PCI_CFG_SIZE 0x1000
#define AR724X_PCI_REG_APP 0x00
#define AR724X_PCI_REG_RESET 0x18
#define AR724X_PCI_REG_INT_STATUS 0x4c
#define AR724X_PCI_REG_INT_MASK 0x50
#define AR724X_PCI_APP_LTSSM_ENABLE BIT(0)
#define AR724X_PCI_RESET_LINK_UP BIT(0)
#define AR724X_PCI_INT_DEV0 BIT(14)
/*
* RESET block
*/
#define AR71XX_RESET_REG_TIMER 0x00
#define AR71XX_RESET_REG_TIMER_RELOAD 0x04
#define AR71XX_RESET_REG_WDOG_CTRL 0x08
#define AR71XX_RESET_REG_WDOG 0x0c
#define AR71XX_RESET_REG_MISC_INT_STATUS 0x10
#define AR71XX_RESET_REG_MISC_INT_ENABLE 0x14
#define AR71XX_RESET_REG_PCI_INT_STATUS 0x18
#define AR71XX_RESET_REG_PCI_INT_ENABLE 0x1c
#define AR71XX_RESET_REG_GLOBAL_INT_STATUS 0x20
#define AR71XX_RESET_REG_RESET_MODULE 0x24
#define AR71XX_RESET_REG_PERFC_CTRL 0x2c
#define AR71XX_RESET_REG_PERFC0 0x30
#define AR71XX_RESET_REG_PERFC1 0x34
#define AR71XX_RESET_REG_REV_ID 0x90
#define AR91XX_RESET_REG_GLOBAL_INT_STATUS 0x18
#define AR91XX_RESET_REG_RESET_MODULE 0x1c
#define AR91XX_RESET_REG_PERF_CTRL 0x20
#define AR91XX_RESET_REG_PERFC0 0x24
#define AR91XX_RESET_REG_PERFC1 0x28
#define AR724X_RESET_REG_RESET_MODULE 0x1c
#define WDOG_CTRL_LAST_RESET BIT(31)
#define WDOG_CTRL_ACTION_MASK 3
#define WDOG_CTRL_ACTION_NONE 0 /* no action */
#define WDOG_CTRL_ACTION_GPI 1 /* general purpose interrupt */
#define WDOG_CTRL_ACTION_NMI 2 /* NMI */
#define WDOG_CTRL_ACTION_FCR 3 /* full chip reset */
#define MISC_INT_DMA BIT(7)
#define MISC_INT_OHCI BIT(6)
#define MISC_INT_PERFC BIT(5)
#define MISC_INT_WDOG BIT(4)
#define MISC_INT_UART BIT(3)
#define MISC_INT_GPIO BIT(2)
#define MISC_INT_ERROR BIT(1)
#define MISC_INT_TIMER BIT(0)
#define PCI_INT_CORE BIT(4)
#define PCI_INT_DEV2 BIT(2)
#define PCI_INT_DEV1 BIT(1)
#define PCI_INT_DEV0 BIT(0)
#define RESET_MODULE_EXTERNAL BIT(28)
#define RESET_MODULE_FULL_CHIP BIT(24)
#define RESET_MODULE_AMBA2WMAC BIT(22)
#define RESET_MODULE_CPU_NMI BIT(21)
#define RESET_MODULE_CPU_COLD BIT(20)
#define RESET_MODULE_DMA BIT(19)
#define RESET_MODULE_SLIC BIT(18)
#define RESET_MODULE_STEREO BIT(17)
#define RESET_MODULE_DDR BIT(16)
#define RESET_MODULE_GE1_MAC BIT(13)
#define RESET_MODULE_GE1_PHY BIT(12)
#define RESET_MODULE_USBSUS_OVERRIDE BIT(10)
#define RESET_MODULE_GE0_MAC BIT(9)
#define RESET_MODULE_GE0_PHY BIT(8)
#define RESET_MODULE_USB_OHCI_DLL BIT(6)
#define RESET_MODULE_USB_HOST BIT(5)
#define RESET_MODULE_USB_PHY BIT(4)
#define RESET_MODULE_USB_OHCI_DLL_7240 BIT(3)
#define RESET_MODULE_PCI_BUS BIT(1)
#define RESET_MODULE_PCI_CORE BIT(0)
#define AR724X_RESET_GE1_MDIO BIT(23)
#define AR724X_RESET_GE0_MDIO BIT(22)
#define AR724X_RESET_PCIE_PHY_SERIAL BIT(10)
#define AR724X_RESET_PCIE_PHY BIT(7)
#define AR724X_RESET_PCIE BIT(6)
#define REV_ID_MAJOR_MASK 0xfff0
#define REV_ID_MAJOR_AR71XX 0x00a0
#define REV_ID_MAJOR_AR913X 0x00b0
#define REV_ID_MAJOR_AR7240 0x00c0
#define REV_ID_MAJOR_AR7241 0x0100
#define REV_ID_MAJOR_AR7242 0x1100
#define AR71XX_REV_ID_MINOR_MASK 0x3
#define AR71XX_REV_ID_MINOR_AR7130 0x0
#define AR71XX_REV_ID_MINOR_AR7141 0x1
#define AR71XX_REV_ID_MINOR_AR7161 0x2
#define AR71XX_REV_ID_REVISION_MASK 0x3
#define AR71XX_REV_ID_REVISION_SHIFT 2
#define AR91XX_REV_ID_MINOR_MASK 0x3
#define AR91XX_REV_ID_MINOR_AR9130 0x0
#define AR91XX_REV_ID_MINOR_AR9132 0x1
#define AR91XX_REV_ID_REVISION_MASK 0x3
#define AR91XX_REV_ID_REVISION_SHIFT 2
#define AR724X_REV_ID_REVISION_MASK 0x3
// extern void __iomem *ar71xx_reset_base;
static inline void ar71xx_reset_wr(unsigned reg, u32 val)
{
__raw_writel(val, KSEG1ADDR(AR71XX_RESET_BASE) + reg);
}
static inline u32 ar71xx_reset_rr(unsigned reg)
{
return __raw_readl(KSEG1ADDR(AR71XX_RESET_BASE) + reg);
}
// void ar71xx_device_stop(u32 mask);
// void ar71xx_device_start(u32 mask);
// int ar71xx_device_stopped(u32 mask);
/*
* SPI block
*/
#define SPI_REG_FS 0x00 /* Function Select */
#define SPI_REG_CTRL 0x04 /* SPI Control */
#define SPI_REG_IOC 0x08 /* SPI I/O Control */
#define SPI_REG_RDS 0x0c /* Read Data Shift */
#define SPI_FS_GPIO BIT(0) /* Enable GPIO mode */
#define SPI_CTRL_RD BIT(6) /* Remap Disable */
#define SPI_CTRL_DIV_MASK 0x3f
#define SPI_IOC_DO BIT(0) /* Data Out pin */
#define SPI_IOC_CLK BIT(8) /* CLK pin */
#define SPI_IOC_CS(n) BIT(16 + (n))
#define SPI_IOC_CS0 SPI_IOC_CS(0)
#define SPI_IOC_CS1 SPI_IOC_CS(1)
#define SPI_IOC_CS2 SPI_IOC_CS(2)
#define SPI_IOC_CS_ALL (SPI_IOC_CS0 | SPI_IOC_CS1 | SPI_IOC_CS2)
// void ar71xx_flash_acquire(void);
// void ar71xx_flash_release(void);
/*
* MII_CTRL block
*/
#define MII_REG_MII0_CTRL 0x00
#define MII_REG_MII1_CTRL 0x04
#define MII0_CTRL_IF_GMII 0
#define MII0_CTRL_IF_MII 1
#define MII0_CTRL_IF_RGMII 2
#define MII0_CTRL_IF_RMII 3
#define MII1_CTRL_IF_RGMII 0
#define MII1_CTRL_IF_RMII 1
#endif /* __ASSEMBLER__ */
#endif /* __ASM_MACH_AR71XX_H */

65
package/boot/uboot-ar71xx/src/include/asm-mips/ar71xx_gpio.h
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/*
* (C) Copyright 2010
* Michael Kurz <michi.kurz@googlemail.com>.
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#ifndef _AR71XX_GPIO_H
#define _AR71XX_GPIO_H
#include <common.h>
#include <asm/ar71xx.h>
static inline void ar71xx_setpin(uint8_t pin, uint8_t state)
{
uint32_t reg = readl(KSEG1ADDR(AR71XX_GPIO_BASE + GPIO_REG_OUT));
if (state != 0) {
reg |= (1 << pin);
} else {
reg &= ~(1 << pin);
}
writel(reg, KSEG1ADDR(AR71XX_GPIO_BASE + GPIO_REG_OUT));
readl(KSEG1ADDR(AR71XX_GPIO_BASE + GPIO_REG_OUT));
}
static inline uint32_t ar71xx_getpin(uint8_t pin)
{
uint32_t reg = readl(KSEG1ADDR(AR71XX_GPIO_BASE + GPIO_REG_IN));
return (((reg & (1 << pin)) != 0) ? 1 : 0);
}
static inline void ar71xx_setpindir(uint8_t pin, uint8_t direction)
{
uint32_t reg = readl(KSEG1ADDR(AR71XX_GPIO_BASE + GPIO_REG_OE));
if (direction != 0) {
reg |= (1 << pin);
} else {
reg &= ~(1 << pin);
}
writel(reg, KSEG1ADDR(AR71XX_GPIO_BASE + GPIO_REG_OE));
readl(KSEG1ADDR(AR71XX_GPIO_BASE + GPIO_REG_OE));
}
#endif /* AR71XX_GPIO_H */

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/*
* (C) Copyright 2010
* Michael Kurz <michi.kurz@googlemail.com>.
*
* See file CREDITS for list of people who contributed to this
* project.
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
/* This file contains the configuration parameters for the zyxel nbg460n board. */
#ifndef _NBG460N_CONFIG_H
#define _NBG460N_CONFIG_H
#define CONFIG_MIPS32 1 /* MIPS32 CPU core */
#define CONFIG_AR71XX 1
#define CONFIG_AR91XX 1
#define CONFIG_SYS_HZ 1000
#define CONFIG_SYS_MIPS_TIMER_FREQ (400000000/2)
/* Cache Configuration */
#define CONFIG_SYS_DCACHE_SIZE 32768
#define CONFIG_SYS_ICACHE_SIZE 65536
#define CONFIG_SYS_CACHELINE_SIZE 32
/* Cache lock for stack */
#define CONFIG_SYS_INIT_SP_OFFSET 0x1000
#define CONFIG_SYS_MONITOR_BASE (TEXT_BASE)
#define CONFIG_BAUDRATE 115200
#define CONFIG_SYS_BAUDRATE_TABLE {115200}
#define CONFIG_MISC_INIT_R
/* SPI-Flash support */
#define CONFIG_SPI_FLASH
#define CONFIG_AR71XX_SPI
#define CONFIG_SPI_FLASH_MACRONIX
#define CONFIG_SF_DEFAULT_HZ 25000000
#define CONFIG_ENV_SPI_MAX_HZ 25000000
#define CONFIG_ENV_SPI_BUS 0
#define CONFIG_ENV_SPI_CS 0
#define CONFIG_ENV_IS_IN_SPI_FLASH
#define CONFIG_ENV_ADDR 0xbfc20000
#define CONFIG_ENV_OFFSET 0x20000
#define CONFIG_ENV_SIZE 0x01000
#define CONFIG_ENV_SECT_SIZE 0x10000
#define CONFIG_SYS_MAX_FLASH_BANKS 1
#define CONFIG_SYS_MAX_FLASH_SECT 64
#define CONFIG_SYS_FLASH_BASE 0xbfc00000
/* Net support */
#define CONFIG_ETHADDR_ADDR 0xbfc0fff8
#define CONFIG_SYS_RX_ETH_BUFFER 16
#define CONFIG_AG71XX
#define CONFIG_AG71XX_PORTS { 1, 1 }
#define CONFIG_AG71XX_MII0_IIF MII0_CTRL_IF_RGMII
#define CONFIG_AG71XX_MII1_IIF MII1_CTRL_IF_RGMII
#define CONFIG_NET_MULTI
#define CONFIG_IPADDR 192.168.1.254
#define CONFIG_SERVERIP 192.168.1.42
/* Switch support */
#define CONFIG_MII
#define CONFIG_RTL8366_MII
#define RTL8366_PIN_SDA 16
#define RTL8366_PIN_SCK 18
#define MII_GPIOINCLUDE <asm/ar71xx_gpio.h>
#define MII_SETSDA(x) ar71xx_setpin(RTL8366_PIN_SDA, x)
#define MII_GETSDA ar71xx_getpin(RTL8366_PIN_SDA)
#define MII_SETSCK(x) ar71xx_setpin(RTL8366_PIN_SCK, x)
#define MII_SDAINPUT ar71xx_setpindir(RTL8366_PIN_SDA, 0)
#define MII_SDAOUTPUT ar71xx_setpindir(RTL8366_PIN_SDA, 1)
#define MII_SCKINPUT ar71xx_setpindir(RTL8366_PIN_SCK, 0)
#define MII_SCKOUTPUT ar71xx_setpindir(RTL8366_PIN_SCK, 1)
#define CONFIG_BOOTDELAY 3
#define CONFIG_BOOTARGS "console=ttyS0,115200 rootfstype==squashfs,jffs2 noinitrd machtype=NBG460N"
#define CONFIG_BOOTCOMMAND "bootm 0xbfc70000"
#define CONFIG_LZMA
/* Commands */
#define CONFIG_SYS_NO_FLASH
#include <config_cmd_default.h>
#undef CONFIG_CMD_BDI
#undef CONFIG_CMD_FPGA
#undef CONFIG_CMD_IMI
#undef CONFIG_CMD_IMLS
#undef CONFIG_CMD_LOADS
#define CONFIG_CMD_SF
#define CONFIG_CMD_MII
#define CONFIG_CMD_PING
#define CONFIG_CMD_DHCP
#define CONFIG_CMD_SPI
/* Miscellaneous configurable options */
#define CONFIG_SYS_PROMPT "U-Boot> "
#define CONFIG_SYS_CBSIZE 256
#define CONFIG_SYS_MAXARGS 16
#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
#define CONFIG_SYS_LONGHELP 1
#define CONFIG_CMDLINE_EDITING 1
#define CONFIG_AUTO_COMPLETE
#define CONFIG_SYS_HUSH_PARSER
#define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
/* Size of malloc() pool */
#define CONFIG_SYS_MALLOC_LEN ROUND(3 * 0x10000 + 128*1024, 0x1000)
#define CONFIG_SYS_GBL_DATA_SIZE 128 /* 128 bytes for initial data */
#define CONFIG_SYS_BOOTPARAMS_LEN 128*1024
#define CONFIG_SYS_SDRAM_BASE 0x80000000 /* Cached addr */
#define CONFIG_SYS_LOAD_ADDR 0x80060000 /* default load address */
#define CONFIG_SYS_MEMTEST_START 0x80000800
#define CONFIG_SYS_MEMTEST_END 0x81E00000
#endif /* _NBG460N_CONFIG_H */

115
package/boot/uboot-envtools/files/ar71xx
View File

@ -1,115 +0,0 @@
#!/bin/sh
#
# Copyright (C) 2011-2014 OpenWrt.org
#
[ -e /etc/config/ubootenv ] && exit 0
touch /etc/config/ubootenv
. /lib/uboot-envtools.sh
. /lib/functions.sh
board=$(board_name)
case "$board" in
a40|\
a60|\
alfa-ap120c|\
all0258n|\
ap121f|\
ap90q|\
ap91-5g|\
arduino-yun|\
cap324|\
cap4200ag|\
carambola2|\
cpe830|\
cpe870|\
cr3000|\
cr5000|\
dw33d|\
e1700ac-v2|\
e600g-v2|\
e600gac-v2|\
eap300v2|\
ens202ext|\
gl-ar300m|\
gl-ar750|\
hornet-ub|\
hornet-ub-x2|\
jwap230|\
koala|\
mr1750|\
mr1750v2|\
mr600|\
mr600v2|\
mr900|\
mr900v2|\
n5q|\
nbg6616|\
nbg6716|\
om5p|\
om5p-ac|\
om5p-acv2|\
om5p-an|\
r36a|\
rme-eg200|\
sr3200|\
t830|\
tube2h|\
wam250|\
wnr1000-v2|\
wnr2000-v3|\
wnr2200|\
wnr612-v2|\
xd3200)
ubootenv_add_uci_config "/dev/mtd1" "0x0" "0x10000" "0x10000"
;;
alfa-ap96|\
all0315n|\
om2p|\
om2p-hs|\
om2p-hsv2|\
om2p-hsv3|\
om2p-hsv4|\
om2p-lc|\
om2pv2|\
om2pv4)
ubootenv_add_uci_config "/dev/mtd1" "0x0" "0x40000" "0x40000"
;;
dap-2695-a1|\
wzr-hp-ag300h)
ubootenv_add_uci_config "/dev/mtd3" "0x0" "0x10000" "0x10000"
;;
dr342|\
dr531)
ubootenv_add_uci_config "/dev/mtd1" "0x0" "0xf800" "0x10000"
;;
gl-ar150|\
gl-domino|\
gl-mifi)
ubootenv_add_uci_config "/dev/mtd1" "0x0" "0x8000" "0x10000"
;;
rambutan)
ubootenv_add_uci_config "/dev/mtd1" "0x0" "0x20000" "0x20000"
ubootenv_add_uci_config "/dev/mtd1" "0x100000" "0x20000" "0x20000"
;;
qihoo-c301)
ubootenv_add_uci_config "/dev/mtd9" "0x0" "0x10000" "0x10000"
;;
wi2a-ac200i)
ubootenv_add_uci_config "/dev/mtd4" "0x0" "0x8000" "0x10000"
;;
wndr3700)
ubootenv_add_uci_config "/dev/mtd1" "0x0" "0x20000" "0x10000"
;;
wndr4300)
ubootenv_add_uci_config "/dev/mtd1" "0x0" "0x40000" "0x20000"
;;
esac
config_load ubootenv
config_foreach ubootenv_add_app_config ubootenv
exit 0

2
package/boot/uboot-envtools/files/ath79
View File

@ -19,6 +19,8 @@ arduino,yun|\
buffalo,bhr-4grv2|\
devolo,magic-2-wifi|\
engenius,ecb1750|\
engenius,enh202-v1|\
engenius,ens202ext-v1|\
etactica,eg200|\
glinet,gl-ar750s-nor|\
glinet,gl-ar750s-nor-nand|\

5
package/boot/uboot-mediatek/Makefile
View File

@ -1,9 +1,8 @@
include $(TOPDIR)/rules.mk
include $(INCLUDE_DIR)/kernel.mk
PKG_VERSION:=2020.04
PKG_RELEASE:=2
PKG_HASH:=fe732aaf037d9cc3c0909bad8362af366ae964bbdac6913a34081ff4ad565372
PKG_VERSION:=2020.07
PKG_HASH:=c1f5bf9ee6bb6e648edbf19ce2ca9452f614b08a9f886f1a566aa42e8cf05f6a
include $(INCLUDE_DIR)/u-boot.mk
include $(INCLUDE_DIR)/package.mk

1074
package/boot/uboot-mediatek/patches/001-eth-mtk-add-mt7531-switch.patch
View File

File diff suppressed because it is too large Load Diff

1
package/boot/uboot-mediatek/patches/005-update-bpir2-defconfig.patch
View File

@ -5,7 +5,6 @@ index 6b9fbd7e22..fb2a004803 100644
@@ -52,3 +52,13 @@ CONFIG_TIMER=y
CONFIG_WDT_MTK=y
CONFIG_LZMA=y
# CONFIG_EFI_LOADER is not set
+CONFIG_CMD_BOOTZ=y
+CONFIG_OF_LIBFDT_OVERLAY=y
+#enables savenenv-command

8
package/boot/uboot-mediatek/patches/007-env-fat-use-bootdevice.patch
View File

@ -37,11 +37,10 @@ diff --git a/env/fat.c b/env/fat.c
index 35a1955e63..63aced9317 100644
--- a/env/fat.c
+++ b/env/fat.c
@@ -29,6 +29,36 @@
# endif
@@ -29,6 +29,34 @@
# define LOADENV
#endif
+#if defined(CMD_SAVEENV) || defined(CMD_LOADENV)
+__weak int mmc_get_env_dev(void)
+{
+#ifdef CONFIG_SYS_MMC_ENV_DEV
@ -69,11 +68,10 @@ index 35a1955e63..63aced9317 100644
+ return CONFIG_ENV_FAT_DEVICE_AND_PART;
+#endif
+}
+#endif
+
#ifdef CMD_SAVEENV
static int env_fat_save(void)
{
env_t __aligned(ARCH_DMA_MINALIGN) env_new;
@@ -43,7 +71,7 @@ static int env_fat_save(void)
return err;

11
package/devel/strace/Makefile
View File

@ -9,12 +9,12 @@ include $(TOPDIR)/rules.mk
include $(INCLUDE_DIR)/kernel.mk
PKG_NAME:=strace
PKG_VERSION:=5.5
PKG_VERSION:=5.8
PKG_RELEASE:=1
PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.xz
PKG_SOURCE_URL:=https://strace.io/files/$(PKG_VERSION)
PKG_HASH:=9f58958c8e59ea62293d907d10572e352b582bd7948ed21aa28ebb47e5bf30ff
PKG_HASH:=df4a669f7fff9cc302784085bd4b72fab216a426a3f72c892b28a537b71e7aa9
PKG_MAINTAINER:=Felix Fietkau <nbd@nbd.name>
PKG_LICENSE:=LGPL-2.1-or-later
@ -32,10 +32,6 @@ include $(INCLUDE_DIR)/package.mk
HOST_CFLAGS += -I$(LINUX_DIR)/user_headers/include
ifeq ($(ARCH),aarch64)
CONFIGURE_ARGS += --enable-mpers=check
endif
CONFIGURE_VARS+= \
LDFLAGS_FOR_BUILD="$(HOST_LDFLAGS)" \
CPPFLAGS_FOR_BUILD="$(HOST_CPPFLAGS)" \
@ -73,7 +69,8 @@ endef
CONFIGURE_ARGS += \
--with-libdw=$(if $(CONFIG_STRACE_LIBDW),yes,no) \
--with-libunwind=$(if $(CONFIG_STRACE_LIBUNWIND),yes,no)
--with-libunwind=$(if $(CONFIG_STRACE_LIBUNWIND),yes,no) \
--enable-mpers=no
MAKE_FLAGS := \
CCOPT="$(TARGET_CFLAGS)"

2
package/firmware/b43legacy-firmware/Makefile
View File

@ -12,7 +12,7 @@ PKG_VERSION:=3.130.20.0
PKG_RELEASE:=1
PKG_SOURCE:=wl_apsta-$(PKG_VERSION).o
PKG_SOURCE_URL:=http://downloads.openwrt.org/sources
PKG_SOURCE_URL:=https://downloads.openwrt.org/sources
PKG_HASH:=7dba610b1d96dd14e901bcbce14cd6ecd1b1ac6f5c0035b0d6b6dc46a7c3ef90
include $(INCLUDE_DIR)/package.mk

68
package/firmware/vsc73x5-ucode/Makefile
View File

@ -1,68 +0,0 @@
#
# Copyright (C) 2010 OpenWrt.org
#
# This is free software, licensed under the GNU General Public License v2.
# See /LICENSE for more information.
#
include $(TOPDIR)/rules.mk
PKG_NAME:=vsc73x5-ucode
PKG_RELEASE:=1
PKG_SOURCE_URL:=http://mirror2.openwrt.org/sources
PKG_SOURCE:=vsc73x5-ucode.tar.bz2
PKG_BUILD_DIR:=$(BUILD_DIR)/vsc73x5-ucode
PKG_HASH:=9728cec2b5d49ddd52578a8c600f1fd9f878a34e7e00ed51c248e0d608dd763a
PKG_FLAGS:=nonshared
include $(INCLUDE_DIR)/package.mk
define Package/vsc73x5-defaults
SECTION:=net
CATEGORY:=Network
DEPENDS:=@TARGET_ar71xx
DEFAULT:=n
TITLE:=$(1)
endef
define Package/vsc73x5/install
$(INSTALL_DIR) $(1)/lib/firmware
$(INSTALL_DATA) $(PKG_BUILD_DIR)/$(2) $(1)/lib/firmware/$(3)
endef
define Package/vsc7385-ucode-pb44
$(call Package/vsc73x5-defaults, Vitesse VSC7395 microcode for the Atheros PB44 boards)
endef
define Package/vsc7385-ucode-pb44/description
This package contains the Atheros PB44 board specific microcode for
the Vitesse VSC7385 ethernet switch.
endef
define Package/vsc7385-ucode-pb44/install
$(call Package/vsc73x5/install,$(1),g5_Plus1_2_29b_unmanaged_Atheros_v5.bin,vsc7385_ucode_pb44.bin)
endef
define Package/vsc7395-ucode-pb44
$(call Package/vsc73x5-defaults, Vitesse VSC7395 microcode for the Atheros PB44 boards)
endef
define Package/vsc7395-ucode-pb44/description
This package contains the Atheros PB44 board specific microcode for
the Vitesse VSC7395 ethernet switch.
endef
define Package/vsc7395-ucode-pb44/install
$(call Package/vsc73x5/install,$(1),g5e_Plus1_2_29a_unmanaged_Atheros_v3.bin,vsc7395_ucode_pb44.bin)
endef
define Build/Compile
endef
$(eval $(call BuildPackage,vsc7385-ucode-pb44))
$(eval $(call BuildPackage,vsc7395-ucode-pb44))

20
package/firmware/vsc73x5-ucode/files/Makefile
View File

@ -1,20 +0,0 @@
#
# Copyright (C) 2010 OpenWrt.org
#
# This is free software, licensed under the GNU General Public License v2.
# See /LICENSE for more information.
#
CC:=gcc
OBJCOPY:=objcopy
all: g5_Plus1_2_31_unmanaged_Atheros_v3.bin \
g5_Plus1_2_31_unmanaged_Atheros_v4.bin \
g5_Plus1_2_29b_unmanaged_Atheros_v5.bin \
g5e_Plus1_2_29a_unmanaged_Atheros_v3.bin
%.o: %.c
$(CC) $(CFLAGS) -c $^ -o $@
%.bin: %.o
$(OBJCOPY) -O binary -j .data $^ $@

2
package/kernel/broadcom-wl/Makefile
View File

@ -13,7 +13,7 @@ PKG_VERSION:=5.10.56.27.3
PKG_RELEASE:=10
PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION)_$(ARCH).tar.bz2
PKG_SOURCE_URL:=http://downloads.openwrt.org/sources
PKG_SOURCE_URL:=https://downloads.openwrt.org/sources
ifeq ($(ARCH),mipsel)
PKG_HASH:=26a8c370f48fc129d0731cfd751c36cae1419b0bc8ca35781126744e60eae009

2
package/kernel/lantiq/ltq-vmmc/Makefile
View File

@ -14,7 +14,7 @@ PKG_RELEASE:=4
PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.bz2
PKG_HASH:=707f515eb727c032418c4da67d7e86884bb56cdc2a606e8f6ded6057d8767e57
PKG_SOURCE_URL:=http://mirror2.openwrt.org/sources
PKG_SOURCE_URL:=https://mirror2.openwrt.org/sources
PKG_MAINTAINER:=John Crispin <john@phrozen.org>
PKG_CHECK_FORMAT_SECURITY:=0

14
package/kernel/linux/modules/leds.mk
View File

@ -24,6 +24,20 @@ $(eval $(call KernelPackage,leds-gpio))
LED_TRIGGER_DIR=$(LINUX_DIR)/drivers/leds/trigger
define KernelPackage/ledtrig-activity
SUBMENU:=$(LEDS_MENU)
TITLE:=LED Activity Trigger
KCONFIG:=CONFIG_LEDS_TRIGGER_ACTIVITY
FILES:=$(LED_TRIGGER_DIR)/ledtrig-activity.ko
AUTOLOAD:=$(call AutoLoad,50,ledtrig-activity)
endef
define KernelPackage/ledtrig-activity/description
Kernel module that allows LEDs to blink based on system load
endef
$(eval $(call KernelPackage,ledtrig-activity))
define KernelPackage/ledtrig-heartbeat
SUBMENU:=$(LEDS_MENU)
TITLE:=LED Heartbeat Trigger

2
package/kernel/linux/modules/usb.mk
View File

@ -1593,7 +1593,7 @@ $(eval $(call KernelPackage,usbip-server))
define KernelPackage/usb-chipidea
TITLE:=Host and device support for Chipidea controllers
DEPENDS:=+USB_GADGET_SUPPORT:kmod-usb-gadget @TARGET_ar71xx||TARGET_ath79 +kmod-usb-ehci +kmod-usb-phy-nop
DEPENDS:=+USB_GADGET_SUPPORT:kmod-usb-gadget @TARGET_ath79 +kmod-usb-ehci +kmod-usb-phy-nop
KCONFIG:= \
CONFIG_EXTCON \
CONFIG_USB_CHIPIDEA \

9
package/kernel/mac80211/ath.mk
View File

@ -40,7 +40,6 @@ config-$(CONFIG_PACKAGE_ATH_DYNACK) += ATH9K_DYNACK
config-$(call config_package,ath9k) += ATH9K
config-$(call config_package,ath9k-common) += ATH9K_COMMON
config-$(call config_package,owl-loader) += ATH9K_PCI_NO_EEPROM
config-$(CONFIG_TARGET_ar71xx) += ATH9K_AHB
config-$(CONFIG_TARGET_ath79) += ATH9K_AHB
config-$(CONFIG_TARGET_ipq40xx) += ATH10K_AHB
config-$(CONFIG_PCI) += ATH9K_PCI
@ -122,7 +121,7 @@ endef
define KernelPackage/ath
$(call KernelPackage/mac80211/Default)
TITLE:=Atheros common driver part
DEPENDS+= @PCI_SUPPORT||USB_SUPPORT||TARGET_ar71xx||TARGET_ath79||TARGET_ath25 +kmod-mac80211
DEPENDS+= @PCI_SUPPORT||USB_SUPPORT||TARGET_ath79||TARGET_ath25 +kmod-mac80211
FILES:=$(PKG_BUILD_DIR)/drivers/net/wireless/ath/ath.ko
MENU:=1
endef
@ -187,7 +186,7 @@ define KernelPackage/ath9k-common
TITLE:=Atheros 802.11n wireless devices (common code for ath9k and ath9k_htc)
URL:=https://wireless.wiki.kernel.org/en/users/drivers/ath9k
HIDDEN:=1
DEPENDS+= @PCI_SUPPORT||USB_SUPPORT||TARGET_ar71xx||TARGET_ath79 +kmod-ath +@DRIVER_11N_SUPPORT +@DRIVER_11W_SUPPORT
DEPENDS+= @PCI_SUPPORT||USB_SUPPORT||TARGET_ath79 +kmod-ath +@DRIVER_11N_SUPPORT +@DRIVER_11W_SUPPORT
FILES:= \
$(PKG_BUILD_DIR)/drivers/net/wireless/ath/ath9k/ath9k_common.ko \
$(PKG_BUILD_DIR)/drivers/net/wireless/ath/ath9k/ath9k_hw.ko
@ -197,7 +196,7 @@ define KernelPackage/ath9k
$(call KernelPackage/mac80211/Default)
TITLE:=Atheros 802.11n PCI wireless cards support
URL:=https://wireless.wiki.kernel.org/en/users/drivers/ath9k
DEPENDS+= @PCI_SUPPORT||TARGET_ar71xx||TARGET_ath79 +kmod-ath9k-common
DEPENDS+= @PCI_SUPPORT||TARGET_ath79 +kmod-ath9k-common
FILES:= \
$(PKG_BUILD_DIR)/drivers/net/wireless/ath/ath9k/ath9k.ko
AUTOLOAD:=$(call AutoProbe,ath9k)
@ -226,7 +225,7 @@ define KernelPackage/ath9k/config
config ATH9K_UBNTHSR
bool "Support for Ubiquiti UniFi Outdoor+ access point"
depends on PACKAGE_kmod-ath9k && (TARGET_ar71xx_generic||TARGET_ath79)
depends on PACKAGE_kmod-ath9k && TARGET_ath79
default y
endef

31
package/kernel/mac80211/patches/subsys/370-mac80211-fix-misplaced-while-instead-of-if.patch Normal file
View File

@ -0,0 +1,31 @@
From 5981fe5b0529ba25d95f37d7faa434183ad618c5 Mon Sep 17 00:00:00 2001
From: Johannes Berg <johannes.berg@intel.com>
Date: Mon, 3 Aug 2020 11:02:10 +0200
Subject: [PATCH] mac80211: fix misplaced while instead of if
This never was intended to be a 'while' loop, it should've
just been an 'if' instead of 'while'. Fix this.
I noticed this while applying another patch from Ben that
intended to fix a busy loop at this spot.
Cc: stable@vger.kernel.org
Fixes: b16798f5b907 ("mac80211: mark station unauthorized before key removal")
Reported-by: Ben Greear <greearb@candelatech.com>
Link: https://lore.kernel.org/r/20200803110209.253009ae41ff.I3522aad099392b31d5cf2dcca34cbac7e5832dde@changeid
Signed-off-by: Johannes Berg <johannes.berg@intel.com>
---
net/mac80211/sta_info.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
--- a/net/mac80211/sta_info.c
+++ b/net/mac80211/sta_info.c
@@ -1051,7 +1051,7 @@ static void __sta_info_destroy_part2(str
might_sleep();
lockdep_assert_held(&local->sta_mtx);
- while (sta->sta_state == IEEE80211_STA_AUTHORIZED) {
+ if (sta->sta_state == IEEE80211_STA_AUTHORIZED) {
ret = sta_info_move_state(sta, IEEE80211_STA_ASSOC);
WARN_ON_ONCE(ret);
}

2
package/kernel/om-watchdog/Makefile
View File

@ -8,7 +8,7 @@
include $(TOPDIR)/rules.mk
PKG_NAME:=om-watchdog
PKG_RELEASE:=3
PKG_RELEASE:=4
include $(INCLUDE_DIR)/package.mk

36
package/kernel/om-watchdog/files/om-watchdog.init
View File

@ -13,41 +13,7 @@ PROG=/sbin/om-watchdog
get_gpio() {
local board=$(board_name)
if [ -r /lib/ar71xx.sh ]; then
case "$board" in
"a40"|\
"a60"|\
"mr1750"|\
"mr1750v2"|\
"mr900"|\
"mr900v2")
return 16
;;
"mr600v2")
return 15
;;
"om2p"|\
"om2p-hs"|\
"om2p-hsv2"|\
"om2p-hsv3"|\
"om2p-hsv4"|\
"om2pv4"|\
"om5p-acv2")
return 12
;;
"om2p-lc"|\
"om2pv2")
return 26
;;
"om5p"|\
"om5p-an")
return 11
;;
"om5p-ac")
return 17
;;
esac
elif [ "$board" = "teltonika,rut5xx" ]; then
if [ "$board" = "teltonika,rut5xx" ]; then
# ramips
return 11
else

93
package/libs/libaudit/Makefile Normal file
View File

@ -0,0 +1,93 @@
#
# This is free software, licensed under the GNU General Public License v2.
# See /LICENSE for more information.
#
include $(TOPDIR)/rules.mk
PKG_NAME:=libaudit
PKG_VERSION:=2.8.5
PKG_RELEASE:=1
PKG_SOURCE_NAME:=audit
PKG_SOURCE:=$(PKG_SOURCE_NAME)-$(PKG_VERSION).tar.gz
PKG_SOURCE_URL:=http://people.redhat.com/sgrubb/audit
PKG_HASH:=0e5d4103646e00f8d1981e1cd2faea7a2ae28e854c31a803e907a383c5e2ecb7
PKG_BUILD_DIR:=$(BUILD_DIR)/$(PKG_SOURCE_NAME)-$(PKG_VERSION)
PKG_MAINTAINER:=Thomas Petazzoni <thomas.petazzoni@bootlin.com>
PKG_LICENSE:=GPL-2.0
PKG_LICENSE_FILES:=COPYING
PKG_CPE_ID:=cpe:/a:linux_audit_project:linux_audit
PKG_FIXUP:=autoreconf
PKG_USE_MIPS16:=0
PKG_INSTALL:=1
include $(INCLUDE_DIR)/package.mk
include $(INCLUDE_DIR)/host-build.mk
define Package/libaudit
CATEGORY:=Libraries
TITLE:=Linux Auditing Framework (shared library)
URL:=http://people.redhat.com/sgrubb/audit/
endef
define Package/libaudit/description
This package contains the audit shared library.
endef
CONFIGURE_VARS += \
LDFLAGS_FOR_BUILD="$(HOST_LDFLAGS)" \
CPPFLAGS_FOR_BUILD="$(HOST_CPPFLAGS)" \
CFLAGS_FOR_BUILD="$(HOST_CFLAGS)" \
CC_FOR_BUILD="$(HOSTCC)"
CONFIGURE_ARGS += \
--without-libcap-ng \
--disable-systemd \
--without-python \
--without-python3 \
--disable-zos-remote
HOST_CONFIGURE_ARGS += \
--without-python \
--without-python3 \
--disable-zos-remote \
--without-libcap-ng
ifeq ($(ARCH),aarch64)
CONFIGURE_ARGS += --with-aarch64
else ifeq ($(ARCH),arm)
CONFIGURE_ARGS += --with-arm
endif
# We can't use the default, as the default passes $(MAKE_ARGS), which
# overrides CC, CFLAGS, etc. and defeats the *_FOR_BUILD definitions
# passed in CONFIGURE_VARS
define Build/Compile
$(MAKE) $(PKG_JOBS) -C $(PKG_BUILD_DIR)/$(MAKE_PATH)/lib
endef
define Build/Install
$(MAKE) $(PKG_JOBS) -C $(PKG_BUILD_DIR)/$(MAKE_PATH)/lib $(MAKE_INSTALL_FLAGS) install
$(MAKE) $(PKG_JOBS) -C $(PKG_BUILD_DIR)/$(MAKE_PATH)/init.d $(MAKE_INSTALL_FLAGS) install
endef
define Build/InstallDev
$(INSTALL_DIR) $(1)/usr/include
$(CP) $(PKG_INSTALL_DIR)/usr/include/* $(1)/usr/include/
$(INSTALL_DIR) $(1)/usr/lib/pkgconfig
$(INSTALL_DATA) $(PKG_INSTALL_DIR)/usr/lib/pkgconfig/*.pc $(1)/usr/lib/pkgconfig/
$(INSTALL_DIR) $(1)/usr/lib
$(CP) $(PKG_INSTALL_DIR)/usr/lib/* $(1)/usr/lib/
endef
define Package/libaudit/install
$(INSTALL_DIR) $(1)/usr/lib
$(CP) $(PKG_INSTALL_DIR)/usr/lib/*.so.* $(1)/usr/lib/
$(INSTALL_DIR) $(1)/etc
$(CP) $(PKG_INSTALL_DIR)/etc/libaudit.conf $(1)/etc/
endef
$(eval $(call BuildPackage,libaudit))

133
package/libs/libaudit/patches/0001-Add-substitue-functions-for-strndupa-rawmemchr.patch Normal file
View File

@ -0,0 +1,133 @@
From c39a071e7c021f6ff3554aca2758e97b47a9777c Mon Sep 17 00:00:00 2001
From: Steve Grubb <sgrubb@redhat.com>
Date: Tue, 26 Feb 2019 18:33:33 -0500
Subject: [PATCH] Add substitue functions for strndupa & rawmemchr
(cherry picked from commit d579a08bb1cde71f939c13ac6b2261052ae9f77e)
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@bootlin.com>
---
auparse/auparse.c | 12 +++++++++++-
auparse/interpret.c | 9 ++++++++-
configure.ac | 14 +++++++++++++-
src/ausearch-lol.c | 12 +++++++++++-
4 files changed, 43 insertions(+), 4 deletions(-)
diff --git a/auparse/auparse.c b/auparse/auparse.c
index 650db02..2e1c737 100644
--- a/auparse/auparse.c
+++ b/auparse/auparse.c
@@ -1,5 +1,5 @@
/* auparse.c --
- * Copyright 2006-08,2012-17 Red Hat Inc., Durham, North Carolina.
+ * Copyright 2006-08,2012-19 Red Hat Inc., Durham, North Carolina.
* All Rights Reserved.
*
* This library is free software; you can redistribute it and/or
@@ -1118,6 +1118,16 @@ static int str2event(char *s, au_event_t *e)
return 0;
}
+#ifndef HAVE_STRNDUPA
+static inline char *strndupa(const char *old, size_t n)
+{
+ size_t len = strnlen(old, n);
+ char *tmp = alloca(len + 1);
+ tmp[len] = 0;
+ return memcpy(tmp, old, len);
+}
+#endif
+
/* Returns 0 on success and 1 on error */
static int extract_timestamp(const char *b, au_event_t *e)
{
diff --git a/auparse/interpret.c b/auparse/interpret.c
index 51c4a5e..67b7b77 100644
--- a/auparse/interpret.c
+++ b/auparse/interpret.c
@@ -853,6 +853,13 @@ err_out:
return print_escaped(id->val);
}
+// rawmemchr is faster. Let's use it if we have it.
+#ifdef HAVE_RAWMEMCHR
+#define STRCHR rawmemchr
+#else
+#define STRCHR strchr
+#endif
+
static const char *print_proctitle(const char *val)
{
char *out = (char *)print_escaped(val);
@@ -863,7 +870,7 @@ static const char *print_proctitle(const char *val)
// Proctitle has arguments separated by NUL bytes
// We need to write over the NUL bytes with a space
// so that we can see the arguments
- while ((ptr = rawmemchr(ptr, '\0'))) {
+ while ((ptr = STRCHR(ptr, '\0'))) {
if (ptr >= end)
break;
*ptr = ' ';
diff --git a/configure.ac b/configure.ac
index 6e345f1..6f3007e 100644
--- a/configure.ac
+++ b/configure.ac
@@ -1,7 +1,7 @@
dnl
define([AC_INIT_NOTICE],
[### Generated automatically using autoconf version] AC_ACVERSION [
-### Copyright 2005-18 Steve Grubb <sgrubb@redhat.com>
+### Copyright 2005-19 Steve Grubb <sgrubb@redhat.com>
###
### Permission is hereby granted, free of charge, to any person obtaining a
### copy of this software and associated documentation files (the "Software"),
@@ -72,6 +72,18 @@ dnl; posix_fallocate is used in audisp-remote
AC_CHECK_FUNCS([posix_fallocate])
dnl; signalfd is needed for libev
AC_CHECK_FUNC([signalfd], [], [ AC_MSG_ERROR([The signalfd system call is necessary for auditd]) ])
+dnl; check if rawmemchr is available
+AC_CHECK_FUNCS([rawmemchr])
+dnl; check if strndupa is available
+AC_LINK_IFELSE(
+ [AC_LANG_SOURCE(
+ [[
+ #define _GNU_SOURCE
+ #include <string.h>
+ int main() { (void) strndupa("test", 10); return 0; }]])],
+ [AC_DEFINE(HAVE_STRNDUPA, 1, [Let us know if we have it or not])],
+ []
+)
ALLWARNS=""
ALLDEBUG="-g"
diff --git a/src/ausearch-lol.c b/src/ausearch-lol.c
index 5d17a72..758c33e 100644
--- a/src/ausearch-lol.c
+++ b/src/ausearch-lol.c
@@ -1,6 +1,6 @@
/*
* ausearch-lol.c - linked list of linked lists library
-* Copyright (c) 2008,2010,2014,2016 Red Hat Inc., Durham, North Carolina.
+* Copyright (c) 2008,2010,2014,2016,2019 Red Hat Inc., Durham, North Carolina.
* All Rights Reserved.
*
* This software may be freely redistributed and/or modified under the
@@ -152,6 +152,16 @@ static int compare_event_time(event *e1, event *e2)
return 0;
}
+#ifndef HAVE_STRNDUPA
+static inline char *strndupa(const char *old, size_t n)
+{
+ size_t len = strnlen(old, n);
+ char *tmp = alloca(len + 1);
+ tmp[len] = 0;
+ return memcpy(tmp, old, len);
+}
+#endif
+
/*
* This function will look at the line and pick out pieces of it.
*/
--
2.21.0

26
package/libs/libaudit/patches/0002-fix-gcc-10.patch Normal file
View File

@ -0,0 +1,26 @@
From 017e6c6ab95df55f34e339d2139def83e5dada1f Mon Sep 17 00:00:00 2001
From: Steve Grubb <sgrubb@redhat.com>
Date: Fri, 10 Jan 2020 21:13:50 -0500
Subject: [PATCH 01/30] Header definitions need to be external when building
with -fno-common (which is default in GCC 10) - Tony Jones
---
src/ausearch-common.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/ausearch-common.h b/src/ausearch-common.h
index 6669203..3040547 100644
--- a/src/ausearch-common.h
+++ b/src/ausearch-common.h
@@ -50,7 +50,7 @@ extern pid_t event_pid;
extern int event_exact_match;
extern uid_t event_uid, event_euid, event_loginuid;
extern const char *event_tuid, *event_teuid, *event_tauid;
-slist *event_node_list;
+extern slist *event_node_list;
extern const char *event_comm;
extern const char *event_filename;
extern const char *event_hostname;
--
2.26.2

18
package/libs/libcxx/Makefile
View File

@ -7,19 +7,20 @@
include $(TOPDIR)/rules.mk
PKG_NAME:=libcxx
PKG_VERSION:=9.0.1
PKG_RELEASE:=4
PKG_VERSION:=10.0.0
PKG_RELEASE:=1
PKG_SOURCE_PROTO:=git
PKG_SOURCE_URL:=https://git.llvm.org/git/libcxx
PKG_SOURCE_VERSION:=2076f539f410805ef88692b9c0ce0a0b882a7680
PKG_MIRROR_HASH:=d527880a18dec9109575c76717cf5288fb91c11381b9d261cae2e5bebcbdab2e
PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).src.tar.xz
PKG_SOURCE_URL:=https://github.com/llvm/llvm-project/releases/download/llvmorg-$(PKG_VERSION)
PKG_HASH:=270f8a3f176f1981b0f6ab8aa556720988872ec2b48ed3b605d0ced8d09156c7
PKG_BUILD_DIR:=$(BUILD_DIR)/$(PKG_NAME)-$(PKG_VERSION).src
PKG_MAINTAINER:=Rosen Penev <rosenp@gmail.com>
PKG_LICENSE:=MIT
PKG_LICENSE_FILES:=LICENSE.txt
PKG_BUILD_PARALLEL:=1
PKG_BUILD_DEPENDS:=libcxxabi
CMAKE_BINARY_SUBDIR:=build
include $(INCLUDE_DIR)/package.mk
@ -34,12 +35,11 @@ define Package/libcxx
endef
define Package/libcxx/description
LLVM C++ library targeting C++11 and above
libc++ is an implementation of the C++ standard library, targeting C++11, C++14 and above.
endef
CMAKE_OPTIONS += \
-DLIBCXX_CXX_ABI="libsupc++" \
-DLIBCXX_CXX_ABI_INCLUDE_PATHS="$(TOOLCHAIN_DIR)/$(REAL_GNU_TARGET_NAME)/include/c++/$(CONFIG_GCC_VERSION);$(TOOLCHAIN_DIR)/$(REAL_GNU_TARGET_NAME)/include/c++/$(CONFIG_GCC_VERSION)/$(REAL_GNU_TARGET_NAME)" \
-DLIBCXX_CXX_ABI="libcxxabi" \
-DLIBCXX_ENABLE_ASSERTIONS=OFF \
-DLIBCXX_ENABLE_EXPERIMENTAL_LIBRARY=OFF \
-DLIBCXX_INCLUDE_BENCHMARKS=OFF \

4
package/libs/libcxx/files/g++-libcxx
View File

@ -13,7 +13,7 @@ do
-static) [ "$WRAPPER_LIBS" != "-lc -lgcc_s -lssp_nonshared -lgcc_eh" ] && WRAPPER_LIBS="-lc -lgcc_s -lssp_nonshared -lgcc_eh" ;;
esac
done
[ "$WRAPPER_INCLIB" = "Y" ] && WRAPPER_OPTIONS="-nodefaultlibs $WRAPPER_LIBDIR -lc++ -lsupc++ $WRAPPER_LIBS"
[ "$WRAPPER_INCLIB" = "Y" ] && WRAPPER_OPTIONS="-nodefaultlibs $WRAPPER_LIBDIR -lc++ -lc++abi $WRAPPER_LIBS"
exec CXX -fno-builtin -nostdinc++ -DGCC_HASCLASSVISIBILITY "$WRAPPER_INCLUDEDIR" "$@" $WRAPPER_OPTIONS
exec CXX -nostdinc++ -DGCC_HASCLASSVISIBILITY "$WRAPPER_INCLUDEDIR" "$@" $WRAPPER_OPTIONS

14
package/libs/libcxx/patches/010-cxx17.patch
View File

@ -1,14 +0,0 @@
--- a/CMakeLists.txt
+++ b/CMakeLists.txt
@@ -524,9 +524,9 @@ remove_flags(-Wno-pedantic -pedantic-err
if (LIBCXX_HAS_MUSL_LIBC OR LIBCXX_TARGETING_CLANG_CL)
# musl's pthread implementations uses volatile types in their structs which is
# not a constexpr in C++11 but is in C++14, so we use C++14 with musl.
- set(LIBCXX_STANDARD_VER c++14 CACHE STRING "internal option to change build dialect")
+ set(LIBCXX_STANDARD_VER c++2a CACHE STRING "internal option to change build dialect")
else()
- set(LIBCXX_STANDARD_VER c++11 CACHE STRING "internal option to change build dialect")
+ set(LIBCXX_STANDARD_VER c++2a CACHE STRING "internal option to change build dialect")
endif()
add_compile_flags_if_supported(-std=${LIBCXX_STANDARD_VER})
add_compile_flags_if_supported("/std:${LIBCXX_STANDARD_VER}")

13
package/libs/libcxx/patches/010-ssp.patch Normal file
View File

@ -0,0 +1,13 @@
--- a/CMakeLists.txt
+++ b/CMakeLists.txt
@@ -760,6 +760,10 @@ function(cxx_link_system_libraries targe
target_link_libraries(${target} PRIVATE atomic)
endif()
+ if (LIBCXX_HAS_MUSL_LIBC)
+ target_link_libraries(${target} PRIVATE ssp_nonshared)
+ endif()
+
if (MINGW)
target_link_libraries(${target} PRIVATE "${MINGW_LIBRARIES}")
endif()

35
package/libs/libcxx/patches/020-fixes.patch
View File

@ -1,35 +0,0 @@
--- a/include/cmath
+++ b/include/cmath
@@ -615,7 +615,7 @@ _Fp __lerp(_Fp __a, _Fp __b, _Fp __t) no
if (__t == 1) return __b;
const _Fp __x = __a + __t * (__b - __a);
- if (__t > 1 == __b > __a)
+ if ((__t > 1) == (__b > __a))
return __b < __x ? __x : __b;
else
return __x < __b ? __x : __b;
--- a/include/memory
+++ b/include/memory
@@ -1696,7 +1696,7 @@ struct _LIBCPP_TEMPLATE_VIS allocator_tr
ptrdiff_t _Np = __end1 - __begin1;
__end2 -= _Np;
if (_Np > 0)
- _VSTD::memcpy(__end2, __begin1, _Np * sizeof(_Tp));
+ __end2 = __begin1;
}
private:
--- a/src/filesystem/filesystem_common.h
+++ b/src/filesystem/filesystem_common.h
@@ -197,8 +197,8 @@ private:
using chrono::duration;
using chrono::duration_cast;
-using TimeSpec = struct ::timespec;
-using StatT = struct ::stat;
+using TimeSpec = struct timespec;
+using StatT = struct stat;
template <class FileTimeT, class TimeT,
bool IsFloat = is_floating_point<typename FileTimeT::rep>::value>

71
package/libs/libcxxabi/Makefile Normal file
View File

@ -0,0 +1,71 @@
#
# This is free software, licensed under the GNU General Public License v2.
# See /LICENSE for more information.
#
include $(TOPDIR)/rules.mk
PKG_NAME:=libcxxabi
PKG_VERSION:=10.0.0
PKG_RELEASE:=1
PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).src.tar.xz
PKG_SOURCE_URL:=https://github.com/llvm/llvm-project/releases/download/llvmorg-$(PKG_VERSION)
PKG_HASH:=e71bac75a88c9dde455ad3f2a2b449bf745eafd41d2d8432253b2964e0ca14e1
PKG_BUILD_DIR:=$(BUILD_DIR)/$(PKG_NAME)-$(PKG_VERSION).src
PKG_MAINTAINER:=Rosen Penev <rosenp@gmail.com>
PKG_LICENSE:=MIT
PKG_LICENSE_FILES:=LICENSE.txt
PKG_BUILD_PARALLEL:=1
CMAKE_BINARY_SUBDIR:=build
include $(INCLUDE_DIR)/package.mk
include $(INCLUDE_DIR)/cmake.mk
define Package/libcxxabi
SECTION:=libs
CATEGORY:=Libraries
TITLE:=LLVM lib++abi
URL:=https://libcxxabi.llvm.org/
DEPENDS:=+libpthread
BUILDONLY:=1
endef
define Package/libcxxabi/description
libc++abi is a new implementation of low level support for a standard C++ library.
endef
CMAKE_OPTIONS += \
-DLIBCXXABI_ENABLE_EXCEPTIONS=ON \
-DLIBCXXABI_ENABLE_PEDANTIC=OFF \
-DLIBCXXABI_ENABLE_PIC=ON \
-DLIBCXXABI_ENABLE_WERROR=OFF \
-DLIBCXXABI_USE_LLVM_UNWINDER=OFF \
-DLIBCXXABI_USE_COMPILER_RT=OFF \
-DLIBCXXABI_ENABLE_THREADS=ON \
-DLIBCXXABI_HAS_PTHREAD_API=ON \
-DLIBCXXABI_INCLUDE_TESTS=OFF \
-DLIBCXXABI_LIBDIR_SUFFIX="" \
-DLIBCXXABI_INSTALL_LIBRARY=ON \
-DLIBCXXABI_ENABLE_SHARED=OFF \
-DLIBCXXABI_LIBCXX_SRC_DIR=$(BUILD_DIR)/libcxx-$(PKG_VERSION).src \
-DLIBCXXABI_LIBCXX_INCLUDES=$(BUILD_DIR)/libcxx-$(PKG_VERSION).src/include
TARGET_CXXFLAGS += -flto
TARGET_LDFLAGS += -Wl,--gc-sections,--as-needed
define Build/Prepare
$(MAKE) -C $(TOPDIR)/package/libs/libcxx prepare
$(call Build/Prepare/Default)
endef
define Build/InstallDev
$(call Build/InstallDev/cmake,$(1))
$(INSTALL_DIR) $(1)/usr/include/
$(INSTALL_DATA) $(PKG_BUILD_DIR)/include/*.h $(1)/usr/include/
endef
$(eval $(call BuildPackage,libcxxabi))

27
package/libs/libcxxabi/patches/010-arm.patch Normal file
View File

@ -0,0 +1,27 @@
--- a/src/cxa_exception.h
+++ b/src/cxa_exception.h
@@ -27,6 +27,13 @@ _LIBCXXABI_HIDDEN uint64_t __getExceptio
_LIBCXXABI_HIDDEN void __setExceptionClass ( _Unwind_Exception*, uint64_t);
_LIBCXXABI_HIDDEN bool __isOurExceptionClass(const _Unwind_Exception*);
+#if defined(__arm__) && defined(__GNUC__)
+// missing values from _Unwind_Reason_Code enum
+#define _URC_FATAL_PHASE2_ERROR ((_Unwind_Reason_Code)2)
+#define _URC_FATAL_PHASE1_ERROR ((_Unwind_Reason_Code)3)
+#define _URC_NORMAL_STOP ((_Unwind_Reason_Code)4)
+#endif
+
struct _LIBCXXABI_HIDDEN __cxa_exception {
#if defined(__LP64__) || defined(_WIN64) || defined(_LIBCXXABI_ARM_EHABI)
// Now _Unwind_Exception is marked with __attribute__((aligned)),
--- a/src/cxa_personality.cpp
+++ b/src/cxa_personality.cpp
@@ -1108,7 +1108,7 @@ __gxx_personality_v0(_Unwind_State state
// Check the undocumented force unwinding behavior
bool is_force_unwinding = state & _US_FORCE_UNWIND;
- state &= ~_US_FORCE_UNWIND;
+ state = (_Unwind_State)(state & ~_US_FORCE_UNWIND);
scan_results results;
switch (state) {

71
package/libs/libsemanage/Makefile Normal file
View File

@ -0,0 +1,71 @@
#
# This is free software, licensed under the GNU General Public License v2.
# See /LICENSE for more information.
#
include $(TOPDIR)/rules.mk
PKG_NAME:=libsemanage
PKG_VERSION:=3.1
PKG_RELEASE:=1
PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.gz
PKG_SOURCE_URL:=https://github.com/SELinuxProject/selinux/releases/download/20200710
PKG_HASH:=22d6c75526e40d1781c30bcf29abf97171bdfe6780923f11c8e1c76a75a21ff8
PKG_MAINTAINER:=Thomas Petazzoni <thomas.petazzoni@bootlin.com>
PKG_LICENSE:=LGPL-2.1
PKG_LICENSE_FILES:=COPYING
PKG_CPE_ID:=cpe:/a:selinuxproject:libsemanage
HOST_BUILD_DEPENDS:=audit/host libselinux/host bzip2/host
include $(INCLUDE_DIR)/package.mk
include $(INCLUDE_DIR)/host-build.mk
PKG_INSTALL:=1
define Package/libsemanage
SECTION:=libs
DEPENDS:=+libaudit +libselinux +libbz2
CATEGORY:=Libraries
TITLE:=SELinux policy management library
URL:=http://selinuxproject.org/page/Main_Page
endef
define Package/libsemanage/description
libsemanage is the policy management library. It uses
libsepol for binary policy manipulation and libselinux for
interacting with the SELinux system. It also exec's helper
programs for loading policy and for checking whether the
file_contexts configuration is valid (load_policy and
setfiles from policycoreutils) presently, although this may
change at least for the bootstrapping case (for rpm).
endef #'
HOST_MAKE_FLAGS += \
DESTDIR=$(STAGING_DIR_HOSTPKG) \
PREFIX=""
define Build/Configure
endef
define Build/InstallDev
$(INSTALL_DIR) $(1)/usr/include
$(CP) $(PKG_INSTALL_DIR)/usr/include/* $(1)/usr/include/
$(INSTALL_DIR) $(1)/usr/lib/pkgconfig
$(INSTALL_DATA) $(PKG_INSTALL_DIR)/usr/lib/pkgconfig/libsemanage.pc $(1)/usr/lib/pkgconfig/
$(INSTALL_DIR) $(1)/usr/lib
$(CP) $(PKG_INSTALL_DIR)/usr/lib/* $(1)/usr/lib/
endef
define Package/libsemanage/install
$(INSTALL_DIR) $(1)/usr/lib
$(CP) $(PKG_INSTALL_DIR)/usr/lib/libsemanage.so.* $(1)/usr/lib/
endef
$(eval $(call HostBuild))
$(eval $(call BuildPackage,libsemanage))

44
package/libs/nghttp2/Makefile
View File

@ -1,44 +0,0 @@
include $(TOPDIR)/rules.mk
PKG_NAME:=nghttp2
PKG_VERSION:=1.41.0
PKG_RELEASE:=1
PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.xz
PKG_SOURCE_URL:=https://github.com/nghttp2/nghttp2/releases/download/v$(PKG_VERSION)
PKG_HASH:=abc25b8dc601f5b3fefe084ce50fcbdc63e3385621bee0cbfa7b57f9ec3e67c2
PKG_LICENSE:=MIT
PKG_LICENSE_FILES:=COPYING
CMAKE_INSTALL:=1
include $(INCLUDE_DIR)/package.mk
include $(INCLUDE_DIR)/cmake.mk
define Package/libnghttp2
SECTION:=libs
CATEGORY:=Libraries
TITLE:=Library implementing the framing layer of HTTP/2
MAINTAINER:=Hans Dedecker <dedeckeh@gmail.com>
ABI_VERSION:=14
endef
define Package/libnghttp2/description
C library implementing the framing layer of the HTTP/2 protocol. It can be used to build a HTTP/2-capable HTTP client or server
endef
CMAKE_OPTIONS += \
-DENABLE_LIB_ONLY=ON
define Build/InstallDev
$(call Build/InstallDev/cmake,$(1))
$(SED) 's,/usr/include,$$$${prefix}/include,g' $(1)/usr/lib/pkgconfig/libnghttp2.pc
$(SED) 's,/usr/lib,$$$${prefix}/lib,g' $(1)/usr/lib/pkgconfig/libnghttp2.pc
endef
define Package/libnghttp2/install
$(INSTALL_DIR) $(1)/usr/lib
$(CP) $(PKG_INSTALL_DIR)/usr/lib/libnghttp2.so.* $(1)/usr/lib
endef
$(eval $(call BuildPackage,libnghttp2))

4
package/libs/wolfssl/Config.in
View File

@ -16,6 +16,10 @@ config WOLFSSL_HAS_ARC4
bool "Include ARC4 support"
default y
config WOLFSSL_HAS_CERTGEN
bool "Include certificate generation support"
default y
config WOLFSSL_HAS_TLSV10
bool "Include TLS 1.0 support"
default y

3
package/libs/wolfssl/Makefile
View File

@ -31,7 +31,7 @@ PKG_CONFIG_DEPENDS:=\
CONFIG_WOLFSSL_HAS_DH CONFIG_WOLFSSL_HAS_DTLS \
CONFIG_WOLFSSL_HAS_ECC25519 CONFIG_WOLFSSL_HAS_OCSP \
CONFIG_WOLFSSL_HAS_SESSION_TICKET CONFIG_WOLFSSL_HAS_TLSV10 \
CONFIG_WOLFSSL_HAS_TLSV13 CONFIG_WOLFSSL_HAS_WPAS
CONFIG_WOLFSSL_HAS_TLSV13 CONFIG_WOLFSSL_HAS_WPAS CONFIG_WOLFSSL_HAS_CERTGEN
include $(INCLUDE_DIR)/package.mk
@ -67,6 +67,7 @@ CONFIGURE_ARGS += \
--disable-jobserver \
--$(if $(CONFIG_IPV6),enable,disable)-ipv6 \
--$(if $(CONFIG_WOLFSSL_HAS_AES_CCM),enable,disable)-aesccm \
--$(if $(CONFIG_WOLFSSL_HAS_CERTGEN),enable,disable)-certgen \
--$(if $(CONFIG_WOLFSSL_HAS_CHACHA_POLY),enable,disable)-chacha \
--$(if $(CONFIG_WOLFSSL_HAS_CHACHA_POLY),enable,disable)-poly1305 \
--$(if $(CONFIG_WOLFSSL_HAS_DH),enable,disable)-dh \

162
package/network/utils/bpftools/Makefile Normal file
View File

@ -0,0 +1,162 @@
#
# Copyright (C) 2020 Tony Ambardar <itugrok@yahoo.com>
#
# This is free software, licensed under the GNU General Public License v2.
# See /LICENSE for more information.
#
include $(TOPDIR)/rules.mk
PKG_NAME:=bpftools
PKG_VERSION:=5.8.3
PKG_RELEASE:=1
PKG_SOURCE:=linux-$(PKG_VERSION).tar.xz
PKG_SOURCE_URL:=@KERNEL/linux/kernel/v5.x
PKG_HASH:=8ea27e1ed38981f772cc6d5f16ab8dbb8052c3800ba0494bd798fbb95dcc1779
PKG_MAINTAINER:=Tony Ambardar <itugrok@yahoo.com>
PKG_USE_MIPS16:=0
PKG_BUILD_PARALLEL:=1
PKG_INSTALL:=1
LINUX_VERSION:=$(PKG_VERSION)
LINUX_TLD:=linux-$(LINUX_VERSION)
BPF_FILES:= \
kernel/bpf scripts tools/Makefile tools/bpf tools/perf/perf-sys.h \
tools/arch tools/build tools/include tools/lib tools/scripts
TAR_OPTIONS+= \
--transform="s;$(LINUX_TLD)/;$(PKG_NAME)-$(PKG_VERSION)/;" \
$(addprefix $(LINUX_TLD)/,$(BPF_FILES))
include $(INCLUDE_DIR)/package.mk
define Package/bpftool/Default
SECTION:=net
CATEGORY:=Network
TITLE:=bpftool - eBPF subsystem utility
LICENSE:=GPL-2.0-only OR BSD-2-Clause
URL:=http://www.kernel.org
DEPENDS:=+libelf
endef
define Package/bpftool-minimal
$(call Package/bpftool/Default)
TITLE+= (Minimal)
VARIANT:=minimal
DEFAULT_VARIANT:=1
PROVIDES:=bpftool
ALTERNATIVES:=200:/usr/sbin/bpftool:/usr/libexec/bpftool-minimal
endef
define Package/bpftool-full
$(call Package/bpftool/Default)
TITLE+= (Full)
VARIANT:=full
PROVIDES:=bpftool
ALTERNATIVES:=300:/usr/sbin/bpftool:/usr/libexec/bpftool-full
DEPENDS+= +libbfd +libopcodes
endef
define Package/bpftool-minimal/description
A tool for inspection and simple manipulation of eBPF programs and maps.
endef
define Package/bpftool-full/description
A tool for inspection and simple manipulation of eBPF programs and maps.
This full version uses libbfd and libopcodes to support disassembly of
eBPF programs and jited code.
endef
define Package/libbpf
SECTION:=libs
CATEGORY:=Libraries
TITLE:=libbpf - eBPF helper library
VARIANT:=lib
LICENSE:=LGPL-2.1 OR BSD-2-Clause
ABI_VERSION:=0
URL:=http://www.kernel.org
DEPENDS:=+libelf
endef
define Package/libbpf/description
libbpf is a library for loading eBPF programs and reading and manipulating eBPF objects from user-space.
endef
# LTO not compatible with DSO using PIC
ifneq ($(BUILD_VARIANT),lib)
TARGET_CFLAGS += -ffunction-sections -fdata-sections -flto
TARGET_LDFLAGS += -Wl,--gc-sections
endif
MAKE_FLAGS += \
EXTRA_CFLAGS="$(TARGET_CFLAGS) $(TARGET_CPPFLAGS)" \
LDFLAGS="$(TARGET_LDFLAGS)" \
BPFTOOL_VERSION="$(LINUX_VERSION)" \
FEATURES_DUMP="$(PKG_BUILD_DIR)/FEATURE-DUMP.openwrt" \
OUTPUT="$(PKG_BUILD_DIR)/" \
prefix="/usr" \
$(if $(findstring c,$(OPENWRT_VERBOSE)),V=1,V='')
ifeq ($(BUILD_VARIANT),full)
HAVE_LIBBFD:=1
HAVE_LIBCAP:=0
HAVE_CLANG:=0
MAKE_PATH:=tools/bpf/bpftool
else ifeq ($(BUILD_VARIANT),minimal)
HAVE_LIBBFD:=0
HAVE_LIBCAP:=0
HAVE_CLANG:=0
MAKE_PATH:=tools/bpf/bpftool
else ifeq ($(BUILD_VARIANT),lib)
HAVE_LIBBFD:=0
HAVE_LIBCAP:=0
HAVE_CLANG:=0
MAKE_PATH:=tools/lib/bpf
endif
# Perform a "throw-away" make to create a FEATURE-DUMP.* file to edit later.
# The "//" in the make target is actually needed, very unPOSIXly.
define Build/Configure
+$(MAKE_VARS) $(MAKE) $(PKG_JOBS) -C $(PKG_BUILD_DIR)/tools/bpf/bpftool \
$(MAKE_FLAGS) FEATURES_DUMP= $(PKG_BUILD_DIR)//libbpf/libbpf.a
(cd $(PKG_BUILD_DIR); cat FEATURE-DUMP.bpftool libbpf/FEATURE-DUMP.libbpf \
| sort | uniq > FEATURE-DUMP.openwrt)
$(SED) 's/feature-libbfd=[01]/feature-libbfd=$(HAVE_LIBBFD)/' \
-e 's/feature-libcap=[01]/feature-libcap=$(HAVE_LIBCAP)/' \
-e 's/feature-clang-bpf-global-var=[01]/feature-clang-bpf-global-var=$(HAVE_CLANG)/' \
$(PKG_BUILD_DIR)/FEATURE-DUMP.openwrt
endef
define Build/InstallDev/libbpf
$(INSTALL_DIR) $(1)/usr/include/bpf
$(CP) $(PKG_INSTALL_DIR)/usr/include/bpf/*.h $(1)/usr/include/bpf/
$(INSTALL_DIR) $(1)/usr/lib
$(CP) $(PKG_INSTALL_DIR)/usr/lib$(LIB_SUFFIX)/libbpf.{a,so*} \
$(1)/usr/lib/
$(INSTALL_DIR) $(1)/usr/lib/pkgconfig
$(CP) $(PKG_INSTALL_DIR)/usr/lib$(LIB_SUFFIX)/pkgconfig/libbpf.pc \
$(1)/usr/lib/pkgconfig/
endef
ifeq ($(BUILD_VARIANT),lib)
Build/InstallDev=$(Build/InstallDev/libbpf)
endif
define Package/bpftool-$(BUILD_VARIANT)/install
$(INSTALL_DIR) $(1)/usr/libexec
$(INSTALL_BIN) $(PKG_INSTALL_DIR)/usr/sbin/bpftool \
$(1)/usr/libexec/bpftool-$(BUILD_VARIANT)
endef
define Package/libbpf/install
$(INSTALL_DIR) $(1)/usr/lib
$(CP) $(PKG_INSTALL_DIR)/usr/lib$(LIB_SUFFIX)/libbpf.so.* $(1)/usr/lib/
endef
$(eval $(call BuildPackage,bpftool-full))
$(eval $(call BuildPackage,bpftool-minimal))
$(eval $(call BuildPackage,libbpf))

36
package/network/utils/bpftools/patches/001-libbpf-ensure-no-local-symbols-counted-in-ABI-check.patch Normal file
View File

@ -0,0 +1,36 @@
From fafb2e7eaec6d33ce16e28f481edf781219d5d27 Mon Sep 17 00:00:00 2001
From: Tony Ambardar <Tony.Ambardar@gmail.com>
Date: Fri, 24 Jul 2020 23:58:17 -0700
Subject: [PATCH] tools/libbpf: ensure no local symbols counted in ABI check
This avoids finding versioned local symbols such as _init and _fini in
the libbpf.so file.
Signed-off-by: Tony Ambardar <Tony.Ambardar@gmail.com>
---
tools/lib/bpf/Makefile | 2 ++
1 file changed, 2 insertions(+)
diff --git a/tools/lib/bpf/Makefile b/tools/lib/bpf/Makefile
index bf8ed134cb8a..c820b0be9d63 100644
--- a/tools/lib/bpf/Makefile
+++ b/tools/lib/bpf/Makefile
@@ -152,6 +152,7 @@ GLOBAL_SYM_COUNT = $(shell readelf -s --wide $(BPF_IN_SHARED) | \
awk '/GLOBAL/ && /DEFAULT/ && !/UND/ {print $$NF}' | \
sort -u | wc -l)
VERSIONED_SYM_COUNT = $(shell readelf --dyn-syms --wide $(OUTPUT)libbpf.so | \
+ awk '/GLOBAL/ && /DEFAULT/ && !/UND/ {print $$NF}' | \
grep -Eo '[^ ]+@LIBBPF_' | cut -d@ -f1 | sort -u | wc -l)
CMD_TARGETS = $(LIB_TARGET) $(PC_FILE)
@@ -219,6 +220,7 @@ check_abi: $(OUTPUT)libbpf.so
awk '/GLOBAL/ && /DEFAULT/ && !/UND/ {print $$NF}'| \
sort -u > $(OUTPUT)libbpf_global_syms.tmp; \
readelf --dyn-syms --wide $(OUTPUT)libbpf.so | \
+ awk '/GLOBAL/ && /DEFAULT/ && !/UND/ {print $$NF}'| \
grep -Eo '[^ ]+@LIBBPF_' | cut -d@ -f1 | \
sort -u > $(OUTPUT)libbpf_versioned_syms.tmp; \
diff -u $(OUTPUT)libbpf_global_syms.tmp \
--
2.25.1

46
package/network/utils/bpftools/patches/002-libbpf-fix-build-failure-from-uninitialized-variable.patch Normal file
View File

@ -0,0 +1,46 @@
From 74d0dcf7608b1bab116e297468ac51b57eb97ce0 Mon Sep 17 00:00:00 2001
From: Tony Ambardar <Tony.Ambardar@gmail.com>
Date: Thu, 20 Aug 2020 10:06:24 -0700
Subject: [PATCH] libbpf: fix build failure from uninitialized variable warning
While compiling libbpf, some GCC versions (at least 8.4.0) have difficulty
determining control flow and a emit warning for potentially uninitialized
usage of 'map', which results in a build error if using "-Werror":
In file included from libbpf.c:56:
libbpf.c: In function '__bpf_object__open':
libbpf_internal.h:59:2: warning: 'map' may be used uninitialized in this function [-Wmaybe-uninitialized]
libbpf_print(level, "libbpf: " fmt, ##__VA_ARGS__); \
^~~~~~~~~~~~
libbpf.c:5032:18: note: 'map' was declared here
struct bpf_map *map, *targ_map;
^~~
The warning/error is false based on code inspection, so silence it with a
NULL initialization.
Fixes: 646f02ffdd49 ("libbpf: Add BTF-defined map-in-map support")
Ref: 063e68813391 ("libbpf: Fix false uninitialized variable warning")
Signed-off-by: Tony Ambardar <Tony.Ambardar@gmail.com>
---
tools/lib/bpf/libbpf.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/tools/lib/bpf/libbpf.c b/tools/lib/bpf/libbpf.c
index 11e4725b8b1c..a72296797357 100644
--- a/tools/lib/bpf/libbpf.c
+++ b/tools/lib/bpf/libbpf.c
@@ -5028,8 +5028,8 @@ static int bpf_object__collect_map_relos(struct bpf_object *obj,
int i, j, nrels, new_sz, ptr_sz = sizeof(void *);
const struct btf_var_secinfo *vi = NULL;
const struct btf_type *sec, *var, *def;
+ struct bpf_map *map = NULL, *targ_map;
const struct btf_member *member;
- struct bpf_map *map, *targ_map;
const char *name, *mname;
Elf_Data *symbols;
unsigned int moff;
--
2.25.1

26
package/network/utils/bpftools/patches/003-bpftool-allow-passing-BPFTOOL_VERSION-to-make.patch Normal file
View File

@ -0,0 +1,26 @@
From 668d1c2951e18512a27aec20b80dea627d01bf04 Mon Sep 17 00:00:00 2001
From: Tony Ambardar <Tony.Ambardar@gmail.com>
Date: Thu, 20 Aug 2020 16:05:48 -0700
Subject: [PATCH] tools/bpftool: allow passing BPFTOOL_VERSION to make
Signed-off-by: Tony Ambardar <Tony.Ambardar@gmail.com>
---
tools/bpf/bpftool/Makefile | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/tools/bpf/bpftool/Makefile b/tools/bpf/bpftool/Makefile
index 9e85f101be85..d9d821736c31 100644
--- a/tools/bpf/bpftool/Makefile
+++ b/tools/bpf/bpftool/Makefile
@@ -25,7 +25,7 @@ endif
LIBBPF = $(LIBBPF_PATH)libbpf.a
-BPFTOOL_VERSION := $(shell make -rR --no-print-directory -sC ../../.. kernelversion)
+BPFTOOL_VERSION ?= $(shell make -rR --no-print-directory -sC ../../.. kernelversion)
$(LIBBPF): FORCE
$(if $(LIBBPF_OUTPUT),@mkdir -p $(LIBBPF_OUTPUT))
--
2.25.1

238
package/network/utils/bpftools/patches/004-v5.9-bpftool-use-only-ftw-for-file-tree-parsing.patch Normal file
View File

@ -0,0 +1,238 @@
From 6edda7633e4fdf33b91c2e86c05cab805a0dabb3 Mon Sep 17 00:00:00 2001
From: Tony Ambardar <tony.ambardar@gmail.com>
Date: Mon, 20 Jul 2020 19:48:16 -0700
Subject: [PATCH] bpftool: Use only nftw for file tree parsing
The bpftool sources include code to walk file trees, but use multiple
frameworks to do so: nftw and fts. While nftw conforms to POSIX/SUSv3 and
is widely available, fts is not conformant and less common, especially on
non-glibc systems. The inconsistent framework usage hampers maintenance
and portability of bpftool, in particular for embedded systems.
Standardize code usage by rewriting one fts-based function to use nftw and
clean up some related function warnings by extending use of "const char *"
arguments. This change helps in building bpftool against musl for OpenWrt.
Also fix an unsafe call to dirname() by duplicating the string to pass,
since some implementations may directly alter it. The same approach is
used in libbpf.c.
Signed-off-by: Tony Ambardar <Tony.Ambardar@gmail.com>
Signed-off-by: Daniel Borkmann <daniel@iogearbox.net>
Reviewed-by: Quentin Monnet <quentin@isovalent.com>
Link: https://lore.kernel.org/bpf/20200721024817.13701-1-Tony.Ambardar@gmail.com
---
tools/bpf/bpftool/common.c | 137 ++++++++++++++++++++++---------------
tools/bpf/bpftool/main.h | 4 +-
2 files changed, 82 insertions(+), 59 deletions(-)
diff --git a/tools/bpf/bpftool/common.c b/tools/bpf/bpftool/common.c
index 88264abaa738..d8bb4dd18c8a 100644
--- a/tools/bpf/bpftool/common.c
+++ b/tools/bpf/bpftool/common.c
@@ -1,10 +1,11 @@
// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
/* Copyright (C) 2017-2018 Netronome Systems, Inc. */
+#define _GNU_SOURCE
#include <ctype.h>
#include <errno.h>
#include <fcntl.h>
-#include <fts.h>
+#include <ftw.h>
#include <libgen.h>
#include <mntent.h>
#include <stdbool.h>
@@ -123,24 +124,35 @@ int mount_tracefs(const char *target)
return err;
}
-int open_obj_pinned(char *path, bool quiet)
+int open_obj_pinned(const char *path, bool quiet)
{
- int fd;
+ char *pname;
+ int fd = -1;
- fd = bpf_obj_get(path);
+ pname = strdup(path);
+ if (!pname) {
+ if (!quiet)
+ p_err("mem alloc failed");
+ goto out_ret;
+ }
+
+ fd = bpf_obj_get(pname);
if (fd < 0) {
if (!quiet)
- p_err("bpf obj get (%s): %s", path,
- errno == EACCES && !is_bpffs(dirname(path)) ?
+ p_err("bpf obj get (%s): %s", pname,
+ errno == EACCES && !is_bpffs(dirname(pname)) ?
"directory not in bpf file system (bpffs)" :
strerror(errno));
- return -1;
+ goto out_free;
}
+out_free:
+ free(pname);
+out_ret:
return fd;
}
-int open_obj_pinned_any(char *path, enum bpf_obj_type exp_type)
+int open_obj_pinned_any(const char *path, enum bpf_obj_type exp_type)
{
enum bpf_obj_type type;
int fd;
@@ -353,71 +365,82 @@ void print_hex_data_json(uint8_t *data, size_t len)
jsonw_end_array(json_wtr);
}
+/* extra params for nftw cb */
+static struct pinned_obj_table *build_fn_table;
+static enum bpf_obj_type build_fn_type;
+
+static int do_build_table_cb(const char *fpath, const struct stat *sb,
+ int typeflag, struct FTW *ftwbuf)
+{
+ struct bpf_prog_info pinned_info;
+ __u32 len = sizeof(pinned_info);
+ struct pinned_obj *obj_node;
+ enum bpf_obj_type objtype;
+ int fd, err = 0;
+
+ if (typeflag != FTW_F)
+ goto out_ret;
+
+ fd = open_obj_pinned(fpath, true);
+ if (fd < 0)
+ goto out_ret;
+
+ objtype = get_fd_type(fd);
+ if (objtype != build_fn_type)
+ goto out_close;
+
+ memset(&pinned_info, 0, sizeof(pinned_info));
+ if (bpf_obj_get_info_by_fd(fd, &pinned_info, &len))
+ goto out_close;
+
+ obj_node = calloc(1, sizeof(*obj_node));
+ if (!obj_node) {
+ err = -1;
+ goto out_close;
+ }
+
+ obj_node->id = pinned_info.id;
+ obj_node->path = strdup(fpath);
+ if (!obj_node->path) {
+ err = -1;
+ free(obj_node);
+ goto out_close;
+ }
+
+ hash_add(build_fn_table->table, &obj_node->hash, obj_node->id);
+out_close:
+ close(fd);
+out_ret:
+ return err;
+}
+
int build_pinned_obj_table(struct pinned_obj_table *tab,
enum bpf_obj_type type)
{
- struct bpf_prog_info pinned_info = {};
- struct pinned_obj *obj_node = NULL;
- __u32 len = sizeof(pinned_info);
struct mntent *mntent = NULL;
- enum bpf_obj_type objtype;
FILE *mntfile = NULL;
- FTSENT *ftse = NULL;
- FTS *fts = NULL;
- int fd, err;
+ int flags = FTW_PHYS;
+ int nopenfd = 16;
+ int err = 0;
mntfile = setmntent("/proc/mounts", "r");
if (!mntfile)
return -1;
+ build_fn_table = tab;
+ build_fn_type = type;
+
while ((mntent = getmntent(mntfile))) {
- char *path[] = { mntent->mnt_dir, NULL };
+ char *path = mntent->mnt_dir;
if (strncmp(mntent->mnt_type, "bpf", 3) != 0)
continue;
-
- fts = fts_open(path, 0, NULL);
- if (!fts)
- continue;
-
- while ((ftse = fts_read(fts))) {
- if (!(ftse->fts_info & FTS_F))
- continue;
- fd = open_obj_pinned(ftse->fts_path, true);
- if (fd < 0)
- continue;
-
- objtype = get_fd_type(fd);
- if (objtype != type) {
- close(fd);
- continue;
- }
- memset(&pinned_info, 0, sizeof(pinned_info));
- err = bpf_obj_get_info_by_fd(fd, &pinned_info, &len);
- if (err) {
- close(fd);
- continue;
- }
-
- obj_node = malloc(sizeof(*obj_node));
- if (!obj_node) {
- close(fd);
- fts_close(fts);
- fclose(mntfile);
- return -1;
- }
-
- memset(obj_node, 0, sizeof(*obj_node));
- obj_node->id = pinned_info.id;
- obj_node->path = strdup(ftse->fts_path);
- hash_add(tab->table, &obj_node->hash, obj_node->id);
-
- close(fd);
- }
- fts_close(fts);
+ err = nftw(path, do_build_table_cb, nopenfd, flags);
+ if (err)
+ break;
}
fclose(mntfile);
- return 0;
+ return err;
}
void delete_pinned_obj_table(struct pinned_obj_table *tab)
diff --git a/tools/bpf/bpftool/main.h b/tools/bpf/bpftool/main.h
index af9ad56c303a..b02e763f1e9c 100644
--- a/tools/bpf/bpftool/main.h
+++ b/tools/bpf/bpftool/main.h
@@ -140,8 +140,8 @@ int cmd_select(const struct cmd *cmds, int argc, char **argv,
int get_fd_type(int fd);
const char *get_fd_type_name(enum bpf_obj_type type);
char *get_fdinfo(int fd, const char *key);
-int open_obj_pinned(char *path, bool quiet);
-int open_obj_pinned_any(char *path, enum bpf_obj_type exp_type);
+int open_obj_pinned(const char *path, bool quiet);
+int open_obj_pinned_any(const char *path, enum bpf_obj_type exp_type);
int mount_bpffs_for_pin(const char *name);
int do_pin_any(int argc, char **argv, int (*get_fd_by_id)(__u32));
int do_pin_fd(int fd, const char *name);
--
2.17.1

6
package/network/utils/ethtool/Makefile
View File

@ -8,13 +8,13 @@
include $(TOPDIR)/rules.mk
PKG_NAME:=ethtool
PKG_VERSION:=5.4
PKG_VERSION:=5.8
PKG_RELEASE:=1
PKG_MAINTAINER:=Felix Fietkau <nbd@nbd.name>
PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.xz
PKG_SOURCE_URL:=@KERNEL/software/network/ethtool
PKG_HASH:=22f81e4927d6eb6a13a259d705248a96005fce2005e15257f639f5a1c8c52b6b
PKG_HASH:=2f3b54d08d048f5977b80cb6cb4744994370def7553ee634d39dbbb6ccf87546
PKG_LICENSE:=GPL-2.0
PKG_LICENSE_FILES:=COPYING
@ -45,6 +45,8 @@ define Package/ethtool/config
bool "Enable pretty printing"
endef
CONFIGURE_ARGS += --disable-netlink
ifeq ($(CONFIG_ETHTOOL_PRETTY_DUMP),y)
CONFIGURE_ARGS += --enable-pretty-dump
else

6
package/network/utils/iproute2/Makefile
View File

@ -8,12 +8,12 @@
include $(TOPDIR)/rules.mk
PKG_NAME:=iproute2
PKG_VERSION:=5.7.0
PKG_RELEASE:=2
PKG_VERSION:=5.8.0
PKG_RELEASE:=1
PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.xz
PKG_SOURCE_URL:=@KERNEL/linux/utils/net/iproute2
PKG_HASH:=725dc7ba94aae54c6f8d4223ca055d9fb4fe89d6994b1c03bfb4411c4dd10f21
PKG_HASH:=cfcd1f890290f8c8afcc91d9444ad929b9252c16f9ab3f286c50dd3c59dc646e
PKG_BUILD_PARALLEL:=1
PKG_BUILD_DEPENDS:=iptables
PKG_LICENSE:=GPL-2.0

46
package/network/utils/iproute2/patches/001-devlink-update-include-files.patch
View File

@ -1,46 +0,0 @@
From 12fafa27c7b306e6c397e858f4d5a8159500f659 Mon Sep 17 00:00:00 2001
From: Stephen Hemminger <stephen@networkplumber.org>
Date: Thu, 11 Jun 2020 09:46:46 -0700
Subject: [PATCH] devlink: update include files
Use the tool iwyu to get more complete list of includes for
all the bits used by devlink.
This should also fix build with musl libc.
Fixes: c4dfddccef4e ("fix JSON output of mon command")
Reported-off-by: Dan Robertson <dan@dlrobertson.com>
Signed-off-by: Stephen Hemminger <stephen@networkplumber.org>
---
devlink/devlink.c | 9 ++++++++-
1 file changed, 8 insertions(+), 1 deletion(-)
--- a/devlink/devlink.c
+++ b/devlink/devlink.c
@@ -19,18 +19,25 @@
#include <limits.h>
#include <errno.h>
#include <inttypes.h>
+#include <signal.h>
+#include <time.h>
+#include <netinet/in.h>
+#include <arpa/inet.h>
#include <sys/sysinfo.h>
#define _LINUX_SYSINFO_H /* avoid collision with musl header */
#include <linux/genetlink.h>
#include <linux/devlink.h>
+#include <linux/netlink.h>
#include <libmnl/libmnl.h>
#include <netinet/ether.h>
+#include <sys/select.h>
+#include <sys/socket.h>
#include <sys/types.h>
#include "SNAPSHOT.h"
#include "list.h"
#include "mnlg.h"
-#include "json_writer.h"
+#include "json_print.h"
#include "utils.h"
#include "namespace.h"

32
package/network/utils/iproute2/patches/002-configure-support-ipset-v7.patch
View File

@ -1,32 +0,0 @@
From 650591a7a70cd79d826fcdc579a20c168c987cf2 Mon Sep 17 00:00:00 2001
From: Tony Ambardar <tony.ambardar@gmail.com>
Date: Tue, 7 Jul 2020 00:58:33 -0700
Subject: [PATCH] configure: support ipset version 7 with kernel version 5
The configure script checks for ipset v6 availability but doesn't test
for v7, which is backward compatible and used on kernel v5.x systems.
Update the script to test for both ipset versions. Without this change,
the tc ematch function em_ipset will be disabled.
Signed-off-by: Tony Ambardar <Tony.Ambardar@gmail.com>
Signed-off-by: Stephen Hemminger <stephen@networkplumber.org>
---
configure | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/configure b/configure
index f415bf49..307912aa 100755
--- a/configure
+++ b/configure
@@ -208,7 +208,7 @@ typedef unsigned short ip_set_id_t;
#include <linux/netfilter/xt_set.h>
struct xt_set_info info;
-#if IPSET_PROTOCOL == 6
+#if IPSET_PROTOCOL == 6 || IPSET_PROTOCOL == 7
int main(void)
{
return IPSET_MAXNAMELEN;
--
2.17.1

2
package/network/utils/iproute2/patches/115-add-config-xtlibdir.patch
View File

@ -1,6 +1,6 @@
--- a/tc/Makefile
+++ b/tc/Makefile
@@ -126,6 +126,9 @@ CFLAGS += -DCONFIG_GACT -DCONFIG_GACT_PR
@@ -127,6 +127,9 @@ CFLAGS += -DCONFIG_GACT -DCONFIG_GACT_PR
ifneq ($(IPT_LIB_DIR),)
CFLAGS += -DIPT_LIB_DIR=\"$(IPT_LIB_DIR)\"
endif

7
package/network/utils/iproute2/patches/170-ip_tiny.patch
View File

@ -33,7 +33,7 @@
"where OBJECT := { link | address | addrlabel | route | rule | neigh | ntable |\n"
" tunnel | tuntap | maddress | mroute | mrule | monitor | xfrm |\n"
" netns | l2tp | fou | macsec | tcp_metrics | token | netconf | ila |\n"
" vrf | sr | nexthop }\n"
" vrf | sr | nexthop | mptcp }\n"
+#else
+ "where OBJECT := { link | address | route | rule | neigh | tunnel | maddress |\n"
+ " mroute | mrule | monitor | netns | macsec | token | ila |\n"
@ -42,7 +42,7 @@
" OPTIONS := { -V[ersion] | -s[tatistics] | -d[etails] | -r[esolve] |\n"
" -h[uman-readable] | -iec | -j[son] | -p[retty] |\n"
" -f[amily] { inet | inet6 | mpls | bridge | link } |\n"
@@ -74,35 +80,49 @@ static const struct cmd {
@@ -74,36 +80,50 @@ static const struct cmd {
int (*func)(int argc, char **argv);
} cmds[] = {
{ "address", do_ipaddr },
@ -88,6 +88,7 @@
{ "sr", do_seg6 },
+#ifndef IPROUTE2_TINY
{ "nexthop", do_ipnh },
{ "mptcp", do_mptcp },
+#endif
{ "help", do_help },
{ 0 }
@ -104,4 +105,4 @@
+
UTILOBJ = utils.o rt_names.o ll_map.o ll_types.o ll_proto.o ll_addr.o \
inet_proto.o namespace.o json_writer.o json_print.o \
names.o color.o bpf.o exec.o fs.o
names.o color.o bpf.o exec.o fs.o cg_map.o

8
package/network/utils/iproute2/patches/175-reduce-dynamic-syms.patch
View File

@ -1,6 +1,6 @@
--- a/tc/Makefile
+++ b/tc/Makefile
@@ -113,7 +113,7 @@ LDLIBS += -L. -lm
@@ -114,7 +114,7 @@ LDLIBS += -L. -lm
ifeq ($(SHARED_LIBS),y)
LDLIBS += -ldl
@ -9,7 +9,7 @@
endif
TCLIB := tc_core.o
@@ -142,7 +142,7 @@ MODDESTDIR := $(DESTDIR)$(LIBDIR)/tc
@@ -143,7 +143,7 @@ MODDESTDIR := $(DESTDIR)$(LIBDIR)/tc
all: tc $(TCSO)
tc: $(TCOBJ) $(LIBNETLINK) libtc.a
@ -18,7 +18,7 @@
libtc.a: $(TCLIB)
$(QUIET_AR)$(AR) rcs $@ $^
@@ -164,6 +164,7 @@ install: all
@@ -165,6 +165,7 @@ install: all
clean:
rm -f $(TCOBJ) $(TCLIB) libtc.a tc *.so emp_ematch.tab.h; \
rm -f emp_ematch.tab.*
@ -26,7 +26,7 @@
q_atm.so: q_atm.c
$(QUIET_CC)$(CC) $(CFLAGS) $(CPPFLAGS) $(LDFLAGS) -shared -fpic -o q_atm.so q_atm.c -latm
@@ -203,4 +204,15 @@ static-syms.h: $(wildcard *.c)
@@ -204,4 +205,15 @@ static-syms.h: $(wildcard *.c)
sed -n '/'$$s'[^ ]* =/{s:.* \([^ ]*'$$s'[^ ]*\) .*:extern char \1[] __attribute__((weak)); if (!strcmp(sym, "\1")) return \1;:;p}' $$files ; \
done > $@

3
package/network/utils/wireguard-tools/files/wireguard.sh
View File

@ -112,6 +112,7 @@ proto_wireguard_setup() {
config_get fwmark "${config}" "fwmark"
config_get ip6prefix "${config}" "ip6prefix"
config_get nohostroute "${config}" "nohostroute"
config_get tunlink "${config}" "tunlink"
ip link del dev "${config}" 2>/dev/null
ip link add dev "${config}" type wireguard
@ -173,7 +174,7 @@ proto_wireguard_setup() {
sed -E 's/\[?([0-9.:a-f]+)\]?:([0-9]+)/\1 \2/' | \
while IFS=$'\t ' read -r key address port; do
[ -n "${port}" ] || continue
proto_add_host_dependency "${config}" "${address}"
proto_add_host_dependency "${config}" "${address}" "${tunlink}"
done
fi

2
package/system/mtd/Makefile
View File

@ -9,7 +9,7 @@ include $(TOPDIR)/rules.mk
include $(INCLUDE_DIR)/kernel.mk
PKG_NAME:=mtd
PKG_RELEASE:=25
PKG_RELEASE:=26
PKG_BUILD_DIR := $(KERNEL_BUILD_DIR)/$(PKG_NAME)
STAMP_PREPARED := $(STAMP_PREPARED)_$(call confvar,CONFIG_MTD_REDBOOT_PARTS)

1
package/system/mtd/src/Makefile
View File

@ -7,7 +7,6 @@ obj.seama = seama.o md5.o
obj.wrg = wrg.o md5.o
obj.wrgg = wrgg.o md5.o
obj.tpl = tpl_ramips_recoveryflag.o
obj.ar71xx = trx.o $(obj.seama) $(obj.wrgg)
obj.ath79 = $(obj.seama) $(obj.wrgg)
obj.gemini = $(obj.wrgg)
obj.brcm = trx.o

2
package/system/mtd/src/trx.c
View File

@ -110,7 +110,6 @@ err:
return -1;
}
#ifndef target_ar71xx
int
trx_check(int imagefd, const char *mtd, char *buf, int *len)
{
@ -153,7 +152,6 @@ trx_check(int imagefd, const char *mtd, char *buf, int *len)
close(fd);
return 1;
}
#endif
int
mtd_fixtrx(const char *mtd, size_t offset, size_t data_size)

6
package/system/opkg/Makefile
View File

@ -14,9 +14,9 @@ PKG_FLAGS:=essential
PKG_SOURCE_PROTO:=git
PKG_SOURCE_URL:=https://git.openwrt.org/project/opkg-lede.git
PKG_SOURCE_DATE:=2020-05-07
PKG_SOURCE_VERSION:=f2166a89b7e96e2c60002959731eebc5f45fa318
PKG_MIRROR_HASH:=67e55cd9fb93bb5b62e2c7b11946483b5570287bd1504aa2a3886d11f8b750b9
PKG_SOURCE_DATE:=2020-08-31
PKG_SOURCE_VERSION:=cf44c2feb606b60ba3f35392e102c281ef6ea0da
PKG_MIRROR_HASH:=0d7be9f8f86864e2a9999145210ecaa286fb85cfae131ec502609a6d1e435871
PKG_LICENSE:=GPL-2.0
PKG_LICENSE_FILES:=COPYING

10
package/system/opkg/files/opkg-key
View File

@ -1,5 +1,7 @@
#!/bin/sh
OPKG_KEYS="${OPKG_KEYS:-/etc/opkg/keys}"
usage() {
cat <<EOF
Usage: $0 <command> <arguments...>
@ -19,7 +21,7 @@ opkg_key_verify() {
(
zcat "$msgfile" 2>/dev/null ||
cat "$msgfile" 2>/dev/null
) | usign -V -P /etc/opkg/keys -q -x "$sigfile" -m -
) | usign -V -P "$OPKG_KEYS" -q -x "$sigfile" -m -
}
opkg_key_add() {
@ -27,8 +29,8 @@ opkg_key_add() {
[ -n "$key" ] || usage
[ -f "$key" ] || echo "Cannot open file $1"
local fingerprint="$(usign -F -p "$key")"
mkdir -p "/etc/opkg/keys"
cp "$key" "/etc/opkg/keys/$fingerprint"
mkdir -p "$OPKG_KEYS"
cp "$key" "$OPKG_KEYS/$fingerprint"
}
opkg_key_remove() {
@ -36,7 +38,7 @@ opkg_key_remove() {
[ -n "$key" ] || usage
[ -f "$key" ] || echo "Cannot open file $1"
local fingerprint="$(usign -F -p "$key")"
rm -f "/etc/opkg/keys/$fingerprint"
rm -f "$OPKG_KEYS/$fingerprint"
}
case "$1" in

80
package/system/refpolicy/Makefile Normal file
View File

@ -0,0 +1,80 @@
#
# This is free software, licensed under the GNU General Public License v2.
# See /LICENSE for more information.
#
include $(TOPDIR)/rules.mk
PKG_NAME:=refpolicy
PKG_VERSION:=2.20200229
PKG_RELEASE:=1
PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.bz2
PKG_SOURCE_URL:=https://github.com/SELinuxProject/refpolicy/releases/download/RELEASE_2_20200229
PKG_HASH:=dec854512ed00cd057408f330c2cea4de7a4405f7a147458f59c994bf578e4b0
PKG_INSTALL:=1
PKG_BUILD_DEPENDS:=checkpolicy/host policycoreutils/host
PKG_MAINTAINER:=Thomas Petazzoni <thomas.petazzoni@bootlin.com>
PKG_CPE_ID:=cpe:/a:tresys:refpolicy
PKG_LICENSE:=GPL-2.0-or-later
PKG_LICENSE_FILES:=COPYING
TAR_OPTIONS:=--transform='s%^refpolicy%$(PKG_NAME)-$(PKG_VERSION)%' -xf -
include $(INCLUDE_DIR)/package.mk
define Package/refpolicy
SECTION:=system
CATEGORY:=Base system
TITLE:=SELinux reference policy
URL:=http://selinuxproject.org/page/Main_Page
endef
define Package/refpolicy/description
The SELinux Reference Policy project (refpolicy) is a
complete SELinux policy that can be used as the system
policy for a variety of systems and used as the basis for
creating other policies. Reference Policy was originally
based on the NSA example policy, but aims to accomplish many
additional goals.
The current refpolicy does not fully support OpenWRT and
needs modifications to work with the default system file
layout. These changes should be added as patches to the
refpolicy that modify a single SELinux policy.
The refpolicy works for the most part in permissive
mode. Only the basic set of utilities are enabled in the
example policy config and some of the pathing in the
policies is not correct. Individual policies would need to
be tweaked to get everything functioning properly.
endef
# Yes, we want CC=$(HOSTCC) because the only code that checkpolicy
# builds is a small host tool that gets run as part of the build
# process.
MAKE_FLAGS += \
TEST_TOOLCHAIN="$(STAGING_DIR_HOSTPKG)" \
BINDIR=/bin \
SBINDIR=/sbin \
CC="$(HOSTCC)" \
CFLAGS="$(HOST_CFLAGS)"
define Build/Configure
$(SED) "/MONOLITHIC/c\MONOLITHIC = y" $(PKG_BUILD_DIR)/build.conf
$(SED) "/NAME/c\NAME = targeted" $(PKG_BUILD_DIR)/build.conf
$(call Build/Compile/Default,conf)
endef
define Package/refpolicy/conffiles
/etc/selinux/config
endef
define Package/refpolicy/install
$(INSTALL_DIR) $(1)/etc/selinux
$(CP) $(PKG_INSTALL_DIR)/etc/selinux/* $(1)/etc/selinux/
$(CP) ./files/selinux-config $(1)/etc/selinux/config
endef
$(eval $(call BuildPackage,refpolicy))

7
package/system/refpolicy/files/selinux-config Normal file
View File

@ -0,0 +1,7 @@
# This file controls the state of SELinux on the system.
# SELINUX= can take one of these three values:
# enforcing - SELinux security policy is enforced.
# permissive - SELinux prints warnings instead of enforcing.
# disabled - No SELinux policy is loaded.
SELINUX=permissive
SELINUXTYPE=targeted

9
package/utils/busybox/Makefile
View File

@ -9,7 +9,7 @@ include $(TOPDIR)/rules.mk
PKG_NAME:=busybox
PKG_VERSION:=1.31.1
PKG_RELEASE:=3
PKG_RELEASE:=4
PKG_FLAGS:=essential
PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.bz2
@ -28,6 +28,10 @@ PKG_LICENSE:=GPL-2.0
PKG_LICENSE_FILES:=LICENSE archival/libarchive/bz/LICENSE
PKG_CPE_ID:=cpe:/a:busybox:busybox
ifneq ($(CONFIG_BUSYBOX_$(BUSYBOX_SYM)_FEATURE_SUID),)
PKG_FILE_MODES:=/bin/busybox:root:root:4755
endif
include $(INCLUDE_DIR)/package.mk
ifeq ($(DUMP),)
@ -140,9 +144,6 @@ endif
ifneq ($(CONFIG_BUSYBOX_$(BUSYBOX_SYM)_NTPD),)
$(INSTALL_BIN) ./files/sysntpd $(1)/etc/init.d/sysntpd
$(INSTALL_BIN) ./files/ntpd-hotplug $(1)/usr/sbin/ntpd-hotplug
endif
ifneq ($(CONFIG_BUSYBOX_$(BUSYBOX_SYM)_FEATURE_SUID),)
$(INSTALL_SUID) $(PKG_INSTALL_DIR)/bin/busybox $(1)/bin/busybox
endif
-rm -rf $(1)/lib64
endef

52
package/utils/checkpolicy/Makefile Normal file
View File

@ -0,0 +1,52 @@
#
# This is free software, licensed under the GNU General Public License v2.
# See /LICENSE for more information.
#
include $(TOPDIR)/rules.mk
PKG_NAME:=checkpolicy
PKG_VERSION:=3.1
PKG_RELEASE:=1
PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.gz
PKG_SOURCE_URL:=https://github.com/SELinuxProject/selinux/releases/download/20200710
PKG_HASH:=dfc7707070520c93b14fbbdfdbe081364d806bf28e3e79e10318c2594c77bbb2
PKG_INSTALL:=1
PKG_BUILD_DEPENDS:=libselinux
HOST_BUILD_DEPENDS:=libselinux/host
PKG_MAINTAINER:=Thomas Petazzoni <thomas.petazzoni@bootlin.com>
PKG_CPE_ID:=cpe:/a:selinuxproject:checkpolicy
PKG_LICENSE:=GPL-2.0-or-later
PKG_LICENSE_FILES:=COPYING
include $(INCLUDE_DIR)/package.mk
define Package/checkpolicy
SECTION:=utils
CATEGORY:=Utilities
TITLE:=SELinux policy compiler
URL:=http://selinuxproject.org/page/Main_Page
endef
define Package/checkpolicy/description
checkpolicy is the SELinux policy compiler. It uses libsepol
to generate the binary policy. checkpolicy uses the static
libsepol since it deals with low level details of the policy
that have not been encapsulated/abstracted by a proper
shared library interface.
endef
include $(INCLUDE_DIR)/host-build.mk
HOST_MAKE_FLAGS += \
PREFIX=$(STAGING_DIR_HOSTPKG)
define Package/checkpolicy/install
$(INSTALL_DIR) $(1)/usr/bin
$(CP) $(PKG_INSTALL_DIR)/usr/bin/* $(1)/usr/bin/
endef
$(eval $(call HostBuild))
$(eval $(call BuildPackage,checkpolicy))

2
package/utils/nvram/Makefile
View File

@ -21,7 +21,7 @@ define Package/nvram
CATEGORY:=Base system
TITLE:=Userspace port of the Broadcom NVRAM manipulation tool
MAINTAINER:=Jo-Philipp Wich <xm@subsignal.org>
DEPENDS:=@(TARGET_bcm47xx||TARGET_bcm53xx||TARGET_ar71xx||TARGET_ath79)
DEPENDS:=@(TARGET_bcm47xx||TARGET_bcm53xx||TARGET_ath79)
endef
define Package/nvram/description

83
package/utils/policycoreutils/Makefile Normal file
View File

@ -0,0 +1,83 @@
#
# This is free software, licensed under the GNU General Public License v2.
# See /LICENSE for more information.
#
include $(TOPDIR)/rules.mk
PKG_NAME:=policycoreutils
PKG_VERSION:=3.1
PKG_RELEASE:=1
PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.gz
PKG_SOURCE_URL:=https://github.com/SELinuxProject/selinux/releases/download/20200710
PKG_HASH:=c889f62ee80f8b6a369469a9b8af51f5b797975aeaa291f5c5960cc12eed1934
PKG_INSTALL:=1
HOST_BUILD_DEPENDS:=libsemanage/host
PKG_BUILD_DEPENDS:=BUSYBOX_CONFIG_PAM:libpam
PKG_MAINTAINER:=Thomas Petazzoni <thomas.petazzoni@bootlin.com>
PKG_CPE_ID:=cpe:/a:selinuxproject:policycoreutils
PKG_LICENSE:=GPL-2.0-or-later
PKG_LICENSE_FILES:=COPYING
include $(INCLUDE_DIR)/package.mk
define Package/policycoreutils
SECTION:=utils
CATEGORY:=Utilities
DEPENDS:= +libsemanage +libcap-ng +BUSYBOX_CONFIG_PAM:libpam $(INTL_DEPENDS)
TITLE:=SELinux policy utilities
URL:=http://selinuxproject.org/page/Main_Page
ALTERNATIVES:=\
300:/sbin/restorecon:policycoreutils-restorecon \
300:/sbin/setfiles:policycoreutils-setfiles \
300:/usr/sbin/load_policy:policycoreutils-load_policy \
300:/usr/sbin/sestatus:policycoreutils-sestatus \
300:/usr/sbin/setsebool:policycoreutils-setsebool
endef
define Package/policycoreutils/description
Policycoreutils is a collection of policy utilities
(originally the "core" set of utilities needed to use
SELinux, although it has grown a bit over time), which have
different dependencies. sestatus, secon, run_init, and
newrole only use libselinux. load_policy and setfiles only
use libselinux and libsepol. semodule and semanage use
libsemanage (and thus bring in dependencies on libsepol and
libselinux as well). setsebool uses libselinux to make
non-persistent boolean changes (via the kernel interface)
and uses libsemanage to make persistent boolean changes.
endef
include $(INCLUDE_DIR)/host-build.mk
HOST_MAKE_FLAGS += \
PAMH=$(CONFIG_BUSYBOX_CONFIG_PAM) \
PREFIX=$(STAGING_DIR_HOSTPKG) \
SBINDIR=$(STAGING_DIR_HOSTPKG)/sbin \
ETCDIR=$(STAGING_DIR_HOSTPKG)/etc
MAKE_FLAGS += \
PAMH=$(CONFIG_BUSYBOX_CONFIG_PAM)
define Package/policycoreutils/install
$(INSTALL_DIR) $(1)/sbin
$(INSTALL_BIN) $(PKG_INSTALL_DIR)/sbin/restorecon_xattr $(1)/sbin/restorecon_xattr
$(INSTALL_BIN) $(PKG_INSTALL_DIR)/sbin/restorecon $(1)/sbin/policycoreutils-restorecon
$(INSTALL_BIN) $(PKG_INSTALL_DIR)/sbin/setfiles $(1)/sbin/policycoreutils-setfiles
$(INSTALL_DIR) $(1)/usr/sbin
$(INSTALL_BIN) $(PKG_INSTALL_DIR)/usr/sbin/fixfiles $(1)/usr/sbin/
$(INSTALL_BIN) $(PKG_INSTALL_DIR)/usr/sbin/genhomedircon $(1)/usr/sbin/
$(INSTALL_BIN) $(PKG_INSTALL_DIR)/usr/sbin/open_init_pty $(1)/usr/sbin/
$(INSTALL_BIN) $(PKG_INSTALL_DIR)/usr/sbin/run_init $(1)/usr/sbin/
$(INSTALL_BIN) $(PKG_INSTALL_DIR)/usr/sbin/semodule $(1)/usr/sbin/
$(INSTALL_BIN) $(PKG_INSTALL_DIR)/usr/sbin/load_policy $(1)/usr/sbin/policycoreutils-load_policy
$(INSTALL_BIN) $(PKG_INSTALL_DIR)/usr/sbin/sestatus $(1)/usr/sbin/policycoreutils-sestatus
$(INSTALL_BIN) $(PKG_INSTALL_DIR)/usr/sbin/setsebool $(1)/usr/sbin/policycoreutils-setsebool
$(INSTALL_DIR) $(1)/usr/bin
$(CP) $(PKG_INSTALL_DIR)/usr/bin/* $(1)/usr/bin/
endef
$(eval $(call HostBuild))
$(eval $(call BuildPackage,policycoreutils))

4
package/utils/px5g/Makefile → package/utils/px5g-mbedtls/Makefile
View File

@ -7,7 +7,7 @@
include $(TOPDIR)/rules.mk
PKG_NAME:=px5g
PKG_NAME:=px5g-mbedtls
PKG_RELEASE:=9
PKG_LICENSE:=LGPL-2.1
@ -55,7 +55,7 @@ endif
TARGET_CFLAGS += -Wl,--gc-sections -Wall -Werror
define Build/Compile
$(TARGET_CC) $(TARGET_CPPFLAGS) $(TARGET_CFLAGS) -o $(PKG_BUILD_DIR)/px5g px5g.c $(TARGET_LDFLAGS)
$(TARGET_CC) $(TARGET_CPPFLAGS) $(TARGET_CFLAGS) -o $(PKG_BUILD_DIR)/px5g px5g-mbedtls.c $(TARGET_LDFLAGS)
endef
define Package/px5g-mbedtls/install

0
package/utils/px5g/px5g.c → package/utils/px5g-mbedtls/px5g-mbedtls.c
View File

48
package/utils/px5g-wolfssl/Makefile Normal file
View File

@ -0,0 +1,48 @@
# Copyright (C) 2020 Paul Spooren <mail@aparcar.org>
#
# SPDX-License-Identifier: GPL-2.0-or-later
include $(TOPDIR)/rules.mk
PKG_NAME:=px5g-wolfssl
PKG_RELEASE:=1
PKG_LICENSE:=GPL-2.0-or-later
PKG_USE_MIPS16:=0
PKG_MAINTAINER:=Paul Spooren <mail@aparcar.org>
include $(INCLUDE_DIR)/package.mk
define Package/px5g-wolfssl
SECTION:=utils
CATEGORY:=Utilities
SUBMENU:=Encryption
TITLE:=X.509 certificate generator (using WolfSSL)
DEPENDS:=+libwolfssl
PROVIDES:=px5g
VARIANT:=wolfssl
endef
define Package/px5g-wolfssl/description
Px5g is a tiny X.509 certificate generator.
It suitable to create key files and certificates in DER
and PEM format for use with stunnel, uhttpd and others.
endef
TARGET_LDFLAGS += -lwolfssl
TARGET_CFLAGS += -Wl,--gc-sections
define Build/Compile
$(TARGET_CC) $(TARGET_CPPFLAGS) $(TARGET_CFLAGS) \
-o $(PKG_BUILD_DIR)/px5g px5g-wolfssl.c $(TARGET_LDFLAGS)
endef
define Package/px5g-wolfssl/install
$(INSTALL_DIR) $(1)/usr/sbin
$(INSTALL_BIN) $(PKG_BUILD_DIR)/px5g $(1)/usr/sbin/px5g
endef
$(eval $(call BuildPackage,px5g-wolfssl))

354
package/utils/px5g-wolfssl/px5g-wolfssl.c Normal file
View File

@ -0,0 +1,354 @@
// Copyright 2020 Paul Spooren <mail@aparcar.org>
//
// SPDX-License-Identifier: GPL-2.0-or-later
#define _GNU_SOURCE
#include <stdbool.h>
#include <stdint.h>
#include <stdio.h>
#include <string.h>
#include <wolfssl/options.h>
#include <wolfssl/wolfcrypt/asn.h>
#include <wolfssl/wolfcrypt/asn_public.h>
#include <wolfssl/wolfcrypt/ecc.h>
#include <wolfssl/wolfcrypt/error-crypt.h>
#include <wolfssl/wolfcrypt/rsa.h>
#include <wolfssl/wolfcrypt/settings.h>
#define HEAP_HINT NULL
#define FOURK_SZ 4096
#define WOLFSSL_MIN_RSA_BITS 2048
enum {
EC_KEY_TYPE = 0,
RSA_KEY_TYPE = 1,
};
int write_file(byte *buf, int bufSz, char *path) {
int ret;
FILE *file;
if (path) {
file = fopen(path, "wb");
if (file == NULL) {
perror("Error opening file");
exit(1);
}
} else {
file = stdout;
}
ret = (int)fwrite(buf, 1, bufSz, file);
if (path) {
fclose(file);
}
if (ret > 0) {
/* ret > 0 indicates a successful file write, set to zero for return */
ret = 0;
}
return ret;
}
int write_key(ecc_key *ecKey, RsaKey *rsaKey, int type, int keySz, char *fName,
bool write_pem) {
int ret;
byte der[FOURK_SZ] = {};
byte pem[FOURK_SZ] = {};
int derSz, pemSz;
if (type == EC_KEY_TYPE) {
ret = wc_EccKeyToDer(ecKey, der, sizeof(der));
} else {
ret = wc_RsaKeyToDer(rsaKey, der, sizeof(der));
}
if (ret <= 0) {
fprintf(stderr, "Key To DER failed: %d\n", ret);
}
derSz = ret;
if (write_pem) {
if (type == EC_KEY_TYPE) {
ret = wc_DerToPem(der, derSz, pem, sizeof(pem), ECC_PRIVATEKEY_TYPE);
} else {
ret = wc_DerToPem(der, derSz, pem, sizeof(pem), PRIVATEKEY_TYPE);
}
if (ret <= 0) {
fprintf(stderr, "DER to PEM failed: %d\n", ret);
}
pemSz = ret;
ret = write_file(pem, pemSz, fName);
} else {
ret = write_file(der, derSz, fName);
}
return ret;
}
int gen_key(WC_RNG *rng, ecc_key *ecKey, RsaKey *rsaKey, int type, int keySz,
long exp, int curve) {
int ret;
if (type == EC_KEY_TYPE) {
ret = wc_ecc_init(ecKey);
(void)rsaKey;
} else {
ret = wc_InitRsaKey(rsaKey, NULL);
(void)ecKey;
}
if (ret != 0) {
fprintf(stderr, "Key initialization failed: %d\n", ret);
return ret;
}
if (type == EC_KEY_TYPE) {
fprintf(stderr, "Generating EC private key\n");
ret = wc_ecc_make_key_ex(rng, 32, ecKey, curve);
} else {
fprintf(stderr, "Generating RSA private key, %i bit long modulus\n", keySz);
ret = wc_MakeRsaKey(rsaKey, keySz, WC_RSA_EXPONENT, rng);
}
if (ret != 0) {
fprintf(stderr, "Key generation failed: %d\n", ret);
}
return ret;
}
int selfsigned(WC_RNG *rng, char **arg) {
ecc_key ecKey;
RsaKey rsaKey;
int ret;
char *subject = "";
int keySz = WOLFSSL_MIN_RSA_BITS;
int type = EC_KEY_TYPE;
int exp = WC_RSA_EXPONENT;
int curve = ECC_SECP256R1;
unsigned int days = 3653; // 10 years
char *keypath = NULL, *certpath = NULL;
char fstr[20], tstr[20];
bool pem = true;
Cert newCert;
#ifdef __USE_TIME_BITS64
time_t to, from = time(NULL);
#else
unsigned long to, from = time(NULL);
#endif
byte derBuf[FOURK_SZ] = {};
byte pemBuf[FOURK_SZ] = {};
int pemSz = -1;
int derSz = -1;
char *key, *val, *tmp;
ret = wc_InitCert(&newCert);
if (ret != 0) {
fprintf(stderr, "Init Cert failed: %d\n", ret);
return ret;
}
newCert.isCA = 0;
while (*arg && **arg == '-') {
if (!strncmp(*arg, "-der", 4)) {
pem = false;
} else if (!strncmp(*arg, "-newkey", 6) && arg[1]) {
if (!strncmp(arg[1], "rsa:", 4)) {
type = RSA_KEY_TYPE;
keySz = (unsigned int)atoi(arg[1] + 4);
} else if (!strncmp(arg[1], "ec", 2)) {
type = EC_KEY_TYPE;
} else {
fprintf(stderr, "error: invalid algorithm\n");
return 1;
}
arg++;
} else if (!strncmp(*arg, "-days", 5) && arg[1]) {
days = (unsigned int)atoi(arg[1]);
arg++;
} else if (!strncmp(*arg, "-pkeyopt", 8) && arg[1]) {
if (strncmp(arg[1], "ec_paramgen_curve:", 18)) {
fprintf(stderr, "error: invalid pkey option: %s\n", arg[1]);
return 1;
}
if (!strncmp(arg[1] + 18, "P-256:", 5)) {
curve = ECC_SECP256R1;
} else if (!strncmp(arg[1] + 18, "P-384:", 5)) {
curve = ECC_SECP384R1;
} else if (!strncmp(arg[1] + 18, "P-521:", 5)) {
curve = ECC_SECP521R1;
} else {
fprintf(stderr, "error: invalid curve name: %s\n", arg[1] + 18);
return 1;
}
arg++;
} else if (!strncmp(*arg, "-keyout", 7) && arg[1]) {
keypath = arg[1];
arg++;
} else if (!strncmp(*arg, "-out", 4) && arg[1]) {
certpath = arg[1];
arg++;
} else if (!strcmp(*arg, "-subj") && arg[1]) {
subject = strdupa(arg[1]);
key = arg[1];
do {
tmp = strchr(key, '/');
if (tmp)
*tmp = '\0';
val = strchr(key, '=');
if (val) {
*val = '\0';
++val;
if (!strcmp(key, "C"))
strncpy(newCert.subject.country, val, CTC_NAME_SIZE);
else if (!strcmp(key, "ST"))
strncpy(newCert.subject.state, val, CTC_NAME_SIZE);
else if (!strcmp(key, "L"))
strncpy(newCert.subject.locality, val, CTC_NAME_SIZE);
else if (!strcmp(key, "O"))
strncpy(newCert.subject.org, val, CTC_NAME_SIZE);
else if (!strcmp(key, "OU"))
strncpy(newCert.subject.unit, val, CTC_NAME_SIZE);
else if (!strcmp(key, "CN"))
strncpy(newCert.subject.commonName, val, CTC_NAME_SIZE);
else if (!strcmp(key, "EMAIL"))
strncpy(newCert.subject.email, val, CTC_NAME_SIZE);
else
printf("warning: unknown attribute %s=%s\n", key, val);
}
} while (tmp && (key = ++tmp));
}
arg++;
}
newCert.daysValid = days;
gen_key(rng, &ecKey, &rsaKey, type, keySz, exp, curve);
write_key(&ecKey, &rsaKey, type, keySz, keypath, pem);
from = (from < 1000000000) ? 1000000000 : from;
strftime(fstr, sizeof(fstr), "%Y%m%d%H%M%S", gmtime(&from));
to = from + 60 * 60 * 24 * days;
if (to < from)
to = INT_MAX;
strftime(tstr, sizeof(tstr), "%Y%m%d%H%M%S", gmtime(&to));
fprintf(stderr,
"Generating selfsigned certificate with subject '%s'"
" and validity %s-%s\n",
subject, fstr, tstr);
if (type == EC_KEY_TYPE) {
ret = wc_MakeCert(&newCert, derBuf, sizeof(derBuf), NULL, &ecKey, rng);
} else {
ret = wc_MakeCert(&newCert, derBuf, sizeof(derBuf), &rsaKey, NULL, rng);
}
if (ret <= 0) {
fprintf(stderr, "Make Cert failed: %d\n", ret);
return ret;
}
if (type == EC_KEY_TYPE) {
newCert.sigType = CTC_SHA256wECDSA;
ret = wc_SignCert(newCert.bodySz, newCert.sigType, derBuf, sizeof(derBuf),
NULL, &ecKey, rng);
} else {
newCert.sigType = CTC_SHA256wRSA;
ret = wc_SignCert(newCert.bodySz, newCert.sigType, derBuf, sizeof(derBuf),
&rsaKey, NULL, rng);
}
if (ret <= 0) {
fprintf(stderr, "Sign Cert failed: %d\n", ret);
return ret;
}
derSz = ret;
ret = wc_DerToPem(derBuf, derSz, pemBuf, sizeof(pemBuf), CERT_TYPE);
if (ret <= 0) {
fprintf(stderr, "DER to PEM failed: %d\n", ret);
return ret;
}
pemSz = ret;
ret = write_file(pemBuf, pemSz, certpath);
if (ret != 0) {
fprintf(stderr, "Write Cert failed: %d\n", ret);
return ret;
}
if (type == EC_KEY_TYPE) {
wc_ecc_free(&ecKey);
} else {
wc_FreeRsaKey(&rsaKey);
}
return 0;
}
int dokey(WC_RNG *rng, int type, char **arg) {
ecc_key ecKey;
RsaKey rsaKey;
int ret;
int curve = ECC_SECP256R1;
int keySz = WOLFSSL_MIN_RSA_BITS;
int exp = WC_RSA_EXPONENT;
char *path = NULL;
bool pem = true;
while (*arg && **arg == '-') {
if (!strncmp(*arg, "-out", 4) && arg[1]) {
path = arg[1];
arg++;
} else if (!strncmp(*arg, "-3", 2)) {
exp = 3;
} else if (!strncmp(*arg, "-der", 4)) {
pem = false;
}
arg++;
}
if (*arg && type == RSA_KEY_TYPE) {
keySz = (unsigned int)atoi(*arg);
} else if (*arg) {
if (!strncmp(*arg, "P-256", 5)) {
curve = ECC_SECP256R1;
} else if (!strncmp(*arg, "P-384", 5)) {
curve = ECC_SECP384R1;
} else if (!strncmp(*arg, "P-521", 5)) {
curve = ECC_SECP521R1;
} else {
fprintf(stderr, "Invalid Curve Name: %s\n", *arg);
return 1;
}
}
ret = gen_key(rng, &ecKey, &rsaKey, type, keySz, exp, curve);
if (ret != 0)
return ret;
ret = write_key(&ecKey, &rsaKey, type, keySz, path, pem);
if (type == EC_KEY_TYPE) {
wc_ecc_free(&ecKey);
} else {
wc_FreeRsaKey(&rsaKey);
}
return ret;
}
int main(int argc, char *argv[]) {
int ret;
WC_RNG rng;
ret = wc_InitRng(&rng);
if (ret != 0) {
fprintf(stderr, "Init Rng failed: %d\n", ret);
return ret;
}
if (argv[1]) {
if (!strncmp(argv[1], "eckey", 5))
return dokey(&rng, EC_KEY_TYPE, argv + 2);
if (!strncmp(argv[1], "rsakey", 5))
return dokey(&rng, RSA_KEY_TYPE, argv + 2);
if (!strncmp(argv[1], "selfsigned", 10))
return selfsigned(&rng, argv + 2);
}
fprintf(stderr, "PX5G X.509 Certificate Generator Utilit using WolfSSL\n\n");
fprintf(stderr, "Usage: [eckey|rsakey|selfsigned]\n");
return 1;
}

9
package/utils/util-linux/Makefile
View File

@ -8,12 +8,12 @@
include $(TOPDIR)/rules.mk
PKG_NAME:=util-linux
PKG_VERSION:=2.35.1
PKG_RELEASE:=2
PKG_VERSION:=2.36
PKG_RELEASE:=1
PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.xz
PKG_SOURCE_URL:=@KERNEL/linux/utils/$(PKG_NAME)/v2.35
PKG_HASH:=d9de3edd287366cd908e77677514b9387b22bc7b88f45b83e1922c3597f1d7f9
PKG_SOURCE_URL:=@KERNEL/linux/utils/$(PKG_NAME)/v2.36
PKG_HASH:=9e4b1c67eb13b9b67feb32ae1dc0d50e08ce9e5d82e1cccd0ee771ad2fa9e0b1
PKG_CPE_ID:=cpe:/a:kernel:util-linux
PKG_LICENSE:=GPL-2.0
@ -126,6 +126,7 @@ define Package/blkdiscard
$(call Package/util-linux/Default)
TITLE:=discard sectors on a device
SUBMENU=Disc
DEPENDS:=libblkid
endef
define Package/blkdiscard/description

2
package/utils/util-linux/patches/003-fix_pkgconfig_files.patch
View File

@ -10,7 +10,7 @@
endif # BUILD_LIBUUID
--- a/configure.ac
+++ b/configure.ac
@@ -2496,18 +2496,23 @@ AC_CONFIG_HEADERS([config.h])
@@ -2586,18 +2586,23 @@ AC_CONFIG_HEADERS([config.h])
#
AC_CONFIG_FILES([
Makefile

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