This sets up all VLANs with a default configuration on reset:
- forward based on VLAN-ID and not the FID/MSTI
- forward based on the inner VLAN-ID (not outer)
Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
This adds SoC specific VLAN configuration routines, which
alsoe sets up the portmask table entries that are referred to
in the vlan profiles registers for unknown multicast flooding.
Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
This adds support for the MMD access registers the RTL-SoCs use to access clause 45
PHYs via mdio.
This new interface is used to add EEE-support for the RTL8226
Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
Adds a hash-bucket size attribute for the different SoCs, in order to
accomodate the buckets with 8 entries of the L2-forwarding tables
on RTL93XX in contrast to only 4 on RTL83XX.
Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
This adds snooping support for IGMP and MLD on RTL8380/90/9300
by trapping IGMP and MLD packets to the CPU.
Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
Enables CRC calculation offloading on RTL8380/8390/9300.
Tested on Zyxel XGS1210-10 (RTL9302)/GS1900-48 (RTL8390)/GS1900-10HP (RTL8382)
On the Zyxel GS1900-10HP, an increase of 5% in iperf3 send throughput
and 11% in receive throughput is seen.
Signed-off-by: Birger Koblitz <git@birger-koblitz.de>
INABA Abaniact AML2-17GP is a 17 port gigabit switch, based on RTL8382.
Specification:
- SoC : Realtek RTL8382
- RAM : DDR3 128 MiB (SK hynix H5TQ1G63EFR)
- Flash : SPI-NOR 32 MiB (Macronix MX25L25635FZ2I-10G)
- Ethernet : 10/100/1000 Mbps x17
- port 1-8 : RTL8218B (SoC)
- port 8-16 : RTL8218D
- port wan : RTL8214FC
- LEDs/Keys : 1x, 1x
- UART : pin header on PCB (Molex 530470410 compatible)
- J14: 3.3V, GND, RX, TX from rear side
- 115200n8
- Power : 100-240 VAC, 50/60 Hz, 0.21 A
- Plug : IEC 60320-C13
Flash instruction using initramfs image:
1. Boot AML2-17GP normally
2. Set the IP address of computer to the range of 192.168.1.0/24, other
than 192.168.1.248 and connect computer to "WAN/CONSOLE" port of
AML2-17GP
3. Access to "http://192.168.1.248" and open firmware setting page
-- UI Language: 日本語 --
"メンテナンス" -> "デュアルイメージ"
-- UI Language: ENGLISH --
"Maintenance" -> "Dual Image"
4. Check "イメージ情報 (en: "Images Information")" and set the first
image to active by choosing "アクティブイメージ" (en: "Active
Image") in the partition "0"
5. open firmware upgrade page
-- UI Language: 日本語 --
"メンテナンス" -> "アップグレードマネージャー"
-- UI Language: ENGLISH --
"Maintenance" -> "Upgrade Manager"
6. Set the properties as follows
-- UI Language: 日本語 --
"アップグレード方式" : "HTTP"
"アップグレードタイプ" : "イメージ"
"イメージ" : "アクティブ"
"ブラウズファイル" : (select the OpenWrt initramfs image)
-- UI Language: ENGLISH --
"Upgrade Method" : "HTTP"
"Upgrade Type" : "Image"
"Image" : "(Active)"
"Browse file" : (select the OpenWrt initramfs image)
7. Press "アップグレード" (en: "Upgrade") button and perform upgrade
8. Wait ~150 seconds to complete flashing
9. After the flashing, the following message is showed and press "OK"
button to reboot
-- UI Language: 日本語 --
"成功!! 今すぐリブートしますか?"
-- UI Language: ENGLISH --
"Success!! Do you want to reboot now?"
10. After the rebooting, reconnect the cable to other port (1-16) and
open the SSH connection, download the sysupgrade image to the device
and perform sysupgrade with it
11. Wait ~120 seconds to complete sysupgrade
Note:
- The uploaded image via WebUI will only be written with the length
embedded in the uImage header. If the sysupgrade image is specified,
only the kernel is flashed and lacks the rootfs, this causes a kernel
panic while booting and bootloops.
To avoid this issue, initramfs image is required for flashing on WebUI
of stock firmware.
- This device has 1x LED named as "POWER", but it's not connected to the
GPIO of SoC and cannot be controlled.
- port 17 is named as "WAN/CONSOLE". This port is for the upstream
connection and console access (telnet/WebUI) on stock firmware.
Back to stock firmware:
1. Set "bootpartition" variable in u-boot-env2 partition to "1" by
fw_setsys
fw_setsys bootpartition 1
2. Reboot AML2-17GP
Signed-off-by: INAGAKI Hiroshi <musashino.open@gmail.com>
The Netgear GS308T v1 is an 8 port gigabit switch. The GS310TP v1 is an 8
port POE+ gigabit switch with 2 SFP Ports (currently untested).
The GS308T v1 and GS310TP v1 are quite similar to the Netgear GS1xx
devices already supported. Theses two devices use the same Netgear
firmware and are very similar to there corresponding GS1xx devices. For
this reason they share a large portion of the device tree with the GS108T
and GS110TP with exception of the uimage magic and model and compatible
values.
All of the above feature a dual firmware layout, referred to as Image0
and Image1 in the Netgear firmware.
In order to manipulate the PoE+ on the GS310TP v1 , one needs the
rtl83xx-poe package
Specifications (GS308T)
----------------------
* RTL8380M SoC, 1 MIPS 4KEc core @ 500MHz
* 128MB DDR3-1600 DRAM (Winbond W631GG8MB-12)
* 32MB 3v NOR SPI Flash (Winbond W25Q256JVFQ)
* RTL8231 GPIO extender to control the LEDs and the reset button
* 8 x 10/100/1000BASE-T ports, internal PHY (RTL8218B)
* UART (115200 8N1) via unpopulated standard 0.1" pin header marked J1
* Power is supplied via a 12V 1A barrel connector
Specifications (GS310TP)
----------------------
* RTL8380M SoC, 1 MIPS 4KEc core @ 500MHz
* Nuvoton M0516LDN for controlling PoE
* 128MB DDR3-1600 DRAM (Winbond W631GG8MB-12)
* 32MB 3v NOR SPI Flash (Winbond W25Q256JVFQ)
* RTL8231 GPIO extender to control the LEDs and the reset button
* 8 x 10/100/1000BASE-T PoE+ ports, 2 x Gigabit SFP ports,
internal PHY (RTL8218B)
* UART (115200 8N1) via unpopulated standard 0.1" pin header marked J1
* Power is supplied via a 54V 1.25A barrel connector
Both devices have UART pinout
-----------
J1 | [o]ooo
^ ||`------ GND
| |`------- RX [TX out of the serial adapter]
| `-------- TX [RX into the serial adapter]
`---------- Vcc (3V3) [the square pin]
The through holes are filled with PB-free solder which melts at 375C.
They can also be drilled using a 0.9mm bit.
Installation
------------
Instructions are identical to those for the similar Negear devices
and apply both to the GS308T v1 and GS310TP v1 as well.
-------------------
Boot initramfs image from U-Boot
--------------------------------
1. Press the Escape key at the `Hit Esc key to stop autoboot` prompt
2. Init network with `rtk network on` command
3. Load image with `tftpboot 0x8f000000
openwrt-realtek-generic-netgear_gs308t-v1-initramfs-kernel.bin` command
4. Boot the image with `bootm` command
The switch defaults to IP 192.168.1.1 and tries to fetch the image via
TFTP from 192.168.1.111.
Updating the installed firmware
-------------------------------
The OpenWRT ramdisk image can be flashed directly from the Netgear UI.
The Image0 slot should be used in order to enable sysupgrade.
As with similar switches, changing the active boot partition can be
accomplished in U-Boot as follows:
1. Press the Escape key at the `Hit Esc key to stop autoboot` prompt
2. Run `setsys bootpartition {0|1}` to select the boot partition
3. Run `savesys` followed by `boota` to proceed with the boot process
Signed-off-by: Raylynn Knight <rayknight@me.com>
This package depends on the lantiq target and is only build for that
target. A normal package would be build by the SDK builder probably
under a different target and then this package will not be selected.
Mark it as nonshared to build it when the lantiq target gets build.
Fixes: FS#3773, FS#3774
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
The kernel image is too big now and the build fails.
WARNING: Image file zyxel_nbg6716-kernel.bin is too big: 4205404 > 4194304
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
In order to allow easily updating the bootloader on eMMC also provide
artifacts for that. Support for updating bootloader via TFTP will be
added to the loader CLI menu in a follow-up commit.
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
It is possible to select CONFIG_MTD_PARSER_TRX on the mediatek now. Add
this option to the kernel configuration file.
Fixes: 58c5e25664 ("mediatek: support non standard trx magic values")
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
This partly reverts commit 20a924d2ae.
This commit broke the build of the Mediatek target with kernel 5.4, for
kernel 5.10 it is fine.
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
3f5080aedd nptl: Do not build nptl/tst-pthread-gdb-attach as PIE
36783141cf nptl: Check for compatible GDB in nptl/tst-pthread-gdb-attach
ea299b62e8 nptl_db: Support different libpthread/ld.so load orders (bug 27744)
162df872f0 x86: tst-cpu-features-supports.c: Update AMX check
Signed-off-by: Hans Dedecker <dedeckeh@gmail.com>
The spi-ath79 driver performs the chipselect by writing to dedicated
register in the SPI register block. So the GPIO numbers were not used.
Tested-on: Enterasys WS-AP3705i
Signed-off-by: David Bauer <mail@david-bauer.net>
All chipsets from AR7100 up to QCA9563 have three dedicated chipselect
lines for the integrated SPI controller. Remove the number of
chipselects from the platform data, as there is no need to manually set
this to a different value.
Signed-off-by: David Bauer <mail@david-bauer.net>
Add the SPI_MASTER_GPIO_SS flag for the spi-ath79 driver. Otherwise,
the custom chipselect function is never called. This breaks hardware,
where the three dedicated chipselect lines are used instead of generic
GPIO pins.
Signed-off-by: David Bauer <mail@david-bauer.net>
This came up in an upstream commit: "
b1dd9bf688b0 "net: phy: broadcom: Fix RGMII delays for BCM50160 and BCM50610M"
The PHY driver entry for BCM50160 and BCM50610M calls
bcm54xx_config_init() but does not call bcm54xx_config_clock_delay() in
order to configuration appropriate clock delays on the PHY, fix that."
So the "rgmii" phy-mode has always been wrong, but went unnoticed since
the broadcom phy driver didn't push the delay settings to the chip.
Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
QLCNIC_HWMON was activated when hwmon was set, but the dependency was
missing. This broke the build bot builds. Fix this by explicitly
activating HWMON support and adding a dependency.
Fixes: f88c64d28c ("kernel: netdev: add qlcnic")
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
The CLK125 output pin at the ethernet PHY is connected via capacitor to
GND and nowhere else. Disable it. Also tune the LED masks.
The MPP56 and MPP60 pins at the SoC are conected to the μPD720202 USB3.0
chip:
- MPP56: wired to PCIe CLKREQ# (out)
- MPP60: wired to PCIe RESET# (in)
Configure the pcie pinmux for these pins.
Signed-off-by: Daniel González Cabanelas <dgcbueu@gmail.com>
These have long been obsolete. For reference, here's the Linux version where
each symbol has been dropped:
CONFIG_IP6_NF_QUEUE - 3.5
CONFIG_IP6_NF_TARGET_LOG - 3.4
CONFIG_IP_NF_MATCH_DSCP - 2.6.19
CONFIG_NF_CONNTRACK_IPV4 - 4.19
CONFIG_NF_CONNTRACK_IPV6 - 4.19
CONFIG_NF_CONNTRACK_RTCACHE - out-of-tree, superseded by flow offloading
Signed-off-by: Rui Salvaterra <rsalvaterra@gmail.com>
This kmod is similar to macvlan with the difference being that the
endpoints have the same mac address.
It is useful on cloud where only one mac address allowed on port,
where macvlan not works but ipvlan would.
One use case is where multiple IPs and gateways assign on one net port
Signed-off-by: Chen Minqiang <ptpt52@gmail.com>
Since support for SFP on the MikroTik RouterBOARD 922UAGS-5HPacD was
added by 4387fe00cb, the MAC addresses for eth0 (Ethernet) and eth1
(SFP) were swapped. This patch fixes the 02_network script to assign MAC
addresses correctly, so they match the label and the vendor's OS.
Tested on a RouterBOARD 922UAGS-5HPacD board.
Signed-off-by: Roger Pueyo Centelles <roger.pueyo@guifi.net>
CONFIG_FORTIFY_SOURCE=y is already set in the generic kernel
configuration, but it is not working for MIPS on kernel 5.4, support for
MIPS was only added with kernel 5.5, other architectures like aarch64
support FORTIFY_SOURCE already since some time.
This patch adds support for FORTIFY_SOURCE to MIPS with kernel 5.4,
kernel 5.10 already supports this and needs no changes.
This backports one patch from kernel 5.5 and one fix from 5.8 to make
fortify source also work on our kernel 5.4.
The changes are not compatible with the
306-mips_mem_functions_performance.patch patch which was also removed
with kernel 5.10, probably because of the same problems. I think it is
not needed anyway as the compiler should automatically optimize the
calls to memset(), memcpy() and memmove() even when not explicitly
telling the compiler to use the build in variant.
This increases the size of an uncompressed kernel by less than 1 KB.
Acked-by: Rosen Penev <rosenp@gmail.com>
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
The new EEE patch is accepted upstream, so backport it and replace the
current one.
Cc: René van Dorst <opensource@vdorst.com>
Signed-off-by: DENG Qingfang <dqfext@gmail.com>
