However, mainline driver doesn't work very well on RTL8111
devices, so let's move to vendor driver for better performance.
Signed-off-by: Tianling Shen <cnsztl@gmail.com>
It's stable enough to overclock cpu frequency to 2.2/1.8 GHz,
and for better performance.
Signed-off-by: Tianling Shen <cnsztl@gmail.com>
Co-authored-by: gzelvis <gzelvis@gmail.com>
Some boards have SD card connectors where the power rail cannot be switched
off by the driver. If the card has not been power cycled, it may still be
using 1.8V signaling after a warm re-boot. Bootroms expecting 3.3V signaling
will fail to boot from a UHS card that continue to use 1.8V signaling.
Set initial signal voltage in mmc_power_off() to allow re-boot to function.
This fixes re-boot with UHS cards on Asus Tinker Board (Rockchip RK3288),
same issue have been seen on some Rockchip RK3399 boards.
Backport from https://lore.kernel.org/linux-rockchip/AM3PR03MB09664161A7FA2BD68B2800A7AC620@AM3PR03MB0966.eurprd03.prod.outlook.com/
Signed-off-by: Tianling Shen <cnsztl@gmail.com>
Otherwise the missing symbol is added to target config for every kernel
config refresh.
While at it, remove the disabled symbol from target configs.
Fixes: 4943bc5cff ("kernel: only strip proc for small flash devices")
Signed-off-by: Sungbo Eo <mans0n@gorani.run>
All modifications made by update_kernel.sh run in a fresh clone
without any existing toolchains.
Build system: x86_64
Build-tested: ipq806x/R7800, ath79/generic, bcm27xx/bcm2711
Run-tested: ipq806x/R7800
No dmesg regressions, everything functional
Signed-off-by: John Audia <graysky@archlinux.us>
Remove MDIO and I2C bitbangig support from the kernel.
These functionalities are currently not used by any board in the target.
Signed-off-by: David Bauer <mail@david-bauer.net>
This commit fixes the name for the GMAC clock to gmac_clkin, as this is
the name of the clock provided by the rk3328-clk driver.
Without this commit, the GMAC will not work in TX direction.
Suggested-by: Tobias Waldvogel <tobias.waldvogel@gmail.com>
Signed-off-by: David Bauer <mail@david-bauer.net>
Similar to how it was already done for other filesystems' *_FS_XATTR
kernel config symbols, also move CONFIG_F2FS_FS_XATTR=y and
CONFIG_F2FS_STAT_FS=y to target/linux/generic.
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
Extended attributes are required for overlayfs and have hence been long
ago enabled for jffs2, but should be enabled unconditionally for all
other filesystems which may potentially serve as overlayfs' upper
directory. Previously it was inconsistently added in multiple targets.
Add symbols to generic kernel config and remove all *_XATTR symbols
from target configs.
Signed-off-by: Paul Spooren <mail@aparcar.org>
[keep things as they are for squashfs, improve commit message]
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
This commit fixes the name for the GMAC clock to gmac_clkin, as this is
the name of the clock provided by the rk3328-clk driver.
Without this commit, the GMAC will not work in TX direction.
Suggested-by: Tobias Waldvogel <tobias.waldvogel@gmail.com>
Signed-off-by: David Bauer <mail@david-bauer.net>
This adds basic support for Radxa Rock Pi 4
Specification:
- RAM: 1 GB/ 2 GB/4 GB LPDDR4
- SoC: Rockchip RK3399
- CPU: 64bit hexa core processor
Dual Cortex-A72, freqency 1.8Ghz
with quad Cortex-A53, frequency 1.4Ghz
- USB: USB 3.0 OTG x1
hardware switch for host/device switch, upper one
USB 3.0 HOST x1
dedicated USB3.0 channel, lower one
USB 2.0 HOST x2
- Ethernet: 1x GbE
- Storage: eMMC module
uSD card
M.2 SSD
- Wireless: 802.11 ac wifi
Bluetooth 5.0
currently not supported
firmware Installation
======================
gzip -d xxx.img.gz, then dd the .img to SD/eMMC
======================
Device Tested: ROCK PI 4 Model B v1.3
Signed-off-by: Marty Jones <mj8263788@gmail.com>
The NanoPi R2S features a Realtek Gigabit Ethernet PHY. Enable the
Realtek specific PHY driver to correctly configure internal delays.
Signed-off-by: David Bauer <mail@david-bauer.net>
Fix the PHY ID for the NanoPi R2S PHY compatible to match the used PHY.
The ID was wrong as I've accidentally picked the wrong upstream patch.
Signed-off-by: David Bauer <mail@david-bauer.net>
The NanoPi R2S features a Realtek Gigabit Ethernet PHY. Enable the
Realtek specific PHY driver to correctly configure internal delays.
Signed-off-by: David Bauer <mail@david-bauer.net>
Fix the PHY ID for the NanoPi R2S PHY compatible to match the used PHY.
The ID was wrong as I've accidentally picked the wrong upstream patch.
Signed-off-by: David Bauer <mail@david-bauer.net>
This adds the compatible property to the NanoPi R2S ethernet PHY node.
Otherwise, the PHY might not be probed, as the PHY ID reads all 0xff
when it is still in reset.
Signed-off-by: David Bauer <mail@david-bauer.net>
